[clang] [llvm] [IR] Introduce an appendTags() idiom to set MMRA metadata [NFC] (PR #199621)

[Sameer Sahasrabuddhe via cfe-commits]

https://github.com/ssahasra created https://github.com/llvm/llvm-project/pull/199621

This is a simple set-union of new tags and existing tags. This is safer than directly setting metadata, which can over-write existing MMRAs.

Assisted-By: Claude Opus 4.6

>From fc77611e965cd8e94d938e94a58bbc06a4825069 Mon Sep 17 00:00:00 2001
From: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: Tue, 26 May 2026 11:22:08 +0530
Subject: [PATCH] [IR] Introduce an appendTags() idiom to set MMRA metadata
 [NFC]

This is a simple set-union of new tags and existing tags. This is safer than
directly setting metadata, which can over-write existing MMRAs.

Assisted-By: Claude Opus 4.6
---
 clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp       |  5 +----
 .../llvm/IR/MemoryModelRelaxationAnnotations.h    |  4 ++++
 llvm/lib/IR/MemoryModelRelaxationAnnotations.cpp  | 15 +++++++++++++++
 3 files changed, 20 insertions(+), 4 deletions(-)

diff --git a/clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp b/clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
index cb883e8780e59..a88dbb71b3ddf 100644
--- a/clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+++ b/clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
@@ -440,7 +440,6 @@ void CodeGenFunction::AddAMDGPUFenceAddressSpaceMMRA(llvm::Instruction *Inst,
                                                      const CallExpr *E) {
   constexpr const char *Tag = "amdgpu-synchronize-as";
 
-  LLVMContext &Ctx = Inst->getContext();
   SmallVector<MMRAMetadata::TagT, 3> MMRAs;
   for (unsigned K = 2; K < E->getNumArgs(); ++K) {
     llvm::Value *V = EmitScalarExpr(E->getArg(K));
@@ -454,9 +453,7 @@ void CodeGenFunction::AddAMDGPUFenceAddressSpaceMMRA(llvm::Instruction *Inst,
               "expected an address space name as a string literal");
   }
 
-  llvm::sort(MMRAs);
-  MMRAs.erase(llvm::unique(MMRAs), MMRAs.end());
-  Inst->setMetadata(LLVMContext::MD_mmra, MMRAMetadata::getMD(Ctx, MMRAs));
+  MMRAMetadata::appendTags(*Inst, MMRAs);
 }
 
 static Value *GetAMDGPUPredicate(CodeGenFunction &CGF, Twine Name) {
diff --git a/llvm/include/llvm/IR/MemoryModelRelaxationAnnotations.h b/llvm/include/llvm/IR/MemoryModelRelaxationAnnotations.h
index fcfb2db85a880..2fde44025b3c6 100644
--- a/llvm/include/llvm/IR/MemoryModelRelaxationAnnotations.h
+++ b/llvm/include/llvm/IR/MemoryModelRelaxationAnnotations.h
@@ -83,6 +83,10 @@ class MMRAMetadata {
   /// \returns true if \p MD is a well-formed MMRA tag.
   LLVM_ABI static bool isTagMD(const Metadata *MD);
 
+  /// Appends the given tags to the !mmra metadata on \p I,
+  /// merging with any existing MMRA metadata.
+  LLVM_ABI static void appendTags(Instruction &I, ArrayRef<TagT> Tags);
+
   /// @}
 
   /// \name Compatibility Helpers
diff --git a/llvm/lib/IR/MemoryModelRelaxationAnnotations.cpp b/llvm/lib/IR/MemoryModelRelaxationAnnotations.cpp
index 819cad3366787..376e27bd2c8b0 100644
--- a/llvm/lib/IR/MemoryModelRelaxationAnnotations.cpp
+++ b/llvm/lib/IR/MemoryModelRelaxationAnnotations.cpp
@@ -98,6 +98,21 @@ MDNode *MMRAMetadata::combine(LLVMContext &Ctx, const MMRAMetadata &A,
   return MDTuple::get(Ctx, Result);
 }
 
+void MMRAMetadata::appendTags(Instruction &I, ArrayRef<TagT> Tags) {
+  if (Tags.empty())
+    return;
+  SmallVector<MMRAMetadata::TagT> MMRAs(Tags);
+  LLVMContext &Ctx = I.getContext();
+  if (MDNode *Existing = I.getMetadata(LLVMContext::MD_mmra)) {
+    // Merge with existing MMRA tags.
+    MMRAMetadata Parsed(Existing);
+    MMRAs.append(Parsed.begin(), Parsed.end());
+  }
+  llvm::sort(MMRAs);
+  MMRAs.erase(llvm::unique(MMRAs), MMRAs.end());
+  I.setMetadata(LLVMContext::MD_mmra, MMRAMetadata::getMD(Ctx, MMRAs));
+}
+
 bool MMRAMetadata::hasTag(StringRef Prefix, StringRef Suffix) const {
   return Tags.count({Prefix, Suffix});
 }