[clang] [llvm] [LLVMABI] Implement the System V X86-64 ABI (PR #194718)
Andy Kaylor via cfe-commits
cfe-commits at lists.llvm.org
Tue May 19 18:04:36 PDT 2026
================
@@ -0,0 +1,1424 @@
+//===- X86.cpp ------------------------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/ABI/FunctionInfo.h"
+#include "llvm/ABI/TargetInfo.h"
+#include "llvm/ABI/Types.h"
+#include "llvm/Support/Alignment.h"
+#include "llvm/Support/Casting.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/MathExtras.h"
+#include "llvm/Support/TypeSize.h"
+#include <algorithm>
+#include <cassert>
+#include <cstdint>
+
+namespace llvm {
+namespace abi {
+
+static unsigned getNativeVectorSizeForAVXABI(X86AVXABILevel AVXLevel) {
+ switch (AVXLevel) {
+ case X86AVXABILevel::AVX512:
+ return 512;
+ case X86AVXABILevel::AVX:
+ return 256;
+ case X86AVXABILevel::None:
+ return 128;
+ }
+ llvm_unreachable("Unknown AVXLevel");
+}
+
+class X86_64TargetInfo : public TargetInfo {
+public:
+ enum Class { Integer, Sse, SseUp, X87, X87Up, ComplexX87, NoClass, Memory };
+
+private:
+ TypeBuilder &TB;
+ X86AVXABILevel AVXLevel;
+ bool Has64BitPointers;
+
+ static Class merge(Class Accum, Class Field);
+
+ void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const;
+
+ void classify(const Type *T, uint64_t OffsetBase, Class &Lo, Class &Hi,
+ bool IsNamedArg, bool IsRegCall = false) const;
+
+ const Type *getIntegerTypeAtOffset(const Type *IRType, unsigned IROffset,
+ const Type *SourceTy,
+ unsigned SourceOffset,
+ bool InMemory = false) const;
+
+ const Type *getSSETypeAtOffset(const Type *ABIType, unsigned ABIOffset,
+ const Type *SourceTy,
+ unsigned SourceOffset) const;
+ bool isIllegalVectorType(const Type *Ty) const;
+ bool containsMatrixField(const RecordType *RT) const;
+
+ void computeInfo(FunctionInfo &FI) const override;
+ ArgInfo getIndirectReturnResult(const Type *Ty) const;
+ const Type *getFPTypeAtOffset(const Type *Ty, unsigned Offset) const;
+
+ const Type *isSingleElementStruct(const Type *Ty) const;
+ const Type *getByteVectorType(const Type *Ty) const;
+
+ const Type *createPairType(const Type *Lo, const Type *Hi) const;
+ ArgInfo getIndirectResult(const Type *Ty, unsigned FreeIntRegs) const;
+
+ ArgInfo classifyReturnType(const Type *RetTy) const;
+
+ ArgInfo classifyArgumentType(const Type *Ty, unsigned FreeIntRegs,
+ unsigned &NeededInt, unsigned &NeededSse,
+ bool IsNamedArg, bool IsRegCall = false) const;
+ const Type *useFirstFieldIfTransparentUnion(const Type *Ty) const;
+
+public:
+ X86_64TargetInfo(TypeBuilder &TypeBuilder, X86AVXABILevel AVXABILevel,
+ bool Has64BitPtrs, const ABICompatInfo &Compat)
+ : TargetInfo(Compat), TB(TypeBuilder), AVXLevel(AVXABILevel),
+ Has64BitPointers(Has64BitPtrs) {}
+
+ bool has64BitPointers() const { return Has64BitPointers; }
+};
+
+// Gets the "best" type to represent the union.
+static const Type *reduceUnionForX8664(const RecordType *UnionType,
+ TypeBuilder &TB) {
+ assert(UnionType->isUnion() && "Expected union type");
+
+ ArrayRef<FieldInfo> Fields = UnionType->getFields();
+ if (Fields.empty()) {
+ return nullptr;
+ }
+
+ const Type *StorageType = nullptr;
+
+ for (const auto &Field : Fields) {
+ if (Field.IsBitField && Field.IsUnnamedBitfield &&
+ Field.BitFieldWidth == 0) {
+ continue;
+ }
+
+ const Type *FieldType = Field.FieldType;
+
+ if (UnionType->isTransparentUnion() && !StorageType) {
+ StorageType = FieldType;
+ break;
+ }
+
+ if (!StorageType ||
+ FieldType->getAlignment() > StorageType->getAlignment() ||
+ (FieldType->getAlignment() == StorageType->getAlignment() &&
+ TypeSize::isKnownGT(FieldType->getSizeInBits(),
+ StorageType->getSizeInBits()))) {
+ StorageType = FieldType;
+ }
+ }
+ return StorageType;
+}
+
+void X86_64TargetInfo::postMerge(unsigned AggregateSize, Class &Lo,
+ Class &Hi) const {
+ // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done:
+ //
+ // (a) If one of the classes is Memory, the whole argument is passed in
+ // memory.
+ //
+ // (b) If X87Up is not preceded by X87, the whole argument is passed in
+ // memory.
+ //
+ // (c) If the size of the aggregate exceeds two eightbytes and the first
+ // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole
+ // argument is passed in memory. NOTE: This is necessary to keep the
+ // ABI working for processors that don't support the __m256 type.
+ //
+ // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE.
+ //
+ // Some of these are enforced by the merging logic. Others can arise
+ // only with unions; for example:
+ // union { _Complex double; unsigned; }
+ //
+ // Note that clauses (b) and (c) were added in 0.98.
+
+ if (Hi == Memory)
+ Lo = Memory;
+ if (Hi == X87Up && Lo != X87 && getABICompatInfo().HonorsRevision98)
+ Lo = Memory;
+ if (AggregateSize > 128 && (Lo != Sse || Hi != SseUp))
+ Lo = Memory;
+ if (Hi == SseUp && Lo != Sse)
+ Hi = Sse;
+}
+X86_64TargetInfo::Class X86_64TargetInfo::merge(Class Accum, Class Field) {
+ // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is
+ // classified recursively so that always two fields are
+ // considered. The resulting class is calculated according to
+ // the classes of the fields in the eightbyte:
+ //
+ // (a) If both classes are equal, this is the resulting class.
+ //
+ // (b) If one of the classes is NO_CLASS, the resulting class is
+ // the other class.
+ //
+ // (c) If one of the classes is MEMORY, the result is the MEMORY
+ // class.
+ //
+ // (d) If one of the classes is INTEGER, the result is the
+ // INTEGER.
+ //
+ // (e) If one of the classes is X87, X87Up, COMPLEX_X87 class,
+ // MEMORY is used as class.
+ //
+ // (f) Otherwise class SSE is used.
+
+ // Accum should never be memory (we should have returned) or
+ // ComplexX87 (because this cannot be passed in a structure).
+ assert((Accum != Memory && Accum != ComplexX87) &&
+ "Invalid accumulated classification during merge.");
+
+ if (Accum == Field || Field == NoClass)
+ return Accum;
+ if (Field == Memory)
+ return Memory;
+ if (Accum == NoClass)
+ return Field;
+ if (Accum == Integer || Field == Integer)
+ return Integer;
+ if (Field == X87 || Field == X87Up || Field == ComplexX87 || Accum == X87 ||
+ Accum == X87Up)
+ return Memory;
+
+ return Sse;
+}
+
+bool X86_64TargetInfo::containsMatrixField(const RecordType *RT) const {
+ for (const auto &Field : RT->getFields()) {
+ const Type *FieldType = Field.FieldType;
+
+ if (const auto *AT = dyn_cast<ArrayType>(FieldType)) {
+ if (AT->isMatrixType())
+ return true;
+ continue;
+ }
+
+ if (const auto *NestedRT = dyn_cast<RecordType>(FieldType))
+ if (containsMatrixField(NestedRT))
+ return true;
+ }
+ return false;
+}
+
+void X86_64TargetInfo::classify(const Type *T, uint64_t OffsetBase, Class &Lo,
+ Class &Hi, bool IsNamedArg,
+ bool IsRegCall) const {
+ Lo = Hi = NoClass;
+ Class &Current = OffsetBase < 64 ? Lo : Hi;
+ Current = Memory;
+
+ if (T->isVoid()) {
+ Current = NoClass;
+ return;
+ }
+
+ if (const auto *IT = dyn_cast<IntegerType>(T)) {
+ auto BitWidth = IT->getSizeInBits().getFixedValue();
+
+ if (BitWidth == 128 ||
+ (IT->isBitInt() && BitWidth > 64 && BitWidth <= 128)) {
+ Lo = Integer;
+ Hi = Integer;
+ } else if (BitWidth <= 64)
+ Current = Integer;
+
+ return;
+ }
+
+ if (const auto *FT = dyn_cast<FloatType>(T)) {
+ const auto *FltSem = FT->getSemantics();
+
+ if (FltSem == &llvm::APFloat::IEEEsingle() ||
+ FltSem == &llvm::APFloat::IEEEdouble() ||
+ FltSem == &llvm::APFloat::IEEEhalf() ||
+ FltSem == &llvm::APFloat::BFloat()) {
+ Current = Sse;
+ } else if (FltSem == &llvm::APFloat::IEEEquad()) {
+ Lo = Sse;
+ Hi = SseUp;
+ } else if (FltSem == &llvm::APFloat::x87DoubleExtended()) {
+ Lo = X87;
+ Hi = X87Up;
+ } else
+ Current = Sse;
+ return;
+ }
+ if (T->isPointer()) {
+ Current = Integer;
+ return;
+ }
+
+ if (const auto *MPT = dyn_cast<MemberPointerType>(T)) {
+ if (MPT->isFunctionPointer()) {
+ if (Has64BitPointers) {
+ Lo = Hi = Integer;
+ } else {
+ uint64_t EbFuncPtr = OffsetBase / 64;
+ uint64_t EbThisAdj = (OffsetBase + 64 - 1) / 64;
+ if (EbFuncPtr != EbThisAdj) {
+ Lo = Hi = Integer;
+ } else
+ Current = Integer;
+ }
+ } else
+ Current = Integer;
+ return;
+ }
+
+ if (const auto *VT = dyn_cast<VectorType>(T)) {
+ auto Size = VT->getSizeInBits().getFixedValue();
+ const Type *ElementType = VT->getElementType();
+
+ if (Size == 1 || Size == 8 || Size == 16 || Size == 32) {
+ // gcc passes the following as integer:
+ // 4 bytes - <4 x char>, <2 x short>, <1 x int>, <1 x float>
+ // 2 bytes - <2 x char>, <1 x short>
+ // 1 byte - <1 x char>
+ Current = Integer;
+ // If this type crosses an eightbyte boundary, it should be
+ // split.
+ uint64_t EbLo = (OffsetBase) / 64;
+ uint64_t EbHi = (OffsetBase + Size - 1) / 64;
+ if (EbLo != EbHi)
+ Hi = Lo;
+ } else if (Size == 64) {
+ if (const auto *FT = dyn_cast<FloatType>(ElementType)) {
+ // gcc passes <1 x double> in memory. :(
+ if (FT->getSemantics() == &llvm::APFloat::IEEEdouble())
+ return;
+ }
+
+ // gcc passes <1 x long long> as SSE but clang used to unconditionally
+ // pass them as integer. For platforms where clang is the de facto
+ // platform compiler, we must continue to use integer.
+ if (const auto *IT = dyn_cast<IntegerType>(ElementType)) {
+ uint64_t ElemBits = IT->getSizeInBits().getFixedValue();
+ if (!getABICompatInfo().ClassifyIntegerMMXAsSSE &&
+ (ElemBits == 64 || ElemBits == 32)) {
+ Current = Integer;
+ } else
+ Current = Sse;
+ } else
+ Current = Sse;
+ // If this type crosses an eightbyte boundary, it should be
+ // split.
+ if (OffsetBase && OffsetBase != 64)
+ Hi = Lo;
+ } else if (Size == 128 ||
+ (IsNamedArg && Size <= getNativeVectorSizeForAVXABI(AVXLevel))) {
+ if (const auto *IT = dyn_cast<IntegerType>(ElementType)) {
+ uint64_t ElemBits = IT->getSizeInBits().getFixedValue();
+ // gcc passes 256 and 512 bit <X x __int128> vectors in memory. :(
+ if (getABICompatInfo().PassInt128VectorsInMem && Size != 128 &&
+ ElemBits == 128)
+ return;
+ }
+
+ // Arguments of 256-bits are split into four eightbyte chunks. The
+ // least significant one belongs to class SSE and all the others to class
+ // SSEUP. The original Lo and Hi design considers that types can't be
+ // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense.
+ // This design isn't correct for 256-bits, but since there're no cases
+ // where the upper parts would need to be inspected, avoid adding
+ // complexity and just consider Hi to match the 64-256 part.
+ //
+ // Note that per 3.5.7 of AMD64-ABI, 256-bit args are only passed in
+ // registers if they are "named", i.e. not part of the "..." of a
+ // variadic function.
+ //
+ // Similarly, per 3.2.3. of the AVX512 draft, 512-bits ("named") args are
+ // split into eight eightbyte chunks, one SSE and seven SSEUP.
+ Lo = Sse;
+ Hi = SseUp;
+ }
+ return;
+ }
+
+ if (const auto *CT = dyn_cast<ComplexType>(T)) {
+ const Type *ElementType = CT->getElementType();
+ uint64_t Size = T->getSizeInBits().getFixedValue();
+
+ if (isa<IntegerType>(ElementType)) {
+ if (Size <= 64)
+ Current = Integer;
+ else if (Size <= 128)
+ Lo = Hi = Integer;
+ } else if (const auto *EFT = dyn_cast<FloatType>(ElementType)) {
+ const auto *FltSem = EFT->getSemantics();
+ if (FltSem == &llvm::APFloat::IEEEhalf() ||
+ FltSem == &llvm::APFloat::IEEEsingle() ||
+ FltSem == &llvm::APFloat::BFloat())
+ Current = Sse;
+ else if (FltSem == &llvm::APFloat::IEEEquad())
+ Current = Memory;
+ else if (FltSem == &llvm::APFloat::x87DoubleExtended())
+ Current = ComplexX87;
+ else if (FltSem == &llvm::APFloat::IEEEdouble())
+ Lo = Hi = Sse;
+ else
+ llvm_unreachable("Unexpected long double representation!");
+ }
+
+ uint64_t ElementSize = ElementType->getSizeInBits().getFixedValue();
+ // If this complex type crosses an eightbyte boundary then it
+ // should be split.
+ uint64_t EbReal = OffsetBase / 64;
+ uint64_t EbImag = (OffsetBase + ElementSize) / 64;
+ if (Hi == NoClass && EbReal != EbImag)
+ Hi = Lo;
+
+ return;
+ }
+
+ if (const auto *AT = dyn_cast<ArrayType>(T)) {
+ uint64_t Size = AT->getSizeInBits().getFixedValue();
+
+ if (!IsRegCall && Size > 512)
+ return;
+
+ const Type *ElementType = AT->getElementType();
+ uint64_t ElemAlign = ElementType->getAlignment().value() * 8;
+ if (OffsetBase % ElemAlign)
+ return;
+
+ Current = NoClass;
+ uint64_t EltSize = ElementType->getSizeInBits().getFixedValue();
+ uint64_t ArraySize = AT->getNumElements();
+
+ if (Size > 128 &&
+ (Size != EltSize || Size > getNativeVectorSizeForAVXABI(AVXLevel)))
+ return;
+
+ for (uint64_t I = 0, Offset = OffsetBase; I < ArraySize;
+ ++I, Offset += EltSize) {
+ Class FieldLo, FieldHi;
+ classify(ElementType, Offset, FieldLo, FieldHi, IsNamedArg);
+ Lo = merge(Lo, FieldLo);
+ Hi = merge(Hi, FieldHi);
+ if (Lo == Memory || Hi == Memory)
+ break;
+ }
+ postMerge(Size, Lo, Hi);
+ assert((Hi != SseUp || Lo == Sse) && "Invalid SseUp array classification.");
+ return;
+ }
+ if (const auto *RT = dyn_cast<RecordType>(T)) {
+ uint64_t Size = RT->getSizeInBits().getFixedValue();
+
+ if (containsMatrixField(RT)) {
+ Lo = Memory;
+ return;
+ }
+
+ // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
+ // than eight eightbytes, ..., it has class MEMORY.
+ if (Size > 512)
+ return;
+
+ // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial
+ // copy constructor or a non-trivial destructor, it is passed by invisible
+ // reference.
+ if (getRecordArgABI(RT))
+ return;
+
+ // Assume variable sized types are passed in memory.
+ if (RT->hasFlexibleArrayMember())
+ return;
+
+ // Reset Lo class, this will be recomputed.
+ Current = NoClass;
+
+ // If this is a C++ record, classify the bases first.
+ if (RT->isCXXRecord()) {
+ for (const auto &Base : RT->getBaseClasses()) {
+
+ // Classify this field.
+ //
+ // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a
+ // single eightbyte, each is classified separately. Each eightbyte gets
+ // initialized to class NO_CLASS.
+ Class FieldLo, FieldHi;
+ uint64_t Offset = OffsetBase + Base.OffsetInBits;
+ classify(Base.FieldType, Offset, FieldLo, FieldHi, IsNamedArg);
+ Lo = merge(Lo, FieldLo);
+ Hi = merge(Hi, FieldHi);
+
+ if (getABICompatInfo().ReturnCXXRecordGreaterThan128InMem &&
+ (Size > 128 &&
+ (Size != Base.FieldType->getSizeInBits().getFixedValue() ||
+ Size > getNativeVectorSizeForAVXABI(AVXLevel))))
+ Lo = Memory;
+
+ if (Lo == Memory || Hi == Memory) {
+ postMerge(Size, Lo, Hi);
+ return;
+ }
+ }
+ }
+
+ // Classify the fields one at a time, merging the results.
+
+ bool IsUnion = RT->isUnion() && !getABICompatInfo().Clang11Compat;
+ for (const auto &Field : RT->getFields()) {
+ uint64_t Offset = OffsetBase + Field.OffsetInBits;
+ bool BitField = Field.IsBitField;
+
+ if (BitField && Field.IsUnnamedBitfield)
+ continue;
+
+ if (Size > 128 &&
+ ((!IsUnion &&
+ Size != Field.FieldType->getSizeInBits().getFixedValue()) ||
+ Size > getNativeVectorSizeForAVXABI(AVXLevel))) {
+ Lo = Memory;
+ postMerge(Size, Lo, Hi);
+ return;
+ }
+
+ bool IsInMemory = Offset % (Field.FieldType->getAlignment().value() * 8);
+ if (!BitField && IsInMemory) {
+ Lo = Memory;
+ postMerge(Size, Lo, Hi);
+ return;
+ }
+
+ Class FieldLo, FieldHi;
+
+ if (BitField) {
+ uint64_t BitFieldSize = Field.BitFieldWidth;
+ uint64_t EbLo = Offset / 64;
+ uint64_t EbHi = (Offset + BitFieldSize - 1) / 64;
+
+ if (EbLo) {
+ assert(EbHi == EbLo && "Invalid classification, type > 16 bytes.");
+ FieldLo = NoClass;
+ FieldHi = Integer;
+ } else {
+ FieldLo = Integer;
+ FieldHi = EbHi ? Integer : NoClass;
+ }
+ } else
+ classify(Field.FieldType, Offset, FieldLo, FieldHi, IsNamedArg);
+
+ Lo = merge(Lo, FieldLo);
+ Hi = merge(Hi, FieldHi);
+ if (Lo == Memory || Hi == Memory)
+ break;
+ }
+ postMerge(Size, Lo, Hi);
+ return;
+ }
+
+ Lo = Memory;
+ Hi = NoClass;
+}
+
+const Type *
+X86_64TargetInfo::useFirstFieldIfTransparentUnion(const Type *Ty) const {
+ if (const auto *RT = dyn_cast<RecordType>(Ty)) {
+ if (RT->isUnion() && RT->isTransparentUnion()) {
+ auto Fields = RT->getFields();
+ assert(!Fields.empty() && "sema created an empty transparent union");
----------------
andykaylor wrote:
I don't think you can say the "sema" created anything here. Non-clang clients will have done something else.
https://github.com/llvm/llvm-project/pull/194718
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