[clang] [llvm] [RISCV][MC] Add experimental `Zvvmtls` and `Zvvmttls` support (PR #198229)

[via cfe-commits]

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@@ -34,6 +56,84 @@ def VScaleOp : RegisterOperand<VMV0> {
   let DecoderMethod = "decodeVMaskReg";
 }
 
+class VTileLoadBase<bits<2> mop, dag ins, string opcodestr, string argstr>
+    : RVInst<(outs VR:$vd),
+             ins, opcodestr, argstr, [], InstFormatR> {
+  bits<5> vd;
+  bits<5> rs1;
+  bits<5> rs2;
+  bit vm;
+  bits<3> vlambda;
+
+  let Inst{31-29} = vlambda;
+  let Inst{28} = 1;
+  let Inst{27-26} = mop;
+  let Inst{25} = vm;
+  let Inst{24-20} = rs2;
+  let Inst{19-15} = rs1;
+  let Inst{14-12} = 0b111;
+  let Inst{11-7} = vd;
+  let Inst{6-0} = OPC_LOAD_FP.Value;
+
+  let mayLoad = 1;
+  let mayStore = 0;
+  let hasSideEffects = 0;
+  let Uses = [VL, VTYPE];
+  let VMConstraint = true;
+  let UseNamedOperandTable = true;
+}
+
+class VTileStoreBase<bits<2> mop, dag ins, string opcodestr, string argstr>
+    : RVInst<(outs),
+             ins, opcodestr, argstr, [], InstFormatR> {
+  bits<5> vs3;
+  bits<5> rs1;
+  bits<5> rs2;
+  bit vm;
+  bits<3> vlambda;
+
+  let Inst{31-29} = vlambda;
+  let Inst{28} = 1;
+  let Inst{27-26} = mop;
+  let Inst{25} = vm;
+  let Inst{24-20} = rs2;
+  let Inst{19-15} = rs1;
+  let Inst{14-12} = 0b111;
+  let Inst{11-7} = vs3;
+  let Inst{6-0} = OPC_STORE_FP.Value;
+
+  let mayLoad = 0;
+  let mayStore = 1;
+  let hasSideEffects = 0;
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imkiva wrote:

Okay. I noticed there're many .td files still using 0/1 for boolean values. Should I change them to true/false together?

https://github.com/llvm/llvm-project/pull/198229