[clang] [CIR][CIRGen][Builtin][X86] Compress Store Intrinsics (PR #169648)

[via cfe-commits]

https://github.com/AnkitDubeycs25 updated https://github.com/llvm/llvm-project/pull/169648

>From f6f3a83c0ebed7578df841570b7ac636307cfded Mon Sep 17 00:00:00 2001
From: AnkitDubeycs25 <cs25mtech12001 at iith.ac.in>
Date: Wed, 26 Nov 2025 18:17:45 +0530
Subject: [PATCH] [CIR][CIRGen][Builtin][X86] Implement Compress Store
 Intrinsics

Implement CIR lowering for X86 AVX-512 compress store builtins by
adding emitX86CompressStore() which emits a masked_compressstore MLIR
op, wired up for all compres store builtin variants.
---
 clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp    | 23 +++++++++++++++----
 .../X86/compressStore_builtin.c               | 18 +++++++++++++++
 2 files changed, 36 insertions(+), 5 deletions(-)
 create mode 100644 clang/test/CIR/CodeGenBuiltins/X86/compressStore_builtin.c

diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
index 6ca8a0e7a460f..7932935dc41ff 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
@@ -86,6 +86,17 @@ static mlir::Value getMaskVecValue(CIRGenBuilderTy &builder, mlir::Location loc,
   return maskVec;
 }
 
+static mlir::Value emitX86CompressStore(CIRGenBuilderTy &builder,
+                                        mlir::Location loc,
+                                        ArrayRef<mlir::Value> ops) {
+  auto resultTy = cast<cir::VectorType>(ops[1].getType());
+  mlir::Value maskValue =
+      getMaskVecValue(builder, loc, ops[2], resultTy.getSize());
+  mlir::Value ptr = ops[0];
+  return emitIntrinsicCallOp(builder, loc, "masked_compressstore", resultTy,
+                             mlir::ValueRange{ops[1], ptr, maskValue});
+}
+
 // Builds the VecShuffleOp for pshuflw and pshufhw x86 builtins.
 //
 // The vector is split into lanes of 8 word elements (16 bits). The lower or
@@ -1231,7 +1242,12 @@ CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, const CallExpr *expr) {
   case X86::BI__builtin_ia32_expandloadhi512_mask:
   case X86::BI__builtin_ia32_expandloadqi128_mask:
   case X86::BI__builtin_ia32_expandloadqi256_mask:
-  case X86::BI__builtin_ia32_expandloadqi512_mask:
+  case X86::BI__builtin_ia32_expandloadqi512_mask: {
+    cgm.errorNYI(expr->getSourceRange(),
+                 std::string("unimplemented X86 builtin call: ") +
+                     getContext().BuiltinInfo.getName(builtinID));
+    return {};
+  }
   case X86::BI__builtin_ia32_compressstoredf128_mask:
   case X86::BI__builtin_ia32_compressstoredf256_mask:
   case X86::BI__builtin_ia32_compressstoredf512_mask:
@@ -1250,10 +1266,7 @@ CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, const CallExpr *expr) {
   case X86::BI__builtin_ia32_compressstoreqi128_mask:
   case X86::BI__builtin_ia32_compressstoreqi256_mask:
   case X86::BI__builtin_ia32_compressstoreqi512_mask:
-    cgm.errorNYI(expr->getSourceRange(),
-                 std::string("unimplemented X86 builtin call: ") +
-                     getContext().BuiltinInfo.getName(builtinID));
-    return mlir::Value{};
+    return emitX86CompressStore(builder, getLoc(expr->getExprLoc()), ops);
   case X86::BI__builtin_ia32_expanddf128_mask:
   case X86::BI__builtin_ia32_expanddf256_mask:
   case X86::BI__builtin_ia32_expanddf512_mask:
diff --git a/clang/test/CIR/CodeGenBuiltins/X86/compressStore_builtin.c b/clang/test/CIR/CodeGenBuiltins/X86/compressStore_builtin.c
new file mode 100644
index 0000000000000..42134ef46fc4a
--- /dev/null
+++ b/clang/test/CIR/CodeGenBuiltins/X86/compressStore_builtin.c
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -target-feature +avx512vl -fclangir -emit-cir -o %t.cir -Wall -Werror -Wsign-conversion
+// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -target-feature +avx512vl -fclangir -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion
+// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -target-feature +avx512vl -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion
+// RUN: FileCheck --check-prefixes=OGCG --input-file=%t.ll %s
+
+#include <immintrin.h>
+
+void test_compress_store(void *__P, __mmask8 __U, __m128d __A) {
+  // CIR-LABEL: test_compress_store
+  // CIR: cir.call_llvm_intrinsic "masked_compressstore"
+  // LLVM-LABEL: @test_compress_store
+  // LLVM: @llvm.x86.avx512.mask.compress.store
+  // OGCG-LABEL: @test_compress_store
+  // OGCG: @llvm.x86.avx512.mask.compress.store
+  return _mm_mask_compressstoreu_pd(__P, __U, __A);
+}
\ No newline at end of file