[clang] [llvm] [llvm][RISCV] Support batched dot product extensions MC layer (PR #196467)
Pengcheng Wang via cfe-commits
cfe-commits at lists.llvm.org
Fri May 8 04:35:12 PDT 2026
================
@@ -0,0 +1,68 @@
+//===-- RISCVInstrInfoZvbdota.td - 'Zvbdota' instructions --*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file describes the RISC-V instructions from the standard 'Zvbdota'
+// extension, providing vector batched dot-product instructions.
+// This version is still experimental as the 'Zvbdota' extension hasn't been
+// ratified yet. Version 0.2.
+//
+//===----------------------------------------------------------------------===//
+
+//===----------------------------------------------------------------------===//
+// Instruction class definitions
+//===----------------------------------------------------------------------===//
+
+// Base class for Zvbdota integer instructions (uses OPC_OP_VE)
+class ZvbdotaVV<bits<6> funct6, RISCVVFormat opv, string opcodestr>
+ : RVInstVV<funct6, opv, (outs VR:$vd_wb),
+ (ins VR:$vd, VRM8:$vs2, VR:$vs1, uimm3:$ci, VMaskOp:$vm),
+ opcodestr, "$vd, $vs2, $vs1, $ci$vm"> {
+ bits<3> ci;
+ let Inst{24-23} = vs2{4-3};
+ let Inst{22-20} = ci;
+ let Inst{6-0} = OPC_OP_VE.Value;
+ let hasSideEffects = 0;
----------------
wangpc-pp wrote:
Move these common fields `hasSideEffects`/`mayLoad`/ `mayStore` to outer scope? This can save some lines.
https://github.com/llvm/llvm-project/pull/196467
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