[clang] [CIR][CUDA] Support built-in CUDA surface type (PR #196079)

[Orphic Dreamer via cfe-commits]

https://github.com/Siya-05 created https://github.com/llvm/llvm-project/pull/196079

Related: #179278

This patch adds initial support for CUDA built-in surface types in CIR for device-side compilation.

CUDA surface references are lowered to the NVPTX device-handle representation (`i64`), matching existing Clang CodeGen behavior.

Changes
* Add `getCUDADeviceBuiltinSurfaceDeviceType()` target hook to `TargetCIRGenInfo`
* Implement NVPTX surface lowering in `NVPTXTargetCIRGenInfo`
* Handle CUDA built-in surface types in `CIRGenTypes::convertType`
* Add CIR CUDA test coverage for device-side surface lowering

Notes

* This patch only implements device-side surface type lowering support
* Texture types remain unsupported
* TBAA handling for surface/texture types is left for follow-up work

>From 00f545475131364aba04009d94f95cdcbc329098 Mon Sep 17 00:00:00 2001
From: Sivapriya Venkateswarar <sivapriyaofficial2005 at gmail.com>
Date: Wed, 6 May 2026 17:36:31 +0400
Subject: [PATCH] [CIR][CUDA] Support built-in CUDA surface type

---
 clang/lib/CIR/CodeGen/CIRGenTypes.cpp |  8 ++++++++
 clang/lib/CIR/CodeGen/TargetInfo.cpp  |  6 ++++++
 clang/lib/CIR/CodeGen/TargetInfo.h    |  4 ++++
 clang/test/CIR/CodeGenCUDA/surface.cu | 21 +++++++++++++++++++++
 4 files changed, 39 insertions(+)
 create mode 100644 clang/test/CIR/CodeGenCUDA/surface.cu

diff --git a/clang/lib/CIR/CodeGen/CIRGenTypes.cpp b/clang/lib/CIR/CodeGen/CIRGenTypes.cpp
index 85b7e854abb7f..308e1b44a6352 100644
--- a/clang/lib/CIR/CodeGen/CIRGenTypes.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenTypes.cpp
@@ -295,6 +295,14 @@ mlir::Type CIRGenTypes::convertType(QualType type) {
   type = astContext.getCanonicalType(type);
   const Type *ty = type.getTypePtr();
 
+  if (astContext.getLangOpts().CUDAIsDevice) {
+    if (type->isCUDADeviceBuiltinSurfaceType()) {
+      if (mlir::Type ty =
+              cgm.getTargetCIRGenInfo().getCUDADeviceBuiltinSurfaceDeviceType())
+        return ty;
+    }
+  }
+
   // Process record types before the type cache lookup.
   if (const auto *recordType = dyn_cast<RecordType>(type))
     return convertRecordDeclType(recordType->getDecl()->getDefinitionOrSelf());
diff --git a/clang/lib/CIR/CodeGen/TargetInfo.cpp b/clang/lib/CIR/CodeGen/TargetInfo.cpp
index f674299168960..658e46a2a9e4f 100644
--- a/clang/lib/CIR/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CIR/CodeGen/TargetInfo.cpp
@@ -130,6 +130,12 @@ class NVPTXTargetCIRGenInfo : public TargetCIRGenInfo {
 public:
   NVPTXTargetCIRGenInfo(CIRGenTypes &cgt)
       : TargetCIRGenInfo(std::make_unique<NVPTXABIInfo>(cgt)) {}
+
+  mlir::Type getCUDADeviceBuiltinSurfaceDeviceType() const override {
+    // CUDA surface is represented as a 64-bit handle on device
+    return cir::IntType::get(&getABIInfo().cgt.getMLIRContext(), 64,
+                             /*isSigned=*/true);
+  }
 };
 } // namespace
 
diff --git a/clang/lib/CIR/CodeGen/TargetInfo.h b/clang/lib/CIR/CodeGen/TargetInfo.h
index 5e0103093827b..f64305df5bccf 100644
--- a/clang/lib/CIR/CodeGen/TargetInfo.h
+++ b/clang/lib/CIR/CodeGen/TargetInfo.h
@@ -63,6 +63,10 @@ class TargetCIRGenInfo {
                                           cir::LangAddressSpace::Default);
   }
 
+  virtual mlir::Type getCUDADeviceBuiltinSurfaceDeviceType() const {
+    return nullptr;
+  }
+
   /// Determine whether a call to an unprototyped functions under
   /// the given calling convention should use the variadic
   /// convention or the non-variadic convention.
diff --git a/clang/test/CIR/CodeGenCUDA/surface.cu b/clang/test/CIR/CodeGenCUDA/surface.cu
new file mode 100644
index 0000000000000..d28f876080180
--- /dev/null
+++ b/clang/test/CIR/CodeGenCUDA/surface.cu
@@ -0,0 +1,21 @@
+// REQUIRES: x86-registered-target
+// REQUIRES: nvptx-registered-target
+// RUN: %clang_cc1 -fclangir -std=c++11 -fcuda-is-device -triple nvptx64-nvidia-cuda -emit-cir -o - %s | FileCheck --check-prefix=DEVICE-CIR %s
+// RUN: %clang_cc1 -fclangir -std=c++11 -fcuda-is-device -triple nvptx64-nvidia-cuda -emit-llvm -o - %s | FileCheck --check-prefix=DEVICE-LLVM %s
+
+struct surfaceReference {
+  int desc;
+};
+
+template <typename T, int dim = 1>
+struct __attribute__((device_builtin_surface_type)) surface
+    : public surfaceReference {};
+
+template <int dim>
+struct __attribute__((device_builtin_surface_type)) surface<void, dim>
+    : public surfaceReference {};
+
+surface<void, 2> surf;
+
+// DEVICE-CIR: cir.global external target_address_space(1) @surf = #cir.poison : !s64i
+// DEVICE-LLVM: @surf ={{.*}} addrspace(1) externally_initialized global i64 poison
\ No newline at end of file