[clang] [llvm] [RISCV][MC] Support experimental Zvdota Family instructions (PR #195069)

[Brandon Wu via cfe-commits]

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@@ -690,6 +690,36 @@ def HasStdExtZvabd : Predicate<"Subtarget->hasStdExtZvabd()">,
                      AssemblerPredicate<(all_of FeatureStdExtZvabd),
                                         "'Zvabd' (Vector Absolute Difference)">;
 
+def FeatureStdExtZvqwdota8i
+    : RISCVExperimentalExtension<0, 2, "8-bit Integer Dot-Product", [FeatureStdExtZve32x]>;
+def HasStdExtZvqwdota8i : Predicate<"Subtarget->hasStdExtZvqwdota8i()">,
+                            AssemblerPredicate<(all_of FeatureStdExtZvqwdota8i),
+                            "'Zvqwdota8i' (8-bit Integer Dot-Product)">;
+
+def FeatureStdExtZvqwdota16i
+    : RISCVExperimentalExtension<0, 2, "16-bit Integer Dot-Product", [FeatureStdExtZve64x]>;
+def HasStdExtZvqwdota16i : Predicate<"Subtarget->hasStdExtZvqwdota16i()">,
+                            AssemblerPredicate<(all_of FeatureStdExtZvqwdota16i),
+                            "'Zvqwdota16i' (16-bit Integer Dot-Product)">;
+
+def HasStdExtZvqwdota8iOrZvqwdota16i
+    : Predicate<"Subtarget->hasStdExtZvqwdota8i() || Subtarget->hasStdExtZvqwdota16i() ">,
+                     AssemblerPredicate<(any_of FeatureStdExtZvqwdota8i, FeatureStdExtZvqwdota16i),
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4vtomat wrote:

same indent issue

https://github.com/llvm/llvm-project/pull/195069