[clang] [CIR] max-across-vector (vmaxv_*) intrinsics (PR #194401)

[Andrzej Warzyński via cfe-commits]

================
@@ -24,6 +24,203 @@
 
 #include <arm_neon.h>
 
+//===------------------------------------------------------===//
+// 2.6.1.7 Maximum 
+// 
+// TODO: Implement the remaining intrinsics from this group.
+//===------------------------------------------------------===//
+
+// LLVM-LABEL: @test_vmaxv_f16(
+// CIR-LABEL: @test_vmaxv_f16(
+float16_t test_vmaxv_f16(float16x4_t a) {
+// CIR: {{%.*}} = cir.call_llvm_intrinsic "aarch64.neon.fmaxv" {{%.*}} : (!cir.vector<4 x !cir.f16>) -> !cir.f16
+
+// LLVM-SAME: <4 x half> {{.*}}[[A:%.*]])
+// LLVM:      [[VMAXV1:%.*]] = call half @llvm.aarch64.neon.fmaxv.f16.v4f16(<4 x half> {{.*}})
+// LLVM:      ret half [[VMAXV1]]
+  return vmaxv_f16(a);
+}
+
+// LLVM-LABEL: @test_vmaxvq_f16(
+// CIR-LABEL: cir.func {{.*}} @test_vmaxvq_f16
+float16_t test_vmaxvq_f16(float16x8_t a) {
+// CIR: {{%.*}} = cir.call_llvm_intrinsic "aarch64.neon.fmaxv" {{%.*}} : (!cir.vector<8 x !cir.f16>) -> !cir.f16
+
+// LLVM-SAME: <8 x half> {{.*}}[[A:%.*]])
+// LLVM:      [[VMAXV1:%.*]] = call half @llvm.aarch64.neon.fmaxv.f16.v8f16(<8 x half> {{.*}})
+// LLVM:      ret half [[VMAXV1]]
+  return vmaxvq_f16(a);
+}
----------------
banach-space wrote:

IIUC, these tests require `-target-feature +fullfp16`? If yes, then please move then to fullfp16.c. 

https://github.com/llvm/llvm-project/pull/194401