[clang] [CIR][AArch64] Lower NEON vuzp1/2 intrinsics (PR #195527)
Jiahao Guo via cfe-commits
cfe-commits at lists.llvm.org
Sun May 3 07:08:42 PDT 2026
https://github.com/E00N777 created https://github.com/llvm/llvm-project/pull/195527
### Summary
part of : https://github.com/llvm/llvm-project/issues/185382
Lower vuzp1 and vuzp2 intrinsics in https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#unzip-elements
All the intrinsics are handled inline in llvm-project/build/lib/clang/23/include/arm_neon.h like:
```
#ifdef __LITTLE_ENDIAN__
__ai __attribute__((target("neon"))) int8x8_t vuzp1_s8(int8x8_t __p0, int8x8_t __p1) {
int8x8_t __ret;
__ret = __builtin_shufflevector(__p0, __p1, 0, 2, 4, 6, 8, 10, 12, 14);
return __ret;
}
#else
__ai __attribute__((target("neon"))) int8x8_t vuzp1_s8(int8x8_t __p0, int8x8_t __p1) {
int8x8_t __ret;
int8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, __lane_reverse_64_8);
int8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, __lane_reverse_64_8);
__ret = __builtin_shufflevector(__rev0, __rev1, 0, 2, 4, 6, 8, 10, 12, 14);
__ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_64_8);
return __ret;
}
#endif
```
So no additional special lowering logic is needed.
>From 52492f1278b5a5d46095185299248604d2de0dab Mon Sep 17 00:00:00 2001
From: E0N777 <E0N_gjh at 163.com>
Date: Sun, 3 May 2026 22:04:22 +0800
Subject: [PATCH] [CIR][AArch64] Lower NEON vuzp1/2 intrinsics
---
.../fp8-intrinsics/acle_neon_fp8_untyped.c | 40 --
clang/test/CodeGen/AArch64/neon-perm.c | 420 --------------
clang/test/CodeGen/AArch64/neon/perm.c | 537 ++++++++++++++++++
clang/test/CodeGen/AArch64/poly64.c | 20 -
4 files changed, 537 insertions(+), 480 deletions(-)
diff --git a/clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c b/clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
index bdb2cc1984963..e47998355b655 100644
--- a/clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
+++ b/clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
@@ -667,26 +667,6 @@ mfloat8x16_t test_vtrn1q_mf8(mfloat8x16_t a, mfloat8x16_t b) {
return vtrn1q_mf8(a, b);
}
-// CHECK-LABEL: define dso_local <8 x i8> @test_vuzp1_mf8(
-// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
-// CHECK-NEXT: ret <8 x i8> [[SHUFFLE_I]]
-//
-mfloat8x8_t test_vuzp1_mf8(mfloat8x8_t a, mfloat8x8_t b) {
- return vuzp1_mf8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <16 x i8> @test_vuzp1q_mf8(
-// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
-// CHECK-NEXT: ret <16 x i8> [[SHUFFLE_I]]
-//
-mfloat8x16_t test_vuzp1q_mf8(mfloat8x16_t a, mfloat8x16_t b) {
- return vuzp1q_mf8(a, b);
-}
-
// CHECK-LABEL: define dso_local <8 x i8> @test_vtrn2_mf8(
// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
// CHECK-NEXT: [[ENTRY:.*:]]
@@ -707,26 +687,6 @@ mfloat8x16_t test_vtrn2q_mf8(mfloat8x16_t a, mfloat8x16_t b) {
return vtrn2q_mf8(a, b);
}
-// CHECK-LABEL: define dso_local <8 x i8> @test_vuzp2_mf8(
-// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
-// CHECK-NEXT: ret <8 x i8> [[SHUFFLE_I]]
-//
-mfloat8x8_t test_vuzp2_mf8(mfloat8x8_t a, mfloat8x8_t b) {
- return vuzp2_mf8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <16 x i8> @test_vuzp2q_mf8(
-// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
-// CHECK-NEXT: ret <16 x i8> [[SHUFFLE_I]]
-//
-mfloat8x16_t test_vuzp2q_mf8(mfloat8x16_t a, mfloat8x16_t b) {
- return vuzp2q_mf8(a, b);
-}
-
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl1_mf8(
// CHECK-SAME: <16 x i8> [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
// CHECK-NEXT: [[ENTRY:.*:]]
diff --git a/clang/test/CodeGen/AArch64/neon-perm.c b/clang/test/CodeGen/AArch64/neon-perm.c
index edabc8a002953..b201799fca71b 100644
--- a/clang/test/CodeGen/AArch64/neon-perm.c
+++ b/clang/test/CodeGen/AArch64/neon-perm.c
@@ -6,426 +6,6 @@
#include <arm_neon.h>
-// CHECK-LABEL: define dso_local <8 x i8> @test_vuzp1_s8(
-// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
-// CHECK-NEXT: ret <8 x i8> [[SHUFFLE_I]]
-//
-int8x8_t test_vuzp1_s8(int8x8_t a, int8x8_t b) {
- return vuzp1_s8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <16 x i8> @test_vuzp1q_s8(
-// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
-// CHECK-NEXT: ret <16 x i8> [[SHUFFLE_I]]
-//
-int8x16_t test_vuzp1q_s8(int8x16_t a, int8x16_t b) {
- return vuzp1q_s8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <4 x i16> @test_vuzp1_s16(
-// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[B]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
-// CHECK-NEXT: ret <4 x i16> [[SHUFFLE_I]]
-//
-int16x4_t test_vuzp1_s16(int16x4_t a, int16x4_t b) {
- return vuzp1_s16(a, b);
-}
-
-// CHECK-LABEL: define dso_local <8 x i16> @test_vuzp1q_s16(
-// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
-// CHECK-NEXT: ret <8 x i16> [[SHUFFLE_I]]
-//
-int16x8_t test_vuzp1q_s16(int16x8_t a, int16x8_t b) {
- return vuzp1q_s16(a, b);
-}
-
-// CHECK-LABEL: define dso_local <2 x i32> @test_vuzp1_s32(
-// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[B]], <2 x i32> <i32 0, i32 2>
-// CHECK-NEXT: ret <2 x i32> [[SHUFFLE_I]]
-//
-int32x2_t test_vuzp1_s32(int32x2_t a, int32x2_t b) {
- return vuzp1_s32(a, b);
-}
-
-// CHECK-LABEL: define dso_local <4 x i32> @test_vuzp1q_s32(
-// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[B]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
-// CHECK-NEXT: ret <4 x i32> [[SHUFFLE_I]]
-//
-int32x4_t test_vuzp1q_s32(int32x4_t a, int32x4_t b) {
- return vuzp1q_s32(a, b);
-}
-
-// CHECK-LABEL: define dso_local <2 x i64> @test_vuzp1q_s64(
-// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> [[A]], <2 x i64> [[B]], <2 x i32> <i32 0, i32 2>
-// CHECK-NEXT: ret <2 x i64> [[SHUFFLE_I]]
-//
-int64x2_t test_vuzp1q_s64(int64x2_t a, int64x2_t b) {
- return vuzp1q_s64(a, b);
-}
-
-// CHECK-LABEL: define dso_local <8 x i8> @test_vuzp1_u8(
-// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
-// CHECK-NEXT: ret <8 x i8> [[SHUFFLE_I]]
-//
-uint8x8_t test_vuzp1_u8(uint8x8_t a, uint8x8_t b) {
- return vuzp1_u8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <16 x i8> @test_vuzp1q_u8(
-// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
-// CHECK-NEXT: ret <16 x i8> [[SHUFFLE_I]]
-//
-uint8x16_t test_vuzp1q_u8(uint8x16_t a, uint8x16_t b) {
- return vuzp1q_u8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <4 x i16> @test_vuzp1_u16(
-// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[B]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
-// CHECK-NEXT: ret <4 x i16> [[SHUFFLE_I]]
-//
-uint16x4_t test_vuzp1_u16(uint16x4_t a, uint16x4_t b) {
- return vuzp1_u16(a, b);
-}
-
-// CHECK-LABEL: define dso_local <8 x i16> @test_vuzp1q_u16(
-// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
-// CHECK-NEXT: ret <8 x i16> [[SHUFFLE_I]]
-//
-uint16x8_t test_vuzp1q_u16(uint16x8_t a, uint16x8_t b) {
- return vuzp1q_u16(a, b);
-}
-
-// CHECK-LABEL: define dso_local <2 x i32> @test_vuzp1_u32(
-// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[B]], <2 x i32> <i32 0, i32 2>
-// CHECK-NEXT: ret <2 x i32> [[SHUFFLE_I]]
-//
-uint32x2_t test_vuzp1_u32(uint32x2_t a, uint32x2_t b) {
- return vuzp1_u32(a, b);
-}
-
-// CHECK-LABEL: define dso_local <4 x i32> @test_vuzp1q_u32(
-// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[B]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
-// CHECK-NEXT: ret <4 x i32> [[SHUFFLE_I]]
-//
-uint32x4_t test_vuzp1q_u32(uint32x4_t a, uint32x4_t b) {
- return vuzp1q_u32(a, b);
-}
-
-// CHECK-LABEL: define dso_local <2 x i64> @test_vuzp1q_u64(
-// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> [[A]], <2 x i64> [[B]], <2 x i32> <i32 0, i32 2>
-// CHECK-NEXT: ret <2 x i64> [[SHUFFLE_I]]
-//
-uint64x2_t test_vuzp1q_u64(uint64x2_t a, uint64x2_t b) {
- return vuzp1q_u64(a, b);
-}
-
-// CHECK-LABEL: define dso_local <2 x float> @test_vuzp1_f32(
-// CHECK-SAME: <2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x float> [[A]], <2 x float> [[B]], <2 x i32> <i32 0, i32 2>
-// CHECK-NEXT: ret <2 x float> [[SHUFFLE_I]]
-//
-float32x2_t test_vuzp1_f32(float32x2_t a, float32x2_t b) {
- return vuzp1_f32(a, b);
-}
-
-// CHECK-LABEL: define dso_local <4 x float> @test_vuzp1q_f32(
-// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> [[A]], <4 x float> [[B]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
-// CHECK-NEXT: ret <4 x float> [[SHUFFLE_I]]
-//
-float32x4_t test_vuzp1q_f32(float32x4_t a, float32x4_t b) {
- return vuzp1q_f32(a, b);
-}
-
-// CHECK-LABEL: define dso_local <2 x double> @test_vuzp1q_f64(
-// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x double> [[A]], <2 x double> [[B]], <2 x i32> <i32 0, i32 2>
-// CHECK-NEXT: ret <2 x double> [[SHUFFLE_I]]
-//
-float64x2_t test_vuzp1q_f64(float64x2_t a, float64x2_t b) {
- return vuzp1q_f64(a, b);
-}
-
-// CHECK-LABEL: define dso_local <8 x i8> @test_vuzp1_p8(
-// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
-// CHECK-NEXT: ret <8 x i8> [[SHUFFLE_I]]
-//
-poly8x8_t test_vuzp1_p8(poly8x8_t a, poly8x8_t b) {
- return vuzp1_p8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <16 x i8> @test_vuzp1q_p8(
-// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
-// CHECK-NEXT: ret <16 x i8> [[SHUFFLE_I]]
-//
-poly8x16_t test_vuzp1q_p8(poly8x16_t a, poly8x16_t b) {
- return vuzp1q_p8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <4 x i16> @test_vuzp1_p16(
-// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[B]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
-// CHECK-NEXT: ret <4 x i16> [[SHUFFLE_I]]
-//
-poly16x4_t test_vuzp1_p16(poly16x4_t a, poly16x4_t b) {
- return vuzp1_p16(a, b);
-}
-
-// CHECK-LABEL: define dso_local <8 x i16> @test_vuzp1q_p16(
-// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
-// CHECK-NEXT: ret <8 x i16> [[SHUFFLE_I]]
-//
-poly16x8_t test_vuzp1q_p16(poly16x8_t a, poly16x8_t b) {
- return vuzp1q_p16(a, b);
-}
-
-// CHECK-LABEL: define dso_local <8 x i8> @test_vuzp2_s8(
-// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
-// CHECK-NEXT: ret <8 x i8> [[SHUFFLE_I]]
-//
-int8x8_t test_vuzp2_s8(int8x8_t a, int8x8_t b) {
- return vuzp2_s8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <16 x i8> @test_vuzp2q_s8(
-// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
-// CHECK-NEXT: ret <16 x i8> [[SHUFFLE_I]]
-//
-int8x16_t test_vuzp2q_s8(int8x16_t a, int8x16_t b) {
- return vuzp2q_s8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <4 x i16> @test_vuzp2_s16(
-// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[B]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
-// CHECK-NEXT: ret <4 x i16> [[SHUFFLE_I]]
-//
-int16x4_t test_vuzp2_s16(int16x4_t a, int16x4_t b) {
- return vuzp2_s16(a, b);
-}
-
-// CHECK-LABEL: define dso_local <8 x i16> @test_vuzp2q_s16(
-// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
-// CHECK-NEXT: ret <8 x i16> [[SHUFFLE_I]]
-//
-int16x8_t test_vuzp2q_s16(int16x8_t a, int16x8_t b) {
- return vuzp2q_s16(a, b);
-}
-
-// CHECK-LABEL: define dso_local <2 x i32> @test_vuzp2_s32(
-// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[B]], <2 x i32> <i32 1, i32 3>
-// CHECK-NEXT: ret <2 x i32> [[SHUFFLE_I]]
-//
-int32x2_t test_vuzp2_s32(int32x2_t a, int32x2_t b) {
- return vuzp2_s32(a, b);
-}
-
-// CHECK-LABEL: define dso_local <4 x i32> @test_vuzp2q_s32(
-// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[B]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
-// CHECK-NEXT: ret <4 x i32> [[SHUFFLE_I]]
-//
-int32x4_t test_vuzp2q_s32(int32x4_t a, int32x4_t b) {
- return vuzp2q_s32(a, b);
-}
-
-// CHECK-LABEL: define dso_local <2 x i64> @test_vuzp2q_s64(
-// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> [[A]], <2 x i64> [[B]], <2 x i32> <i32 1, i32 3>
-// CHECK-NEXT: ret <2 x i64> [[SHUFFLE_I]]
-//
-int64x2_t test_vuzp2q_s64(int64x2_t a, int64x2_t b) {
- return vuzp2q_s64(a, b);
-}
-
-// CHECK-LABEL: define dso_local <8 x i8> @test_vuzp2_u8(
-// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
-// CHECK-NEXT: ret <8 x i8> [[SHUFFLE_I]]
-//
-uint8x8_t test_vuzp2_u8(uint8x8_t a, uint8x8_t b) {
- return vuzp2_u8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <16 x i8> @test_vuzp2q_u8(
-// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
-// CHECK-NEXT: ret <16 x i8> [[SHUFFLE_I]]
-//
-uint8x16_t test_vuzp2q_u8(uint8x16_t a, uint8x16_t b) {
- return vuzp2q_u8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <4 x i16> @test_vuzp2_u16(
-// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[B]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
-// CHECK-NEXT: ret <4 x i16> [[SHUFFLE_I]]
-//
-uint16x4_t test_vuzp2_u16(uint16x4_t a, uint16x4_t b) {
- return vuzp2_u16(a, b);
-}
-
-// CHECK-LABEL: define dso_local <8 x i16> @test_vuzp2q_u16(
-// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
-// CHECK-NEXT: ret <8 x i16> [[SHUFFLE_I]]
-//
-uint16x8_t test_vuzp2q_u16(uint16x8_t a, uint16x8_t b) {
- return vuzp2q_u16(a, b);
-}
-
-// CHECK-LABEL: define dso_local <2 x i32> @test_vuzp2_u32(
-// CHECK-SAME: <2 x i32> noundef [[A:%.*]], <2 x i32> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[B]], <2 x i32> <i32 1, i32 3>
-// CHECK-NEXT: ret <2 x i32> [[SHUFFLE_I]]
-//
-uint32x2_t test_vuzp2_u32(uint32x2_t a, uint32x2_t b) {
- return vuzp2_u32(a, b);
-}
-
-// CHECK-LABEL: define dso_local <4 x i32> @test_vuzp2q_u32(
-// CHECK-SAME: <4 x i32> noundef [[A:%.*]], <4 x i32> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[B]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
-// CHECK-NEXT: ret <4 x i32> [[SHUFFLE_I]]
-//
-uint32x4_t test_vuzp2q_u32(uint32x4_t a, uint32x4_t b) {
- return vuzp2q_u32(a, b);
-}
-
-// CHECK-LABEL: define dso_local <2 x i64> @test_vuzp2q_u64(
-// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> [[A]], <2 x i64> [[B]], <2 x i32> <i32 1, i32 3>
-// CHECK-NEXT: ret <2 x i64> [[SHUFFLE_I]]
-//
-uint64x2_t test_vuzp2q_u64(uint64x2_t a, uint64x2_t b) {
- return vuzp2q_u64(a, b);
-}
-
-// CHECK-LABEL: define dso_local <2 x float> @test_vuzp2_f32(
-// CHECK-SAME: <2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x float> [[A]], <2 x float> [[B]], <2 x i32> <i32 1, i32 3>
-// CHECK-NEXT: ret <2 x float> [[SHUFFLE_I]]
-//
-float32x2_t test_vuzp2_f32(float32x2_t a, float32x2_t b) {
- return vuzp2_f32(a, b);
-}
-
-// CHECK-LABEL: define dso_local <4 x float> @test_vuzp2q_f32(
-// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> [[A]], <4 x float> [[B]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
-// CHECK-NEXT: ret <4 x float> [[SHUFFLE_I]]
-//
-float32x4_t test_vuzp2q_f32(float32x4_t a, float32x4_t b) {
- return vuzp2q_f32(a, b);
-}
-
-// CHECK-LABEL: define dso_local <2 x double> @test_vuzp2q_f64(
-// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x double> [[A]], <2 x double> [[B]], <2 x i32> <i32 1, i32 3>
-// CHECK-NEXT: ret <2 x double> [[SHUFFLE_I]]
-//
-float64x2_t test_vuzp2q_f64(float64x2_t a, float64x2_t b) {
- return vuzp2q_f64(a, b);
-}
-
-// CHECK-LABEL: define dso_local <8 x i8> @test_vuzp2_p8(
-// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
-// CHECK-NEXT: ret <8 x i8> [[SHUFFLE_I]]
-//
-poly8x8_t test_vuzp2_p8(poly8x8_t a, poly8x8_t b) {
- return vuzp2_p8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <16 x i8> @test_vuzp2q_p8(
-// CHECK-SAME: <16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
-// CHECK-NEXT: ret <16 x i8> [[SHUFFLE_I]]
-//
-poly8x16_t test_vuzp2q_p8(poly8x16_t a, poly8x16_t b) {
- return vuzp2q_p8(a, b);
-}
-
-// CHECK-LABEL: define dso_local <4 x i16> @test_vuzp2_p16(
-// CHECK-SAME: <4 x i16> noundef [[A:%.*]], <4 x i16> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[B]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
-// CHECK-NEXT: ret <4 x i16> [[SHUFFLE_I]]
-//
-poly16x4_t test_vuzp2_p16(poly16x4_t a, poly16x4_t b) {
- return vuzp2_p16(a, b);
-}
-
-// CHECK-LABEL: define dso_local <8 x i16> @test_vuzp2q_p16(
-// CHECK-SAME: <8 x i16> noundef [[A:%.*]], <8 x i16> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
-// CHECK-NEXT: ret <8 x i16> [[SHUFFLE_I]]
-//
-poly16x8_t test_vuzp2q_p16(poly16x8_t a, poly16x8_t b) {
- return vuzp2q_p16(a, b);
-}
-
// CHECK-LABEL: define dso_local <8 x i8> @test_vtrn1_s8(
// CHECK-SAME: <8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
// CHECK-NEXT: [[ENTRY:.*:]]
diff --git a/clang/test/CodeGen/AArch64/neon/perm.c b/clang/test/CodeGen/AArch64/neon/perm.c
index 6173ce43d18c7..9d94c7d3fb774 100644
--- a/clang/test/CodeGen/AArch64/neon/perm.c
+++ b/clang/test/CodeGen/AArch64/neon/perm.c
@@ -921,3 +921,540 @@ mfloat8x16x2_t test_vzipq_mf8(mfloat8x16_t a, mfloat8x16_t b) {
// LLVM: ret %struct.mfloat8x16x2_t
return vzipq_mf8(a, b);
}
+
+//===------------------------------------------------------===//
+// 2.1.9.11. Unzip elements
+// https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#unzip-elements
+//===------------------------------------------------------===//
+
+// LLVM-LABEL: @test_vuzp1_s8(
+// CIR-LABEL: @vuzp1_s8(
+int8x8_t test_vuzp1_s8(int8x8_t a, int8x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !s8i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i, #cir.int<8> : !s64i, #cir.int<10> : !s64i, #cir.int<12> : !s64i, #cir.int<14> : !s64i] : !cir.vector<8 x !s8i>
+
+// LLVM-SAME: <8 x i8>{{.*}}[[A:%.*]], <8 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+// LLVM: ret <8 x i8> [[VUZP]]
+ return vuzp1_s8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_s8(
+// CIR-LABEL: @vuzp1q_s8(
+int8x16_t test_vuzp1q_s8(int8x16_t a, int8x16_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<16 x !s8i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i, #cir.int<8> : !s64i, #cir.int<10> : !s64i, #cir.int<12> : !s64i, #cir.int<14> : !s64i, #cir.int<16> : !s64i, #cir.int<18> : !s64i, #cir.int<20> : !s64i, #cir.int<22> : !s64i, #cir.int<24> : !s64i, #cir.int<26> : !s64i, #cir.int<28> : !s64i, #cir.int<30> : !s64i] : !cir.vector<16 x !s8i>
+
+// LLVM-SAME: <16 x i8>{{.*}}[[A:%.*]], <16 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
+// LLVM: ret <16 x i8> [[VUZP]]
+ return vuzp1q_s8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1_s16(
+// CIR-LABEL: @vuzp1_s16(
+int16x4_t test_vuzp1_s16(int16x4_t a, int16x4_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<4 x !s16i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i] : !cir.vector<4 x !s16i>
+
+// LLVM-SAME: <4 x i16>{{.*}}[[A:%.*]], <4 x i16>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[B]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+// LLVM: ret <4 x i16> [[VUZP]]
+ return vuzp1_s16(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_s16(
+// CIR-LABEL: @vuzp1q_s16(
+int16x8_t test_vuzp1q_s16(int16x8_t a, int16x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !s16i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i, #cir.int<8> : !s64i, #cir.int<10> : !s64i, #cir.int<12> : !s64i, #cir.int<14> : !s64i] : !cir.vector<8 x !s16i>
+
+// LLVM-SAME: <8 x i16>{{.*}}[[A:%.*]], <8 x i16>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+// LLVM: ret <8 x i16> [[VUZP]]
+ return vuzp1q_s16(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1_s32(
+// CIR-LABEL: @vuzp1_s32(
+int32x2_t test_vuzp1_s32(int32x2_t a, int32x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !s32i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i] : !cir.vector<2 x !s32i>
+
+// LLVM-SAME: <2 x i32>{{.*}}[[A:%.*]], <2 x i32>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[B]], <2 x i32> <i32 0, i32 2>
+// LLVM: ret <2 x i32> [[VUZP]]
+ return vuzp1_s32(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_s32(
+// CIR-LABEL: @vuzp1q_s32(
+int32x4_t test_vuzp1q_s32(int32x4_t a, int32x4_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<4 x !s32i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i] : !cir.vector<4 x !s32i>
+
+// LLVM-SAME: <4 x i32>{{.*}}[[A:%.*]], <4 x i32>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[B]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+// LLVM: ret <4 x i32> [[VUZP]]
+ return vuzp1q_s32(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_s64(
+// CIR-LABEL: @vuzp1q_s64(
+int64x2_t test_vuzp1q_s64(int64x2_t a, int64x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !s64i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i] : !cir.vector<2 x !s64i>
+
+// LLVM-SAME: <2 x i64>{{.*}}[[A:%.*]], <2 x i64>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x i64> [[A]], <2 x i64> [[B]], <2 x i32> <i32 0, i32 2>
+// LLVM: ret <2 x i64> [[VUZP]]
+ return vuzp1q_s64(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1_u8(
+// CIR-LABEL: @vuzp1_u8(
+uint8x8_t test_vuzp1_u8(uint8x8_t a, uint8x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !u8i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i, #cir.int<8> : !s64i, #cir.int<10> : !s64i, #cir.int<12> : !s64i, #cir.int<14> : !s64i] : !cir.vector<8 x !u8i>
+
+// LLVM-SAME: <8 x i8>{{.*}}[[A:%.*]], <8 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+// LLVM: ret <8 x i8> [[VUZP]]
+ return vuzp1_u8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_u8(
+// CIR-LABEL: @vuzp1q_u8(
+uint8x16_t test_vuzp1q_u8(uint8x16_t a, uint8x16_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<16 x !u8i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i, #cir.int<8> : !s64i, #cir.int<10> : !s64i, #cir.int<12> : !s64i, #cir.int<14> : !s64i, #cir.int<16> : !s64i, #cir.int<18> : !s64i, #cir.int<20> : !s64i, #cir.int<22> : !s64i, #cir.int<24> : !s64i, #cir.int<26> : !s64i, #cir.int<28> : !s64i, #cir.int<30> : !s64i] : !cir.vector<16 x !u8i>
+
+// LLVM-SAME: <16 x i8>{{.*}}[[A:%.*]], <16 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
+// LLVM: ret <16 x i8> [[VUZP]]
+ return vuzp1q_u8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1_u16(
+// CIR-LABEL: @vuzp1_u16(
+uint16x4_t test_vuzp1_u16(uint16x4_t a, uint16x4_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<4 x !u16i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i] : !cir.vector<4 x !u16i>
+
+// LLVM-SAME: <4 x i16>{{.*}}[[A:%.*]], <4 x i16>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[B]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+// LLVM: ret <4 x i16> [[VUZP]]
+ return vuzp1_u16(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_u16(
+// CIR-LABEL: @vuzp1q_u16(
+uint16x8_t test_vuzp1q_u16(uint16x8_t a, uint16x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !u16i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i, #cir.int<8> : !s64i, #cir.int<10> : !s64i, #cir.int<12> : !s64i, #cir.int<14> : !s64i] : !cir.vector<8 x !u16i>
+
+// LLVM-SAME: <8 x i16>{{.*}}[[A:%.*]], <8 x i16>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+// LLVM: ret <8 x i16> [[VUZP]]
+ return vuzp1q_u16(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1_u32(
+// CIR-LABEL: @vuzp1_u32(
+uint32x2_t test_vuzp1_u32(uint32x2_t a, uint32x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !u32i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i] : !cir.vector<2 x !u32i>
+
+// LLVM-SAME: <2 x i32>{{.*}}[[A:%.*]], <2 x i32>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[B]], <2 x i32> <i32 0, i32 2>
+// LLVM: ret <2 x i32> [[VUZP]]
+ return vuzp1_u32(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_u32(
+// CIR-LABEL: @vuzp1q_u32(
+uint32x4_t test_vuzp1q_u32(uint32x4_t a, uint32x4_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<4 x !u32i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i] : !cir.vector<4 x !u32i>
+
+// LLVM-SAME: <4 x i32>{{.*}}[[A:%.*]], <4 x i32>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[B]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+// LLVM: ret <4 x i32> [[VUZP]]
+ return vuzp1q_u32(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_u64(
+// CIR-LABEL: @vuzp1q_u64(
+uint64x2_t test_vuzp1q_u64(uint64x2_t a, uint64x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !u64i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i] : !cir.vector<2 x !u64i>
+
+// LLVM-SAME: <2 x i64>{{.*}}[[A:%.*]], <2 x i64>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x i64> [[A]], <2 x i64> [[B]], <2 x i32> <i32 0, i32 2>
+// LLVM: ret <2 x i64> [[VUZP]]
+ return vuzp1q_u64(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_p64(
+// CIR-LABEL: @vuzp1q_p64(
+poly64x2_t test_vuzp1q_p64(poly64x2_t a, poly64x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !u64i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i] : !cir.vector<2 x !u64i>
+
+// LLVM-SAME: <2 x i64>{{.*}}[[A:%.*]], <2 x i64>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x i64> [[A]], <2 x i64> [[B]], <2 x i32> <i32 0, i32 2>
+// LLVM: ret <2 x i64> [[VUZP]]
+ return vuzp1q_p64(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1_f32(
+// CIR-LABEL: @vuzp1_f32(
+float32x2_t test_vuzp1_f32(float32x2_t a, float32x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !cir.float>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i] : !cir.vector<2 x !cir.float>
+
+// LLVM-SAME: <2 x float>{{.*}}[[A:%.*]], <2 x float>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x float> [[A]], <2 x float> [[B]], <2 x i32> <i32 0, i32 2>
+// LLVM: ret <2 x float> [[VUZP]]
+ return vuzp1_f32(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_f32(
+// CIR-LABEL: @vuzp1q_f32(
+float32x4_t test_vuzp1q_f32(float32x4_t a, float32x4_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<4 x !cir.float>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i] : !cir.vector<4 x !cir.float>
+
+// LLVM-SAME: <4 x float>{{.*}}[[A:%.*]], <4 x float>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <4 x float> [[A]], <4 x float> [[B]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+// LLVM: ret <4 x float> [[VUZP]]
+ return vuzp1q_f32(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_f64(
+// CIR-LABEL: @vuzp1q_f64(
+float64x2_t test_vuzp1q_f64(float64x2_t a, float64x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !cir.double>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i] : !cir.vector<2 x !cir.double>
+
+// LLVM-SAME: <2 x double>{{.*}}[[A:%.*]], <2 x double>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x double> [[A]], <2 x double> [[B]], <2 x i32> <i32 0, i32 2>
+// LLVM: ret <2 x double> [[VUZP]]
+ return vuzp1q_f64(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1_p8(
+// CIR-LABEL: @vuzp1_p8(
+poly8x8_t test_vuzp1_p8(poly8x8_t a, poly8x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !u8i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i, #cir.int<8> : !s64i, #cir.int<10> : !s64i, #cir.int<12> : !s64i, #cir.int<14> : !s64i] : !cir.vector<8 x !u8i>
+
+// LLVM-SAME: <8 x i8>{{.*}}[[A:%.*]], <8 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+// LLVM: ret <8 x i8> [[VUZP]]
+ return vuzp1_p8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_p8(
+// CIR-LABEL: @vuzp1q_p8(
+poly8x16_t test_vuzp1q_p8(poly8x16_t a, poly8x16_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<16 x !u8i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i, #cir.int<8> : !s64i, #cir.int<10> : !s64i, #cir.int<12> : !s64i, #cir.int<14> : !s64i, #cir.int<16> : !s64i, #cir.int<18> : !s64i, #cir.int<20> : !s64i, #cir.int<22> : !s64i, #cir.int<24> : !s64i, #cir.int<26> : !s64i, #cir.int<28> : !s64i, #cir.int<30> : !s64i] : !cir.vector<16 x !u8i>
+
+// LLVM-SAME: <16 x i8>{{.*}}[[A:%.*]], <16 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
+// LLVM: ret <16 x i8> [[VUZP]]
+ return vuzp1q_p8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1_p16(
+// CIR-LABEL: @vuzp1_p16(
+poly16x4_t test_vuzp1_p16(poly16x4_t a, poly16x4_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<4 x !u16i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i] : !cir.vector<4 x !u16i>
+
+// LLVM-SAME: <4 x i16>{{.*}}[[A:%.*]], <4 x i16>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[B]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+// LLVM: ret <4 x i16> [[VUZP]]
+ return vuzp1_p16(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_p16(
+// CIR-LABEL: @vuzp1q_p16(
+poly16x8_t test_vuzp1q_p16(poly16x8_t a, poly16x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !u16i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i, #cir.int<8> : !s64i, #cir.int<10> : !s64i, #cir.int<12> : !s64i, #cir.int<14> : !s64i] : !cir.vector<8 x !u16i>
+
+// LLVM-SAME: <8 x i16>{{.*}}[[A:%.*]], <8 x i16>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+// LLVM: ret <8 x i16> [[VUZP]]
+ return vuzp1q_p16(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1_mf8(
+// CIR-LABEL: @vuzp1_mf8(
+mfloat8x8_t test_vuzp1_mf8(mfloat8x8_t a, mfloat8x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !u8i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i, #cir.int<8> : !s64i, #cir.int<10> : !s64i, #cir.int<12> : !s64i, #cir.int<14> : !s64i] : !cir.vector<8 x !u8i>
+
+// LLVM-SAME: <8 x i8>{{.*}}[[A:%.*]], <8 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+// LLVM: ret <8 x i8> [[VUZP]]
+ return vuzp1_mf8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp1q_mf8(
+// CIR-LABEL: @vuzp1q_mf8(
+mfloat8x16_t test_vuzp1q_mf8(mfloat8x16_t a, mfloat8x16_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<16 x !u8i>) [#cir.int<0> : !s64i, #cir.int<2> : !s64i, #cir.int<4> : !s64i, #cir.int<6> : !s64i, #cir.int<8> : !s64i, #cir.int<10> : !s64i, #cir.int<12> : !s64i, #cir.int<14> : !s64i, #cir.int<16> : !s64i, #cir.int<18> : !s64i, #cir.int<20> : !s64i, #cir.int<22> : !s64i, #cir.int<24> : !s64i, #cir.int<26> : !s64i, #cir.int<28> : !s64i, #cir.int<30> : !s64i] : !cir.vector<16 x !u8i>
+
+// LLVM-SAME: <16 x i8>{{.*}}[[A:%.*]], <16 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
+// LLVM: ret <16 x i8> [[VUZP]]
+ return vuzp1q_mf8(a, b);
+}
+
+//===------------------------------------------------------===//
+// vuzp2
+//===------------------------------------------------------===//
+
+// LLVM-LABEL: @test_vuzp2_s8(
+// CIR-LABEL: @vuzp2_s8(
+int8x8_t test_vuzp2_s8(int8x8_t a, int8x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !s8i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i, #cir.int<9> : !s64i, #cir.int<11> : !s64i, #cir.int<13> : !s64i, #cir.int<15> : !s64i] : !cir.vector<8 x !s8i>
+
+// LLVM-SAME: <8 x i8>{{.*}}[[A:%.*]], <8 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
+// LLVM: ret <8 x i8> [[VUZP]]
+ return vuzp2_s8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_s8(
+// CIR-LABEL: @vuzp2q_s8(
+int8x16_t test_vuzp2q_s8(int8x16_t a, int8x16_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<16 x !s8i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i, #cir.int<9> : !s64i, #cir.int<11> : !s64i, #cir.int<13> : !s64i, #cir.int<15> : !s64i, #cir.int<17> : !s64i, #cir.int<19> : !s64i, #cir.int<21> : !s64i, #cir.int<23> : !s64i, #cir.int<25> : !s64i, #cir.int<27> : !s64i, #cir.int<29> : !s64i, #cir.int<31> : !s64i] : !cir.vector<16 x !s8i>
+
+// LLVM-SAME: <16 x i8>{{.*}}[[A:%.*]], <16 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
+// LLVM: ret <16 x i8> [[VUZP]]
+ return vuzp2q_s8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2_s16(
+// CIR-LABEL: @vuzp2_s16(
+int16x4_t test_vuzp2_s16(int16x4_t a, int16x4_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<4 x !s16i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i] : !cir.vector<4 x !s16i>
+
+// LLVM-SAME: <4 x i16>{{.*}}[[A:%.*]], <4 x i16>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[B]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+// LLVM: ret <4 x i16> [[VUZP]]
+ return vuzp2_s16(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_s16(
+// CIR-LABEL: @vuzp2q_s16(
+int16x8_t test_vuzp2q_s16(int16x8_t a, int16x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !s16i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i, #cir.int<9> : !s64i, #cir.int<11> : !s64i, #cir.int<13> : !s64i, #cir.int<15> : !s64i] : !cir.vector<8 x !s16i>
+
+// LLVM-SAME: <8 x i16>{{.*}}[[A:%.*]], <8 x i16>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
+// LLVM: ret <8 x i16> [[VUZP]]
+ return vuzp2q_s16(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2_s32(
+// CIR-LABEL: @vuzp2_s32(
+int32x2_t test_vuzp2_s32(int32x2_t a, int32x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !s32i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i] : !cir.vector<2 x !s32i>
+
+// LLVM-SAME: <2 x i32>{{.*}}[[A:%.*]], <2 x i32>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[B]], <2 x i32> <i32 1, i32 3>
+// LLVM: ret <2 x i32> [[VUZP]]
+ return vuzp2_s32(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_s32(
+// CIR-LABEL: @vuzp2q_s32(
+int32x4_t test_vuzp2q_s32(int32x4_t a, int32x4_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<4 x !s32i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i] : !cir.vector<4 x !s32i>
+
+// LLVM-SAME: <4 x i32>{{.*}}[[A:%.*]], <4 x i32>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[B]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+// LLVM: ret <4 x i32> [[VUZP]]
+ return vuzp2q_s32(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_s64(
+// CIR-LABEL: @vuzp2q_s64(
+int64x2_t test_vuzp2q_s64(int64x2_t a, int64x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !s64i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i] : !cir.vector<2 x !s64i>
+
+// LLVM-SAME: <2 x i64>{{.*}}[[A:%.*]], <2 x i64>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x i64> [[A]], <2 x i64> [[B]], <2 x i32> <i32 1, i32 3>
+// LLVM: ret <2 x i64> [[VUZP]]
+ return vuzp2q_s64(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2_u8(
+// CIR-LABEL: @vuzp2_u8(
+uint8x8_t test_vuzp2_u8(uint8x8_t a, uint8x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !u8i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i, #cir.int<9> : !s64i, #cir.int<11> : !s64i, #cir.int<13> : !s64i, #cir.int<15> : !s64i] : !cir.vector<8 x !u8i>
+
+// LLVM-SAME: <8 x i8>{{.*}}[[A:%.*]], <8 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
+// LLVM: ret <8 x i8> [[VUZP]]
+ return vuzp2_u8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_u8(
+// CIR-LABEL: @vuzp2q_u8(
+uint8x16_t test_vuzp2q_u8(uint8x16_t a, uint8x16_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<16 x !u8i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i, #cir.int<9> : !s64i, #cir.int<11> : !s64i, #cir.int<13> : !s64i, #cir.int<15> : !s64i, #cir.int<17> : !s64i, #cir.int<19> : !s64i, #cir.int<21> : !s64i, #cir.int<23> : !s64i, #cir.int<25> : !s64i, #cir.int<27> : !s64i, #cir.int<29> : !s64i, #cir.int<31> : !s64i] : !cir.vector<16 x !u8i>
+
+// LLVM-SAME: <16 x i8>{{.*}}[[A:%.*]], <16 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
+// LLVM: ret <16 x i8> [[VUZP]]
+ return vuzp2q_u8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2_u16(
+// CIR-LABEL: @vuzp2_u16(
+uint16x4_t test_vuzp2_u16(uint16x4_t a, uint16x4_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<4 x !u16i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i] : !cir.vector<4 x !u16i>
+
+// LLVM-SAME: <4 x i16>{{.*}}[[A:%.*]], <4 x i16>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[B]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+// LLVM: ret <4 x i16> [[VUZP]]
+ return vuzp2_u16(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_u16(
+// CIR-LABEL: @vuzp2q_u16(
+uint16x8_t test_vuzp2q_u16(uint16x8_t a, uint16x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !u16i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i, #cir.int<9> : !s64i, #cir.int<11> : !s64i, #cir.int<13> : !s64i, #cir.int<15> : !s64i] : !cir.vector<8 x !u16i>
+
+// LLVM-SAME: <8 x i16>{{.*}}[[A:%.*]], <8 x i16>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
+// LLVM: ret <8 x i16> [[VUZP]]
+ return vuzp2q_u16(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2_u32(
+// CIR-LABEL: @vuzp2_u32(
+uint32x2_t test_vuzp2_u32(uint32x2_t a, uint32x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !u32i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i] : !cir.vector<2 x !u32i>
+
+// LLVM-SAME: <2 x i32>{{.*}}[[A:%.*]], <2 x i32>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> [[B]], <2 x i32> <i32 1, i32 3>
+// LLVM: ret <2 x i32> [[VUZP]]
+ return vuzp2_u32(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_u32(
+// CIR-LABEL: @vuzp2q_u32(
+uint32x4_t test_vuzp2q_u32(uint32x4_t a, uint32x4_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<4 x !u32i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i] : !cir.vector<4 x !u32i>
+
+// LLVM-SAME: <4 x i32>{{.*}}[[A:%.*]], <4 x i32>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <4 x i32> [[A]], <4 x i32> [[B]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+// LLVM: ret <4 x i32> [[VUZP]]
+ return vuzp2q_u32(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_u64(
+// CIR-LABEL: @vuzp2q_u64(
+uint64x2_t test_vuzp2q_u64(uint64x2_t a, uint64x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !u64i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i] : !cir.vector<2 x !u64i>
+
+// LLVM-SAME: <2 x i64>{{.*}}[[A:%.*]], <2 x i64>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x i64> [[A]], <2 x i64> [[B]], <2 x i32> <i32 1, i32 3>
+// LLVM: ret <2 x i64> [[VUZP]]
+ return vuzp2q_u64(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_p64(
+// CIR-LABEL: @vuzp2q_p64(
+poly64x2_t test_vuzp2q_p64(poly64x2_t a, poly64x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !u64i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i] : !cir.vector<2 x !u64i>
+
+// LLVM-SAME: <2 x i64>{{.*}}[[A:%.*]], <2 x i64>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x i64> [[A]], <2 x i64> [[B]], <2 x i32> <i32 1, i32 3>
+// LLVM: ret <2 x i64> [[VUZP]]
+ return vuzp2q_p64(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2_f32(
+// CIR-LABEL: @vuzp2_f32(
+float32x2_t test_vuzp2_f32(float32x2_t a, float32x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !cir.float>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i] : !cir.vector<2 x !cir.float>
+
+// LLVM-SAME: <2 x float>{{.*}}[[A:%.*]], <2 x float>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x float> [[A]], <2 x float> [[B]], <2 x i32> <i32 1, i32 3>
+// LLVM: ret <2 x float> [[VUZP]]
+ return vuzp2_f32(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_f32(
+// CIR-LABEL: @vuzp2q_f32(
+float32x4_t test_vuzp2q_f32(float32x4_t a, float32x4_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<4 x !cir.float>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i] : !cir.vector<4 x !cir.float>
+
+// LLVM-SAME: <4 x float>{{.*}}[[A:%.*]], <4 x float>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <4 x float> [[A]], <4 x float> [[B]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+// LLVM: ret <4 x float> [[VUZP]]
+ return vuzp2q_f32(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_f64(
+// CIR-LABEL: @vuzp2q_f64(
+float64x2_t test_vuzp2q_f64(float64x2_t a, float64x2_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !cir.double>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i] : !cir.vector<2 x !cir.double>
+
+// LLVM-SAME: <2 x double>{{.*}}[[A:%.*]], <2 x double>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <2 x double> [[A]], <2 x double> [[B]], <2 x i32> <i32 1, i32 3>
+// LLVM: ret <2 x double> [[VUZP]]
+ return vuzp2q_f64(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2_p8(
+// CIR-LABEL: @vuzp2_p8(
+poly8x8_t test_vuzp2_p8(poly8x8_t a, poly8x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !u8i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i, #cir.int<9> : !s64i, #cir.int<11> : !s64i, #cir.int<13> : !s64i, #cir.int<15> : !s64i] : !cir.vector<8 x !u8i>
+
+// LLVM-SAME: <8 x i8>{{.*}}[[A:%.*]], <8 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
+// LLVM: ret <8 x i8> [[VUZP]]
+ return vuzp2_p8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_p8(
+// CIR-LABEL: @vuzp2q_p8(
+poly8x16_t test_vuzp2q_p8(poly8x16_t a, poly8x16_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<16 x !u8i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i, #cir.int<9> : !s64i, #cir.int<11> : !s64i, #cir.int<13> : !s64i, #cir.int<15> : !s64i, #cir.int<17> : !s64i, #cir.int<19> : !s64i, #cir.int<21> : !s64i, #cir.int<23> : !s64i, #cir.int<25> : !s64i, #cir.int<27> : !s64i, #cir.int<29> : !s64i, #cir.int<31> : !s64i] : !cir.vector<16 x !u8i>
+
+// LLVM-SAME: <16 x i8>{{.*}}[[A:%.*]], <16 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
+// LLVM: ret <16 x i8> [[VUZP]]
+ return vuzp2q_p8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2_p16(
+// CIR-LABEL: @vuzp2_p16(
+poly16x4_t test_vuzp2_p16(poly16x4_t a, poly16x4_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<4 x !u16i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i] : !cir.vector<4 x !u16i>
+
+// LLVM-SAME: <4 x i16>{{.*}}[[A:%.*]], <4 x i16>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <4 x i16> [[A]], <4 x i16> [[B]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+// LLVM: ret <4 x i16> [[VUZP]]
+ return vuzp2_p16(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_p16(
+// CIR-LABEL: @vuzp2q_p16(
+poly16x8_t test_vuzp2q_p16(poly16x8_t a, poly16x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !u16i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i, #cir.int<9> : !s64i, #cir.int<11> : !s64i, #cir.int<13> : !s64i, #cir.int<15> : !s64i] : !cir.vector<8 x !u16i>
+
+// LLVM-SAME: <8 x i16>{{.*}}[[A:%.*]], <8 x i16>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
+// LLVM: ret <8 x i16> [[VUZP]]
+ return vuzp2q_p16(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2_mf8(
+// CIR-LABEL: @vuzp2_mf8(
+mfloat8x8_t test_vuzp2_mf8(mfloat8x8_t a, mfloat8x8_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !u8i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i, #cir.int<9> : !s64i, #cir.int<11> : !s64i, #cir.int<13> : !s64i, #cir.int<15> : !s64i] : !cir.vector<8 x !u8i>
+
+// LLVM-SAME: <8 x i8>{{.*}}[[A:%.*]], <8 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
+// LLVM: ret <8 x i8> [[VUZP]]
+ return vuzp2_mf8(a, b);
+}
+
+// LLVM-LABEL: @test_vuzp2q_mf8(
+// CIR-LABEL: @vuzp2q_mf8(
+mfloat8x16_t test_vuzp2q_mf8(mfloat8x16_t a, mfloat8x16_t b) {
+// CIR: cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<16 x !u8i>) [#cir.int<1> : !s64i, #cir.int<3> : !s64i, #cir.int<5> : !s64i, #cir.int<7> : !s64i, #cir.int<9> : !s64i, #cir.int<11> : !s64i, #cir.int<13> : !s64i, #cir.int<15> : !s64i, #cir.int<17> : !s64i, #cir.int<19> : !s64i, #cir.int<21> : !s64i, #cir.int<23> : !s64i, #cir.int<25> : !s64i, #cir.int<27> : !s64i, #cir.int<29> : !s64i, #cir.int<31> : !s64i] : !cir.vector<16 x !u8i>
+
+// LLVM-SAME: <16 x i8>{{.*}}[[A:%.*]], <16 x i8>{{.*}}[[B:%.*]])
+// LLVM: [[VUZP:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> [[B]], <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
+// LLVM: ret <16 x i8> [[VUZP]]
+ return vuzp2q_mf8(a, b);
+}
diff --git a/clang/test/CodeGen/AArch64/poly64.c b/clang/test/CodeGen/AArch64/poly64.c
index 5e808f07a6f56..1a7eceefa6a58 100644
--- a/clang/test/CodeGen/AArch64/poly64.c
+++ b/clang/test/CodeGen/AArch64/poly64.c
@@ -515,26 +515,6 @@ poly64x2_t test_vextq_p64(poly64x2_t a, poly64x2_t b) {
return vextq_p64(a, b, 1);
}
-// CHECK-LABEL: define dso_local <2 x i64> @test_vuzp1q_p64(
-// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> [[A]], <2 x i64> [[B]], <2 x i32> <i32 0, i32 2>
-// CHECK-NEXT: ret <2 x i64> [[SHUFFLE_I]]
-//
-poly64x2_t test_vuzp1q_p64(poly64x2_t a, poly64x2_t b) {
- return vuzp1q_p64(a, b);
-}
-
-// CHECK-LABEL: define dso_local <2 x i64> @test_vuzp2q_p64(
-// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> [[A]], <2 x i64> [[B]], <2 x i32> <i32 1, i32 3>
-// CHECK-NEXT: ret <2 x i64> [[SHUFFLE_I]]
-//
-poly64x2_t test_vuzp2q_p64(poly64x2_t a, poly64x2_t b) {
- return vuzp2q_u64(a, b);
-}
-
// CHECK-LABEL: define dso_local <2 x i64> @test_vtrn1q_p64(
// CHECK-SAME: <2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR0]] {
// CHECK-NEXT: [[ENTRY:.*:]]
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