[clang] [CIR][RISCV] Support zbkb builtin codegen (PR #195401)

[Henrich Lauko via cfe-commits]

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@@ -0,0 +1,62 @@
+// RUN: %clang_cc1 -triple riscv32 -target-feature +zbkb -fclangir -emit-cir %s -o - | FileCheck %s --check-prefixes=CIR,CIR32
+// RUN: %clang_cc1 -triple riscv64 -target-feature +zbkb -fclangir -emit-cir %s -o - | FileCheck %s --check-prefixes=CIR,CIR64
+// RUN: %clang_cc1 -triple riscv32 -target-feature +zbkb -fclangir -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM,LLVM32
+// RUN: %clang_cc1 -triple riscv64 -target-feature +zbkb -fclangir -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM,LLVM64
+// RUN: %clang_cc1 -triple riscv32 -target-feature +zbkb -emit-llvm %s -o - | FileCheck %s --check-prefixes=OGCG,OGCG32
+// RUN: %clang_cc1 -triple riscv64 -target-feature +zbkb -emit-llvm %s -o - | FileCheck %s --check-prefixes=OGCG,OGCG64
+
+// CIR-LABEL: cir.func{{.*}} @test_builtin_brev8_32(
+// CIR: {{%.*}} = cir.call_llvm_intrinsic "riscv.brev8" {{%.*}} : (!u32i) -> !u32i
+// CIR: cir.return
+// LLVM-LABEL: @test_builtin_brev8_32(
+// LLVM: call i32 @llvm.riscv.brev8.i32(i32 {{%.*}})
+// LLVM: ret i32
+// OGCG-LABEL: @test_builtin_brev8_32(
+// OGCG: call i32 @llvm.riscv.brev8.i32(i32 {{%.*}})
+// OGCG: ret i32
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xlauko wrote:

you can merge LLVM and OGCG since they are the same, also in other places

https://github.com/llvm/llvm-project/pull/195401