[clang] [llvm] [AArch64] Add intrinsic support for Fdot instr. (PR #189987)

Jonathan Thackray via cfe-commits cfe-commits at lists.llvm.org
Fri May 1 04:36:46 PDT 2026


================
@@ -7154,6 +7154,34 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
     return EmitFP8NeonFDOTCall(Intrinsic::aarch64_neon_fp8_fdot4_lane,
                                ExtendLaneArg, FloatTy, Ops, E, "fdot4_lane");
 
+  case NEON::BI__builtin_neon_vdot_f32:
+  case NEON::BI__builtin_neon_vdotq_f32: {
+    llvm::Type *InputTy =
+        llvm::FixedVectorType::get(HalfTy, Ty->getPrimitiveSizeInBits() / 16);
+    llvm::Type *Tys[2] = {Ty, InputTy};
+    return EmitNeonCall(CGM.getIntrinsic(Intrinsic::aarch64_neon_fdot, Tys),
+                        Ops, "vdot");
+  }
+
+  case NEON::BI__builtin_neon_vdot_lane_f32:
+  case NEON::BI__builtin_neon_vdot_laneq_f32:
+  case NEON::BI__builtin_neon_vdotq_lane_f32:
+  case NEON::BI__builtin_neon_vdotq_laneq_f32: {
+    llvm::FixedVectorType *InputTy =
+        llvm::FixedVectorType::get(HalfTy, Ty->getPrimitiveSizeInBits() / 16);
+    llvm::FixedVectorType *LaneTy = llvm::FixedVectorType::get(
+        HalfTy, Ops[2]->getType()->getPrimitiveSizeInBits() / 16);
+    // Treat the lane argument as a splat and use non-lane version of the
+    // intrinsic.
+    Ops[2] = Builder.CreateBitCast(Ops[2], LaneTy);
+    Ops[2] = EmitNeonSplat(Ops[2], cast<ConstantInt>(Ops[3]),
----------------
jthackray wrote:

Might be wrong, but are we splatting the correct lane here?

https://github.com/llvm/llvm-project/pull/189987


More information about the cfe-commits mailing list