[clang] [llvm] [mlir] MCContext/TargetMachine: Take MCRegisterInfo and MCSubtargetInfo by reference. NFC (PR #195032)
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cfe-commits at lists.llvm.org
Thu Apr 30 00:59:49 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-hexagon
Author: Fangrui Song (MaskRay)
<details>
<summary>Changes</summary>
Both MCRegisterInfo and MCSubtargetInfo are non-null at every callsite
that matters (only nullable in unit tests like
`llvm/unittests/CodeGen/MFCommon.inc`), mirroring the recent `const
MCAsmInfo &` cleanup.
* TargetMachine::getMCRegisterInfo and getMCSubtargetInfo return
references.
* MCContext's constructor takes const MCRegisterInfo & and
const MCSubtargetInfo &.
---
Patch is 61.92 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/195032.diff
69 Files Affected:
- (modified) bolt/include/bolt/Core/BinaryContext.h (+1-2)
- (modified) bolt/lib/Core/BinaryContext.cpp (+1-1)
- (modified) clang/lib/Parse/ParseStmtAsm.cpp (+1-1)
- (modified) clang/tools/driver/cc1_main.cpp (+4-4)
- (modified) clang/tools/driver/cc1as_main.cpp (+1-1)
- (modified) llvm/include/llvm/MC/MCContext.h (+2-2)
- (modified) llvm/include/llvm/Target/TargetMachine.h (+2-2)
- (modified) llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (+4-4)
- (modified) llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp (+1-1)
- (modified) llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp (+4-4)
- (modified) llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp (+1-1)
- (modified) llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp (+1-1)
- (modified) llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h (+2-2)
- (modified) llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp (+1-2)
- (modified) llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp (+1-2)
- (modified) llvm/lib/MC/MCContext.cpp (+2-2)
- (modified) llvm/lib/MC/MCDisassembler/Disassembler.cpp (+1-2)
- (modified) llvm/lib/Object/ModuleSymbolTable.cpp (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp (+1-1)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp (+1-1)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp (+2-2)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (+2-2)
- (modified) llvm/lib/Target/ARM/ARMTargetObjectFile.cpp (+1-1)
- (modified) llvm/lib/Target/AVR/AVRAsmPrinter.cpp (+1-1)
- (modified) llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp (+1-1)
- (modified) llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp (+1-1)
- (modified) llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h (+2-1)
- (modified) llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp (+3-3)
- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+2-3)
- (modified) llvm/lib/Target/Sparc/SparcSubtarget.cpp (+1-1)
- (modified) llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp (+6-6)
- (modified) llvm/lib/Target/X86/X86MCInstLower.cpp (+1-1)
- (modified) llvm/lib/Target/Xtensa/XtensaAsmPrinter.h (+2-1)
- (modified) llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp (+2-2)
- (modified) llvm/tools/llvm-exegesis/lib/Assembler.cpp (+1-1)
- (modified) llvm/tools/llvm-exegesis/lib/DisassemblerHelper.cpp (+2-2)
- (modified) llvm/tools/llvm-exegesis/lib/LlvmState.cpp (+1-1)
- (modified) llvm/tools/llvm-exegesis/lib/LlvmState.h (+2-2)
- (modified) llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp (+1-1)
- (modified) llvm/tools/llvm-exegesis/lib/SnippetFile.cpp (+2-2)
- (modified) llvm/tools/llvm-jitlink/llvm-jitlink.cpp (+1-2)
- (modified) llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp (+1-1)
- (modified) llvm/tools/llvm-mc/llvm-mc.cpp (+1-1)
- (modified) llvm/tools/llvm-mca/llvm-mca.cpp (+2-2)
- (modified) llvm/tools/llvm-ml/Disassembler.cpp (+1-1)
- (modified) llvm/tools/llvm-ml/llvm-ml.cpp (+1-1)
- (modified) llvm/tools/llvm-objdump/MachODump.cpp (+3-3)
- (modified) llvm/tools/llvm-objdump/llvm-objdump.cpp (+2-2)
- (modified) llvm/tools/llvm-profgen/ProfiledBinary.cpp (+1-1)
- (modified) llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp (+1-1)
- (modified) llvm/tools/sancov/sancov.cpp (+1-1)
- (modified) llvm/unittests/CodeGen/MFCommon.inc (+8-2)
- (modified) llvm/unittests/CodeGen/MachineInstrTest.cpp (+5-2)
- (modified) llvm/unittests/CodeGen/MachineOperandTest.cpp (+4-1)
- (modified) llvm/unittests/DebugInfo/DWARF/DWARFExpressionCopyBytesTest.cpp (+1-2)
- (modified) llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp (+1-1)
- (modified) llvm/unittests/MC/AMDGPU/Disassembler.cpp (+2-2)
- (modified) llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp (+10-10)
- (modified) llvm/unittests/MC/DwarfDebugFrameCIE.cpp (+1-2)
- (modified) llvm/unittests/MC/DwarfLineTableHeaders.cpp (+1-2)
- (modified) llvm/unittests/MC/DwarfLineTables.cpp (+4-2)
- (modified) llvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp (+1-1)
- (modified) llvm/unittests/MC/SystemZ/SystemZMCDisassemblerTest.cpp (+1-1)
- (modified) llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp (+1-1)
- (modified) llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp (+1-1)
- (modified) llvm/unittests/Target/AArch64/AArch64SVESchedPseudoTest.cpp (+5-5)
- (modified) llvm/unittests/tools/llvm-mca/MCATestBase.cpp (+1-1)
- (modified) mlir/lib/Target/LLVM/ROCDL/Target.cpp (+1-1)
- (modified) mlir/lib/Target/LLVMIR/Transforms/TargetToTargetFeatures.cpp (+2-2)
``````````diff
diff --git a/bolt/include/bolt/Core/BinaryContext.h b/bolt/include/bolt/Core/BinaryContext.h
index 23e86fac58798..4489bbb7bee52 100644
--- a/bolt/include/bolt/Core/BinaryContext.h
+++ b/bolt/include/bolt/Core/BinaryContext.h
@@ -1545,8 +1545,7 @@ class BinaryContext {
/// won't be used in the main code emitter.
IndependentCodeEmitter createIndependentMCCodeEmitter() const {
IndependentCodeEmitter MCEInstance;
- MCEInstance.LocalCtx.reset(
- new MCContext(*TheTriple, *AsmInfo, MRI.get(), STI.get()));
+ MCEInstance.LocalCtx.reset(new MCContext(*TheTriple, *AsmInfo, *MRI, *STI));
MCEInstance.LocalMOFI.reset(
TheTarget->createMCObjectFileInfo(*MCEInstance.LocalCtx,
/*PIC=*/!HasFixedLoadAddress));
diff --git a/bolt/lib/Core/BinaryContext.cpp b/bolt/lib/Core/BinaryContext.cpp
index 9172f4e5be7fa..6230a5e6265e9 100644
--- a/bolt/lib/Core/BinaryContext.cpp
+++ b/bolt/lib/Core/BinaryContext.cpp
@@ -255,7 +255,7 @@ Expected<std::unique_ptr<BinaryContext>> BinaryContext::createBinaryContext(
Twine("BOLT-ERROR: no instruction info for target ", TripleName));
std::unique_ptr<MCContext> Ctx(
- new MCContext(TheTriple, *AsmInfo, MRI.get(), STI.get()));
+ new MCContext(TheTriple, *AsmInfo, *MRI, *STI));
std::unique_ptr<MCObjectFileInfo> MOFI(
TheTarget->createMCObjectFileInfo(*Ctx, IsPIC));
Ctx->setObjectFileInfo(MOFI.get());
diff --git a/clang/lib/Parse/ParseStmtAsm.cpp b/clang/lib/Parse/ParseStmtAsm.cpp
index b6a757a7817ec..e708efe988566 100644
--- a/clang/lib/Parse/ParseStmtAsm.cpp
+++ b/clang/lib/Parse/ParseStmtAsm.cpp
@@ -566,7 +566,7 @@ StmtResult Parser::ParseMicrosoftAsmStatement(SourceLocation AsmLoc) {
}
llvm::SourceMgr TempSrcMgr;
- llvm::MCContext Ctx(TheTriple, *MAI, MRI.get(), STI.get(), &TempSrcMgr);
+ llvm::MCContext Ctx(TheTriple, *MAI, *MRI, *STI, &TempSrcMgr);
std::unique_ptr<llvm::MCObjectFileInfo> MOFI(
TheTarget->createMCObjectFileInfo(Ctx, /*PIC=*/false));
Ctx.setObjectFileInfo(MOFI.get());
diff --git a/clang/tools/driver/cc1_main.cpp b/clang/tools/driver/cc1_main.cpp
index 35405044d8d37..9e2e3f9c645e9 100644
--- a/clang/tools/driver/cc1_main.cpp
+++ b/clang/tools/driver/cc1_main.cpp
@@ -144,9 +144,9 @@ static int PrintSupportedExtensions(std::string TargetStr) {
std::unique_ptr<llvm::TargetMachine> TheTargetMachine(
TheTarget->createTargetMachine(Triple, "", "", Options, std::nullopt));
const llvm::Triple &MachineTriple = TheTargetMachine->getTargetTriple();
- const llvm::MCSubtargetInfo *MCInfo = TheTargetMachine->getMCSubtargetInfo();
+ const llvm::MCSubtargetInfo &MCInfo = TheTargetMachine->getMCSubtargetInfo();
const llvm::ArrayRef<llvm::SubtargetFeatureKV> Features =
- MCInfo->getAllProcessorFeatures();
+ MCInfo.getAllProcessorFeatures();
llvm::StringMap<llvm::StringRef> DescMap;
for (const llvm::SubtargetFeatureKV &feature : Features)
@@ -187,13 +187,13 @@ static int PrintEnabledExtensions(const TargetOptions& TargetOpts) {
TheTarget->createTargetMachine(Triple, TargetOpts.CPU, FeaturesStr,
BackendOptions, std::nullopt));
const llvm::Triple &MachineTriple = TheTargetMachine->getTargetTriple();
- const llvm::MCSubtargetInfo *MCInfo = TheTargetMachine->getMCSubtargetInfo();
+ const llvm::MCSubtargetInfo &MCInfo = TheTargetMachine->getMCSubtargetInfo();
// Extract the feature names that are enabled for the given target.
// We do that by capturing the key from the set of SubtargetFeatureKV entries
// provided by MCSubtargetInfo, which match the '-target-feature' values.
const std::vector<llvm::SubtargetFeatureKV> Features =
- MCInfo->getEnabledProcessorFeatures();
+ MCInfo.getEnabledProcessorFeatures();
std::set<llvm::StringRef> EnabledFeatureNames;
for (const llvm::SubtargetFeatureKV &feature : Features)
EnabledFeatureNames.insert(feature.Key);
diff --git a/clang/tools/driver/cc1as_main.cpp b/clang/tools/driver/cc1as_main.cpp
index 5bfcc9b0e17c5..33c34dd04d0e6 100644
--- a/clang/tools/driver/cc1as_main.cpp
+++ b/clang/tools/driver/cc1as_main.cpp
@@ -506,7 +506,7 @@ static bool ExecuteAssemblerImpl(AssemblerInvocation &Opts,
<< Opts.CPU << FS.empty() << FS;
}
- MCContext Ctx(Triple(Opts.Triple), *MAI, MRI.get(), STI.get(), &SrcMgr);
+ MCContext Ctx(Triple(Opts.Triple), *MAI, *MRI, *STI, &SrcMgr);
bool PIC = false;
if (Opts.RelocationModel == "static") {
diff --git a/llvm/include/llvm/MC/MCContext.h b/llvm/include/llvm/MC/MCContext.h
index 7d3f59b41a054..2941d85a7adc5 100644
--- a/llvm/include/llvm/MC/MCContext.h
+++ b/llvm/include/llvm/MC/MCContext.h
@@ -377,8 +377,8 @@ class MCContext {
public:
LLVM_ABI explicit MCContext(const Triple &TheTriple, const MCAsmInfo &MAI,
- const MCRegisterInfo *MRI,
- const MCSubtargetInfo *MSTI,
+ const MCRegisterInfo &MRI,
+ const MCSubtargetInfo &MSTI,
const SourceMgr *Mgr = nullptr,
bool DoAutoReset = true,
StringRef Swift5ReflSegmentName = {});
diff --git a/llvm/include/llvm/Target/TargetMachine.h b/llvm/include/llvm/Target/TargetMachine.h
index 7363306b556dc..b5d804d8fe942 100644
--- a/llvm/include/llvm/Target/TargetMachine.h
+++ b/llvm/include/llvm/Target/TargetMachine.h
@@ -239,9 +239,9 @@ class LLVM_ABI TargetMachine {
/// Return target specific asm information.
const MCAsmInfo &getMCAsmInfo() const { return *AsmInfo; }
- const MCRegisterInfo *getMCRegisterInfo() const { return MRI.get(); }
+ const MCRegisterInfo &getMCRegisterInfo() const { return *MRI; }
const MCInstrInfo *getMCInstrInfo() const { return MII.get(); }
- const MCSubtargetInfo *getMCSubtargetInfo() const { return STI.get(); }
+ const MCSubtargetInfo &getMCSubtargetInfo() const { return *STI; }
/// Return the ExceptionHandling to use, considering TargetOptions and the
/// Triple's default.
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 76703b8ccc637..ba66598de66c5 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -558,7 +558,7 @@ bool AsmPrinter::doInitialization(Module &M) {
// information (such as the embedded command line) to be associated
// with all sections in the object file rather than a single section.
if (!Target.isOSBinFormatXCOFF())
- OutStreamer->initSections(*TM.getMCSubtargetInfo());
+ OutStreamer->initSections(TM.getMCSubtargetInfo());
// Emit the version-min deployment target directive if needed.
//
@@ -627,7 +627,7 @@ bool AsmPrinter::doInitialization(Module &M) {
OutStreamer->AddComment("Start of file scope inline assembly");
OutStreamer->addBlankLine();
emitInlineAsm(
- M.getModuleInlineAsm() + "\n", *TM.getMCSubtargetInfo(),
+ M.getModuleInlineAsm() + "\n", TM.getMCSubtargetInfo(),
TM.Options.MCOptions, nullptr,
InlineAsm::AsmDialect(TM.getMCAsmInfo().getAssemblerDialect()));
OutStreamer->AddComment("End of file scope inline assembly");
@@ -2089,7 +2089,7 @@ void AsmPrinter::emitFunctionBody() {
if (this->MF)
STI = &getSubtargetInfo();
else
- STI = TM.getMCSubtargetInfo();
+ STI = &TM.getMCSubtargetInfo();
bool CanDoExtraAnalysis = ORE->allowExtraAnalysis(DEBUG_TYPE);
// Create a slot for the entry basic block section so that the section
@@ -3845,7 +3845,7 @@ Align AsmPrinter::emitAlignment(Align Alignment, const GlobalObject *GV,
if (this->MF)
STI = &getSubtargetInfo();
else
- STI = TM.getMCSubtargetInfo();
+ STI = &TM.getMCSubtargetInfo();
OutStreamer->emitCodeAlignment(Alignment, STI, MaxBytesToEmit);
} else
OutStreamer->emitValueToAlignment(Alignment, 0, 1, MaxBytesToEmit);
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
index aad8f3bce0d6a..d336e60b40991 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
@@ -344,7 +344,7 @@ void DwarfCompileUnit::addLocationAttribute(
// Base register
Register BaseReg = Asm->getObjFileLowering().getStaticBase();
unsigned DwarfBaseReg =
- Asm->TM.getMCRegisterInfo()->getDwarfRegNum(BaseReg, false);
+ Asm->TM.getMCRegisterInfo().getDwarfRegNum(BaseReg, false);
addUInt(*Loc, dwarf::DW_FORM_data1, dwarf::DW_OP_breg0 + DwarfBaseReg);
// Offset from base register
addSInt(*Loc, dwarf::DW_FORM_sdata, 0);
diff --git a/llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp b/llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
index 061e79b6d8a3d..b66e1027e64c2 100644
--- a/llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
+++ b/llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
@@ -169,9 +169,9 @@ CodeGenTargetMachineImpl::createMCStreamer(raw_pwrite_stream &Out,
raw_pwrite_stream *DwoOut,
CodeGenFileType FileType,
MCContext &Context) {
- const MCSubtargetInfo &STI = *getMCSubtargetInfo();
+ const MCSubtargetInfo &STI = getMCSubtargetInfo();
const MCAsmInfo &MAI = getMCAsmInfo();
- const MCRegisterInfo &MRI = *getMCRegisterInfo();
+ const MCRegisterInfo &MRI = getMCRegisterInfo();
const MCInstrInfo &MII = *getMCInstrInfo();
std::unique_ptr<MCStreamer> AsmStreamer;
@@ -279,8 +279,8 @@ bool CodeGenTargetMachineImpl::addPassesToEmitMC(PassManagerBase &PM,
// Create the code emitter for the target if it exists. If not, .o file
// emission fails.
- const MCSubtargetInfo &STI = *getMCSubtargetInfo();
- const MCRegisterInfo &MRI = *getMCRegisterInfo();
+ const MCSubtargetInfo &STI = getMCSubtargetInfo();
+ const MCRegisterInfo &MRI = getMCRegisterInfo();
std::unique_ptr<MCCodeEmitter> MCE(
getTarget().createMCCodeEmitter(*getMCInstrInfo(), *Ctx));
if (!MCE)
diff --git a/llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp b/llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
index a7360f91d3e9b..c6ccc71889fc4 100644
--- a/llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
+++ b/llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
@@ -75,7 +75,7 @@ Error DwarfStreamer::init(Triple TheTriple,
"no subtarget info for target %s",
TripleName.c_str());
- MC.reset(new MCContext(TheTriple, *MAI, MRI.get(), MSTI.get(), nullptr, true,
+ MC.reset(new MCContext(TheTriple, *MAI, *MRI, *MSTI, nullptr, true,
Swift5ReflectionSegmentName));
MOFI.reset(TheTarget->createMCObjectFileInfo(*MC, /*PIC=*/false, false));
MC->setObjectFileInfo(MOFI.get());
diff --git a/llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp b/llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
index 4b0e710f7618b..4009bfcd3018c 100644
--- a/llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
+++ b/llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
@@ -55,7 +55,7 @@ Error DwarfEmitterImpl::init(Triple TheTriple,
"no subtarget info for target %s",
TripleName.c_str());
- MC.reset(new MCContext(TheTriple, *MAI, MRI.get(), MSTI.get(), nullptr, true,
+ MC.reset(new MCContext(TheTriple, *MAI, *MRI, *MSTI, nullptr, true,
Swift5ReflectionSegmentName));
MOFI.reset(TheTarget->createMCObjectFileInfo(*MC, /*PIC=*/false, false));
MC->setObjectFileInfo(MOFI.get());
diff --git a/llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h b/llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
index 21cdf5887813f..022eae8963173 100644
--- a/llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
+++ b/llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
@@ -91,8 +91,8 @@ class DebugLineSectionEmitter {
"no subtarget info for target %s",
TripleName.c_str());
- MC.reset(new MCContext(TheTriple, *MAI, MRI.get(), MSTI.get(), nullptr,
- true, "__DWARF"));
+ MC.reset(
+ new MCContext(TheTriple, *MAI, *MRI, *MSTI, nullptr, true, "__DWARF"));
return Error::success();
}
diff --git a/llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp b/llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
index 18a1bad09bccb..017a374987b19 100644
--- a/llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
+++ b/llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
@@ -313,8 +313,7 @@ Error LVBinaryReader::loadGenericTargetInfo(StringRef TripleName,
"no instruction info for target " + TripleName);
MII.reset(InstructionInfo);
- MC = std::make_unique<MCContext>(Triple(TheTriple), *MAI, MRI.get(),
- STI.get());
+ MC = std::make_unique<MCContext>(Triple(TheTriple), *MAI, *MRI, *STI);
// Assembler.
MCDisassembler *DisAsm(TheTarget->createMCDisassembler(*STI, *MC));
diff --git a/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp b/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp
index ccc8150ca6f94..4507d45bd9771 100644
--- a/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp
+++ b/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp
@@ -785,8 +785,7 @@ class RuntimeDyldCheckerExprEval {
TT.str(),
inconvertibleErrorCode());
- auto Ctx = std::make_unique<MCContext>(Triple(TT.str()), *MAI, MRI.get(),
- STI.get());
+ auto Ctx = std::make_unique<MCContext>(Triple(TT.str()), *MAI, *MRI, *STI);
std::unique_ptr<MCDisassembler> Disassembler(
TheTarget->createMCDisassembler(*STI, *Ctx));
diff --git a/llvm/lib/MC/MCContext.cpp b/llvm/lib/MC/MCContext.cpp
index 10ae26999d3e4..92b3fd7c0ad78 100644
--- a/llvm/lib/MC/MCContext.cpp
+++ b/llvm/lib/MC/MCContext.cpp
@@ -63,12 +63,12 @@ static void defaultDiagHandler(const SMDiagnostic &SMD, bool, const SourceMgr &,
}
MCContext::MCContext(const Triple &TheTriple, const MCAsmInfo &mai,
- const MCRegisterInfo *mri, const MCSubtargetInfo *msti,
+ const MCRegisterInfo &mri, const MCSubtargetInfo &msti,
const SourceMgr *mgr, bool DoAutoReset,
StringRef Swift5ReflSegmentName)
: Swift5ReflectionSegmentName(Swift5ReflSegmentName), TT(TheTriple),
SrcMgr(mgr), InlineSrcMgr(nullptr), DiagHandler(defaultDiagHandler),
- MAI(mai), MRI(mri), MSTI(msti), Symbols(Allocator),
+ MAI(mai), MRI(&mri), MSTI(&msti), Symbols(Allocator),
InlineAsmUsedLabelNames(Allocator),
CurrentDwarfLoc(0, 0, 0, DWARF2_FLAG_IS_STMT, 0, 0),
AutoReset(DoAutoReset) {
diff --git a/llvm/lib/MC/MCDisassembler/Disassembler.cpp b/llvm/lib/MC/MCDisassembler/Disassembler.cpp
index 5f13cd535be0c..d2af5913d0074 100644
--- a/llvm/lib/MC/MCDisassembler/Disassembler.cpp
+++ b/llvm/lib/MC/MCDisassembler/Disassembler.cpp
@@ -74,8 +74,7 @@ LLVMCreateDisasmCPUFeatures(const char *TT, const char *CPU,
return nullptr;
// Set up the MCContext for creating symbols and MCExpr's.
- std::unique_ptr<MCContext> Ctx(
- new MCContext(TheTriple, *MAI, MRI.get(), STI.get()));
+ std::unique_ptr<MCContext> Ctx(new MCContext(TheTriple, *MAI, *MRI, *STI));
if (!Ctx)
return nullptr;
diff --git a/llvm/lib/Object/ModuleSymbolTable.cpp b/llvm/lib/Object/ModuleSymbolTable.cpp
index ac5529a9b2e86..1da5fa9c10a0b 100644
--- a/llvm/lib/Object/ModuleSymbolTable.cpp
+++ b/llvm/lib/Object/ModuleSymbolTable.cpp
@@ -103,7 +103,7 @@ initializeRecordStreamer(const Module &M,
SourceMgr SrcMgr;
SrcMgr.AddNewSourceBuffer(std::move(Buffer), SMLoc());
- MCContext MCCtx(TT, *MAI, MRI.get(), STI.get(), &SrcMgr);
+ MCContext MCCtx(TT, *MAI, *MRI, *STI, &SrcMgr);
std::unique_ptr<MCObjectFileInfo> MOFI(
T->createMCObjectFileInfo(MCCtx, /*PIC=*/false));
MCCtx.setObjectFileInfo(MOFI.get());
diff --git a/llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp b/llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
index 9debe57634ff3..2d01b321ce013 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
@@ -37,7 +37,7 @@ void AArch64_ELFTargetObjectFile::Initialize(MCContext &Ctx,
// Make sure the implicitly created empty .text section has the
// SHF_AARCH64_PURECODE flag set if the "+execute-only" target feature is
// present.
- if (TM.getMCSubtargetInfo()->hasFeature(AArch64::FeatureExecuteOnly)) {
+ if (TM.getMCSubtargetInfo().hasFeature(AArch64::FeatureExecuteOnly)) {
auto *Text = static_cast<MCSectionELF *>(TextSection);
Text->setFlags(Text->getFlags() | ELF::SHF_AARCH64_PURECODE);
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index a788c1384821e..390d68cca1174 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -122,7 +122,7 @@ StringRef AMDGPUAsmPrinter::getPassName() const {
}
const MCSubtargetInfo *AMDGPUAsmPrinter::getGlobalSTI() const {
- return TM.getMCSubtargetInfo();
+ return &TM.getMCSubtargetInfo();
}
AMDGPUTargetStreamer *AMDGPUAsmPrinter::getTargetStreamer() const {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp b/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
index 51bebefed5aa7..09d59664f8dd4 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
@@ -77,7 +77,7 @@ bool AMDGPUResourceUsageAnalysisWrapperPass::runOnMachineFunction(
return false;
const TargetMachine &TM = TPC->getTM<TargetMachine>();
- const MCSubtargetInfo &STI = *TM.getMCSubtargetInfo();
+ const MCSubtargetInfo &STI = TM.getMCSubtargetInfo();
// By default, for code object v5 and later, track only the minimum scratch
// size
@@ -104,7 +104,7 @@ AnalysisKey AMDGPUResourceUsageAnalysis::Key;
AMDGPUResourceUsageAnalysis::Result
AMDGPUResourceUsageAnalysis::run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM) {
- const MCSubtargetInfo &STI = *TM.getMCSubtargetInfo();
+ const MCSubtargetInfo &STI = TM.getMCSubtargetInfo();
// By default, for code object v5 and later, track only the minimum scratch
// size
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index c892645c32123..65317016c6390 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -878,9 +878,9 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, const Triple &TT,
TLOF(createTLOF(getTargetTriple())) {
initAsmInfo();
if (TT.isAMDGCN()) {
- if (getMCSubtargetInfo()->checkFeatures("+wavefrontsize64"))
+ if (getMCSubtargetInfo().checkFeatures("+wavefrontsize64"))
MRI.reset(llvm::createGCNMCRegisterInfo(AMDGPUDwarfFlavour::Wave64));
- else if (getMCSubtargetInfo()->checkFeatures("+wavefrontsize32"))
+ else if (getMCSubtargetInfo().checkFeatures("+wavefrontsize32"))
MRI.reset(llvm::createGCNMCRegisterInfo(AMDGPUDwarfFlavour::Wave32));
}
}
diff --git a/llvm/lib/Target/ARM/ARMTargetObjectFile.cpp b/llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
index 6e218a1e31c3c..d42a6484076d9 100644
--- a/llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
@@ -38,7 +38,7 @@ void ARMElfTargetObjectFile::Initialize(MCContext &Ctx,
const ARMBaseTargetMachine &ARM_TM = static_cast<const ARMBaseTargetMachine &>(TM);
bool isAAPCS_ABI = ARM_TM.TargetABI == ARM::ARMABI::ARM_ABI_AAPCS;
bool genExecuteOnly =
- ARM_TM.getMCSubtargetInfo()->hasFeature(ARM::FeatureExecuteOnly);
+ ARM_TM.getMCSubtargetInfo().hasFeature(ARM::FeatureExecuteOnly);
TargetLoweringObjectFileELF::Initialize(Ctx, TM);
InitializeELF(isAAPCS_ABI);
diff --git a/llvm/lib/Target/AVR/AVRAsmPrinter.cpp b/llvm/lib/Target/AVR/AVRAsmPrinter.cpp
index 9aaf1e6c201...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/195032
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