[clang] [CodeGen] Change -O0 bool load codegen to have nonzero model (PR #193783)
via cfe-commits
cfe-commits at lists.llvm.org
Thu Apr 23 08:52:43 PDT 2026
https://github.com/apple-fcloutier created https://github.com/llvm/llvm-project/pull/193783
The main follow-up item to https://github.com/llvm/llvm-project/pull/160790 was changing -O0 codegen to convert in-memory i8 bool values to i1 with the `nonzero` rule (`icmp ne i8 %val, 0`) rather than the `truncate` rule (`trunc i8 %val to i1`). This is achieved with a single-line change:
```
bool isConvertingBoolWithCmp0() const {
switch (getLoadBoolFromMem()) {
case BoolFromMem::Strict:
+ return !isOptimizedBuild();
case BoolFromMem::Truncate:
```
However, it impacts a _very large_ number of tests, so we agreed to move it out of the -fstrict-bool PR to reduce the chances we would have to back out the whole thing for this secondary item.
This PR does the change and modifies the tests accordingly. I expect that it will go stale rather quickly. If this needs more discussion, I'll only update it once we reach consensus.
>From bb99ca54f661079ff83342fe6f52f24a0aa36227 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?F=C3=A9lix=20Cloutier?= <fcloutier at apple.com>
Date: Tue, 9 Dec 2025 18:46:52 +0100
Subject: [PATCH] [CodeGen] Change -O0 bool load codegen to have nonzero model
This is a follow-up change that was requested during the review of
https://github.com/llvm/llvm-project/pull/160790.
---
clang/include/clang/Basic/CodeGenOptions.h | 2 +
clang/test/C/drs/dr335.c | 1 -
.../AArch64/sve-intrinsics/acle_sve_dupq.c | 120 ++++++------
clang/test/CodeGen/atomic-test-and-set.c | 22 +--
clang/test/CodeGen/atomic.c | 2 +-
clang/test/CodeGen/atomic_ops.c | 4 +-
clang/test/CodeGen/builtins-bitint.c | 6 +-
clang/test/CodeGen/builtins.c | 6 +-
clang/test/CodeGen/c11atomics-ios.c | 2 +-
clang/test/CodeGen/defer-ts.c | 2 +-
clang/test/CodeGen/scoped-atomic-ops.c | 144 +++++++-------
clang/test/CodeGen/strict-bool.c | 4 +-
clang/test/CodeGen/ubsan-conditional.c | 2 +-
clang/test/CodeGenCXX/blocks.cpp | 2 +-
.../builtin-atomic-compare_exchange.cpp | 6 +-
clang/test/CodeGenCXX/cast-to-ref-bool.cpp | 2 +-
clang/test/CodeGenCXX/exceptions.cpp | 4 +-
.../ignored-bitfield-conditional.cpp | 8 +-
clang/test/CodeGenCXX/lambda-expressions.cpp | 2 +-
clang/test/CodeGenCXX/nrvo.cpp | 78 ++++----
.../MatrixSingleSubscriptGetter.hlsl | 6 +-
.../MatrixSingleSubscriptSetter.hlsl | 4 +-
.../BasicFeatures/MatrixSplat.hlsl | 6 +-
.../MatrixToAndFromVectorConstructors.hlsl | 6 +-
.../BasicFeatures/VectorElementwiseCast.hlsl | 8 +-
clang/test/CodeGenHLSL/Bool.hlsl | 2 +-
clang/test/CodeGenHLSL/BoolMatrix.hlsl | 6 +-
clang/test/CodeGenHLSL/BoolVector.hlsl | 12 +-
.../CodeGenHLSL/builtins/ScalarSwizzles.hlsl | 24 +--
.../builtins/VectorElementStore.hlsl | 2 +-
.../builtins/WavePrefixCountBits.hlsl | 2 +-
clang/test/CodeGenHLSL/builtins/dot2add.hlsl | 4 +-
clang/test/CodeGenHLSL/strict-bool.hlsl | 1 +
.../vk-features/vk.spec-constant.hlsl | 2 +-
clang/test/CodeGenObjC/property-atomic-bool.m | 12 +-
clang/test/CodeGenObjC/strict-bool.m | 4 +-
clang/test/CodeGenObjC/strong-in-c-struct.m | 2 +-
clang/test/CodeGenOpenCL/bool_cast.cl | 4 +-
clang/test/DebugInfo/KeyInstructions/atomic.c | 20 +-
clang/test/Frontend/fixed_point_add.c | 2 +-
clang/test/Frontend/fixed_point_comparisons.c | 2 +-
clang/test/Frontend/fixed_point_div.c | 2 +-
clang/test/Frontend/fixed_point_mul.c | 2 +-
clang/test/Frontend/fixed_point_sub.c | 2 +-
clang/test/Headers/gpuintrin.c | 8 +-
.../Headers/openmp-device-functions-bool.c | 2 +-
clang/test/OpenMP/atomic_capture_codegen.cpp | 8 +-
clang/test/OpenMP/atomic_update_codegen.cpp | 8 +-
...istribute_parallel_for_simd_if_codegen.cpp | 32 ++--
clang/test/OpenMP/for_codegen.cpp | 4 +-
clang/test/OpenMP/loop_collapse_codegen.cpp | 12 +-
.../OpenMP/master_taskloop_simd_codegen.cpp | 2 +-
clang/test/OpenMP/nvptx_SPMD_codegen.cpp | 60 +++---
...vptx_target_teams_generic_loop_codegen.cpp | 6 +-
...eams_generic_loop_generic_mode_codegen.cpp | 4 +-
.../test/OpenMP/parallel_for_simd_codegen.cpp | 2 +-
.../parallel_master_taskloop_codegen.cpp | 10 +-
.../parallel_master_taskloop_simd_codegen.cpp | 38 ++--
.../OpenMP/target_data_if_logical_codegen.cpp | 4 +-
.../target_enter_data_depend_codegen.cpp | 2 +-
.../target_exit_data_depend_codegen.cpp | 2 +-
.../target_offload_mandatory_codegen.cpp | 2 +-
.../OpenMP/target_parallel_debug_codegen.cpp | 4 +-
.../target_parallel_for_debug_codegen.cpp | 8 +-
.../target_parallel_for_simd_codegen.cpp | 44 ++---
...target_parallel_generic_loop_codegen-3.cpp | 8 +-
.../OpenMP/target_parallel_if_codegen.cpp | 64 +++----
clang/test/OpenMP/target_simd_codegen.cpp | 6 +-
...ams_distribute_parallel_for_if_codegen.cpp | 18 +-
...istribute_parallel_for_simd_if_codegen.cpp | 100 +++++-----
...get_teams_distribute_reduction_codegen.cpp | 180 +++++++++---------
.../target_teams_distribute_simd_codegen.cpp | 32 ++--
.../target_teams_generic_loop_if_codegen.cpp | 14 +-
.../OpenMP/target_update_depend_codegen.cpp | 2 +-
clang/test/OpenMP/taskloop_simd_codegen.cpp | 2 +-
...ams_distribute_parallel_for_if_codegen.cpp | 12 +-
...istribute_parallel_for_simd_if_codegen.cpp | 76 ++++----
.../OpenMP/teams_distribute_simd_codegen.cpp | 24 +--
78 files changed, 678 insertions(+), 678 deletions(-)
diff --git a/clang/include/clang/Basic/CodeGenOptions.h b/clang/include/clang/Basic/CodeGenOptions.h
index 54634e6ec7eec..3cbbf1a3074ac 100644
--- a/clang/include/clang/Basic/CodeGenOptions.h
+++ b/clang/include/clang/Basic/CodeGenOptions.h
@@ -682,6 +682,8 @@ class CodeGenOptions : public CodeGenOptionsBase {
bool isConvertingBoolWithCmp0() const {
switch (getLoadBoolFromMem()) {
case BoolFromMem::Strict:
+ return !isOptimizedBuild();
+
case BoolFromMem::Truncate:
return false;
diff --git a/clang/test/C/drs/dr335.c b/clang/test/C/drs/dr335.c
index 3ce6ce5bd53ca..a0523cb5cbcd8 100644
--- a/clang/test/C/drs/dr335.c
+++ b/clang/test/C/drs/dr335.c
@@ -45,6 +45,5 @@ void dr335(void) {
// CHECK-NEXT: %[[CLEAR2:.+]] = and i8 %[[LOAD2]], -2
// CHECK-NEXT: %[[SET:.+]] = or i8 %[[CLEAR2]], %[[ZERO]]
// CHECK-NEXT: store i8 %[[SET]], ptr {{.+}}, align 1
- // CHECK-NEXT: {{.+}} = trunc i8 %[[ZERO]] to i1
}
diff --git a/clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq.c b/clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq.c
index 5928de5fea1ff..7a645c5c38b8c 100644
--- a/clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq.c
+++ b/clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq.c
@@ -557,22 +557,22 @@ svfloat64_t test_svdupq_n_f64(float64_t x0, float64_t x1) MODE_ATTR
// CHECK-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[X13:%.*]] to i8
// CHECK-NEXT: [[FROMBOOL14:%.*]] = zext i1 [[X14:%.*]] to i8
// CHECK-NEXT: [[FROMBOOL15:%.*]] = zext i1 [[X15:%.*]] to i8
-// CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[FROMBOOL]] to i1
-// CHECK-NEXT: [[TOBOOL16:%.*]] = trunc i8 [[FROMBOOL1]] to i1
-// CHECK-NEXT: [[TOBOOL17:%.*]] = trunc i8 [[FROMBOOL2]] to i1
-// CHECK-NEXT: [[TOBOOL18:%.*]] = trunc i8 [[FROMBOOL3]] to i1
-// CHECK-NEXT: [[TOBOOL19:%.*]] = trunc i8 [[FROMBOOL4]] to i1
-// CHECK-NEXT: [[TOBOOL20:%.*]] = trunc i8 [[FROMBOOL5]] to i1
-// CHECK-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[FROMBOOL6]] to i1
-// CHECK-NEXT: [[TOBOOL22:%.*]] = trunc i8 [[FROMBOOL7]] to i1
-// CHECK-NEXT: [[TOBOOL23:%.*]] = trunc i8 [[FROMBOOL8]] to i1
-// CHECK-NEXT: [[TOBOOL24:%.*]] = trunc i8 [[FROMBOOL9]] to i1
-// CHECK-NEXT: [[TOBOOL25:%.*]] = trunc i8 [[FROMBOOL10]] to i1
-// CHECK-NEXT: [[TOBOOL26:%.*]] = trunc i8 [[FROMBOOL11]] to i1
-// CHECK-NEXT: [[TOBOOL27:%.*]] = trunc i8 [[FROMBOOL12]] to i1
-// CHECK-NEXT: [[TOBOOL28:%.*]] = trunc i8 [[FROMBOOL13]] to i1
-// CHECK-NEXT: [[TOBOOL29:%.*]] = trunc i8 [[FROMBOOL14]] to i1
-// CHECK-NEXT: [[TOBOOL30:%.*]] = trunc i8 [[FROMBOOL15]] to i1
+// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[FROMBOOL]], 0
+// CHECK-NEXT: [[TOBOOL16:%.*]] = icmp ne i8 [[FROMBOOL1]], 0
+// CHECK-NEXT: [[TOBOOL17:%.*]] = icmp ne i8 [[FROMBOOL2]], 0
+// CHECK-NEXT: [[TOBOOL18:%.*]] = icmp ne i8 [[FROMBOOL3]], 0
+// CHECK-NEXT: [[TOBOOL19:%.*]] = icmp ne i8 [[FROMBOOL4]], 0
+// CHECK-NEXT: [[TOBOOL20:%.*]] = icmp ne i8 [[FROMBOOL5]], 0
+// CHECK-NEXT: [[TOBOOL21:%.*]] = icmp ne i8 [[FROMBOOL6]], 0
+// CHECK-NEXT: [[TOBOOL22:%.*]] = icmp ne i8 [[FROMBOOL7]], 0
+// CHECK-NEXT: [[TOBOOL23:%.*]] = icmp ne i8 [[FROMBOOL8]], 0
+// CHECK-NEXT: [[TOBOOL24:%.*]] = icmp ne i8 [[FROMBOOL9]], 0
+// CHECK-NEXT: [[TOBOOL25:%.*]] = icmp ne i8 [[FROMBOOL10]], 0
+// CHECK-NEXT: [[TOBOOL26:%.*]] = icmp ne i8 [[FROMBOOL11]], 0
+// CHECK-NEXT: [[TOBOOL27:%.*]] = icmp ne i8 [[FROMBOOL12]], 0
+// CHECK-NEXT: [[TOBOOL28:%.*]] = icmp ne i8 [[FROMBOOL13]], 0
+// CHECK-NEXT: [[TOBOOL29:%.*]] = icmp ne i8 [[FROMBOOL14]], 0
+// CHECK-NEXT: [[TOBOOL30:%.*]] = icmp ne i8 [[FROMBOOL15]], 0
// CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[TOBOOL16]] to i8
// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TOBOOL17]] to i8
@@ -629,22 +629,22 @@ svfloat64_t test_svdupq_n_f64(float64_t x0, float64_t x1) MODE_ATTR
// CPP-CHECK-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[X13:%.*]] to i8
// CPP-CHECK-NEXT: [[FROMBOOL14:%.*]] = zext i1 [[X14:%.*]] to i8
// CPP-CHECK-NEXT: [[FROMBOOL15:%.*]] = zext i1 [[X15:%.*]] to i8
-// CPP-CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[FROMBOOL]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL16:%.*]] = trunc i8 [[FROMBOOL1]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL17:%.*]] = trunc i8 [[FROMBOOL2]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL18:%.*]] = trunc i8 [[FROMBOOL3]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL19:%.*]] = trunc i8 [[FROMBOOL4]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL20:%.*]] = trunc i8 [[FROMBOOL5]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[FROMBOOL6]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL22:%.*]] = trunc i8 [[FROMBOOL7]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL23:%.*]] = trunc i8 [[FROMBOOL8]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL24:%.*]] = trunc i8 [[FROMBOOL9]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL25:%.*]] = trunc i8 [[FROMBOOL10]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL26:%.*]] = trunc i8 [[FROMBOOL11]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL27:%.*]] = trunc i8 [[FROMBOOL12]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL28:%.*]] = trunc i8 [[FROMBOOL13]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL29:%.*]] = trunc i8 [[FROMBOOL14]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL30:%.*]] = trunc i8 [[FROMBOOL15]] to i1
+// CPP-CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[FROMBOOL]], 0
+// CPP-CHECK-NEXT: [[TOBOOL16:%.*]] = icmp ne i8 [[FROMBOOL1]], 0
+// CPP-CHECK-NEXT: [[TOBOOL17:%.*]] = icmp ne i8 [[FROMBOOL2]], 0
+// CPP-CHECK-NEXT: [[TOBOOL18:%.*]] = icmp ne i8 [[FROMBOOL3]], 0
+// CPP-CHECK-NEXT: [[TOBOOL19:%.*]] = icmp ne i8 [[FROMBOOL4]], 0
+// CPP-CHECK-NEXT: [[TOBOOL20:%.*]] = icmp ne i8 [[FROMBOOL5]], 0
+// CPP-CHECK-NEXT: [[TOBOOL21:%.*]] = icmp ne i8 [[FROMBOOL6]], 0
+// CPP-CHECK-NEXT: [[TOBOOL22:%.*]] = icmp ne i8 [[FROMBOOL7]], 0
+// CPP-CHECK-NEXT: [[TOBOOL23:%.*]] = icmp ne i8 [[FROMBOOL8]], 0
+// CPP-CHECK-NEXT: [[TOBOOL24:%.*]] = icmp ne i8 [[FROMBOOL9]], 0
+// CPP-CHECK-NEXT: [[TOBOOL25:%.*]] = icmp ne i8 [[FROMBOOL10]], 0
+// CPP-CHECK-NEXT: [[TOBOOL26:%.*]] = icmp ne i8 [[FROMBOOL11]], 0
+// CPP-CHECK-NEXT: [[TOBOOL27:%.*]] = icmp ne i8 [[FROMBOOL12]], 0
+// CPP-CHECK-NEXT: [[TOBOOL28:%.*]] = icmp ne i8 [[FROMBOOL13]], 0
+// CPP-CHECK-NEXT: [[TOBOOL29:%.*]] = icmp ne i8 [[FROMBOOL14]], 0
+// CPP-CHECK-NEXT: [[TOBOOL30:%.*]] = icmp ne i8 [[FROMBOOL15]], 0
// CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[TOBOOL]] to i8
// CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[TOBOOL16]] to i8
// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TOBOOL17]] to i8
@@ -702,14 +702,14 @@ svbool_t test_svdupq_n_b8(bool x0, bool x1, bool x2, bool x3,
// CHECK-NEXT: [[FROMBOOL5:%.*]] = zext i1 [[X5:%.*]] to i8
// CHECK-NEXT: [[FROMBOOL6:%.*]] = zext i1 [[X6:%.*]] to i8
// CHECK-NEXT: [[FROMBOOL7:%.*]] = zext i1 [[X7:%.*]] to i8
-// CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[FROMBOOL]] to i1
-// CHECK-NEXT: [[TOBOOL8:%.*]] = trunc i8 [[FROMBOOL1]] to i1
-// CHECK-NEXT: [[TOBOOL9:%.*]] = trunc i8 [[FROMBOOL2]] to i1
-// CHECK-NEXT: [[TOBOOL10:%.*]] = trunc i8 [[FROMBOOL3]] to i1
-// CHECK-NEXT: [[TOBOOL11:%.*]] = trunc i8 [[FROMBOOL4]] to i1
-// CHECK-NEXT: [[TOBOOL12:%.*]] = trunc i8 [[FROMBOOL5]] to i1
-// CHECK-NEXT: [[TOBOOL13:%.*]] = trunc i8 [[FROMBOOL6]] to i1
-// CHECK-NEXT: [[TOBOOL14:%.*]] = trunc i8 [[FROMBOOL7]] to i1
+// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[FROMBOOL]], 0
+// CHECK-NEXT: [[TOBOOL8:%.*]] = icmp ne i8 [[FROMBOOL1]], 0
+// CHECK-NEXT: [[TOBOOL9:%.*]] = icmp ne i8 [[FROMBOOL2]], 0
+// CHECK-NEXT: [[TOBOOL10:%.*]] = icmp ne i8 [[FROMBOOL3]], 0
+// CHECK-NEXT: [[TOBOOL11:%.*]] = icmp ne i8 [[FROMBOOL4]], 0
+// CHECK-NEXT: [[TOBOOL12:%.*]] = icmp ne i8 [[FROMBOOL5]], 0
+// CHECK-NEXT: [[TOBOOL13:%.*]] = icmp ne i8 [[FROMBOOL6]], 0
+// CHECK-NEXT: [[TOBOOL14:%.*]] = icmp ne i8 [[FROMBOOL7]], 0
// CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[TOBOOL]] to i16
// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[TOBOOL8]] to i16
// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TOBOOL9]] to i16
@@ -743,14 +743,14 @@ svbool_t test_svdupq_n_b8(bool x0, bool x1, bool x2, bool x3,
// CPP-CHECK-NEXT: [[FROMBOOL5:%.*]] = zext i1 [[X5:%.*]] to i8
// CPP-CHECK-NEXT: [[FROMBOOL6:%.*]] = zext i1 [[X6:%.*]] to i8
// CPP-CHECK-NEXT: [[FROMBOOL7:%.*]] = zext i1 [[X7:%.*]] to i8
-// CPP-CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[FROMBOOL]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL8:%.*]] = trunc i8 [[FROMBOOL1]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL9:%.*]] = trunc i8 [[FROMBOOL2]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL10:%.*]] = trunc i8 [[FROMBOOL3]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL11:%.*]] = trunc i8 [[FROMBOOL4]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL12:%.*]] = trunc i8 [[FROMBOOL5]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL13:%.*]] = trunc i8 [[FROMBOOL6]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL14:%.*]] = trunc i8 [[FROMBOOL7]] to i1
+// CPP-CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[FROMBOOL]], 0
+// CPP-CHECK-NEXT: [[TOBOOL8:%.*]] = icmp ne i8 [[FROMBOOL1]], 0
+// CPP-CHECK-NEXT: [[TOBOOL9:%.*]] = icmp ne i8 [[FROMBOOL2]], 0
+// CPP-CHECK-NEXT: [[TOBOOL10:%.*]] = icmp ne i8 [[FROMBOOL3]], 0
+// CPP-CHECK-NEXT: [[TOBOOL11:%.*]] = icmp ne i8 [[FROMBOOL4]], 0
+// CPP-CHECK-NEXT: [[TOBOOL12:%.*]] = icmp ne i8 [[FROMBOOL5]], 0
+// CPP-CHECK-NEXT: [[TOBOOL13:%.*]] = icmp ne i8 [[FROMBOOL6]], 0
+// CPP-CHECK-NEXT: [[TOBOOL14:%.*]] = icmp ne i8 [[FROMBOOL7]], 0
// CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[TOBOOL]] to i16
// CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[TOBOOL8]] to i16
// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TOBOOL9]] to i16
@@ -787,10 +787,10 @@ svbool_t test_svdupq_n_b16(bool x0, bool x1, bool x2, bool x3,
// CHECK-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[X1:%.*]] to i8
// CHECK-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[X2:%.*]] to i8
// CHECK-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[X3:%.*]] to i8
-// CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[FROMBOOL]] to i1
-// CHECK-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[FROMBOOL1]] to i1
-// CHECK-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[FROMBOOL2]] to i1
-// CHECK-NEXT: [[TOBOOL6:%.*]] = trunc i8 [[FROMBOOL3]] to i1
+// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[FROMBOOL]], 0
+// CHECK-NEXT: [[TOBOOL4:%.*]] = icmp ne i8 [[FROMBOOL1]], 0
+// CHECK-NEXT: [[TOBOOL5:%.*]] = icmp ne i8 [[FROMBOOL2]], 0
+// CHECK-NEXT: [[TOBOOL6:%.*]] = icmp ne i8 [[FROMBOOL3]], 0
// CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[TOBOOL]] to i32
// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[TOBOOL4]] to i32
// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TOBOOL5]] to i32
@@ -812,10 +812,10 @@ svbool_t test_svdupq_n_b16(bool x0, bool x1, bool x2, bool x3,
// CPP-CHECK-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[X1:%.*]] to i8
// CPP-CHECK-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[X2:%.*]] to i8
// CPP-CHECK-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[X3:%.*]] to i8
-// CPP-CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[FROMBOOL]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[FROMBOOL1]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[FROMBOOL2]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL6:%.*]] = trunc i8 [[FROMBOOL3]] to i1
+// CPP-CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[FROMBOOL]], 0
+// CPP-CHECK-NEXT: [[TOBOOL4:%.*]] = icmp ne i8 [[FROMBOOL1]], 0
+// CPP-CHECK-NEXT: [[TOBOOL5:%.*]] = icmp ne i8 [[FROMBOOL2]], 0
+// CPP-CHECK-NEXT: [[TOBOOL6:%.*]] = icmp ne i8 [[FROMBOOL3]], 0
// CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[TOBOOL]] to i32
// CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[TOBOOL4]] to i32
// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TOBOOL5]] to i32
@@ -841,8 +841,8 @@ svbool_t test_svdupq_n_b32(bool x0, bool x1, bool x2, bool x3) MODE_ATTR
// CHECK-NEXT: entry:
// CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[X0:%.*]] to i8
// CHECK-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[X1:%.*]] to i8
-// CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[FROMBOOL]] to i1
-// CHECK-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[FROMBOOL1]] to i1
+// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[FROMBOOL]], 0
+// CHECK-NEXT: [[TOBOOL2:%.*]] = icmp ne i8 [[FROMBOOL1]], 0
// CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[TOBOOL]] to i64
// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[TOBOOL2]] to i64
// CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> poison, i64 [[TMP0]], i64 0
@@ -858,8 +858,8 @@ svbool_t test_svdupq_n_b32(bool x0, bool x1, bool x2, bool x3) MODE_ATTR
// CPP-CHECK-NEXT: entry:
// CPP-CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[X0:%.*]] to i8
// CPP-CHECK-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[X1:%.*]] to i8
-// CPP-CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[FROMBOOL]] to i1
-// CPP-CHECK-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[FROMBOOL1]] to i1
+// CPP-CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[FROMBOOL]], 0
+// CPP-CHECK-NEXT: [[TOBOOL2:%.*]] = icmp ne i8 [[FROMBOOL1]], 0
// CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[TOBOOL]] to i64
// CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[TOBOOL2]] to i64
// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> poison, i64 [[TMP0]], i64 0
diff --git a/clang/test/CodeGen/atomic-test-and-set.c b/clang/test/CodeGen/atomic-test-and-set.c
index 6438094567f33..83a2876c862a0 100644
--- a/clang/test/CodeGen/atomic-test-and-set.c
+++ b/clang/test/CodeGen/atomic-test-and-set.c
@@ -84,7 +84,7 @@ void clear_dynamic(char *ptr, int order) {
// CHECK-NEXT: [[TOBOOL_ZEXT:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK-NEXT: store i8 [[TOBOOL_ZEXT]], ptr [[ATOMIC_TEMP]], align 1
// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-NEXT: ret void
//
void test_and_set_relaxed(char *ptr) {
@@ -103,7 +103,7 @@ void test_and_set_relaxed(char *ptr) {
// CHECK-NEXT: [[TOBOOL_ZEXT:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK-NEXT: store i8 [[TOBOOL_ZEXT]], ptr [[ATOMIC_TEMP]], align 1
// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-NEXT: ret void
//
void test_and_set_consume(char *ptr) {
@@ -122,7 +122,7 @@ void test_and_set_consume(char *ptr) {
// CHECK-NEXT: [[TOBOOL_ZEXT:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK-NEXT: store i8 [[TOBOOL_ZEXT]], ptr [[ATOMIC_TEMP]], align 1
// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-NEXT: ret void
//
void test_and_set_acquire(char *ptr) {
@@ -141,7 +141,7 @@ void test_and_set_acquire(char *ptr) {
// CHECK-NEXT: [[TOBOOL_ZEXT:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK-NEXT: store i8 [[TOBOOL_ZEXT]], ptr [[ATOMIC_TEMP]], align 1
// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-NEXT: ret void
//
void test_and_set_release(char *ptr) {
@@ -160,7 +160,7 @@ void test_and_set_release(char *ptr) {
// CHECK-NEXT: [[TOBOOL_ZEXT:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK-NEXT: store i8 [[TOBOOL_ZEXT]], ptr [[ATOMIC_TEMP]], align 1
// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-NEXT: ret void
//
void test_and_set_acq_rel(char *ptr) {
@@ -179,7 +179,7 @@ void test_and_set_acq_rel(char *ptr) {
// CHECK-NEXT: [[TOBOOL_ZEXT:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK-NEXT: store i8 [[TOBOOL_ZEXT]], ptr [[ATOMIC_TEMP]], align 1
// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-NEXT: ret void
//
void test_and_set_seq_cst(char *ptr) {
@@ -235,7 +235,7 @@ void test_and_set_seq_cst(char *ptr) {
// CHECK-NEXT: br label %[[ATOMIC_CONTINUE]]
// CHECK: [[ATOMIC_CONTINUE]]:
// CHECK-NEXT: [[TMP7:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// CHECK-NEXT: ret void
//
void test_and_set_dynamic(char *ptr, int order) {
@@ -253,7 +253,7 @@ void test_and_set_dynamic(char *ptr, int order) {
// CHECK-NEXT: [[TOBOOL_ZEXT:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK-NEXT: store i8 [[TOBOOL_ZEXT]], ptr [[ATOMIC_TEMP]], align 1
// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK-NEXT: ret void
//
void test_and_set_array() {
@@ -316,7 +316,7 @@ void clear_incomplete(struct incomplete *ptr) {
// CHECK-NEXT: [[TOBOOL_ZEXT:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK-NEXT: store i8 [[TOBOOL_ZEXT]], ptr [[ATOMIC_TEMP]], align 1
// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-NEXT: ret void
//
void test_and_set_int(int *ptr) {
@@ -334,7 +334,7 @@ void test_and_set_int(int *ptr) {
// CHECK-NEXT: [[TOBOOL_ZEXT:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK-NEXT: store i8 [[TOBOOL_ZEXT]], ptr [[ATOMIC_TEMP]], align 1
// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-NEXT: ret void
//
void test_and_set_void(void *ptr) {
@@ -352,7 +352,7 @@ void test_and_set_void(void *ptr) {
// CHECK-NEXT: [[TOBOOL_ZEXT:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK-NEXT: store i8 [[TOBOOL_ZEXT]], ptr [[ATOMIC_TEMP]], align 1
// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-NEXT: ret void
//
void test_and_set_incomplete(struct incomplete *ptr) {
diff --git a/clang/test/CodeGen/atomic.c b/clang/test/CodeGen/atomic.c
index 16c29e282ddd9..f1a49780fc808 100644
--- a/clang/test/CodeGen/atomic.c
+++ b/clang/test/CodeGen/atomic.c
@@ -91,7 +91,7 @@ int atomic(void) {
if ( __sync_val_compare_and_swap(&valb, 0, 1)) {
// CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg ptr %valb, i8 0, i8 1 seq_cst seq_cst, align 1
// CHECK: [[VAL:%[a-z0-9_.]+]] = extractvalue { i8, i1 } [[PAIR]], 0
- // CHECK: trunc i8 [[VAL]] to i1
+ // CHECK: icmp ne i8 [[VAL]], 0
old = 42;
}
diff --git a/clang/test/CodeGen/atomic_ops.c b/clang/test/CodeGen/atomic_ops.c
index fb34fc2a43836..7dce278e02101 100644
--- a/clang/test/CodeGen/atomic_ops.c
+++ b/clang/test/CodeGen/atomic_ops.c
@@ -34,12 +34,12 @@ extern _Atomic _Bool b;
_Bool bar(void) {
// NATIVE-LABEL: @bar
// NATIVE: %[[load:.*]] = load atomic i8, ptr @b seq_cst, align 1
-// NATIVE: %[[tobool:.*]] = trunc i8 %[[load]] to i1
+// NATIVE: %[[tobool:.*]] = icmp ne i8 %[[load]], 0
// NATIVE: ret i1 %[[tobool]]
// LIBCALL-LABEL: @bar
// LIBCALL: call void @__atomic_load(i32 noundef 1, ptr noundef @b, ptr noundef %atomic-temp, i32 noundef 5)
// LIBCALL: %[[load:.*]] = load i8, ptr %atomic-temp
-// LIBCALL: %[[tobool:.*]] = trunc i8 %[[load]] to i1
+// LIBCALL: %[[tobool:.*]] = icmp ne i8 %[[load]], 0
// LIBCALL: ret i1 %[[tobool]]
return b;
diff --git a/clang/test/CodeGen/builtins-bitint.c b/clang/test/CodeGen/builtins-bitint.c
index 207ff388a2876..51a5fe5d2f57f 100644
--- a/clang/test/CodeGen/builtins-bitint.c
+++ b/clang/test/CodeGen/builtins-bitint.c
@@ -11,7 +11,7 @@
// CHECK-O0-NEXT: [[A:%.*]] = alloca i8, align 1
// CHECK-O0-NEXT: store i8 1, ptr [[A]], align 1
// CHECK-O0-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
-// CHECK-O0-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-O0-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-O0-NEXT: [[TMP1:%.*]] = call i1 @llvm.ctpop.i1(i1 [[LOADEDV]])
// CHECK-O0-NEXT: [[CAST:%.*]] = zext i1 [[TMP1]] to i32
// CHECK-O0-NEXT: ret i32 [[CAST]]
@@ -53,7 +53,7 @@ int test_popcountg_ubi2() {
// CHECK-O0-NEXT: [[A:%.*]] = alloca i8, align 1
// CHECK-O0-NEXT: store i8 0, ptr [[A]], align 1
// CHECK-O0-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
-// CHECK-O0-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-O0-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-O0-NEXT: [[TMP1:%.*]] = call i1 @llvm.cttz.i1(i1 [[LOADEDV]], i1 false)
// CHECK-O0-NEXT: [[CAST:%.*]] = zext i1 [[TMP1]] to i32
// CHECK-O0-NEXT: ret i32 [[CAST]]
@@ -95,7 +95,7 @@ int test_ctzg_ubi2() {
// CHECK-O0-NEXT: [[A:%.*]] = alloca i8, align 1
// CHECK-O0-NEXT: store i8 0, ptr [[A]], align 1
// CHECK-O0-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
-// CHECK-O0-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-O0-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-O0-NEXT: [[TMP1:%.*]] = call i1 @llvm.ctlz.i1(i1 [[LOADEDV]], i1 false)
// CHECK-O0-NEXT: [[CAST:%.*]] = zext i1 [[TMP1]] to i32
// CHECK-O0-NEXT: ret i32 [[CAST]]
diff --git a/clang/test/CodeGen/builtins.c b/clang/test/CodeGen/builtins.c
index 4decb30b18e5f..f225858c00b4a 100644
--- a/clang/test/CodeGen/builtins.c
+++ b/clang/test/CodeGen/builtins.c
@@ -944,7 +944,7 @@ void test_builtin_bswapg(unsigned char uc, unsigned short us, unsigned int ui,
#endif
b = __builtin_bswapg(b);
// CHECK: %{{.*}} = load i8, ptr %b.addr
- // CHECK: %{{.*}} = trunc i8 %{{.*}} to i1
+ // CHECK: %{{.*}} = icmp ne i8 %{{.*}}, 0
// CHECK: %{{.*}} = zext i1 %{{.*}} to i8
// CHECK: store i8 %{{.*}}, ptr %b.addr
uc = __builtin_bswapg(uc);
@@ -990,12 +990,12 @@ void test_builtin_bitreverseg(unsigned char uc, unsigned short us, unsigned int
#endif
b = __builtin_bitreverseg(b);
// CHECK: %{{.*}} = load i8, ptr %b.addr
- // CHECK: %{{.*}} = trunc i8 %{{.*}} to i1
+ // CHECK: %{{.*}} = icmp ne i8 %{{.*}}, 0
// CHECK: %{{.*}} = zext i1 %{{.*}} to i8
// CHECK: store i8 %{{.*}}, ptr %b.addr
bi1 = __builtin_bitreverseg(bi1);
// CHECK: %{{.*}} = load i8, ptr %bi1.addr
- // CHECK: %{{.*}} = trunc i8 %{{.*}} to i1
+ // CHECK: %{{.*}} = icmp ne i8 %{{.*}}, 0
// CHECK: %{{.*}} = zext i1 %{{.*}} to i8
// CHECK: store i8 %{{.*}}, ptr %bi1.addr
uc = __builtin_bitreverseg(uc);
diff --git a/clang/test/CodeGen/c11atomics-ios.c b/clang/test/CodeGen/c11atomics-ios.c
index 34843ef55ecb7..caa755ed929d6 100644
--- a/clang/test/CodeGen/c11atomics-ios.c
+++ b/clang/test/CodeGen/c11atomics-ios.c
@@ -259,7 +259,7 @@ _Bool test_promoted_cmpxchg(_Atomic(PS) *addr, PS *desired, PS *new) {
// CHECK: [[RES_BOOL8:%.*]] = zext i1 [[RES_BOOL]] to i8
// CHECK: store i8 [[RES_BOOL8]], ptr [[RES_ADDR]], align 1
// CHECK: [[RES_BOOL8:%.*]] = load i8, ptr [[RES_ADDR]], align 1
- // CHECK: [[RETVAL:%.*]] = trunc i8 [[RES_BOOL8]] to i1
+ // CHECK: [[RETVAL:%.*]] = icmp ne i8 [[RES_BOOL8]], 0
// CHECK: ret i1 [[RETVAL]]
return __c11_atomic_compare_exchange_strong(addr, desired, *new, 5, 5);
diff --git a/clang/test/CodeGen/defer-ts.c b/clang/test/CodeGen/defer-ts.c
index 79b09064d330c..c928ed8d20393 100644
--- a/clang/test/CodeGen/defer-ts.c
+++ b/clang/test/CodeGen/defer-ts.c
@@ -45,7 +45,7 @@ void f3(bool ret) {
// CHECK: %storedv = zext i1 %ret to i8
// CHECK: store i8 %storedv, ptr %ret.addr, align 1
// CHECK: %0 = load i8, ptr %ret.addr, align 1
- // CHECK: %loadedv = trunc i8 %0 to i1
+ // CHECK: %loadedv = icmp ne i8 %0, 0
// CHECK: br i1 %loadedv, label %if.then, label %if.end
// CHECK: if.then:
// CHECK: store i32 1, ptr %cleanup.dest.slot, align 4
diff --git a/clang/test/CodeGen/scoped-atomic-ops.c b/clang/test/CodeGen/scoped-atomic-ops.c
index 6df0d439d6b88..e7145b0e5d89b 100644
--- a/clang/test/CodeGen/scoped-atomic-ops.c
+++ b/clang/test/CodeGen/scoped-atomic-ops.c
@@ -3360,7 +3360,7 @@ void fi3e(int *a, int *b, int *c, int *d, int *e, int *f, int *g, int *h) {
// AMDGCN_CL_DEF-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_DEF-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi4a(
@@ -3390,7 +3390,7 @@ void fi3e(int *a, int *b, int *c, int *d, int *e, int *f, int *g, int *h) {
// AMDGCN_CL_20-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP6]] to i8
// AMDGCN_CL_20-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP7:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi4a(
@@ -3417,7 +3417,7 @@ void fi3e(int *a, int *b, int *c, int *d, int *e, int *f, int *g, int *h) {
// NVPTX-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// NVPTX-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// NVPTX-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi4a(
@@ -3444,7 +3444,7 @@ void fi3e(int *a, int *b, int *c, int *d, int *e, int *f, int *g, int *h) {
// SPIRV-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// SPIRV-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// SPIRV-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi4a(int *i) {
@@ -3483,7 +3483,7 @@ _Bool fi4a(int *i) {
// AMDGCN_CL_DEF-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_DEF-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi4b(
@@ -3513,7 +3513,7 @@ _Bool fi4a(int *i) {
// AMDGCN_CL_20-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP6]] to i8
// AMDGCN_CL_20-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP7:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi4b(
@@ -3540,7 +3540,7 @@ _Bool fi4a(int *i) {
// NVPTX-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// NVPTX-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// NVPTX-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi4b(
@@ -3567,7 +3567,7 @@ _Bool fi4a(int *i) {
// SPIRV-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// SPIRV-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// SPIRV-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi4b(int *i) {
@@ -3606,7 +3606,7 @@ _Bool fi4b(int *i) {
// AMDGCN_CL_DEF-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_DEF-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi4c(
@@ -3636,7 +3636,7 @@ _Bool fi4b(int *i) {
// AMDGCN_CL_20-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP6]] to i8
// AMDGCN_CL_20-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP7:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi4c(
@@ -3663,7 +3663,7 @@ _Bool fi4b(int *i) {
// NVPTX-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// NVPTX-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// NVPTX-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi4c(
@@ -3690,7 +3690,7 @@ _Bool fi4b(int *i) {
// SPIRV-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// SPIRV-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// SPIRV-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi4c(int *i) {
@@ -3729,7 +3729,7 @@ _Bool fi4c(int *i) {
// AMDGCN_CL_DEF-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_DEF-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi4_clustr(
@@ -3759,7 +3759,7 @@ _Bool fi4c(int *i) {
// AMDGCN_CL_20-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP6]] to i8
// AMDGCN_CL_20-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP7:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi4_clustr(
@@ -3786,7 +3786,7 @@ _Bool fi4c(int *i) {
// NVPTX-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// NVPTX-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// NVPTX-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi4_clustr(
@@ -3813,7 +3813,7 @@ _Bool fi4c(int *i) {
// SPIRV-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// SPIRV-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// SPIRV-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi4_clustr(int *i) {
@@ -3852,7 +3852,7 @@ _Bool fi4_clustr(int *i) {
// AMDGCN_CL_DEF-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_DEF-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi4d(
@@ -3882,7 +3882,7 @@ _Bool fi4_clustr(int *i) {
// AMDGCN_CL_20-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP6]] to i8
// AMDGCN_CL_20-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP7:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi4d(
@@ -3909,7 +3909,7 @@ _Bool fi4_clustr(int *i) {
// NVPTX-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// NVPTX-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// NVPTX-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi4d(
@@ -3936,7 +3936,7 @@ _Bool fi4_clustr(int *i) {
// SPIRV-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// SPIRV-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// SPIRV-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi4d(int *i) {
@@ -3975,7 +3975,7 @@ _Bool fi4d(int *i) {
// AMDGCN_CL_DEF-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_DEF-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi4e(
@@ -4005,7 +4005,7 @@ _Bool fi4d(int *i) {
// AMDGCN_CL_20-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP6]] to i8
// AMDGCN_CL_20-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP7:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi4e(
@@ -4032,7 +4032,7 @@ _Bool fi4d(int *i) {
// NVPTX-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// NVPTX-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// NVPTX-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi4e(
@@ -4059,7 +4059,7 @@ _Bool fi4d(int *i) {
// SPIRV-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// SPIRV-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// SPIRV-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi4e(int *i) {
@@ -4098,7 +4098,7 @@ _Bool fi4e(int *i) {
// AMDGCN_CL_DEF-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_DEF-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi5a(
@@ -4128,7 +4128,7 @@ _Bool fi4e(int *i) {
// AMDGCN_CL_20-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_20-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi5a(
@@ -4155,7 +4155,7 @@ _Bool fi4e(int *i) {
// NVPTX-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// NVPTX-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// NVPTX-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi5a(
@@ -4182,7 +4182,7 @@ _Bool fi4e(int *i) {
// SPIRV-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// SPIRV-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// SPIRV-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi5a(int *i) {
@@ -4220,7 +4220,7 @@ _Bool fi5a(int *i) {
// AMDGCN_CL_DEF-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_DEF-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi5b(
@@ -4250,7 +4250,7 @@ _Bool fi5a(int *i) {
// AMDGCN_CL_20-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_20-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi5b(
@@ -4277,7 +4277,7 @@ _Bool fi5a(int *i) {
// NVPTX-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// NVPTX-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// NVPTX-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi5b(
@@ -4304,7 +4304,7 @@ _Bool fi5a(int *i) {
// SPIRV-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// SPIRV-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// SPIRV-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi5b(int *i) {
@@ -4342,7 +4342,7 @@ _Bool fi5b(int *i) {
// AMDGCN_CL_DEF-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_DEF-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi5c(
@@ -4372,7 +4372,7 @@ _Bool fi5b(int *i) {
// AMDGCN_CL_20-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_20-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi5c(
@@ -4399,7 +4399,7 @@ _Bool fi5b(int *i) {
// NVPTX-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// NVPTX-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// NVPTX-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi5c(
@@ -4426,7 +4426,7 @@ _Bool fi5b(int *i) {
// SPIRV-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// SPIRV-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// SPIRV-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi5c(int *i) {
@@ -4463,7 +4463,7 @@ _Bool fi5c(int *i) {
// AMDGCN_CL_DEF-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_DEF-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi5_clustr(
@@ -4493,7 +4493,7 @@ _Bool fi5c(int *i) {
// AMDGCN_CL_20-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_20-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi5_clustr(
@@ -4520,7 +4520,7 @@ _Bool fi5c(int *i) {
// NVPTX-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// NVPTX-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// NVPTX-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi5_clustr(
@@ -4547,7 +4547,7 @@ _Bool fi5c(int *i) {
// SPIRV-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// SPIRV-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// SPIRV-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi5_clustr(int *i) {
@@ -4584,7 +4584,7 @@ _Bool fi5_clustr(int *i) {
// AMDGCN_CL_DEF-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_DEF-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi5d(
@@ -4614,7 +4614,7 @@ _Bool fi5_clustr(int *i) {
// AMDGCN_CL_20-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_20-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi5d(
@@ -4641,7 +4641,7 @@ _Bool fi5_clustr(int *i) {
// NVPTX-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// NVPTX-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// NVPTX-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi5d(
@@ -4668,7 +4668,7 @@ _Bool fi5_clustr(int *i) {
// SPIRV-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// SPIRV-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// SPIRV-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi5d(int *i) {
@@ -4705,7 +4705,7 @@ _Bool fi5d(int *i) {
// AMDGCN_CL_DEF-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_DEF-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi5e(
@@ -4735,7 +4735,7 @@ _Bool fi5d(int *i) {
// AMDGCN_CL_20-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// AMDGCN_CL_20-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi5e(
@@ -4762,7 +4762,7 @@ _Bool fi5d(int *i) {
// NVPTX-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// NVPTX-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// NVPTX-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi5e(
@@ -4789,7 +4789,7 @@ _Bool fi5d(int *i) {
// SPIRV-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP5]] to i8
// SPIRV-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// SPIRV-NEXT: [[TMP6:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi5e(int *i) {
@@ -5270,7 +5270,7 @@ int fi6e(int *c, int *d) {
// AMDGCN_CL_DEF-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] monotonic, align 1, !amdgpu.no.fine.grained.memory [[META2]], !amdgpu.no.remote.memory [[META2]]
// AMDGCN_CL_DEF-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi7a(
@@ -5289,7 +5289,7 @@ int fi6e(int *c, int *d) {
// AMDGCN_CL_20-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] monotonic, align 1, !amdgpu.no.fine.grained.memory [[META3]], !amdgpu.no.remote.memory [[META3]]
// AMDGCN_CL_20-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi7a(
@@ -5305,7 +5305,7 @@ int fi6e(int *c, int *d) {
// NVPTX-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] monotonic, align 1
// NVPTX-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP]], align 1
// NVPTX-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi7a(
@@ -5321,7 +5321,7 @@ int fi6e(int *c, int *d) {
// SPIRV-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] monotonic, align 1
// SPIRV-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP]], align 1
// SPIRV-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi7a(_Bool *c) {
@@ -5345,7 +5345,7 @@ _Bool fi7a(_Bool *c) {
// AMDGCN_CL_DEF-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("agent") monotonic, align 1, !amdgpu.no.fine.grained.memory [[META2]], !amdgpu.no.remote.memory [[META2]]
// AMDGCN_CL_DEF-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi7b(
@@ -5364,7 +5364,7 @@ _Bool fi7a(_Bool *c) {
// AMDGCN_CL_20-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("agent") monotonic, align 1, !amdgpu.no.fine.grained.memory [[META3]], !amdgpu.no.remote.memory [[META3]]
// AMDGCN_CL_20-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi7b(
@@ -5380,7 +5380,7 @@ _Bool fi7a(_Bool *c) {
// NVPTX-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("device") monotonic, align 1
// NVPTX-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP]], align 1
// NVPTX-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi7b(
@@ -5396,7 +5396,7 @@ _Bool fi7a(_Bool *c) {
// SPIRV-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("device") monotonic, align 1
// SPIRV-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP]], align 1
// SPIRV-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi7b(_Bool *c) {
@@ -5420,7 +5420,7 @@ _Bool fi7b(_Bool *c) {
// AMDGCN_CL_DEF-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("workgroup") monotonic, align 1, !amdgpu.no.fine.grained.memory [[META2]], !amdgpu.no.remote.memory [[META2]]
// AMDGCN_CL_DEF-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi7c(
@@ -5439,7 +5439,7 @@ _Bool fi7b(_Bool *c) {
// AMDGCN_CL_20-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("workgroup") monotonic, align 1, !amdgpu.no.fine.grained.memory [[META3]], !amdgpu.no.remote.memory [[META3]]
// AMDGCN_CL_20-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi7c(
@@ -5455,7 +5455,7 @@ _Bool fi7b(_Bool *c) {
// NVPTX-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("block") monotonic, align 1
// NVPTX-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP]], align 1
// NVPTX-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi7c(
@@ -5471,7 +5471,7 @@ _Bool fi7b(_Bool *c) {
// SPIRV-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("workgroup") monotonic, align 1
// SPIRV-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP]], align 1
// SPIRV-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi7c(_Bool *c) {
@@ -5495,7 +5495,7 @@ _Bool fi7c(_Bool *c) {
// AMDGCN_CL_DEF-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("cluster") monotonic, align 1, !amdgpu.no.fine.grained.memory [[META2]], !amdgpu.no.remote.memory [[META2]]
// AMDGCN_CL_DEF-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi7_clustr(
@@ -5514,7 +5514,7 @@ _Bool fi7c(_Bool *c) {
// AMDGCN_CL_20-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("cluster") monotonic, align 1, !amdgpu.no.fine.grained.memory [[META3]], !amdgpu.no.remote.memory [[META3]]
// AMDGCN_CL_20-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi7_clustr(
@@ -5530,7 +5530,7 @@ _Bool fi7c(_Bool *c) {
// NVPTX-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("cluster") monotonic, align 1
// NVPTX-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP]], align 1
// NVPTX-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi7_clustr(
@@ -5546,7 +5546,7 @@ _Bool fi7c(_Bool *c) {
// SPIRV-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("workgroup") monotonic, align 1
// SPIRV-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP]], align 1
// SPIRV-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi7_clustr(_Bool *c) {
@@ -5570,7 +5570,7 @@ _Bool fi7_clustr(_Bool *c) {
// AMDGCN_CL_DEF-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("wavefront") monotonic, align 1, !amdgpu.no.fine.grained.memory [[META2]], !amdgpu.no.remote.memory [[META2]]
// AMDGCN_CL_DEF-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi7d(
@@ -5589,7 +5589,7 @@ _Bool fi7_clustr(_Bool *c) {
// AMDGCN_CL_20-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("wavefront") monotonic, align 1, !amdgpu.no.fine.grained.memory [[META3]], !amdgpu.no.remote.memory [[META3]]
// AMDGCN_CL_20-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi7d(
@@ -5605,7 +5605,7 @@ _Bool fi7_clustr(_Bool *c) {
// NVPTX-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("block") monotonic, align 1
// NVPTX-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP]], align 1
// NVPTX-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi7d(
@@ -5621,7 +5621,7 @@ _Bool fi7_clustr(_Bool *c) {
// SPIRV-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("subgroup") monotonic, align 1
// SPIRV-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP]], align 1
// SPIRV-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi7d(_Bool *c) {
@@ -5645,7 +5645,7 @@ _Bool fi7d(_Bool *c) {
// AMDGCN_CL_DEF-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("singlethread") monotonic, align 1, !amdgpu.no.fine.grained.memory [[META2]], !amdgpu.no.remote.memory [[META2]]
// AMDGCN_CL_DEF-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP_ASCAST]], align 1
// AMDGCN_CL_DEF-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP_ASCAST]], align 1
-// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// AMDGCN_CL_DEF-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// AMDGCN_CL_DEF-NEXT: ret i1 [[LOADEDV]]
//
// AMDGCN_CL_20-LABEL: define hidden zeroext i1 @fi7e(
@@ -5664,7 +5664,7 @@ _Bool fi7d(_Bool *c) {
// AMDGCN_CL_20-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("singlethread") monotonic, align 1, !amdgpu.no.fine.grained.memory [[META3]], !amdgpu.no.remote.memory [[META3]]
// AMDGCN_CL_20-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP_ASCAST]], align 1
// AMDGCN_CL_20-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP_ASCAST]], align 1
-// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// AMDGCN_CL_20-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// AMDGCN_CL_20-NEXT: ret i1 [[LOADEDV]]
//
// NVPTX-LABEL: define hidden zeroext i1 @fi7e(
@@ -5680,7 +5680,7 @@ _Bool fi7d(_Bool *c) {
// NVPTX-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("singlethread") monotonic, align 1
// NVPTX-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP]], align 1
// NVPTX-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// NVPTX-NEXT: ret i1 [[LOADEDV]]
//
// SPIRV-LABEL: define hidden spir_func zeroext i1 @fi7e(
@@ -5696,7 +5696,7 @@ _Bool fi7d(_Bool *c) {
// SPIRV-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 [[TMP1]] syncscope("singlethread") monotonic, align 1
// SPIRV-NEXT: store i8 [[TMP2]], ptr [[ATOMIC_TEMP]], align 1
// SPIRV-NEXT: [[TMP3:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// SPIRV-NEXT: ret i1 [[LOADEDV]]
//
_Bool fi7e(_Bool *c) {
diff --git a/clang/test/CodeGen/strict-bool.c b/clang/test/CodeGen/strict-bool.c
index b2a0f36b39ae1..aa9267caa9541 100644
--- a/clang/test/CodeGen/strict-bool.c
+++ b/clang/test/CodeGen/strict-bool.c
@@ -39,7 +39,7 @@ int foo(struct has_bool *b) {
}
// CHECK-LABEL: @bar
-int bar(struct has_bool *c) {
+int bar(struct has_bool *b) {
// CHECK-STRICT: [[BITINT:%.+]] = load i8, ptr {{.+}}, !range ![[RANGE_BOOL:[0-9]+]]
// CHECK-STRICT-NOT: and i8 [[BITINT]], 1
// CHECK-STRICT-NOT: icmp ne i8 [[BITINT]], 0
@@ -59,7 +59,7 @@ int bar(struct has_bool *c) {
// CHECK-UBSAN-TRUNCATE-NOT: !range
// CHECK-UBSAN-TRUNCATE: [[BITINT:%.+]] = load i8, ptr {{.+}}
// CHECK-UBSAN-TRUNCATE: icmp ult i8 [[BITINT]], 2
- return c->c;
+ return b->c;
}
// CHECK-LABEL: @vec
diff --git a/clang/test/CodeGen/ubsan-conditional.c b/clang/test/CodeGen/ubsan-conditional.c
index 55c1bd6fad72e..e6ec762f9e642 100644
--- a/clang/test/CodeGen/ubsan-conditional.c
+++ b/clang/test/CodeGen/ubsan-conditional.c
@@ -4,7 +4,7 @@ _Bool b;
// CHECK: @f(
double f(void) {
// CHECK: %[[B:.*]] = load {{.*}} @b
- // CHECK: %[[COND:.*]] = trunc {{.*}} %[[B]] to i1
+ // CHECK: %[[COND:.*]] = icmp ne i8 %[[B]], 0
// CHECK: br i1 %[[COND]]
return b ? 0.0 / 0.0 : 0.0;
}
diff --git a/clang/test/CodeGenCXX/blocks.cpp b/clang/test/CodeGenCXX/blocks.cpp
index a693dbc7f74cb..aa91f2aa5a476 100644
--- a/clang/test/CodeGenCXX/blocks.cpp
+++ b/clang/test/CodeGenCXX/blocks.cpp
@@ -155,7 +155,7 @@ namespace test5 {
// CHECK-NEXT: store i8 [[T0]], ptr [[COND]], align 1
// CHECK-NEXT: call void @_ZN5test51AC1Ev(ptr {{[^,]*}} [[X]])
// CHECK-NEXT: [[T0:%.*]] = load i8, ptr [[COND]], align 1
- // CHECK-NEXT: [[T1:%.*]] = trunc i8 [[T0]] to i1
+ // CHECK-NEXT: [[T1:%.*]] = icmp ne i8 [[T0]], 0
// CHECK-NEXT: store i1 false, ptr [[CLEANUP_ACTIVE]]
// CHECK-NEXT: br i1 [[T1]],
diff --git a/clang/test/CodeGenCXX/builtin-atomic-compare_exchange.cpp b/clang/test/CodeGenCXX/builtin-atomic-compare_exchange.cpp
index 4f1fe9852ce12..f00f4fb444e09 100644
--- a/clang/test/CodeGenCXX/builtin-atomic-compare_exchange.cpp
+++ b/clang/test/CodeGenCXX/builtin-atomic-compare_exchange.cpp
@@ -43,7 +43,7 @@ struct S {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP6]] to i8
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// CHECK-NEXT: [[TMP7:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// CHECK-NEXT: ret i1 [[LOADEDV]]
//
bool test_compare_exchange(_Atomic(S<3>)* a, S<3>* expected, S<3> desired) {
@@ -79,7 +79,7 @@ bool test_compare_exchange(_Atomic(S<3>)* a, S<3>* expected, S<3> desired) {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP6]] to i8
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// CHECK-NEXT: [[TMP7:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// CHECK-NEXT: ret i1 [[LOADEDV]]
//
bool test_compare_exchange(_Atomic(S<4>)* a, S<4>* expected, S<4> desired) {
@@ -122,7 +122,7 @@ bool test_compare_exchange(_Atomic(S<4>)* a, S<4>* expected, S<4> desired) {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP6]] to i8
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[CMPXCHG_BOOL]], align 1
// CHECK-NEXT: [[TMP7:%.*]] = load i8, ptr [[CMPXCHG_BOOL]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// CHECK-NEXT: ret i1 [[LOADEDV]]
//
bool test_compare_exchange(_Atomic(S<6>)* a, S<6>* expected, S<6> desired) {
diff --git a/clang/test/CodeGenCXX/cast-to-ref-bool.cpp b/clang/test/CodeGenCXX/cast-to-ref-bool.cpp
index d7681275c407b..82d15dca10c02 100644
--- a/clang/test/CodeGenCXX/cast-to-ref-bool.cpp
+++ b/clang/test/CodeGenCXX/cast-to-ref-bool.cpp
@@ -3,7 +3,7 @@
// CHECK-LABEL: main
int main(int argc, char **argv) {
// CHECK: load i8, ptr %
- // CHECK-NEXT: trunc i8 %{{.+}} to i1
+ // CHECK-NEXT: icmp ne i8 %{{.+}}, 0
bool b = (bool &)argv[argc][1];
return b;
}
diff --git a/clang/test/CodeGenCXX/exceptions.cpp b/clang/test/CodeGenCXX/exceptions.cpp
index 61cffd1023b88..6c920d7186709 100644
--- a/clang/test/CodeGenCXX/exceptions.cpp
+++ b/clang/test/CodeGenCXX/exceptions.cpp
@@ -221,7 +221,7 @@ namespace test3 {
// CHECK-NEXT: [[SAVED1:%.*]] = alloca ptr
// CHECK-NEXT: [[CLEANUPACTIVE:%.*]] = alloca i1
- // CHECK: [[COND:%.*]] = trunc i8 {{.*}} to i1
+ // CHECK: [[COND:%.*]] = icmp ne i8 {{.*}}, 0
// CHECK-NEXT: store i1 false, ptr [[CLEANUPACTIVE]]
// CHECK-NEXT: br i1 [[COND]]
return (cond ?
@@ -475,7 +475,7 @@ namespace test10 {
// CHECK: invoke void @_ZN6test107cleanupEv()
// CHECK: call ptr @__cxa_begin_catch
// CHECK-NEXT: load i8, ptr @_ZN6test108suppressE, align 1
- // CHECK-NEXT: trunc
+ // CHECK-NEXT: icmp ne
// CHECK-NEXT: br i1
// CHECK98: call void @__cxa_end_catch()
diff --git a/clang/test/CodeGenCXX/ignored-bitfield-conditional.cpp b/clang/test/CodeGenCXX/ignored-bitfield-conditional.cpp
index d5763f49f9542..50ba5c579f8f6 100644
--- a/clang/test/CodeGenCXX/ignored-bitfield-conditional.cpp
+++ b/clang/test/CodeGenCXX/ignored-bitfield-conditional.cpp
@@ -17,7 +17,7 @@ void use(bool cond, struct S s1, struct S s2, int val1, int val2) {
cond ? s1.field1 = val1 : s1.field2 = val2;
// Condition setup, branch.
// CHECK: %[[CONDLD:.+]] = load i8, ptr %[[COND]]
- // CHECK: %[[TO_BOOL:.+]] = trunc i8 %[[CONDLD]] to i1
+ // CHECK: %[[TO_BOOL:.+]] = icmp ne i8 %[[CONDLD]], 0
// CHECK: br i1 %[[TO_BOOL]], label %[[TRUE:.+]], label %[[FALSE:.+]]
// 'True', branch set the BF, branch to 'end'.
@@ -51,7 +51,7 @@ void use(bool cond, struct S s1, struct S s2, int val1, int val2) {
(void)(cond ? s2.field1 = val1 : s2.field2 = val2);
// Condition setup, branch.
// CHECK: %[[CONDLD:.+]] = load i8, ptr %[[COND]]
- // CHECK: %[[TO_BOOL:.+]] = trunc i8 %[[CONDLD]] to i1
+ // CHECK: %[[TO_BOOL:.+]] = icmp ne i8 %[[CONDLD]], 0
// CHECK: br i1 %[[TO_BOOL]], label %[[TRUE:.+]], label %[[FALSE:.+]]
// 'True', branch set the BF, branch to 'end'.
@@ -97,7 +97,7 @@ void use2(bool cond1, bool cond2, struct S s1, int val1, int val2, int val3) {
cond1 ? s1.field1 = val1 : cond2 ? s1.field2 = val2 : s1.field3 = val3;
// First Condition setup, branch.
// CHECK: %[[CONDLD:.+]] = load i8, ptr %[[COND1]]
- // CHECK: %[[TO_BOOL:.+]] = trunc i8 %[[CONDLD]] to i1
+ // CHECK: %[[TO_BOOL:.+]] = icmp ne i8 %[[CONDLD]], 0
// CHECK: br i1 %[[TO_BOOL]], label %[[TRUE:.+]], label %[[FALSE:.+]]
// First 'True' branch, sets field1 to val1.
@@ -114,7 +114,7 @@ void use2(bool cond1, bool cond2, struct S s1, int val1, int val2, int val3) {
// First 'False' branch, starts second ignored expression.
// CHECK: [[FALSE]]:
// CHECK: %[[CONDLD:.+]] = load i8, ptr %[[COND2]]
- // CHECK: %[[TO_BOOL:.+]] = trunc i8 %[[CONDLD]] to i1
+ // CHECK: %[[TO_BOOL:.+]] = icmp ne i8 %[[CONDLD]], 0
// CHECK: br i1 %[[TO_BOOL]], label %[[TRUE2:.+]], label %[[FALSE2:.+]]
// Second 'True' branch, sets field2 to val2.
diff --git a/clang/test/CodeGenCXX/lambda-expressions.cpp b/clang/test/CodeGenCXX/lambda-expressions.cpp
index b929aa0c67513..78fcd7381f3a8 100644
--- a/clang/test/CodeGenCXX/lambda-expressions.cpp
+++ b/clang/test/CodeGenCXX/lambda-expressions.cpp
@@ -78,7 +78,7 @@ int e(E a, E b, bool cond) { return [a,b,cond](){ return (cond ? a : b).x; }();
// CHECK: call void @"_ZZ1e1ES_bEN3$_0D1Ev"
// CHECK-LABEL: define internal noundef i32 @"_ZZ1e1ES_bENK3$_0clEv"
-// CHECK: trunc i8
+// CHECK: icmp ne i8
// CHECK: load i32, ptr
// CHECK: ret i32
diff --git a/clang/test/CodeGenCXX/nrvo.cpp b/clang/test/CodeGenCXX/nrvo.cpp
index 5b0fc914120e3..4f17b0ff23960 100644
--- a/clang/test/CodeGenCXX/nrvo.cpp
+++ b/clang/test/CodeGenCXX/nrvo.cpp
@@ -88,7 +88,7 @@ X test0() { // http://wg21.link/p2025r2#ex-2
// CHECK-NEXT: store i1 false, ptr [[NRVO]], align 1
// CHECK-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK: if.then:
// CHECK-NEXT: store i1 true, ptr [[NRVO]], align 1
@@ -119,7 +119,7 @@ X test0() { // http://wg21.link/p2025r2#ex-2
// CHECK-EH-03-NEXT: store i1 false, ptr [[NRVO]], align 1
// CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
// CHECK-EH-03-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-03-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-03: if.then:
// CHECK-EH-03-NEXT: store i1 true, ptr [[NRVO]], align 1
@@ -150,7 +150,7 @@ X test0() { // http://wg21.link/p2025r2#ex-2
// CHECK-EH-11-NEXT: store i1 false, ptr [[NRVO]], align 1
// CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
// CHECK-EH-11-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-11-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-11: if.then:
// CHECK-EH-11-NEXT: store i1 true, ptr [[NRVO]], align 1
@@ -189,7 +189,7 @@ X test1(bool B) {
// CHECK-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[X]])
// CHECK-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[Y]])
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK: if.then:
// CHECK-NEXT: call void @_ZN1XC1ERKS_(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], ptr noundef nonnull align 1 dereferenceable(1) [[Y]])
@@ -221,7 +221,7 @@ X test1(bool B) {
// CHECK-EH-03-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
// CHECK-EH-03: invoke.cont:
// CHECK-EH-03-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-03-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-03: if.then:
// CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERKS_(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], ptr noundef nonnull align 1 dereferenceable(1) [[Y]])
@@ -295,7 +295,7 @@ X test1(bool B) {
// CHECK-EH-11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
// CHECK-EH-11: invoke.cont:
// CHECK-EH-11-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-11-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-11: if.then:
// CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERKS_(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], ptr noundef nonnull align 1 dereferenceable(1) [[Y]])
@@ -358,7 +358,7 @@ X test2(bool B) {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK: if.then:
// CHECK-NEXT: store i1 false, ptr [[NRVO]], align 1
@@ -395,7 +395,7 @@ X test2(bool B) {
// CHECK-EH-03-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-EH-03-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-03-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-03-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-03: if.then:
// CHECK-EH-03-NEXT: store i1 false, ptr [[NRVO]], align 1
@@ -432,7 +432,7 @@ X test2(bool B) {
// CHECK-EH-11-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-EH-11-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-11-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-11-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-11: if.then:
// CHECK-EH-11-NEXT: store i1 false, ptr [[NRVO]], align 1
@@ -482,7 +482,7 @@ extern "C" void exit(int) throw();
// CHECK-NEXT: store i1 false, ptr [[NRVO]], align 1
// CHECK-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK: if.then:
// CHECK-NEXT: store i1 true, ptr [[NRVO]], align 1
@@ -524,7 +524,7 @@ extern "C" void exit(int) throw();
// CHECK-EH-03-NEXT: store i1 false, ptr [[NRVO]], align 1
// CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
// CHECK-EH-03-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-03-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-03: if.then:
// CHECK-EH-03-NEXT: store i1 true, ptr [[NRVO]], align 1
@@ -566,7 +566,7 @@ extern "C" void exit(int) throw();
// CHECK-EH-11-NEXT: store i1 false, ptr [[NRVO]], align 1
// CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
// CHECK-EH-11-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-11-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-11: if.then:
// CHECK-EH-11-NEXT: store i1 true, ptr [[NRVO]], align 1
@@ -850,7 +850,7 @@ X test6() {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK: if.then:
// CHECK-NEXT: store i1 false, ptr [[NRVO]], align 1
@@ -878,7 +878,7 @@ X test6() {
// CHECK-EH-03-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-EH-03-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-03-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-03-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-03: if.then:
// CHECK-EH-03-NEXT: store i1 false, ptr [[NRVO]], align 1
@@ -906,7 +906,7 @@ X test6() {
// CHECK-EH-11-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-EH-11-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-11-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-11-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-11: if.then:
// CHECK-EH-11-NEXT: store i1 false, ptr [[NRVO]], align 1
@@ -943,7 +943,7 @@ X test7(bool b) {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
// CHECK: if.then:
// CHECK-NEXT: store i1 false, ptr [[NRVO]], align 1
@@ -980,7 +980,7 @@ X test7(bool b) {
// CHECK-EH-03-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-EH-03-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-03-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-03-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
// CHECK-EH-03: if.then:
// CHECK-EH-03-NEXT: store i1 false, ptr [[NRVO]], align 1
@@ -1017,7 +1017,7 @@ X test7(bool b) {
// CHECK-EH-11-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-EH-11-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-11-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-11-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
// CHECK-EH-11: if.then:
// CHECK-EH-11-NEXT: store i1 false, ptr [[NRVO]], align 1
@@ -1096,7 +1096,7 @@ Y<int> test9() {
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[X]])
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
// CHECK: if.then:
// CHECK-NEXT: call void @_ZN1XC1ERKS_(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], ptr noundef nonnull align 1 dereferenceable(1) [[X]])
@@ -1123,7 +1123,7 @@ Y<int> test9() {
// CHECK-EH-03-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[X]])
// CHECK-EH-03-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-03-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
// CHECK-EH-03: if.then:
// CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERKS_(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], ptr noundef nonnull align 1 dereferenceable(1) [[X]])
@@ -1177,7 +1177,7 @@ Y<int> test9() {
// CHECK-EH-11-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[X]])
// CHECK-EH-11-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-11-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
// CHECK-EH-11: if.then:
// CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERKS_(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], ptr noundef nonnull align 1 dereferenceable(1) [[X]])
@@ -1229,7 +1229,7 @@ X test10(bool b) { // http://wg21.link/p2025r2#ex-3
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[X]])
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK: if.then:
// CHECK-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
@@ -1256,7 +1256,7 @@ X test10(bool b) { // http://wg21.link/p2025r2#ex-3
// CHECK-EH-03-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[X]])
// CHECK-EH-03-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-03-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-03: if.then:
// CHECK-EH-03-NEXT: invoke void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
@@ -1310,7 +1310,7 @@ X test10(bool b) { // http://wg21.link/p2025r2#ex-3
// CHECK-EH-11-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[X]])
// CHECK-EH-11-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-11-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-11: if.then:
// CHECK-EH-11-NEXT: invoke void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
@@ -1364,7 +1364,7 @@ X test11(bool b) { // http://wg21.link/p2025r2#ex-5
// CHECK-NEXT: store i1 false, ptr [[NRVO]], align 1
// CHECK-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK: if.then:
// CHECK-NEXT: store i32 2, ptr [[CLEANUP_DEST_SLOT]], align 4
@@ -1407,7 +1407,7 @@ X test11(bool b) { // http://wg21.link/p2025r2#ex-5
// CHECK-EH-03-NEXT: store i1 false, ptr [[NRVO]], align 1
// CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
// CHECK-EH-03-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-03-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-03: if.then:
// CHECK-EH-03-NEXT: store i32 2, ptr [[CLEANUP_DEST_SLOT]], align 4
@@ -1450,7 +1450,7 @@ X test11(bool b) { // http://wg21.link/p2025r2#ex-5
// CHECK-EH-11-NEXT: store i1 false, ptr [[NRVO]], align 1
// CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
// CHECK-EH-11-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-11-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-11: if.then:
// CHECK-EH-11-NEXT: store i32 2, ptr [[CLEANUP_DEST_SLOT]], align 4
@@ -1498,7 +1498,7 @@ X test12(bool b) { // http://wg21.link/p2025r2#ex-6
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK: if.then:
// CHECK-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
@@ -1526,7 +1526,7 @@ X test12(bool b) { // http://wg21.link/p2025r2#ex-6
// CHECK-EH-03-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-EH-03-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-03-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-03-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-03: if.then:
// CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
@@ -1554,7 +1554,7 @@ X test12(bool b) { // http://wg21.link/p2025r2#ex-6
// CHECK-EH-11-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-EH-11-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-11-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-11-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-11: if.then:
// CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]])
@@ -1592,7 +1592,7 @@ X test13(bool b) { // http://wg21.link/p2025r2#ex-7
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[X]])
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK: if.then:
// CHECK-NEXT: call void @_ZN1XC1ERKS_(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], ptr noundef nonnull align 1 dereferenceable(1) [[X]])
@@ -1628,7 +1628,7 @@ X test13(bool b) { // http://wg21.link/p2025r2#ex-7
// CHECK-EH-03-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[X]])
// CHECK-EH-03-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-03-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-03: if.then:
// CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERKS_(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], ptr noundef nonnull align 1 dereferenceable(1) [[X]])
@@ -1693,7 +1693,7 @@ X test13(bool b) { // http://wg21.link/p2025r2#ex-7
// CHECK-EH-11-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[X]])
// CHECK-EH-11-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-11-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-11: if.then:
// CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERKS_(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], ptr noundef nonnull align 1 dereferenceable(1) [[X]])
@@ -1754,7 +1754,7 @@ X test14(bool b) { // http://wg21.link/p2025r2#ex-8
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[X]])
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK: if.then:
// CHECK-NEXT: call void @_ZN1XC1ERKS_(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], ptr noundef nonnull align 1 dereferenceable(1) [[X]])
@@ -1790,7 +1790,7 @@ X test14(bool b) { // http://wg21.link/p2025r2#ex-8
// CHECK-EH-03-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-03-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[X]])
// CHECK-EH-03-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-03-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-03: if.then:
// CHECK-EH-03-NEXT: invoke void @_ZN1XC1ERKS_(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], ptr noundef nonnull align 1 dereferenceable(1) [[X]])
@@ -1855,7 +1855,7 @@ X test14(bool b) { // http://wg21.link/p2025r2#ex-8
// CHECK-EH-11-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-11-NEXT: call void @_ZN1XC1Ev(ptr noundef nonnull align 1 dereferenceable(1) [[X]])
// CHECK-EH-11-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-11-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-11: if.then:
// CHECK-EH-11-NEXT: invoke void @_ZN1XC1ERKS_(ptr noundef nonnull align 1 dereferenceable(1) [[AGG_RESULT]], ptr noundef nonnull align 1 dereferenceable(1) [[X]])
@@ -2740,7 +2740,7 @@ X test22() { // http://wg21.link/p2025r2#ex-19
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK: if.then:
// CHECK-NEXT: store i1 false, ptr [[NRVO]], align 1
@@ -2773,7 +2773,7 @@ X test22() { // http://wg21.link/p2025r2#ex-19
// CHECK-EH-03-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-EH-03-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-03-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-03-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-03-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-03: if.then:
// CHECK-EH-03-NEXT: store i1 false, ptr [[NRVO]], align 1
@@ -2831,7 +2831,7 @@ X test22() { // http://wg21.link/p2025r2#ex-19
// CHECK-EH-11-NEXT: [[STOREDV:%.*]] = zext i1 [[B:%.*]] to i8
// CHECK-EH-11-NEXT: store i8 [[STOREDV]], ptr [[B_ADDR]], align 1
// CHECK-EH-11-NEXT: [[TMP0:%.*]] = load i8, ptr [[B_ADDR]], align 1
-// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-EH-11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-EH-11-NEXT: br i1 [[LOADEDV]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
// CHECK-EH-11: if.then:
// CHECK-EH-11-NEXT: store i1 false, ptr [[NRVO]], align 1
diff --git a/clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptGetter.hlsl b/clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptGetter.hlsl
index 735884911fc06..3e28260a7e512 100644
--- a/clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptGetter.hlsl
+++ b/clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptGetter.hlsl
@@ -223,7 +223,7 @@ int4 AddIntMatrixConstant(int4x4 M) {
// CHECK-NEXT: [[TMP5:%.*]] = add i32 4, [[TMP1]]
// CHECK-NEXT: [[MATRIX_ELEM3:%.*]] = extractelement <6 x i32> [[TMP2]], i32 [[TMP5]]
// CHECK-NEXT: [[MATRIX_ROW_INS4:%.*]] = insertelement <3 x i32> [[MATRIX_ROW_INS2]], i32 [[MATRIX_ELEM3]], i32 2
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc <3 x i32> [[MATRIX_ROW_INS4]] to <3 x i1>
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne <3 x i32> [[MATRIX_ROW_INS4]], zeroinitializer
// CHECK-NEXT: ret <3 x i1> [[LOADEDV]]
//
bool3 getBoolVecMatrixDynamic(bool2x3 M, int index) {
@@ -245,7 +245,7 @@ bool3 getBoolVecMatrixDynamic(bool2x3 M, int index) {
// CHECK-NEXT: [[MATRIX_ROW_INS4:%.*]] = insertelement <4 x i32> [[MATRIX_ROW_INS2]], i32 [[MATRIX_ELEM3]], i32 2
// CHECK-NEXT: [[MATRIX_ELEM5:%.*]] = extractelement <16 x i32> [[TMP1]], i32 12
// CHECK-NEXT: [[MATRIX_ROW_INS6:%.*]] = insertelement <4 x i32> [[MATRIX_ROW_INS4]], i32 [[MATRIX_ELEM5]], i32 3
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc <4 x i32> [[MATRIX_ROW_INS6]] to <4 x i1>
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne <4 x i32> [[MATRIX_ROW_INS6]], zeroinitializer
// CHECK-NEXT: ret <4 x i1> [[LOADEDV]]
//
bool4 getBoolVecMatrixConstant(bool4x4 M) {
@@ -261,7 +261,7 @@ bool4 getBoolVecMatrixConstant(bool4x4 M) {
// CHECK-NEXT: [[TMP1:%.*]] = load <3 x i32>, ptr [[M_ADDR]], align 4
// CHECK-NEXT: [[MATRIX_ELEM:%.*]] = extractelement <3 x i32> [[TMP1]], i32 1
// CHECK-NEXT: [[MATRIX_ROW_INS:%.*]] = insertelement <1 x i32> poison, i32 [[MATRIX_ELEM]], i32 0
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc <1 x i32> [[MATRIX_ROW_INS]] to <1 x i1>
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne <1 x i32> [[MATRIX_ROW_INS]], zeroinitializer
// CHECK-NEXT: [[CAST_VTRUNC:%.*]] = extractelement <1 x i1> [[LOADEDV]], i32 0
// CHECK-NEXT: ret i1 [[CAST_VTRUNC]]
//
diff --git a/clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptSetter.hlsl b/clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptSetter.hlsl
index 8595bb932dac8..0a19557b3df93 100644
--- a/clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptSetter.hlsl
+++ b/clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptSetter.hlsl
@@ -70,7 +70,7 @@ void setMatrixScalar(out float2x1 M, int index, float S) {
// CHECK-NEXT: [[TMP0:%.*]] = zext <4 x i1> [[V]] to <4 x i32>
// CHECK-NEXT: store <4 x i32> [[TMP0]], ptr [[V_ADDR]], align 4
// CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[V_ADDR]], align 4
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc <4 x i32> [[TMP1]] to <4 x i1>
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne <4 x i32> [[TMP1]], zeroinitializer
// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[M_ADDR]], align 4, !nonnull [[META3]], !align [[META4]]
// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[INDEX_ADDR]], align 4
// CHECK-NEXT: [[TMP4:%.*]] = zext <4 x i1> [[LOADEDV]] to <4 x i32>
@@ -107,7 +107,7 @@ void setBoolMatrix(out bool4x4 M, int index, bool4 V) {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[S]] to i32
// CHECK-NEXT: store i32 [[STOREDV]], ptr [[S_ADDR]], align 4
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[S_ADDR]], align 4
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i32 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i32 [[TMP0]], 0
// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <1 x i1> poison, i1 [[LOADEDV]], i64 0
// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <1 x i1> [[SPLAT_SPLATINSERT]], <1 x i1> poison, <1 x i32> zeroinitializer
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 4, !nonnull [[META3]], !align [[META4]]
diff --git a/clang/test/CodeGenHLSL/BasicFeatures/MatrixSplat.hlsl b/clang/test/CodeGenHLSL/BasicFeatures/MatrixSplat.hlsl
index b65bcdf425a20..567a3be2286f7 100644
--- a/clang/test/CodeGenHLSL/BasicFeatures/MatrixSplat.hlsl
+++ b/clang/test/CodeGenHLSL/BasicFeatures/MatrixSplat.hlsl
@@ -69,7 +69,7 @@ void DynamicSplat(float Value) {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[VALUE]] to i32
// CHECK-NEXT: store i32 [[STOREDV]], ptr [[VALUE_ADDR]], align 4
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[VALUE_ADDR]], align 4
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i32 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i32 [[TMP0]], 0
// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <16 x i1> poison, i1 [[LOADEDV]], i64 0
// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i1> [[SPLAT_SPLATINSERT]], <16 x i1> poison, <16 x i32> zeroinitializer
// CHECK-NEXT: [[TMP1:%.*]] = zext <16 x i1> [[SPLAT_SPLAT]] to <16 x i32>
@@ -143,7 +143,7 @@ void ExplicitFloatToBoolCastThenSplat(float2 Value) {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[VALUE]] to i32
// CHECK-NEXT: store i32 [[STOREDV]], ptr [[VALUE_ADDR]], align 4
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[VALUE_ADDR]], align 4
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i32 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i32 [[TMP0]], 0
// CHECK-NEXT: [[CONV:%.*]] = uitofp i1 [[LOADEDV]] to float
// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <6 x float> poison, float [[CONV]], i64 0
// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <6 x float> [[SPLAT_SPLATINSERT]], <6 x float> poison, <6 x i32> zeroinitializer
@@ -180,7 +180,7 @@ void ImplicitFloatToBoolCastThenSplat(float Value) {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[VALUE]] to i32
// CHECK-NEXT: store i32 [[STOREDV]], ptr [[VALUE_ADDR]], align 4
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[VALUE_ADDR]], align 4
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i32 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i32 [[TMP0]], 0
// CHECK-NEXT: [[CONV:%.*]] = uitofp i1 [[LOADEDV]] to float
// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <6 x float> poison, float [[CONV]], i64 0
// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <6 x float> [[SPLAT_SPLATINSERT]], <6 x float> poison, <6 x i32> zeroinitializer
diff --git a/clang/test/CodeGenHLSL/BasicFeatures/MatrixToAndFromVectorConstructors.hlsl b/clang/test/CodeGenHLSL/BasicFeatures/MatrixToAndFromVectorConstructors.hlsl
index 2b3fafef9c496..32cd99ec446a8 100644
--- a/clang/test/CodeGenHLSL/BasicFeatures/MatrixToAndFromVectorConstructors.hlsl
+++ b/clang/test/CodeGenHLSL/BasicFeatures/MatrixToAndFromVectorConstructors.hlsl
@@ -83,15 +83,15 @@ int1x2 fn1(int2 v) {
// CHECK-NEXT: [[TMP0:%.*]] = zext <3 x i1> [[B]] to <3 x i32>
// CHECK-NEXT: store <3 x i32> [[TMP0]], ptr [[B_ADDR]], align 4
// CHECK-NEXT: [[TMP1:%.*]] = load <3 x i32>, ptr [[B_ADDR]], align 4
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc <3 x i32> [[TMP1]] to <3 x i1>
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne <3 x i32> [[TMP1]], zeroinitializer
// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <3 x i1> [[LOADEDV]], i64 0
// CHECK-NEXT: [[VECINIT:%.*]] = insertelement <3 x i1> poison, i1 [[VECEXT]], i32 0
// CHECK-NEXT: [[TMP2:%.*]] = load <3 x i32>, ptr [[B_ADDR]], align 4
-// CHECK-NEXT: [[LOADEDV1:%.*]] = trunc <3 x i32> [[TMP2]] to <3 x i1>
+// CHECK-NEXT: [[LOADEDV1:%.*]] = icmp ne <3 x i32> [[TMP2]], zeroinitializer
// CHECK-NEXT: [[VECEXT2:%.*]] = extractelement <3 x i1> [[LOADEDV1]], i64 1
// CHECK-NEXT: [[VECINIT3:%.*]] = insertelement <3 x i1> [[VECINIT]], i1 [[VECEXT2]], i32 1
// CHECK-NEXT: [[TMP3:%.*]] = load <3 x i32>, ptr [[B_ADDR]], align 4
-// CHECK-NEXT: [[LOADEDV4:%.*]] = trunc <3 x i32> [[TMP3]] to <3 x i1>
+// CHECK-NEXT: [[LOADEDV4:%.*]] = icmp ne <3 x i32> [[TMP3]], zeroinitializer
// CHECK-NEXT: [[VECEXT5:%.*]] = extractelement <3 x i1> [[LOADEDV4]], i64 2
// CHECK-NEXT: [[VECINIT6:%.*]] = insertelement <3 x i1> [[VECINIT3]], i1 [[VECEXT5]], i32 2
// CHECK-NEXT: ret <3 x i1> [[VECINIT6]]
diff --git a/clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl b/clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
index 15dc2e0ed166b..ad227f9fe825e 100644
--- a/clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
+++ b/clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
@@ -198,11 +198,11 @@ export void call8(int3x1 M) {
// CHECK-NEXT: [[TMP2:%.*]] = load <2 x i1>, ptr [[FLATCAST_TMP]], align 4
// CHECK-NEXT: [[TMP3:%.*]] = load <2 x i32>, ptr [[MATRIX_GEP]], align 4
// CHECK-NEXT: [[MATRIXEXT:%.*]] = extractelement <2 x i32> [[TMP3]], i32 0
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i32 [[MATRIXEXT]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i32 [[MATRIXEXT]], 0
// CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i1> [[TMP2]], i1 [[LOADEDV]], i64 0
// CHECK-NEXT: [[TMP5:%.*]] = load <2 x i32>, ptr [[MATRIX_GEP]], align 4
// CHECK-NEXT: [[MATRIXEXT1:%.*]] = extractelement <2 x i32> [[TMP5]], i32 1
-// CHECK-NEXT: [[LOADEDV2:%.*]] = trunc i32 [[MATRIXEXT1]] to i1
+// CHECK-NEXT: [[LOADEDV2:%.*]] = icmp ne i32 [[MATRIXEXT1]], 0
// CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i1> [[TMP4]], i1 [[LOADEDV2]], i64 1
// CHECK-NEXT: [[TMP7:%.*]] = zext <2 x i1> [[TMP6]] to <2 x i32>
// CHECK-NEXT: store <2 x i32> [[TMP7]], ptr [[V]], align 4
@@ -225,11 +225,11 @@ struct BoolVecStruct {
// CHECK-NEXT: [[TMP0:%.*]] = load <2 x i1>, ptr [[FLATCAST_TMP]], align 4
// CHECK-NEXT: [[TMP1:%.*]] = load <2 x i32>, ptr [[VECTOR_GEP]], align 4
// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <2 x i32> [[TMP1]], i32 0
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i32 [[VECEXT]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i32 [[VECEXT]], 0
// CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i1> [[TMP0]], i1 [[LOADEDV]], i64 0
// CHECK-NEXT: [[TMP3:%.*]] = load <2 x i32>, ptr [[VECTOR_GEP]], align 4
// CHECK-NEXT: [[VECEXT1:%.*]] = extractelement <2 x i32> [[TMP3]], i32 1
-// CHECK-NEXT: [[LOADEDV2:%.*]] = trunc i32 [[VECEXT1]] to i1
+// CHECK-NEXT: [[LOADEDV2:%.*]] = icmp ne i32 [[VECEXT1]], 0
// CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i1> [[TMP2]], i1 [[LOADEDV2]], i64 1
// CHECK-NEXT: [[TMP5:%.*]] = zext <2 x i1> [[TMP4]] to <2 x i32>
// CHECK-NEXT: store <2 x i32> [[TMP5]], ptr [[V]], align 4
diff --git a/clang/test/CodeGenHLSL/Bool.hlsl b/clang/test/CodeGenHLSL/Bool.hlsl
index 21328c1f9d4df..4099ccf6b7031 100644
--- a/clang/test/CodeGenHLSL/Bool.hlsl
+++ b/clang/test/CodeGenHLSL/Bool.hlsl
@@ -5,7 +5,7 @@
// CHECK-NEXT: [[Y:%.*]] = zext i1 {{%.*}} to i32
// CHECK-NEXT: store i32 [[Y]], ptr [[X]], align 4
// CHECK-NEXT: [[Z:%.*]] = load i32, ptr [[X]], align 4
-// CHECK-NEXT: [[L:%.*]] = trunc i32 [[Z]] to i1
+// CHECK-NEXT: [[L:%.*]] = icmp ne i32 [[Z]], 0
// CHECK-NEXT: ret i1 [[L]]
bool fn(bool x) {
return x;
diff --git a/clang/test/CodeGenHLSL/BoolMatrix.hlsl b/clang/test/CodeGenHLSL/BoolMatrix.hlsl
index e9841ae6c9a90..0109d6029b5a2 100644
--- a/clang/test/CodeGenHLSL/BoolMatrix.hlsl
+++ b/clang/test/CodeGenHLSL/BoolMatrix.hlsl
@@ -33,11 +33,11 @@ bool fn1() {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[V]] to i32
// CHECK-NEXT: store i32 [[STOREDV]], ptr [[V_ADDR]], align 4
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[V_ADDR]], align 4
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i32 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i32 [[TMP0]], 0
// CHECK-NEXT: [[VECINIT:%.*]] = insertelement <4 x i1> poison, i1 [[LOADEDV]], i32 0
// CHECK-NEXT: [[VECINIT1:%.*]] = insertelement <4 x i1> [[VECINIT]], i1 true, i32 2
// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[V_ADDR]], align 4
-// CHECK-NEXT: [[LOADEDV2:%.*]] = trunc i32 [[TMP1]] to i1
+// CHECK-NEXT: [[LOADEDV2:%.*]] = icmp ne i32 [[TMP1]], 0
// CHECK-NEXT: [[VECINIT3:%.*]] = insertelement <4 x i1> [[VECINIT1]], i1 [[LOADEDV2]], i32 1
// CHECK-NEXT: [[VECINIT4:%.*]] = insertelement <4 x i1> [[VECINIT3]], i1 false, i32 3
// CHECK-NEXT: [[TMP2:%.*]] = zext <4 x i1> [[VECINIT4]] to <4 x i32>
@@ -112,7 +112,7 @@ void fn5() {
// CHECK-NEXT: store i32 0, ptr [[V]], align 4
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[S]], ptr align 1 @__const._Z3fn6v.s, i32 20, i1 false)
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[V]], align 4
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i32 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i32 [[TMP0]], 0
// CHECK-NEXT: [[BM:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[S]], i32 0, i32 0
// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[LOADEDV]] to i32
// CHECK-NEXT: [[TMP2:%.*]] = getelementptr <4 x i32>, ptr [[BM]], i32 0, i32 1
diff --git a/clang/test/CodeGenHLSL/BoolVector.hlsl b/clang/test/CodeGenHLSL/BoolVector.hlsl
index b25b6d0c5529d..3ee605bf536a7 100644
--- a/clang/test/CodeGenHLSL/BoolVector.hlsl
+++ b/clang/test/CodeGenHLSL/BoolVector.hlsl
@@ -13,7 +13,7 @@ struct S {
// CHECK: [[B:%.*]] = alloca <2 x i32>, align 4
// CHECK-NEXT: store <2 x i32> splat (i32 1), ptr [[B]], align 4
// CHECK-NEXT: [[BoolVec:%.*]] = load <2 x i32>, ptr [[B]], align 4
-// CHECK-NEXT: [[L:%.*]] = trunc <2 x i32> [[BoolVec:%.*]] to <2 x i1>
+// CHECK-NEXT: [[L:%.*]] = icmp ne <2 x i32> [[BoolVec:%.*]], zeroinitializer
// CHECK-NEXT: [[VecExt:%.*]] = extractelement <2 x i1> [[L]], i32 0
// CHECK-NEXT: ret i1 [[VecExt]]
bool fn1() {
@@ -27,13 +27,13 @@ bool fn1() {
// CHECK-NEXT: [[StoreV:%.*]] = zext i1 {{.*}} to i32
// CHECK-NEXT: store i32 [[StoreV]], ptr [[VAddr]], align 4
// CHECK-NEXT: [[L:%.*]] = load i32, ptr [[VAddr]], align 4
-// CHECK-NEXT: [[LoadV:%.*]] = trunc i32 [[L]] to i1
+// CHECK-NEXT: [[LoadV:%.*]] = icmp ne i32 [[L]], 0
// CHECK-NEXT: [[Vec:%.*]] = insertelement <2 x i1> poison, i1 [[LoadV]], i32 0
// CHECK-NEXT: [[Vec1:%.*]] = insertelement <2 x i1> [[Vec]], i1 true, i32 1
// CHECK-NEXT: [[Z:%.*]] = zext <2 x i1> [[Vec1]] to <2 x i32>
// CHECK-NEXT: store <2 x i32> [[Z]], ptr [[A]], align 4
// CHECK-NEXT: [[LoadBV:%.*]] = load <2 x i32>, ptr [[A]], align 4
-// CHECK-NEXT: [[LoadV2:%.*]] = trunc <2 x i32> [[LoadBV]] to <2 x i1>
+// CHECK-NEXT: [[LoadV2:%.*]] = icmp ne <2 x i32> [[LoadBV]], zeroinitializer
// CHECK-NEXT: ret <2 x i1> [[LoadV2]]
bool2 fn2(bool V) {
bool2 A = {V,true};
@@ -45,7 +45,7 @@ bool2 fn2(bool V) {
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[s]], ptr align 1 [[ConstS]], i32 12, i1 false)
// CHECK-NEXT: [[BV:%.*]] = getelementptr inbounds nuw %struct.S, ptr [[s]], i32 0, i32 0
// CHECK-NEXT: [[LBV:%.*]] = load <2 x i32>, ptr [[BV]], align 1
-// CHECK-NEXT: [[LV:%.*]] = trunc <2 x i32> [[LBV]] to <2 x i1>
+// CHECK-NEXT: [[LV:%.*]] = icmp ne <2 x i32> [[LBV]], zeroinitializer
// CHECK-NEXT: [[VX:%.*]] = extractelement <2 x i1> [[LV]], i32 0
// CHECK-NEXT: ret i1 [[VX]]
bool fn3() {
@@ -58,7 +58,7 @@ bool fn3() {
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 [[ConstArr]], i32 16, i1 false)
// CHECK-NEXT: [[Idx:%.*]] = getelementptr inbounds [2 x <2 x i32>], ptr [[Arr]], i32 0, i32 0
// CHECK-NEXT: [[L:%.*]] = load <2 x i32>, ptr [[Idx]], align 4
-// CHECK-NEXT: [[LV:%.*]] = trunc <2 x i32> [[L]] to <2 x i1>
+// CHECK-NEXT: [[LV:%.*]] = icmp ne <2 x i32> [[L]], zeroinitializer
// CHECK-NEXT: [[VX:%.*]] = extractelement <2 x i1> [[LV]], i32 1
// CHECK-NEXT: ret i1 [[VX]]
bool fn4() {
@@ -83,7 +83,7 @@ void fn5() {
// CHECK-NEXT: store i32 0, ptr [[V]], align 4
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[S]], ptr align 1 {{.*}}, i32 12, i1 false)
// CHECK-NEXT: [[Y:%.*]] = load i32, ptr [[V]], align 4
-// CHECK-NEXT: [[LV:%.*]] = trunc i32 [[Y]] to i1
+// CHECK-NEXT: [[LV:%.*]] = icmp ne i32 [[Y]], 0
// CHECK-NEXT: [[BV:%.*]] = getelementptr inbounds nuw %struct.S, ptr [[S]], i32 0, i32 0
// CHECK-NEXT: [[Z:%.*]] = zext i1 [[LV]] to i32
// CHECK-NEXT: [[Ptr:%.*]] = getelementptr <2 x i32>, ptr [[BV]], i32 0, i32 1
diff --git a/clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl b/clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
index d416663f02498..2418f35b5281a 100644
--- a/clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
@@ -118,12 +118,12 @@ float2 HowManyFloats(float V) {
// CHECK-NEXT: [[VVal:%.*]] = load i32, ptr [[VAddr]], align 4
// CHECK-NEXT: [[Splat:%.*]] = insertelement <1 x i32> poison, i32 [[VVal]], i64 0
// CHECK-NEXT: [[Vec2:%.*]] = shufflevector <1 x i32> [[Splat]], <1 x i32> poison, <2 x i32> zeroinitializer
-// CHECK-NEXT: [[Trunc:%.*]] = trunc <2 x i32> [[Vec2]] to <2 x i1>
+// CHECK-NEXT: [[Trunc:%.*]] = icmp ne <2 x i32> [[Vec2]], zeroinitializer
// CHECK-NEXT: [[Ext:%.*]] = zext <2 x i1> [[Trunc]] to <2 x i32>
// CHECK-NEXT: store <2 x i32> [[Ext]], ptr [[Vec2Ptr]], align 4
// CHECK-NEXT: [[V2:%.*]] = load <2 x i32>, ptr [[Vec2Ptr]], align 4
// CHECK-NEXT: [[V3:%.*]] = shufflevector <2 x i32> [[V2]], <2 x i32> poison, <2 x i32> zeroinitializer
-// CHECK-NEXT: [[LV1:%.*]] = trunc <2 x i32> [[V3]] to <2 x i1>
+// CHECK-NEXT: [[LV1:%.*]] = icmp ne <2 x i32> [[V3]], zeroinitializer
// CHECK-NEXT: ret <2 x i1> [[LV1]]
bool2 HowManyBools(bool V) {
return V.rr.rr;
@@ -194,20 +194,20 @@ int AssignInt(int V){
// CHECK-NEXT: [[X:%.*]] = load i32, ptr [[VAddr]], align 4
// CHECK-NEXT: [[Splat:%.*]] = insertelement <1 x i32> poison, i32 [[X]], i64 0
// CHECK-NEXT: [[Y:%.*]] = extractelement <1 x i32> [[Splat]], i32 0
-// CHECK-NEXT: [[Z:%.*]] = trunc i32 [[Y]] to i1
+// CHECK-NEXT: [[Z:%.*]] = icmp ne i32 [[Y]], 0
// CHECK-NEXT: [[A:%.*]] = zext i1 [[Z]] to i32
// CHECK-NEXT: store i32 [[A]], ptr [[XAddr]], align 4
// CHECK-NEXT: [[B:%.*]] = load i32, ptr [[VAddr]], align 4
// CHECK-NEXT: [[Splat2:%.*]] = insertelement <1 x i32> poison, i32 [[B]], i64 0
// CHECK-NEXT: [[C:%.*]] = extractelement <1 x i32> [[Splat2]], i32 0
-// CHECK-NEXT: [[D:%.*]] = trunc i32 [[C]] to i1
+// CHECK-NEXT: [[D:%.*]] = icmp ne i32 [[C]], 0
// CHECK-NEXT: br i1 [[D]], label %lor.end, label %lor.rhs
// CHECK: lor.rhs:
// CHECK-NEXT: [[E:%.*]] = load i32, ptr [[VAddr]], align 4
// CHECK-NEXT: [[Splat3:%.*]] = insertelement <1 x i32> poison, i32 [[E]], i64 0
// CHECK-NEXT: [[F:%.*]] = extractelement <1 x i32> [[Splat3]], i32 0
-// CHECK-NEXT: [[G:%.*]] = trunc i32 [[F]] to i1
+// CHECK-NEXT: [[G:%.*]] = icmp ne i32 [[F]], 0
// CHECK-NEXT: br label %lor.end
// CHECK: lor.end:
@@ -215,7 +215,7 @@ int AssignInt(int V){
// CHECK-NEXT: [[J:%.*]] = zext i1 %9 to i32
// CHECK-NEXT: store i32 [[J]], ptr [[XAddr]], align 4
// CHECK-NEXT: [[I:%.*]] = load i32, ptr [[XAddr]], align 4
-// CHECK-NEXT: [[LoadV:%.*]] = trunc i32 [[I]] to i1
+// CHECK-NEXT: [[LoadV:%.*]] = icmp ne i32 [[I]], 0
// CHECK-NEXT: ret i1 [[LoadV]]
bool AssignBool(bool V) {
bool X = V.x;
@@ -232,11 +232,11 @@ bool AssignBool(bool V) {
// CHECK-NEXT: store <1 x i32> splat (i32 1), ptr [[Tmp]], align 4
// CHECK-NEXT: [[Y:%.*]] = load <1 x i32>, ptr [[Tmp]], align 4
// CHECK-NEXT: [[Z:%.*]] = shufflevector <1 x i32> [[Y]], <1 x i32> poison, <2 x i32> zeroinitializer
-// CHECK-NEXT: [[LV:%.*]] = trunc <2 x i32> [[Z]] to <2 x i1>
+// CHECK-NEXT: [[LV:%.*]] = icmp ne <2 x i32> [[Z]], zeroinitializer
// CHECK-NEXT: [[A:%.*]] = zext <2 x i1> [[LV]] to <2 x i32>
// CHECK-NEXT: store <2 x i32> [[A]], ptr [[X]], align 4
// CHECK-NEXT: [[B:%.*]] = load i32, ptr [[VAddr]], align 4
-// CHECK-NEXT: [[LV1:%.*]] = trunc i32 [[B]] to i1
+// CHECK-NEXT: [[LV1:%.*]] = icmp ne i32 [[B]], 0
// CHECK-NEXT: [[D:%.*]] = zext i1 [[LV1]] to i32
// CHECK-NEXT: [[C:%.*]] = getelementptr <2 x i32>, ptr [[X]], i32 0, i32 1
// CHECK-NEXT: store i32 [[D]], ptr [[C]], align 4
@@ -253,7 +253,7 @@ void AssignBool2(bool V) {
// CHECK-NEXT: store <2 x i32> [[Y]], ptr [[VAddr]], align 4
// CHECK-NEXT: store <2 x i32> splat (i32 1), ptr [[X]], align 4
// CHECK-NEXT: [[Z:%.*]] = load <2 x i32>, ptr [[VAddr]], align 4
-// CHECK-NEXT: [[LV:%.*]] = trunc <2 x i32> [[Z]] to <2 x i1>
+// CHECK-NEXT: [[LV:%.*]] = icmp ne <2 x i32> [[Z]], zeroinitializer
// CHECK-NEXT: [[B:%.*]] = zext <2 x i1> [[LV]] to <2 x i32>
// CHECK-NEXT: [[V1:%.*]] = extractelement <2 x i32> [[B]], i32 0
// CHECK-NEXT: store i32 [[V1]], ptr [[X]], align 4
@@ -273,12 +273,12 @@ void AssignBool3(bool2 V) {
// CHECK-NEXT: store <1 x i32> splat (i32 1), ptr [[Tmp]], align 4
// CHECK-NEXT: [[Y:%.*]] = load <1 x i32>, ptr [[Tmp]], align 4
// CHECK-NEXT: [[Z:%.*]] = shufflevector <1 x i32> [[Y]], <1 x i32> poison, <4 x i32> zeroinitializer
-// CHECK-NEXT: [[LV:%.*]] = trunc <4 x i32> [[Z]] to <4 x i1>
+// CHECK-NEXT: [[LV:%.*]] = icmp ne <4 x i32> [[Z]], zeroinitializer
// CHECK-NEXT: [[A:%.*]] = zext <4 x i1> [[LV]] to <4 x i32>
// CHECK-NEXT: store <4 x i32> [[A]], ptr [[X]], align 4
// CHECK-NEXT: [[B:%.*]] = load <4 x i32>, ptr [[X]], align 4
// CHECK-NEXT: [[C:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> poison, <2 x i32> <i32 2, i32 3>
-// CHECK-NEXT: [[LV1:%.*]] = trunc <2 x i32> [[C]] to <2 x i1>
+// CHECK-NEXT: [[LV1:%.*]] = icmp ne <2 x i32> [[C]], zeroinitializer
// CHECK-NEXT: ret <2 x i1> [[LV1]]
bool2 AccessBools() {
bool4 X = true.xxxx;
@@ -292,7 +292,7 @@ bool2 AccessBools() {
// CHECK-NEXT: store <1 x i32> zeroinitializer, ptr [[Tmp]], align 4
// CHECK-NEXT: [[L0:%.*]] = load <1 x i32>, ptr [[Tmp]], align 4
// CHECK-NEXT: [[L1:%.*]] = shufflevector <1 x i32> [[L0]], <1 x i32> poison, <3 x i32> zeroinitializer
-// CHECK-NEXT: [[TruncV:%.*]] = trunc <3 x i32> [[L1]] to <3 x i1>
+// CHECK-NEXT: [[TruncV:%.*]] = icmp ne <3 x i32> [[L1]], zeroinitializer
// CHECK-NEXT: [[L2:%.*]] = zext <3 x i1> [[TruncV]] to <3 x i32>
// CHECK-NEXT: [[V1:%.*]] = extractelement <3 x i32> [[L2]], i32 0
// CHECK-NEXT: store i32 [[V1]], ptr %B, align 4
diff --git a/clang/test/CodeGenHLSL/builtins/VectorElementStore.hlsl b/clang/test/CodeGenHLSL/builtins/VectorElementStore.hlsl
index e0c3aa54aaeba..a7a1a9b3978b3 100644
--- a/clang/test/CodeGenHLSL/builtins/VectorElementStore.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/VectorElementStore.hlsl
@@ -15,7 +15,7 @@ void test_uint4(uint Idx, uint Val) {
// Test local vector element store for bool.
// CHECK: [[COND1:%.*]] = load i32, ptr addrspace(3) @Cond, align 4
-// CHECK: [[COND2:%.*]] = trunc i32 [[COND1]] to i1
+// CHECK: [[COND2:%.*]] = icmp ne i32 [[COND1]], 0
// CHECK: [[IDX:%.*]] = load i32, ptr %Idx.addr, align 4
// CHECK: [[COND3:%.*]] = zext i1 [[COND2]] to i32
// CHECK: [[PTR:%.*]] = getelementptr <3 x i32>, ptr %Val, i32 0, i32 [[IDX]]
diff --git a/clang/test/CodeGenHLSL/builtins/WavePrefixCountBits.hlsl b/clang/test/CodeGenHLSL/builtins/WavePrefixCountBits.hlsl
index 135507b60c8fc..25d9074b08a68 100644
--- a/clang/test/CodeGenHLSL/builtins/WavePrefixCountBits.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/WavePrefixCountBits.hlsl
@@ -16,7 +16,7 @@ int test_int(bool expr) {
// CHECK: %[[STOREDVAL:.*]] = zext i1 %[[EXPR]] to i32
// CHECK: store i32 %[[STOREDVAL]], ptr %[[EXPRADDR]], align 4
// CHECK: %[[LOADEDVAL:.*]] = load i32, ptr %[[EXPRADDR]], align 4
- // CHECK: %[[TRUNCLOADEDVAL:.*]] = trunc i32 %[[LOADEDVAL]] to i1
+ // CHECK: %[[TRUNCLOADEDVAL:.*]] = icmp ne i32 %[[LOADEDVAL]], 0
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.subgroup.prefix.bit.count(i1 %[[TRUNCLOADEDVAL]])
// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.prefix.bit.count(i1 %[[TRUNCLOADEDVAL]])
diff --git a/clang/test/CodeGenHLSL/builtins/dot2add.hlsl b/clang/test/CodeGenHLSL/builtins/dot2add.hlsl
index 3165c24f2a60e..330b759691fa9 100644
--- a/clang/test/CodeGenHLSL/builtins/dot2add.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/dot2add.hlsl
@@ -157,9 +157,9 @@ float test_int64_arg1_arg2_type(int64_t2 p1, int64_t2 p2, float p3) {
// CHECK-LABEL: define {{.*}}test_bool_arg1_arg2_type
float test_bool_arg1_arg2_type(bool2 p1, bool2 p2, float p3) {
- // CHECK: %loadedv = trunc <2 x i32> %{{.*}} to <2 x i1>
+ // CHECK: %loadedv = icmp ne <2 x i32> %{{.*}}, zeroinitializer
// CHECK: %conv = uitofp <2 x i1> %loadedv to <2 x half>
- // CHECK: %loadedv1 = trunc <2 x i32> %{{.*}} to <2 x i1>
+ // CHECK: %loadedv1 = icmp ne <2 x i32> %{{.*}}, zeroinitializer
// CHECK: %conv2 = uitofp <2 x i1> %loadedv1 to <2 x half>
// CHECK-SPIRV: %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}})
// CHECK-SPIRV: %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
diff --git a/clang/test/CodeGenHLSL/strict-bool.hlsl b/clang/test/CodeGenHLSL/strict-bool.hlsl
index deccf6ccf0786..31867065e77a3 100644
--- a/clang/test/CodeGenHLSL/strict-bool.hlsl
+++ b/clang/test/CodeGenHLSL/strict-bool.hlsl
@@ -1,5 +1,6 @@
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -O1 -load-bool-from-mem=truncate -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK-TRUNCATE
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -O1 -load-bool-from-mem=nonzero -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK-NONZERO
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -O0 -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK-NONZERO
typedef bool bool8_t __attribute__((ext_vector_type(8)));
extern bool8_t vec;
diff --git a/clang/test/CodeGenHLSL/vk-features/vk.spec-constant.hlsl b/clang/test/CodeGenHLSL/vk-features/vk.spec-constant.hlsl
index 3f7c59916316d..f90dfd6a5762b 100644
--- a/clang/test/CodeGenHLSL/vk-features/vk.spec-constant.hlsl
+++ b/clang/test/CodeGenHLSL/vk-features/vk.spec-constant.hlsl
@@ -91,7 +91,7 @@ void main() {
// CHECK-NEXT: [[D:%.*]] = alloca double, align 8
// CHECK-NEXT: [[E:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(10) @_ZL10bool_const, align 4
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i32 [[TMP1]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i32 [[TMP1]], 0
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i32
// CHECK-NEXT: store i32 [[STOREDV]], ptr [[B]], align 4
// CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr addrspace(10) @_ZL11short_const, align 2
diff --git a/clang/test/CodeGenObjC/property-atomic-bool.m b/clang/test/CodeGenObjC/property-atomic-bool.m
index 4eb3f1b7cb71c..aac5295999b25 100644
--- a/clang/test/CodeGenObjC/property-atomic-bool.m
+++ b/clang/test/CodeGenObjC/property-atomic-bool.m
@@ -1,20 +1,20 @@
// RUN: %clang_cc1 -triple x86_64-apple-macosx10 -emit-llvm -x objective-c %s -o - | FileCheck %s
-// CHECK: define internal zeroext i1 @"\01-[A0 p]"(
+// CHECK-LABEL: define internal zeroext i1 @"\01-[A0 p]"(
// CHECK: %[[ATOMIC_LOAD:.*]] = load atomic i8, ptr %{{.*}} seq_cst, align 1
-// CHECK: %[[TOBOOL:.*]] = trunc i8 %[[ATOMIC_LOAD]] to i1
+// CHECK: %[[TOBOOL:.*]] = icmp ne i8 %[[ATOMIC_LOAD]], 0
// CHECK: ret i1 %[[TOBOOL]]
-// CHECK: define internal void @"\01-[A0 setP:]"({{.*}} i1 noundef zeroext {{.*}})
+// CHECK-LABEL: define internal void @"\01-[A0 setP:]"({{.*}} i1 noundef zeroext {{.*}})
// CHECK: store atomic i8 %{{.*}}, ptr %{{.*}} seq_cst, align 1
// CHECK: ret void
-// CHECK: define internal zeroext i1 @"\01-[A1 p]"(
+// CHECK-LABEL: define internal zeroext i1 @"\01-[A1 p]"(
// CHECK: %[[ATOMIC_LOAD:.*]] = load atomic i8, ptr %{{.*}} unordered, align 1
-// CHECK: %[[TOBOOL:.*]] = trunc i8 %load to i1
+// CHECK: %[[TOBOOL:.*]] = icmp ne i8 %[[ATOMIC_LOAD]], 0
// CHECK: ret i1 %[[TOBOOL]]
-// CHECK: define internal void @"\01-[A1 setP:]"({{.*}} i1 noundef zeroext %p)
+// CHECK-LABEL: define internal void @"\01-[A1 setP:]"({{.*}} i1 noundef zeroext %p)
// CHECK: store atomic i8 %{{.*}}, ptr %{{.*}} unordered, align 1
// CHECK: ret void
diff --git a/clang/test/CodeGenObjC/strict-bool.m b/clang/test/CodeGenObjC/strict-bool.m
index 9d24bcccc6e1f..0633565a6d917 100644
--- a/clang/test/CodeGenObjC/strict-bool.m
+++ b/clang/test/CodeGenObjC/strict-bool.m
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -load-bool-from-mem=strict -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-TRUNCATE
+// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -load-bool-from-mem=strict -O1 -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-UNDEF
+// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -load-bool-from-mem=strict -O0 -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-NONZERO
// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -load-bool-from-mem=nonstrict -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-NONZERO
// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -load-bool-from-mem=truncate -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-TRUNCATE
// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -load-bool-from-mem=nonzero -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-NONZERO
@@ -12,6 +13,7 @@ @implementation BoolProp
@end
// CHECK-LABEL: -[BoolProp b]
+// CHECK-UNDEF: [[BOOL:%.+]] = trunc nuw i8 %{{.+}} to i1
// CHECK-TRUNCATE: [[BOOL:%.+]] = trunc i8 %{{.+}} to i1
// CHECK-NONZERO: [[BOOL:%.+]] = icmp ne i8 %{{.+}}, 0
// CHECK: ret i1 [[BOOL]]
diff --git a/clang/test/CodeGenObjC/strong-in-c-struct.m b/clang/test/CodeGenObjC/strong-in-c-struct.m
index 36f50aa98561b..8b2a161fd9cbb 100644
--- a/clang/test/CodeGenObjC/strong-in-c-struct.m
+++ b/clang/test/CodeGenObjC/strong-in-c-struct.m
@@ -470,7 +470,7 @@ void test_copy_assignment_StrongBlock(StrongBlock *d, StrongBlock *s) {
// CHECK: %[[ADDR_CUR1:.*]] = phi ptr
// CHECK: %[[V6:.*]] = load volatile i8, ptr %[[ADDR_CUR1]], align 1
-// CHECK: %[[TOBOOL:.*]] = trunc i8 %[[V6]] to i1
+// CHECK: %[[TOBOOL:.*]] = icmp ne i8 %[[V6]], 0
// CHECK: %[[FROMBOOL:.*]] = zext i1 %[[TOBOOL]] to i8
// CHECK: store volatile i8 %[[FROMBOOL]], ptr %[[ADDR_CUR]], align 1
diff --git a/clang/test/CodeGenOpenCL/bool_cast.cl b/clang/test/CodeGenOpenCL/bool_cast.cl
index d17dc0d20023d..38db043bc3176 100644
--- a/clang/test/CodeGenOpenCL/bool_cast.cl
+++ b/clang/test/CodeGenOpenCL/bool_cast.cl
@@ -9,14 +9,14 @@ void kernel ker() {
bool t = true;
int4 vec4 = (int4)t;
// CHECK: {{%.*}} = load i8, ptr %t, align 1
-// CHECK: {{%.*}} = trunc i8 {{%.*}} to i1
+// CHECK: {{%.*}} = icmp ne i8 {{%.*}}, 0
// CHECK: {{%.*}} = sext i1 {{%.*}} to i32
// CHECK: {{%.*}} = insertelement <4 x i32> poison, i32 {{%.*}}, i64 0
// CHECK: {{%.*}} = shufflevector <4 x i32> {{%.*}}, <4 x i32> poison, <4 x i32> zeroinitializer
// CHECK: store <4 x i32> {{%.*}}, ptr %vec4, align 16
int i = (int)t;
// CHECK: {{%.*}} = load i8, ptr %t, align 1
-// CHECK: {{%.*}} = trunc i8 {{%.*}} to i1
+// CHECK: {{%.*}} = icmp ne i8 {{%.*}}, 0
// CHECK: {{%.*}} = zext i1 {{%.*}} to i32
// CHECK: store i32 {{%.*}}, ptr %i, align 4
diff --git a/clang/test/DebugInfo/KeyInstructions/atomic.c b/clang/test/DebugInfo/KeyInstructions/atomic.c
index 37355d0f6edb6..8042b3bcc01dd 100644
--- a/clang/test/DebugInfo/KeyInstructions/atomic.c
+++ b/clang/test/DebugInfo/KeyInstructions/atomic.c
@@ -32,8 +32,8 @@ void fun() {
// CHECK-NEXT: %tobool = icmp ne i8 %6, 0, !dbg [[LINE30_G7R3:!.*]]
// CHECK-NEXT: %storedv = zext i1 %tobool to i8, !dbg [[LINE30_G7R2:!.*]]
// CHECK-NEXT: store i8 %storedv, ptr %atomic-temp3, align 1, !dbg [[LINE30_G7R1:!.*]]
-// CHECK-NEXT: %7 = load i8, ptr %atomic-temp3, align 1, !dbg [[LINE30_G6R4:!.*]]
-// CHECK-NEXT: %loadedv = trunc i8 %7 to i1, !dbg [[LINE30_G6R3:!.*]]
+// CHECK-NEXT: %7 = load i8, ptr %atomic-temp3, align 1, !dbg [[LINE30]]
+// CHECK-NEXT: %loadedv = icmp ne i8 %7, 0, !dbg [[LINE30_G6R3:!.*]]
// CHECK-NEXT: %conv = zext i1 %loadedv to i32, !dbg [[LINE30_G6R2:!.*]]
// CHECK-NEXT: store i32 %conv, ptr %r3, align 4, !dbg [[LINE30_G6R1:!.*]]
@@ -61,8 +61,8 @@ void fun() {
// CHECK: cmpxchg.continue:
// CHECK-NEXT: %storedv6 = zext i1 %15 to i8, !dbg [[LINE51_G12R2]]
// CHECK-NEXT: store i8 %storedv6, ptr %cmpxchg.bool, align 1, !dbg [[LINE51_G12R1]]
-// CHECK-NEXT: %16 = load i8, ptr %cmpxchg.bool, align 1, !dbg [[LINE51_G11R4:!.*]]
-// CHECK-NEXT: %loadedv7 = trunc i8 %16 to i1, !dbg [[LINE51_G11R3:!.*]]
+// CHECK-NEXT: %16 = load i8, ptr %cmpxchg.bool, align 1, !dbg [[LINE51]]
+// CHECK-NEXT: %loadedv7 = icmp ne i8 %16, 0, !dbg [[LINE51_G11R3:!.*]]
// CHECK-NEXT: %conv8 = zext i1 %loadedv7 to i32, !dbg [[LINE51_G11R2:!.*]]
// CHECK-NEXT: store i32 %conv8, ptr %r5, align 4, !dbg [[LINE51_G11R1:!.*]]
@@ -80,8 +80,8 @@ void fun() {
// CHECK: cmpxchg.continue12:
// CHECK-NEXT: %storedv13 = zext i1 %21 to i8, !dbg [[LINE69_G14R2]]
// CHECK-NEXT: store i8 %storedv13, ptr %cmpxchg.bool10, align 1, !dbg [[LINE69_G14R1:!.*]]
-// CHECK-NEXT: %22 = load i8, ptr %cmpxchg.bool10, align 1, !dbg [[LINE69_G13R4:!.*]]
-// CHECK-NEXT: %loadedv14 = trunc i8 %22 to i1, !dbg [[LINE69_G13R3:!.*]]
+// CHECK-NEXT: %22 = load i8, ptr %cmpxchg.bool10, align 1, !dbg [[LINE69]]
+// CHECK-NEXT: %loadedv14 = icmp ne i8 %22, 0, !dbg [[LINE69_G13R3:!.*]]
// CHECK-NEXT: %conv15 = zext i1 %loadedv14 to i32, !dbg [[LINE69_G13R2:!.*]]
// CHECK-NEXT: store i32 %conv15, ptr %r6, align 4, !dbg [[LINE69_G13R1:!.*]]
@@ -99,8 +99,8 @@ void fun() {
// CHECK: cmpxchg.continue19:
// CHECK-NEXT: %storedv20 = zext i1 %27 to i8, !dbg [[LINE88_G16R2]]
// CHECK-NEXT: store i8 %storedv20, ptr %cmpxchg.bool17, align 1, !dbg [[LINE88_G16R1]]
-// CHECK-NEXT: %28 = load i8, ptr %cmpxchg.bool17, align 1, !dbg [[LINE88_G15R4:!.*]]
-// CHECK-NEXT: %loadedv21 = trunc i8 %28 to i1, !dbg [[LINE88_G15R3:!.*]]
+// CHECK-NEXT: %28 = load i8, ptr %cmpxchg.bool17, align 1, !dbg [[LINE88]]
+// CHECK-NEXT: %loadedv21 = icmp ne i8 %28, 0, !dbg [[LINE88_G15R3:!.*]]
// CHECK-NEXT: %conv22 = zext i1 %loadedv21 to i32, !dbg [[LINE88_G15R2:!.*]]
// CHECK-NEXT: store i32 %conv22, ptr %r7, align 4, !dbg [[LINE88_G15R1:!.*]]
@@ -125,7 +125,6 @@ void fun() {
// CHECK: [[LINE30_G7R3]] = !DILocation(line: 30, scope: ![[#]], atomGroup: 7, atomRank: 3)
// CHECK: [[LINE30_G7R2]] = !DILocation(line: 30, scope: ![[#]], atomGroup: 7, atomRank: 2)
// CHECK: [[LINE30_G7R1]] = !DILocation(line: 30, scope: ![[#]], atomGroup: 7, atomRank: 1)
-// CHECK: [[LINE30_G6R4]] = !DILocation(line: 30, scope: ![[#]], atomGroup: 6, atomRank: 4)
// CHECK: [[LINE30_G6R3]] = !DILocation(line: 30, scope: ![[#]], atomGroup: 6, atomRank: 3)
// CHECK: [[LINE30_G6R2]] = !DILocation(line: 30, scope: ![[#]], atomGroup: 6, atomRank: 2)
// CHECK: [[LINE30_G6R1]] = !DILocation(line: 30, scope: ![[#]], atomGroup: 6, atomRank: 1)
@@ -142,7 +141,6 @@ void fun() {
// CHECK: [[LINE51_G12R2]] = !DILocation(line: 51, scope: ![[#]], atomGroup: 12, atomRank: 2)
// CHECK: [[LINE51_G12R3]] = !DILocation(line: 51, scope: ![[#]], atomGroup: 12, atomRank: 3)
// CHECK: [[LINE51_G12R1]] = !DILocation(line: 51, scope: ![[#]], atomGroup: 12, atomRank: 1)
-// CHECK: [[LINE51_G11R4]] = !DILocation(line: 51, scope: ![[#]], atomGroup: 11, atomRank: 4)
// CHECK: [[LINE51_G11R3]] = !DILocation(line: 51, scope: ![[#]], atomGroup: 11, atomRank: 3)
// CHECK: [[LINE51_G11R2]] = !DILocation(line: 51, scope: ![[#]], atomGroup: 11, atomRank: 2)
// CHECK: [[LINE51_G11R1]] = !DILocation(line: 51, scope: ![[#]], atomGroup: 11, atomRank: 1)
@@ -151,7 +149,6 @@ void fun() {
// CHECK: [[LINE69]] = !DILocation(line: 69, scope: ![[#]])
// CHECK: [[LINE69_G14R2]] = !DILocation(line: 69, scope: ![[#]], atomGroup: 14, atomRank: 2)
// CHECK: [[LINE69_G14R3]] = !DILocation(line: 69, scope: ![[#]], atomGroup: 14, atomRank: 3)
-// CHECK: [[LINE69_G13R4]] = !DILocation(line: 69, scope: ![[#]], atomGroup: 13, atomRank: 4)
// CHECK: [[LINE69_G13R3]] = !DILocation(line: 69, scope: ![[#]], atomGroup: 13, atomRank: 3)
// CHECK: [[LINE69_G13R2]] = !DILocation(line: 69, scope: ![[#]], atomGroup: 13, atomRank: 2)
// CHECK: [[LINE69_G13R1]] = !DILocation(line: 69, scope: ![[#]], atomGroup: 13, atomRank: 1)
@@ -160,7 +157,6 @@ void fun() {
// CHECK: [[LINE88]] = !DILocation(line: 88, scope: ![[#]])
// CHECK: [[LINE88_G16R2]] = !DILocation(line: 88, scope: ![[#]], atomGroup: 16, atomRank: 2)
// CHECK: [[LINE88_G16R3]] = !DILocation(line: 88, scope: ![[#]], atomGroup: 16, atomRank: 3)
-// CHECK: [[LINE88_G15R4]] = !DILocation(line: 88, scope: ![[#]], atomGroup: 15, atomRank: 4)
// CHECK: [[LINE88_G15R3]] = !DILocation(line: 88, scope: ![[#]], atomGroup: 15, atomRank: 3)
// CHECK: [[LINE88_G15R2]] = !DILocation(line: 88, scope: ![[#]], atomGroup: 15, atomRank: 2)
// CHECK: [[LINE88_G15R1]] = !DILocation(line: 88, scope: ![[#]], atomGroup: 15, atomRank: 1)
diff --git a/clang/test/Frontend/fixed_point_add.c b/clang/test/Frontend/fixed_point_add.c
index 757b68cb6e73c..ff54c55aaa5f9 100644
--- a/clang/test/Frontend/fixed_point_add.c
+++ b/clang/test/Frontend/fixed_point_add.c
@@ -405,7 +405,7 @@ void int_lflfui(void) {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4
// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @b, align 1
-// CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK-NEXT: [[CONV:%.*]] = zext i1 [[TOBOOL]] to i32
// CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i47
// CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[CONV]] to i47
diff --git a/clang/test/Frontend/fixed_point_comparisons.c b/clang/test/Frontend/fixed_point_comparisons.c
index 39e62bce51e2b..3e795b9cff2b4 100644
--- a/clang/test/Frontend/fixed_point_comparisons.c
+++ b/clang/test/Frontend/fixed_point_comparisons.c
@@ -252,7 +252,7 @@ void TestIntComparisons(void) {
sa == b;
// CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2
// CHECK-NEXT: [[B:%[0-9]+]] = load i8, ptr %b, align 1
- // CHECK-NEXT: %loadedv = trunc i8 [[B]] to i1
+ // CHECK-NEXT: %loadedv = icmp ne i8 [[B]], 0
// CHECK-NEXT: [[CONV_B:%[a-z0-9]+]] = zext i1 %loadedv to i32
// CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i39
// CHECK-NEXT: [[RESIZE_B:%[a-z0-9]+]] = sext i32 [[CONV_B]] to i39
diff --git a/clang/test/Frontend/fixed_point_div.c b/clang/test/Frontend/fixed_point_div.c
index 1bb7e2f8db1fd..9f67b2c65a3ba 100644
--- a/clang/test/Frontend/fixed_point_div.c
+++ b/clang/test/Frontend/fixed_point_div.c
@@ -445,7 +445,7 @@ void int_lflfui(void) {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4
// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @b, align 1
-// CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK-NEXT: [[CONV:%.*]] = zext i1 [[TOBOOL]] to i32
// CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i47
// CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[CONV]] to i47
diff --git a/clang/test/Frontend/fixed_point_mul.c b/clang/test/Frontend/fixed_point_mul.c
index e9e802fdf724d..8f05ba27860e1 100644
--- a/clang/test/Frontend/fixed_point_mul.c
+++ b/clang/test/Frontend/fixed_point_mul.c
@@ -445,7 +445,7 @@ void int_lflfui(void) {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4
// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @b, align 1
-// CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK-NEXT: [[CONV:%.*]] = zext i1 [[TOBOOL]] to i32
// CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i47
// CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[CONV]] to i47
diff --git a/clang/test/Frontend/fixed_point_sub.c b/clang/test/Frontend/fixed_point_sub.c
index fb330afe1003b..9b9a3867bc57e 100644
--- a/clang/test/Frontend/fixed_point_sub.c
+++ b/clang/test/Frontend/fixed_point_sub.c
@@ -405,7 +405,7 @@ void int_lflfui(void) {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4
// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @b, align 1
-// CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK-NEXT: [[CONV:%.*]] = zext i1 [[TOBOOL]] to i32
// CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i47
// CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[CONV]] to i47
diff --git a/clang/test/Headers/gpuintrin.c b/clang/test/Headers/gpuintrin.c
index ac87ea785a527..8b6851c3bf084 100644
--- a/clang/test/Headers/gpuintrin.c
+++ b/clang/test/Headers/gpuintrin.c
@@ -440,7 +440,7 @@ __gpu_kernel void foo() {
// AMDGPU-NEXT: store i8 [[STOREDV]], ptr [[__X_ADDR_ASCAST]], align 1
// AMDGPU-NEXT: [[TMP0:%.*]] = load i64, ptr [[__LANE_MASK_ADDR_ASCAST]], align 8
// AMDGPU-NEXT: [[TMP1:%.*]] = load i8, ptr [[__X_ADDR_ASCAST]], align 1
-// AMDGPU-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// AMDGPU-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// AMDGPU-NEXT: [[TMP2:%.*]] = call i64 @llvm.amdgcn.ballot.i64(i1 [[LOADEDV]])
// AMDGPU-NEXT: [[AND:%.*]] = and i64 [[TMP0]], [[TMP2]]
// AMDGPU-NEXT: ret i64 [[AND]]
@@ -975,7 +975,7 @@ __gpu_kernel void foo() {
// NVPTX-NEXT: store i32 [[CONV]], ptr [[__MASK]], align 4
// NVPTX-NEXT: [[TMP1:%.*]] = load i32, ptr [[__MASK]], align 4
// NVPTX-NEXT: [[TMP2:%.*]] = load i8, ptr [[__X_ADDR]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// NVPTX-NEXT: [[TMP3:%.*]] = call i32 @llvm.nvvm.vote.ballot.sync(i32 [[TMP1]], i1 [[LOADEDV]])
// NVPTX-NEXT: [[CONV1:%.*]] = zext i32 [[TMP3]] to i64
// NVPTX-NEXT: ret i64 [[CONV1]]
@@ -1024,7 +1024,7 @@ __gpu_kernel void foo() {
// NVPTX-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// NVPTX-NEXT: store i8 [[STOREDV]], ptr [[__BITMASK]], align 1
// NVPTX-NEXT: [[TMP3:%.*]] = load i8, ptr [[__BITMASK]], align 1
-// NVPTX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// NVPTX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// NVPTX-NEXT: [[CONV1:%.*]] = zext i1 [[LOADEDV]] to i32
// NVPTX-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[CONV1]]
// NVPTX-NEXT: [[TMP4:%.*]] = load i32, ptr [[__MASK]], align 4
@@ -1513,7 +1513,7 @@ __gpu_kernel void foo() {
// SPIRV-NEXT: [[STOREDV:%.*]] = zext i1 [[__X]] to i8
// SPIRV-NEXT: store i8 [[STOREDV]], ptr [[__X_ADDR]], align 1
// SPIRV-NEXT: [[TMP0:%.*]] = load i8, ptr [[__X_ADDR]], align 1
-// SPIRV-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// SPIRV-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// SPIRV-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.spv.subgroup.ballot(i1 [[LOADEDV]])
// SPIRV-NEXT: store <4 x i32> [[TMP1]], ptr [[__MASK]], align 16
// SPIRV-NEXT: [[TMP2:%.*]] = load i64, ptr [[__LANE_MASK_ADDR]], align 8
diff --git a/clang/test/Headers/openmp-device-functions-bool.c b/clang/test/Headers/openmp-device-functions-bool.c
index 3d5ea9009c1d9..f53b59794ab60 100644
--- a/clang/test/Headers/openmp-device-functions-bool.c
+++ b/clang/test/Headers/openmp-device-functions-bool.c
@@ -35,7 +35,7 @@ typedef _Bool ockl_bool;
// CHECK-NEXT: [[TMP1:%.*]] = load <2 x half>, ptr [[B_ADDR_ASCAST]], align 4
// CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[C_ADDR_ASCAST]], align 4
// CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr [[S_ADDR_ASCAST]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// CHECK-NEXT: [[CALL:%.*]] = call float @__ockl_fdot2(<2 x half> noundef [[TMP0]], <2 x half> noundef [[TMP1]], float noundef [[TMP2]], i1 noundef zeroext [[LOADEDV]]) #[[ATTR2:[0-9]+]]
// CHECK-NEXT: ret float [[CALL]]
//
diff --git a/clang/test/OpenMP/atomic_capture_codegen.cpp b/clang/test/OpenMP/atomic_capture_codegen.cpp
index 77312c2dac708..ccafdd60e158c 100644
--- a/clang/test/OpenMP/atomic_capture_codegen.cpp
+++ b/clang/test/OpenMP/atomic_capture_codegen.cpp
@@ -331,7 +331,7 @@ int main(void) {
#pragma omp atomic capture seq_cst
{cdx = cdx - cdv; cfv = cdx;}
// CHECK: [[BV:%.+]] = load i8, ptr @{{.+}}
-// CHECK: [[BOOL:%.+]] = trunc i8 [[BV]] to i1
+// CHECK: [[BOOL:%.+]] = icmp ne i8 [[BV]], 0
// CHECK: [[EXPR:%.+]] = zext i1 [[BOOL]] to i64
// CHECK: [[OLD:%.+]] = atomicrmw and ptr @{{.+}}, i64 [[EXPR]] monotonic, align 8
// CHECK: [[DESIRED:%.+]] = and i64 [[OLD]], [[EXPR]]
@@ -344,7 +344,7 @@ int main(void) {
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
-// CHECK: [[OLD_BOOL:%.+]] = trunc i8 [[EXPECTED]] to i1
+// CHECK: [[OLD_BOOL:%.+]] = icmp ne i8 [[EXPECTED]], 0
// CHECK: [[X_RVAL:%.+]] = zext i1 [[OLD_BOOL]] to i32
// CHECK: [[AND:%.+]] = and i32 [[EXPR]], [[X_RVAL]]
// CHECK: [[CAST:%.+]] = icmp ne i32 [[AND]], 0
@@ -549,7 +549,7 @@ int main(void) {
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
-// CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1
+// CHECK: [[BOOL_EXPECTED:%.+]] = icmp ne i8 [[EXPECTED]], 0
// CHECK: [[CONV:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32
// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to x86_fp80
// CHECK: [[MUL:%.+]] = fmul x86_fp80 [[EXPR]], [[X_RVAL]]
@@ -572,7 +572,7 @@ int main(void) {
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
-// CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1
+// CHECK: [[BOOL_EXPECTED:%.+]] = icmp ne i8 [[EXPECTED]], 0
// CHECK: [[X_RVAL:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32
// CHECK: [[SUB_RE:%.+]] = sub i32 [[EXPR_RE:%.+]], [[X_RVAL]]
// CHECK: [[SUB_IM:%.+]] = sub i32 [[EXPR_IM:%.+]], 0
diff --git a/clang/test/OpenMP/atomic_update_codegen.cpp b/clang/test/OpenMP/atomic_update_codegen.cpp
index eeb7657ca90d3..a3a4df4cb2200 100644
--- a/clang/test/OpenMP/atomic_update_codegen.cpp
+++ b/clang/test/OpenMP/atomic_update_codegen.cpp
@@ -289,7 +289,7 @@ int main(void) {
#pragma omp atomic seq_cst
cdx = cdx - cdv;
// CHECK: [[BV:%.+]] = load i8, ptr @{{.+}}
-// CHECK: [[BOOL:%.+]] = trunc i8 [[BV]] to i1
+// CHECK: [[BOOL:%.+]] = icmp ne i8 [[BV]], 0
// CHECK: [[EXPR:%.+]] = zext i1 [[BOOL]] to i64
// CHECK: atomicrmw and ptr @{{.+}}, i64 [[EXPR]] monotonic, align 8
#pragma omp atomic update
@@ -300,7 +300,7 @@ int main(void) {
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[BX]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
-// CHECK: [[OLD:%.+]] = trunc i8 [[EXPECTED]] to i1
+// CHECK: [[OLD:%.+]] = icmp ne i8 [[EXPECTED]], 0
// CHECK: [[X_RVAL:%.+]] = zext i1 [[OLD]] to i32
// CHECK: [[AND:%.+]] = and i32 [[EXPR]], [[X_RVAL]]
// CHECK: [[CAST:%.+]] = icmp ne i32 [[AND]], 0
@@ -487,7 +487,7 @@ int main(void) {
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_XI8:%.+]], %[[CONT]] ]
-// CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1
+// CHECK: [[BOOL_EXPECTED:%.+]] = icmp ne i8 [[EXPECTED]], 0
// CHECK: [[CONV:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32
// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to x86_fp80
// CHECK: [[MUL:%.+]] = fmul x86_fp80 [[EXPR]], [[X_RVAL]]
@@ -509,7 +509,7 @@ int main(void) {
// CHECK: br label %[[CONT:.+]]
// CHECK: [[CONT]]
// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_XI8:%.+]], %[[CONT]] ]
-// CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1
+// CHECK: [[BOOL_EXPECTED:%.+]] = icmp ne i8 [[EXPECTED]], 0
// CHECK: [[X_RVAL:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32
// CHECK: [[SUB_RE:%.+]] = sub i32 [[EXPR_RE:%.+]], [[X_RVAL]]
// CHECK: [[SUB_IM:%.+]] = sub i32 [[EXPR_IM:%.+]], 0
diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
index 55db1b2bdbf49..ef19a2830d385 100644
--- a/clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
+++ b/clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
@@ -2752,7 +2752,7 @@ int main() {
// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
// CHECK3-NEXT: [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -2767,12 +2767,12 @@ int main() {
// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
// CHECK3-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
// CHECK3-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP44]]
-// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP14]] to i1
+// CHECK3-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP14]], 0
// CHECK3-NEXT: [[STOREDV3:%.*]] = zext i1 [[LOADEDV2]] to i8
// CHECK3-NEXT: store i8 [[STOREDV3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP44]]
// CHECK3-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP44]]
// CHECK3-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP44]]
-// CHECK3-NEXT: [[LOADEDV4:%.*]] = trunc i8 [[TMP16]] to i1
+// CHECK3-NEXT: [[LOADEDV4:%.*]] = icmp ne i8 [[TMP16]], 0
// CHECK3-NEXT: br i1 [[LOADEDV4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then5:
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined, i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]), !llvm.access.group [[ACC_GRP44]]
@@ -2807,12 +2807,12 @@ int main() {
// CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
// CHECK3-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64
// CHECK3-NEXT: [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP26]] to i1
+// CHECK3-NEXT: [[LOADEDV10:%.*]] = icmp ne i8 [[TMP26]], 0
// CHECK3-NEXT: [[STOREDV12:%.*]] = zext i1 [[LOADEDV10]] to i8
// CHECK3-NEXT: store i8 [[STOREDV12]], ptr [[DOTCAPTURE_EXPR__CASTED11]], align 1
// CHECK3-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED11]], align 8
// CHECK3-NEXT: [[TMP28:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV13:%.*]] = trunc i8 [[TMP28]] to i1
+// CHECK3-NEXT: [[LOADEDV13:%.*]] = icmp ne i8 [[TMP28]], 0
// CHECK3-NEXT: br i1 [[LOADEDV13]], label [[OMP_IF_THEN14:%.*]], label [[OMP_IF_ELSE15:%.*]]
// CHECK3: omp_if.then14:
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.7, i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]])
@@ -2879,7 +2879,7 @@ int main() {
// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -3006,7 +3006,7 @@ int main() {
// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -4164,7 +4164,7 @@ int main() {
// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
// CHECK7-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
// CHECK7-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK7-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i1
+// CHECK7-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP12]], 0
// CHECK7-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK7: omp_if.then:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
@@ -6955,7 +6955,7 @@ int main() {
// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
// CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
// CHECK11-NEXT: [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -6970,12 +6970,12 @@ int main() {
// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
// CHECK11-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
// CHECK11-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP44]]
-// CHECK11-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP14]] to i1
+// CHECK11-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP14]], 0
// CHECK11-NEXT: [[STOREDV3:%.*]] = zext i1 [[LOADEDV2]] to i8
// CHECK11-NEXT: store i8 [[STOREDV3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP44]]
// CHECK11-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP44]]
// CHECK11-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP44]]
-// CHECK11-NEXT: [[LOADEDV4:%.*]] = trunc i8 [[TMP16]] to i1
+// CHECK11-NEXT: [[LOADEDV4:%.*]] = icmp ne i8 [[TMP16]], 0
// CHECK11-NEXT: br i1 [[LOADEDV4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then5:
// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined, i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]), !llvm.access.group [[ACC_GRP44]]
@@ -7010,12 +7010,12 @@ int main() {
// CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
// CHECK11-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64
// CHECK11-NEXT: [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP26]] to i1
+// CHECK11-NEXT: [[LOADEDV10:%.*]] = icmp ne i8 [[TMP26]], 0
// CHECK11-NEXT: [[STOREDV12:%.*]] = zext i1 [[LOADEDV10]] to i8
// CHECK11-NEXT: store i8 [[STOREDV12]], ptr [[DOTCAPTURE_EXPR__CASTED11]], align 1
// CHECK11-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED11]], align 8
// CHECK11-NEXT: [[TMP28:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV13:%.*]] = trunc i8 [[TMP28]] to i1
+// CHECK11-NEXT: [[LOADEDV13:%.*]] = icmp ne i8 [[TMP28]], 0
// CHECK11-NEXT: br i1 [[LOADEDV13]], label [[OMP_IF_THEN14:%.*]], label [[OMP_IF_ELSE15:%.*]]
// CHECK11: omp_if.then14:
// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.7, i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]])
@@ -7082,7 +7082,7 @@ int main() {
// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -7209,7 +7209,7 @@ int main() {
// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -8367,7 +8367,7 @@ int main() {
// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
// CHECK15-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
// CHECK15-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK15-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i1
+// CHECK15-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP12]], 0
// CHECK15-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK15: omp_if.then:
// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
diff --git a/clang/test/OpenMP/for_codegen.cpp b/clang/test/OpenMP/for_codegen.cpp
index aa95e6099bfb8..a8d9676500684 100644
--- a/clang/test/OpenMP/for_codegen.cpp
+++ b/clang/test/OpenMP/for_codegen.cpp
@@ -59,7 +59,7 @@ void loop_with_counter_collapse() {
// CHECK: [[BOOL:%.+]] = zext i1 [[CMP]] to i8
// CHECK: store i8 [[BOOL]], ptr [[J_UB_CMP:%.+]],
// CHECK: [[J_UB_CMP_VAL:%.+]] = load i8, ptr [[J_UB_CMP]],
- // CHECK: [[BOOL:%.+]] = trunc i8 [[J_UB_CMP_VAL]] to i1
+ // CHECK: [[BOOL:%.+]] = icmp ne i8 [[J_UB_CMP_VAL]], 0
// CHECK: br i1 [[BOOL]], label %[[TRUE:[^,]+]], label %[[FALSE:[^,]+]]
// CHECK: [[TRUE]]:
// CHECK: [[J_UB_MIN_VAL:%.+]] = load i32, ptr [[J_UB_MIN]],
@@ -71,7 +71,7 @@ void loop_with_counter_collapse() {
// CHECK: [[J_UB_VAL:%.+]] = phi i32 [ [[J_UB_MIN_VAL]], %[[TRUE]] ], [ [[J_UB_MAX_VAL]], %[[FALSE]] ]
// CHECK: store i32 [[J_UB_VAL]], ptr [[J_UB:%.+]],
// CHECK: [[J_LB_CMP_VAL:%.+]] = load i8, ptr [[J_LB_CMP]],
- // CHECK: [[BOOL:%.+]] = trunc i8 [[J_LB_CMP_VAL]] to i1
+ // CHECK: [[BOOL:%.+]] = icmp ne i8 [[J_LB_CMP_VAL]], 0
// CHECK: br i1 [[BOOL]], label %[[TRUE:[^,]+]], label %[[FALSE:[^,]+]]
// CHECK: [[TRUE]]:
// CHECK: [[J_LB_MIN_VAL:%.+]] = load i32, ptr [[J_LB_MIN]],
diff --git a/clang/test/OpenMP/loop_collapse_codegen.cpp b/clang/test/OpenMP/loop_collapse_codegen.cpp
index 9c8da1d86cb39..ade384bc84b93 100644
--- a/clang/test/OpenMP/loop_collapse_codegen.cpp
+++ b/clang/test/OpenMP/loop_collapse_codegen.cpp
@@ -45,7 +45,7 @@
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[CMP]] to i8
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[DOTMIN_LESS_MAX]], align 1
// CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTMIN_LESS_MAX]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label %[[COND_TRUE:.*]], label %[[COND_FALSE:.*]]
// CHECK: [[COND_TRUE]]:
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTLB_MIN]], align 4
@@ -82,7 +82,7 @@
// CHECK-NEXT: [[STOREDV15:%.*]] = zext i1 [[CMP14]] to i8
// CHECK-NEXT: store i8 [[STOREDV15]], ptr [[DOTMIN_LESS_MAX13]], align 1
// CHECK-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTMIN_LESS_MAX13]], align 1
-// CHECK-NEXT: [[LOADEDV17:%.*]] = trunc i8 [[TMP14]] to i1
+// CHECK-NEXT: [[LOADEDV17:%.*]] = icmp ne i8 [[TMP14]], 0
// CHECK-NEXT: br i1 [[LOADEDV17]], label %[[COND_TRUE18:.*]], label %[[COND_FALSE19:.*]]
// CHECK: [[COND_TRUE18]]:
// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTLB_MIN4]], align 4
@@ -341,7 +341,7 @@ void triangular_loop_1() {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[CMP]] to i8
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[DOTMIN_LESS_MAX]], align 1
// CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTMIN_LESS_MAX]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label %[[COND_TRUE:.*]], label %[[COND_FALSE:.*]]
// CHECK: [[COND_TRUE]]:
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTLB_MIN]], align 4
@@ -378,7 +378,7 @@ void triangular_loop_1() {
// CHECK-NEXT: [[STOREDV15:%.*]] = zext i1 [[CMP14]] to i8
// CHECK-NEXT: store i8 [[STOREDV15]], ptr [[DOTMIN_LESS_MAX13]], align 1
// CHECK-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTMIN_LESS_MAX13]], align 1
-// CHECK-NEXT: [[LOADEDV17:%.*]] = trunc i8 [[TMP14]] to i1
+// CHECK-NEXT: [[LOADEDV17:%.*]] = icmp ne i8 [[TMP14]], 0
// CHECK-NEXT: br i1 [[LOADEDV17]], label %[[COND_TRUE18:.*]], label %[[COND_FALSE19:.*]]
// CHECK: [[COND_TRUE18]]:
// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTLB_MIN4]], align 4
@@ -631,7 +631,7 @@ void triangular_loop_2() {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[CMP]] to i8
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[DOTMIN_LESS_MAX]], align 1
// CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTMIN_LESS_MAX]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label %[[COND_TRUE:.*]], label %[[COND_FALSE:.*]]
// CHECK: [[COND_TRUE]]:
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTLB_MIN]], align 4
@@ -851,7 +851,7 @@ void triangular_loop_3() {
// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[CMP]] to i8
// CHECK-NEXT: store i8 [[STOREDV]], ptr [[DOTMIN_LESS_MAX]], align 1
// CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTMIN_LESS_MAX]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label %[[COND_TRUE:.*]], label %[[COND_FALSE:.*]]
// CHECK: [[COND_TRUE]]:
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTLB_MIN]], align 4
diff --git a/clang/test/OpenMP/master_taskloop_simd_codegen.cpp b/clang/test/OpenMP/master_taskloop_simd_codegen.cpp
index 47fb9c06b2e49..d78d193e2edd1 100644
--- a/clang/test/OpenMP/master_taskloop_simd_codegen.cpp
+++ b/clang/test/OpenMP/master_taskloop_simd_codegen.cpp
@@ -72,7 +72,7 @@ int main(int argc, char **argv) {
// CHECK: [[TASK_DATA:%.+]] = getelementptr inbounds nuw %{{.+}}, ptr [[TASKV]], i32 0, i32 0
// OMP45: [[IF:%.+]] = icmp ne i32 %{{.+}}, 0
// OMP50: [[IF_VAL:%.+]] = load i8, ptr %
-// OMP50: [[IF:%.+]] = trunc i8 [[IF_VAL]] to i1
+// OMP50: [[IF:%.+]] = icmp ne i8 [[IF_VAL]], 0
// CHECK: [[IF_INT:%.+]] = sext i1 [[IF]] to i32
// CHECK: [[DOWN:%.+]] = getelementptr inbounds nuw [[TD_TY:%.+]], ptr [[TASK_DATA]], i32 0, i32 5
// CHECK: store i64 0, ptr [[DOWN]],
diff --git a/clang/test/OpenMP/nvptx_SPMD_codegen.cpp b/clang/test/OpenMP/nvptx_SPMD_codegen.cpp
index d877736a88101..220fef20e9db7 100644
--- a/clang/test/OpenMP/nvptx_SPMD_codegen.cpp
+++ b/clang/test/OpenMP/nvptx_SPMD_codegen.cpp
@@ -288,7 +288,7 @@ int a;
// CHECK-64: user_code.entry:
// CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
// CHECK-64-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-64-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-64-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-64-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK-64-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK-64-NEXT: [[TMP3:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -343,7 +343,7 @@ int a;
// CHECK-64-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
// CHECK-64-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
// CHECK-64-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-64-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP5]] to i1
+// CHECK-64-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP5]], 0
// CHECK-64-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK-64: omp_if.then:
// CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -357,7 +357,7 @@ int a;
// CHECK-64-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP66]]
// CHECK-64-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK-64-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP66]]
-// CHECK-64-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK-64-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK-64-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV2]] to i8
// CHECK-64-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP66]]
// CHECK-64-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP66]]
@@ -371,7 +371,7 @@ int a;
// CHECK-64-NEXT: [[TMP18:%.*]] = inttoptr i64 [[TMP12]] to ptr
// CHECK-64-NEXT: store ptr [[TMP18]], ptr [[TMP17]], align 8, !llvm.access.group [[ACC_GRP66]]
// CHECK-64-NEXT: [[TMP19:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP66]]
-// CHECK-64-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP19]] to i1
+// CHECK-64-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP19]], 0
// CHECK-64-NEXT: [[TMP20:%.*]] = zext i1 [[LOADEDV3]] to i32
// CHECK-64-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP20]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 3, i32 0), !llvm.access.group [[ACC_GRP66]]
// CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
@@ -416,7 +416,7 @@ int a;
// CHECK-64-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
// CHECK-64-NEXT: [[TMP34:%.*]] = zext i32 [[TMP33]] to i64
// CHECK-64-NEXT: [[TMP35:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-64-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP35]] to i1
+// CHECK-64-NEXT: [[LOADEDV14:%.*]] = icmp ne i8 [[TMP35]], 0
// CHECK-64-NEXT: [[STOREDV16:%.*]] = zext i1 [[LOADEDV14]] to i8
// CHECK-64-NEXT: store i8 [[STOREDV16]], ptr [[DOTCAPTURE_EXPR__CASTED15]], align 1
// CHECK-64-NEXT: [[TMP36:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED15]], align 8
@@ -430,7 +430,7 @@ int a;
// CHECK-64-NEXT: [[TMP42:%.*]] = inttoptr i64 [[TMP36]] to ptr
// CHECK-64-NEXT: store ptr [[TMP42]], ptr [[TMP41]], align 8
// CHECK-64-NEXT: [[TMP43:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-64-NEXT: [[LOADEDV18:%.*]] = trunc i8 [[TMP43]] to i1
+// CHECK-64-NEXT: [[LOADEDV18:%.*]] = icmp ne i8 [[TMP43]], 0
// CHECK-64-NEXT: [[TMP44:%.*]] = zext i1 [[LOADEDV18]] to i32
// CHECK-64-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP44]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined1, ptr null, ptr [[CAPTURED_VARS_ADDRS17]], i64 3, i32 0)
// CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
@@ -508,7 +508,7 @@ int a;
// CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK-64-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-64-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-64-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-64-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK-64: omp_if.then:
// CHECK-64-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -615,7 +615,7 @@ int a;
// CHECK-64-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK-64-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK-64-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-64-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-64-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-64-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK-64: omp_if.then:
// CHECK-64-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -6917,7 +6917,7 @@ int a;
// CHECK-64: user_code.entry:
// CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-64-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-64-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-64-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-64-NEXT: [[TMP3:%.*]] = zext i1 [[LOADEDV]] to i32
// CHECK-64-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0, i32 0)
// CHECK-64-NEXT: call void @__kmpc_target_deinit()
@@ -7490,7 +7490,7 @@ int a;
// CHECK-64: user_code.entry:
// CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-64-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-64-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-64-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-64-NEXT: [[TMP3:%.*]] = zext i1 [[LOADEDV]] to i32
// CHECK-64-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0, i32 0)
// CHECK-64-NEXT: call void @__kmpc_target_deinit()
@@ -9294,7 +9294,7 @@ int a;
// CHECK-32: user_code.entry:
// CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
// CHECK-32-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-32-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-32-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK-32-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK-32-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
@@ -9349,7 +9349,7 @@ int a;
// CHECK-32-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
// CHECK-32-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
// CHECK-32-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP5]] to i1
+// CHECK-32-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP5]], 0
// CHECK-32-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK-32: omp_if.then:
// CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -9361,7 +9361,7 @@ int a;
// CHECK-32-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP66]]
// CHECK-32-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP66]]
// CHECK-32-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP66]]
-// CHECK-32-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK-32-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK-32-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV2]] to i8
// CHECK-32-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP66]]
// CHECK-32-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP66]]
@@ -9375,7 +9375,7 @@ int a;
// CHECK-32-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP10]] to ptr
// CHECK-32-NEXT: store ptr [[TMP16]], ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP66]]
// CHECK-32-NEXT: [[TMP17:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP66]]
-// CHECK-32-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP17]] to i1
+// CHECK-32-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP17]], 0
// CHECK-32-NEXT: [[TMP18:%.*]] = zext i1 [[LOADEDV3]] to i32
// CHECK-32-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP18]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 3, i32 0), !llvm.access.group [[ACC_GRP66]]
// CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
@@ -9418,7 +9418,7 @@ int a;
// CHECK-32-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
// CHECK-32-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
// CHECK-32-NEXT: [[TMP31:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP31]] to i1
+// CHECK-32-NEXT: [[LOADEDV14:%.*]] = icmp ne i8 [[TMP31]], 0
// CHECK-32-NEXT: [[STOREDV16:%.*]] = zext i1 [[LOADEDV14]] to i8
// CHECK-32-NEXT: store i8 [[STOREDV16]], ptr [[DOTCAPTURE_EXPR__CASTED15]], align 1
// CHECK-32-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED15]], align 4
@@ -9432,7 +9432,7 @@ int a;
// CHECK-32-NEXT: [[TMP38:%.*]] = inttoptr i32 [[TMP32]] to ptr
// CHECK-32-NEXT: store ptr [[TMP38]], ptr [[TMP37]], align 4
// CHECK-32-NEXT: [[TMP39:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-NEXT: [[LOADEDV18:%.*]] = trunc i8 [[TMP39]] to i1
+// CHECK-32-NEXT: [[LOADEDV18:%.*]] = icmp ne i8 [[TMP39]], 0
// CHECK-32-NEXT: [[TMP40:%.*]] = zext i1 [[LOADEDV18]] to i32
// CHECK-32-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP40]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined1, ptr null, ptr [[CAPTURED_VARS_ADDRS17]], i32 3, i32 0)
// CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
@@ -9508,7 +9508,7 @@ int a;
// CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK-32-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-32-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-32-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK-32: omp_if.then:
// CHECK-32-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
@@ -9611,7 +9611,7 @@ int a;
// CHECK-32-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK-32-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK-32-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-32-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-32-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK-32: omp_if.then:
// CHECK-32-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
@@ -15766,7 +15766,7 @@ int a;
// CHECK-32: user_code.entry:
// CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-32-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-32-NEXT: [[TMP3:%.*]] = zext i1 [[LOADEDV]] to i32
// CHECK-32-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0)
// CHECK-32-NEXT: call void @__kmpc_target_deinit()
@@ -16339,7 +16339,7 @@ int a;
// CHECK-32: user_code.entry:
// CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-32-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-32-NEXT: [[TMP3:%.*]] = zext i1 [[LOADEDV]] to i32
// CHECK-32-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0)
// CHECK-32-NEXT: call void @__kmpc_target_deinit()
@@ -18143,7 +18143,7 @@ int a;
// CHECK-32-EX: user_code.entry:
// CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-EX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-32-EX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-32-EX-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK-32-EX-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
@@ -18198,7 +18198,7 @@ int a;
// CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
// CHECK-32-EX-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
// CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-EX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP5]] to i1
+// CHECK-32-EX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP5]], 0
// CHECK-32-EX-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK-32-EX: omp_if.then:
// CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -18210,7 +18210,7 @@ int a;
// CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP66]]
// CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP66]]
// CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP66]]
-// CHECK-32-EX-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK-32-EX-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK-32-EX-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV2]] to i8
// CHECK-32-EX-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP66]]
// CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP66]]
@@ -18224,7 +18224,7 @@ int a;
// CHECK-32-EX-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP10]] to ptr
// CHECK-32-EX-NEXT: store ptr [[TMP16]], ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP66]]
// CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP66]]
-// CHECK-32-EX-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP17]] to i1
+// CHECK-32-EX-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP17]], 0
// CHECK-32-EX-NEXT: [[TMP18:%.*]] = zext i1 [[LOADEDV3]] to i32
// CHECK-32-EX-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP18]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 3, i32 0), !llvm.access.group [[ACC_GRP66]]
// CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
@@ -18267,7 +18267,7 @@ int a;
// CHECK-32-EX-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
// CHECK-32-EX-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
// CHECK-32-EX-NEXT: [[TMP31:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-EX-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP31]] to i1
+// CHECK-32-EX-NEXT: [[LOADEDV14:%.*]] = icmp ne i8 [[TMP31]], 0
// CHECK-32-EX-NEXT: [[STOREDV16:%.*]] = zext i1 [[LOADEDV14]] to i8
// CHECK-32-EX-NEXT: store i8 [[STOREDV16]], ptr [[DOTCAPTURE_EXPR__CASTED15]], align 1
// CHECK-32-EX-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED15]], align 4
@@ -18281,7 +18281,7 @@ int a;
// CHECK-32-EX-NEXT: [[TMP38:%.*]] = inttoptr i32 [[TMP32]] to ptr
// CHECK-32-EX-NEXT: store ptr [[TMP38]], ptr [[TMP37]], align 4
// CHECK-32-EX-NEXT: [[TMP39:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-EX-NEXT: [[LOADEDV18:%.*]] = trunc i8 [[TMP39]] to i1
+// CHECK-32-EX-NEXT: [[LOADEDV18:%.*]] = icmp ne i8 [[TMP39]], 0
// CHECK-32-EX-NEXT: [[TMP40:%.*]] = zext i1 [[LOADEDV18]] to i32
// CHECK-32-EX-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP40]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15_omp_outlined_omp_outlined1, ptr null, ptr [[CAPTURED_VARS_ADDRS17]], i32 3, i32 0)
// CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
@@ -18357,7 +18357,7 @@ int a;
// CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-EX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-32-EX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-32-EX-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK-32-EX: omp_if.then:
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
@@ -18460,7 +18460,7 @@ int a;
// CHECK-32-EX-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK-32-EX-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-EX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-32-EX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-32-EX-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK-32-EX: omp_if.then:
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
@@ -24615,7 +24615,7 @@ int a;
// CHECK-32-EX: user_code.entry:
// CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-EX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-32-EX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = zext i1 [[LOADEDV]] to i32
// CHECK-32-EX-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0)
// CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
@@ -25188,7 +25188,7 @@ int a;
// CHECK-32-EX: user_code.entry:
// CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK-32-EX-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK-32-EX-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK-32-EX-NEXT: [[TMP3:%.*]] = zext i1 [[LOADEDV]] to i32
// CHECK-32-EX-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0)
// CHECK-32-EX-NEXT: call void @__kmpc_target_deinit()
diff --git a/clang/test/OpenMP/nvptx_target_teams_generic_loop_codegen.cpp b/clang/test/OpenMP/nvptx_target_teams_generic_loop_codegen.cpp
index afd9f0150b22a..a58f4e5f0997b 100644
--- a/clang/test/OpenMP/nvptx_target_teams_generic_loop_codegen.cpp
+++ b/clang/test/OpenMP/nvptx_target_teams_generic_loop_codegen.cpp
@@ -338,7 +338,7 @@ int bar(int n){
// CHECK1: user_code.entry:
// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK1-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -1594,7 +1594,7 @@ int bar(int n){
// CHECK2: user_code.entry:
// CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK2-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK2-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// CHECK2-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// CHECK2-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK2-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK2-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -2839,7 +2839,7 @@ int bar(int n){
// CHECK3: user_code.entry:
// CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
// CHECK3-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
diff --git a/clang/test/OpenMP/nvptx_target_teams_generic_loop_generic_mode_codegen.cpp b/clang/test/OpenMP/nvptx_target_teams_generic_loop_generic_mode_codegen.cpp
index bbf359fbdf9d8..33bbeb230e2b2 100644
--- a/clang/test/OpenMP/nvptx_target_teams_generic_loop_generic_mode_codegen.cpp
+++ b/clang/test/OpenMP/nvptx_target_teams_generic_loop_generic_mode_codegen.cpp
@@ -54,7 +54,7 @@ int main(int argc, char **argv) {
// CHECK1-NEXT: store i32 [[TMP3]], ptr [[ARGC_CASTED]], align 4
// CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[ARGC_CASTED]], align 8
// CHECK1-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP5]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP5]], 0
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -187,7 +187,7 @@ int main(int argc, char **argv) {
// CHECK2-NEXT: store i32 [[TMP3]], ptr [[ARGC_CASTED]], align 4
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARGC_CASTED]], align 4
// CHECK2-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK2-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP5]] to i1
+// CHECK2-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP5]], 0
// CHECK2-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK2-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
diff --git a/clang/test/OpenMP/parallel_for_simd_codegen.cpp b/clang/test/OpenMP/parallel_for_simd_codegen.cpp
index 720e2f5459b5b..40af7069bbf7d 100644
--- a/clang/test/OpenMP/parallel_for_simd_codegen.cpp
+++ b/clang/test/OpenMP/parallel_for_simd_codegen.cpp
@@ -734,7 +734,7 @@ void if_clause(int a) {
for (int i = 0; i < 10; ++i);
}
// CHECK: call void @__kmpc_for_static_init_4(
-// OMP50: [[COND:%.+]] = trunc i8 %{{.+}} to i1
+// OMP50: [[COND:%.+]] = icmp ne i8 %{{.+}}, 0
// OMP50: br i1 [[COND]], label {{%?}}[[THEN:.+]], label {{%?}}[[ELSE:.+]]
// OMP50: [[THEN]]:
diff --git a/clang/test/OpenMP/parallel_master_taskloop_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_codegen.cpp
index a7a99575ad069..3c20989718d77 100644
--- a/clang/test/OpenMP/parallel_master_taskloop_codegen.cpp
+++ b/clang/test/OpenMP/parallel_master_taskloop_codegen.cpp
@@ -90,7 +90,7 @@ struct S {
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
// CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTCAPTURE_EXPR_4]], align 4
// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_3]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK1-NEXT: [[STOREDV6:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV6]], ptr [[DOTCAPTURE_EXPR__CASTED5]], align 1
// CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED5]], align 8
@@ -98,7 +98,7 @@ struct S {
// CHECK1-NEXT: store i32 [[TMP11]], ptr [[DOTCAPTURE_EXPR__CASTED7]], align 4
// CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED7]], align 8
// CHECK1-NEXT: [[TMP13:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_3]], align 1
-// CHECK1-NEXT: [[LOADEDV8:%.*]] = trunc i8 [[TMP13]] to i1
+// CHECK1-NEXT: [[LOADEDV8:%.*]] = icmp ne i8 [[TMP13]], 0
// CHECK1-NEXT: br i1 [[LOADEDV8]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 4, ptr @main.omp_outlined.4, ptr [[ARGC_ADDR]], ptr [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]])
@@ -412,7 +412,7 @@ struct S {
// CHECK1-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP21]], align 8
// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP22]], ptr align 8 [[AGG_CAPTURED]], i64 16, i1 false)
// CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP23]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP23]], 0
// CHECK1-NEXT: [[TMP24:%.*]] = sext i1 [[LOADEDV]] to i32
// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP20]], i32 0, i32 5
// CHECK1-NEXT: store i64 0, ptr [[TMP25]], align 8
@@ -752,7 +752,7 @@ struct S {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK1-NEXT: [[STOREDV2:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -792,7 +792,7 @@ struct S {
// CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 8
// CHECK1-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP3]])
// CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK1-NEXT: store ptr [[TMP]], ptr [[_TMP1]], align 8
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTCAPTURE_EXPR_2]], align 4
diff --git a/clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp b/clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp
index 258ef139dc55f..811abd68fb81c 100644
--- a/clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp
+++ b/clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp
@@ -93,7 +93,7 @@ struct S {
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
// CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTCAPTURE_EXPR_4]], align 4
// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_3]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK1-NEXT: [[STOREDV6:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV6]], ptr [[DOTCAPTURE_EXPR__CASTED5]], align 1
// CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED5]], align 8
@@ -101,7 +101,7 @@ struct S {
// CHECK1-NEXT: store i32 [[TMP11]], ptr [[DOTCAPTURE_EXPR__CASTED7]], align 4
// CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED7]], align 8
// CHECK1-NEXT: [[TMP13:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_3]], align 1
-// CHECK1-NEXT: [[LOADEDV8:%.*]] = trunc i8 [[TMP13]] to i1
+// CHECK1-NEXT: [[LOADEDV8:%.*]] = icmp ne i8 [[TMP13]], 0
// CHECK1-NEXT: br i1 [[LOADEDV8]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 5, ptr @main.omp_outlined.4, ptr [[I]], ptr [[ARGC_ADDR]], ptr [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]])
@@ -420,7 +420,7 @@ struct S {
// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP24]], ptr align 8 [[AGG_CAPTURED]], i64 24, i1 false)
// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], ptr [[TMP21]], i32 0, i32 1
// CHECK1-NEXT: [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP26]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP26]], 0
// CHECK1-NEXT: [[TMP27:%.*]] = sext i1 [[LOADEDV]] to i32
// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP22]], i32 0, i32 5
// CHECK1-NEXT: store i64 0, ptr [[TMP28]], align 8
@@ -680,7 +680,7 @@ struct S {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK1-NEXT: [[STOREDV2:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -720,7 +720,7 @@ struct S {
// CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 8
// CHECK1-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP3]])
// CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK1-NEXT: store ptr [[TMP]], ptr [[_TMP1]], align 8
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTCAPTURE_EXPR_2]], align 4
@@ -905,7 +905,7 @@ struct S {
// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
// CHECK2-NEXT: store i32 [[TMP8]], ptr [[DOTCAPTURE_EXPR_4]], align 4
// CHECK2-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_3]], align 1
-// CHECK2-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK2-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK2-NEXT: [[STOREDV6:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK2-NEXT: store i8 [[STOREDV6]], ptr [[DOTCAPTURE_EXPR__CASTED5]], align 1
// CHECK2-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED5]], align 8
@@ -913,7 +913,7 @@ struct S {
// CHECK2-NEXT: store i32 [[TMP11]], ptr [[DOTCAPTURE_EXPR__CASTED7]], align 4
// CHECK2-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED7]], align 8
// CHECK2-NEXT: [[TMP13:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_3]], align 1
-// CHECK2-NEXT: [[LOADEDV8:%.*]] = trunc i8 [[TMP13]] to i1
+// CHECK2-NEXT: [[LOADEDV8:%.*]] = icmp ne i8 [[TMP13]], 0
// CHECK2-NEXT: br i1 [[LOADEDV8]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK2: omp_if.then:
// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 5, ptr @main.omp_outlined.4, ptr [[I]], ptr [[ARGC_ADDR]], ptr [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]])
@@ -1232,7 +1232,7 @@ struct S {
// CHECK2-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP24]], ptr align 8 [[AGG_CAPTURED]], i64 24, i1 false)
// CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], ptr [[TMP21]], i32 0, i32 1
// CHECK2-NEXT: [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK2-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP26]] to i1
+// CHECK2-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP26]], 0
// CHECK2-NEXT: [[TMP27:%.*]] = sext i1 [[LOADEDV]] to i32
// CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP22]], i32 0, i32 5
// CHECK2-NEXT: store i64 0, ptr [[TMP28]], align 8
@@ -1492,7 +1492,7 @@ struct S {
// CHECK2-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK2-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK2-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK2-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK2-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK2-NEXT: [[STOREDV2:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK2-NEXT: store i8 [[STOREDV2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK2-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -1532,7 +1532,7 @@ struct S {
// CHECK2-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 8
// CHECK2-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP3]])
// CHECK2-NEXT: [[TMP8:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK2-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK2-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK2-NEXT: store ptr [[TMP]], ptr [[_TMP1]], align 8
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK2-NEXT: store i32 [[TMP9]], ptr [[DOTCAPTURE_EXPR_2]], align 4
@@ -1717,7 +1717,7 @@ struct S {
// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
// CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTCAPTURE_EXPR_4]], align 4
// CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_3]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK3-NEXT: [[STOREDV6:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK3-NEXT: store i8 [[STOREDV6]], ptr [[DOTCAPTURE_EXPR__CASTED5]], align 1
// CHECK3-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED5]], align 8
@@ -1725,7 +1725,7 @@ struct S {
// CHECK3-NEXT: store i32 [[TMP11]], ptr [[DOTCAPTURE_EXPR__CASTED7]], align 4
// CHECK3-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED7]], align 8
// CHECK3-NEXT: [[TMP13:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_3]], align 1
-// CHECK3-NEXT: [[LOADEDV8:%.*]] = trunc i8 [[TMP13]] to i1
+// CHECK3-NEXT: [[LOADEDV8:%.*]] = icmp ne i8 [[TMP13]], 0
// CHECK3-NEXT: br i1 [[LOADEDV8]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 5, ptr @main.omp_outlined.4, ptr [[I]], ptr [[ARGC_ADDR]], ptr [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]])
@@ -2008,7 +2008,7 @@ struct S {
// CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP9]], align 8
// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[AGG_CAPTURED]], i32 0, i32 3
// CHECK3-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[TMP10]], align 8
// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
@@ -2049,7 +2049,7 @@ struct S {
// CHECK3-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP26]], ptr align 8 [[AGG_CAPTURED]], i64 32, i1 false)
// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], ptr [[TMP23]], i32 0, i32 1
// CHECK3-NEXT: [[TMP28:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP28]] to i1
+// CHECK3-NEXT: [[LOADEDV16:%.*]] = icmp ne i8 [[TMP28]], 0
// CHECK3-NEXT: [[TMP29:%.*]] = sext i1 [[LOADEDV16]] to i32
// CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP24]], i32 0, i32 5
// CHECK3-NEXT: store i64 0, ptr [[TMP30]], align 8
@@ -2206,7 +2206,7 @@ struct S {
// CHECK3-NEXT: [[TMP52:%.*]] = load ptr, ptr [[TMP51]], align 8, !nonnull [[META36]], !align [[META38]]
// CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP19]], i32 0, i32 3
// CHECK3-NEXT: [[TMP54:%.*]] = load i8, ptr [[TMP53]], align 1
-// CHECK3-NEXT: [[LOADEDV_I:%.*]] = trunc i8 [[TMP54]] to i1
+// CHECK3-NEXT: [[LOADEDV_I:%.*]] = icmp ne i8 [[TMP54]], 0
// CHECK3-NEXT: br i1 [[LOADEDV_I]], label [[OMP_IF_THEN_I:%.*]], label [[OMP_IF_ELSE_I:%.*]]
// CHECK3: omp_if.then.i:
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
@@ -2359,7 +2359,7 @@ struct S {
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK3-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK3-NEXT: [[STOREDV2:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK3-NEXT: store i8 [[STOREDV2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK3-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -2399,7 +2399,7 @@ struct S {
// CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 8
// CHECK3-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP3]])
// CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK3-NEXT: store ptr [[TMP]], ptr [[_TMP1]], align 8
// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTCAPTURE_EXPR_2]], align 4
@@ -3372,7 +3372,7 @@ struct S {
// CHECK7-NEXT: [[TMP30:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8
// CHECK7-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP30]], i64 8) ]
// CHECK7-NEXT: [[TMP31:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_21]], align 1
-// CHECK7-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP31]] to i1
+// CHECK7-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP31]], 0
// CHECK7-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK7: omp_if.then:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND48:%.*]]
@@ -3776,7 +3776,7 @@ struct S {
// CHECK8-NEXT: [[TMP30:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8
// CHECK8-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP30]], i64 8) ]
// CHECK8-NEXT: [[TMP31:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_21]], align 1
-// CHECK8-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP31]] to i1
+// CHECK8-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP31]], 0
// CHECK8-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK8: omp_if.then:
// CHECK8-NEXT: br label [[OMP_INNER_FOR_COND48:%.*]]
diff --git a/clang/test/OpenMP/target_data_if_logical_codegen.cpp b/clang/test/OpenMP/target_data_if_logical_codegen.cpp
index ce1b5fd4bf87f..54c4508dbdd29 100644
--- a/clang/test/OpenMP/target_data_if_logical_codegen.cpp
+++ b/clang/test/OpenMP/target_data_if_logical_codegen.cpp
@@ -60,11 +60,11 @@ int main() {
// CHECK-NEXT: store i32 42, ptr [[PP]], align 4
// CHECK-NEXT: store ptr [[PP]], ptr [[P]], align 8
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
-// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
// CHECK: land.rhs:
// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[B]], align 1
-// CHECK-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK-NEXT: br label [[LAND_END]]
// CHECK: land.end:
// CHECK-NEXT: [[TMP2:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV3]], [[LAND_RHS]] ]
diff --git a/clang/test/OpenMP/target_enter_data_depend_codegen.cpp b/clang/test/OpenMP/target_enter_data_depend_codegen.cpp
index c1e8f13321509..23767621fb6f2 100644
--- a/clang/test/OpenMP/target_enter_data_depend_codegen.cpp
+++ b/clang/test/OpenMP/target_enter_data_depend_codegen.cpp
@@ -110,7 +110,7 @@ void foo(int arg) {
// CK1: [[GEPP0:%.+]] = getelementptr inbounds [1 x ptr], ptr [[P]], i32 0, i32 0
// CK1: [[IF_DEVICE:%.+]] = getelementptr inbounds nuw %struct.anon{{.+}}, ptr [[CAPTURES:%.+]], i32 0, i32 0
// CK1: [[IF:%.+]] = load i8, ptr %{{.+}}
- // CK1: [[IF_BOOL:%.+]] = trunc i8 [[IF]] to i1
+ // CK1: [[IF_BOOL:%.+]] = icmp ne i8 [[IF]], 0
// CK1: [[IF:%.+]] = zext i1 [[IF_BOOL]] to i8
// CK1: store i8 [[IF]], ptr [[IF_DEVICE]],
// CK1: [[RES:%.+]] = call ptr @__kmpc_omp_task_alloc(ptr {{.+}}, i32 {{.+}}, i32 1, i[[sz]] {{64|36}}, i[[sz]] 1, ptr [[TASK_ENTRY2:@.+]])
diff --git a/clang/test/OpenMP/target_exit_data_depend_codegen.cpp b/clang/test/OpenMP/target_exit_data_depend_codegen.cpp
index fcf9289ee2f8f..b5f8f6655f1a0 100644
--- a/clang/test/OpenMP/target_exit_data_depend_codegen.cpp
+++ b/clang/test/OpenMP/target_exit_data_depend_codegen.cpp
@@ -110,7 +110,7 @@ void foo(int arg) {
// CK1: [[GEPP0:%.+]] = getelementptr inbounds [1 x ptr], ptr [[P]], i32 0, i32 0
// CK1: [[IF_DEVICE:%.+]] = getelementptr inbounds nuw %struct.anon{{.+}}, ptr [[CAPTURES:%.+]], i32 0, i32 0
// CK1: [[IF:%.+]] = load i8, ptr %{{.+}}
- // CK1: [[IF_BOOL:%.+]] = trunc i8 [[IF]] to i1
+ // CK1: [[IF_BOOL:%.+]] = icmp ne i8 [[IF]], 0
// CK1: [[IF:%.+]] = zext i1 [[IF_BOOL]] to i8
// CK1: store i8 [[IF]], ptr [[IF_DEVICE]],
// CK1: [[RES:%.+]] = call ptr @__kmpc_omp_task_alloc(ptr {{.+}}, i32 {{.+}}, i32 1, i[[sz]] {{64|36}}, i[[sz]] 1, ptr [[TASK_ENTRY2:@.+]])
diff --git a/clang/test/OpenMP/target_offload_mandatory_codegen.cpp b/clang/test/OpenMP/target_offload_mandatory_codegen.cpp
index bb0649a87e598..7ce4997f8eadb 100644
--- a/clang/test/OpenMP/target_offload_mandatory_codegen.cpp
+++ b/clang/test/OpenMP/target_offload_mandatory_codegen.cpp
@@ -89,7 +89,7 @@ void host_dev(int device) {
// MANDATORY-NEXT: [[STOREDV:%.*]] = zext i1 [[COND]] to i8
// MANDATORY-NEXT: store i8 [[STOREDV]], ptr [[COND_ADDR]], align 1
// MANDATORY-NEXT: [[TMP0:%.*]] = load i8, ptr [[COND_ADDR]], align 1
-// MANDATORY-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// MANDATORY-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// MANDATORY-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// MANDATORY: omp_if.then:
// MANDATORY-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
diff --git a/clang/test/OpenMP/target_parallel_debug_codegen.cpp b/clang/test/OpenMP/target_parallel_debug_codegen.cpp
index ad894e8b337b6..cbd7e1346a580 100644
--- a/clang/test/OpenMP/target_parallel_debug_codegen.cpp
+++ b/clang/test/OpenMP/target_parallel_debug_codegen.cpp
@@ -238,7 +238,7 @@ int main() {
// CHECK1-NEXT: [[ARRAYIDX23:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX21]], i64 0, i64 [[IDXPROM22]], !dbg [[DBG113]]
// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[ARRAYIDX23]], align 4, !dbg [[DBG113]]
// CHECK1-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP7]], align 1, !dbg [[DBG115:![0-9]+]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP15]] to i1, !dbg [[DBG115]]
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP15]], 0, !dbg [[DBG115]]
// CHECK1-NEXT: [[CONV:%.*]] = zext i1 [[LOADEDV]] to i32, !dbg [[DBG115]]
// CHECK1-NEXT: [[OR:%.*]] = or i32 [[CONV]], [[TMP14]], !dbg [[DBG115]]
// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[OR]], 0, !dbg [[DBG115]]
@@ -452,7 +452,7 @@ int main() {
// CHECK1-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX17]], i64 0, i64 [[IDXPROM18]], !dbg [[DBG192]]
// CHECK1-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX19]], align 4, !dbg [[DBG194:![0-9]+]]
// CHECK1-NEXT: [[TMP14:%.*]] = load i8, ptr [[TMP8]], align 1, !dbg [[DBG195:![0-9]+]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP14]] to i1, !dbg [[DBG195]]
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP14]], 0, !dbg [[DBG195]]
// CHECK1-NEXT: [[CONV:%.*]] = zext i1 [[LOADEDV]] to i32, !dbg [[DBG195]]
// CHECK1-NEXT: store i32 [[CONV]], ptr [[D]], align 4, !dbg [[DBG196:![0-9]+]]
// CHECK1-NEXT: ret void, !dbg [[DBG197:![0-9]+]]
diff --git a/clang/test/OpenMP/target_parallel_for_debug_codegen.cpp b/clang/test/OpenMP/target_parallel_for_debug_codegen.cpp
index f7e62eb08d89a..95c54d9ac3c17 100644
--- a/clang/test/OpenMP/target_parallel_for_debug_codegen.cpp
+++ b/clang/test/OpenMP/target_parallel_for_debug_codegen.cpp
@@ -110,7 +110,7 @@ int main() {
// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 3, !dbg [[DBG46]]
// CHECK1-NEXT: store ptr [[TMP7]], ptr [[TMP16]], align 8, !dbg [[DBG46]]
// CHECK1-NEXT: [[TMP17:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !dbg [[DBG47:![0-9]+]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP17]] to i1, !dbg [[DBG47]]
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP17]], 0, !dbg [[DBG47]]
// CHECK1-NEXT: [[TMP18:%.*]] = zext i1 [[LOADEDV]] to i32, !dbg [[DBG46]]
// CHECK1-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB6]], i32 [[TMP9]], i32 [[TMP18]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l13_debug___omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4, i32 0), !dbg [[DBG46]]
// CHECK1-NEXT: call void @__kmpc_target_deinit(), !dbg [[DBG48:![0-9]+]]
@@ -148,7 +148,7 @@ int main() {
// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !dbg [[DBG64]]
// CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[BB_ADDR]], align 8, !dbg [[DBG64]]
// CHECK1-NEXT: [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !dbg [[DBG64]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1, !dbg [[DBG64]]
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0, !dbg [[DBG64]]
// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DYN_PTR_ADDR]], align 8, !dbg [[DBG64]]
// CHECK1-NEXT: [[TMP9:%.*]] = addrspacecast ptr [[TMP3]] to ptr addrspace(1), !dbg [[DBG64]]
// CHECK1-NEXT: [[TMP10:%.*]] = addrspacecast ptr [[TMP6]] to ptr addrspace(1), !dbg [[DBG64]]
@@ -291,7 +291,7 @@ int main() {
// CHECK1-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX24]], i64 0, i64 [[IDXPROM25]], !dbg [[DBG118]]
// CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[ARRAYIDX26]], align 4, !dbg [[DBG118]]
// CHECK1-NEXT: [[TMP25:%.*]] = load i8, ptr [[TMP7]], align 1, !dbg [[DBG120:![0-9]+]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP25]] to i1, !dbg [[DBG120]]
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP25]], 0, !dbg [[DBG120]]
// CHECK1-NEXT: [[CONV:%.*]] = zext i1 [[LOADEDV]] to i32, !dbg [[DBG120]]
// CHECK1-NEXT: [[OR:%.*]] = or i32 [[CONV]], [[TMP24]], !dbg [[DBG120]]
// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[OR]], 0, !dbg [[DBG120]]
@@ -578,7 +578,7 @@ int main() {
// CHECK1-NEXT: [[ARRAYIDX22:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX20]], i64 0, i64 [[IDXPROM21]], !dbg [[DBG212]]
// CHECK1-NEXT: store i32 [[TMP22]], ptr [[ARRAYIDX22]], align 4, !dbg [[DBG214:![0-9]+]]
// CHECK1-NEXT: [[TMP24:%.*]] = load i8, ptr [[TMP8]], align 1, !dbg [[DBG215:![0-9]+]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP24]] to i1, !dbg [[DBG215]]
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP24]], 0, !dbg [[DBG215]]
// CHECK1-NEXT: [[CONV:%.*]] = zext i1 [[LOADEDV]] to i32, !dbg [[DBG215]]
// CHECK1-NEXT: store i32 [[CONV]], ptr [[D]], align 4, !dbg [[DBG216:![0-9]+]]
// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]], !dbg [[DBG217:![0-9]+]]
diff --git a/clang/test/OpenMP/target_parallel_for_simd_codegen.cpp b/clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
index 50fbf28dbdadc..fdd18d9ed7a8c 100644
--- a/clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
+++ b/clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
@@ -4899,12 +4899,12 @@ int bar(int n){
// CHECK5-NEXT: store i32 [[TMP6]], ptr [[B_CASTED]], align 4
// CHECK5-NEXT: [[TMP7:%.*]] = load i64, ptr [[B_CASTED]], align 8
// CHECK5-NEXT: [[TMP8:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK5-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK5-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK5-NEXT: [[STOREDV2:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK5-NEXT: store i8 [[STOREDV2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK5-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
// CHECK5-NEXT: [[TMP10:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK5-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP10]] to i1
+// CHECK5-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP10]], 0
// CHECK5-NEXT: br i1 [[LOADEDV3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK5: omp_if.then:
// CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[THIS1]], i32 0, i32 0
@@ -4959,7 +4959,7 @@ int bar(int n){
// CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK5-NEXT: [[TMP37:%.*]] = getelementptr inbounds [7 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
// CHECK5-NEXT: [[TMP38:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK5-NEXT: [[LOADEDV4:%.*]] = trunc i8 [[TMP38]] to i1
+// CHECK5-NEXT: [[LOADEDV4:%.*]] = icmp ne i8 [[TMP38]], 0
// CHECK5-NEXT: [[TMP39:%.*]] = select i1 [[LOADEDV4]], i32 0, i32 1
// CHECK5-NEXT: [[TMP40:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP39]], 0
// CHECK5-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
@@ -5242,12 +5242,12 @@ int bar(int n){
// CHECK5-NEXT: store i32 [[TMP5]], ptr [[B_CASTED]], align 4
// CHECK5-NEXT: [[TMP6:%.*]] = load i64, ptr [[B_CASTED]], align 8
// CHECK5-NEXT: [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK5-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// CHECK5-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// CHECK5-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK5-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK5-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
// CHECK5-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK5-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK5-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK5-NEXT: br i1 [[LOADEDV3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK5: omp_if.then:
// CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l214.omp_outlined, ptr [[TMP1]], i64 [[TMP6]], i64 [[TMP2]], i64 [[TMP3]], ptr [[TMP4]], i64 [[TMP8]])
@@ -5298,7 +5298,7 @@ int bar(int n){
// CHECK5-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8
// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK5-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK5-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK5-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK5-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK5: omp_if.then:
// CHECK5-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -6728,12 +6728,12 @@ int bar(int n){
// CHECK7-NEXT: store i32 [[TMP5]], ptr [[B_CASTED]], align 4
// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[B_CASTED]], align 4
// CHECK7-NEXT: [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK7-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// CHECK7-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// CHECK7-NEXT: [[STOREDV2:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK7-NEXT: store i8 [[STOREDV2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
// CHECK7-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK7-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK7-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK7-NEXT: br i1 [[LOADEDV3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK7: omp_if.then:
// CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[THIS1]], i32 0, i32 0
@@ -6789,7 +6789,7 @@ int bar(int n){
// CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK7-NEXT: [[TMP37:%.*]] = getelementptr inbounds [7 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
// CHECK7-NEXT: [[TMP38:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK7-NEXT: [[LOADEDV4:%.*]] = trunc i8 [[TMP38]] to i1
+// CHECK7-NEXT: [[LOADEDV4:%.*]] = icmp ne i8 [[TMP38]], 0
// CHECK7-NEXT: [[TMP39:%.*]] = select i1 [[LOADEDV4]], i32 0, i32 1
// CHECK7-NEXT: [[TMP40:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP39]], 0
// CHECK7-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
@@ -7072,12 +7072,12 @@ int bar(int n){
// CHECK7-NEXT: store i32 [[TMP5]], ptr [[B_CASTED]], align 4
// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[B_CASTED]], align 4
// CHECK7-NEXT: [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK7-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// CHECK7-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// CHECK7-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK7-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
// CHECK7-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK7-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK7-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK7-NEXT: br i1 [[LOADEDV3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK7: omp_if.then:
// CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l214.omp_outlined, ptr [[TMP1]], i32 [[TMP6]], i32 [[TMP2]], i32 [[TMP3]], ptr [[TMP4]], i32 [[TMP8]])
@@ -7128,7 +7128,7 @@ int bar(int n){
// CHECK7-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8
// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK7-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK7-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK7-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK7-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK7: omp_if.then:
// CHECK7-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
@@ -8727,7 +8727,7 @@ int bar(int n){
// CHECK13-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8
// CHECK13-NEXT: store i64 [[TMP6]], ptr [[DOTOMP_IV]], align 8
// CHECK13-NEXT: [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK13-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// CHECK13-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// CHECK13-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK13: omp_if.then:
// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -9250,7 +9250,7 @@ int bar(int n){
// CHECK15-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8
// CHECK15-NEXT: store i64 [[TMP5]], ptr [[DOTOMP_IV]], align 8
// CHECK15-NEXT: [[TMP6:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK15-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// CHECK15-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// CHECK15-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK15: omp_if.then:
// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -11752,7 +11752,7 @@ int bar(int n){
// CHECK21-NEXT: [[C:%.*]] = load ptr, ptr [[TMP9]], align 8
// CHECK21-NEXT: [[TMP10:%.*]] = getelementptr inbounds i64, ptr [[TMP1]], i32 5
// CHECK21-NEXT: [[TMP11:%.*]] = load i8, ptr [[TMP10]], align 8
-// CHECK21-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK21-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK21-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK21-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK21-NEXT: [[DYN_PTR_ADDR:%.*]] = getelementptr inbounds i64, ptr [[TMP1]], i32 6
@@ -11762,12 +11762,12 @@ int bar(int n){
// CHECK21-NEXT: store i32 [[TMP12]], ptr [[B_CASTED]], align 4
// CHECK21-NEXT: [[TMP13:%.*]] = load i64, ptr [[B_CASTED]], align 8
// CHECK21-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK21-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP14]] to i1
+// CHECK21-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP14]], 0
// CHECK21-NEXT: [[STOREDV3:%.*]] = zext i1 [[LOADEDV2]] to i8
// CHECK21-NEXT: store i8 [[STOREDV3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK21-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
// CHECK21-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK21-NEXT: [[LOADEDV4:%.*]] = trunc i8 [[TMP16]] to i1
+// CHECK21-NEXT: [[LOADEDV4:%.*]] = icmp ne i8 [[TMP16]], 0
// CHECK21-NEXT: br i1 [[LOADEDV4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK21: omp_if.then:
// CHECK21-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l214.omp_outlined, ptr [[THIS]], i64 [[TMP13]], i64 [[TMP6]], i64 [[TMP8]], ptr [[C]], i64 [[TMP15]])
@@ -11818,7 +11818,7 @@ int bar(int n){
// CHECK21-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8
// CHECK21-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK21-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK21-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK21-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK21-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK21: omp_if.then:
// CHECK21-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -12693,7 +12693,7 @@ int bar(int n){
// CHECK23-NEXT: [[C:%.*]] = load ptr, ptr [[TMP9]], align 4
// CHECK23-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 5
// CHECK23-NEXT: [[TMP11:%.*]] = load i8, ptr [[TMP10]], align 4
-// CHECK23-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK23-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK23-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK23-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK23-NEXT: [[DYN_PTR_ADDR:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 6
@@ -12703,12 +12703,12 @@ int bar(int n){
// CHECK23-NEXT: store i32 [[TMP12]], ptr [[B_CASTED]], align 4
// CHECK23-NEXT: [[TMP13:%.*]] = load i32, ptr [[B_CASTED]], align 4
// CHECK23-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK23-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP14]] to i1
+// CHECK23-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP14]], 0
// CHECK23-NEXT: [[STOREDV3:%.*]] = zext i1 [[LOADEDV2]] to i8
// CHECK23-NEXT: store i8 [[STOREDV3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK23-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
// CHECK23-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK23-NEXT: [[LOADEDV4:%.*]] = trunc i8 [[TMP16]] to i1
+// CHECK23-NEXT: [[LOADEDV4:%.*]] = icmp ne i8 [[TMP16]], 0
// CHECK23-NEXT: br i1 [[LOADEDV4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK23: omp_if.then:
// CHECK23-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l214.omp_outlined, ptr [[THIS]], i32 [[TMP13]], i32 [[TMP6]], i32 [[TMP8]], ptr [[C]], i32 [[TMP15]])
@@ -12759,7 +12759,7 @@ int bar(int n){
// CHECK23-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8
// CHECK23-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK23-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK23-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK23-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK23-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK23: omp_if.then:
// CHECK23-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
diff --git a/clang/test/OpenMP/target_parallel_generic_loop_codegen-3.cpp b/clang/test/OpenMP/target_parallel_generic_loop_codegen-3.cpp
index e52704da46fac..18206912f92a0 100644
--- a/clang/test/OpenMP/target_parallel_generic_loop_codegen-3.cpp
+++ b/clang/test/OpenMP/target_parallel_generic_loop_codegen-3.cpp
@@ -110,7 +110,7 @@ int main() {
// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 3, !dbg [[DBG46]]
// CHECK1-NEXT: store ptr [[TMP7]], ptr [[TMP16]], align 8, !dbg [[DBG46]]
// CHECK1-NEXT: [[TMP17:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !dbg [[DBG47:![0-9]+]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP17]] to i1, !dbg [[DBG47]]
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP17]], 0, !dbg [[DBG47]]
// CHECK1-NEXT: [[TMP18:%.*]] = zext i1 [[LOADEDV]] to i32, !dbg [[DBG46]]
// CHECK1-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB6]], i32 [[TMP9]], i32 [[TMP18]], i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l13_debug___omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4, i32 0), !dbg [[DBG46]]
// CHECK1-NEXT: call void @__kmpc_target_deinit(), !dbg [[DBG48:![0-9]+]]
@@ -148,7 +148,7 @@ int main() {
// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !dbg [[DBG64]]
// CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[BB_ADDR]], align 8, !dbg [[DBG64]]
// CHECK1-NEXT: [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !dbg [[DBG64]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1, !dbg [[DBG64]]
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0, !dbg [[DBG64]]
// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DYN_PTR_ADDR]], align 8, !dbg [[DBG64]]
// CHECK1-NEXT: [[TMP9:%.*]] = addrspacecast ptr [[TMP3]] to ptr addrspace(1), !dbg [[DBG64]]
// CHECK1-NEXT: [[TMP10:%.*]] = addrspacecast ptr [[TMP6]] to ptr addrspace(1), !dbg [[DBG64]]
@@ -291,7 +291,7 @@ int main() {
// CHECK1-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX24]], i64 0, i64 [[IDXPROM25]], !dbg [[DBG118]]
// CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[ARRAYIDX26]], align 4, !dbg [[DBG118]]
// CHECK1-NEXT: [[TMP25:%.*]] = load i8, ptr [[TMP7]], align 1, !dbg [[DBG120:![0-9]+]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP25]] to i1, !dbg [[DBG120]]
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP25]], 0, !dbg [[DBG120]]
// CHECK1-NEXT: [[CONV:%.*]] = zext i1 [[LOADEDV]] to i32, !dbg [[DBG120]]
// CHECK1-NEXT: [[OR:%.*]] = or i32 [[CONV]], [[TMP24]], !dbg [[DBG120]]
// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[OR]], 0, !dbg [[DBG120]]
@@ -578,7 +578,7 @@ int main() {
// CHECK1-NEXT: [[ARRAYIDX22:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX20]], i64 0, i64 [[IDXPROM21]], !dbg [[DBG212]]
// CHECK1-NEXT: store i32 [[TMP22]], ptr [[ARRAYIDX22]], align 4, !dbg [[DBG214:![0-9]+]]
// CHECK1-NEXT: [[TMP24:%.*]] = load i8, ptr [[TMP8]], align 1, !dbg [[DBG215:![0-9]+]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP24]] to i1, !dbg [[DBG215]]
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP24]], 0, !dbg [[DBG215]]
// CHECK1-NEXT: [[CONV:%.*]] = zext i1 [[LOADEDV]] to i32, !dbg [[DBG215]]
// CHECK1-NEXT: store i32 [[CONV]], ptr [[D]], align 4, !dbg [[DBG216:![0-9]+]]
// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]], !dbg [[DBG217:![0-9]+]]
diff --git a/clang/test/OpenMP/target_parallel_if_codegen.cpp b/clang/test/OpenMP/target_parallel_if_codegen.cpp
index 228cfd34fd49d..6e124f13cc7bc 100644
--- a/clang/test/OpenMP/target_parallel_if_codegen.cpp
+++ b/clang/test/OpenMP/target_parallel_if_codegen.cpp
@@ -240,7 +240,7 @@ int bar(int n){
// CHECK1-NEXT: store i32 [[TMP1]], ptr [[B_CASTED]], align 4
// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[B_CASTED]], align 8
// CHECK1-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// CHECK1-NEXT: [[STOREDV2:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -272,7 +272,7 @@ int bar(int n){
// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK1-NEXT: [[TMP19:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP19]] to i1
+// CHECK1-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP19]], 0
// CHECK1-NEXT: [[TMP20:%.*]] = select i1 [[LOADEDV3]], i32 0, i32 1
// CHECK1-NEXT: [[TMP21:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP20]], 0
// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
@@ -313,7 +313,7 @@ int bar(int n){
// CHECK1-NEXT: [[STOREDV6:%.*]] = zext i1 [[CMP5]] to i8
// CHECK1-NEXT: store i8 [[STOREDV6]], ptr [[DOTCAPTURE_EXPR_4]], align 1
// CHECK1-NEXT: [[TMP38:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_4]], align 1
-// CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP38]] to i1
+// CHECK1-NEXT: [[LOADEDV7:%.*]] = icmp ne i8 [[TMP38]], 0
// CHECK1-NEXT: [[STOREDV9:%.*]] = zext i1 [[LOADEDV7]] to i8
// CHECK1-NEXT: store i8 [[STOREDV9]], ptr [[DOTCAPTURE_EXPR__CASTED8]], align 1
// CHECK1-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED8]], align 8
@@ -343,7 +343,7 @@ int bar(int n){
// CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
// CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
// CHECK1-NEXT: [[TMP52:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_4]], align 1
-// CHECK1-NEXT: [[LOADEDV15:%.*]] = trunc i8 [[TMP52]] to i1
+// CHECK1-NEXT: [[LOADEDV15:%.*]] = icmp ne i8 [[TMP52]], 0
// CHECK1-NEXT: [[TMP53:%.*]] = select i1 [[LOADEDV15]], i32 0, i32 1
// CHECK1-NEXT: [[TMP54:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP53]], 0
// CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 0
@@ -410,12 +410,12 @@ int bar(int n){
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[CMP]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
// CHECK1-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP3]] to i1
+// CHECK1-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP3]], 0
// CHECK1-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
@@ -433,7 +433,7 @@ int bar(int n){
// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK1-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP12]] to i1
+// CHECK1-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP12]], 0
// CHECK1-NEXT: [[TMP13:%.*]] = select i1 [[LOADEDV3]], i32 0, i32 1
// CHECK1-NEXT: [[TMP14:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP13]], 0
// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
@@ -683,7 +683,7 @@ int bar(int n){
// CHECK1-NEXT: store i32 [[TMP2]], ptr [[B_CASTED]], align 4
// CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[B_CASTED]], align 8
// CHECK1-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined, ptr [[TMP1]], i64 [[TMP3]])
@@ -733,7 +733,7 @@ int bar(int n){
// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
// CHECK1-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined, ptr [[TMP1]])
@@ -775,7 +775,7 @@ int bar(int n){
// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined)
@@ -955,7 +955,7 @@ int bar(int n){
// CHECK3-NEXT: store i32 [[TMP1]], ptr [[B_CASTED]], align 4
// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[B_CASTED]], align 4
// CHECK3-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// CHECK3-NEXT: [[STOREDV2:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK3-NEXT: store i8 [[STOREDV2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
@@ -987,7 +987,7 @@ int bar(int n){
// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK3-NEXT: [[TMP19:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP19]] to i1
+// CHECK3-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP19]], 0
// CHECK3-NEXT: [[TMP20:%.*]] = select i1 [[LOADEDV3]], i32 0, i32 1
// CHECK3-NEXT: [[TMP21:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP20]], 0
// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
@@ -1028,7 +1028,7 @@ int bar(int n){
// CHECK3-NEXT: [[STOREDV6:%.*]] = zext i1 [[CMP5]] to i8
// CHECK3-NEXT: store i8 [[STOREDV6]], ptr [[DOTCAPTURE_EXPR_4]], align 1
// CHECK3-NEXT: [[TMP38:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_4]], align 1
-// CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP38]] to i1
+// CHECK3-NEXT: [[LOADEDV7:%.*]] = icmp ne i8 [[TMP38]], 0
// CHECK3-NEXT: [[STOREDV9:%.*]] = zext i1 [[LOADEDV7]] to i8
// CHECK3-NEXT: store i8 [[STOREDV9]], ptr [[DOTCAPTURE_EXPR__CASTED8]], align 1
// CHECK3-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED8]], align 4
@@ -1058,7 +1058,7 @@ int bar(int n){
// CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
// CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
// CHECK3-NEXT: [[TMP52:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_4]], align 1
-// CHECK3-NEXT: [[LOADEDV15:%.*]] = trunc i8 [[TMP52]] to i1
+// CHECK3-NEXT: [[LOADEDV15:%.*]] = icmp ne i8 [[TMP52]], 0
// CHECK3-NEXT: [[TMP53:%.*]] = select i1 [[LOADEDV15]], i32 0, i32 1
// CHECK3-NEXT: [[TMP54:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP53]], 0
// CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 0
@@ -1125,12 +1125,12 @@ int bar(int n){
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[CMP]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK3-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK3-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK3-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
// CHECK3-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP3]] to i1
+// CHECK3-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP3]], 0
// CHECK3-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
@@ -1148,7 +1148,7 @@ int bar(int n){
// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK3-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP12]] to i1
+// CHECK3-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP12]], 0
// CHECK3-NEXT: [[TMP13:%.*]] = select i1 [[LOADEDV3]], i32 0, i32 1
// CHECK3-NEXT: [[TMP14:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP13]], 0
// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
@@ -1398,7 +1398,7 @@ int bar(int n){
// CHECK3-NEXT: store i32 [[TMP2]], ptr [[B_CASTED]], align 4
// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[B_CASTED]], align 4
// CHECK3-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined, ptr [[TMP1]], i32 [[TMP3]])
@@ -1448,7 +1448,7 @@ int bar(int n){
// CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
// CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined, ptr [[TMP1]])
@@ -1490,7 +1490,7 @@ int bar(int n){
// CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
// CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined)
@@ -1625,14 +1625,14 @@ int bar(int n){
// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[TMP1]], i32 0
// CHECK9-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 8
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK9-NEXT: [[DYN_PTR_ADDR:%.*]] = getelementptr inbounds i64, ptr [[TMP1]], i32 1
// CHECK9-NEXT: [[DYN_PTR:%.*]] = load ptr, ptr [[DYN_PTR_ADDR]], align 8
// CHECK9-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR1]], align 8
// CHECK9-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK9-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK9-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK9-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK9: omp_if.then:
// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined)
@@ -1702,7 +1702,7 @@ int bar(int n){
// CHECK9-NEXT: store i32 [[TMP4]], ptr [[B]], align 4
// CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds i64, ptr [[TMP1]], i32 2
// CHECK9-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 8
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK9-NEXT: [[DYN_PTR_ADDR:%.*]] = getelementptr inbounds i64, ptr [[TMP1]], i32 3
@@ -1712,7 +1712,7 @@ int bar(int n){
// CHECK9-NEXT: store i32 [[TMP7]], ptr [[B_CASTED]], align 4
// CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[B_CASTED]], align 8
// CHECK9-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK9-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK9-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK9-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK9: omp_if.then:
// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined, ptr [[THIS]], i64 [[TMP8]])
@@ -1763,14 +1763,14 @@ int bar(int n){
// CHECK9-NEXT: [[THIS:%.*]] = load ptr, ptr [[TMP2]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds i64, ptr [[TMP1]], i32 1
// CHECK9-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 8
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK9-NEXT: [[DYN_PTR_ADDR:%.*]] = getelementptr inbounds i64, ptr [[TMP1]], i32 2
// CHECK9-NEXT: [[DYN_PTR:%.*]] = load ptr, ptr [[DYN_PTR_ADDR]], align 8
// CHECK9-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR1]], align 8
// CHECK9-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK9-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP5]] to i1
+// CHECK9-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP5]], 0
// CHECK9-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK9: omp_if.then:
// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined, ptr [[THIS]])
@@ -1907,14 +1907,14 @@ int bar(int n){
// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 4
// CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0
// CHECK11-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP2]], align 4
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK11-NEXT: [[DYN_PTR_ADDR:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 1
// CHECK11-NEXT: [[DYN_PTR:%.*]] = load ptr, ptr [[DYN_PTR_ADDR]], align 4
// CHECK11-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR1]], align 4
// CHECK11-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK11-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK11-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined)
@@ -1984,7 +1984,7 @@ int bar(int n){
// CHECK11-NEXT: store i32 [[TMP4]], ptr [[B]], align 4
// CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 2
// CHECK11-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 4
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK11-NEXT: [[DYN_PTR_ADDR:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 3
@@ -1994,7 +1994,7 @@ int bar(int n){
// CHECK11-NEXT: store i32 [[TMP7]], ptr [[B_CASTED]], align 4
// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[B_CASTED]], align 4
// CHECK11-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK11-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK11-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined, ptr [[THIS]], i32 [[TMP8]])
@@ -2045,14 +2045,14 @@ int bar(int n){
// CHECK11-NEXT: [[THIS:%.*]] = load ptr, ptr [[TMP2]], align 4
// CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 1
// CHECK11-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 4
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP4]], 0
// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK11-NEXT: [[DYN_PTR_ADDR:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 2
// CHECK11-NEXT: [[DYN_PTR:%.*]] = load ptr, ptr [[DYN_PTR_ADDR]], align 4
// CHECK11-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR1]], align 4
// CHECK11-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP5]] to i1
+// CHECK11-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP5]], 0
// CHECK11-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined, ptr [[THIS]])
diff --git a/clang/test/OpenMP/target_simd_codegen.cpp b/clang/test/OpenMP/target_simd_codegen.cpp
index aa6de97f3d59c..0c2dde23f6c46 100644
--- a/clang/test/OpenMP/target_simd_codegen.cpp
+++ b/clang/test/OpenMP/target_simd_codegen.cpp
@@ -481,11 +481,11 @@ int bar(int n){
// CHECK-32: [[B_CVAL:%.+]] = load i[[SZ]], ptr [[B_ADDR]],
// OMP45: [[IF:%.+]] = icmp sgt i32 {{[^,]+}}, 60
-// OMP51: [[TOBOOL:%.+]] = trunc i8 %{{.+}} to i1
+// OMP51: [[TOBOOL:%.+]] = icmp ne i8 %{{.+}}, 0
// OMP51: [[FROMBOOL:%.+]] = zext i1 [[TOBOOL]] to i8
// OMP51: store i8 [[FROMBOOL]], ptr [[CAP:%.+]],
// OMP51: [[SIMD_COND:%.+]] = load i[[SZ]], ptr [[CAP]],
-// OMP51: [[IF:%.+]] = trunc i8 %{{.+}} to i1
+// OMP51: [[IF:%.+]] = icmp ne i8 %{{.+}}, 0
// CHECK: br i1 [[IF]], label %[[TRY:[^,]+]], label %[[FAIL:[^,]+]]
// CHECK: [[TRY]]
// We capture 2 VLA sizes in this target region
@@ -672,7 +672,7 @@ int bar(int n){
// CHECK-DAG: [[VAL_VLA2:%.+]] = load i[[SZ]], ptr [[LOCAL_VLA2]],
// CHECK-DAG: [[REF_C:%.+]] = load ptr, ptr [[LOCAL_C]],
// OMP51-DAG: [[SIMD_COND:%.+]] = load i8, ptr [[LOCAL_SIMD_COND_CASTED]],
-// OMP51-DAG: trunc i8 [[SIMD_COND]] to i1
+// OMP51-DAG: icmp ne i8 [[SIMD_COND]], 0
// OMP45-NOT: !nontemporal
// OMP51: store double {{.*}}!nontemporal
// OMP51: load double, {{.*}}!nontemporal
diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
index a0b3523f1432a..59157fa822c39 100644
--- a/clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
@@ -551,12 +551,12 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP21:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
// CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP23]] to i1
+// CHECK1-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP23]], 0
// CHECK1-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
@@ -574,7 +574,7 @@ int main() {
// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP32:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV6:%.*]] = trunc i8 [[TMP32]] to i1
+// CHECK1-NEXT: [[LOADEDV6:%.*]] = icmp ne i8 [[TMP32]], 0
// CHECK1-NEXT: [[TMP33:%.*]] = select i1 [[LOADEDV6]], i32 0, i32 1
// CHECK1-NEXT: [[TMP34:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP33]], 0
// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS8]], i32 0, i32 0
@@ -914,7 +914,7 @@ int main() {
// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -971,7 +971,7 @@ int main() {
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK1-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
@@ -1133,7 +1133,7 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP21:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -1152,7 +1152,7 @@ int main() {
// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
// CHECK1-NEXT: [[TMP31:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP31]] to i1
+// CHECK1-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP31]], 0
// CHECK1-NEXT: [[TMP32:%.*]] = select i1 [[LOADEDV5]], i32 0, i32 1
// CHECK1-NEXT: [[TMP33:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP32]], 0
// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
@@ -1485,7 +1485,7 @@ int main() {
// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -1542,7 +1542,7 @@ int main() {
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK1-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l68.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
index dd1b0f4f6a47e..f3c56508afe18 100644
--- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
@@ -606,12 +606,12 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP21:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
// CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP23]] to i1
+// CHECK1-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP23]], 0
// CHECK1-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
@@ -629,7 +629,7 @@ int main() {
// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP32:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV6:%.*]] = trunc i8 [[TMP32]] to i1
+// CHECK1-NEXT: [[LOADEDV6:%.*]] = icmp ne i8 [[TMP32]], 0
// CHECK1-NEXT: [[TMP33:%.*]] = select i1 [[LOADEDV6]], i32 0, i32 1
// CHECK1-NEXT: [[TMP34:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP33]], 0
// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS8]], i32 0, i32 0
@@ -997,7 +997,7 @@ int main() {
// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -1054,7 +1054,7 @@ int main() {
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP41]]
// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK1-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP41]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP41]]
@@ -1230,7 +1230,7 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP21:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -1249,7 +1249,7 @@ int main() {
// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
// CHECK1-NEXT: [[TMP31:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP31]] to i1
+// CHECK1-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP31]], 0
// CHECK1-NEXT: [[TMP32:%.*]] = select i1 [[LOADEDV5]], i32 0, i32 1
// CHECK1-NEXT: [[TMP33:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP32]], 0
// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
@@ -1610,7 +1610,7 @@ int main() {
// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -1667,7 +1667,7 @@ int main() {
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP59]]
// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK1-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP59]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP59]]
@@ -2278,12 +2278,12 @@ int main() {
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK3-NEXT: [[TMP21:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK3-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK3-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK3-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
// CHECK3-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP23]] to i1
+// CHECK3-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP23]], 0
// CHECK3-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
@@ -2301,7 +2301,7 @@ int main() {
// CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
// CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
// CHECK3-NEXT: [[TMP32:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV6:%.*]] = trunc i8 [[TMP32]] to i1
+// CHECK3-NEXT: [[LOADEDV6:%.*]] = icmp ne i8 [[TMP32]], 0
// CHECK3-NEXT: [[TMP33:%.*]] = select i1 [[LOADEDV6]], i32 0, i32 1
// CHECK3-NEXT: [[TMP34:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP33]], 0
// CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS8]], i32 0, i32 0
@@ -2669,7 +2669,7 @@ int main() {
// CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK3-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -2718,7 +2718,7 @@ int main() {
// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
// CHECK3-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP5]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP5]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE5:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -2733,12 +2733,12 @@ int main() {
// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
// CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
// CHECK3-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP39]]
-// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP12]] to i1
+// CHECK3-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP12]], 0
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV2]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP39]]
// CHECK3-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP39]]
// CHECK3-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP39]]
-// CHECK3-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP14]] to i1
+// CHECK3-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP14]], 0
// CHECK3-NEXT: br i1 [[LOADEDV3]], label [[OMP_IF_THEN4:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then4:
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP39]]
@@ -2773,12 +2773,12 @@ int main() {
// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
// CHECK3-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
// CHECK3-NEXT: [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV9:%.*]] = trunc i8 [[TMP24]] to i1
+// CHECK3-NEXT: [[LOADEDV9:%.*]] = icmp ne i8 [[TMP24]], 0
// CHECK3-NEXT: [[STOREDV11:%.*]] = zext i1 [[LOADEDV9]] to i8
// CHECK3-NEXT: store i8 [[STOREDV11]], ptr [[DOTCAPTURE_EXPR__CASTED10]], align 1
// CHECK3-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED10]], align 8
// CHECK3-NEXT: [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV12:%.*]] = trunc i8 [[TMP26]] to i1
+// CHECK3-NEXT: [[LOADEDV12:%.*]] = icmp ne i8 [[TMP26]], 0
// CHECK3-NEXT: br i1 [[LOADEDV12]], label [[OMP_IF_THEN13:%.*]], label [[OMP_IF_ELSE14:%.*]]
// CHECK3: omp_if.then13:
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.5, i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
@@ -2845,7 +2845,7 @@ int main() {
// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -2972,7 +2972,7 @@ int main() {
// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -3132,7 +3132,7 @@ int main() {
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK3-NEXT: [[TMP21:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK3-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK3-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK3-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -3151,7 +3151,7 @@ int main() {
// CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
// CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
// CHECK3-NEXT: [[TMP31:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP31]] to i1
+// CHECK3-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP31]], 0
// CHECK3-NEXT: [[TMP32:%.*]] = select i1 [[LOADEDV5]], i32 0, i32 1
// CHECK3-NEXT: [[TMP33:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP32]], 0
// CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
@@ -3512,7 +3512,7 @@ int main() {
// CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK3-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -3569,7 +3569,7 @@ int main() {
// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP59]]
// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK3-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP59]]
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP59]]
@@ -4113,7 +4113,7 @@ int main() {
// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
// CHECK7-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
// CHECK7-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK7-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i1
+// CHECK7-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP12]], 0
// CHECK7-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK7: omp_if.then:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
@@ -4773,12 +4773,12 @@ int main() {
// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK9-NEXT: [[TMP21:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK9-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK9-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK9-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
// CHECK9-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK9-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP23]] to i1
+// CHECK9-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP23]], 0
// CHECK9-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK9: omp_if.then:
// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
@@ -4796,7 +4796,7 @@ int main() {
// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
// CHECK9-NEXT: [[TMP32:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK9-NEXT: [[LOADEDV6:%.*]] = trunc i8 [[TMP32]] to i1
+// CHECK9-NEXT: [[LOADEDV6:%.*]] = icmp ne i8 [[TMP32]], 0
// CHECK9-NEXT: [[TMP33:%.*]] = select i1 [[LOADEDV6]], i32 0, i32 1
// CHECK9-NEXT: [[TMP34:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP33]], 0
// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS8]], i32 0, i32 0
@@ -5164,7 +5164,7 @@ int main() {
// CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK9-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK9-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -5221,7 +5221,7 @@ int main() {
// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP41]]
// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK9-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP41]]
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK9-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK9: omp_if.then:
// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP41]]
@@ -5397,7 +5397,7 @@ int main() {
// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK9-NEXT: [[TMP21:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK9-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK9-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK9-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -5416,7 +5416,7 @@ int main() {
// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
// CHECK9-NEXT: [[TMP31:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK9-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP31]] to i1
+// CHECK9-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP31]], 0
// CHECK9-NEXT: [[TMP32:%.*]] = select i1 [[LOADEDV5]], i32 0, i32 1
// CHECK9-NEXT: [[TMP33:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP32]], 0
// CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
@@ -5777,7 +5777,7 @@ int main() {
// CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK9-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK9-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -5834,7 +5834,7 @@ int main() {
// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP59]]
// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK9-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP59]]
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK9-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK9: omp_if.then:
// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP59]]
@@ -6445,12 +6445,12 @@ int main() {
// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK11-NEXT: [[TMP21:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK11-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK11-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK11-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
// CHECK11-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP23]] to i1
+// CHECK11-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP23]], 0
// CHECK11-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
@@ -6468,7 +6468,7 @@ int main() {
// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
// CHECK11-NEXT: [[TMP32:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV6:%.*]] = trunc i8 [[TMP32]] to i1
+// CHECK11-NEXT: [[LOADEDV6:%.*]] = icmp ne i8 [[TMP32]], 0
// CHECK11-NEXT: [[TMP33:%.*]] = select i1 [[LOADEDV6]], i32 0, i32 1
// CHECK11-NEXT: [[TMP34:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP33]], 0
// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS8]], i32 0, i32 0
@@ -6836,7 +6836,7 @@ int main() {
// CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK11-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK11-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -6885,7 +6885,7 @@ int main() {
// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
// CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
// CHECK11-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP5]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP5]], 0
// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE5:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -6900,12 +6900,12 @@ int main() {
// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
// CHECK11-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
// CHECK11-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP39]]
-// CHECK11-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP12]] to i1
+// CHECK11-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP12]], 0
// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV2]] to i8
// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP39]]
// CHECK11-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP39]]
// CHECK11-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP39]]
-// CHECK11-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP14]] to i1
+// CHECK11-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP14]], 0
// CHECK11-NEXT: br i1 [[LOADEDV3]], label [[OMP_IF_THEN4:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then4:
// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP39]]
@@ -6940,12 +6940,12 @@ int main() {
// CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
// CHECK11-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
// CHECK11-NEXT: [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV9:%.*]] = trunc i8 [[TMP24]] to i1
+// CHECK11-NEXT: [[LOADEDV9:%.*]] = icmp ne i8 [[TMP24]], 0
// CHECK11-NEXT: [[STOREDV11:%.*]] = zext i1 [[LOADEDV9]] to i8
// CHECK11-NEXT: store i8 [[STOREDV11]], ptr [[DOTCAPTURE_EXPR__CASTED10]], align 1
// CHECK11-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED10]], align 8
// CHECK11-NEXT: [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV12:%.*]] = trunc i8 [[TMP26]] to i1
+// CHECK11-NEXT: [[LOADEDV12:%.*]] = icmp ne i8 [[TMP26]], 0
// CHECK11-NEXT: br i1 [[LOADEDV12]], label [[OMP_IF_THEN13:%.*]], label [[OMP_IF_ELSE14:%.*]]
// CHECK11: omp_if.then13:
// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.5, i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
@@ -7012,7 +7012,7 @@ int main() {
// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -7139,7 +7139,7 @@ int main() {
// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -7299,7 +7299,7 @@ int main() {
// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK11-NEXT: [[TMP21:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK11-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK11-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK11-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -7318,7 +7318,7 @@ int main() {
// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
// CHECK11-NEXT: [[TMP31:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP31]] to i1
+// CHECK11-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP31]], 0
// CHECK11-NEXT: [[TMP32:%.*]] = select i1 [[LOADEDV5]], i32 0, i32 1
// CHECK11-NEXT: [[TMP33:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP32]], 0
// CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
@@ -7679,7 +7679,7 @@ int main() {
// CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK11-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK11-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -7736,7 +7736,7 @@ int main() {
// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP59]]
// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK11-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP59]]
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP59]]
@@ -8280,7 +8280,7 @@ int main() {
// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
// CHECK15-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
// CHECK15-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK15-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i1
+// CHECK15-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP12]], 0
// CHECK15-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK15: omp_if.then:
// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
diff --git a/clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp
index 862c851d9c44d..3131c5aa405f7 100644
--- a/clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp
@@ -1254,7 +1254,7 @@ int main() {
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
// CHECK1: land.rhs:
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4
@@ -1285,11 +1285,11 @@ int main() {
// CHECK1-NEXT: ]
// CHECK1: .omp.reduction.case1:
// CHECK1-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP0]], align 1
-// CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP15]] to i1
+// CHECK1-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP15]], 0
// CHECK1-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]]
// CHECK1: land.rhs6:
// CHECK1-NEXT: [[TMP16:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP16]] to i1
+// CHECK1-NEXT: [[LOADEDV7:%.*]] = icmp ne i8 [[TMP16]], 0
// CHECK1-NEXT: br label [[LAND_END8]]
// CHECK1: land.end8:
// CHECK1-NEXT: [[TMP17:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ]
@@ -1299,20 +1299,20 @@ int main() {
// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
// CHECK1: .omp.reduction.case2:
// CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP18]] to i1
+// CHECK1-NEXT: [[LOADEDV10:%.*]] = icmp ne i8 [[TMP18]], 0
// CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1
// CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]
// CHECK1: atomic_cont:
// CHECK1-NEXT: [[TMP19:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP25:%.*]], [[LAND_END17:%.*]] ]
-// CHECK1-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP19]] to i1
+// CHECK1-NEXT: [[LOADEDV11:%.*]] = icmp ne i8 [[TMP19]], 0
// CHECK1-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8
// CHECK1-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1
// CHECK1-NEXT: [[TMP20:%.*]] = load i8, ptr [[_TMP12]], align 1
-// CHECK1-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP20]] to i1
+// CHECK1-NEXT: [[LOADEDV14:%.*]] = icmp ne i8 [[TMP20]], 0
// CHECK1-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]]
// CHECK1: land.rhs15:
// CHECK1-NEXT: [[TMP21:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK1-NEXT: [[LOADEDV16:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK1-NEXT: br label [[LAND_END17]]
// CHECK1: land.end17:
// CHECK1-NEXT: [[TMP22:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ]
@@ -1344,11 +1344,11 @@ int main() {
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
// CHECK1: land.rhs:
// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1
-// CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK1-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK1-NEXT: br label [[LAND_END]]
// CHECK1: land.end:
// CHECK1-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ]
@@ -1423,7 +1423,7 @@ int main() {
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]
// CHECK1: lor.rhs:
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4
@@ -1454,11 +1454,11 @@ int main() {
// CHECK1-NEXT: ]
// CHECK1: .omp.reduction.case1:
// CHECK1-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP0]], align 1
-// CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP15]] to i1
+// CHECK1-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP15]], 0
// CHECK1-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]]
// CHECK1: lor.rhs6:
// CHECK1-NEXT: [[TMP16:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP16]] to i1
+// CHECK1-NEXT: [[LOADEDV7:%.*]] = icmp ne i8 [[TMP16]], 0
// CHECK1-NEXT: br label [[LOR_END8]]
// CHECK1: lor.end8:
// CHECK1-NEXT: [[TMP17:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ]
@@ -1468,20 +1468,20 @@ int main() {
// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
// CHECK1: .omp.reduction.case2:
// CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP18]] to i1
+// CHECK1-NEXT: [[LOADEDV10:%.*]] = icmp ne i8 [[TMP18]], 0
// CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1
// CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]
// CHECK1: atomic_cont:
// CHECK1-NEXT: [[TMP19:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP25:%.*]], [[LOR_END17:%.*]] ]
-// CHECK1-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP19]] to i1
+// CHECK1-NEXT: [[LOADEDV11:%.*]] = icmp ne i8 [[TMP19]], 0
// CHECK1-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8
// CHECK1-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1
// CHECK1-NEXT: [[TMP20:%.*]] = load i8, ptr [[_TMP12]], align 1
-// CHECK1-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP20]] to i1
+// CHECK1-NEXT: [[LOADEDV14:%.*]] = icmp ne i8 [[TMP20]], 0
// CHECK1-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]]
// CHECK1: lor.rhs15:
// CHECK1-NEXT: [[TMP21:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK1-NEXT: [[LOADEDV16:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK1-NEXT: br label [[LOR_END17]]
// CHECK1: lor.end17:
// CHECK1-NEXT: [[TMP22:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ]
@@ -1513,11 +1513,11 @@ int main() {
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]
// CHECK1: lor.rhs:
// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1
-// CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK1-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK1-NEXT: br label [[LOR_END]]
// CHECK1: lor.end:
// CHECK1-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ]
@@ -3255,7 +3255,7 @@ int main() {
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
// CHECK1-NEXT: [[TMP10:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP10]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
// CHECK1: land.rhs:
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
@@ -3290,11 +3290,11 @@ int main() {
// CHECK1-NEXT: ]
// CHECK1: .omp.reduction.case1:
// CHECK1-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP0]], align 1
-// CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP17]] to i1
+// CHECK1-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP17]], 0
// CHECK1-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]]
// CHECK1: land.rhs6:
// CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP18]] to i1
+// CHECK1-NEXT: [[LOADEDV7:%.*]] = icmp ne i8 [[TMP18]], 0
// CHECK1-NEXT: br label [[LAND_END8]]
// CHECK1: land.end8:
// CHECK1-NEXT: [[TMP19:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ]
@@ -3304,20 +3304,20 @@ int main() {
// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
// CHECK1: .omp.reduction.case2:
// CHECK1-NEXT: [[TMP20:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP20]] to i1
+// CHECK1-NEXT: [[LOADEDV10:%.*]] = icmp ne i8 [[TMP20]], 0
// CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1
// CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]
// CHECK1: atomic_cont:
// CHECK1-NEXT: [[TMP21:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP27:%.*]], [[LAND_END17:%.*]] ]
-// CHECK1-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK1-NEXT: [[LOADEDV11:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK1-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8
// CHECK1-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1
// CHECK1-NEXT: [[TMP22:%.*]] = load i8, ptr [[_TMP12]], align 1
-// CHECK1-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP22]] to i1
+// CHECK1-NEXT: [[LOADEDV14:%.*]] = icmp ne i8 [[TMP22]], 0
// CHECK1-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]]
// CHECK1: land.rhs15:
// CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP23]] to i1
+// CHECK1-NEXT: [[LOADEDV16:%.*]] = icmp ne i8 [[TMP23]], 0
// CHECK1-NEXT: br label [[LAND_END17]]
// CHECK1: land.end17:
// CHECK1-NEXT: [[TMP24:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ]
@@ -3349,11 +3349,11 @@ int main() {
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
// CHECK1: land.rhs:
// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1
-// CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK1-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK1-NEXT: br label [[LAND_END]]
// CHECK1: land.end:
// CHECK1-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ]
@@ -3434,7 +3434,7 @@ int main() {
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
// CHECK1-NEXT: [[TMP10:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP10]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]
// CHECK1: lor.rhs:
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
@@ -3469,11 +3469,11 @@ int main() {
// CHECK1-NEXT: ]
// CHECK1: .omp.reduction.case1:
// CHECK1-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP0]], align 1
-// CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP17]] to i1
+// CHECK1-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP17]], 0
// CHECK1-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]]
// CHECK1: lor.rhs6:
// CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP18]] to i1
+// CHECK1-NEXT: [[LOADEDV7:%.*]] = icmp ne i8 [[TMP18]], 0
// CHECK1-NEXT: br label [[LOR_END8]]
// CHECK1: lor.end8:
// CHECK1-NEXT: [[TMP19:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ]
@@ -3483,20 +3483,20 @@ int main() {
// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
// CHECK1: .omp.reduction.case2:
// CHECK1-NEXT: [[TMP20:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP20]] to i1
+// CHECK1-NEXT: [[LOADEDV10:%.*]] = icmp ne i8 [[TMP20]], 0
// CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1
// CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]
// CHECK1: atomic_cont:
// CHECK1-NEXT: [[TMP21:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP27:%.*]], [[LOR_END17:%.*]] ]
-// CHECK1-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK1-NEXT: [[LOADEDV11:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK1-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8
// CHECK1-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1
// CHECK1-NEXT: [[TMP22:%.*]] = load i8, ptr [[_TMP12]], align 1
-// CHECK1-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP22]] to i1
+// CHECK1-NEXT: [[LOADEDV14:%.*]] = icmp ne i8 [[TMP22]], 0
// CHECK1-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]]
// CHECK1: lor.rhs15:
// CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK1-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP23]] to i1
+// CHECK1-NEXT: [[LOADEDV16:%.*]] = icmp ne i8 [[TMP23]], 0
// CHECK1-NEXT: br label [[LOR_END17]]
// CHECK1: lor.end17:
// CHECK1-NEXT: [[TMP24:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ]
@@ -3528,11 +3528,11 @@ int main() {
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0
// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]
// CHECK1: lor.rhs:
// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1
-// CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK1-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK1-NEXT: br label [[LOR_END]]
// CHECK1: lor.end:
// CHECK1-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ]
@@ -5242,7 +5242,7 @@ int main() {
// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4
// CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
// CHECK3: land.rhs:
// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4
@@ -5273,11 +5273,11 @@ int main() {
// CHECK3-NEXT: ]
// CHECK3: .omp.reduction.case1:
// CHECK3-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP0]], align 1
-// CHECK3-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP15]] to i1
+// CHECK3-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP15]], 0
// CHECK3-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]]
// CHECK3: land.rhs6:
// CHECK3-NEXT: [[TMP16:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP16]] to i1
+// CHECK3-NEXT: [[LOADEDV7:%.*]] = icmp ne i8 [[TMP16]], 0
// CHECK3-NEXT: br label [[LAND_END8]]
// CHECK3: land.end8:
// CHECK3-NEXT: [[TMP17:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ]
@@ -5287,20 +5287,20 @@ int main() {
// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
// CHECK3: .omp.reduction.case2:
// CHECK3-NEXT: [[TMP18:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP18]] to i1
+// CHECK3-NEXT: [[LOADEDV10:%.*]] = icmp ne i8 [[TMP18]], 0
// CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1
// CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]]
// CHECK3: atomic_cont:
// CHECK3-NEXT: [[TMP19:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP25:%.*]], [[LAND_END17:%.*]] ]
-// CHECK3-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP19]] to i1
+// CHECK3-NEXT: [[LOADEDV11:%.*]] = icmp ne i8 [[TMP19]], 0
// CHECK3-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8
// CHECK3-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1
// CHECK3-NEXT: [[TMP20:%.*]] = load i8, ptr [[_TMP12]], align 1
-// CHECK3-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP20]] to i1
+// CHECK3-NEXT: [[LOADEDV14:%.*]] = icmp ne i8 [[TMP20]], 0
// CHECK3-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]]
// CHECK3: land.rhs15:
// CHECK3-NEXT: [[TMP21:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK3-NEXT: [[LOADEDV16:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK3-NEXT: br label [[LAND_END17]]
// CHECK3: land.end17:
// CHECK3-NEXT: [[TMP22:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ]
@@ -5332,11 +5332,11 @@ int main() {
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4
// CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
// CHECK3: land.rhs:
// CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1
-// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK3-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK3-NEXT: br label [[LAND_END]]
// CHECK3: land.end:
// CHECK3-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ]
@@ -5411,7 +5411,7 @@ int main() {
// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4
// CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]
// CHECK3: lor.rhs:
// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4
@@ -5442,11 +5442,11 @@ int main() {
// CHECK3-NEXT: ]
// CHECK3: .omp.reduction.case1:
// CHECK3-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP0]], align 1
-// CHECK3-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP15]] to i1
+// CHECK3-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP15]], 0
// CHECK3-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]]
// CHECK3: lor.rhs6:
// CHECK3-NEXT: [[TMP16:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP16]] to i1
+// CHECK3-NEXT: [[LOADEDV7:%.*]] = icmp ne i8 [[TMP16]], 0
// CHECK3-NEXT: br label [[LOR_END8]]
// CHECK3: lor.end8:
// CHECK3-NEXT: [[TMP17:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ]
@@ -5456,20 +5456,20 @@ int main() {
// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
// CHECK3: .omp.reduction.case2:
// CHECK3-NEXT: [[TMP18:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP18]] to i1
+// CHECK3-NEXT: [[LOADEDV10:%.*]] = icmp ne i8 [[TMP18]], 0
// CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1
// CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]]
// CHECK3: atomic_cont:
// CHECK3-NEXT: [[TMP19:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP25:%.*]], [[LOR_END17:%.*]] ]
-// CHECK3-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP19]] to i1
+// CHECK3-NEXT: [[LOADEDV11:%.*]] = icmp ne i8 [[TMP19]], 0
// CHECK3-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8
// CHECK3-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1
// CHECK3-NEXT: [[TMP20:%.*]] = load i8, ptr [[_TMP12]], align 1
-// CHECK3-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP20]] to i1
+// CHECK3-NEXT: [[LOADEDV14:%.*]] = icmp ne i8 [[TMP20]], 0
// CHECK3-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]]
// CHECK3: lor.rhs15:
// CHECK3-NEXT: [[TMP21:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK3-NEXT: [[LOADEDV16:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK3-NEXT: br label [[LOR_END17]]
// CHECK3: lor.end17:
// CHECK3-NEXT: [[TMP22:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ]
@@ -5501,11 +5501,11 @@ int main() {
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4
// CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]
// CHECK3: lor.rhs:
// CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1
-// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK3-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK3-NEXT: br label [[LOR_END]]
// CHECK3: lor.end:
// CHECK3-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ]
@@ -7241,7 +7241,7 @@ int main() {
// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4
// CHECK3-NEXT: [[TMP10:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP10]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
// CHECK3: land.rhs:
// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
@@ -7275,11 +7275,11 @@ int main() {
// CHECK3-NEXT: ]
// CHECK3: .omp.reduction.case1:
// CHECK3-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP0]], align 1
-// CHECK3-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP17]] to i1
+// CHECK3-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP17]], 0
// CHECK3-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]]
// CHECK3: land.rhs6:
// CHECK3-NEXT: [[TMP18:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP18]] to i1
+// CHECK3-NEXT: [[LOADEDV7:%.*]] = icmp ne i8 [[TMP18]], 0
// CHECK3-NEXT: br label [[LAND_END8]]
// CHECK3: land.end8:
// CHECK3-NEXT: [[TMP19:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ]
@@ -7289,20 +7289,20 @@ int main() {
// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
// CHECK3: .omp.reduction.case2:
// CHECK3-NEXT: [[TMP20:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP20]] to i1
+// CHECK3-NEXT: [[LOADEDV10:%.*]] = icmp ne i8 [[TMP20]], 0
// CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1
// CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]]
// CHECK3: atomic_cont:
// CHECK3-NEXT: [[TMP21:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP27:%.*]], [[LAND_END17:%.*]] ]
-// CHECK3-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK3-NEXT: [[LOADEDV11:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK3-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8
// CHECK3-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1
// CHECK3-NEXT: [[TMP22:%.*]] = load i8, ptr [[_TMP12]], align 1
-// CHECK3-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP22]] to i1
+// CHECK3-NEXT: [[LOADEDV14:%.*]] = icmp ne i8 [[TMP22]], 0
// CHECK3-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]]
// CHECK3: land.rhs15:
// CHECK3-NEXT: [[TMP23:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP23]] to i1
+// CHECK3-NEXT: [[LOADEDV16:%.*]] = icmp ne i8 [[TMP23]], 0
// CHECK3-NEXT: br label [[LAND_END17]]
// CHECK3: land.end17:
// CHECK3-NEXT: [[TMP24:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ]
@@ -7334,11 +7334,11 @@ int main() {
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4
// CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
// CHECK3: land.rhs:
// CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1
-// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK3-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK3-NEXT: br label [[LAND_END]]
// CHECK3: land.end:
// CHECK3-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ]
@@ -7419,7 +7419,7 @@ int main() {
// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4
// CHECK3-NEXT: [[TMP10:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP10]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]
// CHECK3: lor.rhs:
// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
@@ -7453,11 +7453,11 @@ int main() {
// CHECK3-NEXT: ]
// CHECK3: .omp.reduction.case1:
// CHECK3-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP0]], align 1
-// CHECK3-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP17]] to i1
+// CHECK3-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP17]], 0
// CHECK3-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]]
// CHECK3: lor.rhs6:
// CHECK3-NEXT: [[TMP18:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP18]] to i1
+// CHECK3-NEXT: [[LOADEDV7:%.*]] = icmp ne i8 [[TMP18]], 0
// CHECK3-NEXT: br label [[LOR_END8]]
// CHECK3: lor.end8:
// CHECK3-NEXT: [[TMP19:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ]
@@ -7467,20 +7467,20 @@ int main() {
// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
// CHECK3: .omp.reduction.case2:
// CHECK3-NEXT: [[TMP20:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP20]] to i1
+// CHECK3-NEXT: [[LOADEDV10:%.*]] = icmp ne i8 [[TMP20]], 0
// CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1
// CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]]
// CHECK3: atomic_cont:
// CHECK3-NEXT: [[TMP21:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP27:%.*]], [[LOR_END17:%.*]] ]
-// CHECK3-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK3-NEXT: [[LOADEDV11:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK3-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8
// CHECK3-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1
// CHECK3-NEXT: [[TMP22:%.*]] = load i8, ptr [[_TMP12]], align 1
-// CHECK3-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP22]] to i1
+// CHECK3-NEXT: [[LOADEDV14:%.*]] = icmp ne i8 [[TMP22]], 0
// CHECK3-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]]
// CHECK3: lor.rhs15:
// CHECK3-NEXT: [[TMP23:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK3-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP23]] to i1
+// CHECK3-NEXT: [[LOADEDV16:%.*]] = icmp ne i8 [[TMP23]], 0
// CHECK3-NEXT: br label [[LOR_END17]]
// CHECK3: lor.end17:
// CHECK3-NEXT: [[TMP24:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ]
@@ -7512,11 +7512,11 @@ int main() {
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0
// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4
// CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]
// CHECK3: lor.rhs:
// CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1
-// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK3-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK3-NEXT: br label [[LOR_END]]
// CHECK3: lor.end:
// CHECK3-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ]
@@ -8730,7 +8730,7 @@ int main() {
// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4
// CHECK9-NEXT: [[TMP9:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK9-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
// CHECK9: land.rhs:
// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4
@@ -8764,11 +8764,11 @@ int main() {
// CHECK9-NEXT: ]
// CHECK9: .omp.reduction.case1:
// CHECK9-NEXT: [[TMP16:%.*]] = load i8, ptr [[TMP0]], align 1
-// CHECK9-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP16]] to i1
+// CHECK9-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP16]], 0
// CHECK9-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]]
// CHECK9: land.rhs6:
// CHECK9-NEXT: [[TMP17:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK9-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP17]] to i1
+// CHECK9-NEXT: [[LOADEDV7:%.*]] = icmp ne i8 [[TMP17]], 0
// CHECK9-NEXT: br label [[LAND_END8]]
// CHECK9: land.end8:
// CHECK9-NEXT: [[TMP18:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ]
@@ -8778,20 +8778,20 @@ int main() {
// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
// CHECK9: .omp.reduction.case2:
// CHECK9-NEXT: [[TMP19:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK9-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP19]] to i1
+// CHECK9-NEXT: [[LOADEDV10:%.*]] = icmp ne i8 [[TMP19]], 0
// CHECK9-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1
// CHECK9-NEXT: br label [[ATOMIC_CONT:%.*]]
// CHECK9: atomic_cont:
// CHECK9-NEXT: [[TMP20:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP26:%.*]], [[LAND_END17:%.*]] ]
-// CHECK9-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP20]] to i1
+// CHECK9-NEXT: [[LOADEDV11:%.*]] = icmp ne i8 [[TMP20]], 0
// CHECK9-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8
// CHECK9-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1
// CHECK9-NEXT: [[TMP21:%.*]] = load i8, ptr [[_TMP12]], align 1
-// CHECK9-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK9-NEXT: [[LOADEDV14:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK9-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]]
// CHECK9: land.rhs15:
// CHECK9-NEXT: [[TMP22:%.*]] = load i8, ptr [[AND_VAR1]], align 1
-// CHECK9-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP22]] to i1
+// CHECK9-NEXT: [[LOADEDV16:%.*]] = icmp ne i8 [[TMP22]], 0
// CHECK9-NEXT: br label [[LAND_END17]]
// CHECK9: land.end17:
// CHECK9-NEXT: [[TMP23:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ]
@@ -8823,11 +8823,11 @@ int main() {
// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0
// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK9-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK9-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
// CHECK9: land.rhs:
// CHECK9-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1
-// CHECK9-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK9-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK9-NEXT: br label [[LAND_END]]
// CHECK9: land.end:
// CHECK9-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ]
@@ -8911,7 +8911,7 @@ int main() {
// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4
// CHECK9-NEXT: [[TMP9:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK9-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]
// CHECK9: lor.rhs:
// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4
@@ -8945,11 +8945,11 @@ int main() {
// CHECK9-NEXT: ]
// CHECK9: .omp.reduction.case1:
// CHECK9-NEXT: [[TMP16:%.*]] = load i8, ptr [[TMP0]], align 1
-// CHECK9-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP16]] to i1
+// CHECK9-NEXT: [[LOADEDV5:%.*]] = icmp ne i8 [[TMP16]], 0
// CHECK9-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]]
// CHECK9: lor.rhs6:
// CHECK9-NEXT: [[TMP17:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK9-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP17]] to i1
+// CHECK9-NEXT: [[LOADEDV7:%.*]] = icmp ne i8 [[TMP17]], 0
// CHECK9-NEXT: br label [[LOR_END8]]
// CHECK9: lor.end8:
// CHECK9-NEXT: [[TMP18:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ]
@@ -8959,20 +8959,20 @@ int main() {
// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
// CHECK9: .omp.reduction.case2:
// CHECK9-NEXT: [[TMP19:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK9-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP19]] to i1
+// CHECK9-NEXT: [[LOADEDV10:%.*]] = icmp ne i8 [[TMP19]], 0
// CHECK9-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1
// CHECK9-NEXT: br label [[ATOMIC_CONT:%.*]]
// CHECK9: atomic_cont:
// CHECK9-NEXT: [[TMP20:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP26:%.*]], [[LOR_END17:%.*]] ]
-// CHECK9-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP20]] to i1
+// CHECK9-NEXT: [[LOADEDV11:%.*]] = icmp ne i8 [[TMP20]], 0
// CHECK9-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8
// CHECK9-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1
// CHECK9-NEXT: [[TMP21:%.*]] = load i8, ptr [[_TMP12]], align 1
-// CHECK9-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK9-NEXT: [[LOADEDV14:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK9-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]]
// CHECK9: lor.rhs15:
// CHECK9-NEXT: [[TMP22:%.*]] = load i8, ptr [[OR_VAR1]], align 1
-// CHECK9-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP22]] to i1
+// CHECK9-NEXT: [[LOADEDV16:%.*]] = icmp ne i8 [[TMP22]], 0
// CHECK9-NEXT: br label [[LOR_END17]]
// CHECK9: lor.end17:
// CHECK9-NEXT: [[TMP23:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ]
@@ -9004,11 +9004,11 @@ int main() {
// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0
// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
// CHECK9-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK9-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]
// CHECK9: lor.rhs:
// CHECK9-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1
-// CHECK9-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK9-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK9-NEXT: br label [[LOR_END]]
// CHECK9: lor.end:
// CHECK9-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ]
diff --git a/clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
index 1abe3326f935a..89df7bef76a96 100644
--- a/clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
@@ -5033,12 +5033,12 @@ int bar(int n){
// CHECK5-NEXT: store i32 [[TMP6]], ptr [[B_CASTED]], align 4
// CHECK5-NEXT: [[TMP7:%.*]] = load i64, ptr [[B_CASTED]], align 8
// CHECK5-NEXT: [[TMP8:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK5-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK5-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK5-NEXT: [[STOREDV2:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK5-NEXT: store i8 [[STOREDV2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK5-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
// CHECK5-NEXT: [[TMP10:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK5-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP10]] to i1
+// CHECK5-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP10]], 0
// CHECK5-NEXT: br i1 [[LOADEDV3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK5: omp_if.then:
// CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[THIS1]], i32 0, i32 0
@@ -5399,7 +5399,7 @@ int bar(int n){
// CHECK5-NEXT: store i32 [[TMP4]], ptr [[B_CASTED]], align 4
// CHECK5-NEXT: [[TMP5:%.*]] = load i64, ptr [[B_CASTED]], align 8
// CHECK5-NEXT: [[TMP6:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK5-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// CHECK5-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// CHECK5-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK5-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK5-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -5458,7 +5458,7 @@ int bar(int n){
// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK5-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
// CHECK5-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK5-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK5-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK5-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK5: omp_if.then:
// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -6923,12 +6923,12 @@ int bar(int n){
// CHECK7-NEXT: store i32 [[TMP5]], ptr [[B_CASTED]], align 4
// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[B_CASTED]], align 4
// CHECK7-NEXT: [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK7-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// CHECK7-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// CHECK7-NEXT: [[STOREDV2:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK7-NEXT: store i8 [[STOREDV2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
// CHECK7-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK7-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK7-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK7-NEXT: br i1 [[LOADEDV3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK7: omp_if.then:
// CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[THIS1]], i32 0, i32 0
@@ -7290,7 +7290,7 @@ int bar(int n){
// CHECK7-NEXT: store i32 [[TMP4]], ptr [[B_CASTED]], align 4
// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[B_CASTED]], align 4
// CHECK7-NEXT: [[TMP6:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK7-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// CHECK7-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// CHECK7-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK7-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
@@ -7349,7 +7349,7 @@ int bar(int n){
// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK7-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
// CHECK7-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK7-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK7-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK7-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK7: omp_if.then:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -9052,7 +9052,7 @@ int bar(int n){
// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
// CHECK13-NEXT: [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK13-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
+// CHECK13-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP7]], 0
// CHECK13-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK13: omp_if.then:
// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -9607,7 +9607,7 @@ int bar(int n){
// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
// CHECK15-NEXT: [[TMP6:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK15-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// CHECK15-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// CHECK15-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK15: omp_if.then:
// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -12344,7 +12344,7 @@ int bar(int n){
// CHECK21-NEXT: [[C:%.*]] = load ptr, ptr [[TMP8]], align 8
// CHECK21-NEXT: [[TMP9:%.*]] = getelementptr inbounds i64, ptr [[TMP0]], i32 5
// CHECK21-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 8
-// CHECK21-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i1
+// CHECK21-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP10]], 0
// CHECK21-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK21-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK21-NEXT: [[DYN_PTR_ADDR:%.*]] = getelementptr inbounds i64, ptr [[TMP0]], i32 6
@@ -12354,7 +12354,7 @@ int bar(int n){
// CHECK21-NEXT: store i32 [[TMP11]], ptr [[B_CASTED]], align 4
// CHECK21-NEXT: [[TMP12:%.*]] = load i64, ptr [[B_CASTED]], align 8
// CHECK21-NEXT: [[TMP13:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK21-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP13]] to i1
+// CHECK21-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP13]], 0
// CHECK21-NEXT: [[STOREDV3:%.*]] = zext i1 [[LOADEDV2]] to i8
// CHECK21-NEXT: store i8 [[STOREDV3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK21-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -12413,7 +12413,7 @@ int bar(int n){
// CHECK21-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK21-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
// CHECK21-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK21-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK21-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK21-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK21: omp_if.then:
// CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -13304,7 +13304,7 @@ int bar(int n){
// CHECK23-NEXT: [[C:%.*]] = load ptr, ptr [[TMP8]], align 4
// CHECK23-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i32 5
// CHECK23-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 4
-// CHECK23-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i1
+// CHECK23-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP10]], 0
// CHECK23-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK23-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK23-NEXT: [[DYN_PTR_ADDR:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i32 6
@@ -13314,7 +13314,7 @@ int bar(int n){
// CHECK23-NEXT: store i32 [[TMP11]], ptr [[B_CASTED]], align 4
// CHECK23-NEXT: [[TMP12:%.*]] = load i32, ptr [[B_CASTED]], align 4
// CHECK23-NEXT: [[TMP13:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK23-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP13]] to i1
+// CHECK23-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP13]], 0
// CHECK23-NEXT: [[STOREDV3:%.*]] = zext i1 [[LOADEDV2]] to i8
// CHECK23-NEXT: store i8 [[STOREDV3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK23-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
@@ -13373,7 +13373,7 @@ int bar(int n){
// CHECK23-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK23-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
// CHECK23-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK23-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK23-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK23-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK23: omp_if.then:
// CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
diff --git a/clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp b/clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
index 0f6cc4eba260a..3e287b92edd64 100644
--- a/clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
+++ b/clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
@@ -431,12 +431,12 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP21:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
// CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP23]] to i1
+// CHECK1-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP23]], 0
// CHECK1-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
@@ -454,7 +454,7 @@ int main() {
// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP32:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV6:%.*]] = trunc i8 [[TMP32]] to i1
+// CHECK1-NEXT: [[LOADEDV6:%.*]] = icmp ne i8 [[TMP32]], 0
// CHECK1-NEXT: [[TMP33:%.*]] = select i1 [[LOADEDV6]], i32 0, i32 1
// CHECK1-NEXT: [[TMP34:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP33]], 0
// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS8]], i32 0, i32 0
@@ -649,7 +649,7 @@ int main() {
// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -784,12 +784,12 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP21:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP21]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP21]], 0
// CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
// CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP23]] to i1
+// CHECK1-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP23]], 0
// CHECK1-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
@@ -996,7 +996,7 @@ int main() {
// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP0]], 0
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
diff --git a/clang/test/OpenMP/target_update_depend_codegen.cpp b/clang/test/OpenMP/target_update_depend_codegen.cpp
index 7e4062088a5c7..ee7eea5d4836f 100644
--- a/clang/test/OpenMP/target_update_depend_codegen.cpp
+++ b/clang/test/OpenMP/target_update_depend_codegen.cpp
@@ -110,7 +110,7 @@ void foo(int arg) {
// CK1: [[GEPP0:%.+]] = getelementptr inbounds [1 x ptr], ptr [[P]], i32 0, i32 0
// CK1: [[IF_DEVICE:%.+]] = getelementptr inbounds nuw %struct.anon{{.+}}, ptr [[CAPTURES:%.+]], i32 0, i32 0
// CK1: [[IF:%.+]] = load i8, ptr %{{.+}}
- // CK1: [[IF_BOOL:%.+]] = trunc i8 [[IF]] to i1
+ // CK1: [[IF_BOOL:%.+]] = icmp ne i8 [[IF]], 0
// CK1: [[IF:%.+]] = zext i1 [[IF_BOOL]] to i8
// CK1: store i8 [[IF]], ptr [[IF_DEVICE]],
// CK1: [[RES:%.+]] = call ptr @__kmpc_omp_task_alloc(ptr {{.+}}, i32 {{.+}}, i32 1, i[[sz]] {{64|36}}, i[[sz]] 1, ptr [[TASK_ENTRY2:@.+]])
diff --git a/clang/test/OpenMP/taskloop_simd_codegen.cpp b/clang/test/OpenMP/taskloop_simd_codegen.cpp
index 981d908901ab8..ab34ff66e5c7a 100644
--- a/clang/test/OpenMP/taskloop_simd_codegen.cpp
+++ b/clang/test/OpenMP/taskloop_simd_codegen.cpp
@@ -54,7 +54,7 @@ int main(int argc, char **argv) {
// CHECK: [[TASK_DATA:%.+]] = getelementptr inbounds nuw %{{.+}}, ptr [[TASKV]], i32 0, i32 0
// OMP45: [[IF:%.+]] = icmp ne i32 %{{.+}}, 0
// OMP50: [[IF_VAL:%.+]] = load i8, ptr %
-// OMP50: [[IF:%.+]] = trunc i8 [[IF_VAL]] to i1
+// OMP50: [[IF:%.+]] = icmp ne i8 [[IF_VAL]], 0
// CHECK: [[IF_INT:%.+]] = sext i1 [[IF]] to i32
// CHECK: [[DOWN:%.+]] = getelementptr inbounds nuw [[TD_TY:%.+]], ptr [[TASK_DATA]], i32 0, i32 5
// CHECK: store i64 0, ptr [[DOWN]],
diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
index d5be4d55fbfd8..0a03f6fe1922e 100644
--- a/clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
+++ b/clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
@@ -621,7 +621,7 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP51:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP51]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP51]], 0
// CHECK1-NEXT: [[TMP52:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
// CHECK1-NEXT: [[TMP53:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP52]], 0
// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
@@ -961,7 +961,7 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -1018,7 +1018,7 @@ int main() {
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK1-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
@@ -1242,7 +1242,7 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP51:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP51]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP51]], 0
// CHECK1-NEXT: [[TMP52:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
// CHECK1-NEXT: [[TMP53:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP52]], 0
// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
@@ -1580,7 +1580,7 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -1637,7 +1637,7 @@ int main() {
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK1-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
index f97991655dd1b..61eb5d9c5772b 100644
--- a/clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
+++ b/clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
@@ -646,7 +646,7 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP51:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP51]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP51]], 0
// CHECK1-NEXT: [[TMP52:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
// CHECK1-NEXT: [[TMP53:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP52]], 0
// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
@@ -1014,7 +1014,7 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -1071,7 +1071,7 @@ int main() {
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP45]]
// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK1-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP45]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP45]]
@@ -1309,7 +1309,7 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP51:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP51]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP51]], 0
// CHECK1-NEXT: [[TMP52:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
// CHECK1-NEXT: [[TMP53:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP52]], 0
// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
@@ -1675,7 +1675,7 @@ int main() {
// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -1732,7 +1732,7 @@ int main() {
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP63]]
// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK1-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP63]]
-// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK1-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP63]]
@@ -2380,7 +2380,7 @@ int main() {
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK3-NEXT: [[TMP51:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP51]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP51]], 0
// CHECK3-NEXT: [[TMP52:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
// CHECK3-NEXT: [[TMP53:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP52]], 0
// CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
@@ -2748,7 +2748,7 @@ int main() {
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK3-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK3-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK3-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK3-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -2797,7 +2797,7 @@ int main() {
// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
// CHECK3-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP5]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP5]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE5:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -2812,12 +2812,12 @@ int main() {
// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
// CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
// CHECK3-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP42]]
-// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP12]] to i1
+// CHECK3-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP12]], 0
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV2]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP42]]
// CHECK3-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP42]]
// CHECK3-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP42]]
-// CHECK3-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP14]] to i1
+// CHECK3-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP14]], 0
// CHECK3-NEXT: br i1 [[LOADEDV3]], label [[OMP_IF_THEN4:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then4:
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP42]]
@@ -2852,12 +2852,12 @@ int main() {
// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
// CHECK3-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
// CHECK3-NEXT: [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV9:%.*]] = trunc i8 [[TMP24]] to i1
+// CHECK3-NEXT: [[LOADEDV9:%.*]] = icmp ne i8 [[TMP24]], 0
// CHECK3-NEXT: [[STOREDV11:%.*]] = zext i1 [[LOADEDV9]] to i8
// CHECK3-NEXT: store i8 [[STOREDV11]], ptr [[DOTCAPTURE_EXPR__CASTED10]], align 1
// CHECK3-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED10]], align 8
// CHECK3-NEXT: [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV12:%.*]] = trunc i8 [[TMP26]] to i1
+// CHECK3-NEXT: [[LOADEDV12:%.*]] = icmp ne i8 [[TMP26]], 0
// CHECK3-NEXT: br i1 [[LOADEDV12]], label [[OMP_IF_THEN13:%.*]], label [[OMP_IF_ELSE14:%.*]]
// CHECK3: omp_if.then13:
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.7, i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
@@ -2924,7 +2924,7 @@ int main() {
// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -3051,7 +3051,7 @@ int main() {
// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -3273,7 +3273,7 @@ int main() {
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK3-NEXT: [[TMP51:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP51]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP51]], 0
// CHECK3-NEXT: [[TMP52:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
// CHECK3-NEXT: [[TMP53:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP52]], 0
// CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
@@ -3639,7 +3639,7 @@ int main() {
// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK3-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK3-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK3-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK3-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -3696,7 +3696,7 @@ int main() {
// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP62]]
// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK3-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP62]]
-// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK3-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP62]]
@@ -4238,7 +4238,7 @@ int main() {
// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
// CHECK7-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
// CHECK7-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK7-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i1
+// CHECK7-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP12]], 0
// CHECK7-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK7: omp_if.then:
// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
@@ -4935,7 +4935,7 @@ int main() {
// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK9-NEXT: [[TMP51:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP51]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP51]], 0
// CHECK9-NEXT: [[TMP52:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
// CHECK9-NEXT: [[TMP53:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP52]], 0
// CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
@@ -5303,7 +5303,7 @@ int main() {
// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK9-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK9-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK9-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -5360,7 +5360,7 @@ int main() {
// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP45]]
// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK9-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP45]]
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK9-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK9: omp_if.then:
// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP45]]
@@ -5598,7 +5598,7 @@ int main() {
// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK9-NEXT: [[TMP51:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP51]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP51]], 0
// CHECK9-NEXT: [[TMP52:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
// CHECK9-NEXT: [[TMP53:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP52]], 0
// CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
@@ -5964,7 +5964,7 @@ int main() {
// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK9-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK9-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK9-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -6021,7 +6021,7 @@ int main() {
// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP63]]
// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK9-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP63]]
-// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK9-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK9-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK9: omp_if.then:
// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP63]]
@@ -6669,7 +6669,7 @@ int main() {
// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK11-NEXT: [[TMP51:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP51]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP51]], 0
// CHECK11-NEXT: [[TMP52:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
// CHECK11-NEXT: [[TMP53:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP52]], 0
// CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
@@ -7037,7 +7037,7 @@ int main() {
// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK11-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK11-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK11-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK11-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -7086,7 +7086,7 @@ int main() {
// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
// CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
// CHECK11-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP5]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP5]], 0
// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE5:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -7101,12 +7101,12 @@ int main() {
// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
// CHECK11-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
// CHECK11-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP42]]
-// CHECK11-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP12]] to i1
+// CHECK11-NEXT: [[LOADEDV2:%.*]] = icmp ne i8 [[TMP12]], 0
// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV2]] to i8
// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP42]]
// CHECK11-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP42]]
// CHECK11-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP42]]
-// CHECK11-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP14]] to i1
+// CHECK11-NEXT: [[LOADEDV3:%.*]] = icmp ne i8 [[TMP14]], 0
// CHECK11-NEXT: br i1 [[LOADEDV3]], label [[OMP_IF_THEN4:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then4:
// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP42]]
@@ -7141,12 +7141,12 @@ int main() {
// CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
// CHECK11-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
// CHECK11-NEXT: [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV9:%.*]] = trunc i8 [[TMP24]] to i1
+// CHECK11-NEXT: [[LOADEDV9:%.*]] = icmp ne i8 [[TMP24]], 0
// CHECK11-NEXT: [[STOREDV11:%.*]] = zext i1 [[LOADEDV9]] to i8
// CHECK11-NEXT: store i8 [[STOREDV11]], ptr [[DOTCAPTURE_EXPR__CASTED10]], align 1
// CHECK11-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED10]], align 8
// CHECK11-NEXT: [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV12:%.*]] = trunc i8 [[TMP26]] to i1
+// CHECK11-NEXT: [[LOADEDV12:%.*]] = icmp ne i8 [[TMP26]], 0
// CHECK11-NEXT: br i1 [[LOADEDV12]], label [[OMP_IF_THEN13:%.*]], label [[OMP_IF_ELSE14:%.*]]
// CHECK11: omp_if.then13:
// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.7, i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
@@ -7213,7 +7213,7 @@ int main() {
// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -7340,7 +7340,7 @@ int main() {
// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
// CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
@@ -7562,7 +7562,7 @@ int main() {
// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK11-NEXT: [[TMP51:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP51]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP51]], 0
// CHECK11-NEXT: [[TMP52:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
// CHECK11-NEXT: [[TMP53:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP52]], 0
// CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
@@ -7928,7 +7928,7 @@ int main() {
// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK11-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP1]], 0
// CHECK11-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK11-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK11-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -7985,7 +7985,7 @@ int main() {
// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP62]]
// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
// CHECK11-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP62]]
-// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
+// CHECK11-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP11]], 0
// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK11: omp_if.then:
// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP62]]
@@ -8527,7 +8527,7 @@ int main() {
// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
// CHECK15-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
// CHECK15-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK15-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i1
+// CHECK15-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP12]], 0
// CHECK15-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK15: omp_if.then:
// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
diff --git a/clang/test/OpenMP/teams_distribute_simd_codegen.cpp b/clang/test/OpenMP/teams_distribute_simd_codegen.cpp
index d6f7bce288306..8c0790b37c9f4 100644
--- a/clang/test/OpenMP/teams_distribute_simd_codegen.cpp
+++ b/clang/test/OpenMP/teams_distribute_simd_codegen.cpp
@@ -2470,7 +2470,7 @@ int main (int argc, char **argv) {
// CHECK21-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK21-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK21-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK21-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK21-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK21-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK21-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK21-NEXT: [[TMP3:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -2518,7 +2518,7 @@ int main (int argc, char **argv) {
// CHECK21-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK21-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
// CHECK21-NEXT: [[TMP6:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK21-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// CHECK21-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// CHECK21-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK21: omp_if.then:
// CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -2706,7 +2706,7 @@ int main (int argc, char **argv) {
// CHECK23-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK23-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK23-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK23-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK23-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK23-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK23-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK23-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
@@ -2754,7 +2754,7 @@ int main (int argc, char **argv) {
// CHECK23-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK23-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
// CHECK23-NEXT: [[TMP6:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK23-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP6]] to i1
+// CHECK23-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP6]], 0
// CHECK23-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK23: omp_if.then:
// CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -2973,7 +2973,7 @@ int main (int argc, char **argv) {
// CHECK29-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK29-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_IV]], align 4
// CHECK29-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK29-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK29-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK29-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK29: omp_if.then:
// CHECK29-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -3073,7 +3073,7 @@ int main (int argc, char **argv) {
// CHECK31-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK31-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_IV]], align 4
// CHECK31-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK31-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
+// CHECK31-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP2]], 0
// CHECK31-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK31: omp_if.then:
// CHECK31-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -4131,7 +4131,7 @@ int main (int argc, char **argv) {
// CHECK37-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK37-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK37-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK37-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// CHECK37-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// CHECK37-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK37-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK37-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
@@ -4203,7 +4203,7 @@ int main (int argc, char **argv) {
// CHECK37-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK37-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
// CHECK37-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK37-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP14]] to i1
+// CHECK37-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP14]], 0
// CHECK37-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK37: omp_if.then:
// CHECK37-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -4611,7 +4611,7 @@ int main (int argc, char **argv) {
// CHECK39-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK39-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
// CHECK39-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK39-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1
+// CHECK39-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP3]], 0
// CHECK39-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
// CHECK39-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
// CHECK39-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
@@ -4683,7 +4683,7 @@ int main (int argc, char **argv) {
// CHECK39-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK39-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
// CHECK39-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
-// CHECK39-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP14]] to i1
+// CHECK39-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP14]], 0
// CHECK39-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK39: omp_if.then:
// CHECK39-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -5253,7 +5253,7 @@ int main (int argc, char **argv) {
// CHECK45-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK45-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
// CHECK45-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK45-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1
+// CHECK45-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP9]], 0
// CHECK45-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK45: omp_if.then:
// CHECK45-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
@@ -5421,7 +5421,7 @@ int main (int argc, char **argv) {
// CHECK47-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
// CHECK47-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
// CHECK47-NEXT: [[TMP8:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
-// CHECK47-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1
+// CHECK47-NEXT: [[LOADEDV:%.*]] = icmp ne i8 [[TMP8]], 0
// CHECK47-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
// CHECK47: omp_if.then:
// CHECK47-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
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