[clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)

[Kerry McLaughlin via cfe-commits]

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@@ -0,0 +1,16 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve2p2,+f16mm < %s | FileCheck %s
+
+define <vscale x 8 x half> @fmmla_f16(<vscale x 8 x half> %acc, <vscale x 8 x half> %a, <vscale x 8 x half> %b) #0 {
+; CHECK-LABEL: fmmla_f16:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fmmla z0.h, z1.h, z2.h
+; CHECK-NEXT:    ret
+entry:
+  %out = tail call <vscale x 8 x half> @llvm.aarch64.sve.fmmla.nxv8f16.nxv8f16(<vscale x 8 x half> %acc, <vscale x 8 x half> %a, <vscale x 8 x half> %b)
+  ret <vscale x 8 x half> %out
+}
+
+declare <vscale x 8 x half> @llvm.aarch64.sve.fmmla.nxv8f16.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>)
+
+attributes #0 = { "target-features"="+sve,+sve2p2,+f16mm" }
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kmclaughlin-arm wrote:

These can be removed too

https://github.com/llvm/llvm-project/pull/193017