[clang] [Clang][RISCV] Add operator overloading for builtin RVV vector types (PR #192722)

via cfe-commits cfe-commits at lists.llvm.org
Fri Apr 17 12:42:04 PDT 2026


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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp,c -- clang/test/CodeGen/RISCV/rvv-vector-arith-ops.c clang/test/CodeGen/RISCV/rvv-vector-bitwise-ops.c clang/test/CodeGen/RISCV/rvv-vector-compare-ops.c clang/test/CodeGen/RISCV/rvv-vector-shift-ops.c clang/test/CodeGen/RISCV/rvv-vector-subscript-ops.c clang/test/Sema/riscv-rvv-vector-arith-ops.c clang/include/clang/AST/TypeBase.h clang/lib/AST/ExprConstant.cpp clang/lib/AST/Type.cpp clang/lib/Sema/SemaExpr.cpp clang/lib/Sema/SemaExprCXX.cpp --diff_from_common_commit
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/clang/lib/AST/Type.cpp b/clang/lib/AST/Type.cpp
index 0cf3a756f..e104b9df6 100644
--- a/clang/lib/AST/Type.cpp
+++ b/clang/lib/AST/Type.cpp
@@ -2092,9 +2092,8 @@ bool Type::hasIntegerRepresentation() const {
   }
   if (CanonicalType->isRVVVLSBuiltinType()) {
     const auto *VT = cast<BuiltinType>(CanonicalType);
-    return VT->isRVVBool() ||
-           (VT->getKind() >= BuiltinType::RvvInt8mf8 &&
-            VT->getKind() <= BuiltinType::RvvUint64m8);
+    return VT->isRVVBool() || (VT->getKind() >= BuiltinType::RvvInt8mf8 &&
+                               VT->getKind() <= BuiltinType::RvvUint64m8);
   }
 
   return isIntegerType();
@@ -2280,8 +2279,8 @@ bool Type::hasSignedIntegerRepresentation() const {
     switch (BT->getKind()) {
 #define RVV_VECTOR_TYPE_INT(Name, Id, SingletonId, NumEls, ElBits, NF,         \
                             IsSigned)                                          \
-    case BuiltinType::Id:                                                      \
-      return IsSigned;
+  case BuiltinType::Id:                                                        \
+    return IsSigned;
 #include "clang/Basic/RISCVVTypes.def"
     default:
       break;
@@ -2351,8 +2350,8 @@ bool Type::hasUnsignedIntegerRepresentation() const {
     switch (BT->getKind()) {
 #define RVV_VECTOR_TYPE_INT(Name, Id, SingletonId, NumEls, ElBits, NF,         \
                             IsSigned)                                          \
-    case BuiltinType::Id:                                                      \
-      return !IsSigned;
+  case BuiltinType::Id:                                                        \
+    return !IsSigned;
 #include "clang/Basic/RISCVVTypes.def"
     default:
       break;
diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index 8b0c3f2b5..ad0e08be3 100644
--- a/clang/lib/Sema/SemaExpr.cpp
+++ b/clang/lib/Sema/SemaExpr.cpp
@@ -10590,7 +10590,8 @@ static bool tryGCCVectorConvertAndSplat(Sema &S, ExprResult *Scalar,
   } else if (VectorTy->isVLSBuiltinType()) {
     VectorEltTy = VectorTy->getSizelessVectorEltType(S.getASTContext());
   } else {
-    llvm_unreachable("Only Fixed-Length and sizeless vector types are handled here");
+    llvm_unreachable(
+        "Only Fixed-Length and sizeless vector types are handled here");
   }
 
   // Reject cases where the vector element type or the scalar element type are
@@ -10957,7 +10958,6 @@ QualType Sema::CheckSizelessVectorOperands(ExprResult &LHS, ExprResult &RHS,
 
   unsigned DiagID = diag::err_typecheck_invalid_operands;
 
-
   if ((OperationKind == ArithConvKind::Arithmetic) &&
       ((LHSBuiltinTy && LHSBuiltinTy->isSizelessVectorBool()) ||
        (RHSBuiltinTy && RHSBuiltinTy->isSizelessVectorBool()))) {
@@ -12082,16 +12082,18 @@ static QualType checkSizelessVectorShift(Sema &S, ExprResult &LHS,
   QualType LHSType = LHS.get()->getType();
   const BuiltinType *LHSBuiltinTy = LHSType->castAs<BuiltinType>();
 
-  QualType LHSEleType = LHSType->isVLSBuiltinType()
-                            ? LHSType->getSizelessVectorEltType(S.getASTContext())
-                            : LHSType;
+  QualType LHSEleType =
+      LHSType->isVLSBuiltinType()
+          ? LHSType->getSizelessVectorEltType(S.getASTContext())
+          : LHSType;
 
   // Note that RHS might not be a vector
   QualType RHSType = RHS.get()->getType();
   const BuiltinType *RHSBuiltinTy = RHSType->castAs<BuiltinType>();
-  QualType RHSEleType = RHSType->isVLSBuiltinType()
-                            ? RHSType->getSizelessVectorEltType(S.getASTContext())
-                            : RHSType;
+  QualType RHSEleType =
+      RHSType->isVLSBuiltinType()
+          ? RHSType->getSizelessVectorEltType(S.getASTContext())
+          : RHSType;
 
   if ((LHSBuiltinTy && LHSBuiltinTy->isSizelessVectorBool()) ||
       (RHSBuiltinTy && RHSBuiltinTy->isSizelessVectorBool())) {

``````````

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https://github.com/llvm/llvm-project/pull/192722


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