[clang] [Clang][RISCV] Add operator overloading for builtin RVV vector types (PR #192722)
Philip Reames via cfe-commits
cfe-commits at lists.llvm.org
Fri Apr 17 12:40:47 PDT 2026
https://github.com/preames created https://github.com/llvm/llvm-project/pull/192722
Enable arithmetic, bitwise, shift, unary, ternary, comparison, and subscript on RVV vector types, matching the existing SVE support as closely as can be managed with one exception. The SVE support generates _unsigned_ comparison predicates for comparisons of _signed_ types. This looks very unintuitive to me, so I changed it to use signed comparisons. I think the SVE case may just be a bug?
One other point to highlight is that comparisons are producing the full width integer type (not a boolean predicate vector), and using the 0/1 convention used by SVE rather than the 0/-1 convention used by the gcc vector extension.
I have been verbally told that GCC has added analogous support though I have not seen patches. I plan to seek confirmation of the comparison edge case before landing.
Previously discussed here:
https://github.com/riscv-non-isa/riscv-rvv-intrinsic-doc/issues/291
Originally written by Claude and heavily evolved by me, but fair warning that this is far outside my usual comfort zone. I may have screwed something up majorly, careful review appreciated.
This change deliberately does not include the following:
- sizeof w/-mrvv-vector-bits=zvl
- explicit splats, or build vector syntax
- builtin elementwise operations
These may follow in separate patches, but I'm subsetting to minimize required review discussion. Depending on reviewer preference I may drop the comparisons if the SVE divergence turns out to require too much thought.
The server is unavailable at this time. Please wait a few minutes before you try again.
More information about the cfe-commits
mailing list