[clang] [CIR] add vsqrt and vsqrtq support (PR #192282)

[via cfe-commits]

https://github.com/Kouunnn updated https://github.com/llvm/llvm-project/pull/192282

>From 5ec81800e2ceec6dd6821735982659ec744ce628 Mon Sep 17 00:00:00 2001
From: Zile Xiong <xiongzile99 at gmail.com>
Date: Tue, 14 Apr 2026 15:37:16 +0800
Subject: [PATCH 1/2] [CIR] add vsqrt and vsqrtq support

---
 clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
index 75dd19d880444..c5fcc06f50092 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
@@ -2571,8 +2571,17 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr,
   case NEON::BI__builtin_neon_vpminnm_v:
   case NEON::BI__builtin_neon_vpminnmq_v:
   case NEON::BI__builtin_neon_vsqrth_f16:
+    cgm.errorNYI(expr->getSourceRange(),
+                 std::string("unimplemented AArch64 builtin call: ") +
+                     getContext().BuiltinInfo.getName(builtinID));
+    return mlir::Value{};
   case NEON::BI__builtin_neon_vsqrt_v:
-  case NEON::BI__builtin_neon_vsqrtq_v:
+  case NEON::BI__builtin_neon_vsqrtq_v: {
+    // TODO: implement vsqrt and vsqrtq
+    // refer:
+    // https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#square-root
+    return emitNeonCall(cgm, builder, {ty}, ops, "sqrt", ty, loc);
+  }
   case NEON::BI__builtin_neon_vrbit_v:
   case NEON::BI__builtin_neon_vrbitq_v:
   case NEON::BI__builtin_neon_vmaxv_f16:

>From 8686c70e95ec2c79601ad76a5b91d6901d0c617e Mon Sep 17 00:00:00 2001
From: ZCkouun <1765074320 at qq.com>
Date: Fri, 17 Apr 2026 17:14:39 +0800
Subject: [PATCH 2/2] [CIR] Add vsqrt/vsqrtq NEON tests

---
 clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp |  8 ++------
 clang/test/CodeGen/AArch64/neon-intrinsics.c   | 14 +-------------
 2 files changed, 3 insertions(+), 19 deletions(-)

diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
index c5fcc06f50092..376f401c3186a 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
@@ -2576,12 +2576,8 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr,
                      getContext().BuiltinInfo.getName(builtinID));
     return mlir::Value{};
   case NEON::BI__builtin_neon_vsqrt_v:
-  case NEON::BI__builtin_neon_vsqrtq_v: {
-    // TODO: implement vsqrt and vsqrtq
-    // refer:
-    // https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#square-root
-    return emitNeonCall(cgm, builder, {ty}, ops, "sqrt", ty, loc);
-  }
+  case NEON::BI__builtin_neon_vsqrtq_v:
+    return emitNeonCall(cgm, builder,{ty}, ops,"sqrt",ty, loc);
   case NEON::BI__builtin_neon_vrbit_v:
   case NEON::BI__builtin_neon_vrbitq_v:
   case NEON::BI__builtin_neon_vmaxv_f16:
diff --git a/clang/test/CodeGen/AArch64/neon-intrinsics.c b/clang/test/CodeGen/AArch64/neon-intrinsics.c
index 82a10b626c223..a22ea7d78b8fa 100644
--- a/clang/test/CodeGen/AArch64/neon-intrinsics.c
+++ b/clang/test/CodeGen/AArch64/neon-intrinsics.c
@@ -21532,19 +21532,7 @@ float64x1_t test_vrecpe_f64(float64x1_t a) {
   return vrecpe_f64(a);
 }
 
-// CHECK-LABEL: define dso_local <1 x double> @test_vsqrt_f64(
-// CHECK-SAME: <1 x double> noundef [[A:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT:  [[ENTRY:.*:]]
-// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64
-// CHECK-NEXT:    [[__P0_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i32 0
-// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <1 x i64> [[__P0_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8>
-// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double>
-// CHECK-NEXT:    [[VSQRT_I:%.*]] = call <1 x double> @llvm.sqrt.v1f64(<1 x double> [[TMP2]])
-// CHECK-NEXT:    ret <1 x double> [[VSQRT_I]]
-//
-float64x1_t test_vsqrt_f64(float64x1_t a) {
-  return vsqrt_f64(a);
-}
+
 
 // CHECK-LABEL: define dso_local <1 x double> @test_vrecps_f64(
 // CHECK-SAME: <1 x double> noundef [[A:%.*]], <1 x double> noundef [[B:%.*]]) #[[ATTR0]] {