[clang] [Clang] Refactor the tests to be more uniform (PR #191944)
Nick Desaulniers via cfe-commits
cfe-commits at lists.llvm.org
Thu Apr 16 08:48:52 PDT 2026
================
@@ -1,292 +1,330 @@
// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck %s
-// PR10415
+// PR10415:
+//
+// CHECK: module asm "foo1"
+// CHECK-NEXT: module asm "foo2"
+// CHECK-NEXT: module asm "foo3"
__asm__ ("foo1");
__asm__ ("foo2");
__asm__ ("foo3");
-// CHECK: module asm "foo1"
-// CHECK-NEXT: module asm "foo2"
-// CHECK-NEXT: module asm "foo3"
void t1(int len) {
- __asm__ volatile("" : "=&r"(len), "+&r"(len));
+ // CHECK-LABEL: define{{.*}} void @t1
+ // CHECK: call { i32, i32 } asm sideeffect "", "=&r,=&r,1,~{dirflag},~{fpsr},~{flags}"
+ // CHECK-SAME: (i32 [[T1:%[.a-z0-9]+]])
+ __asm__ volatile ("" : "=&r" (len), "+&r" (len));
}
void t2(unsigned long long t) {
- __asm__ volatile("" : "+m"(t));
+ // CHECK-LABEL: define{{.*}} void @t2
+ // CHECK: call void asm sideeffect "", "=*m,*m,~{dirflag},~{fpsr},~{flags}"
+ // CHECK-SAME: (ptr elementtype(i64) [[T2:%[a-z0-9.]+]], ptr elementtype(i64) [[T2]])
+ __asm__ volatile ("" : "+m" (t));
}
void t3(unsigned char *src, unsigned long long temp) {
- __asm__ volatile("" : "+m"(temp), "+r"(src));
+ // CHECK-LABEL: define{{.*}} void @t3
+ // CHECK: call ptr asm sideeffect "", "=*m,=r,*m,1,~{dirflag},~{fpsr},~{flags}"
+ // CHECK-SAME: (ptr elementtype(i64) [[T3:%[a-z0-9.]+]], ptr elementtype(i64) [[T3]], ptr %{{.*}})
+ __asm__ volatile ("" : "+m" (temp), "+r" (src));
}
void t4(void) {
+ // CHECK-LABEL: define{{.*}} void @t4
+ // CHECK: call void asm sideeffect "", "*m,*m,~{dirflag},~{fpsr},~{flags}"
+ // CHECK-SAME: (ptr elementtype(i64) %{{.*}}, ptr elementtype(%struct.reg) %{{.*}})
unsigned long long a;
struct reg { unsigned long long a, b; } b;
- __asm__ volatile ("":: "m"(a), "m"(b));
+ __asm__ volatile ("" : : "m" (a), "m" (b));
}
// PR3417
void t5(int i) {
- asm("nop" : "=r"(i) : "0"(t5));
+ // CHECK-LABEL: define{{.*}} void @t5
+ // CHECK: call i32 asm "nop", "=r,0,~{dirflag},~{fpsr},~{flags}"(ptr @t5)
+ asm ("nop" : "=r" (i) : "0" (t5));
}
// PR3641
void t6(void) {
- __asm__ volatile("" : : "i" (t6));
+ // CHECK-LABEL: define{{.*}} void @t6
+ // CHECK: call void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(ptr @{{.*}})
+ __asm__ volatile ("" : : "i" (t6));
}
void t7(int a) {
- __asm__ volatile("T7 NAMED: %[input]" : "+r"(a): [input] "i" (4));
- // CHECK: @t7(i32
- // CHECK: T7 NAMED: $1
+ // CHECK-LABEL: define{{.*}} void @t7
+ // CHECK: call i32 asm sideeffect "T7 NAMED: $1", "=r,i,0,~{dirflag},~{fpsr},~{flags}"
+ // CHECK-SAME: (i32 4, i32 %{{.*}})
+ __asm__ volatile ("T7 NAMED: %[input]" : "+r" (a): [input] "i" (4));
}
void t8(void) {
- __asm__ volatile("T8 NAMED MODIFIER: %c[input]" :: [input] "i" (4));
- // CHECK: @t8()
- // CHECK: T8 NAMED MODIFIER: ${0:c}
+ // CHECK-LABEL: define{{.*}} void @t8
+ // CHECK: call void asm sideeffect "T8 NAMED MODIFIER: ${0:c}", "i,~{dirflag},~{fpsr},~{flags}"(i32 4)
+ __asm__ volatile ("T8 NAMED MODIFIER: %c[input]" : : [input] "i" (4));
}
// PR3682
unsigned t9(unsigned int a) {
- asm("bswap %0 %1" : "+r" (a));
+ // CHECK-LABEL: define{{.*}} i32 @t9
+ // CHECK: call i32 asm "bswap $0 $1", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}})
+ asm ("bswap %0 %1" : "+r" (a));
return a;
}
-// PR3908
-void t10(int r) {
- __asm__("PR3908 %[lf] %[xx] %[li] %[r]" : [r] "+r" (r) : [lf] "mx" (0), [li] "mr" (0), [xx] "x" ((double)(0)));
-
-// CHECK: @t10(
-// CHECK:PR3908 $1 $3 $2 $0
-}
-
// PR3373
-unsigned t11(signed char input) {
+unsigned t10(signed char input) {
+ // CHECK-LABEL: define{{.*}} i32 @t10
+ // CHECK: call i32 asm "xyz", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}})
unsigned output;
- __asm__("xyz"
- : "=a" (output)
- : "0" (input));
+
+ __asm__ ("xyz" : "=a" (output) : "0" (input));
return output;
}
// PR3373
-unsigned char t12(unsigned input) {
+unsigned char t11(unsigned input) {
+ // CHECK-LABEL: define{{.*}} i8 @t11
+ // CHECK: call i32 asm "xyz", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}})
unsigned char output;
- __asm__("xyz"
- : "=a" (output)
- : "0" (input));
+
+ __asm__ ("xyz" : "=a" (output) : "0" (input));
return output;
}
-unsigned char t13(unsigned input) {
+unsigned char t12(unsigned input) {
+ // CHECK-LABEL: define{{.*}} i8 @t12
+ // CHECK: call i32 asm "xyz $1", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}})
unsigned char output;
- __asm__("xyz %1"
- : "=a" (output)
- : "0" (input));
+
+ __asm__ ("xyz %1" : "=a" (output) : "0" (input));
return output;
}
-struct large {
- int x[1000];
+// bitfield destination of an asm.
+struct S {
+ int a : 4;
};
-unsigned long t15(int x, struct large *P) {
- __asm__("xyz "
- : "=r" (x)
- : "m" (*P), "0" (x));
- return x;
+void t13(struct S *P) {
+ // CHECK-LABEL: define{{.*}} void @t13
+ // CHECK: call i32 asm "abc $0", "=r,~{dirflag},~{fpsr},~{flags}"()
+ __asm__ ("abc %0" : "=r" (P->a));
}
-// bitfield destination of an asm.
-struct S {
- int a : 4;
+struct large {
+ int x[1000];
};
-void t14(struct S *P) {
- __asm__("abc %0" : "=r"(P->a) );
+unsigned long t14(int x, struct large *P) {
+ // CHECK-LABEL: define{{.*}} i32 @t14
+ // CHECK: call i32 asm "xyz ", "=r,*m,0,~{dirflag},~{fpsr},~{flags}"
+ // CHECK-SAME: (ptr elementtype(%struct.large) %{{.*}}, i32 %{{.*}})
+ __asm__ ("xyz " : "=r" (x) : "m" (*P), "0" (x));
+ return x;
}
// PR4938
-int t16(void) {
- int a,b;
- asm ( "nop;"
- :"=%c" (a)
- : "r" (b)
- );
+int t15(void) {
+ // CHECK-LABEL: define{{.*}} i32 @t15
+ // CHECK: call i32 asm "nop;", "=%{cx},r,~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}})
+ int a, b;
+
+ asm ("nop;" :"=%c" (a) : "r" (b));
return 0;
}
// PR6475
-void t17(void) {
+void t16(void) {
+ // CHECK-LABEL: define{{.*}} void @t16
+ // CHECK: call void asm "nop", "=*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %{{.*}})
int i;
- __asm__ ( "nop": "=m"(i));
-// CHECK: @t17()
-// CHECK: call void asm "nop", "=*m,
+ __asm__ ("nop": "=m" (i));
}
-int t18(unsigned data) {
+int t17(unsigned data) {
+ // CHECK-LABEL: define{{.*}} i32 @t17
+ // CHECK: [[ASM_RES:%[a-z0-9.]+]] ={{.*}} call { i32, i32 }
+ // CHECK-SAME: asm "xyz", "={ax},={dx},{ax},~{dirflag},~{fpsr},~{flags}"(i32 {{.*}})
+ // CHECK-NEXT: extractvalue { i32, i32 } [[ASM_RES]], 0
+ // CHECK-NEXT: extractvalue { i32, i32 } [[ASM_RES]], 1
int a, b;
- asm("xyz" :"=a"(a), "=d"(b) : "a"(data));
+ asm ("xyz" : "=a" (a), "=d" (b) : "a" (data));
return a + b;
-// CHECK: t18(i32
-// CHECK: = call {{.*}}asm "xyz"
-// CHECK-NEXT: extractvalue
-// CHECK-NEXT: extractvalue
}
// PR6780
-int t19(unsigned data) {
+int t18(unsigned data) {
+ // CHECK-LABEL: define{{.*}} i32 @t18
+ // CHECK: call i32 asm "x$(abc$|def$|ghi$)z", "=r,r,~{dirflag},~{fpsr},~{flags}"(i32 {{.*}})
int a, b;
- asm("x{abc|def|ghi}z" :"=r"(a): "r"(data));
+ asm ("x{abc|def|ghi}z" : "=r" (a) : "r" (data));
return a + b;
- // CHECK: t19(i32
- // CHECK: = call {{.*}}asm "x$(abc$|def$|ghi$)z"
}
// PR6845 - Mismatching source/dest fp types.
-double t20(double x) {
+double t19(double x) {
+ // CHECK-LABEL: define{{.*}} double @t19
+ // CHECK: fpext double {{.*}} to x86_fp80
+ // CHECK-NEXT: call x86_fp80 asm sideeffect "frndint", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 {{.*}})
+ // CHECK: fptrunc x86_fp80 {{.*}} to double
register long double result;
+
__asm __volatile ("frndint" : "=t" (result) : "0" (x));
return result;
-
- // CHECK: @t20
- // CHECK: fpext double {{.*}} to x86_fp80
- // CHECK-NEXT: call x86_fp80 asm sideeffect "frndint"
- // CHECK: fptrunc x86_fp80 {{.*}} to double
}
-float t21(long double x) {
+float t20(long double x) {
+ // CHECK-LABEL: define{{.*}} float @t20
+ // CHECK: call x86_fp80 asm sideeffect "frndint", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 {{.*}})
+ // CHECK-NEXT: fptrunc x86_fp80 {{.*}} to float
register float result;
+
__asm __volatile ("frndint" : "=t" (result) : "0" (x));
return result;
- // CHECK: @t21
- // CHECK: call x86_fp80 asm sideeffect "frndint"
- // CHECK-NEXT: fptrunc x86_fp80 {{.*}} to float
}
// accept 'l' constraint
-unsigned char t22(unsigned char a, unsigned char b) {
+unsigned char t21(unsigned char a, unsigned char b) {
+ // CHECK-LABEL: define{{.*}} i8 @t21
+ // CHECK: call i32 asm "0:\0A1:\0A", "=l{ax},0,{cx},~{edx},~{cc},~{dirflag},~{fpsr},~{flags}"
+ // CHECK-SAME: (i32 {{.*}}, i32 {{.*}})
unsigned int la = a;
unsigned int lb = b;
unsigned int bigres;
unsigned char res;
- __asm__ ("0:\n1:\n" : [bigres] "=la"(bigres) : [la] "0"(la), [lb] "c"(lb) :
- "edx", "cc");
+
+ __asm__ ("0:\n1:\n"
+ : [bigres] "=la"(bigres)
+ : [la] "0"(la), [lb] "c"(lb)
+ : "edx", "cc");
res = bigres;
return res;
}
// accept 'l' constraint
-unsigned char t23(unsigned char a, unsigned char b) {
+unsigned char t22(unsigned char a, unsigned char b) {
+ // CHECK-LABEL: define{{.*}} i8 @t22
+ // CHECK: call i32 asm "0:\0A1:\0A", "=l{ax},0,{cx},~{edx},~{cc},~{dirflag},~{fpsr},~{flags}"
+ // CHECK-SAME: (i32 {{.*}}, i32 {{.*}})
unsigned int la = a;
unsigned int lb = b;
unsigned char res;
- __asm__ ("0:\n1:\n" : [res] "=la"(res) : [la] "0"(la), [lb] "c"(lb) :
- "edx", "cc");
+
+ __asm__ ("0:\n1:\n"
+ : [res] "=la" (res)
+ : [la] "0" (la), [lb] "c" (lb)
+ : "edx", "cc");
return res;
}
-void *t24(char c) {
+void *t23(char c) {
+ // CHECK-LABEL: define{{.*}} ptr @t23
+ // CHECK: [[C:%[a-z0-9.]+]] = zext i8 {{.*}} to i32
+ // CHECK-NEXT: call ptr asm "foobar", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i32 [[C]])
void *addr;
- // CHECK: @t24
- // CHECK: zext i8 {{.*}} to i32
- // CHECK-NEXT: call ptr asm "foobar"
+
__asm__ ("foobar" : "=a" (addr) : "0" (c));
return addr;
}
// PR10299 - fpsr, fpcr
-void t25(void)
-{
- __asm__ __volatile__( \
- "finit" \
- : \
- : \
- :"st","st(1)","st(2)","st(3)", \
- "st(4)","st(5)","st(6)","st(7)", \
- "fpsr","fpcr" \
- );
+void t24(void) {
+ // CHECK-LABEL: define{{.*}} void @t24
+ // CHECK: call void asm sideeffect "finit", "~{st},~{st(1)},~{st(2)},~{st(3)},~{st(4)},~{st(5)},~{st(6)},~{st(7)},~{fpsr},~{fpcr},~{dirflag},~{fpsr},~{flags}"()
+ __asm__ __volatile__ ("finit" : : :
+ "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)",
+ "st(6)", "st(7)", "fpsr", "fpcr");
}
// AVX registers
typedef long long __m256i __attribute__((__vector_size__(32)));
-void t26 (__m256i *p) {
- __asm__ volatile("vmovaps %0, %%ymm0" :: "m" (*(__m256i*)p) : "ymm0");
+
+void t25(__m256i *p) {
+ // CHECK-LABEL: define{{.*}} void @t25
+ // CHECK: call void asm sideeffect "vmovaps $0, %ymm0", "*m,~{ymm0},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(<4 x i64>) {{.*}})
+ __asm__ volatile ("vmovaps %0, %%ymm0" : : "m" (*(__m256i*)p) : "ymm0");
}
// Check to make sure the inline asm non-standard dialect attribute _not_ is
// emitted.
-void t27(void) {
- asm volatile("nop");
-// CHECK: @t27
-// CHECK: call void asm sideeffect "nop"
-// CHECK-NOT: ia_nsdialect
-// CHECK: ret void
+void t26(void) {
+ // CHECK-LABEL: define{{.*}} void @t26
+ // CHECK: call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
+ // CHECK-NOT: ia_nsdialect
+ // CHECK: ret void
+ asm volatile ("nop");
}
// Check handling of '*' and '#' constraint modifiers.
-void t28(void)
-{
+void t27(void) {
+ // CHECK-LABEL: define{{.*}} void @t27
+ // CHECK: call void asm sideeffect "/* $0 */", "i|r,~{dirflag},~{fpsr},~{flags}"(i32 1)
asm volatile ("/* %0 */" : : "i#*X,*r" (1));
-// CHECK: @t28
-// CHECK: call void asm sideeffect "/* $0 */", "i|r,~{dirflag},~{fpsr},~{flags}"(i32 1)
}
-static unsigned t29_var[1];
+static unsigned t28_var[1];
-void t29(void) {
- asm volatile("movl %%eax, %0"
- :
- : "m"(t29_var));
- // CHECK: @t29
- // CHECK: call void asm sideeffect "movl %eax, $0", "*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype([1 x i32]) @t29_var)
+void t28(void) {
+ // CHECK-LABEL: define{{.*}} void @t28
+ // CHECK: call void asm sideeffect "movl %eax, $0", "*m,~{dirflag},~{fpsr},~{flags}"
+ // CHECK-SAME: (ptr elementtype([1 x i32]) @t28_var)
+ asm volatile ("movl %%eax, %0" : : "m" (t28_var));
}
-void t30(int len) {
- __asm__ volatile(""
- : "+&&rm"(len));
- // CHECK: @t30
- // CHECK: call void asm sideeffect "", "=*&rm,0,~{dirflag},~{fpsr},~{flags}"
-}
-
-void t31(int len) {
- __asm__ volatile(""
- : "+%%rm"(len), "+rm"(len));
- // CHECK: @t31
- // CHECK: call void asm sideeffect "", "=*%rm,=*rm,0,1,~{dirflag},~{fpsr},~{flags}"
-}
-
-// CHECK: @t32
-int t32(int cond)
-{
- asm goto("testl %0, %0; jne %l1;" :: "r"(cond)::label_true, loop);
- // CHECK: callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %0) #1
- // CHECK-NEXT: to label %asm.fallthrough [label %label_true, label %loop]
+int t29(int cond) {
+ // CHECK-LABEL: define{{.*}} i32 @t29
+ // CHECK: callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 {{.*}})
+ // CHECK-NEXT: to label %asm.fallthrough [label %label_true, label %loop]
+ asm goto ("testl %0, %0; jne %l1;" : : "r" (cond) : : label_true, loop);
return 0;
+
loop:
return 0;
+
label_true:
return 1;
}
-void *t33(void *ptr)
-{
+void *t30(void *ptr) {
+ // CHECK-LABEL: define{{.*}} ptr @t30
+ // CHECK: call ptr asm "lea $1, $0", "=r,p,~{dirflag},~{fpsr},~{flags}"(ptr {{.*}})
void *ret;
+
asm ("lea %1, %0" : "=r" (ret) : "p" (ptr));
return ret;
+}
+
+void t31(void) {
+ // CHECK-LABEL: define{{.*}} void @t31
+ // CHECK: call void asm sideeffect "T31 CC NAMED MODIFIER: ${0:c}", "i,~{dirflag},~{fpsr},~{flags}"
+ __asm__ volatile ("T31 CC NAMED MODIFIER: %cc[input]" : : [input] "i" (4));
+}
- // CHECK: @t33
- // CHECK: %1 = call ptr asm "lea $1, $0", "=r,p,~{dirflag},~{fpsr},~{flags}"(ptr %0)
+void t32(int len) {
----------------
nickdesaulniers wrote:
Consider adding a TODO about moving this case to a new file for just `rm` constraints.
https://github.com/llvm/llvm-project/pull/191944
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