[clang] [CIR][AArch64] Upstream Neon vget_lane/vgetq_lane builtins (PR #186119)

[Andrzej Warzyński via cfe-commits]

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@@ -0,0 +1,285 @@
+// REQUIRES: aarch64-registered-target || arm-registered-target
+
+// RUN:                   %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -disable-O0-optnone -flax-vector-conversions=none           -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=ALL,LLVM
+// RUN: %if cir-enabled %{%clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -disable-O0-optnone -flax-vector-conversions=none -fclangir -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=ALL,LLVM %}
+// RUN: %if cir-enabled %{%clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -disable-O0-optnone -flax-vector-conversions=none -fclangir -emit-cir  -o - %s |                               FileCheck %s --check-prefixes=ALL,CIR %}
+
+//=============================================================================
+// NOTES
+//
+// This file contains tests that were originally located in
+//  * clang/test/CodeGen/AArch64/neon-vget.c
+//  * clang/test/CodeGen/AArch64/poly64.c
+// The main difference is the use of RUN lines that enable ClangIR lowering;
+// therefore only builtins currently supported by ClangIR are tested here.
+//=============================================================================
+
+#include <arm_neon.h>
+
+//===------------------------------------------------------===//
+// 2.1.9.7 Extract one element from vector
+//===------------------------------------------------------===//
+// TODO(cir): Add mf8 vget_lane/vgetq_lane coverage once NEON MFloat8 support
+// is available in ClangIR.
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banach-space wrote:

What about `vdup` variants from https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#extract-one-element-from-vector?

https://github.com/llvm/llvm-project/pull/186119