[clang] [CIR][AArch64] Lower vfma lane builtins (PR #188190)

[Andrzej Warzyński via cfe-commits]

banach-space wrote:

> @banach-space I’m wondering, not sure, about the scalar `f16` CIR coverage here.
> The moved scalar file covers the LLVM path, but enabling the full `-fclangir` run for all scalar forms still hits an unrelated `Poly128` CIR NYI before the file completes. I therefore kept CIR/CIRLLVM coverage for the supported scalar `f32`/`f64` forms, but not for scalar `f16`.
> Shall I keep that split in this PR, or should I try to address/work around the unrelated `Poly128` CIR failure as follow-up so the scalar `f16` forms can also be verified through CIR?

@yairbenavraham Please note, the intrinsic group that is allocated to you is this:
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#fused-multiply-accumulate

There is neither `f16` nor `Poly128` in that group and hence no need to concern yourself with those for now.

Please, could you refactor this so that only https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#fused-multiply-accumulate-2 are covered? Thanks!

https://github.com/llvm/llvm-project/pull/188190