[clang] [clang-format] Skip protected data blocks in Verilog (PR #190695)

Björn Schäpers via cfe-commits cfe-commits at lists.llvm.org
Sat Apr 11 12:10:47 PDT 2026


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@@ -1391,8 +1391,22 @@ FormatToken *FormatTokenLexer::getNextToken() {
       FormatTok->Tok.setKind(tok::identifier);
     } else if (Style.isTableGen() && !Keywords.isTableGenKeyword(*FormatTok)) {
       FormatTok->Tok.setKind(tok::identifier);
-    } else if (Style.isVerilog() && Keywords.isVerilogIdentifier(*FormatTok)) {
-      FormatTok->Tok.setKind(tok::identifier);
+    } else if (Style.isVerilog()) {
+      if (Keywords.isVerilogIdentifier(*FormatTok))
+        FormatTok->Tok.setKind(tok::identifier);
+      // Look for the protect line. The next lines needs to be lexed as a single
+      // token.
+      if (Tokens.size() - FirstInLineIndex >= 3u &&
+          Tokens[FirstInLineIndex]->is(tok::hash) &&
+          Tokens[FirstInLineIndex + 1u]->is(tok::pp_pragma) &&
+          Tokens[FirstInLineIndex + 2u]->is(Keywords.kw_protect) &&
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HazardyKnusperkeks wrote:

Ok, sad.

https://github.com/llvm/llvm-project/pull/190695


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