[clang] [llvm] [AMDGPU] First installment of IGLP_OPT 4 (MFMAValuSpacingOpt) implementation (PR #190916)

[via cfe-commits]

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@@ -3252,6 +3267,17 @@ GCNPostScheduleDAGMILive::GCNPostScheduleDAGMILive(
 void GCNPostScheduleDAGMILive::schedule() {
   HasIGLPInstrs = hasIGLPInstrs(this);
   if (HasIGLPInstrs) {
+    // MFMAValuSpacingOpt is a pre-RA strategy whose interleaving is correct
+    // after the initial machine scheduler.  The post-RA scheduler would undo
+    // the reordering, so preserve the pre-RA schedule by skipping here.
+    // When SCHED_[GROUP_]BARRIER coexists with IGLP_OPT, IGroupLP ignores the
+    // IGLP_OPT (they are mutually exclusive), so let post-RA scheduling proceed
+    // normally.
+    // Immediate 4 == MFMAValuSpacingOpt in AMDGPUIGroupLP.cpp (IGLPStrategyID).
+    if (hasIGLPOpt(this, 4) && !hasSchedBarrier(this)) {
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hidekisaito wrote:

Reviewer feedback needed. Is this a right way? Or should iglp_opt(4) setup a mutation instead?

https://github.com/llvm/llvm-project/pull/190916