[clang] [llvm] [AArch64][clang][llvm] Add support for Armv9.7-A lookup table intrinsics (PR #187046)
Kerry McLaughlin via cfe-commits
cfe-commits at lists.llvm.org
Wed Apr 8 03:49:05 PDT 2026
================
@@ -2224,6 +2216,35 @@ void AArch64DAGToDAGISel::SelectFrintFromVT(SDNode *N, unsigned NumVecs,
SelectUnaryMultiIntrinsic(N, NumVecs, true, Opcode);
}
+void AArch64DAGToDAGISel::EmitMultiVectorLutiLane(SDNode *Node,
+ unsigned NumOutVecs,
+ unsigned Opc,
+ ArrayRef<SDValue> Ops,
+ bool HasChain) {
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kmclaughlin-arm wrote:
`HasChain` can be removed from the list of args, as you can check the opcode of `Node` instead.
https://github.com/llvm/llvm-project/pull/187046
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