[clang] [CIR][AArch64] Lower NEON vbsl builtins (PR #188449)

[Jiahao Guo via cfe-commits]

================
@@ -2226,7 +2230,19 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr,
   default:
     return std::nullopt;
   case NEON::BI__builtin_neon_vbsl_v:
-  case NEON::BI__builtin_neon_vbslq_v:
+  case NEON::BI__builtin_neon_vbslq_v: {
+    cir::VectorType bitTy = ty;
+    if (cir::isAnyFloatingPointType(bitTy.getElementType()))
+      bitTy = castVecOfFPTypeToVecOfIntWithSameWidth(builder, bitTy);
----------------
E00N777 wrote:

```
 if (!cir::isAnyFloatingPointType(bitTy.getElementType()))
```
I thought you mean 'vecTy.getElementType()' ?

https://github.com/llvm/llvm-project/pull/188449