[clang] [CIR][AArch64] Lower vfma lane builtins (PR #188190)
Andrzej WarzyĆski via cfe-commits
cfe-commits at lists.llvm.org
Mon Apr 6 11:28:30 PDT 2026
================
@@ -138,11 +138,8 @@ static cir::VectorType getNeonType(CIRGenFunction *cgf, NeonTypeFlags typeFlags,
v1Ty ? 1 : (4 << isQuad));
return cir::VectorType::get(cgf->uInt16Ty, v1Ty ? 1 : (4 << isQuad));
case NeonTypeFlags::Float16:
- if (hasLegalHalfType)
- cgf->getCIRGenModule().errorNYI(loc, std::string("NEON type: Float16"));
- else
- cgf->getCIRGenModule().errorNYI(loc, std::string("NEON type: Float16"));
- [[fallthrough]];
+ return cir::VectorType::get(cgf->getCIRGenModule().fP16Ty,
+ v1Ty ? 1 : (4 << isQuad));
----------------
banach-space wrote:
We still need to make this logic depend on `hasLegalHalfType`, see https://github.com/llvm/llvm-project/blob/8d7823ea8f40cf5df1c623018bf9c0a308fa4a36/clang/lib/CodeGen/TargetBuiltins/ARM.cpp?plain=1#L380-L382 for reference.
https://github.com/llvm/llvm-project/pull/188190
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