[clang] [clang][cir][nfc] Fix comments, add missing EOF (PR #190623)

[via cfe-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-clang

@llvm/pr-subscribers-clangir

Author: Andrzej Warzyński (banach-space)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/190623.diff


2 Files Affected:

- (modified) clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp (+2-2) 
- (modified) clang/test/CodeGen/AArch64/neon/intrinsics.c (+2-1) 


``````````diff
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
index 14e52b0de6004..3d1e11ab87354 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
@@ -183,8 +183,8 @@ static mlir::Value emitNeonSplat(CIRGenBuilderTy &builder, mlir::Location loc,
 }
 
 /// Build a constant shift amount vector of `vecTy` to shift a vector
-/// Here `shitfVal` is a constant integer that will be splated into a
-/// a const vector of `vecTy` which is the return of this function
+/// Here `shitfVal` is a constant integer that will be broadcast into a
+/// a const vector of `vecTy` which is the return value of this function
 static mlir::Value emitNeonShiftVector(CIRGenBuilderTy &builder,
                                        mlir::Value shiftVal,
                                        cir::VectorType vecTy,
diff --git a/clang/test/CodeGen/AArch64/neon/intrinsics.c b/clang/test/CodeGen/AArch64/neon/intrinsics.c
index da4463e21d0ff..e2708a846edc4 100644
--- a/clang/test/CodeGen/AArch64/neon/intrinsics.c
+++ b/clang/test/CodeGen/AArch64/neon/intrinsics.c
@@ -1476,6 +1476,7 @@ poly16x8_t test_vmull_high_p8(poly8x16_t a, poly8x16_t b) {
 
 //===------------------------------------------------------===//
 // 2.1.3.1.1. Vector Shift Left
+// https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-shift-left
 //===------------------------------------------------------===//
 
 // ALL-LABEL: test_vshld_n_s64
@@ -1703,4 +1704,4 @@ uint64x1_t test_vshl_n_u64(uint64x1_t a) {
 // LLVM:    [[VSHL_N:%.*]] = shl <1 x i64> [[TMP1]], splat (i64 1)
 // LLVM:    ret <1 x i64> [[VSHL_N]]
  return vshl_n_u64(a, 1);
-}
\ No newline at end of file
+}

``````````

</details>


https://github.com/llvm/llvm-project/pull/190623