[clang] [llvm] [X86] Enable HasFastHalfType to prevent FP16 promotion and perform FABS/FNEG lowering (PR #189395)

[Tharun V K via cfe-commits]

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@@ -23034,6 +23034,15 @@ SDValue X86TargetLowering::LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {
   MVT VT = Op.getSimpleValueType();
   MVT SVT = In.getSimpleValueType();
 
+  if (!IsStrict && VT == MVT::f16 &&
+      (In.getOpcode() == ISD::FNEG || In.getOpcode() == ISD::FABS)) {
+    SDValue Inner = In.getOperand(0);
+    if (Inner.getOpcode() == ISD::FP_EXTEND &&
+        Inner.getOperand(0).getValueType() == MVT::f16) {
+      return DAG.getNode(In.getOpcode(), DL, MVT::f16, Inner.getOperand(0));
+    }
+  }
+
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tharunvk wrote:

Yes that worked. Moved the logic to combineFP_ROUND

https://github.com/llvm/llvm-project/pull/189395