[clang] [CIR][AArch64] Lower NEON vbsl builtins (PR #188449)

[Andrzej Warzyński via cfe-commits]

================
@@ -982,3 +982,158 @@ int64_t test_vshld_u64(int64_t a,int64_t b) {
   return (int64_t)vshld_u64(a, b);
 }
 
+// LLVM-LABEL: @test_vbsl_s8(
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banach-space wrote:

Please add a block comment, e.g.:

```suggestion
//===------------------------------------------------------===//
// 2.1.8.5 Bitwise select 
// https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#markdown-toc-bitwise-select
//===------------------------------------------------------===//

// LLVM-LABEL: @test_vbsl_s8(
```

Btw, have you looked at the other variants in https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#bitwise-select?

https://github.com/llvm/llvm-project/pull/188449