[clang] [CIR][AArch64] Added vector intrinsics for shift left (PR #187516)

[Andrzej Warzyński via cfe-commits]

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@@ -1053,8 +1054,17 @@ static mlir::Value emitCommonNeonBuiltinExpr(
   case NEON::BI__builtin_neon_vsha512h2q_u64:
   case NEON::BI__builtin_neon_vsha512su0q_u64:
   case NEON::BI__builtin_neon_vsha512su1q_u64:
+    cgf.cgm.errorNYI(expr->getSourceRange(),
+                     std::string("unimplemented AArch64 builtin call: ") +
+                         ctx.BuiltinInfo.getName(builtinID));
+    return mlir::Value{};
   case NEON::BI__builtin_neon_vshl_n_v:
-  case NEON::BI__builtin_neon_vshlq_n_v:
+  case NEON::BI__builtin_neon_vshlq_n_v: {
+    auto rhsScalar = cgf.getBuilder().createIntCast(ops[1], vTy.getElementType());
+    auto rhsVec = cir::VecSplatOp::create(cgf.getBuilder(),loc, vTy, rhsScalar);
+    auto lhsVec = cgf.getBuilder().createBitcast(ops[0], vTy);
+    return cgf.getBuilder().createShiftLeft(loc, lhsVec, rhsVec);
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banach-space wrote:

It's obviously OK to diverge, especially when that improves the code, but please provide rationale in the summary. That will help reviewing :)

https://github.com/llvm/llvm-project/pull/187516