[clang] [llvm] [PowerPC] Add target feature validation for builtins in Sema (PR #187371)
Lei Huang via cfe-commits
cfe-commits at lists.llvm.org
Mon Mar 23 07:03:48 PDT 2026
https://github.com/lei137 updated https://github.com/llvm/llvm-project/pull/187371
>From 30dfa5a6961f000c5615245dc6b1fc33aea7d793 Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Wed, 18 Mar 2026 14:58:38 -0400
Subject: [PATCH 01/15] add target feature checking to sema
---
clang/lib/Sema/SemaPPC.cpp | 14 ++++++++++++++
clang/test/Sema/builtins-bcd-format-conversion.c | 6 +++---
clang/test/Sema/builtins-bcd-transform.c | 6 +++---
clang/test/Sema/builtins-ppc.c | 10 ++++------
4 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 57c880c81ac9e..8d41130b11648 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -119,6 +119,20 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo &TI,
return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
+ // Check if the builtin requires specific target features
+ StringRef FeatureList(Context.BuiltinInfo.getRequiredFeatures(BuiltinID));
+ if (!FeatureList.empty()) {
+ const auto *FD = SemaRef.getCurFunctionDecl(/*AllowLambda=*/true);
+ llvm::StringMap<bool> CallerFeatureMap;
+ Context.getFunctionFeatureMap(CallerFeatureMap, FD);
+ if (!Builtin::evaluateRequiredTargetFeatures(FeatureList,
+ CallerFeatureMap)) {
+ Diag(TheCall->getBeginLoc(), diag::err_builtin_target_unsupported)
+ << TheCall->getSourceRange();
+ return true;
+ }
+ }
+
// Common BCD type-validation helpers
// Emit error diagnostics and return true on success
// - IsTypeVecUChar: enforces vector unsigned char
diff --git a/clang/test/Sema/builtins-bcd-format-conversion.c b/clang/test/Sema/builtins-bcd-format-conversion.c
index 059340b0344e1..dc2f2b64d1a49 100644
--- a/clang/test/Sema/builtins-bcd-format-conversion.c
+++ b/clang/test/Sema/builtins-bcd-format-conversion.c
@@ -1,9 +1,9 @@
// Testfile to verify Sema diagnostics for BCD builtins bcdshift, bcdshiftround, bcdtruncate.
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-cpu pwr9 -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-cpu pwr9 -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-cpu pwr9 -triple powerpc-unknown-unknown -fsyntax-only -verify %s
#include <altivec.h>
#define DECL_COMMON_VARS \
diff --git a/clang/test/Sema/builtins-bcd-transform.c b/clang/test/Sema/builtins-bcd-transform.c
index 103a6be6452b5..bb81f7cf5cbc9 100644
--- a/clang/test/Sema/builtins-bcd-transform.c
+++ b/clang/test/Sema/builtins-bcd-transform.c
@@ -1,8 +1,8 @@
// Testfile to verify the semantics and the error handling for BCD builtins national2packed, packed2zoned and zoned2packed.
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-cpu pwr9 -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-cpu pwr9 -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-cpu pwr9 -triple powerpc-unknown-unknown -fsyntax-only -verify %s
#include <altivec.h>
vector unsigned char test_national2packed(void)
diff --git a/clang/test/Sema/builtins-ppc.c b/clang/test/Sema/builtins-ppc.c
index 0f59b990331cb..2def81fd7b19e 100644
--- a/clang/test/Sema/builtins-ppc.c
+++ b/clang/test/Sema/builtins-ppc.c
@@ -3,12 +3,10 @@
// RUN: -triple powerpc64-unknown-unknown -DTEST_HTM -fsyntax-only \
// RUN: -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +crypto \
-// RUN: -triple powerpc64le-unknown-unknown -DTEST_CRYPTO -fsyntax-only \
-// RUN: -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +crypto \
-// RUN: -triple powerpc64le-unknown-unknown -DTEST_CRYPTO -fsyntax-only \
-// RUN: -target-feature +vsx -verify %s
+// RUN: %clang_cc1 -target-cpu pwr8 -triple powerpc64le-unknown-unknown \
+// RUN: -DTEST_CRYPTO -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-cpu pwr8 -triple powerpc64le-unknown-unknown \
+// RUN: -DTEST_CRYPTO -fsyntax-only -verify %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -DTEST_MAXMIN -fsyntax-only \
// RUN: -verify %s
>From 5690025c0dfd5d6172d6e03d5965194d008c38ac Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Wed, 18 Mar 2026 15:19:10 -0400
Subject: [PATCH 02/15] update feature reqired
---
clang/test/Sema/builtins-bcd-format-conversion.c | 6 +++---
clang/test/Sema/builtins-bcd-transform.c | 8 ++++----
clang/test/Sema/builtins-ppc.c | 10 ++++++----
3 files changed, 13 insertions(+), 11 deletions(-)
diff --git a/clang/test/Sema/builtins-bcd-format-conversion.c b/clang/test/Sema/builtins-bcd-format-conversion.c
index dc2f2b64d1a49..6136d7c8d99b5 100644
--- a/clang/test/Sema/builtins-bcd-format-conversion.c
+++ b/clang/test/Sema/builtins-bcd-format-conversion.c
@@ -1,9 +1,9 @@
// Testfile to verify Sema diagnostics for BCD builtins bcdshift, bcdshiftround, bcdtruncate.
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-cpu pwr9 -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-cpu pwr9 -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-cpu pwr9 -triple powerpc-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions -triple powerpc-unknown-unknown -fsyntax-only -verify %s
#include <altivec.h>
#define DECL_COMMON_VARS \
diff --git a/clang/test/Sema/builtins-bcd-transform.c b/clang/test/Sema/builtins-bcd-transform.c
index bb81f7cf5cbc9..a153fa792aebc 100644
--- a/clang/test/Sema/builtins-bcd-transform.c
+++ b/clang/test/Sema/builtins-bcd-transform.c
@@ -1,8 +1,8 @@
// Testfile to verify the semantics and the error handling for BCD builtins national2packed, packed2zoned and zoned2packed.
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-cpu pwr9 -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-cpu pwr9 -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-cpu pwr9 -triple powerpc-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions -triple powerpc-unknown-unknown -fsyntax-only -verify %s
#include <altivec.h>
vector unsigned char test_national2packed(void)
@@ -27,4 +27,4 @@ vector unsigned char test_zoned2packed(void)
vector unsigned char res_a = __builtin_ppc_zoned2packed(a,2); // expected-error-re {{argument value {{.*}} is outside the valid range}}
vector unsigned char res_b = __builtin_ppc_zoned2packed(a, -1); // expected-error-re {{argument value {{.*}} is outside the valid range}}
return __builtin_ppc_zoned2packed(a,0);
-}
\ No newline at end of file
+}
diff --git a/clang/test/Sema/builtins-ppc.c b/clang/test/Sema/builtins-ppc.c
index 2def81fd7b19e..b7331f249f2fb 100644
--- a/clang/test/Sema/builtins-ppc.c
+++ b/clang/test/Sema/builtins-ppc.c
@@ -3,10 +3,12 @@
// RUN: -triple powerpc64-unknown-unknown -DTEST_HTM -fsyntax-only \
// RUN: -verify %s
-// RUN: %clang_cc1 -target-cpu pwr8 -triple powerpc64le-unknown-unknown \
-// RUN: -DTEST_CRYPTO -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-cpu pwr8 -triple powerpc64le-unknown-unknown \
-// RUN: -DTEST_CRYPTO -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +crypto -target-feature +power8-vector -target-feature +isa-v207-instructions \
+// RUN: -triple powerpc64le-unknown-unknown -DTEST_CRYPTO -fsyntax-only \
+// RUN: -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +crypto -target-feature +power8-vector -target-feature +isa-v207-instructions \
+// RUN: -triple powerpc64le-unknown-unknown -DTEST_CRYPTO -fsyntax-only \
+// RUN: -target-feature +vsx -verify %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -DTEST_MAXMIN -fsyntax-only \
// RUN: -verify %s
>From e12de04e2bf98ade7d5d5a1faa40986750c55b63 Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Wed, 18 Mar 2026 15:58:49 -0400
Subject: [PATCH 03/15] get more specific feature messages
---
clang/lib/Sema/SemaPPC.cpp | 10 ++++++++--
clang/test/CodeGen/PowerPC/altivec-ct.c | 4 ++--
clang/test/CodeGen/PowerPC/builtins-ppc-32bit-vec-ll.c | 2 +-
clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c | 8 ++++----
clang/test/CodeGen/PowerPC/builtins-ppc-crypto.c | 4 ++--
clang/test/CodeGen/PowerPC/builtins-ppc-error.c | 6 +++---
clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c | 6 +++---
.../test/CodeGen/PowerPC/builtins-ppc-quadword-char.c | 6 +++---
.../CodeGen/PowerPC/builtins-ppc-quadword-noi128.c | 6 +++---
clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c | 4 ++--
clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c | 4 ++--
clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c | 6 +++---
clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c | 6 +++---
clang/test/CodeGen/PowerPC/ppc-vector-compare.cpp | 2 +-
14 files changed, 40 insertions(+), 34 deletions(-)
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 8d41130b11648..66e6e675abfe0 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -16,6 +16,7 @@
#include "clang/AST/CharUnits.h"
#include "clang/AST/Decl.h"
#include "clang/AST/Type.h"
+#include "clang/Basic/DiagnosticFrontend.h"
#include "clang/Basic/DiagnosticSema.h"
#include "clang/Basic/SourceLocation.h"
#include "clang/Basic/TargetBuiltins.h"
@@ -127,8 +128,13 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo &TI,
Context.getFunctionFeatureMap(CallerFeatureMap, FD);
if (!Builtin::evaluateRequiredTargetFeatures(FeatureList,
CallerFeatureMap)) {
- Diag(TheCall->getBeginLoc(), diag::err_builtin_target_unsupported)
- << TheCall->getSourceRange();
+ // Get the builtin name from the CallExpr's callee
+ const FunctionDecl *BuiltinDecl = TheCall->getDirectCallee();
+ Diag(TheCall->getBeginLoc(), diag::err_builtin_needs_feature)
+ << (BuiltinDecl ? BuiltinDecl->getDeclName()
+ : DeclarationName(&Context.Idents.get(
+ Context.BuiltinInfo.getName(BuiltinID))))
+ << FeatureList;
return true;
}
}
diff --git a/clang/test/CodeGen/PowerPC/altivec-ct.c b/clang/test/CodeGen/PowerPC/altivec-ct.c
index 6be6cec409fa1..3f0d7ffd8b356 100644
--- a/clang/test/CodeGen/PowerPC/altivec-ct.c
+++ b/clang/test/CodeGen/PowerPC/altivec-ct.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -flax-vector-conversions=none -triple powerpc64le-linux-gnu -S -O0 -o - %s -target-feature +altivec -target-feature +vsx | FileCheck %s -check-prefix=CHECK -check-prefix=VSX
-// RUN: %clang_cc1 -flax-vector-conversions=none -triple powerpc-linux-gnu -S -O0 -o - %s -target-feature +altivec -target-feature -vsx | FileCheck %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -triple powerpc64le-linux-gnu -S -O0 -o - %s -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +vsx -target-feature +power8-vector | FileCheck %s -check-prefix=CHECK -check-prefix=VSX
+// RUN: %clang_cc1 -flax-vector-conversions=none -triple powerpc-linux-gnu -S -O0 -o - %s -target-feature +altivec -target-feature +isa-v207-instructions -target-feature -vsx | FileCheck %s
// REQUIRES: powerpc-registered-target
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-32bit-vec-ll.c b/clang/test/CodeGen/PowerPC/builtins-ppc-32bit-vec-ll.c
index a865bc59bee25..949fc48d71e32 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-32bit-vec-ll.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-32bit-vec-ll.c
@@ -1,6 +1,6 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec \
-// RUN: -target-feature +power8-vector -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s
#include <altivec.h>
vector signed long long vsll1, vsll2, vsll3;
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c b/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
index 91d1ebd045c58..94c6b33f0fd58 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
@@ -1,14 +1,14 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown -emit-llvm %s \
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc-unknown-unknown -emit-llvm %s \
// RUN: -flax-vector-conversions=none -faltivec-src-compat=mixed \
// RUN: -o - | FileCheck %s
-// RUN: %clang_cc1 -target-feature +altivec -triple powerpcle-unknown-unknown -emit-llvm %s \
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpcle-unknown-unknown -emit-llvm %s \
// RUN: -flax-vector-conversions=none -faltivec-src-compat=mixed \
// RUN: -o - | FileCheck %s -check-prefix=CHECK-LE
-// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64-unknown-unknown -emit-llvm %s \
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc64-unknown-unknown -emit-llvm %s \
// RUN: -flax-vector-conversions=none -faltivec-src-compat=mixed \
// RUN: -o - | FileCheck %s
-// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64le-unknown-unknown -emit-llvm %s \
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc64le-unknown-unknown -emit-llvm %s \
// RUN: -flax-vector-conversions=none -faltivec-src-compat=mixed \
// RUN: -o - | FileCheck %s -check-prefix=CHECK-LE
// RUN: not %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-crypto.c b/clang/test/CodeGen/PowerPC/builtins-ppc-crypto.c
index b4a3a2e33683b..e26c0101bd4b8 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-crypto.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-crypto.c
@@ -1,10 +1,10 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -triple powerpc64le-unknown-unknown \
-// RUN: -target-feature +crypto -target-feature +power8-vector \
+// RUN: -target-feature +crypto -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -emit-llvm %s -o - | FileCheck %s
// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -triple powerpc64-unknown-unknown \
-// RUN: -target-feature +crypto -target-feature +power8-vector \
+// RUN: -target-feature +crypto -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -emit-llvm %s -o - | FileCheck %s
#include <altivec.h>
#define B_INIT1 { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, \
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-error.c b/clang/test/CodeGen/PowerPC/builtins-ppc-error.c
index acee472df7dc3..32eaa194e89be 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-error.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-error.c
@@ -1,16 +1,16 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector \
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-unknown -fsyntax-only \
// RUN: -flax-vector-conversions=integer \
// RUN: -Wall -Werror -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector \
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64le-unknown-unknown -fsyntax-only \
// RUN: -flax-vector-conversions=integer \
// RUN: -Wall -Werror -verify %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +power9-vector \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-unknown -fsyntax-only \
// RUN: -Wall -Werror -verify %s
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c b/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
index 68d32ee14c8fa..d5925cc70c756 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
@@ -1,15 +1,15 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector \
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-unknown -emit-llvm %s \
// RUN: -flax-vector-conversions=integer \
// RUN: -o - | FileCheck %s -check-prefix=CHECK-BE
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector \
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64le-unknown-unknown -emit-llvm %s \
// RUN: -flax-vector-conversions=integer \
// RUN: -o - | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +power9-vector \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-unknown -emit-llvm %s \
// RUN: -o - | FileCheck %s -check-prefix=CHECK-BE
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-char.c b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-char.c
index edc9c4cf4e447..16a8e4a7ed6c2 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-char.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-char.c
@@ -1,11 +1,11 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector \
+// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-linux -emit-llvm %s -o - | FileCheck %s
//
-// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector \
+// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64le-unknown-linux -emit-llvm %s -o - | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector \
+// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
#include <altivec.h>
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-noi128.c b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-noi128.c
index d078caaef11dd..b9eeeb8d17099 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-noi128.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-noi128.c
@@ -1,12 +1,12 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector \
+// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck \
// RUN: %s -check-prefix=CHECK-LE
-// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector \
+// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-aix-unknown -emit-llvm %s -o - | FileCheck \
// RUN: %s -check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector \
+// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc-aix-unknown -emit-llvm %s -o - | FileCheck \
// RUN: %s -check-prefix=CHECK-AIX
#include <altivec.h>
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
index 01fa6c6ad17e0..c9573a99ec127 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
@@ -1,8 +1,8 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +power8-vector \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +power8-vector \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64le-unknown-unknown -emit-llvm %s -o - \
// RUN: | FileCheck %s -check-prefix=CHECK-LE
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c b/clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
index 99524fa2f79d0..4ea74d2492cfc 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
@@ -1,9 +1,9 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature \
-// RUN: +altivec -target-feature +vsx -triple powerpc64-unknown-unknown -emit-llvm \
+// RUN: +altivec -target-feature +vsx -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc64-unknown-unknown -emit-llvm \
// RUN: -U__XL_COMPAT_ALTIVEC__ %s -o - | FileCheck %s
// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature \
-// RUN: +altivec -target-feature +vsx -triple powerpc64le-unknown-unknown \
+// RUN: +altivec -target-feature +vsx -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc64le-unknown-unknown \
// RUN: -emit-llvm -U__XL_COMPAT_ALTIVEC__ %s -o - | FileCheck %s -check-prefix=CHECK-LE
#include <altivec.h>
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c b/clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c
index 81a0345d3f3e8..0d107c6eda7a6 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c
@@ -1,9 +1,9 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +vsx \
// RUN: -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
-// RUN: -target-feature +power8-vector -triple powerpc64le-unknown-unknown \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +vsx \
+// RUN: -target-feature +power8-vector -target-feature +isa-v207-instructions -target-feature +isa-v207-instructions -triple powerpc64le-unknown-unknown \
// RUN: -emit-llvm %s -o - | FileCheck %s -check-prefixes=CHECK,CHECK-P8
#include <altivec.h>
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c b/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
index 702714a4e786d..af120aba66b77 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
@@ -1,11 +1,11 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +vsx -target-feature +power8-vector \
// RUN: -triple powerpc64-unknown-linux-gnu -emit-llvm %s -o - \
// RUN: -D__XL_COMPAT_ALTIVEC__ -target-cpu pwr7 | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +vsx -target-feature +power8-vector \
// RUN: -triple powerpc64le-unknown-linux-gnu -emit-llvm %s -o - \
// RUN: -D__XL_COMPAT_ALTIVEC__ -target-cpu pwr8 | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +vsx -target-feature +power8-vector \
// RUN: -triple powerpc64le-unknown-linux-gnu -emit-llvm %s -o - \
// RUN: -U__XL_COMPAT_ALTIVEC__ -target-cpu pwr8 | FileCheck \
// RUN: --check-prefix=NOCOMPAT %s
diff --git a/clang/test/CodeGen/PowerPC/ppc-vector-compare.cpp b/clang/test/CodeGen/PowerPC/ppc-vector-compare.cpp
index e65acf0439ea1..7eb33fc56d9fe 100644
--- a/clang/test/CodeGen/PowerPC/ppc-vector-compare.cpp
+++ b/clang/test/CodeGen/PowerPC/ppc-vector-compare.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +vsx -triple powerpc64-unknown-unknown -emit-llvm %s \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +vsx -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc64-unknown-unknown -emit-llvm %s \
// RUN: -o - | FileCheck %s
#include <altivec.h>
>From cc804846ea0b8d2c6e8df9aac5aa04e4774ebc4c Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 19 Mar 2026 09:22:28 -0400
Subject: [PATCH 04/15] fix affected parser diag tests
---
clang/test/Parser/cxx-altivec-bool-128.cpp | 2 +-
clang/test/Parser/cxx-altivec.cpp | 15 +++++++++++----
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/clang/test/Parser/cxx-altivec-bool-128.cpp b/clang/test/Parser/cxx-altivec-bool-128.cpp
index fd92c3a961cbc..4d3039e9d6687 100644
--- a/clang/test/Parser/cxx-altivec-bool-128.cpp
+++ b/clang/test/Parser/cxx-altivec-bool-128.cpp
@@ -6,7 +6,7 @@
// RUN: -target-feature +altivec -target-feature -vsx \
// RUN: -target-feature -power10-vector -fsyntax-only -verify %s
-#include <altivec.h>
+// Note: altivec.h not included to avoid inline functions requiring additional target features
// Test 'vector bool __int128' type.
diff --git a/clang/test/Parser/cxx-altivec.cpp b/clang/test/Parser/cxx-altivec.cpp
index 15a6bf6d1be80..b9b4e3257fc38 100644
--- a/clang/test/Parser/cxx-altivec.cpp
+++ b/clang/test/Parser/cxx-altivec.cpp
@@ -1,10 +1,13 @@
-// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu -target-feature +altivec -target-feature +vsx -fsyntax-only -verify=expected,nonaix -std=c++11 %s
+// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu -target-feature +altivec -target-feature +vsx -target-feature +power8-vector -target-feature +isa-v207-instructions -fsyntax-only -verify=expected,nonaix -std=c++11 -DTEST_VSX %s
// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu -target-feature +altivec -fsyntax-only -verify=expected,novsx -std=c++11 %s
-// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu -target-feature +vsx -target-cpu pwr7 -fsyntax-only -verify=expected,nonaix -std=c++11 %s
+// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu -target-feature +vsx -target-feature +power8-vector -target-feature +isa-v207-instructions -target-cpu pwr7 -fsyntax-only -verify=expected,nonaix -std=c++11 -DTEST_VSX %s
// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu -target-feature -vsx -target-cpu pwr7 -fsyntax-only -verify=expected,novsx -std=c++11 %s
-// RUN: %clang_cc1 -triple=powerpc-ibm-aix -target-feature +altivec -fsyntax-only -verify=expected,aix -std=c++11 %s
-// RUN: %clang_cc1 -triple=powerpc64-ibm-aix -target-feature +altivec -fsyntax-only -verify=expected,aix -std=c++11 %s
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions -fsyntax-only -verify=expected,aix -std=c++11 -DTEST_VSX %s
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions -fsyntax-only -verify=expected,aix -std=c++11 -DTEST_VSX %s
+
+#ifdef TEST_VSX
#include <altivec.h>
+#endif
__vector char vv_c;
__vector signed char vv_sc;
@@ -216,7 +219,11 @@ struct Vector
Vector Add(Vector lhs, Vector rhs)
{
Vector result;
+#ifdef TEST_VSX
result.xyzw = vec_add(lhs.xyzw, rhs.xyzw);
+#else
+ result.xyzw = lhs.xyzw; // Simplified for non-altivec.h tests
+#endif
return result; // This will (eventually) be returned in a register
}
>From 1b8475ed1f5a21d0f3b032b84e473d880ce9c3d2 Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 19 Mar 2026 09:52:30 -0400
Subject: [PATCH 05/15] more tc updates
---
clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c | 4 ++--
clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c b/clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
index 4ea74d2492cfc..99524fa2f79d0 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
@@ -1,9 +1,9 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature \
-// RUN: +altivec -target-feature +vsx -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc64-unknown-unknown -emit-llvm \
+// RUN: +altivec -target-feature +vsx -triple powerpc64-unknown-unknown -emit-llvm \
// RUN: -U__XL_COMPAT_ALTIVEC__ %s -o - | FileCheck %s
// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature \
-// RUN: +altivec -target-feature +vsx -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc64le-unknown-unknown \
+// RUN: +altivec -target-feature +vsx -triple powerpc64le-unknown-unknown \
// RUN: -emit-llvm -U__XL_COMPAT_ALTIVEC__ %s -o - | FileCheck %s -check-prefix=CHECK-LE
#include <altivec.h>
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c b/clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c
index 0d107c6eda7a6..c30063461c3c7 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c
@@ -1,9 +1,9 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +vsx \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
// RUN: -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +vsx \
-// RUN: -target-feature +power8-vector -target-feature +isa-v207-instructions -target-feature +isa-v207-instructions -triple powerpc64le-unknown-unknown \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
+// RUN: -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc64le-unknown-unknown \
// RUN: -emit-llvm %s -o - | FileCheck %s -check-prefixes=CHECK,CHECK-P8
#include <altivec.h>
>From a6c877d46fea028462bec0e6b5b326d1377dff01 Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 19 Mar 2026 09:52:55 -0400
Subject: [PATCH 06/15] fix feature checks in altivec.h
---
clang/lib/Headers/altivec.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 71d8d3c0c0771..4cfc75c12f7b5 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -2117,7 +2117,7 @@ vec_cmpne(vector unsigned long long __a, vector unsigned long long __b) {
}
#endif
-#ifdef __VSX__
+#ifdef __POWER8_VECTOR__
static __inline__ vector bool long long __ATTRS_o_ai
vec_cmpne(vector double __a, vector double __b) {
return (vector bool long long)
@@ -17808,7 +17808,7 @@ vec_xl(ptrdiff_t __offset, const unsigned __int128 *__ptr) {
/* vec_xl_be */
-#ifdef __LITTLE_ENDIAN__
+#if defined(__LITTLE_ENDIAN__) && defined(__VSX__)
static __inline__ vector signed char __ATTRS_o_ai
vec_xl_be(ptrdiff_t __offset, const signed char *__ptr) {
vector signed char __vec = (vector signed char)__builtin_vsx_lxvd2x_be(__offset, __ptr);
@@ -18129,7 +18129,7 @@ vec_xst_trunc(vector unsigned __int128 __vec, ptrdiff_t __offset,
/* vec_xst_be */
-#ifdef __LITTLE_ENDIAN__
+#if defined(__LITTLE_ENDIAN__) && defined(__VSX__)
static __inline__ void __ATTRS_o_ai vec_xst_be(vector signed char __vec,
signed long long __offset,
signed char *__ptr) {
>From a84f81afb30458658b426ad64a2209b41d0272d3 Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 19 Mar 2026 11:05:34 -0400
Subject: [PATCH 07/15] remove redudant feature checks in altivec.h
---
clang/lib/Headers/altivec.h | 16 ++++++++--------
.../test/CodeGen/PowerPC/builtins-ppc-altivec.c | 8 ++++----
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 4cfc75c12f7b5..5bdb07a5f2861 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -17808,7 +17808,8 @@ vec_xl(ptrdiff_t __offset, const unsigned __int128 *__ptr) {
/* vec_xl_be */
-#if defined(__LITTLE_ENDIAN__) && defined(__VSX__)
+#ifdef __LITTLE_ENDIAN__
+#ifdef __VSX__
static __inline__ vector signed char __ATTRS_o_ai
vec_xl_be(ptrdiff_t __offset, const signed char *__ptr) {
vector signed char __vec = (vector signed char)__builtin_vsx_lxvd2x_be(__offset, __ptr);
@@ -17850,7 +17851,6 @@ vec_xl_be(signed long long __offset, const float *__ptr) {
return (vector float)__builtin_vsx_lxvw4x_be(__offset, __ptr);
}
-#ifdef __VSX__
static __inline__ vector signed long long __ATTRS_o_ai
vec_xl_be(signed long long __offset, const signed long long *__ptr) {
return (vector signed long long)__builtin_vsx_lxvd2x_be(__offset, __ptr);
@@ -17865,7 +17865,6 @@ static __inline__ vector double __ATTRS_o_ai
vec_xl_be(signed long long __offset, const double *__ptr) {
return (vector double)__builtin_vsx_lxvd2x_be(__offset, __ptr);
}
-#endif
#if defined(__POWER8_VECTOR__) && defined(__powerpc64__) && \
defined(__SIZEOF_INT128__)
@@ -17879,7 +17878,8 @@ vec_xl_be(signed long long __offset, const unsigned __int128 *__ptr) {
return vec_xl(__offset, __ptr);
}
#endif
-#else
+#endif // __VSX__
+#else // ! __LITTLE_ENDIAN__
#define vec_xl_be vec_xl
#endif
@@ -18129,7 +18129,8 @@ vec_xst_trunc(vector unsigned __int128 __vec, ptrdiff_t __offset,
/* vec_xst_be */
-#if defined(__LITTLE_ENDIAN__) && defined(__VSX__)
+#ifdef __LITTLE_ENDIAN__
+#ifdef __VSX__
static __inline__ void __ATTRS_o_ai vec_xst_be(vector signed char __vec,
signed long long __offset,
signed char *__ptr) {
@@ -18186,7 +18187,6 @@ static __inline__ void __ATTRS_o_ai vec_xst_be(vector float __vec,
__builtin_vsx_stxvw4x_be((vector int)__vec, __offset, __ptr);
}
-#ifdef __VSX__
static __inline__ void __ATTRS_o_ai vec_xst_be(vector signed long long __vec,
signed long long __offset,
signed long long *__ptr) {
@@ -18204,7 +18204,6 @@ static __inline__ void __ATTRS_o_ai vec_xst_be(vector double __vec,
double *__ptr) {
__builtin_vsx_stxvd2x_be((vector double)__vec, __offset, __ptr);
}
-#endif
#if defined(__POWER8_VECTOR__) && defined(__powerpc64__) && \
defined(__SIZEOF_INT128__)
@@ -18220,7 +18219,8 @@ static __inline__ void __ATTRS_o_ai vec_xst_be(vector unsigned __int128 __vec,
vec_xst(__vec, __offset, __ptr);
}
#endif
-#else
+#endif // VSX
+#else // ! __LITTLE_ENDIAN__
#define vec_xst_be vec_xst
#endif
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c b/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
index 94c6b33f0fd58..91d1ebd045c58 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
@@ -1,14 +1,14 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc-unknown-unknown -emit-llvm %s \
+// RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown -emit-llvm %s \
// RUN: -flax-vector-conversions=none -faltivec-src-compat=mixed \
// RUN: -o - | FileCheck %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpcle-unknown-unknown -emit-llvm %s \
+// RUN: %clang_cc1 -target-feature +altivec -triple powerpcle-unknown-unknown -emit-llvm %s \
// RUN: -flax-vector-conversions=none -faltivec-src-compat=mixed \
// RUN: -o - | FileCheck %s -check-prefix=CHECK-LE
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc64-unknown-unknown -emit-llvm %s \
+// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64-unknown-unknown -emit-llvm %s \
// RUN: -flax-vector-conversions=none -faltivec-src-compat=mixed \
// RUN: -o - | FileCheck %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc64le-unknown-unknown -emit-llvm %s \
+// RUN: %clang_cc1 -target-feature +altivec -triple powerpc64le-unknown-unknown -emit-llvm %s \
// RUN: -flax-vector-conversions=none -faltivec-src-compat=mixed \
// RUN: -o - | FileCheck %s -check-prefix=CHECK-LE
// RUN: not %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
>From 32574c6c17b2e464f501ce127a6e24b0556ba256 Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 19 Mar 2026 11:26:46 -0400
Subject: [PATCH 08/15] remove unnecessary include of altivec.h
---
clang/test/Sema/builtins-bcd-format-conversion.c | 7 +++----
clang/test/Sema/builtins-bcd-transform.c | 7 +++----
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/clang/test/Sema/builtins-bcd-format-conversion.c b/clang/test/Sema/builtins-bcd-format-conversion.c
index 6136d7c8d99b5..14200e7d63c1a 100644
--- a/clang/test/Sema/builtins-bcd-format-conversion.c
+++ b/clang/test/Sema/builtins-bcd-format-conversion.c
@@ -1,11 +1,10 @@
// Testfile to verify Sema diagnostics for BCD builtins bcdshift, bcdshiftround, bcdtruncate.
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions -triple powerpc-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -triple powerpc-unknown-unknown -fsyntax-only -verify %s
-#include <altivec.h>
#define DECL_COMMON_VARS \
vector unsigned char vec = {1,2,3,4}; \
unsigned char scalar = 1; \
diff --git a/clang/test/Sema/builtins-bcd-transform.c b/clang/test/Sema/builtins-bcd-transform.c
index a153fa792aebc..f2b0a16a5f57d 100644
--- a/clang/test/Sema/builtins-bcd-transform.c
+++ b/clang/test/Sema/builtins-bcd-transform.c
@@ -1,10 +1,9 @@
// Testfile to verify the semantics and the error handling for BCD builtins national2packed, packed2zoned and zoned2packed.
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions -triple powerpc-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -triple powerpc-unknown-unknown -fsyntax-only -verify %s
-#include <altivec.h>
vector unsigned char test_national2packed(void)
{
vector unsigned char a = {1,2,3,4};
>From 30718bf73a887eb244114a26923584a1826a5270 Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 19 Mar 2026 11:38:30 -0400
Subject: [PATCH 09/15] remove redundant features
---
clang/test/CodeGen/PowerPC/altivec-ct.c | 2 +-
clang/test/CodeGen/PowerPC/builtins-ppc-crypto.c | 4 ++--
clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c | 2 +-
clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c | 6 +++---
clang/test/CodeGen/PowerPC/ppc-vector-compare.cpp | 2 +-
clang/test/Parser/cxx-altivec.cpp | 8 ++++----
clang/test/Sema/builtins-ppc.c | 6 +++---
7 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/clang/test/CodeGen/PowerPC/altivec-ct.c b/clang/test/CodeGen/PowerPC/altivec-ct.c
index 3f0d7ffd8b356..88a98d2e589ae 100644
--- a/clang/test/CodeGen/PowerPC/altivec-ct.c
+++ b/clang/test/CodeGen/PowerPC/altivec-ct.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -flax-vector-conversions=none -triple powerpc64le-linux-gnu -S -O0 -o - %s -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +vsx -target-feature +power8-vector | FileCheck %s -check-prefix=CHECK -check-prefix=VSX
+// RUN: %clang_cc1 -flax-vector-conversions=none -triple powerpc64le-linux-gnu -S -O0 -o - %s -target-feature +isa-v207-instructions -target-feature +power8-vector | FileCheck %s -check-prefix=CHECK -check-prefix=VSX
// RUN: %clang_cc1 -flax-vector-conversions=none -triple powerpc-linux-gnu -S -O0 -o - %s -target-feature +altivec -target-feature +isa-v207-instructions -target-feature -vsx | FileCheck %s
// REQUIRES: powerpc-registered-target
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-crypto.c b/clang/test/CodeGen/PowerPC/builtins-ppc-crypto.c
index e26c0101bd4b8..118826091dffe 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-crypto.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-crypto.c
@@ -1,9 +1,9 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -triple powerpc64le-unknown-unknown \
+// RUN: %clang_cc1 -flax-vector-conversions=none -triple powerpc64le-unknown-unknown \
// RUN: -target-feature +crypto -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -emit-llvm %s -o - | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -triple powerpc64-unknown-unknown \
+// RUN: %clang_cc1 -flax-vector-conversions=none -triple powerpc64-unknown-unknown \
// RUN: -target-feature +crypto -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -emit-llvm %s -o - | FileCheck %s
#include <altivec.h>
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c b/clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c
index c30063461c3c7..b1be2fc771b20 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c
@@ -2,7 +2,7 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
// RUN: -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
+// RUN: %clang_cc1 -flax-vector-conversions=none \
// RUN: -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc64le-unknown-unknown \
// RUN: -emit-llvm %s -o - | FileCheck %s -check-prefixes=CHECK,CHECK-P8
#include <altivec.h>
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c b/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
index af120aba66b77..a6ce89c76001e 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
@@ -1,11 +1,11 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +vsx -target-feature +power8-vector \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +isa-v207-instructions -target-feature +power8-vector \
// RUN: -triple powerpc64-unknown-linux-gnu -emit-llvm %s -o - \
// RUN: -D__XL_COMPAT_ALTIVEC__ -target-cpu pwr7 | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +vsx -target-feature +power8-vector \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +isa-v207-instructions -target-feature +power8-vector \
// RUN: -triple powerpc64le-unknown-linux-gnu -emit-llvm %s -o - \
// RUN: -D__XL_COMPAT_ALTIVEC__ -target-cpu pwr8 | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +vsx -target-feature +power8-vector \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +isa-v207-instructions -target-feature +power8-vector \
// RUN: -triple powerpc64le-unknown-linux-gnu -emit-llvm %s -o - \
// RUN: -U__XL_COMPAT_ALTIVEC__ -target-cpu pwr8 | FileCheck \
// RUN: --check-prefix=NOCOMPAT %s
diff --git a/clang/test/CodeGen/PowerPC/ppc-vector-compare.cpp b/clang/test/CodeGen/PowerPC/ppc-vector-compare.cpp
index 7eb33fc56d9fe..7d11b8f800554 100644
--- a/clang/test/CodeGen/PowerPC/ppc-vector-compare.cpp
+++ b/clang/test/CodeGen/PowerPC/ppc-vector-compare.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +vsx -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc64-unknown-unknown -emit-llvm %s \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +power8-vector -target-feature +isa-v207-instructions -triple powerpc64-unknown-unknown -emit-llvm %s \
// RUN: -o - | FileCheck %s
#include <altivec.h>
diff --git a/clang/test/Parser/cxx-altivec.cpp b/clang/test/Parser/cxx-altivec.cpp
index b9b4e3257fc38..1cb613523af06 100644
--- a/clang/test/Parser/cxx-altivec.cpp
+++ b/clang/test/Parser/cxx-altivec.cpp
@@ -1,9 +1,9 @@
-// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu -target-feature +altivec -target-feature +vsx -target-feature +power8-vector -target-feature +isa-v207-instructions -fsyntax-only -verify=expected,nonaix -std=c++11 -DTEST_VSX %s
+// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu -target-feature +power8-vector -target-feature +isa-v207-instructions -fsyntax-only -verify=expected,nonaix -std=c++11 -DTEST_VSX %s
// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu -target-feature +altivec -fsyntax-only -verify=expected,novsx -std=c++11 %s
-// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu -target-feature +vsx -target-feature +power8-vector -target-feature +isa-v207-instructions -target-cpu pwr7 -fsyntax-only -verify=expected,nonaix -std=c++11 -DTEST_VSX %s
+// RUN: %clang_cc1 -triple=powerpc64-unknown-linux-gnu -target-feature +power8-vector -target-feature +isa-v207-instructions -target-cpu pwr7 -fsyntax-only -verify=expected,nonaix -std=c++11 -DTEST_VSX %s
// RUN: %clang_cc1 -triple=powerpc64le-unknown-linux-gnu -target-feature -vsx -target-cpu pwr7 -fsyntax-only -verify=expected,novsx -std=c++11 %s
-// RUN: %clang_cc1 -triple=powerpc-ibm-aix -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions -fsyntax-only -verify=expected,aix -std=c++11 -DTEST_VSX %s
-// RUN: %clang_cc1 -triple=powerpc64-ibm-aix -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions -fsyntax-only -verify=expected,aix -std=c++11 -DTEST_VSX %s
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix -target-feature +power8-vector -target-feature +isa-v207-instructions -fsyntax-only -verify=expected,aix -std=c++11 -DTEST_VSX %s
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix -target-feature +power8-vector -target-feature +isa-v207-instructions -fsyntax-only -verify=expected,aix -std=c++11 -DTEST_VSX %s
#ifdef TEST_VSX
#include <altivec.h>
diff --git a/clang/test/Sema/builtins-ppc.c b/clang/test/Sema/builtins-ppc.c
index b7331f249f2fb..57f5103e5d442 100644
--- a/clang/test/Sema/builtins-ppc.c
+++ b/clang/test/Sema/builtins-ppc.c
@@ -3,12 +3,12 @@
// RUN: -triple powerpc64-unknown-unknown -DTEST_HTM -fsyntax-only \
// RUN: -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +crypto -target-feature +power8-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -target-feature +crypto -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64le-unknown-unknown -DTEST_CRYPTO -fsyntax-only \
// RUN: -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +crypto -target-feature +power8-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -target-feature +crypto -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64le-unknown-unknown -DTEST_CRYPTO -fsyntax-only \
-// RUN: -target-feature +vsx -verify %s
+// RUN: -verify %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -DTEST_MAXMIN -fsyntax-only \
// RUN: -verify %s
>From 98e6610b8e240a645f852298512370b5b344c14a Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 19 Mar 2026 11:44:49 -0400
Subject: [PATCH 10/15] remove redundant features for power9-vector tests
---
clang/test/CodeGen/PowerPC/builtins-ppc-error.c | 6 +++---
clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c | 6 +++---
clang/test/Sema/builtins-bcd-format-conversion.c | 6 +++---
clang/test/Sema/builtins-bcd-transform.c | 6 +++---
4 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-error.c b/clang/test/CodeGen/PowerPC/builtins-ppc-error.c
index 32eaa194e89be..2155e2cef9768 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-error.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-error.c
@@ -1,16 +1,16 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -target-feature +power9-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-unknown -fsyntax-only \
// RUN: -flax-vector-conversions=integer \
// RUN: -Wall -Werror -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -target-feature +power9-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64le-unknown-unknown -fsyntax-only \
// RUN: -flax-vector-conversions=integer \
// RUN: -Wall -Werror -verify %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +power9-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-unknown -fsyntax-only \
// RUN: -Wall -Werror -verify %s
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c b/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
index d5925cc70c756..a35dc0c077c6b 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
@@ -1,15 +1,15 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -target-feature +power9-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-unknown -emit-llvm %s \
// RUN: -flax-vector-conversions=integer \
// RUN: -o - | FileCheck %s -check-prefix=CHECK-BE
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -target-feature +power9-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64le-unknown-unknown -emit-llvm %s \
// RUN: -flax-vector-conversions=integer \
// RUN: -o - | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +power9-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +power9-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-unknown -emit-llvm %s \
// RUN: -o - | FileCheck %s -check-prefix=CHECK-BE
diff --git a/clang/test/Sema/builtins-bcd-format-conversion.c b/clang/test/Sema/builtins-bcd-format-conversion.c
index 14200e7d63c1a..d49783c692aaa 100644
--- a/clang/test/Sema/builtins-bcd-format-conversion.c
+++ b/clang/test/Sema/builtins-bcd-format-conversion.c
@@ -1,9 +1,9 @@
// Testfile to verify Sema diagnostics for BCD builtins bcdshift, bcdshiftround, bcdtruncate.
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -triple powerpc-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +power9-vector -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +power9-vector -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +power9-vector -triple powerpc-unknown-unknown -fsyntax-only -verify %s
#define DECL_COMMON_VARS \
vector unsigned char vec = {1,2,3,4}; \
diff --git a/clang/test/Sema/builtins-bcd-transform.c b/clang/test/Sema/builtins-bcd-transform.c
index f2b0a16a5f57d..adf3571fb20f7 100644
--- a/clang/test/Sema/builtins-bcd-transform.c
+++ b/clang/test/Sema/builtins-bcd-transform.c
@@ -1,8 +1,8 @@
// Testfile to verify the semantics and the error handling for BCD builtins national2packed, packed2zoned and zoned2packed.
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
-// RUN: %clang_cc1 -target-feature +altivec -target-feature +power9-vector -triple powerpc-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +power9-vector -triple powerpc64-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +power9-vector -triple powerpc64le-unknown-unknown -fsyntax-only -verify %s
+// RUN: %clang_cc1 -target-feature +power9-vector -triple powerpc-unknown-unknown -fsyntax-only -verify %s
vector unsigned char test_national2packed(void)
{
>From 66fe656abfcc277a1f7e6c2a1abfe5c690cf65ba Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 19 Mar 2026 11:53:04 -0400
Subject: [PATCH 11/15] remove redundant features for mcpu=pwr8 test
---
clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c b/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
index a6ce89c76001e..e2b4897bc1486 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat.c
@@ -2,13 +2,13 @@
// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +isa-v207-instructions -target-feature +power8-vector \
// RUN: -triple powerpc64-unknown-linux-gnu -emit-llvm %s -o - \
// RUN: -D__XL_COMPAT_ALTIVEC__ -target-cpu pwr7 | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +isa-v207-instructions -target-feature +power8-vector \
-// RUN: -triple powerpc64le-unknown-linux-gnu -emit-llvm %s -o - \
-// RUN: -D__XL_COMPAT_ALTIVEC__ -target-cpu pwr8 | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +isa-v207-instructions -target-feature +power8-vector \
-// RUN: -triple powerpc64le-unknown-linux-gnu -emit-llvm %s -o - \
-// RUN: -U__XL_COMPAT_ALTIVEC__ -target-cpu pwr8 | FileCheck \
-// RUN: --check-prefix=NOCOMPAT %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -D__XL_COMPAT_ALTIVEC__ \
+// RUN: -target-cpu pwr8 -triple powerpc64le-unknown-linux-gnu \
+// RUN: -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -U__XL_COMPAT_ALTIVEC__ \
+// RUN: -target-cpu pwr8 -triple powerpc64le-unknown-linux-gnu \
+// RUN: -emit-llvm %s -o - | FileCheck --check-prefix=NOCOMPAT %s
+
#include <altivec.h>
vector double vd = { 3.4e22, 1.8e-3 };
vector signed long long res_vsll, vsll = { -12345678999ll, 12345678999 };
>From f01f035612925e7ca002c5ef7c5e16da52d6ac35 Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 19 Mar 2026 12:01:54 -0400
Subject: [PATCH 12/15] remove redundant altivec features when power8-vector or
power9-vector are used
---
clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c | 4 ++--
clang/test/CodeGen/PowerPC/builtins-ppc-quadword-char.c | 8 ++++----
clang/test/CodeGen/PowerPC/builtins-ppc-quadword-noi128.c | 6 +++---
clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c | 4 ++--
lei | 4 ++++
5 files changed, 15 insertions(+), 11 deletions(-)
create mode 100644 lei
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c b/clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
index 435465ebbb4be..60464077b2ea9 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
@@ -1,6 +1,6 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +power8-vector -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +isa-v207-instructions -target-feature +power8-vector -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-LE
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +isa-v207-instructions -target-feature +power8-vector -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +isa-v207-instructions -target-feature +power8-vector -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-LE
// RUN: not %clang_cc1 -target-feature +altivec -target-feature +vsx -triple powerpc64-unknown-unknown -emit-llvm %s -o - 2>&1 | FileCheck %s -check-prefix=CHECK-PPC
// Added -target-feature +vsx above to avoid errors about "vector double" and to
// generate the correct errors for functions that are only overloaded with VSX
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-char.c b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-char.c
index 16a8e4a7ed6c2..228b5ae474725 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-char.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-char.c
@@ -1,11 +1,11 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-linux -emit-llvm %s -o - | FileCheck %s
//
-// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
-// RUN: -triple powerpc64le-unknown-linux -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +power8-vector -target-feature +isa-v207-instructions \
+// RUN: -triple powerpc64le-unknown-linux -emit-llvm %s -o - | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
#include <altivec.h>
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-noi128.c b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-noi128.c
index b9eeeb8d17099..19469e4180ac8 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-noi128.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword-noi128.c
@@ -1,12 +1,12 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck \
// RUN: %s -check-prefix=CHECK-LE
-// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-aix-unknown -emit-llvm %s -o - | FileCheck \
// RUN: %s -check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc-aix-unknown -emit-llvm %s -o - | FileCheck \
// RUN: %s -check-prefix=CHECK-AIX
#include <altivec.h>
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
index c9573a99ec127..8df3a77434e53 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
@@ -1,8 +1,8 @@
// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +power8-vector -target-feature +isa-v207-instructions \
+// RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +power8-vector -target-feature +isa-v207-instructions \
// RUN: -triple powerpc64le-unknown-unknown -emit-llvm %s -o - \
// RUN: | FileCheck %s -check-prefix=CHECK-LE
diff --git a/lei b/lei
new file mode 100644
index 0000000000000..e1671cd2fc4a9
--- /dev/null
+++ b/lei
@@ -0,0 +1,4 @@
+clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
+clang/test/CodeGen/PowerPC/builtins-ppc-quadword-char.c
+clang/test/CodeGen/PowerPC/builtins-ppc-quadword-noi128.c
+clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
>From de65adb53c47669f91c224c9a1f46018c4b5a1be Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 19 Mar 2026 12:09:28 -0400
Subject: [PATCH 13/15] apply clang format
---
clang/lib/Headers/altivec.h | 8 ++++----
clang/lib/Sema/SemaPPC.cpp | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 5bdb07a5f2861..1c778ea0a829f 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -17879,8 +17879,8 @@ vec_xl_be(signed long long __offset, const unsigned __int128 *__ptr) {
}
#endif
#endif // __VSX__
-#else // ! __LITTLE_ENDIAN__
- #define vec_xl_be vec_xl
+#else // ! __LITTLE_ENDIAN__
+#define vec_xl_be vec_xl
#endif
#if defined(__POWER10_VECTOR__) && defined(__VSX__) && \
@@ -18220,8 +18220,8 @@ static __inline__ void __ATTRS_o_ai vec_xst_be(vector unsigned __int128 __vec,
}
#endif
#endif // VSX
-#else // ! __LITTLE_ENDIAN__
- #define vec_xst_be vec_xst
+#else // ! __LITTLE_ENDIAN__
+#define vec_xst_be vec_xst
#endif
#ifdef __POWER9_VECTOR__
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 66e6e675abfe0..36dd4d77adc76 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -127,7 +127,7 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo &TI,
llvm::StringMap<bool> CallerFeatureMap;
Context.getFunctionFeatureMap(CallerFeatureMap, FD);
if (!Builtin::evaluateRequiredTargetFeatures(FeatureList,
- CallerFeatureMap)) {
+ CallerFeatureMap)) {
// Get the builtin name from the CallExpr's callee
const FunctionDecl *BuiltinDecl = TheCall->getDirectCallee();
Diag(TheCall->getBeginLoc(), diag::err_builtin_needs_feature)
>From bb1deb17e4c6216657e94fa70872c06f08c76dc6 Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 19 Mar 2026 12:46:53 -0400
Subject: [PATCH 14/15] rm tmp file
---
lei | 4 ----
1 file changed, 4 deletions(-)
delete mode 100644 lei
diff --git a/lei b/lei
deleted file mode 100644
index e1671cd2fc4a9..0000000000000
--- a/lei
+++ /dev/null
@@ -1,4 +0,0 @@
-clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
-clang/test/CodeGen/PowerPC/builtins-ppc-quadword-char.c
-clang/test/CodeGen/PowerPC/builtins-ppc-quadword-noi128.c
-clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
>From e86cb254da4e14cd98685b5f49dd59ff07aca3f3 Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Mon, 23 Mar 2026 10:03:04 -0400
Subject: [PATCH 15/15] add . to end of sentence
---
clang/lib/Sema/SemaPPC.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 36dd4d77adc76..6a06dbf12c8dc 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -120,7 +120,7 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo &TI,
return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
<< TheCall->getSourceRange();
- // Check if the builtin requires specific target features
+ // Check if the builtin requires specific target features.
StringRef FeatureList(Context.BuiltinInfo.getRequiredFeatures(BuiltinID));
if (!FeatureList.empty()) {
const auto *FD = SemaRef.getCurFunctionDecl(/*AllowLambda=*/true);
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