[clang] [CIR][AArch64] Upstream vrshrd_n_s64/u64 and vrshr_n_v vector rounding shift right (PR #185992)

Andrzej WarzyƄski via cfe-commits cfe-commits at lists.llvm.org
Mon Mar 16 02:30:34 PDT 2026


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@@ -2781,8 +2804,17 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr,
   case NEON::BI__builtin_neon_vqshlud_n_s64:
   case NEON::BI__builtin_neon_vqshld_n_u64:
   case NEON::BI__builtin_neon_vqshld_n_s64:
-  case NEON::BI__builtin_neon_vrshrd_n_u64:
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banach-space wrote:

Please avoid moving cases, unless that is required to implement a feature. This introduces unnecessary PR noise and makes this implementation diverge from ARM.cpp. Thanks!

https://github.com/llvm/llvm-project/pull/185992


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