[clang] [CIR][AArch64] Upstream vrshrd_n_s64/u64 and vrshr_n_v vector rounding shift right (PR #185992)
Md Mouzam Arfi Hussain via cfe-commits
cfe-commits at lists.llvm.org
Sun Mar 15 22:17:36 PDT 2026
================
@@ -409,301 +407,6 @@ static const ARMVectorIntrinsicInfo AArch64SIMDIntrinsicMap[] = {
NEONMAP1(vxarq_u64, aarch64_crypto_xar, 0),
};
-// Single-Instruction-Single-Data (SISD) intrinsics.
----------------
ArfiH wrote:
Friendly ping — @andykaylor @banach-space could you please take a look when you get a chance? CI is passing. Happy to make any further changes if needed.
https://github.com/llvm/llvm-project/pull/185992
More information about the cfe-commits
mailing list