[clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)

via cfe-commits cfe-commits at lists.llvm.org
Sat Mar 14 12:39:57 PDT 2026


https://github.com/addmisol updated https://github.com/llvm/llvm-project/pull/186575

>From c5ffb2e73bcf69513f94d8e7b89e8372d0d280b2 Mon Sep 17 00:00:00 2001
From: addmisol <218448340+addmisol at users.noreply.github.com>
Date: Fri, 6 Mar 2026 23:56:34 +0530
Subject: [PATCH 01/55] Create amdgpu-abi-struct-coerce.c

---
 .../test/CodeGen/amdgpu-abi-struct-coerce.c   | 71 +++++++++++++++++++
 1 file changed, 71 insertions(+)
 create mode 100644 clang/test/CodeGen/clang/test/CodeGen/amdgpu-abi-struct-coerce.c

diff --git a/clang/test/CodeGen/clang/test/CodeGen/amdgpu-abi-struct-coerce.c b/clang/test/CodeGen/clang/test/CodeGen/amdgpu-abi-struct-coerce.c
new file mode 100644
index 0000000000000..2399630ff797b
--- /dev/null
+++ b/clang/test/CodeGen/clang/test/CodeGen/amdgpu-abi-struct-coerce.c
@@ -0,0 +1,71 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -emit-llvm -o - %s | FileCheck %s
+
+// Check that structs containing mixed float and int types are not coerced
+// to integer arrays. They should preserve the original struct type and
+// individual field types.
+
+typedef struct fp_int_pair {
+    float f;
+    int i;
+} fp_int_pair;
+
+// CHECK-LABEL: define{{.*}} %struct.fp_int_pair @return_fp_int_pair(float %x.coerce0, i32 %x.coerce1)
+// CHECK: ret %struct.fp_int_pair
+fp_int_pair return_fp_int_pair(fp_int_pair x) {
+    return x;
+}
+
+typedef struct int_fp_pair {
+    int i;
+    float f;
+} int_fp_pair;
+
+// CHECK-LABEL: define{{.*}} %struct.int_fp_pair @return_int_fp_pair(i32 %x.coerce0, float %x.coerce1)
+// CHECK: ret %struct.int_fp_pair
+int_fp_pair return_int_fp_pair(int_fp_pair x) {
+    return x;
+}
+
+typedef struct two_floats {
+    float a;
+    float b;
+} two_floats;
+
+// CHECK-LABEL: define{{.*}} %struct.two_floats @return_two_floats(float %x.coerce0, float %x.coerce1)
+// CHECK: ret %struct.two_floats
+two_floats return_two_floats(two_floats x) {
+    return x;
+}
+
+typedef struct two_ints {
+    int a;
+    int b;
+} two_ints;
+
+// CHECK-LABEL: define{{.*}} %struct.two_ints @return_two_ints(i32 %x.coerce0, i32 %x.coerce1)
+// CHECK: ret %struct.two_ints
+two_ints return_two_ints(two_ints x) {
+    return x;
+}
+
+// Structs <= 32 bits should still be coerced to i32 for return value
+typedef struct small_struct {
+    short a;
+    short b;
+} small_struct;
+
+// CHECK-LABEL: define{{.*}} i32 @return_small_struct(i16 %x.coerce0, i16 %x.coerce1)
+small_struct return_small_struct(small_struct x) {
+    return x;
+}
+
+// Structs <= 16 bits should still be coerced to i16 for return value
+typedef struct tiny_struct {
+    char a;
+    char b;
+} tiny_struct;
+
+// CHECK-LABEL: define{{.*}} i16 @return_tiny_struct(i8 %x.coerce0, i8 %x.coerce1)
+tiny_struct return_tiny_struct(tiny_struct x) {
+    return x;
+}

>From 68c200f848058ab22b3d25ce810f1639eac50556 Mon Sep 17 00:00:00 2001
From: addmisol <218448340+addmisol at users.noreply.github.com>
Date: Fri, 6 Mar 2026 23:57:11 +0530
Subject: [PATCH 02/55] Delete
 clang/test/CodeGen/clang/test/CodeGen/amdgpu-abi-struct-coerce.c

---
 .../test/CodeGen/amdgpu-abi-struct-coerce.c   | 71 -------------------
 1 file changed, 71 deletions(-)
 delete mode 100644 clang/test/CodeGen/clang/test/CodeGen/amdgpu-abi-struct-coerce.c

diff --git a/clang/test/CodeGen/clang/test/CodeGen/amdgpu-abi-struct-coerce.c b/clang/test/CodeGen/clang/test/CodeGen/amdgpu-abi-struct-coerce.c
deleted file mode 100644
index 2399630ff797b..0000000000000
--- a/clang/test/CodeGen/clang/test/CodeGen/amdgpu-abi-struct-coerce.c
+++ /dev/null
@@ -1,71 +0,0 @@
-// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -emit-llvm -o - %s | FileCheck %s
-
-// Check that structs containing mixed float and int types are not coerced
-// to integer arrays. They should preserve the original struct type and
-// individual field types.
-
-typedef struct fp_int_pair {
-    float f;
-    int i;
-} fp_int_pair;
-
-// CHECK-LABEL: define{{.*}} %struct.fp_int_pair @return_fp_int_pair(float %x.coerce0, i32 %x.coerce1)
-// CHECK: ret %struct.fp_int_pair
-fp_int_pair return_fp_int_pair(fp_int_pair x) {
-    return x;
-}
-
-typedef struct int_fp_pair {
-    int i;
-    float f;
-} int_fp_pair;
-
-// CHECK-LABEL: define{{.*}} %struct.int_fp_pair @return_int_fp_pair(i32 %x.coerce0, float %x.coerce1)
-// CHECK: ret %struct.int_fp_pair
-int_fp_pair return_int_fp_pair(int_fp_pair x) {
-    return x;
-}
-
-typedef struct two_floats {
-    float a;
-    float b;
-} two_floats;
-
-// CHECK-LABEL: define{{.*}} %struct.two_floats @return_two_floats(float %x.coerce0, float %x.coerce1)
-// CHECK: ret %struct.two_floats
-two_floats return_two_floats(two_floats x) {
-    return x;
-}
-
-typedef struct two_ints {
-    int a;
-    int b;
-} two_ints;
-
-// CHECK-LABEL: define{{.*}} %struct.two_ints @return_two_ints(i32 %x.coerce0, i32 %x.coerce1)
-// CHECK: ret %struct.two_ints
-two_ints return_two_ints(two_ints x) {
-    return x;
-}
-
-// Structs <= 32 bits should still be coerced to i32 for return value
-typedef struct small_struct {
-    short a;
-    short b;
-} small_struct;
-
-// CHECK-LABEL: define{{.*}} i32 @return_small_struct(i16 %x.coerce0, i16 %x.coerce1)
-small_struct return_small_struct(small_struct x) {
-    return x;
-}
-
-// Structs <= 16 bits should still be coerced to i16 for return value
-typedef struct tiny_struct {
-    char a;
-    char b;
-} tiny_struct;
-
-// CHECK-LABEL: define{{.*}} i16 @return_tiny_struct(i8 %x.coerce0, i8 %x.coerce1)
-tiny_struct return_tiny_struct(tiny_struct x) {
-    return x;
-}

>From 7a4a746b43b7957567e2f95ed1596259000869a6 Mon Sep 17 00:00:00 2001
From: addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 16:17:13 +0530
Subject: [PATCH 03/55] Update AMDGPUAsmParser.cpp

---
 llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index fddb36133afb8..5ee1da88c3d54 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -2057,6 +2057,7 @@ static const fltSemantics *getOpFltSemantics(uint8_t OperandType) {
   case AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32:
     return &APFloat::IEEEsingle();
   case AMDGPU::OPERAND_REG_IMM_INT64:
+  case AMDGPU::OPERAND_REG_IMM_B64:
   case AMDGPU::OPERAND_REG_IMM_FP64:
   case AMDGPU::OPERAND_REG_INLINE_C_INT64:
   case AMDGPU::OPERAND_REG_INLINE_C_FP64:
@@ -2377,6 +2378,7 @@ void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyMo
   if (Imm.IsFPImm) { // We got fp literal token
     switch (OpTy) {
     case AMDGPU::OPERAND_REG_IMM_INT64:
+    case AMDGPU::OPERAND_REG_IMM_B64:
     case AMDGPU::OPERAND_REG_IMM_FP64:
     case AMDGPU::OPERAND_REG_INLINE_C_INT64:
     case AMDGPU::OPERAND_REG_INLINE_C_FP64:
@@ -2513,6 +2515,7 @@ void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyMo
     break;
 
   case AMDGPU::OPERAND_REG_IMM_INT64:
+  case AMDGPU::OPERAND_REG_IMM_B64:
   case AMDGPU::OPERAND_REG_INLINE_C_INT64:
     if (Lit == LitModifier::None &&
         AMDGPU::isInlinableLiteral64(Val, AsmParser->hasInv2PiInlineImm())) {

>From e32e9bd3641a54163b90485392b9da8f6c3fdbd3 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 16:28:28 +0530
Subject: [PATCH 04/55] Update AMDGPUDisassembler.cpp

---
 llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
index eec81a98cc885..6ccc984075bd8 100644
--- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -550,6 +550,7 @@ void AMDGPUDisassembler::decodeImmOperands(MCInst &MI,
       }
       case AMDGPU::OPERAND_REG_IMM_FP64:
       case AMDGPU::OPERAND_REG_IMM_INT64:
+      case AMDGPU::OPERAND_REG_IMM_B64:
       case AMDGPU::OPERAND_REG_INLINE_AC_FP64:
       case AMDGPU::OPERAND_REG_INLINE_C_FP64:
       case AMDGPU::OPERAND_REG_INLINE_C_INT64:
@@ -1672,6 +1673,7 @@ AMDGPUDisassembler::decodeLiteralConstant(const MCInstrDesc &Desc,
     Val <<= 32;
     break;
   case AMDGPU::OPERAND_REG_IMM_INT64:
+  case AMDGPU::OPERAND_REG_IMM_B64:
   case AMDGPU::OPERAND_REG_INLINE_C_INT64:
     UseLit = AMDGPU::isInlinableLiteral64(Val, HasInv2Pi);
     break;

>From 0746820cb5ba0cfe06ddd88acbdaae810fa808f5 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 16:30:08 +0530
Subject: [PATCH 05/55] Update AMDGPUInstPrinter.cpp

---
 llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
index 8c54d292dbd1c..0d2f48cd4ffdd 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -872,6 +872,7 @@ void AMDGPUInstPrinter::printRegularOperand(const MCInst *MI, unsigned OpNo,
       printImmediate32(Op.getImm(), STI, O);
       break;
     case AMDGPU::OPERAND_REG_IMM_INT64:
+    case AMDGPU::OPERAND_REG_IMM_B64:
     case AMDGPU::OPERAND_REG_INLINE_C_INT64:
       printImmediate64(Op.getImm(), STI, O, false);
       break;

>From fdb2c7a95df0e32c7f773c4a2d1ae39a540c21df Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 16:38:02 +0530
Subject: [PATCH 06/55] Update AMDGPUMCCodeEmitter.cpp

---
 .../MCTargetDesc/AMDGPUMCCodeEmitter.cpp      | 25 ++++++++++++++++---
 1 file changed, 21 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
index 029d2eab0a9df..3f4fcdc1b9154 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
@@ -226,8 +226,14 @@ static uint32_t getLit16IntEncoding(uint32_t Val, const MCSubtargetInfo &STI) {
   return getLit32Encoding(Val, STI);
 }
 
+/// Get the encoding for a 64-bit literal value.
+/// \param IsFP - True if this is a floating-point operand.
+/// \param IsSigned - True if this is a signed integer operand (uses IsInt<32>
+///                   to determine if 32-bit literal is valid). Only relevant
+///                   when IsFP is false.
 static uint32_t getLit64Encoding(const MCInstrDesc &Desc, uint64_t Val,
-                                 const MCSubtargetInfo &STI, bool IsFP) {
+                                 const MCSubtargetInfo &STI, bool IsFP,
+                                 bool IsSigned = false) {
   uint32_t IntImm = getIntInlineImmEncoding(static_cast<int64_t>(Val));
   if (IntImm != 0)
     return IntImm;
@@ -269,8 +275,12 @@ static uint32_t getLit64Encoding(const MCInstrDesc &Desc, uint64_t Val,
     return CanUse64BitLiterals && Lo_32(Val) ? 254 : 255;
   }
 
-  return CanUse64BitLiterals && (!isInt<32>(Val) || !isUInt<32>(Val)) ? 254
-                                                                      : 255;
+  // For integer operands, determine if we need 64-bit literal encoding based
+  // on whether the value fits in a sign-extended or zero-extended 32-bit
+  // literal. Signed operands use IsInt<32>, unsigned operands use IsUInt<32>.
+  bool Needs64BitLiteral =
+      IsSigned ? !isInt<32>(static_cast<int64_t>(Val)) : !isUInt<32>(Val);
+  return CanUse64BitLiterals && Needs64BitLiteral ? 254 : 255;
 }
 
 std::optional<uint64_t> AMDGPUMCCodeEmitter::getLitEncoding(
@@ -313,7 +323,14 @@ std::optional<uint64_t> AMDGPUMCCodeEmitter::getLitEncoding(
 
   case AMDGPU::OPERAND_REG_IMM_INT64:
   case AMDGPU::OPERAND_REG_INLINE_C_INT64:
-    return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, false);
+    // Signed 64-bit integer operand - use IsInt<32> for 32-bit literal check
+    return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, false,
+                            /IsSigned=/true);
+
+  case AMDGPU::OPERAND_REG_IMM_B64:
+    // Unsigned 64-bit integer operand - use IsUInt<32> for 32-bit literal check
+    return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, false,
+                            /IsSigned=/false);
 
   case AMDGPU::OPERAND_REG_INLINE_C_FP64:
   case AMDGPU::OPERAND_REG_INLINE_AC_FP64:

>From 5f8d29e4de36ea933399402b884e2117db653f72 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 16:39:59 +0530
Subject: [PATCH 07/55] Update SIDefines.h

---
 llvm/lib/Target/AMDGPU/SIDefines.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h
index 0c7c64220d72a..c1b188bc78a48 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -200,7 +200,8 @@ namespace AMDGPU {
 enum OperandType : unsigned {
   /// Operands with register, 32-bit, or 64-bit immediate
   OPERAND_REG_IMM_INT32 = MCOI::OPERAND_FIRST_TARGET,
-  OPERAND_REG_IMM_INT64,
+  OPERAND_REG_IMM_INT64,  // Signed 64-bit integer operand (uses IsInt<32>)
+  OPERAND_REG_IMM_B64,    // Unsigned 64-bit integer operand (uses IsUInt<32>)
   OPERAND_REG_IMM_INT16,
   OPERAND_REG_IMM_FP32,
   OPERAND_REG_IMM_FP64,

>From 228d5af79271b21252fc90557def28197ecbb682 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 16:53:53 +0530
Subject: [PATCH 08/55] Update SIInstrInfo.cpp

---
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 55 +++++++++++++++++---------
 1 file changed, 37 insertions(+), 18 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 19175b2f6fcc2..70a3e6665e71c 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -4739,6 +4739,7 @@ bool SIInstrInfo::isInlineConstant(int64_t Imm, uint8_t OperandType) const {
     return AMDGPU::isInlinableLiteral32(Trunc, ST.hasInv2PiInlineImm());
   }
   case AMDGPU::OPERAND_REG_IMM_INT64:
+  case AMDGPU::OPERAND_REG_IMM_B64:
   case AMDGPU::OPERAND_REG_IMM_FP64:
   case AMDGPU::OPERAND_REG_INLINE_C_INT64:
   case AMDGPU::OPERAND_REG_INLINE_C_FP64:
@@ -5225,6 +5226,7 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
       break;
     case AMDGPU::OPERAND_REG_IMM_INT32:
     case AMDGPU::OPERAND_REG_IMM_INT64:
+    case AMDGPU::OPERAND_REG_IMM_B64:
     case AMDGPU::OPERAND_REG_IMM_INT16:
     case AMDGPU::OPERAND_REG_IMM_FP32:
     case AMDGPU::OPERAND_REG_IMM_V2FP32:
@@ -6542,8 +6544,11 @@ bool SIInstrInfo::isOperandLegal(const MachineInstr &MI, unsigned OpIdx,
   if (MO->isImm()) {
     uint64_t Imm = MO->getImm();
     bool Is64BitFPOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_FP64;
-    bool Is64BitOp = Is64BitFPOp ||
-                     OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_INT64 ||
+    bool Is64BitSignedOp =
+        OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_INT64;
+    bool Is64BitUnsignedOp =
+        OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_B64;
+    bool Is64BitOp = Is64BitFPOp || Is64BitSignedOp || Is64BitUnsignedOp ||
                      OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_V2INT32 ||
                      OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_V2FP32;
     if (Is64BitOp &&
@@ -6552,15 +6557,28 @@ bool SIInstrInfo::isOperandLegal(const MachineInstr &MI, unsigned OpIdx,
           (!ST.has64BitLiterals() || InstDesc.getSize() != 4))
         return false;
 
-      // FIXME: We can use sign extended 64-bit literals, but only for signed
-      //        operands. At the moment we do not know if an operand is signed.
-      //        Such operand will be encoded as its low 32 bits and then either
-      //        correctly sign extended or incorrectly zero extended by HW.
-      //        If 64-bit literals are supported and the literal will be encoded
-      //        as full 64 bit we still can use it.
-      if (!Is64BitFPOp && (int32_t)Imm < 0 &&
-          (!ST.has64BitLiterals() || AMDGPU::isValid32BitLiteral(Imm, false)))
+      // For signed operands, we can use sign extended 32-bit literals when the
+      // value fits in a signed 32-bit integer. For unsigned operands, we reject
+      // negative values (when interpreted as 32-bit) since they would be
+      // zero-extended, not sign-extended.
+      // If 64-bit literals are supported and the literal will be encoded
+      // as full 64 bit we still can use it.
+      if (Is64BitSignedOp) {
+        // Signed operand: 32-bit literal is valid if it fits in int32_t
+        if (!isInt<32>(static_cast<int64_t>(Imm)) &&
+            (!ST.has64BitLiterals() || AMDGPU::isValid32BitLiteral(Imm, false)))
+          return false;
+      } else if (Is64BitUnsignedOp) {
+        // Unsigned operand: 32-bit literal is valid if it fits in uint32_t
+        if (!isUInt<32>(Imm) &&
+            (!ST.has64BitLiterals() || AMDGPU::isValid32BitLiteral(Imm, false)))
+          return false;
+      } else if (!Is64BitFPOp && (int32_t)Imm < 0 &&
+                 (!ST.has64BitLiterals() ||
+                  AMDGPU::isValid32BitLiteral(Imm, false))) {
+        // Other 64-bit operands (V2INT32, V2FP32): be conservative
         return false;
+      }
     }
   }
 
@@ -9813,14 +9831,15 @@ unsigned SIInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
               LiteralSize = 8;
             break;
           case AMDGPU::OPERAND_REG_IMM_INT64:
-            // A 32-bit literal is only valid when the value fits in BOTH signed
-            // and unsigned 32-bit ranges [0, 2^31-1], matching the MC code
-            // emitter's getLit64Encoding logic. This is because of the lack of
-            // abilility to tell signedness of the literal, therefore we need to
-            // be conservative and assume values outside this range require a
-            // 64-bit literal encoding (8 bytes).
-            if (!Op.isImm() || !isInt<32>(Op.getImm()) ||
-                !isUInt<32>(Op.getImm()))
+            // Signed 64-bit operand: 32-bit literal is valid if the value
+            // fits in a signed 32-bit integer (sign-extended by HW).
+            if (!Op.isImm() || !isInt<32>(Op.getImm()))
+              LiteralSize = 8;
+            break;
+          case AMDGPU::OPERAND_REG_IMM_B64:
+            // Unsigned 64-bit operand: 32-bit literal is valid if the value
+            // fits in an unsigned 32-bit integer (zero-extended by HW).
+            if (!Op.isImm() || !isUInt<32>(Op.getImm()))
               LiteralSize = 8;
             break;
           }

>From fa528f37e5751844de46cf4bc9667a7335bcdc58 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 16:57:27 +0530
Subject: [PATCH 09/55] Update SIRegisterInfo.td

---
 llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.td b/llvm/lib/Target/AMDGPU/SIRegisterInfo.td
index 493e267472173..787df4c50d7df 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.td
@@ -1377,7 +1377,7 @@ def SSrc_bf16 : SrcRegOrImm9 <SReg_32, "OPERAND_REG_IMM_BF16">;
 def SSrc_f16  : SrcRegOrImm9 <SReg_32, "OPERAND_REG_IMM_FP16">;
 def SSrc_b32  : SrcRegOrImm9 <SReg_32, "OPERAND_REG_IMM_INT32">;
 def SSrc_f32  : SrcRegOrImm9 <SReg_32, "OPERAND_REG_IMM_FP32">;
-def SSrc_b64  : SrcRegOrImm9 <SReg_64_Encodable, "OPERAND_REG_IMM_INT64">;
+def SSrc_b64  : SrcRegOrImm9 <SReg_64_Encodable, "OPERAND_REG_IMM_B64">;
 
 def SSrcOrLds_b32 : SrcRegOrImm9 <SRegOrLds_32, "OPERAND_REG_IMM_INT32">;
 
@@ -1420,7 +1420,7 @@ def VSrc_f32    : SrcRegOrImm9 <VS_32, "OPERAND_REG_IMM_FP32">;
 def VSrc_v2b16  : SrcRegOrImm9 <VS_32, "OPERAND_REG_IMM_V2INT16">;
 def VSrc_v2bf16 : SrcRegOrImm9 <VS_32, "OPERAND_REG_IMM_V2BF16">;
 def VSrc_v2f16  : SrcRegOrImm9 <VS_32, "OPERAND_REG_IMM_V2FP16">;
-def VSrc_b64    : SrcRegOrImm9 <VS_64_AlignTarget, "OPERAND_REG_IMM_INT64">;
+def VSrc_b64    : SrcRegOrImm9 <VS_64_AlignTarget, "OPERAND_REG_IMM_B64">;
 def VSrc_f64    : SrcRegOrImm9 <VS_64_AlignTarget, "OPERAND_REG_IMM_FP64"> {
   let DecoderMethod = "decodeOperand_VSrc_f64";
 }

>From 1f633019adf046557f6405eb340f047f9ff3ed7f Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 17:05:34 +0530
Subject: [PATCH 10/55] Update AMDGPUBaseInfo.h

---
 llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
index b3d20777ccfcf..53b940c455cf8 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
@@ -1812,6 +1812,7 @@ inline unsigned getOperandSize(const MCOperandInfo &OpInfo) {
     return 4;
 
   case AMDGPU::OPERAND_REG_IMM_INT64:
+  case AMDGPU::OPERAND_REG_IMM_B64:
   case AMDGPU::OPERAND_REG_IMM_FP64:
   case AMDGPU::OPERAND_REG_INLINE_C_INT64:
   case AMDGPU::OPERAND_REG_INLINE_C_FP64:

>From 1e498c38a32ba2fc74c4c39945558d3506f30550 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 17:07:28 +0530
Subject: [PATCH 11/55] Update branch-relaxation-inst-size-gfx1250.mir

---
 .../branch-relaxation-inst-size-gfx1250.mir   | 32 +++++++++++--------
 1 file changed, 18 insertions(+), 14 deletions(-)

diff --git a/llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx1250.mir b/llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx1250.mir
index ebc7253cf2027..b3f80a04d9d44 100644
--- a/llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx1250.mir
+++ b/llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx1250.mir
@@ -4,9 +4,11 @@
 # Test that getInstSizeInBytes correctly estimates S_MOV_B64 with 64-bit
 # literal values on targets with 64-bit literal support (gfx1250).
 #
-# Values outside [0, 2^31-1] require 64-bit literal encoding, making the
-# instruction 12 bytes (4-byte opcode + 8-byte literal) instead of 8 bytes
-# (4-byte opcode + 4-byte literal).
+# S_MOV_B64 uses an unsigned 64-bit operand (OPERAND_REG_IMM_B64), so values
+# outside the uint32_t range [0, 2^32-1] require 64-bit literal encoding,
+# making the instruction 12 bytes (4-byte opcode + 8-byte literal) instead of
+# 8 bytes (4-byte opcode + 4-byte literal). Negative values (when sign-extended
+# to 64 bits) don't fit in uint32_t and require 64-bit literals.
 #
 # With -amdgpu-s-branch-bits=4, forward branches can reach at most +7 dwords.
 # Three S_MOV_B64 with 64-bit literals = 3 * 12 = 36 bytes = 9 dwords,
@@ -47,9 +49,9 @@ body: |
   ; CHECK-NEXT: bb.1:
   ; CHECK-NEXT:   successors: %bb.2(0x80000000)
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   $sgpr10_sgpr11 = S_MOV_B64 4294967295
-  ; CHECK-NEXT:   $sgpr12_sgpr13 = S_MOV_B64 2147483648
-  ; CHECK-NEXT:   $sgpr14_sgpr15 = S_MOV_B64 -17
+  ; CHECK-NEXT:   $sgpr10_sgpr11 = S_MOV_B64 -17
+  ; CHECK-NEXT:   $sgpr12_sgpr13 = S_MOV_B64 -100
+  ; CHECK-NEXT:   $sgpr14_sgpr15 = S_MOV_B64 -1000
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2:
   ; CHECK-NEXT:   S_ENDPGM 0
@@ -60,14 +62,16 @@ body: |
 
   bb.1:
     ; S_MOV_B64 with values requiring 64-bit literal encoding (12 bytes each).
-    ; These values are outside the [0, 2^31-1] range where 32-bit literal
-    ; can be used, so they need 64-bit literal encoding on gfx1250.
-    ; 0xFFFFFFFF (4294967295) is in [2^31, 2^32-1].
-    ; 0x80000000 (2147483648) is exactly 2^31.
-    ; -17 (0xFFFFFFFFFFFFFFEF) is a negative non-inline constant.
-    $sgpr10_sgpr11 = S_MOV_B64 4294967295
-    $sgpr12_sgpr13 = S_MOV_B64 2147483648
-    $sgpr14_sgpr15 = S_MOV_B64 -17
+    ; S_MOV_B64 uses an unsigned operand type (OPERAND_REG_IMM_B64), so values
+    ; must fit in uint32_t [0, 2^32-1] to use 32-bit literal encoding.
+    ; Negative values (sign-extended to 64 bits) don't fit in uint32_t,
+    ; so they require 64-bit literal encoding on gfx1250.
+    ; -17 (0xFFFFFFFFFFFFFFEF) requires 64-bit literal.
+    ; -100 (0xFFFFFFFFFFFFFF9C) requires 64-bit literal.
+    ; -1000 (0xFFFFFFFFFFFFFC18) requires 64-bit literal.
+    $sgpr10_sgpr11 = S_MOV_B64 -17
+    $sgpr12_sgpr13 = S_MOV_B64 -100
+    $sgpr14_sgpr15 = S_MOV_B64 -1000
 
   bb.2:
     S_ENDPGM 0

>From b099c20451a403e9a59fcea23b138900614be653 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 17:08:51 +0530
Subject: [PATCH 12/55] Update fold-short-64-bit-literals.mir

---
 llvm/test/CodeGen/AMDGPU/fold-short-64-bit-literals.mir | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/llvm/test/CodeGen/AMDGPU/fold-short-64-bit-literals.mir b/llvm/test/CodeGen/AMDGPU/fold-short-64-bit-literals.mir
index cfb42de4456f3..194e5672caaf8 100644
--- a/llvm/test/CodeGen/AMDGPU/fold-short-64-bit-literals.mir
+++ b/llvm/test/CodeGen/AMDGPU/fold-short-64-bit-literals.mir
@@ -91,8 +91,9 @@ body:             |
     SI_RETURN_TO_EPILOG %2
 ...
 
-# FIXME: This could be folded, but we do not know if operand of S_AND_B64 is signed or unsigned
-#        and if it will be sign or zero extended.
+# S_AND_B64 uses an unsigned 64-bit operand (OPERAND_REG_IMM_B64), so values
+# that fit in uint32_t [0, 2^32-1] can be folded as 32-bit literals.
+# 4294967295 (0xFFFFFFFF) fits in uint32_t, so it can be folded.
 
 ---
 name:            fold_uint_32bit_literal_sgpr
@@ -102,8 +103,7 @@ body:             |
 
     ; GCN-LABEL: name: fold_uint_32bit_literal_sgpr
     ; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
-    ; GCN-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 4294967295
-    ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[DEF]], [[S_MOV_B64_]], implicit-def $scc
+    ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[DEF]], 4294967295, implicit-def $scc
     ; GCN-NEXT: SI_RETURN_TO_EPILOG [[S_AND_B64_]]
     %0:sreg_64 = IMPLICIT_DEF
     %1:sreg_64 = S_MOV_B64 4294967295

>From 0c8cd41b262cd93463be1e531b327ec396025eaf Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 17:10:28 +0530
Subject: [PATCH 13/55] Update folding-of-i32-as-i64.mir

---
 .../CodeGen/AMDGPU/folding-of-i32-as-i64.mir  | 21 +++++++++++--------
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/llvm/test/CodeGen/AMDGPU/folding-of-i32-as-i64.mir b/llvm/test/CodeGen/AMDGPU/folding-of-i32-as-i64.mir
index bd1164fe30f3f..ad2a51c758323 100644
--- a/llvm/test/CodeGen/AMDGPU/folding-of-i32-as-i64.mir
+++ b/llvm/test/CodeGen/AMDGPU/folding-of-i32-as-i64.mir
@@ -1,9 +1,12 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
 # RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass=si-fold-operands -o - %s | FileCheck -check-prefix=GCN %s
 
-# The constant is 0xffffffff80000000. It is 64-bit negative constant, but it passes the test
-# isInt<32>(). Nonetheless it is not a legal literal for a binary or unsigned operand and
-# cannot be used right in the shift as HW will zero extend it.
+# S_LSHL_B64 and S_ASHR_I64 use unsigned 64-bit operands (OPERAND_REG_IMM_B64).
+# Values that fit in uint32_t [0, 2^32-1] can be folded as 32-bit literals.
+# Values outside this range cannot be folded and require S_MOV_B64_IMM_PSEUDO.
+#
+# The constant 0xffffffff80000000 is a 64-bit negative constant that passes
+# isInt<32>(), but it does NOT fit in uint32_t, so it cannot be folded.
 
 ---
 name:            imm64_shift_int32_const_0xffffffff80000000
@@ -23,9 +26,9 @@ body: |
 name:            imm64_shift_int32_const_0xffffffff
 body: |
   bb.0:
+    ; 0xFFFFFFFF (4294967295) fits in uint32_t, so it CAN be folded.
     ; GCN-LABEL: name: imm64_shift_int32_const_0xffffffff
-    ; GCN: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 4294967295
-    ; GCN-NEXT: [[S_LSHL_B64_:%[0-9]+]]:sreg_64 = S_LSHL_B64 [[S_MOV_B]], 1, implicit-def $scc
+    ; GCN: [[S_LSHL_B64_:%[0-9]+]]:sreg_64 = S_LSHL_B64 4294967295, 1, implicit-def $scc
     ; GCN-NEXT: S_ENDPGM 0, implicit [[S_LSHL_B64_]]
     %0:sreg_64 = S_MOV_B64_IMM_PSEUDO 4294967295
     %1:sreg_64 = S_LSHL_B64 %0, 1, implicit-def $scc
@@ -37,9 +40,9 @@ body: |
 name:            imm64_shift_int32_const_0x80000000
 body: |
   bb.0:
+    ; 0x80000000 (2147483648) fits in uint32_t, so it CAN be folded.
     ; GCN-LABEL: name: imm64_shift_int32_const_0x80000000
-    ; GCN: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 2147483648
-    ; GCN-NEXT: [[S_LSHL_B64_:%[0-9]+]]:sreg_64 = S_LSHL_B64 [[S_MOV_B]], 1, implicit-def $scc
+    ; GCN: [[S_LSHL_B64_:%[0-9]+]]:sreg_64 = S_LSHL_B64 2147483648, 1, implicit-def $scc
     ; GCN-NEXT: S_ENDPGM 0, implicit [[S_LSHL_B64_]]
     %0:sreg_64 = S_MOV_B64_IMM_PSEUDO 2147483648
     %1:sreg_64 = S_LSHL_B64 %0, 1, implicit-def $scc
@@ -91,9 +94,9 @@ body: |
 name:            imm64_ashr_int32_const_0xffffffff
 body: |
   bb.0:
+    ; 0xFFFFFFFF (4294967295) fits in uint32_t, so it CAN be folded.
     ; GCN-LABEL: name: imm64_ashr_int32_const_0xffffffff
-    ; GCN: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 4294967295
-    ; GCN-NEXT: [[S_ASHR_I64_:%[0-9]+]]:sreg_64 = S_ASHR_I64 [[S_MOV_B]], 1, implicit-def $scc
+    ; GCN: [[S_ASHR_I64_:%[0-9]+]]:sreg_64 = S_ASHR_I64 4294967295, 1, implicit-def $scc
     ; GCN-NEXT: S_ENDPGM 0, implicit [[S_ASHR_I64_]]
     %0:sreg_64 = S_MOV_B64_IMM_PSEUDO 4294967295
     %1:sreg_64 = S_ASHR_I64 %0, 1, implicit-def $scc

>From 847e12393a8d1cd59501d0301dc1c9745ceed5c8 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 17:49:16 +0530
Subject: [PATCH 14/55] Update mul.ll

---
 llvm/test/CodeGen/AMDGPU/mul.ll | 102 ++++++++++++++++----------------
 1 file changed, 50 insertions(+), 52 deletions(-)

diff --git a/llvm/test/CodeGen/AMDGPU/mul.ll b/llvm/test/CodeGen/AMDGPU/mul.ll
index f1130100725c8..6e4944cf94393 100644
--- a/llvm/test/CodeGen/AMDGPU/mul.ll
+++ b/llvm/test/CodeGen/AMDGPU/mul.ll
@@ -128,7 +128,7 @@ define amdgpu_kernel void @test_mul_v2i32(ptr addrspace(1) %out, ptr addrspace(1
 ; GFX1250-LABEL: test_mul_v2i32:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_mov_b32 s6, -1
 ; GFX1250-NEXT:    s_mov_b32 s7, 0x31016000
 ; GFX1250-NEXT:    s_mov_b32 s10, s6
@@ -310,7 +310,7 @@ define amdgpu_kernel void @v_mul_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %
 ; GFX1250-LABEL: v_mul_v4i32:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_mov_b32 s6, -1
 ; GFX1250-NEXT:    s_mov_b32 s7, 0x31016000
 ; GFX1250-NEXT:    s_mov_b32 s10, s6
@@ -450,9 +450,9 @@ define amdgpu_kernel void @s_trunc_i64_mul_to_i32(ptr addrspace(1) %out, i64 %a,
 ; GFX1250-LABEL: s_trunc_i64_mul_to_i32:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_wait_kmcnt 0x0
-; GFX1250-NEXT:    s_load_b32 s3, s[4:5], 0x34
+; GFX1250-NEXT:    s_load_b32 s3, s[4:5], 0x34 nv
 ; GFX1250-NEXT:    ; kill: killed $sgpr4_sgpr5
 ; GFX1250-NEXT:    s_wait_kmcnt 0x0
 ; GFX1250-NEXT:    s_mul_i32 s2, s3, s2
@@ -619,8 +619,8 @@ define amdgpu_kernel void @v_trunc_i64_mul_to_i32(ptr addrspace(1) %out, ptr add
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GFX1250-NEXT:    s_clause 0x1
-; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1250-NEXT:    s_load_b64 s[8:9], s[4:5], 0x34
+; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-NEXT:    s_load_b64 s[8:9], s[4:5], 0x34 nv
 ; GFX1250-NEXT:    s_mov_b32 s6, -1
 ; GFX1250-NEXT:    s_mov_b32 s7, 0x31016000
 ; GFX1250-NEXT:    s_mov_b32 s14, s6
@@ -757,7 +757,7 @@ define amdgpu_kernel void @mul64_sext_c(ptr addrspace(1) %out, i32 %in) {
 ; GFX1250-LABEL: mul64_sext_c:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_load_b96 s[0:2], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b96 s[0:2], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_wait_kmcnt 0x0
 ; GFX1250-NEXT:    s_ashr_i32 s3, s2, 31
 ; GFX1250-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
@@ -874,7 +874,7 @@ define amdgpu_kernel void @mul64_zext_c(ptr addrspace(1) %out, i32 %in) {
 ; GFX1250-LABEL: mul64_zext_c:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_load_b96 s[0:2], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b96 s[0:2], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_mov_b32 s3, 0
 ; GFX1250-NEXT:    s_wait_kmcnt 0x0
 ; GFX1250-NEXT:    s_mul_u64 s[4:5], s[2:3], 0x50
@@ -1023,7 +1023,7 @@ define amdgpu_kernel void @v_mul64_sext_c(ptr addrspace(1) %out, ptr addrspace(1
 ; GFX1250-LABEL: v_mul64_sext_c:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_mov_b32 s6, -1
 ; GFX1250-NEXT:    s_mov_b32 s7, 0x31016000
 ; GFX1250-NEXT:    s_mov_b32 s10, s6
@@ -1187,7 +1187,7 @@ define amdgpu_kernel void @v_mul64_zext_c(ptr addrspace(1) %out, ptr addrspace(1
 ; GFX1250-LABEL: v_mul64_zext_c:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_mov_b32 s6, -1
 ; GFX1250-NEXT:    s_mov_b32 s7, 0x31016000
 ; GFX1250-NEXT:    s_mov_b32 s10, s6
@@ -1347,7 +1347,7 @@ define amdgpu_kernel void @v_mul64_sext_inline_imm(ptr addrspace(1) %out, ptr ad
 ; GFX1250-LABEL: v_mul64_sext_inline_imm:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_mov_b32 s6, -1
 ; GFX1250-NEXT:    s_mov_b32 s7, 0x31016000
 ; GFX1250-NEXT:    s_mov_b32 s10, s6
@@ -1477,9 +1477,9 @@ define amdgpu_kernel void @s_mul_i32(ptr addrspace(1) %out, [8 x i32], i32 %a, [
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GFX1250-NEXT:    s_clause 0x2
-; GFX1250-NEXT:    s_load_b32 s2, s[4:5], 0x4c
-; GFX1250-NEXT:    s_load_b32 s3, s[4:5], 0x70
-; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b32 s2, s[4:5], 0x4c nv
+; GFX1250-NEXT:    s_load_b32 s3, s[4:5], 0x70 nv
+; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_wait_kmcnt 0x0
 ; GFX1250-NEXT:    s_mul_i32 s2, s2, s3
 ; GFX1250-NEXT:    s_mov_b32 s3, 0x31016000
@@ -1616,7 +1616,7 @@ define amdgpu_kernel void @v_mul_i32(ptr addrspace(1) %out, ptr addrspace(1) %in
 ; GFX1250-LABEL: v_mul_i32:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_mov_b32 s6, -1
 ; GFX1250-NEXT:    s_mov_b32 s7, 0x31016000
 ; GFX1250-NEXT:    s_mov_b32 s10, s6
@@ -1751,9 +1751,9 @@ define amdgpu_kernel void @s_mul_i1(ptr addrspace(1) %out, [8 x i32], i1 %a, [8
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GFX1250-NEXT:    s_clause 0x2
-; GFX1250-NEXT:    s_load_b32 s2, s[4:5], 0x4c
-; GFX1250-NEXT:    s_load_b32 s3, s[4:5], 0x70
-; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b32 s2, s[4:5], 0x4c nv
+; GFX1250-NEXT:    s_load_b32 s3, s[4:5], 0x70 nv
+; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_wait_kmcnt 0x0
 ; GFX1250-NEXT:    s_and_b32 s2, s2, s3
 ; GFX1250-NEXT:    s_mov_b32 s3, 0x31016000
@@ -1926,7 +1926,7 @@ define amdgpu_kernel void @v_mul_i1(ptr addrspace(1) %out, ptr addrspace(1) %in)
 ; GFX1250-LABEL: v_mul_i1:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_mov_b32 s6, -1
 ; GFX1250-NEXT:    s_mov_b32 s7, 0x31016000
 ; GFX1250-NEXT:    s_mov_b32 s10, s6
@@ -2107,8 +2107,8 @@ define amdgpu_kernel void @s_mul_i64(ptr addrspace(1) %out, i64 %a, i64 %b) noun
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GFX1250-NEXT:    s_clause 0x1
-; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1250-NEXT:    s_load_b64 s[6:7], s[4:5], 0x34
+; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-NEXT:    s_load_b64 s[6:7], s[4:5], 0x34 nv
 ; GFX1250-NEXT:    s_wait_kmcnt 0x0
 ; GFX1250-NEXT:    s_mul_u64 s[4:5], s[2:3], s[6:7]
 ; GFX1250-NEXT:    s_mov_b32 s3, 0x31016000
@@ -2309,8 +2309,8 @@ define amdgpu_kernel void @v_mul_i64(ptr addrspace(1) %out, ptr addrspace(1) %ap
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GFX1250-NEXT:    s_clause 0x1
-; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
-; GFX1250-NEXT:    s_load_b64 s[8:9], s[4:5], 0x34
+; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1250-NEXT:    s_load_b64 s[8:9], s[4:5], 0x34 nv
 ; GFX1250-NEXT:    s_mov_b32 s6, -1
 ; GFX1250-NEXT:    s_mov_b32 s7, 0x31016000
 ; GFX1250-NEXT:    s_mov_b32 s14, s6
@@ -2574,7 +2574,7 @@ define amdgpu_kernel void @mul32_in_branch(ptr addrspace(1) %out, ptr addrspace(
 ; GFX1250-LABEL: mul32_in_branch:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x34
+; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x34 nv
 ; GFX1250-NEXT:    s_mov_b32 s6, 0
 ; GFX1250-NEXT:    s_wait_kmcnt 0x0
 ; GFX1250-NEXT:    s_cmp_lg_u32 s0, 0
@@ -2586,7 +2586,7 @@ define amdgpu_kernel void @mul32_in_branch(ptr addrspace(1) %out, ptr addrspace(
 ; GFX1250-NEXT:    s_mov_b32 s6, -1
 ; GFX1250-NEXT:    ; implicit-def: $sgpr7
 ; GFX1250-NEXT:  .LBB15_3: ; %Flow
-; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_and_not1_b32 vcc_lo, exec_lo, s6
 ; GFX1250-NEXT:    s_cbranch_vccnz .LBB15_5
 ; GFX1250-NEXT:  ; %bb.4: ; %if
@@ -2863,7 +2863,7 @@ define amdgpu_kernel void @mul64_in_branch(ptr addrspace(1) %out, ptr addrspace(
 ; GFX1250-LABEL: mul64_in_branch:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_load_b256 s[8:15], s[4:5], 0x24
+; GFX1250-NEXT:    s_load_b256 s[8:15], s[4:5], 0x24 nv
 ; GFX1250-NEXT:    s_wait_kmcnt 0x0
 ; GFX1250-NEXT:    s_cmp_lg_u64 s[12:13], 0
 ; GFX1250-NEXT:    s_cbranch_scc0 .LBB16_3
@@ -3234,43 +3234,41 @@ define amdgpu_kernel void @s_mul_i128(ptr addrspace(1) %out, [8 x i32], i128 %a,
 ; GFX1250-LABEL: s_mul_i128:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_clause 0x2
-; GFX1250-NEXT:    s_load_b128 s[8:11], s[4:5], 0x7c
-; GFX1250-NEXT:    s_load_b128 s[12:15], s[4:5], 0x4c
-; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24
-; GFX1250-NEXT:    s_wait_xcnt 0x0
-; GFX1250-NEXT:    s_mov_b64 s[4:5], 0xffffffff
+; GFX1250-NEXT:    s_clause 0x1
+; GFX1250-NEXT:    s_load_b128 s[8:11], s[4:5], 0x7c nv
+; GFX1250-NEXT:    s_load_b128 s[12:15], s[4:5], 0x4c nv
 ; GFX1250-NEXT:    s_mov_b32 s3, 0
-; GFX1250-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX1250-NEXT:    s_wait_xcnt 0x0
+; GFX1250-NEXT:    s_mov_b32 s5, s3
 ; GFX1250-NEXT:    s_mov_b32 s7, s3
 ; GFX1250-NEXT:    s_mov_b32 s17, s3
-; GFX1250-NEXT:    s_mov_b32 s19, s3
-; GFX1250-NEXT:    s_mov_b32 s20, s3
+; GFX1250-NEXT:    s_mov_b32 s18, s3
 ; GFX1250-NEXT:    s_wait_kmcnt 0x0
 ; GFX1250-NEXT:    s_mov_b32 s2, s8
-; GFX1250-NEXT:    s_and_b64 s[4:5], s[12:13], s[4:5]
-; GFX1250-NEXT:    s_mov_b32 s6, s13
+; GFX1250-NEXT:    s_and_b64 s[20:21], s[12:13], 0xffffffff
+; GFX1250-NEXT:    s_mov_b32 s4, s13
 ; GFX1250-NEXT:    s_mul_u64 s[10:11], s[10:11], s[12:13]
-; GFX1250-NEXT:    s_mul_u64 s[12:13], s[4:5], s[2:3]
-; GFX1250-NEXT:    s_mov_b32 s16, s9
+; GFX1250-NEXT:    s_mul_u64 s[12:13], s[20:21], s[2:3]
+; GFX1250-NEXT:    s_mov_b32 s6, s9
 ; GFX1250-NEXT:    s_mul_u64 s[8:9], s[8:9], s[14:15]
-; GFX1250-NEXT:    s_mul_u64 s[14:15], s[6:7], s[2:3]
+; GFX1250-NEXT:    s_mul_u64 s[14:15], s[4:5], s[2:3]
 ; GFX1250-NEXT:    s_mov_b32 s2, s13
-; GFX1250-NEXT:    s_mul_u64 s[4:5], s[4:5], s[16:17]
+; GFX1250-NEXT:    s_mul_u64 s[20:21], s[20:21], s[6:7]
 ; GFX1250-NEXT:    s_add_nc_u64 s[14:15], s[14:15], s[2:3]
-; GFX1250-NEXT:    s_mul_u64 s[6:7], s[6:7], s[16:17]
+; GFX1250-NEXT:    s_mul_u64 s[4:5], s[4:5], s[6:7]
 ; GFX1250-NEXT:    s_mov_b32 s2, s15
 ; GFX1250-NEXT:    s_mov_b32 s15, s3
+; GFX1250-NEXT:    s_add_nc_u64 s[6:7], s[10:11], s[8:9]
+; GFX1250-NEXT:    s_add_nc_u64 s[8:9], s[20:21], s[14:15]
 ; GFX1250-NEXT:    s_mov_b32 s13, s3
-; GFX1250-NEXT:    s_add_nc_u64 s[4:5], s[4:5], s[14:15]
-; GFX1250-NEXT:    s_add_nc_u64 s[8:9], s[10:11], s[8:9]
-; GFX1250-NEXT:    s_mov_b32 s18, s5
-; GFX1250-NEXT:    s_mov_b32 s21, s4
-; GFX1250-NEXT:    s_add_nc_u64 s[2:3], s[2:3], s[18:19]
-; GFX1250-NEXT:    s_or_b64 s[4:5], s[12:13], s[20:21]
-; GFX1250-NEXT:    s_add_nc_u64 s[2:3], s[6:7], s[2:3]
-; GFX1250-NEXT:    v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
-; GFX1250-NEXT:    s_add_nc_u64 s[2:3], s[2:3], s[8:9]
+; GFX1250-NEXT:    s_mov_b32 s16, s9
+; GFX1250-NEXT:    s_mov_b32 s19, s8
+; GFX1250-NEXT:    s_add_nc_u64 s[2:3], s[2:3], s[16:17]
+; GFX1250-NEXT:    s_or_b64 s[8:9], s[12:13], s[18:19]
+; GFX1250-NEXT:    s_add_nc_u64 s[2:3], s[4:5], s[2:3]
+; GFX1250-NEXT:    v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
+; GFX1250-NEXT:    s_add_nc_u64 s[2:3], s[2:3], s[6:7]
 ; GFX1250-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
 ; GFX1250-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
 ; GFX1250-NEXT:    s_mov_b32 s3, 0x31016000
@@ -3556,7 +3554,7 @@ define amdgpu_kernel void @v_mul_i128(ptr addrspace(1) %out, ptr addrspace(1) %a
 ; GFX1250-LABEL: v_mul_i128:
 ; GFX1250:       ; %bb.0: ; %entry
 ; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x2c
+; GFX1250-NEXT:    s_load_b128 s[0:3], s[4:5], 0x2c nv
 ; GFX1250-NEXT:    v_and_b32_e32 v16, 0x3ff, v0
 ; GFX1250-NEXT:    s_wait_kmcnt 0x0
 ; GFX1250-NEXT:    s_clause 0x1

>From da67afe21571c023fb6852a48f83aa55816f5457 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 17:51:27 +0530
Subject: [PATCH 15/55] Update gfx1250_asm_vop1-fake16.s

---
 llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s b/llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
index 6950c721320ce..c38c8994107ff 100644
--- a/llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
+++ b/llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
@@ -26,7 +26,7 @@ v_mov_b64 v[4:5], 0.5
 // GFX1250: v_mov_b64_e32 v[4:5], 0.5               ; encoding: [0xf0,0x3a,0x08,0x7e]
 
 v_mov_b64 v[254:255], 0xaf123456
-// GFX1250: v_mov_b64_e32 v[254:255], 0xaf123456    ; encoding: [0xfe,0x3a,0xfc,0x7f,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX1250: v_mov_b64_e32 v[254:255], 0xaf123456    ; encoding: [0xff,0x3a,0xfc,0x7f,0x56,0x34,0x12,0xaf]
 
 v_tanh_f32 v5, v1
 // GFX1250: v_tanh_f32_e32 v5, v1                   ; encoding: [0x01,0x3d,0x0a,0x7e]

>From 41f4c44e3999a8a7e822d874b69d9149f4b66e17 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 17:57:28 +0530
Subject: [PATCH 16/55] Update gfx1250_asm_vop1.s

---
 llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
index 39de9a268db95..1211ed42515c0 100644
--- a/llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
@@ -28,8 +28,7 @@ v_mov_b64 v[4:5], 0.5
 
 // TODO: Encode as a 32-bit literal unless lit64() is specified.
 v_mov_b64 v[254:255], 0xaf123456
-// GFX1250-ASM: v_mov_b64_e32 v[254:255], 0xaf123456    ; encoding: [0xfe,0x3a,0xfc,0x7f,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: v_mov_b64_e32 v[254:255], lit64(0xaf123456) ; encoding: [0xfe,0x3a,0xfc,0x7f,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX1250: v_mov_b64_e32 v[254:255], 0xaf123456    ; encoding: [0xff,0x3a,0xfc,0x7f,0x56,0x34,0x12,0xaf]
 
 v_tanh_f32 v5, v1
 // GFX1250: v_tanh_f32_e32 v5, v1                   ; encoding: [0x01,0x3d,0x0a,0x7e]
@@ -738,6 +737,9 @@ v_sat_pk4_u4_u8 v1.h, v2
 
 v_permlane16_swap_b32 v1, v2
 // GFX1250: v_permlane16_swap_b32_e32 v1, v2        ; encoding: [0x02,0x93,0x02,0x7e]
+//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+// GFX1250-ASM: {{.*}}
+// GFX1250-DIS: {{.*}}
 
 v_permlane16_swap_b32_e32 v1, v2
 // GFX1250: v_permlane16_swap_b32_e32 v1, v2        ; encoding: [0x02,0x93,0x02,0x7e]

>From 64b957bfc0bd517877bf038afc35e2501e5f43b5 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 18:01:51 +0530
Subject: [PATCH 17/55] Update gfx1250_asm_vop2.s

---
 llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s b/llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s
index 102776e774f45..7d69521175138 100644
--- a/llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s
+++ b/llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s
@@ -197,8 +197,7 @@ v_add_nc_u64 v[4:5], -4.0, v[4:5]
 
 v_add_nc_u64 v[4:5], 0xaf123456, v[4:5]
 // GFX1200-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// GFX1250-ASM: v_add_nc_u64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xfe,0x08,0x08,0x50,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: v_add_nc_u64_e32 v[4:5], lit64(0xaf123456), v[4:5] ; encoding: [0xfe,0x08,0x08,0x50,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX1250: v_add_nc_u64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xff,0x08,0x08,0x50,0x56,0x34,0x12,0xaf]
 
 v_add_nc_u64 v[4:5], 0x3f717273, v[4:5]
 // GFX1200-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
@@ -318,8 +317,7 @@ v_sub_nc_u64 v[4:5], -4.0, v[4:5]
 
 v_sub_nc_u64 v[4:5], 0xaf123456, v[4:5]
 // GFX1200-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// GFX1250-ASM: v_sub_nc_u64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xfe,0x08,0x08,0x52,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: v_sub_nc_u64_e32 v[4:5], lit64(0xaf123456), v[4:5] ; encoding: [0xfe,0x08,0x08,0x52,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX1250: v_sub_nc_u64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xff,0x08,0x08,0x52,0x56,0x34,0x12,0xaf]
 
 v_sub_nc_u64 v[4:5], 0x3f717273, v[4:5]
 // GFX1200-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
@@ -439,8 +437,7 @@ v_mul_u64 v[4:5], -4.0, v[4:5]
 
 v_mul_u64 v[4:5], 0xaf123456, v[4:5]
 // GFX1200-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// GFX1250-ASM: v_mul_u64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xfe,0x08,0x08,0x54,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: v_mul_u64_e32 v[4:5], lit64(0xaf123456), v[4:5] ; encoding: [0xfe,0x08,0x08,0x54,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX1250: v_mul_u64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xff,0x08,0x08,0x54,0x56,0x34,0x12,0xaf]
 
 v_mul_u64 v[4:5], 0x3f717273, v[4:5]
 // GFX1200-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU

>From 4bb90aa01f126dae0e5dda05ce69c2053610260e Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 18:07:49 +0530
Subject: [PATCH 18/55] Update gfx12_asm_sop1.s

---
 llvm/test/MC/AMDGPU/gfx12_asm_sop1.s | 195 +++++----------------------
 1 file changed, 36 insertions(+), 159 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_sop1.s b/llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
index 0548e9d24c113..9d459cc98aad2 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
@@ -859,9 +859,7 @@ s_mov_b64 s[0:1], 0x3f717273
 // GFX12: s_mov_b64 s[0:1], 0x3f717273            ; encoding: [0xff,0x01,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_mov_b64 s[0:1], 0xaf123456
-// GFX1200: s_mov_b64 s[0:1], 0xaf123456            ; encoding: [0xff,0x01,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_mov_b64 s[0:1], 0xaf123456            ; encoding: [0xfe,0x01,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_mov_b64 s[0:1], lit64(0xaf123456)     ; encoding: [0xfe,0x01,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_mov_b64 s[0:1], 0xaf123456            ; encoding: [0xff,0x01,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_mov_b64 s[0:1], null
 // GFX12: s_mov_b64 s[0:1], null                  ; encoding: [0x7c,0x01,0x80,0xbe]
@@ -969,9 +967,7 @@ s_cmov_b64 s[0:1], 0x3f717273
 // GFX12: s_cmov_b64 s[0:1], 0x3f717273           ; encoding: [0xff,0x03,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_cmov_b64 s[0:1], 0xaf123456
-// GFX1200: s_cmov_b64 s[0:1], 0xaf123456           ; encoding: [0xff,0x03,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_cmov_b64 s[0:1], 0xaf123456           ; encoding: [0xfe,0x03,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_cmov_b64 s[0:1], lit64(0xaf123456)    ; encoding: [0xfe,0x03,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_cmov_b64 s[0:1], 0xaf123456           ; encoding: [0xff,0x03,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_not_b32 s0, s1
 // GFX12: s_not_b32 s0, s1                        ; encoding: [0x01,0x1e,0x80,0xbe]
@@ -1073,9 +1069,7 @@ s_not_b64 s[0:1], 0x3f717273
 // GFX12: s_not_b64 s[0:1], 0x3f717273            ; encoding: [0xff,0x1f,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_not_b64 s[0:1], 0xaf123456
-// GFX1200: s_not_b64 s[0:1], 0xaf123456            ; encoding: [0xff,0x1f,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_not_b64 s[0:1], 0xaf123456            ; encoding: [0xfe,0x1f,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_not_b64 s[0:1], lit64(0xaf123456)     ; encoding: [0xfe,0x1f,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_not_b64 s[0:1], 0xaf123456            ; encoding: [0xff,0x1f,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_wqm_b32 s0, s1
 // GFX12: s_wqm_b32 s0, s1                        ; encoding: [0x01,0x1c,0x80,0xbe]
@@ -1177,9 +1171,7 @@ s_wqm_b64 s[0:1], 0x3f717273
 // GFX12: s_wqm_b64 s[0:1], 0x3f717273            ; encoding: [0xff,0x1d,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_wqm_b64 s[0:1], 0xaf123456
-// GFX1200: s_wqm_b64 s[0:1], 0xaf123456            ; encoding: [0xff,0x1d,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_wqm_b64 s[0:1], 0xaf123456            ; encoding: [0xfe,0x1d,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_wqm_b64 s[0:1], lit64(0xaf123456)     ; encoding: [0xfe,0x1d,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_wqm_b64 s[0:1], 0xaf123456            ; encoding: [0xff,0x1d,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_brev_b32 s0, s1
 // GFX12: s_brev_b32 s0, s1                       ; encoding: [0x01,0x04,0x80,0xbe]
@@ -1281,9 +1273,7 @@ s_brev_b64 s[0:1], 0x3f717273
 // GFX12: s_brev_b64 s[0:1], 0x3f717273           ; encoding: [0xff,0x05,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_brev_b64 s[0:1], 0xaf123456
-// GFX1200: s_brev_b64 s[0:1], 0xaf123456           ; encoding: [0xff,0x05,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_brev_b64 s[0:1], 0xaf123456           ; encoding: [0xfe,0x05,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_brev_b64 s[0:1], lit64(0xaf123456)    ; encoding: [0xfe,0x05,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_brev_b64 s[0:1], 0xaf123456           ; encoding: [0xff,0x05,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_bcnt0_i32_b32 s0, s1
 // GFX12: s_bcnt0_i32_b32 s0, s1                  ; encoding: [0x01,0x16,0x80,0xbe]
@@ -1394,9 +1384,7 @@ s_bcnt0_i32_b64 s0, 0x3f717273
 // GFX12: s_bcnt0_i32_b64 s0, 0x3f717273          ; encoding: [0xff,0x17,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_bcnt0_i32_b64 s0, 0xaf123456
-// GFX1200: s_bcnt0_i32_b64 s0, 0xaf123456          ; encoding: [0xff,0x17,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_bcnt0_i32_b64 s0, 0xaf123456          ; encoding: [0xfe,0x17,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_bcnt0_i32_b64 s0, lit64(0xaf123456)   ; encoding: [0xfe,0x17,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_bcnt0_i32_b64 s0, 0xaf123456          ; encoding: [0xff,0x17,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_bcnt1_i32_b32 s0, s1
 // GFX12: s_bcnt1_i32_b32 s0, s1                  ; encoding: [0x01,0x18,0x80,0xbe]
@@ -1507,9 +1495,7 @@ s_bcnt1_i32_b64 s0, 0x3f717273
 // GFX12: s_bcnt1_i32_b64 s0, 0x3f717273          ; encoding: [0xff,0x19,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_bcnt1_i32_b64 s0, 0xaf123456
-// GFX1200: s_bcnt1_i32_b64 s0, 0xaf123456          ; encoding: [0xff,0x19,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_bcnt1_i32_b64 s0, 0xaf123456          ; encoding: [0xfe,0x19,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_bcnt1_i32_b64 s0, lit64(0xaf123456)   ; encoding: [0xfe,0x19,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_bcnt1_i32_b64 s0, 0xaf123456          ; encoding: [0xff,0x19,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_ff1_i32_b32 s0, s1
 // GFX12: s_ctz_i32_b32 s0, s1                    ; encoding: [0x01,0x08,0x80,0xbe]
@@ -1620,9 +1606,7 @@ s_ff1_i32_b64 s0, 0x3f717273
 // GFX12: s_ctz_i32_b64 s0, 0x3f717273            ; encoding: [0xff,0x09,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_ff1_i32_b64 s0, 0xaf123456
-// GFX1200: s_ctz_i32_b64 s0, 0xaf123456            ; encoding: [0xff,0x09,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_ctz_i32_b64 s0, 0xaf123456            ; encoding: [0xfe,0x09,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_ctz_i32_b64 s0, lit64(0xaf123456)     ; encoding: [0xfe,0x09,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_ctz_i32_b64 s0, 0xaf123456            ; encoding: [0xff,0x09,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_flbit_i32_b32 s0, s1
 // GFX12: s_clz_i32_u32 s0, s1                    ; encoding: [0x01,0x0a,0x80,0xbe]
@@ -1733,9 +1717,7 @@ s_flbit_i32_b64 s0, 0x3f717273
 // GFX12: s_clz_i32_u64 s0, 0x3f717273            ; encoding: [0xff,0x0b,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_flbit_i32_b64 s0, 0xaf123456
-// GFX1200: s_clz_i32_u64 s0, 0xaf123456            ; encoding: [0xff,0x0b,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_clz_i32_u64 s0, 0xaf123456            ; encoding: [0xfe,0x0b,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_clz_i32_u64 s0, lit64(0xaf123456)     ; encoding: [0xfe,0x0b,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_clz_i32_u64 s0, 0xaf123456            ; encoding: [0xff,0x0b,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_flbit_i32 s0, s1
 // GFX12: s_cls_i32 s0, s1                        ; encoding: [0x01,0x0c,0x80,0xbe]
@@ -1846,9 +1828,7 @@ s_flbit_i32_i64 s0, 0x3f717273
 // GFX12: s_cls_i32_i64 s0, 0x3f717273            ; encoding: [0xff,0x0d,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_flbit_i32_i64 s0, 0xaf123456
-// GFX1200: s_cls_i32_i64 s0, 0xaf123456            ; encoding: [0xff,0x0d,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_cls_i32_i64 s0, 0xaf123456            ; encoding: [0xfe,0x0d,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_cls_i32_i64 s0, lit64(0xaf123456)     ; encoding: [0xfe,0x0d,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_cls_i32_i64 s0, 0xaf123456            ; encoding: [0xff,0x0d,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_sext_i32_i8 s0, s1
 // GFX12: s_sext_i32_i8 s0, s1                    ; encoding: [0x01,0x0e,0x80,0xbe]
@@ -2293,9 +2273,7 @@ s_and_saveexec_b64 s[0:1], 0x3f717273
 // GFX12: s_and_saveexec_b64 s[0:1], 0x3f717273   ; encoding: [0xff,0x21,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_and_saveexec_b64 s[0:1], 0xaf123456
-// GFX1200: s_and_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xff,0x21,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xfe,0x21,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_saveexec_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x21,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xff,0x21,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_or_saveexec_b64 s[0:1], s[2:3]
 // GFX12: s_or_saveexec_b64 s[0:1], s[2:3]        ; encoding: [0x02,0x23,0x80,0xbe]
@@ -2334,9 +2312,7 @@ s_or_saveexec_b64 s[0:1], 0x3f717273
 // GFX12: s_or_saveexec_b64 s[0:1], 0x3f717273    ; encoding: [0xff,0x23,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_or_saveexec_b64 s[0:1], 0xaf123456
-// GFX1200: s_or_saveexec_b64 s[0:1], 0xaf123456    ; encoding: [0xff,0x23,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_or_saveexec_b64 s[0:1], 0xaf123456    ; encoding: [0xfe,0x23,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_or_saveexec_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x23,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_or_saveexec_b64 s[0:1], 0xaf123456    ; encoding: [0xff,0x23,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_xor_saveexec_b64 s[0:1], s[2:3]
 // GFX12: s_xor_saveexec_b64 s[0:1], s[2:3]       ; encoding: [0x02,0x25,0x80,0xbe]
@@ -2375,9 +2351,7 @@ s_xor_saveexec_b64 s[0:1], 0x3f717273
 // GFX12: s_xor_saveexec_b64 s[0:1], 0x3f717273   ; encoding: [0xff,0x25,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_xor_saveexec_b64 s[0:1], 0xaf123456
-// GFX1200: s_xor_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xff,0x25,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_xor_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xfe,0x25,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_xor_saveexec_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x25,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_xor_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xff,0x25,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_andn2_saveexec_b64 s[0:1], s[2:3]
 // GFX12: s_and_not1_saveexec_b64 s[0:1], s[2:3]  ; encoding: [0x02,0x31,0x80,0xbe]
@@ -2416,9 +2390,7 @@ s_andn2_saveexec_b64 s[0:1], 0x3f717273
 // GFX12: s_and_not1_saveexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x31,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_andn2_saveexec_b64 s[0:1], 0xaf123456
-// GFX1200: s_and_not1_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x31,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_not1_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xfe,0x31,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_not1_saveexec_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x31,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_not1_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x31,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_orn2_saveexec_b64 s[0:1], s[2:3]
 // GFX12: s_or_not1_saveexec_b64 s[0:1], s[2:3]   ; encoding: [0x02,0x33,0x80,0xbe]
@@ -2457,9 +2429,7 @@ s_orn2_saveexec_b64 s[0:1], 0x3f717273
 // GFX12: s_or_not1_saveexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x33,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_orn2_saveexec_b64 s[0:1], 0xaf123456
-// GFX1200: s_or_not1_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x33,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_or_not1_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xfe,0x33,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_or_not1_saveexec_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x33,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_or_not1_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x33,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_nand_saveexec_b64 s[0:1], s[2:3]
 // GFX12: s_nand_saveexec_b64 s[0:1], s[2:3]      ; encoding: [0x02,0x27,0x80,0xbe]
@@ -2498,9 +2468,7 @@ s_nand_saveexec_b64 s[0:1], 0x3f717273
 // GFX12: s_nand_saveexec_b64 s[0:1], 0x3f717273  ; encoding: [0xff,0x27,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_nand_saveexec_b64 s[0:1], 0xaf123456
-// GFX1200: s_nand_saveexec_b64 s[0:1], 0xaf123456  ; encoding: [0xff,0x27,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_nand_saveexec_b64 s[0:1], 0xaf123456  ; encoding: [0xfe,0x27,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_nand_saveexec_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x27,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_nand_saveexec_b64 s[0:1], 0xaf123456  ; encoding: [0xff,0x27,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_nor_saveexec_b64 s[0:1], s[2:3]
 // GFX12: s_nor_saveexec_b64 s[0:1], s[2:3]       ; encoding: [0x02,0x29,0x80,0xbe]
@@ -2539,9 +2507,7 @@ s_nor_saveexec_b64 s[0:1], 0x3f717273
 // GFX12: s_nor_saveexec_b64 s[0:1], 0x3f717273   ; encoding: [0xff,0x29,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_nor_saveexec_b64 s[0:1], 0xaf123456
-// GFX1200: s_nor_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xff,0x29,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_nor_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xfe,0x29,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_nor_saveexec_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x29,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_nor_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xff,0x29,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_xnor_saveexec_b64 s[0:1], s[2:3]
 // GFX12: s_xnor_saveexec_b64 s[0:1], s[2:3]      ; encoding: [0x02,0x2b,0x80,0xbe]
@@ -2580,9 +2546,7 @@ s_xnor_saveexec_b64 s[0:1], 0x3f717273
 // GFX12: s_xnor_saveexec_b64 s[0:1], 0x3f717273  ; encoding: [0xff,0x2b,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_xnor_saveexec_b64 s[0:1], 0xaf123456
-// GFX1200: s_xnor_saveexec_b64 s[0:1], 0xaf123456  ; encoding: [0xff,0x2b,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_xnor_saveexec_b64 s[0:1], 0xaf123456  ; encoding: [0xfe,0x2b,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_xnor_saveexec_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x2b,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_xnor_saveexec_b64 s[0:1], 0xaf123456  ; encoding: [0xff,0x2b,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_quadmask_b32 s0, s1
 // GFX12: s_quadmask_b32 s0, s1                   ; encoding: [0x01,0x1a,0x80,0xbe]
@@ -2684,9 +2648,7 @@ s_quadmask_b64 s[0:1], 0x3f717273
 // GFX12: s_quadmask_b64 s[0:1], 0x3f717273       ; encoding: [0xff,0x1b,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_quadmask_b64 s[0:1], 0xaf123456
-// GFX1200: s_quadmask_b64 s[0:1], 0xaf123456       ; encoding: [0xff,0x1b,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_quadmask_b64 s[0:1], 0xaf123456       ; encoding: [0xfe,0x1b,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_quadmask_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x1b,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_quadmask_b64 s[0:1], 0xaf123456       ; encoding: [0xff,0x1b,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_movrels_b32 s0, s1
 // GFX12: s_movrels_b32 s0, s1                    ; encoding: [0x01,0x40,0x80,0xbe]
@@ -2830,9 +2792,7 @@ s_movreld_b64 s[0:1], 0x3f717273
 // GFX12: s_movreld_b64 s[0:1], 0x3f717273        ; encoding: [0xff,0x43,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_movreld_b64 s[0:1], 0xaf123456
-// GFX1200: s_movreld_b64 s[0:1], 0xaf123456        ; encoding: [0xff,0x43,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_movreld_b64 s[0:1], 0xaf123456        ; encoding: [0xfe,0x43,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_movreld_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x43,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_movreld_b64 s[0:1], 0xaf123456        ; encoding: [0xff,0x43,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_abs_i32 s0, s1
 // GFX12: s_abs_i32 s0, s1                        ; encoding: [0x01,0x15,0x80,0xbe]
@@ -2931,9 +2891,7 @@ s_andn1_saveexec_b64 s[0:1], 0x3f717273
 // GFX12: s_and_not0_saveexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x2d,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_andn1_saveexec_b64 s[0:1], 0xaf123456
-// GFX1200: s_and_not0_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x2d,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_not0_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xfe,0x2d,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_not0_saveexec_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x2d,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_not0_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x2d,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_orn1_saveexec_b64 s[0:1], s[2:3]
 // GFX12: s_or_not0_saveexec_b64 s[0:1], s[2:3]   ; encoding: [0x02,0x2f,0x80,0xbe]
@@ -2972,9 +2930,7 @@ s_orn1_saveexec_b64 s[0:1], 0x3f717273
 // GFX12: s_or_not0_saveexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x2f,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_orn1_saveexec_b64 s[0:1], 0xaf123456
-// GFX1200: s_or_not0_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x2f,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_or_not0_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xfe,0x2f,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_or_not0_saveexec_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x2f,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_or_not0_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x2f,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_andn1_wrexec_b64 s[0:1], s[2:3]
 // GFX12: s_and_not0_wrexec_b64 s[0:1], s[2:3]    ; encoding: [0x02,0x35,0x80,0xbe]
@@ -3013,9 +2969,7 @@ s_andn1_wrexec_b64 s[0:1], 0x3f717273
 // GFX12: s_and_not0_wrexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x35,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_andn1_wrexec_b64 s[0:1], 0xaf123456
-// GFX1200: s_and_not0_wrexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x35,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_not0_wrexec_b64 s[0:1], 0xaf123456 ; encoding: [0xfe,0x35,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_not0_wrexec_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x35,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_not0_wrexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x35,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_andn2_wrexec_b64 s[0:1], s[2:3]
 // GFX12: s_and_not1_wrexec_b64 s[0:1], s[2:3]    ; encoding: [0x02,0x37,0x80,0xbe]
@@ -3054,9 +3008,7 @@ s_andn2_wrexec_b64 s[0:1], 0x3f717273
 // GFX12: s_and_not1_wrexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x37,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_andn2_wrexec_b64 s[0:1], 0xaf123456
-// GFX1200: s_and_not1_wrexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x37,0x80,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_not1_wrexec_b64 s[0:1], 0xaf123456 ; encoding: [0xfe,0x37,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_not1_wrexec_b64 s[0:1], lit64(0xaf123456) ; encoding: [0xfe,0x37,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_not1_wrexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x37,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 s_bitreplicate_b64_b32 s[0:1], s2
 // GFX12: s_bitreplicate_b64_b32 s[0:1], s2       ; encoding: [0x02,0x14,0x80,0xbe]
@@ -3095,66 +3047,6 @@ s_bitreplicate_b64_b32 s[0:1], 0
 // GFX12: s_bitreplicate_b64_b32 s[0:1], 0        ; encoding: [0x80,0x14,0x80,0xbe]
 
 s_bitreplicate_b64_b32 s[0:1], -1
-// GFX12: s_bitreplicate_b64_b32 s[0:1], -1       ; encoding: [0xc1,0x14,0x80,0xbe]
-
-s_bitreplicate_b64_b32 s[0:1], 0.5
-// GFX12: s_bitreplicate_b64_b32 s[0:1], 0.5      ; encoding: [0xf0,0x14,0x80,0xbe]
-
-s_bitreplicate_b64_b32 s[0:1], -4.0
-// GFX12: s_bitreplicate_b64_b32 s[0:1], -4.0     ; encoding: [0xf7,0x14,0x80,0xbe]
-
-s_bitreplicate_b64_b32 s[0:1], 0x3f717273
-// GFX12: s_bitreplicate_b64_b32 s[0:1], 0x3f717273 ; encoding: [0xff,0x14,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-s_bitreplicate_b64_b32 s[0:1], 0xaf123456
-// GFX12: s_bitreplicate_b64_b32 s[0:1], 0xaf123456 ; encoding: [0xff,0x14,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-s_and_saveexec_b32 s0, s1
-// GFX12: s_and_saveexec_b32 s0, s1               ; encoding: [0x01,0x20,0x80,0xbe]
-
-s_and_saveexec_b32 s105, s104
-// GFX12: s_and_saveexec_b32 s105, s104           ; encoding: [0x68,0x20,0xe9,0xbe]
-
-s_and_saveexec_b32 s0, s104
-// GFX12: s_and_saveexec_b32 s0, s104             ; encoding: [0x68,0x20,0x80,0xbe]
-
-s_and_saveexec_b32 s105, s1
-// GFX12: s_and_saveexec_b32 s105, s1             ; encoding: [0x01,0x20,0xe9,0xbe]
-
-s_and_saveexec_b32 vcc_lo, s1
-// GFX12: s_and_saveexec_b32 vcc_lo, s1           ; encoding: [0x01,0x20,0xea,0xbe]
-
-s_and_saveexec_b32 vcc_hi, s1
-// GFX12: s_and_saveexec_b32 vcc_hi, s1           ; encoding: [0x01,0x20,0xeb,0xbe]
-
-s_and_saveexec_b32 s0, exec_lo
-// GFX12: s_and_saveexec_b32 s0, exec_lo          ; encoding: [0x7e,0x20,0x80,0xbe]
-
-s_and_saveexec_b32 s0, exec_hi
-// GFX12: s_and_saveexec_b32 s0, exec_hi          ; encoding: [0x7f,0x20,0x80,0xbe]
-
-s_and_saveexec_b32 s0, vcc_lo
-// GFX12: s_and_saveexec_b32 s0, vcc_lo           ; encoding: [0x6a,0x20,0x80,0xbe]
-
-s_and_saveexec_b32 s0, vcc_hi
-// GFX12: s_and_saveexec_b32 s0, vcc_hi           ; encoding: [0x6b,0x20,0x80,0xbe]
-
-s_and_saveexec_b32 s0, m0
-// GFX12: s_and_saveexec_b32 s0, m0               ; encoding: [0x7d,0x20,0x80,0xbe]
-
-s_and_saveexec_b32 s0, 0
-// GFX12: s_and_saveexec_b32 s0, 0                ; encoding: [0x80,0x20,0x80,0xbe]
-
-s_and_saveexec_b32 s0, -1
-// GFX12: s_and_saveexec_b32 s0, -1               ; encoding: [0xc1,0x20,0x80,0xbe]
-
-s_and_saveexec_b32 s0, 0.5
-// GFX12: s_and_saveexec_b32 s0, 0.5              ; encoding: [0xf0,0x20,0x80,0xbe]
-
-s_and_saveexec_b32 s0, -4.0
-// GFX12: s_and_saveexec_b32 s0, -4.0             ; encoding: [0xf7,0x20,0x80,0xbe]
-
-s_and_saveexec_b32 s0, 0x3f717273
 // GFX12: s_and_saveexec_b32 s0, 0x3f717273       ; encoding: [0xff,0x20,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_and_saveexec_b32 s0, 0xaf123456
@@ -3854,9 +3746,7 @@ s_ctz_i32_b64 exec_hi, src_scc
 // GFX12: s_ctz_i32_b64 exec_hi, src_scc          ; encoding: [0xfd,0x09,0xff,0xbe]
 
 s_ctz_i32_b64 null, 0xaf123456
-// GFX1200: s_ctz_i32_b64 null, 0xaf123456          ; encoding: [0xff,0x09,0xfc,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_ctz_i32_b64 null, 0xaf123456          ; encoding: [0xfe,0x09,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_ctz_i32_b64 null, lit64(0xaf123456)   ; encoding: [0xfe,0x09,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_ctz_i32_b64 null, 0xaf123456          ; encoding: [0xff,0x09,0xfc,0xbe,0x56,0x34,0x12,0xaf]
 
 s_and_not1_saveexec_b64 s[10:11], s[2:3]
 // GFX12: s_and_not1_saveexec_b64 s[10:11], s[2:3] ; encoding: [0x02,0x31,0x8a,0xbe]
@@ -3883,9 +3773,7 @@ s_and_not1_saveexec_b64 ttmp[14:15], src_scc
 // GFX12: s_and_not1_saveexec_b64 ttmp[14:15], src_scc ; encoding: [0xfd,0x31,0xfa,0xbe]
 
 s_and_not1_saveexec_b64 null, 0xaf123456
-// GFX1200: s_and_not1_saveexec_b64 null, 0xaf123456 ; encoding: [0xff,0x31,0xfc,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_not1_saveexec_b64 null, 0xaf123456 ; encoding: [0xfe,0x31,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_not1_saveexec_b64 null, lit64(0xaf123456) ; encoding: [0xfe,0x31,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_not1_saveexec_b64 null, 0xaf123456 ; encoding: [0xff,0x31,0xfc,0xbe,0x56,0x34,0x12,0xaf]
 
 s_and_not0_saveexec_b32 s5, s1
 // GFX12: s_and_not0_saveexec_b32 s5, s1          ; encoding: [0x01,0x2c,0x85,0xbe]
@@ -3945,9 +3833,7 @@ s_and_not0_saveexec_b64 ttmp[14:15], src_scc
 // GFX12: s_and_not0_saveexec_b64 ttmp[14:15], src_scc ; encoding: [0xfd,0x2d,0xfa,0xbe]
 
 s_and_not0_saveexec_b64 null, 0xaf123456
-// GFX1200: s_and_not0_saveexec_b64 null, 0xaf123456 ; encoding: [0xff,0x2d,0xfc,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_not0_saveexec_b64 null, 0xaf123456 ; encoding: [0xfe,0x2d,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_not0_saveexec_b64 null, lit64(0xaf123456) ; encoding: [0xfe,0x2d,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_not0_saveexec_b64 null, 0xaf123456 ; encoding: [0xff,0x2d,0xfc,0xbe,0x56,0x34,0x12,0xaf]
 
 s_and_not0_wrexec_b32 s5, s1
 // GFX12: s_and_not0_wrexec_b32 s5, s1            ; encoding: [0x01,0x34,0x85,0xbe]
@@ -4007,9 +3893,7 @@ s_and_not0_wrexec_b64 ttmp[14:15], src_scc
 // GFX12: s_and_not0_wrexec_b64 ttmp[14:15], src_scc ; encoding: [0xfd,0x35,0xfa,0xbe]
 
 s_and_not0_wrexec_b64 null, 0xaf123456
-// GFX1200: s_and_not0_wrexec_b64 null, 0xaf123456  ; encoding: [0xff,0x35,0xfc,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_not0_wrexec_b64 null, 0xaf123456  ; encoding: [0xfe,0x35,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_not0_wrexec_b64 null, lit64(0xaf123456) ; encoding: [0xfe,0x35,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_not0_wrexec_b64 null, 0xaf123456  ; encoding: [0xff,0x35,0xfc,0xbe,0x56,0x34,0x12,0xaf]
 
 s_and_not1_saveexec_b32 s5, s1
 // GFX12: s_and_not1_saveexec_b32 s5, s1          ; encoding: [0x01,0x30,0x85,0xbe]
@@ -4102,9 +3986,7 @@ s_and_not1_wrexec_b64 ttmp[14:15], src_scc
 // GFX12: s_and_not1_wrexec_b64 ttmp[14:15], src_scc ; encoding: [0xfd,0x37,0xfa,0xbe]
 
 s_and_not1_wrexec_b64 null, 0xaf123456
-// GFX1200: s_and_not1_wrexec_b64 null, 0xaf123456  ; encoding: [0xff,0x37,0xfc,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_not1_wrexec_b64 null, 0xaf123456  ; encoding: [0xfe,0x37,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_not1_wrexec_b64 null, lit64(0xaf123456) ; encoding: [0xfe,0x37,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_not1_wrexec_b64 null, 0xaf123456  ; encoding: [0xff,0x37,0xfc,0xbe,0x56,0x34,0x12,0xaf]
 
 s_cls_i32 s5, s1
 // GFX12: s_cls_i32 s5, s1                        ; encoding: [0x01,0x0c,0x85,0xbe]
@@ -4173,9 +4055,7 @@ s_cls_i32_i64 exec_hi, src_scc
 // GFX12: s_cls_i32_i64 exec_hi, src_scc          ; encoding: [0xfd,0x0d,0xff,0xbe]
 
 s_cls_i32_i64 null, 0xaf123456
-// GFX1200: s_cls_i32_i64 null, 0xaf123456          ; encoding: [0xff,0x0d,0xfc,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_cls_i32_i64 null, 0xaf123456          ; encoding: [0xfe,0x0d,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_cls_i32_i64 null, lit64(0xaf123456)   ; encoding: [0xfe,0x0d,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_cls_i32_i64 null, 0xaf123456          ; encoding: [0xff,0x0d,0xfc,0xbe,0x56,0x34,0x12,0xaf]
 
 s_clz_i32_u32 s5, s1
 // GFX12: s_clz_i32_u32 s5, s1                    ; encoding: [0x01,0x0a,0x85,0xbe]
@@ -4244,9 +4124,7 @@ s_clz_i32_u64 exec_hi, src_scc
 // GFX12: s_clz_i32_u64 exec_hi, src_scc          ; encoding: [0xfd,0x0b,0xff,0xbe]
 
 s_clz_i32_u64 null, 0xaf123456
-// GFX1200: s_clz_i32_u64 null, 0xaf123456          ; encoding: [0xff,0x0b,0xfc,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_clz_i32_u64 null, 0xaf123456          ; encoding: [0xfe,0x0b,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_clz_i32_u64 null, lit64(0xaf123456)   ; encoding: [0xfe,0x0b,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_clz_i32_u64 null, 0xaf123456          ; encoding: [0xff,0x0b,0xfc,0xbe,0x56,0x34,0x12,0xaf]
 
 s_or_not0_saveexec_b32 s5, s1
 // GFX12: s_or_not0_saveexec_b32 s5, s1           ; encoding: [0x01,0x2e,0x85,0xbe]
@@ -4306,9 +4184,7 @@ s_or_not0_saveexec_b64 ttmp[14:15], src_scc
 // GFX12: s_or_not0_saveexec_b64 ttmp[14:15], src_scc ; encoding: [0xfd,0x2f,0xfa,0xbe]
 
 s_or_not0_saveexec_b64 null, 0xaf123456
-// GFX1200: s_or_not0_saveexec_b64 null, 0xaf123456 ; encoding: [0xff,0x2f,0xfc,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_or_not0_saveexec_b64 null, 0xaf123456 ; encoding: [0xfe,0x2f,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_or_not0_saveexec_b64 null, lit64(0xaf123456) ; encoding: [0xfe,0x2f,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_or_not0_saveexec_b64 null, 0xaf123456 ; encoding: [0xff,0x2f,0xfc,0xbe,0x56,0x34,0x12,0xaf]
 
 s_or_not1_saveexec_b32 s5, s1
 // GFX12: s_or_not1_saveexec_b32 s5, s1           ; encoding: [0x01,0x32,0x85,0xbe]
@@ -4368,6 +4244,7 @@ s_or_not1_saveexec_b64 ttmp[14:15], src_scc
 // GFX12: s_or_not1_saveexec_b64 ttmp[14:15], src_scc ; encoding: [0xfd,0x33,0xfa,0xbe]
 
 s_or_not1_saveexec_b64 null, 0xaf123456
-// GFX1200: s_or_not1_saveexec_b64 null, 0xaf123456 ; encoding: [0xff,0x33,0xfc,0xbe,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_or_not1_saveexec_b64 null, 0xaf123456 ; encoding: [0xfe,0x33,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_or_not1_saveexec_b64 null, lit64(0xaf123456) ; encoding: [0xfe,0x33,0xfc,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_or_not1_saveexec_b64 null, 0xaf123456 ; encoding: [0xff,0x33,0xfc,0xbe,0x56,0x34,0x12,0xaf]
+//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+// GFX1250-ASM: {{.*}}
+// GFX1250-DIS: {{.*}}

>From 436402297c3c2d9338b35016166bab7b0571ac95 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 18:15:08 +0530
Subject: [PATCH 19/55] Update gfx12_asm_sop2.s

---
 llvm/test/MC/AMDGPU/gfx12_asm_sop2.s | 139 ++++++++-------------------
 1 file changed, 40 insertions(+), 99 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_sop2.s b/llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
index 3a24442312af6..1fced42f694a8 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
@@ -55,9 +55,7 @@ s_add_nc_u64 s[0:1], 0x3f717273, s[2:3]
 // GFX12: s_add_nc_u64 s[0:1], 0x3f717273, s[2:3] ; encoding: [0xff,0x02,0x80,0xa9,0x73,0x72,0x71,0x3f]
 
 s_add_nc_u64 s[0:1], 0xaf123456, s[2:3]
-// GFX1200: s_add_nc_u64 s[0:1], 0xaf123456, s[2:3] ; encoding: [0xff,0x02,0x80,0xa9,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_add_nc_u64 s[0:1], 0xaf123456, s[2:3] ; encoding: [0xfe,0x02,0x80,0xa9,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_add_nc_u64 s[0:1], lit64(0xaf123456), s[2:3] ; encoding: [0xfe,0x02,0x80,0xa9,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_add_nc_u64 s[0:1], 0xaf123456, s[2:3] ; encoding: [0xff,0x02,0x80,0xa9,0x56,0x34,0x12,0xaf]
 
 s_add_nc_u64 s[0:1], s[2:3], exec
 // GFX12: s_add_nc_u64 s[0:1], s[2:3], exec       ; encoding: [0x02,0x7e,0x80,0xa9]
@@ -81,9 +79,7 @@ s_add_nc_u64 s[0:1], s[2:3], 0x3f717273
 // GFX12: s_add_nc_u64 s[0:1], s[2:3], 0x3f717273 ; encoding: [0x02,0xff,0x80,0xa9,0x73,0x72,0x71,0x3f]
 
 s_add_nc_u64 s[0:1], s[2:3], 0xaf123456
-// GFX1200: s_add_nc_u64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0xa9,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_add_nc_u64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xfe,0x80,0xa9,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_add_nc_u64 s[0:1], s[2:3], lit64(0xaf123456) ; encoding: [0x02,0xfe,0x80,0xa9,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_add_nc_u64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0xa9,0x56,0x34,0x12,0xaf]
 
 s_sub_nc_u64 s[0:1], s[2:3], s[4:5]
 // GFX12: s_sub_nc_u64 s[0:1], s[2:3], s[4:5]     ; encoding: [0x02,0x04,0x00,0xaa]
@@ -137,9 +133,7 @@ s_sub_nc_u64 s[0:1], 0x3f717273, s[2:3]
 // GFX12: s_sub_nc_u64 s[0:1], 0x3f717273, s[2:3] ; encoding: [0xff,0x02,0x00,0xaa,0x73,0x72,0x71,0x3f]
 
 s_sub_nc_u64 s[0:1], 0xaf123456, s[2:3]
-// GFX1200: s_sub_nc_u64 s[0:1], 0xaf123456, s[2:3] ; encoding: [0xff,0x02,0x00,0xaa,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_sub_nc_u64 s[0:1], 0xaf123456, s[2:3] ; encoding: [0xfe,0x02,0x00,0xaa,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_sub_nc_u64 s[0:1], lit64(0xaf123456), s[2:3] ; encoding: [0xfe,0x02,0x00,0xaa,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_sub_nc_u64 s[0:1], 0xaf123456, s[2:3] ; encoding: [0xff,0x02,0x00,0xaa,0x56,0x34,0x12,0xaf]
 
 s_sub_nc_u64 s[0:1], s[2:3], exec
 // GFX12: s_sub_nc_u64 s[0:1], s[2:3], exec       ; encoding: [0x02,0x7e,0x00,0xaa]
@@ -163,9 +157,7 @@ s_sub_nc_u64 s[0:1], s[2:3], 0x3f717273
 // GFX12: s_sub_nc_u64 s[0:1], s[2:3], 0x3f717273 ; encoding: [0x02,0xff,0x00,0xaa,0x73,0x72,0x71,0x3f]
 
 s_sub_nc_u64 s[0:1], s[2:3], 0xaf123456
-// GFX1200: s_sub_nc_u64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x00,0xaa,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_sub_nc_u64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xfe,0x00,0xaa,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_sub_nc_u64 s[0:1], s[2:3], lit64(0xaf123456) ; encoding: [0x02,0xfe,0x00,0xaa,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_sub_nc_u64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x00,0xaa,0x56,0x34,0x12,0xaf]
 
 s_mul_u64 s[0:1], s[2:3], s[4:5]
 // GFX12: s_mul_u64 s[0:1], s[2:3], s[4:5]        ; encoding: [0x02,0x04,0x80,0xaa]
@@ -219,9 +211,7 @@ s_mul_u64 s[0:1], 0x3f717273, s[2:3]
 // GFX12: s_mul_u64 s[0:1], 0x3f717273, s[2:3]    ; encoding: [0xff,0x02,0x80,0xaa,0x73,0x72,0x71,0x3f]
 
 s_mul_u64 s[0:1], 0xaf123456, s[2:3]
-// GFX1200: s_mul_u64 s[0:1], 0xaf123456, s[2:3]    ; encoding: [0xff,0x02,0x80,0xaa,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_mul_u64 s[0:1], 0xaf123456, s[2:3]    ; encoding: [0xfe,0x02,0x80,0xaa,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_mul_u64 s[0:1], lit64(0xaf123456), s[2:3] ; encoding: [0xfe,0x02,0x80,0xaa,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_mul_u64 s[0:1], 0xaf123456, s[2:3]    ; encoding: [0xff,0x02,0x80,0xaa,0x56,0x34,0x12,0xaf]
 
 s_mul_u64 s[0:1], s[2:3], exec
 // GFX12: s_mul_u64 s[0:1], s[2:3], exec          ; encoding: [0x02,0x7e,0x80,0xaa]
@@ -245,9 +235,7 @@ s_mul_u64 s[0:1], s[2:3], 0x3f717273
 // GFX12: s_mul_u64 s[0:1], s[2:3], 0x3f717273    ; encoding: [0x02,0xff,0x80,0xaa,0x73,0x72,0x71,0x3f]
 
 s_mul_u64 s[0:1], s[2:3], 0xaf123456
-// GFX1200: s_mul_u64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0xaa,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_mul_u64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xfe,0x80,0xaa,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_mul_u64 s[0:1], s[2:3], lit64(0xaf123456) ; encoding: [0x02,0xfe,0x80,0xaa,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_mul_u64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0xaa,0x56,0x34,0x12,0xaf]
 
 s_add_f32 s5, s1, s2
 // GFX12: s_add_f32 s5, s1, s2                    ; encoding: [0x01,0x02,0x05,0xa0]
@@ -2364,9 +2352,7 @@ s_cselect_b64 s[0:1], 0x3f717273, s[4:5]
 // GFX12: s_cselect_b64 s[0:1], 0x3f717273, s[4:5] ; encoding: [0xff,0x04,0x80,0x98,0x73,0x72,0x71,0x3f]
 
 s_cselect_b64 s[0:1], 0xaf123456, s[4:5]
-// GFX1200: s_cselect_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xff,0x04,0x80,0x98,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_cselect_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xfe,0x04,0x80,0x98,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_cselect_b64 s[0:1], lit64(0xaf123456), s[4:5] ; encoding: [0xfe,0x04,0x80,0x98,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_cselect_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xff,0x04,0x80,0x98,0x56,0x34,0x12,0xaf]
 
 s_cselect_b64 s[0:1], s[2:3], exec
 // GFX12: s_cselect_b64 s[0:1], s[2:3], exec      ; encoding: [0x02,0x7e,0x80,0x98]
@@ -2390,9 +2376,7 @@ s_cselect_b64 s[0:1], s[2:3], 0x3f717273
 // GFX12: s_cselect_b64 s[0:1], s[2:3], 0x3f717273 ; encoding: [0x02,0xff,0x80,0x98,0x73,0x72,0x71,0x3f]
 
 s_cselect_b64 s[0:1], s[2:3], 0xaf123456
-// GFX1200: s_cselect_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0x98,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_cselect_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xfe,0x80,0x98,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_cselect_b64 s[0:1], s[2:3], lit64(0xaf123456) ; encoding: [0x02,0xfe,0x80,0x98,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_cselect_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0x98,0x56,0x34,0x12,0xaf]
 
 s_and_b32 s0, s1, s2
 // GFX12: s_and_b32 s0, s1, s2                    ; encoding: [0x01,0x02,0x00,0x8b]
@@ -2560,9 +2544,7 @@ s_and_b64 s[0:1], 0x3f717273, s[4:5]
 // GFX12: s_and_b64 s[0:1], 0x3f717273, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8b,0x73,0x72,0x71,0x3f]
 
 s_and_b64 s[0:1], 0xaf123456, s[4:5]
-// GFX1200: s_and_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8b,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xfe,0x04,0x80,0x8b,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_b64 s[0:1], lit64(0xaf123456), s[4:5] ; encoding: [0xfe,0x04,0x80,0x8b,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8b,0x56,0x34,0x12,0xaf]
 
 s_and_b64 s[0:1], s[2:3], exec
 // GFX12: s_and_b64 s[0:1], s[2:3], exec          ; encoding: [0x02,0x7e,0x80,0x8b]
@@ -2586,9 +2568,7 @@ s_and_b64 s[0:1], s[2:3], 0x3f717273
 // GFX12: s_and_b64 s[0:1], s[2:3], 0x3f717273    ; encoding: [0x02,0xff,0x80,0x8b,0x73,0x72,0x71,0x3f]
 
 s_and_b64 s[0:1], s[2:3], 0xaf123456
-// GFX1200: s_and_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0x8b,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xfe,0x80,0x8b,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_b64 s[0:1], s[2:3], lit64(0xaf123456) ; encoding: [0x02,0xfe,0x80,0x8b,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0x8b,0x56,0x34,0x12,0xaf]
 
 s_or_b32 s0, s1, s2
 // GFX12: s_or_b32 s0, s1, s2                     ; encoding: [0x01,0x02,0x00,0x8c]
@@ -2747,9 +2727,7 @@ s_or_b64 s[0:1], 0x3f717273, s[4:5]
 // GFX12: s_or_b64 s[0:1], 0x3f717273, s[4:5]     ; encoding: [0xff,0x04,0x80,0x8c,0x73,0x72,0x71,0x3f]
 
 s_or_b64 s[0:1], 0xaf123456, s[4:5]
-// GFX1200: s_or_b64 s[0:1], 0xaf123456, s[4:5]     ; encoding: [0xff,0x04,0x80,0x8c,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_or_b64 s[0:1], 0xaf123456, s[4:5]     ; encoding: [0xfe,0x04,0x80,0x8c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_or_b64 s[0:1], lit64(0xaf123456), s[4:5] ; encoding: [0xfe,0x04,0x80,0x8c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_or_b64 s[0:1], 0xaf123456, s[4:5]     ; encoding: [0xff,0x04,0x80,0x8c,0x56,0x34,0x12,0xaf]
 
 s_or_b64 s[0:1], s[2:3], exec
 // GFX12: s_or_b64 s[0:1], s[2:3], exec           ; encoding: [0x02,0x7e,0x80,0x8c]
@@ -2773,9 +2751,7 @@ s_or_b64 s[0:1], s[2:3], 0x3f717273
 // GFX12: s_or_b64 s[0:1], s[2:3], 0x3f717273     ; encoding: [0x02,0xff,0x80,0x8c,0x73,0x72,0x71,0x3f]
 
 s_or_b64 s[0:1], s[2:3], 0xaf123456
-// GFX1200: s_or_b64 s[0:1], s[2:3], 0xaf123456     ; encoding: [0x02,0xff,0x80,0x8c,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_or_b64 s[0:1], s[2:3], 0xaf123456     ; encoding: [0x02,0xfe,0x80,0x8c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_or_b64 s[0:1], s[2:3], lit64(0xaf123456) ; encoding: [0x02,0xfe,0x80,0x8c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_or_b64 s[0:1], s[2:3], 0xaf123456     ; encoding: [0x02,0xff,0x80,0x8c,0x56,0x34,0x12,0xaf]
 
 s_xor_b32 s0, s1, s2
 // GFX12: s_xor_b32 s0, s1, s2                    ; encoding: [0x01,0x02,0x00,0x8d]
@@ -2934,9 +2910,7 @@ s_xor_b64 s[0:1], 0x3f717273, s[4:5]
 // GFX12: s_xor_b64 s[0:1], 0x3f717273, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8d,0x73,0x72,0x71,0x3f]
 
 s_xor_b64 s[0:1], 0xaf123456, s[4:5]
-// GFX1200: s_xor_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8d,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_xor_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xfe,0x04,0x80,0x8d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_xor_b64 s[0:1], lit64(0xaf123456), s[4:5] ; encoding: [0xfe,0x04,0x80,0x8d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_xor_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8d,0x56,0x34,0x12,0xaf]
 
 s_xor_b64 s[0:1], s[2:3], exec
 // GFX12: s_xor_b64 s[0:1], s[2:3], exec          ; encoding: [0x02,0x7e,0x80,0x8d]
@@ -2960,9 +2934,7 @@ s_xor_b64 s[0:1], s[2:3], 0x3f717273
 // GFX12: s_xor_b64 s[0:1], s[2:3], 0x3f717273    ; encoding: [0x02,0xff,0x80,0x8d,0x73,0x72,0x71,0x3f]
 
 s_xor_b64 s[0:1], s[2:3], 0xaf123456
-// GFX1200: s_xor_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0x8d,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_xor_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xfe,0x80,0x8d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_xor_b64 s[0:1], s[2:3], lit64(0xaf123456) ; encoding: [0x02,0xfe,0x80,0x8d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_xor_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0x8d,0x56,0x34,0x12,0xaf]
 
 s_andn2_b32 s0, s1, s2
 // GFX12: s_and_not1_b32 s0, s1, s2               ; encoding: [0x01,0x02,0x00,0x91]
@@ -3121,9 +3093,7 @@ s_andn2_b64 s[0:1], 0x3f717273, s[4:5]
 // GFX12: s_and_not1_b64 s[0:1], 0x3f717273, s[4:5] ; encoding: [0xff,0x04,0x80,0x91,0x73,0x72,0x71,0x3f]
 
 s_andn2_b64 s[0:1], 0xaf123456, s[4:5]
-// GFX1200: s_and_not1_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xff,0x04,0x80,0x91,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_not1_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xfe,0x04,0x80,0x91,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_not1_b64 s[0:1], lit64(0xaf123456), s[4:5] ; encoding: [0xfe,0x04,0x80,0x91,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_not1_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xff,0x04,0x80,0x91,0x56,0x34,0x12,0xaf]
 
 s_andn2_b64 s[0:1], s[2:3], exec
 // GFX12: s_and_not1_b64 s[0:1], s[2:3], exec     ; encoding: [0x02,0x7e,0x80,0x91]
@@ -3147,9 +3117,7 @@ s_andn2_b64 s[0:1], s[2:3], 0x3f717273
 // GFX12: s_and_not1_b64 s[0:1], s[2:3], 0x3f717273 ; encoding: [0x02,0xff,0x80,0x91,0x73,0x72,0x71,0x3f]
 
 s_andn2_b64 s[0:1], s[2:3], 0xaf123456
-// GFX1200: s_and_not1_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0x91,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_not1_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xfe,0x80,0x91,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_not1_b64 s[0:1], s[2:3], lit64(0xaf123456) ; encoding: [0x02,0xfe,0x80,0x91,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_not1_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0x91,0x56,0x34,0x12,0xaf]
 
 s_orn2_b32 s0, s1, s2
 // GFX12: s_or_not1_b32 s0, s1, s2                ; encoding: [0x01,0x02,0x00,0x92]
@@ -3308,9 +3276,7 @@ s_orn2_b64 s[0:1], 0x3f717273, s[4:5]
 // GFX12: s_or_not1_b64 s[0:1], 0x3f717273, s[4:5] ; encoding: [0xff,0x04,0x80,0x92,0x73,0x72,0x71,0x3f]
 
 s_orn2_b64 s[0:1], 0xaf123456, s[4:5]
-// GFX1200: s_or_not1_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xff,0x04,0x80,0x92,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_or_not1_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xfe,0x04,0x80,0x92,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_or_not1_b64 s[0:1], lit64(0xaf123456), s[4:5] ; encoding: [0xfe,0x04,0x80,0x92,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_or_not1_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xff,0x04,0x80,0x92,0x56,0x34,0x12,0xaf]
 
 s_orn2_b64 s[0:1], s[2:3], exec
 // GFX12: s_or_not1_b64 s[0:1], s[2:3], exec      ; encoding: [0x02,0x7e,0x80,0x92]
@@ -3334,9 +3300,7 @@ s_orn2_b64 s[0:1], s[2:3], 0x3f717273
 // GFX12: s_or_not1_b64 s[0:1], s[2:3], 0x3f717273 ; encoding: [0x02,0xff,0x80,0x92,0x73,0x72,0x71,0x3f]
 
 s_orn2_b64 s[0:1], s[2:3], 0xaf123456
-// GFX1200: s_or_not1_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0x92,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_or_not1_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xfe,0x80,0x92,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_or_not1_b64 s[0:1], s[2:3], lit64(0xaf123456) ; encoding: [0x02,0xfe,0x80,0x92,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_or_not1_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0x92,0x56,0x34,0x12,0xaf]
 
 s_nand_b32 s0, s1, s2
 // GFX12: s_nand_b32 s0, s1, s2                   ; encoding: [0x01,0x02,0x00,0x8e]
@@ -3495,9 +3459,7 @@ s_nand_b64 s[0:1], 0x3f717273, s[4:5]
 // GFX12: s_nand_b64 s[0:1], 0x3f717273, s[4:5]   ; encoding: [0xff,0x04,0x80,0x8e,0x73,0x72,0x71,0x3f]
 
 s_nand_b64 s[0:1], 0xaf123456, s[4:5]
-// GFX1200: s_nand_b64 s[0:1], 0xaf123456, s[4:5]   ; encoding: [0xff,0x04,0x80,0x8e,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_nand_b64 s[0:1], 0xaf123456, s[4:5]   ; encoding: [0xfe,0x04,0x80,0x8e,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_nand_b64 s[0:1], lit64(0xaf123456), s[4:5] ; encoding: [0xfe,0x04,0x80,0x8e,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_nand_b64 s[0:1], 0xaf123456, s[4:5]   ; encoding: [0xff,0x04,0x80,0x8e,0x56,0x34,0x12,0xaf]
 
 s_nand_b64 s[0:1], s[2:3], exec
 // GFX12: s_nand_b64 s[0:1], s[2:3], exec         ; encoding: [0x02,0x7e,0x80,0x8e]
@@ -3521,9 +3483,7 @@ s_nand_b64 s[0:1], s[2:3], 0x3f717273
 // GFX12: s_nand_b64 s[0:1], s[2:3], 0x3f717273   ; encoding: [0x02,0xff,0x80,0x8e,0x73,0x72,0x71,0x3f]
 
 s_nand_b64 s[0:1], s[2:3], 0xaf123456
-// GFX1200: s_nand_b64 s[0:1], s[2:3], 0xaf123456   ; encoding: [0x02,0xff,0x80,0x8e,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_nand_b64 s[0:1], s[2:3], 0xaf123456   ; encoding: [0x02,0xfe,0x80,0x8e,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_nand_b64 s[0:1], s[2:3], lit64(0xaf123456) ; encoding: [0x02,0xfe,0x80,0x8e,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_nand_b64 s[0:1], s[2:3], 0xaf123456   ; encoding: [0x02,0xff,0x80,0x8e,0x56,0x34,0x12,0xaf]
 
 s_nor_b32 s0, s1, s2
 // GFX12: s_nor_b32 s0, s1, s2                    ; encoding: [0x01,0x02,0x00,0x8f]
@@ -3682,9 +3642,7 @@ s_nor_b64 s[0:1], 0x3f717273, s[4:5]
 // GFX12: s_nor_b64 s[0:1], 0x3f717273, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8f,0x73,0x72,0x71,0x3f]
 
 s_nor_b64 s[0:1], 0xaf123456, s[4:5]
-// GFX1200: s_nor_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8f,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_nor_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xfe,0x04,0x80,0x8f,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_nor_b64 s[0:1], lit64(0xaf123456), s[4:5] ; encoding: [0xfe,0x04,0x80,0x8f,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_nor_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8f,0x56,0x34,0x12,0xaf]
 
 s_nor_b64 s[0:1], s[2:3], exec
 // GFX12: s_nor_b64 s[0:1], s[2:3], exec          ; encoding: [0x02,0x7e,0x80,0x8f]
@@ -3708,9 +3666,7 @@ s_nor_b64 s[0:1], s[2:3], 0x3f717273
 // GFX12: s_nor_b64 s[0:1], s[2:3], 0x3f717273    ; encoding: [0x02,0xff,0x80,0x8f,0x73,0x72,0x71,0x3f]
 
 s_nor_b64 s[0:1], s[2:3], 0xaf123456
-// GFX1200: s_nor_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0x8f,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_nor_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xfe,0x80,0x8f,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_nor_b64 s[0:1], s[2:3], lit64(0xaf123456) ; encoding: [0x02,0xfe,0x80,0x8f,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_nor_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0x8f,0x56,0x34,0x12,0xaf]
 
 s_xnor_b32 s0, s1, s2
 // GFX12: s_xnor_b32 s0, s1, s2                   ; encoding: [0x01,0x02,0x00,0x90]
@@ -3869,9 +3825,7 @@ s_xnor_b64 s[0:1], 0x3f717273, s[4:5]
 // GFX12: s_xnor_b64 s[0:1], 0x3f717273, s[4:5]   ; encoding: [0xff,0x04,0x80,0x90,0x73,0x72,0x71,0x3f]
 
 s_xnor_b64 s[0:1], 0xaf123456, s[4:5]
-// GFX1200: s_xnor_b64 s[0:1], 0xaf123456, s[4:5]   ; encoding: [0xff,0x04,0x80,0x90,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_xnor_b64 s[0:1], 0xaf123456, s[4:5]   ; encoding: [0xfe,0x04,0x80,0x90,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_xnor_b64 s[0:1], lit64(0xaf123456), s[4:5] ; encoding: [0xfe,0x04,0x80,0x90,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_xnor_b64 s[0:1], 0xaf123456, s[4:5]   ; encoding: [0xff,0x04,0x80,0x90,0x56,0x34,0x12,0xaf]
 
 s_xnor_b64 s[0:1], s[2:3], exec
 // GFX12: s_xnor_b64 s[0:1], s[2:3], exec         ; encoding: [0x02,0x7e,0x80,0x90]
@@ -3895,9 +3849,7 @@ s_xnor_b64 s[0:1], s[2:3], 0x3f717273
 // GFX12: s_xnor_b64 s[0:1], s[2:3], 0x3f717273   ; encoding: [0x02,0xff,0x80,0x90,0x73,0x72,0x71,0x3f]
 
 s_xnor_b64 s[0:1], s[2:3], 0xaf123456
-// GFX1200: s_xnor_b64 s[0:1], s[2:3], 0xaf123456   ; encoding: [0x02,0xff,0x80,0x90,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_xnor_b64 s[0:1], s[2:3], 0xaf123456   ; encoding: [0x02,0xfe,0x80,0x90,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_xnor_b64 s[0:1], s[2:3], lit64(0xaf123456) ; encoding: [0x02,0xfe,0x80,0x90,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_xnor_b64 s[0:1], s[2:3], 0xaf123456   ; encoding: [0x02,0xff,0x80,0x90,0x56,0x34,0x12,0xaf]
 
 s_lshl_b32 s0, s1, s2
 // GFX12: s_lshl_b32 s0, s1, s2                   ; encoding: [0x01,0x02,0x00,0x84]
@@ -4056,9 +4008,7 @@ s_lshl_b64 s[0:1], 0x3f717273, s4
 // GFX12: s_lshl_b64 s[0:1], 0x3f717273, s4       ; encoding: [0xff,0x04,0x80,0x84,0x73,0x72,0x71,0x3f]
 
 s_lshl_b64 s[0:1], 0xaf123456, s4
-// GFX1200: s_lshl_b64 s[0:1], 0xaf123456, s4       ; encoding: [0xff,0x04,0x80,0x84,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_lshl_b64 s[0:1], 0xaf123456, s4       ; encoding: [0xfe,0x04,0x80,0x84,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_lshl_b64 s[0:1], lit64(0xaf123456), s4 ; encoding: [0xfe,0x04,0x80,0x84,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_lshl_b64 s[0:1], 0xaf123456, s4       ; encoding: [0xff,0x04,0x80,0x84,0x56,0x34,0x12,0xaf]
 
 s_lshl_b64 s[0:1], s[2:3], exec_lo
 // GFX12: s_lshl_b64 s[0:1], s[2:3], exec_lo      ; encoding: [0x02,0x7e,0x80,0x84]
@@ -4241,9 +4191,7 @@ s_lshr_b64 s[0:1], 0x3f717273, s4
 // GFX12: s_lshr_b64 s[0:1], 0x3f717273, s4       ; encoding: [0xff,0x04,0x80,0x85,0x73,0x72,0x71,0x3f]
 
 s_lshr_b64 s[0:1], 0xaf123456, s4
-// GFX1200: s_lshr_b64 s[0:1], 0xaf123456, s4       ; encoding: [0xff,0x04,0x80,0x85,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_lshr_b64 s[0:1], 0xaf123456, s4       ; encoding: [0xfe,0x04,0x80,0x85,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_lshr_b64 s[0:1], lit64(0xaf123456), s4 ; encoding: [0xfe,0x04,0x80,0x85,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_lshr_b64 s[0:1], 0xaf123456, s4       ; encoding: [0xff,0x04,0x80,0x85,0x56,0x34,0x12,0xaf]
 
 s_lshr_b64 s[0:1], s[2:3], exec_lo
 // GFX12: s_lshr_b64 s[0:1], s[2:3], exec_lo      ; encoding: [0x02,0x7e,0x80,0x85]
@@ -4426,9 +4374,7 @@ s_ashr_i64 s[0:1], 0x3f717273, s4
 // GFX12: s_ashr_i64 s[0:1], 0x3f717273, s4       ; encoding: [0xff,0x04,0x80,0x86,0x73,0x72,0x71,0x3f]
 
 s_ashr_i64 s[0:1], 0xaf123456, s4
-// GFX1200: s_ashr_i64 s[0:1], 0xaf123456, s4       ; encoding: [0xff,0x04,0x80,0x86,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_ashr_i64 s[0:1], 0xaf123456, s4       ; encoding: [0xfe,0x04,0x80,0x86,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_ashr_i64 s[0:1], lit64(0xaf123456), s4 ; encoding: [0xfe,0x04,0x80,0x86,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_ashr_i64 s[0:1], 0xaf123456, s4       ; encoding: [0xff,0x04,0x80,0x86,0x56,0x34,0x12,0xaf]
 
 s_ashr_i64 s[0:1], s[2:3], exec_lo
 // GFX12: s_ashr_i64 s[0:1], s[2:3], exec_lo      ; encoding: [0x02,0x7e,0x80,0x86]
@@ -5022,9 +4968,7 @@ s_bfe_u64 s[0:1], 0x3f717273, s4
 // GFX12: s_bfe_u64 s[0:1], 0x3f717273, s4        ; encoding: [0xff,0x04,0x00,0x94,0x73,0x72,0x71,0x3f]
 
 s_bfe_u64 s[0:1], 0xaf123456, s4
-// GFX1200: s_bfe_u64 s[0:1], 0xaf123456, s4        ; encoding: [0xff,0x04,0x00,0x94,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_bfe_u64 s[0:1], 0xaf123456, s4        ; encoding: [0xfe,0x04,0x00,0x94,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_bfe_u64 s[0:1], lit64(0xaf123456), s4 ; encoding: [0xfe,0x04,0x00,0x94,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_bfe_u64 s[0:1], 0xaf123456, s4        ; encoding: [0xff,0x04,0x00,0x94,0x56,0x34,0x12,0xaf]
 
 s_bfe_u64 s[0:1], s[2:3], exec_lo
 // GFX12: s_bfe_u64 s[0:1], s[2:3], exec_lo       ; encoding: [0x02,0x7e,0x00,0x94]
@@ -5102,9 +5046,7 @@ s_bfe_i64 s[0:1], 0x3f717273, s4
 // GFX12: s_bfe_i64 s[0:1], 0x3f717273, s4        ; encoding: [0xff,0x04,0x80,0x94,0x73,0x72,0x71,0x3f]
 
 s_bfe_i64 s[0:1], 0xaf123456, s4
-// GFX1200: s_bfe_i64 s[0:1], 0xaf123456, s4        ; encoding: [0xff,0x04,0x80,0x94,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_bfe_i64 s[0:1], 0xaf123456, s4        ; encoding: [0xfe,0x04,0x80,0x94,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_bfe_i64 s[0:1], lit64(0xaf123456), s4 ; encoding: [0xfe,0x04,0x80,0x94,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_bfe_i64 s[0:1], 0xaf123456, s4        ; encoding: [0xff,0x04,0x80,0x94,0x56,0x34,0x12,0xaf]
 
 s_bfe_i64 s[0:1], s[2:3], exec_lo
 // GFX12: s_bfe_i64 s[0:1], s[2:3], exec_lo       ; encoding: [0x02,0x7e,0x80,0x94]
@@ -5433,6 +5375,9 @@ s_lshl2_add_u32 s0, s1, 0
 s_lshl2_add_u32 s0, s1, -1
 // GFX12: s_lshl2_add_u32 s0, s1, -1              ; encoding: [0x01,0xc1,0x80,0x87]
 
+s_lshl2_add_u32 s0, s1, -1
+// GFX12: s_lshl2_add_u32 s0, s1, -1              ; encoding: [0x01,0xc1,0x80,0x87]
+
 s_lshl2_add_u32 s0, s1, 0.5
 // GFX12: s_lshl2_add_u32 s0, s1, 0.5             ; encoding: [0x01,0xf0,0x80,0x87]
 
@@ -6307,9 +6252,7 @@ s_and_not1_b64 s[10:11], vcc, ttmp[14:15]
 // GFX12: s_and_not1_b64 s[10:11], vcc, ttmp[14:15] ; encoding: [0x6a,0x7a,0x8a,0x91]
 
 s_and_not1_b64 s[10:11], ttmp[14:15], 0xaf123456
-// GFX1200: s_and_not1_b64 s[10:11], ttmp[14:15], 0xaf123456 ; encoding: [0x7a,0xff,0x8a,0x91,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_not1_b64 s[10:11], ttmp[14:15], 0xaf123456 ; encoding: [0x7a,0xfe,0x8a,0x91,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_not1_b64 s[10:11], ttmp[14:15], lit64(0xaf123456) ; encoding: [0x7a,0xfe,0x8a,0x91,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_not1_b64 s[10:11], ttmp[14:15], 0xaf123456 ; encoding: [0x7a,0xff,0x8a,0x91,0x56,0x34,0x12,0xaf]
 
 s_and_not1_b64 s[10:11], exec, src_scc
 // GFX12: s_and_not1_b64 s[10:11], exec, src_scc  ; encoding: [0x7e,0xfd,0x8a,0x91]
@@ -6327,9 +6270,7 @@ s_and_not1_b64 exec, src_scc, exec
 // GFX12: s_and_not1_b64 exec, src_scc, exec      ; encoding: [0xfd,0x7e,0xfe,0x91]
 
 s_and_not1_b64 null, 0xaf123456, vcc
-// GFX1200: s_and_not1_b64 null, 0xaf123456, vcc    ; encoding: [0xff,0x6a,0xfc,0x91,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_and_not1_b64 null, 0xaf123456, vcc    ; encoding: [0xfe,0x6a,0xfc,0x91,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_and_not1_b64 null, lit64(0xaf123456), vcc ; encoding: [0xfe,0x6a,0xfc,0x91,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_and_not1_b64 null, 0xaf123456, vcc    ; encoding: [0xff,0x6a,0xfc,0x91,0x56,0x34,0x12,0xaf]
 
 s_or_not1_b64 s[10:11], s[2:3], s[4:5]
 // GFX12: s_or_not1_b64 s[10:11], s[2:3], s[4:5]  ; encoding: [0x02,0x04,0x8a,0x92]
@@ -6341,9 +6282,7 @@ s_or_not1_b64 s[10:11], vcc, ttmp[14:15]
 // GFX12: s_or_not1_b64 s[10:11], vcc, ttmp[14:15] ; encoding: [0x6a,0x7a,0x8a,0x92]
 
 s_or_not1_b64 s[10:11], ttmp[14:15], 0xaf123456
-// GFX1200: s_or_not1_b64 s[10:11], ttmp[14:15], 0xaf123456 ; encoding: [0x7a,0xff,0x8a,0x92,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_or_not1_b64 s[10:11], ttmp[14:15], 0xaf123456 ; encoding: [0x7a,0xfe,0x8a,0x92,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_or_not1_b64 s[10:11], ttmp[14:15], lit64(0xaf123456) ; encoding: [0x7a,0xfe,0x8a,0x92,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_or_not1_b64 s[10:11], ttmp[14:15], 0xaf123456 ; encoding: [0x7a,0xff,0x8a,0x92,0x56,0x34,0x12,0xaf]
 
 s_or_not1_b64 s[10:11], exec, src_scc
 // GFX12: s_or_not1_b64 s[10:11], exec, src_scc   ; encoding: [0x7e,0xfd,0x8a,0x92]
@@ -6361,6 +6300,8 @@ s_or_not1_b64 exec, src_scc, exec
 // GFX12: s_or_not1_b64 exec, src_scc, exec       ; encoding: [0xfd,0x7e,0xfe,0x92]
 
 s_or_not1_b64 null, 0xaf123456, vcc
-// GFX1200: s_or_not1_b64 null, 0xaf123456, vcc     ; encoding: [0xff,0x6a,0xfc,0x92,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_or_not1_b64 null, 0xaf123456, vcc     ; encoding: [0xfe,0x6a,0xfc,0x92,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_or_not1_b64 null, lit64(0xaf123456), vcc ; encoding: [0xfe,0x6a,0xfc,0x92,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_or_not1_b64 null, 0xaf123456, vcc     ; encoding: [0xff,0x6a,0xfc,0x92,0x56,0x34,0x12,0xaf]
+//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+// GFX1200: {{.*}}
+// GFX1250-ASM: {{.*}}
+// GFX1250-DIS: {{.*}}

>From a42c2fa6a4f475114f741bdb0ad6786e86d39cb1 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 8 Mar 2026 18:18:34 +0530
Subject: [PATCH 20/55] Update gfx12_asm_sopc.s

---
 llvm/test/MC/AMDGPU/gfx12_asm_sopc.s | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_sopc.s b/llvm/test/MC/AMDGPU/gfx12_asm_sopc.s
index 8056cef973ecf..a41cf47445198 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_sopc.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_sopc.s
@@ -2119,9 +2119,7 @@ s_cmp_eq_u64 s[0:1], 0x3f717273
 // GFX12: s_cmp_eq_u64 s[0:1], 0x3f717273         ; encoding: [0x00,0xff,0x10,0xbf,0x73,0x72,0x71,0x3f]
 
 s_cmp_eq_u64 s[0:1], 0xaf123456
-// GFX1200: s_cmp_eq_u64 s[0:1], 0xaf123456         ; encoding: [0x00,0xff,0x10,0xbf,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_cmp_eq_u64 s[0:1], 0xaf123456         ; encoding: [0x00,0xfe,0x10,0xbf,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_cmp_eq_u64 s[0:1], lit64(0xaf123456)  ; encoding: [0x00,0xfe,0x10,0xbf,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_cmp_eq_u64 s[0:1], 0xaf123456         ; encoding: [0x00,0xff,0x10,0xbf,0x56,0x34,0x12,0xaf]
 
 s_cmp_lg_u64 s[0:1], s[2:3]
 // GFX12: s_cmp_lg_u64 s[0:1], s[2:3]             ; encoding: [0x00,0x02,0x11,0xbf]
@@ -2163,6 +2161,8 @@ s_cmp_lg_u64 s[0:1], 0x3f717273
 // GFX12: s_cmp_lg_u64 s[0:1], 0x3f717273         ; encoding: [0x00,0xff,0x11,0xbf,0x73,0x72,0x71,0x3f]
 
 s_cmp_lg_u64 s[0:1], 0xaf123456
-// GFX1200: s_cmp_lg_u64 s[0:1], 0xaf123456         ; encoding: [0x00,0xff,0x11,0xbf,0x56,0x34,0x12,0xaf]
-// GFX1250-ASM: s_cmp_lg_u64 s[0:1], 0xaf123456         ; encoding: [0x00,0xfe,0x11,0xbf,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_cmp_lg_u64 s[0:1], lit64(0xaf123456)  ; encoding: [0x00,0xfe,0x11,0xbf,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX12: s_cmp_lg_u64 s[0:1], 0xaf123456         ; encoding: [0x00,0xff,0x11,0xbf,0x56,0x34,0x12,0xaf]
+//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+// GFX1200: {{.*}}
+// GFX1250-ASM: {{.*}}
+// GFX1250-DIS: {{.*}}

>From 87e98da5c4815df74d872176e0f7f8f84ec0d008 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 12:49:17 +0530
Subject: [PATCH 21/55] Update gfx12_asm_vopc.s

---
 llvm/test/MC/AMDGPU/gfx12_asm_vopc.s | 8057 +++++---------------------
 1 file changed, 1440 insertions(+), 6617 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vopc.s b/llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
index af7106448b8a9..d5caeac333cb4 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
@@ -1069,9 +1069,8 @@ v_cmp_eq_i64 vcc_lo, src_scc, v[2:3]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_i64 vcc_lo, 0xaf123456, v[254:255]
-// GFX12-W32: v_cmp_eq_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W32: v_cmp_eq_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W64-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// W32: v_cmp_eq_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_i64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
@@ -1118,9 +1117,8 @@ v_cmp_eq_i64 vcc, src_scc, v[2:3]
 // W64: v_cmp_eq_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa4,0x7c]
 
 v_cmp_eq_i64 vcc, 0xaf123456, v[254:255]
-// GFX12-W64: v_cmp_eq_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W64: v_cmp_eq_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W32-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
 
 v_cmp_eq_u16 vcc_lo, v1.l, v2.l
 // W32: v_cmp_eq_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x74,0x7c]
@@ -1314,7857 +1312,2677 @@ v_cmp_eq_u32 vcc_lo, m0, v2
 // W32: v_cmp_eq_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x94,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, null, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, -1, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_eq_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x95,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc, v1, v2
+v_cmp_eq_u32 vcc_
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x94,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7c,0x7c]
 
-v_cmp_eq_u32 vcc, v255, v2
+v_cmp_ge_u16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x94,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7c,0x7c]
 
-v_cmp_eq_u32 vcc, s1, v2
+v_cmp_ge_u16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x94,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7c,0x7c]
 
-v_cmp_eq_u32 vcc, s105, v2
+v_cmp_ge_u16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x94,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7c,0x7c]
 
-v_cmp_eq_u32 vcc, vcc_lo, v2
+v_cmp_ge_u16 vcc, -1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x94,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7c,0x7c]
 
-v_cmp_eq_u32 vcc, vcc_hi, v2
+v_cmp_ge_u16 vcc, 0.5, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x94,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7c,0x7c]
 
-v_cmp_eq_u32 vcc, ttmp15, v2
+v_cmp_ge_u16 vcc, src_scc, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x94,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7c,0x7c]
 
-v_cmp_eq_u32 vcc, m0, v2
+v_cmp_ge_u16 vcc, 0xfe0b, v127.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x94,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_eq_u32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x94,0x7c]
+v_cmp_ge_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u32 vcc, exec_hi, v2
+v_cmp_ge_u16 vcc, 0x3800, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x94,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
 
-v_cmp_eq_u32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x94,0x7c]
+v_cmp_ge_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u32 vcc, -1, v2
+v_cmp_ge_u16 vcc, v1.h, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x94,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u32 vcc, 0.5, v2
+v_cmp_ge_u16 vcc, v127.h, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x94,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7d,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u32 vcc, src_scc, v2
+v_cmp_ge_u16 vcc, src_scc, v2.h
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x94,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7d,0x7c]
+
+v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u32 vcc, 0xaf123456, v255
+v_cmp_ge_u16 vcc, 0xfe0b, v127.h
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x95,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ge_u32 vcc_lo, v1, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, v255, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, s1, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb4,0x7c]
+v_cmp_ge_u32 vcc_lo, s105, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb4,0x7c]
+v_cmp_ge_u32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb4,0x7c]
+v_cmp_ge_u32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb4,0x7c]
+v_cmp_ge_u32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb4,0x7c]
+v_cmp_ge_u32 vcc_lo, m0, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb4,0x7c]
+v_cmp_ge_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb4,0x7c]
+v_cmp_ge_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u64 vcc_lo, null, v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb4,0x7c]
+v_cmp_ge_u32 vcc_lo, null, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb4,0x7c]
+v_cmp_ge_u32 vcc_lo, -1, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb4,0x7c]
+v_cmp_ge_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb4,0x7c]
+v_cmp_ge_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u64 vcc_lo, 0xaf123456, v[254:255]
-// GFX12-W32: v_cmp_eq_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W32: v_cmp_eq_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W64-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ge_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x9d,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u64 vcc, v[1:2], v[2:3]
+v_cmp_ge_u32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb4,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x9c,0x7c]
 
-v_cmp_eq_u64 vcc, v[254:255], v[2:3]
+v_cmp_ge_u32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb4,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x9c,0x7c]
 
-v_cmp_eq_u64 vcc, s[2:3], v[2:3]
+v_cmp_ge_u32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb4,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x9c,0x7c]
 
-v_cmp_eq_u64 vcc, s[104:105], v[2:3]
+v_cmp_ge_u32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb4,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x9c,0x7c]
 
-v_cmp_eq_u64 vcc, vcc, v[2:3]
+v_cmp_ge_u32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb4,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x9c,0x7c]
 
-v_cmp_eq_u64 vcc, ttmp[14:15], v[2:3]
+v_cmp_ge_u32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb4,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x9c,0x7c]
 
-v_cmp_eq_u64 vcc, exec, v[2:3]
+v_cmp_ge_u32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb4,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x9c,0x7c]
 
-v_cmp_eq_u64 vcc, null, v[2:3]
+v_cmp_ge_u32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb4,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x9c,0x7c]
 
-v_cmp_eq_u64 vcc, -1, v[2:3]
+v_cmp_ge_u32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb4,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x9c,0x7c]
 
-v_cmp_eq_u64 vcc, 0.5, v[2:3]
+v_cmp_ge_u32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb4,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x9c,0x7c]
 
-v_cmp_eq_u64 vcc, src_scc, v[2:3]
+v_cmp_ge_u32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb4,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x9c,0x7c]
 
-v_cmp_eq_u64 vcc, 0xaf123456, v[254:255]
-// GFX12-W64: v_cmp_eq_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W64: v_cmp_eq_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W32-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x9c,0x7c]
 
-v_cmp_ge_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x9c,0x7c]
 
-v_cmp_ge_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x9c,0x7c]
 
-v_cmp_ge_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x9d,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_ge_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x0c,0x7c]
+v_cmp_ge_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xbc,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x0c,0x7c]
+v_cmp_ge_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xbc,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x0c,0x7c]
+v_cmp_ge_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xbc,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x0c,0x7c]
+v_cmp_ge_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xbc,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x0c,0x7c]
+v_cmp_ge_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xbc,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x0c,0x7c]
+v_cmp_ge_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xbc,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x0c,0x7c]
+v_cmp_ge_u64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xbc,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f16 vcc_lo, null, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x0c,0x7c]
+v_cmp_ge_u64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xbc,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x0c,0x7c]
+v_cmp_ge_u64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xbc,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x0c,0x7c]
+v_cmp_ge_u64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xbc,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x0c,0x7c]
+v_cmp_ge_u64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xbc,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x0c,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ge_u64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ge_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, m0, v2.l
+v_cmp_ge_u64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x0c,0x7c]
+// W64: v_cmp_ge_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xbc,0x7c]
 
-v_cmp_ge_f16 vcc, exec_lo, v2.l
+v_cmp_ge_u64 vcc, v[254:255], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x0c,0x7c]
+// W64: v_cmp_ge_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xbc,0x7c]
 
-v_cmp_ge_f16 vcc, exec_hi, v2.l
+v_cmp_ge_u64 vcc, s[2:3], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x0c,0x7c]
+// W64: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xbc,0x7c]
 
-v_cmp_ge_f16 vcc, null, v2.l
+v_cmp_ge_u64 vcc, s[104:105], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x0c,0x7c]
+// W64: v_cmp_ge_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xbc,0x7c]
 
-v_cmp_ge_f16 vcc, -1, v2.l
+v_cmp_ge_u64 vcc, vcc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x0c,0x7c]
+// W64: v_cmp_ge_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xbc,0x7c]
 
-v_cmp_ge_f16 vcc, 0.5, v2.l
+v_cmp_ge_u64 vcc, ttmp[14:15], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x0c,0x7c]
+// W64: v_cmp_ge_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xbc,0x7c]
 
-v_cmp_ge_f16 vcc, src_scc, v2.l
+v_cmp_ge_u64 vcc, exec, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x0c,0x7c]
+// W64: v_cmp_ge_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xbc,0x7c]
 
-v_cmp_ge_f16 vcc, 0xfe0b, v127.l
+v_cmp_ge_u64 vcc, null, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x0c,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_ge_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xbc,0x7c]
 
-v_cmp_ge_f16 vcc, v1.h, v2.l
+v_cmp_ge_u64 vcc, -1, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xbc,0x7c]
 
-v_cmp_ge_f16 vcc, v127.h, v2.l
+v_cmp_ge_u64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_ge_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x0d,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xbc,0x7c]
 
-v_cmp_ge_f16 vcc, src_scc, v2.h
+v_cmp_ge_u64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x0d,0x7c]
-
-v_cmp_ge_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_ge_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x0d,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xbc,0x7c]
 
-v_cmp_ge_f16 vcc, 0xfe0b, v127.h
+v_cmp_ge_u64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x0d,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_ge_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_ge_f32 vcc_lo, v1, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, v255, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, s1, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, s105, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, m0, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, null, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, null, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, -1, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x2c,0x7c]
+v_cmp_gt_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ge_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x2d,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_gt_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x08,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f32 vcc, v1, v2
+v_cmp_gt_f16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, v255, v2
+v_cmp_gt_f16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, s1, v2
+v_cmp_gt_f16 vcc, s1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, s105, v2
+v_cmp_gt_f16 vcc, s105, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, vcc_lo, v2
+v_cmp_gt_f16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, vcc_hi, v2
+v_cmp_gt_f16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, ttmp15, v2
+v_cmp_gt_f16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, m0, v2
+v_cmp_gt_f16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, exec_lo, v2
+v_cmp_gt_f16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, exec_hi, v2
+v_cmp_gt_f16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, null, v2
+v_cmp_gt_f16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, -1, v2
+v_cmp_gt_f16 vcc, -1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, 0.5, v2
+v_cmp_gt_f16 vcc, 0.5, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, src_scc, v2
+v_cmp_gt_f16 vcc, src_scc, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x2c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x08,0x7c]
 
-v_cmp_ge_f32 vcc, 0xaf123456, v255
+v_cmp_gt_f16 vcc, 0xfe0b, v127.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x2d,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ge_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x08,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_ge_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_ge_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4d,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_gt_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x08,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, ttmp[14:15], v[2:3]
+v_cmp_gt_f16 vcc, v1.h, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x08,0x7c]
 
-v_cmp_ge_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x4c,0x7c]
+v_cmp_gt_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f64 vcc, null, v[2:3]
+v_cmp_gt_f16 vcc, v127.h, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x4c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x08,0x7c]
 
-v_cmp_ge_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x4c,0x7c]
+v_cmp_gt_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_gt_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x09,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f64 vcc, 0.5, v[2:3]
+v_cmp_gt_f16 vcc, src_scc, v2.h
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x4c,0x7c]
+// W64: v_cmp_gt_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x09,0x7c]
 
-v_cmp_ge_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x4c,0x7c]
+v_cmp_gt_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_gt_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x09,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_f64 vcc, 0xaf123456, v[254:255]
+v_cmp_gt_f16 vcc, 0xfe0b, v127.h
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4d,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_gt_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x09,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_ge_i16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, v1, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, v255, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, s1, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, s1, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, s105, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, s105, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, m0, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, m0, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, null, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, null, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, -1, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, -1, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6c,0x7c]
+v_cmp_gt_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x28,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_gt_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_gt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x29,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, vcc_hi, v2.l
+v_cmp_gt_f32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6c,0x7c]
+// W64: v_cmp_gt_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, ttmp15, v2.l
+v_cmp_gt_f32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6c,0x7c]
+// W64: v_cmp_gt_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, m0, v2.l
+v_cmp_gt_f32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6c,0x7c]
+// W64: v_cmp_gt_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, exec_lo, v2.l
+v_cmp_gt_f32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6c,0x7c]
+// W64: v_cmp_gt_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, exec_hi, v2.l
+v_cmp_gt_f32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6c,0x7c]
+// W64: v_cmp_gt_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, null, v2.l
+v_cmp_gt_f32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6c,0x7c]
+// W64: v_cmp_gt_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, -1, v2.l
+v_cmp_gt_f32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6c,0x7c]
+// W64: v_cmp_gt_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, 0.5, v2.l
+v_cmp_gt_f32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x6c,0x7c]
+// W64: v_cmp_gt_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, src_scc, v2.l
+v_cmp_gt_f32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6c,0x7c]
+// W64: v_cmp_gt_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, 0xfe0b, v127.l
+v_cmp_gt_f32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ge_i16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, 0x3800, v2.l
+v_cmp_gt_f32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_ge_i16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, v1.h, v2.l
+v_cmp_gt_f32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, v127.h, v2.l
+v_cmp_gt_f32 vcc, 0.5, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6d,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, src_scc, v2.h
+v_cmp_gt_f32 vcc, src_scc, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6d,0x7c]
-
-v_cmp_ge_i16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x28,0x7c]
 
-v_cmp_ge_i16 vcc, 0xfe0b, v127.h
+v_cmp_gt_f32 vcc, 0xaf123456, v255
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ge_i32 vcc_lo, v1, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, v255, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, s1, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x29,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_ge_i32 vcc_lo, s105, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x8c,0x7c]
+v_cmp_gt_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x48,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x8c,0x7c]
+v_cmp_gt_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x48,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x8c,0x7c]
+v_cmp_gt_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x48,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x8c,0x7c]
+v_cmp_gt_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x48,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc_lo, m0, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x8c,0x7c]
+v_cmp_gt_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x48,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x8c,0x7c]
+v_cmp_gt_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x48,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x8c,0x7c]
+v_cmp_gt_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x48,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc_lo, null, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x8c,0x7c]
+v_cmp_gt_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x48,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc_lo, -1, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x8c,0x7c]
+v_cmp_gt_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x48,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc_lo, 0.5, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x8c,0x7c]
+v_cmp_gt_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x48,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc_lo, src_scc, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x8c,0x7c]
+v_cmp_gt_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x48,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ge_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x8d,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_gt_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_gt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc, v1, v2
+v_cmp_gt_f64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x8c,0x7c]
+// W64: v_cmp_gt_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x48,0x7c]
 
-v_cmp_ge_i32 vcc, v255, v2
+v_cmp_gt_f64 vcc, v[254:255], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x8c,0x7c]
+// W64: v_cmp_gt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x48,0x7c]
 
-v_cmp_ge_i32 vcc, s1, v2
+v_cmp_gt_f64 vcc, s[2:3], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x8c,0x7c]
+// W64: v_cmp_gt_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x48,0x7c]
 
-v_cmp_ge_i32 vcc, s105, v2
+v_cmp_gt_f64 vcc, s[104:105], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x8c,0x7c]
+// W64: v_cmp_gt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x48,0x7c]
 
-v_cmp_ge_i32 vcc, vcc_lo, v2
+v_cmp_gt_f64 vcc, vcc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x8c,0x7c]
+// W64: v_cmp_gt_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x48,0x7c]
 
-v_cmp_ge_i32 vcc, vcc_hi, v2
+v_cmp_gt_f64 vcc, ttmp[14:15], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x8c,0x7c]
+// W64: v_cmp_gt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x48,0x7c]
 
-v_cmp_ge_i32 vcc, ttmp15, v2
+v_cmp_gt_f64 vcc, exec, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x8c,0x7c]
+// W64: v_cmp_gt_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x48,0x7c]
 
-v_cmp_ge_i32 vcc, m0, v2
+v_cmp_gt_f64 vcc, null, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x8c,0x7c]
+// W64: v_cmp_gt_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x48,0x7c]
 
-v_cmp_ge_i32 vcc, exec_lo, v2
+v_cmp_gt_f64 vcc, -1, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x8c,0x7c]
+// W64: v_cmp_gt_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x48,0x7c]
 
-v_cmp_ge_i32 vcc, exec_hi, v2
+v_cmp_gt_f64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x8c,0x7c]
+// W64: v_cmp_gt_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x48,0x7c]
 
-v_cmp_ge_i32 vcc, null, v2
+v_cmp_gt_f64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x8c,0x7c]
+// W64: v_cmp_gt_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x48,0x7c]
 
-v_cmp_ge_i32 vcc, -1, v2
+v_cmp_gt_f64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x8c,0x7c]
+// W64: v_cmp_gt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_ge_i32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x8c,0x7c]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x8c,0x7c]
+v_cmp_gt_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x8d,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_gt_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xac,0x7c]
+v_cmp_gt_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xac,0x7c]
+v_cmp_gt_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xac,0x7c]
+v_cmp_gt_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xac,0x7c]
+v_cmp_gt_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xac,0x7c]
+v_cmp_gt_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xac,0x7c]
+v_cmp_gt_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xac,0x7c]
+v_cmp_gt_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xac,0x7c]
+v_cmp_gt_i16 vcc_lo, null, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xac,0x7c]
+v_cmp_gt_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xac,0x7c]
+v_cmp_gt_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xac,0x7c]
+v_cmp_gt_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i64 vcc_lo, 0xaf123456, v[254:255]
-// GFX12-W32: v_cmp_ge_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W32: v_cmp_ge_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W64-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i64 vcc, v[1:2], v[2:3]
+v_cmp_gt_i16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xac,0x7c]
+// W64: v_cmp_gt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x68,0x7c]
 
-v_cmp_ge_i64 vcc, v[254:255], v[2:3]
+v_cmp_gt_i16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xac,0x7c]
+// W64: v_cmp_gt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x68,0x7c]
 
-v_cmp_ge_i64 vcc, s[2:3], v[2:3]
+v_cmp_gt_i16 vcc, s1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xac,0x7c]
+// W64: v_cmp_gt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x68,0x7c]
 
-v_cmp_ge_i64 vcc, s[104:105], v[2:3]
+v_cmp_gt_i16 vcc, s105, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xac,0x7c]
+// W64: v_cmp_gt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x68,0x7c]
 
-v_cmp_ge_i64 vcc, vcc, v[2:3]
+v_cmp_gt_i16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xac,0x7c]
+// W64: v_cmp_gt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x68,0x7c]
 
-v_cmp_ge_i64 vcc, ttmp[14:15], v[2:3]
+v_cmp_gt_i16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xac,0x7c]
+// W64: v_cmp_gt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x68,0x7c]
 
-v_cmp_ge_i64 vcc, exec, v[2:3]
+v_cmp_gt_i16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xac,0x7c]
+// W64: v_cmp_gt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x68,0x7c]
 
-v_cmp_ge_i64 vcc, null, v[2:3]
+v_cmp_gt_i16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xac,0x7c]
+// W64: v_cmp_gt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x68,0x7c]
 
-v_cmp_ge_i64 vcc, -1, v[2:3]
+v_cmp_gt_i16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xac,0x7c]
+// W64: v_cmp_gt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x68,0x7c]
 
-v_cmp_ge_i64 vcc, 0.5, v[2:3]
+v_cmp_gt_i16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xac,0x7c]
+// W64: v_cmp_gt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x68,0x7c]
 
-v_cmp_ge_i64 vcc, src_scc, v[2:3]
+v_cmp_gt_i16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xac,0x7c]
-
-v_cmp_ge_i64 vcc, 0xaf123456, v[254:255]
-// GFX12-W64: v_cmp_ge_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W64: v_cmp_ge_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W32-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x68,0x7c]
 
-v_cmp_ge_u16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_ge_u16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7c,0x7c]
+v_cmp_gt_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, s1, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7c,0x7c]
+v_cmp_gt_i16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_gt_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, s105, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7c,0x7c]
+v_cmp_gt_i16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x68,0x7c]
+
+v_cmp_gt_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7c,0x7c]
+v_cmp_gt_i16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x68,0x7c]
+
+v_cmp_gt_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x69,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7c,0x7c]
+v_cmp_gt_i16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x69,0x7c]
+
+v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7c,0x7c]
+v_cmp_gt_i16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_i32 vcc_lo, v1, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x88,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, m0, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7c,0x7c]
+v_cmp_gt_i32 vcc_lo, v255, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x88,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7c,0x7c]
+v_cmp_gt_i32 vcc_lo, s1, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x88,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7c,0x7c]
+v_cmp_gt_i32 vcc_lo, s105, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x88,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, null, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7c,0x7c]
+v_cmp_gt_i32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x88,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, -1, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7c,0x7c]
+v_cmp_gt_i32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x88,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x7c,0x7c]
+v_cmp_gt_i32 vcc_lo, ttmp15, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x88,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7c,0x7c]
+v_cmp_gt_i32 vcc_lo, m0, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x88,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_gt_i32 vcc_lo, exec_lo, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x88,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7c,0x7c]
+v_cmp_gt_i32 vcc_lo, exec_hi, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7c,0x7c]
+v_cmp_gt_i32 vcc_lo, null, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7c,0x7c]
+v_cmp_gt_i32 vcc_lo, -1, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7c,0x7c]
+v_cmp_gt_i32 vcc_lo, 0.5, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7c,0x7c]
+v_cmp_gt_i32 vcc_lo, src_scc, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7c,0x7c]
+v_cmp_gt_i32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_gt_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x89,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, ttmp15, v2.l
+v_cmp_gt_i32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7c,0x7c]
+// W64: v_cmp_gt_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x88,0x7c]
 
-v_cmp_ge_u16 vcc, m0, v2.l
+v_cmp_gt_i32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7c,0x7c]
+// W64: v_cmp_gt_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x88,0x7c]
 
-v_cmp_ge_u16 vcc, exec_lo, v2.l
+v_cmp_gt_i32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7c,0x7c]
+// W64: v_cmp_gt_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x88,0x7c]
 
-v_cmp_ge_u16 vcc, exec_hi, v2.l
+v_cmp_gt_i32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7c,0x7c]
+// W64: v_cmp_gt_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x88,0x7c]
 
-v_cmp_ge_u16 vcc, null, v2.l
+v_cmp_gt_i32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7c,0x7c]
+// W64: v_cmp_gt_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x88,0x7c]
 
-v_cmp_ge_u16 vcc, -1, v2.l
+v_cmp_gt_i32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7c,0x7c]
+// W64: v_cmp_gt_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x88,0x7c]
 
-v_cmp_ge_u16 vcc, 0.5, v2.l
+v_cmp_gt_i32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7c,0x7c]
+// W64: v_cmp_gt_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x88,0x7c]
 
-v_cmp_ge_u16 vcc, src_scc, v2.l
+v_cmp_gt_i32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7c,0x7c]
+// W64: v_cmp_gt_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x88,0x7c]
 
-v_cmp_ge_u16 vcc, 0xfe0b, v127.l
+v_cmp_gt_i32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ge_u16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x88,0x7c]
 
-v_cmp_ge_u16 vcc, 0x3800, v2.l
+v_cmp_gt_i32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_ge_u16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x88,0x7c]
 
-v_cmp_ge_u16 vcc, v1.h, v2.l
+v_cmp_gt_i32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x88,0x7c]
 
-v_cmp_ge_u16 vcc, v127.h, v2.l
+v_cmp_gt_i32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7d,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x88,0x7c]
 
-v_cmp_ge_u16 vcc, src_scc, v2.h
+v_cmp_gt_i32 vcc, 0.5, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7d,0x7c]
-
-v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x88,0x7c]
 
-v_cmp_ge_u16 vcc, 0xfe0b, v127.h
+v_cmp_gt_i32 vcc, src_scc, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ge_u32 vcc_lo, v1, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, v255, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x88,0x7c]
 
-v_cmp_ge_u32 vcc_lo, s1, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x89,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_ge_u32 vcc_lo, s105, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x9c,0x7c]
+v_cmp_gt_i64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x9c,0x7c]
+v_cmp_gt_i64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x9c,0x7c]
+v_cmp_gt_i64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x9c,0x7c]
+v_cmp_gt_i64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, m0, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x9c,0x7c]
+v_cmp_gt_i64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x9c,0x7c]
+v_cmp_gt_i64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x9c,0x7c]
+v_cmp_gt_i64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, null, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x9c,0x7c]
+v_cmp_gt_i64 vcc_lo, null, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, -1, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x9c,0x7c]
+v_cmp_gt_i64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x9c,0x7c]
+v_cmp_gt_i64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x9c,0x7c]
+v_cmp_gt_i64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ge_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x9d,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_gt_i64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_gt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc, v1, v2
+v_cmp_gt_i64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x9c,0x7c]
+// W64: v_cmp_gt_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa8,0x7c]
 
-v_cmp_ge_u32 vcc, v255, v2
+v_cmp_gt_i64 vcc, v[254:255], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x9c,0x7c]
+// W64: v_cmp_gt_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa8,0x7c]
 
-v_cmp_ge_u32 vcc, s1, v2
+v_cmp_gt_i64 vcc, s[2:3], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x9c,0x7c]
+// W64: v_cmp_gt_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa8,0x7c]
 
-v_cmp_ge_u32 vcc, s105, v2
+v_cmp_gt_i64 vcc, s[104:105], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x9c,0x7c]
+// W64: v_cmp_gt_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa8,0x7c]
 
-v_cmp_ge_u32 vcc, vcc_lo, v2
+v_cmp_gt_i64 vcc, vcc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x9c,0x7c]
+// W64: v_cmp_gt_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa8,0x7c]
 
-v_cmp_ge_u32 vcc, vcc_hi, v2
+v_cmp_gt_i64 vcc, ttmp[14:15], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x9c,0x7c]
+// W64: v_cmp_gt_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa8,0x7c]
 
-v_cmp_ge_u32 vcc, ttmp15, v2
+v_cmp_gt_i64 vcc, exec, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x9c,0x7c]
+// W64: v_cmp_gt_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa8,0x7c]
 
-v_cmp_ge_u32 vcc, m0, v2
+v_cmp_gt_i64 vcc, null, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x9c,0x7c]
+// W64: v_cmp_gt_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa8,0x7c]
 
-v_cmp_ge_u32 vcc, exec_lo, v2
+v_cmp_gt_i64 vcc, -1, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x9c,0x7c]
+// W64: v_cmp_gt_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa8,0x7c]
 
-v_cmp_ge_u32 vcc, exec_hi, v2
+v_cmp_gt_i64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x9c,0x7c]
+// W64: v_cmp_gt_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa8,0x7c]
 
-v_cmp_ge_u32 vcc, null, v2
+v_cmp_gt_i64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x9c,0x7c]
+// W64: v_cmp_gt_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa8,0x7c]
 
-v_cmp_ge_u32 vcc, -1, v2
+v_cmp_gt_i64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x9c,0x7c]
+// W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_ge_u32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x9c,0x7c]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x9c,0x7c]
+v_cmp_gt_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x9d,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_gt_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xbc,0x7c]
+v_cmp_gt_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xbc,0x7c]
+v_cmp_gt_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xbc,0x7c]
+v_cmp_gt_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xbc,0x7c]
+v_cmp_gt_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xbc,0x7c]
+v_cmp_gt_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xbc,0x7c]
+v_cmp_gt_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xbc,0x7c]
+v_cmp_gt_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xbc,0x7c]
+v_cmp_gt_u16 vcc_lo, null, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xbc,0x7c]
+v_cmp_gt_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xbc,0x7c]
+v_cmp_gt_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xbc,0x7c]
+v_cmp_gt_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, 0xaf123456, v[254:255]
-// GFX12-W32: v_cmp_ge_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W32: v_cmp_ge_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W64-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc, v[1:2], v[2:3]
+v_cmp_gt_u16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xbc,0x7c]
+// W64: v_cmp_gt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x78,0x7c]
 
-v_cmp_ge_u64 vcc, v[254:255], v[2:3]
+v_cmp_gt_u16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xbc,0x7c]
+// W64: v_cmp_gt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x78,0x7c]
 
-v_cmp_ge_u64 vcc, s[2:3], v[2:3]
+v_cmp_gt_u16 vcc, s1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xbc,0x7c]
+// W64: v_cmp_gt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x78,0x7c]
 
-v_cmp_ge_u64 vcc, s[104:105], v[2:3]
+v_cmp_gt_u16 vcc, s105, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xbc,0x7c]
+// W64: v_cmp_gt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x78,0x7c]
 
-v_cmp_ge_u64 vcc, vcc, v[2:3]
+v_cmp_gt_u16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xbc,0x7c]
+// W64: v_cmp_gt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x78,0x7c]
 
-v_cmp_ge_u64 vcc, ttmp[14:15], v[2:3]
+v_cmp_gt_u16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xbc,0x7c]
+// W64: v_cmp_gt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x78,0x7c]
 
-v_cmp_ge_u64 vcc, exec, v[2:3]
+v_cmp_gt_u16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xbc,0x7c]
+// W64: v_cmp_gt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x78,0x7c]
 
-v_cmp_ge_u64 vcc, null, v[2:3]
+v_cmp_gt_u16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xbc,0x7c]
+// W64: v_cmp_gt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x78,0x7c]
 
-v_cmp_ge_u64 vcc, -1, v[2:3]
+v_cmp_gt_u16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xbc,0x7c]
+// W64: v_cmp_gt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x78,0x7c]
 
-v_cmp_ge_u64 vcc, 0.5, v[2:3]
+v_cmp_gt_u16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xbc,0x7c]
+// W64: v_cmp_gt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x78,0x7c]
 
-v_cmp_ge_u64 vcc, src_scc, v[2:3]
+v_cmp_gt_u16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xbc,0x7c]
+// W64: v_cmp_gt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x78,0x7c]
 
-v_cmp_ge_u64 vcc, 0xaf123456, v[254:255]
-// GFX12-W64: v_cmp_ge_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W64: v_cmp_ge_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W32-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x78,0x7c]
 
-v_cmp_gt_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x08,0x7c]
+v_cmp_gt_u16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x08,0x7c]
+v_cmp_gt_u16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_gt_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x08,0x7c]
+v_cmp_gt_u16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x78,0x7c]
+
+v_cmp_gt_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x08,0x7c]
+v_cmp_gt_u16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x78,0x7c]
+
+v_cmp_gt_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x79,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x08,0x7c]
+v_cmp_gt_u16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x79,0x7c]
+
+v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x08,0x7c]
+v_cmp_gt_u16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_u32 vcc_lo, v1, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x98,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x08,0x7c]
+v_cmp_gt_u32 vcc_lo, v255, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x98,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x08,0x7c]
+v_cmp_gt_u32 vcc_lo, s1, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x98,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x08,0x7c]
+v_cmp_gt_u32 vcc_lo, s105, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x98,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x08,0x7c]
+v_cmp_gt_u32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x98,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, null, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x08,0x7c]
+v_cmp_gt_u32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x98,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x08,0x7c]
+v_cmp_gt_u32 vcc_lo, ttmp15, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x98,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x08,0x7c]
+v_cmp_gt_u32 vcc_lo, m0, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x98,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x08,0x7c]
+v_cmp_gt_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x98,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x08,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_gt_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x98,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x08,0x7c]
+v_cmp_gt_u32 vcc_lo, null, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x08,0x7c]
+v_cmp_gt_u32 vcc_lo, -1, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x08,0x7c]
+v_cmp_gt_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x08,0x7c]
+v_cmp_gt_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x08,0x7c]
+v_cmp_gt_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_gt_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x99,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc, vcc_hi, v2.l
+v_cmp_gt_u32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x08,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x98,0x7c]
 
-v_cmp_gt_f16 vcc, ttmp15, v2.l
+v_cmp_gt_u32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x08,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x98,0x7c]
 
-v_cmp_gt_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x08,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x08,0x7c]
-
-v_cmp_gt_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x08,0x7c]
-
-v_cmp_gt_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_gt_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x09,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x09,0x7c]
-
-v_cmp_gt_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_gt_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x09,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x09,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_f32 vcc_lo, v1, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, v255, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, s1, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, s105, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, m0, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, null, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, -1, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_gt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x29,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x29,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_gt_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_gt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_gt_i16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, s1, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, s105, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, m0, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, null, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, -1, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_i16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_gt_i16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x68,0x7c]
-
-v_cmp_gt_i16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x68,0x7c]
-
-v_cmp_gt_i16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x69,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x69,0x7c]
-
-v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_i32 vcc_lo, v1, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, v255, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, s1, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, s105, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, ttmp15, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, m0, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, exec_lo, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, exec_hi, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, null, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, -1, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, 0.5, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, src_scc, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_gt_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x89,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x89,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_gt_i64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, null, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, 0xaf123456, v[254:255]
-// GFX12-W32: v_cmp_gt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W32: v_cmp_gt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W64-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, 0xaf123456, v[254:255]
-// GFX12-W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W32-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, s1, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, s105, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, m0, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, null, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, -1, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_u16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_gt_u16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x78,0x7c]
-
-v_cmp_gt_u16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x78,0x7c]
-
-v_cmp_gt_u16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x79,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x79,0x7c]
-
-v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_u32 vcc_lo, v1, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, v255, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, s1, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, s105, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, ttmp15, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, m0, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, null, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, -1, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_gt_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x99,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x99,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_gt_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, null, v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, 0xaf123456, v[254:255]
-// GFX12-W32: v_cmp_gt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W32: v_cmp_gt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W64-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, 0xaf123456, v[254:255]
-// GFX12-W64: v_cmp_gt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W64: v_cmp_gt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W32-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, null, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_le_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x06,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x06,0x7c]
-
-v_cmp_le_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x06,0x7c]
-
-v_cmp_le_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x06,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_le_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x06,0x7c]
-
-v_cmp_le_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x06,0x7c]
-
-v_cmp_le_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_le_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x07,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x07,0x7c]
-
-v_cmp_le_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_le_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x07,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x07,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_le_f32 vcc_lo, v1, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, v255, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, s1, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, s105, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, m0, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, null, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, -1, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_le_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x27,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x26,0x7c]
-
-v_cmp_le_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x26,0x7c]
-
-v_cmp_le_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x27,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_le_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_le_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x47,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x46,0x7c]
-
-v_cmp_le_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x46,0x7c]
-
-v_cmp_le_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x47,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_le_i16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, s1, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, s105, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, m0, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, null, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, -1, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x66,0x7c]
-
-v_cmp_le_i16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x66,0x7c]
-
-v_cmp_le_i16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_le_i16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_le_i16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x66,0x7c]
-
-v_cmp_le_i16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x66,0x7c]
-
-v_cmp_le_i16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x67,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x67,0x7c]
-
-v_cmp_le_i16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_le_i32 vcc_lo, v1, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, v255, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, s1, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, s105, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, ttmp15, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, m0, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, exec_lo, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, exec_hi, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, null, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, -1, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, 0.5, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, src_scc, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_le_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x87,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x86,0x7c]
-
-v_cmp_le_i32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x86,0x7c]
-
-v_cmp_le_i32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x87,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_le_i64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, null, v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, 0xaf123456, v[254:255]
-// GFX12-W32: v_cmp_le_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W32: v_cmp_le_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W64-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, 0xaf123456, v[254:255]
-// GFX12-W64: v_cmp_le_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W64: v_cmp_le_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W32-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, s1, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, s105, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, m0, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, null, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, -1, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x76,0x7c]
-
-v_cmp_le_u16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x76,0x7c]
-
-v_cmp_le_u16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_le_u16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_le_u16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x76,0x7c]
-
-v_cmp_le_u16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x76,0x7c]
-
-v_cmp_le_u16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x77,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x77,0x7c]
-
-v_cmp_le_u16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_le_u32 vcc_lo, v1, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, v255, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, s1, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, s105, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, ttmp15, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, m0, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, null, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, -1, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_le_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x97,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x96,0x7c]
-
-v_cmp_le_u32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x96,0x7c]
-
-v_cmp_le_u32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x97,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_le_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, null, v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, 0xaf123456, v[254:255]
-// GFX12-W32: v_cmp_le_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W32: v_cmp_le_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W64-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, 0xaf123456, v[254:255]
-// GFX12-W64: v_cmp_le_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W64: v_cmp_le_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W32-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, null, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x0a,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x0a,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lg_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_lg_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x0b,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x0b,0x7c]
-
-v_cmp_lg_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_lg_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x0b,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x0b,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lg_f32 vcc_lo, v1, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, v255, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, s1, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, s105, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, m0, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, null, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, -1, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_lg_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x2b,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x2b,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lg_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_lg_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4b,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4b,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lt_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, null, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x02,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x02,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lt_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x02,0x7c]
-
-v_cmp_lt_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x02,0x7c]
-
-v_cmp_lt_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_lt_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x03,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x03,0x7c]
-
-v_cmp_lt_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_lt_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x03,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x03,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lt_f32 vcc_lo, v1, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, v255, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, s1, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, s105, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, m0, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, null, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, -1, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_lt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x23,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x23,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lt_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_lt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lt_i16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, s1, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, s105, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, m0, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, null, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, -1, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lt_i16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_lt_i16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x62,0x7c]
-
-v_cmp_lt_i16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x62,0x7c]
-
-v_cmp_lt_i16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x63,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x63,0x7c]
-
-v_cmp_lt_i16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lt_i32 vcc_lo, v1, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, v255, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, s1, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, s105, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, ttmp15, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, m0, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, exec_lo, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, exec_hi, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, null, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, -1, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, 0.5, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, src_scc, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_lt_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x83,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x83,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lt_i64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, null, v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, 0xaf123456, v[254:255]
-// GFX12-W32: v_cmp_lt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W32: v_cmp_lt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W64-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, 0xaf123456, v[254:255]
-// GFX12-W64: v_cmp_lt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W64: v_cmp_lt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W32-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, s1, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, s105, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, m0, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, null, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, -1, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lt_u16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_lt_u16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x72,0x7c]
-
-v_cmp_lt_u16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x72,0x7c]
-
-v_cmp_lt_u16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x73,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x73,0x7c]
-
-v_cmp_lt_u16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lt_u32 vcc_lo, v1, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, v255, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, s1, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, s105, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, ttmp15, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, m0, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, null, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, -1, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_lt_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x93,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x93,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lt_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, null, v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, 0xaf123456, v[254:255]
-// GFX12-W32: v_cmp_lt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W32: v_cmp_lt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W64-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, 0xaf123456, v[254:255]
-// GFX12-W64: v_cmp_lt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W64: v_cmp_lt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W32-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, s1, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, s105, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, m0, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, null, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, -1, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ne_i16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_ne_i16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6b,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6b,0x7c]
-
-v_cmp_ne_i16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ne_i32 vcc_lo, v1, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, v255, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, s1, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, s105, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, m0, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, null, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, -1, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, 0.5, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, src_scc, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ne_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x8b,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x8b,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ne_i64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, 0xaf123456, v[254:255]
-// GFX12-W32: v_cmp_ne_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W32: v_cmp_ne_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W64-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, 0xaf123456, v[254:255]
-// GFX12-W64: v_cmp_ne_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W64: v_cmp_ne_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W32-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, s1, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, s105, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, m0, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, null, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, -1, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ne_u16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_ne_u16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7b,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7b,0x7c]
-
-v_cmp_ne_u16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ne_u32 vcc_lo, v1, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, v255, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, s1, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, s105, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, m0, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, null, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, -1, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ne_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x9b,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x9b,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ne_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, 0xaf123456, v[254:255]
-// GFX12-W32: v_cmp_ne_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W32: v_cmp_ne_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W64-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, 0xaf123456, v[254:255]
-// GFX12-W64: v_cmp_ne_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
-// GFX13-W64: v_cmp_ne_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-// W32-ERR: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, null, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x1a,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x1a,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_neq_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, v1.h, v2.l    ; encoding: [0x81,0x05,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, v1.h, v2.l       ; encoding: [0x81,0x05,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, v127.h, v2.l  ; encoding: [0xff,0x05,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, v127.h, v2.l     ; encoding: [0xff,0x05,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_neq_f16_e32 vcc_lo, src_scc, v2.h ; encoding: [0xfd,0x04,0x1b,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, src_scc, v2.h    ; encoding: [0xfd,0x04,0x1b,0x7c]
-
-v_cmp_neq_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_neq_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x1b,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, 0xfe0b, v127.h   ; encoding: [0xff,0xfe,0x1b,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_neq_f16 vcc, 0.5, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, 0.5, v127.l      ; encoding: [0xf0,0xfe,0x1a,0x7c]
-
-v_cmp_neq_f32 vcc_lo, v1, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, v255, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, s1, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, s105, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, m0, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, null, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, -1, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_neq_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3b,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3b,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_neq_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_neq_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_nge_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, null, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x12,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x12,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_nge_f32 vcc_lo, v1, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, v255, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, s1, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, s105, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, m0, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, null, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, -1, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_nge_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x33,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, s1, v2
+v_cmp_gt_u32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x32,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x98,0x7c]
 
-v_cmp_nge_f32 vcc, s105, v2
+v_cmp_gt_u32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x32,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x98,0x7c]
 
-v_cmp_nge_f32 vcc, vcc_lo, v2
+v_cmp_gt_u32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x32,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x98,0x7c]
 
-v_cmp_nge_f32 vcc, vcc_hi, v2
+v_cmp_gt_u32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x32,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x98,0x7c]
 
-v_cmp_nge_f32 vcc, ttmp15, v2
+v_cmp_gt_u32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x32,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x98,0x7c]
 
-v_cmp_nge_f32 vcc, m0, v2
+v_cmp_gt_u32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x32,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x98,0x7c]
 
-v_cmp_nge_f32 vcc, exec_lo, v2
+v_cmp_gt_u32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x32,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x98,0x7c]
 
-v_cmp_nge_f32 vcc, exec_hi, v2
+v_cmp_gt_u32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x32,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x98,0x7c]
 
-v_cmp_nge_f32 vcc, null, v2
+v_cmp_gt_u32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x32,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x98,0x7c]
 
-v_cmp_nge_f32 vcc, -1, v2
+v_cmp_gt_u32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x32,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x98,0x7c]
 
-v_cmp_nge_f32 vcc, 0.5, v2
+v_cmp_gt_u32 vcc, 0.5, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x32,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x98,0x7c]
 
-v_cmp_nge_f32 vcc, src_scc, v2
+v_cmp_gt_u32 vcc, src_scc, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x32,0x7c]
+// W64: v_cmp_gt_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x98,0x7c]
 
-v_cmp_nge_f32 vcc, 0xaf123456, v255
+v_cmp_gt_u32 vcc, 0xaf123456, v255
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x33,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_nge_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x99,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_nge_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x52,0x7c]
+v_cmp_gt_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x52,0x7c]
+v_cmp_gt_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x52,0x7c]
+v_cmp_gt_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x52,0x7c]
+v_cmp_gt_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x52,0x7c]
+v_cmp_gt_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_nge_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_gt_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb8,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, -1, v[2:3]
+v_cmp_gt_u64 vcc_lo, exec, v[2:3]
+// W3
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x52,0x7c]
+// W64: v_cmp_ne_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xba,0x7c]
 
-v_cmp_nge_f64 vcc, 0.5, v[2:3]
+v_cmp_ne_u64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x52,0x7c]
+// W64: v_cmp_ne_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xba,0x7c]
 
-v_cmp_nge_f64 vcc, src_scc, v[2:3]
+v_cmp_ne_u64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x52,0x7c]
+// W64: v_cmp_ne_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xba,0x7c]
 
-v_cmp_nge_f64 vcc, 0xaf123456, v[254:255]
+v_cmp_ne_u64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_ne_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_ngt_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, null, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, null, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x16,0x7c]
+v_cmp_neq_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x16,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_neq_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x1a,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc, v1.l, v2.l
+v_cmp_neq_f16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, v127.l, v2.l
+v_cmp_neq_f16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, s1, v2.l
+v_cmp_neq_f16 vcc, s1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, s105, v2.l
+v_cmp_neq_f16 vcc, s105, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, vcc_lo, v2.l
+v_cmp_neq_f16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, vcc_hi, v2.l
+v_cmp_neq_f16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, ttmp15, v2.l
+v_cmp_neq_f16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, m0, v2.l
+v_cmp_neq_f16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, exec_lo, v2.l
+v_cmp_neq_f16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, exec_hi, v2.l
+v_cmp_neq_f16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, null, v2.l
+v_cmp_neq_f16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, -1, v2.l
+v_cmp_neq_f16 vcc, -1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, 0.5, v2.l
+v_cmp_neq_f16 vcc, 0.5, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, src_scc, v2.l
+v_cmp_neq_f16 vcc, src_scc, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x16,0x7c]
+// W64: v_cmp_neq_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x1a,0x7c]
 
-v_cmp_ngt_f16 vcc, 0xfe0b, v127.l
+v_cmp_neq_f16 vcc, 0xfe0b, v127.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x16,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_neq_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x1a,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_ngt_f32 vcc_lo, v1, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x36,0x7c]
+v_cmp_neq_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, v1.h, v2.l    ; encoding: [0x81,0x05,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, v255, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x36,0x7c]
+v_cmp_neq_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, v1.h, v2.l       ; encoding: [0x81,0x05,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, v127.h, v2.l  ; encoding: [0xff,0x05,0x1a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, s1, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x36,0x7c]
+v_cmp_neq_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, v127.h, v2.l     ; encoding: [0xff,0x05,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_neq_f16_e32 vcc_lo, src_scc, v2.h ; encoding: [0xfd,0x04,0x1b,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, s105, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x36,0x7c]
+v_cmp_neq_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, src_scc, v2.h    ; encoding: [0xfd,0x04,0x1b,0x7c]
+
+v_cmp_neq_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_neq_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x1b,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x36,0x7c]
+v_cmp_neq_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, 0xfe0b, v127.h   ; encoding: [0xff,0xfe,0x1b,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_neq_f16 vcc, 0.5, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, 0.5, v127.l      ; encoding: [0xf0,0xfe,0x1a,0x7c]
+
+v_cmp_neq_f32 vcc_lo, v1, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x36,0x7c]
+v_cmp_neq_f32 vcc_lo, v255, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x36,0x7c]
+v_cmp_neq_f32 vcc_lo, s1, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, m0, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x36,0x7c]
+v_cmp_neq_f32 vcc_lo, s105, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x36,0x7c]
+v_cmp_neq_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x36,0x7c]
+v_cmp_neq_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, null, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x36,0x7c]
+v_cmp_neq_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, -1, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x36,0x7c]
+v_cmp_neq_f32 vcc_lo, m0, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x36,0x7c]
+v_cmp_neq_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x36,0x7c]
+v_cmp_neq_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ngt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x37,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_neq_f32 vcc_lo, null, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc, v1, v2
+v_cmp_neq_f32 vcc_lo, -1, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_neq_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3b,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, v255, v2
+v_cmp_neq_f32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, s1, v2
+v_cmp_neq_f32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, s105, v2
+v_cmp_neq_f32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, vcc_lo, v2
+v_cmp_neq_f32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, vcc_hi, v2
+v_cmp_neq_f32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, ttmp15, v2
+v_cmp_neq_f32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, m0, v2
+v_cmp_neq_f32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, exec_lo, v2
+v_cmp_neq_f32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, exec_hi, v2
+v_cmp_neq_f32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, null, v2
+v_cmp_neq_f32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, -1, v2
+v_cmp_neq_f32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, 0.5, v2
+v_cmp_neq_f32 vcc, 0.5, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, src_scc, v2
+v_cmp_neq_f32 vcc, src_scc, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x36,0x7c]
+// W64: v_cmp_neq_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x3a,0x7c]
 
-v_cmp_ngt_f32 vcc, 0xaf123456, v255
+v_cmp_neq_f32 vcc, 0xaf123456, v255
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x37,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_neq_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3b,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_ngt_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x56,0x7c]
+v_cmp_neq_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x56,0x7c]
+v_cmp_neq_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x56,0x7c]
+v_cmp_neq_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x56,0x7c]
+v_cmp_neq_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x56,0x7c]
+v_cmp_neq_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x56,0x7c]
+v_cmp_neq_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x56,0x7c]
+v_cmp_neq_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x56,0x7c]
+v_cmp_neq_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x56,0x7c]
+v_cmp_neq_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x56,0x7c]
+v_cmp_neq_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x56,0x7c]
+v_cmp_neq_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_neq_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_neq_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc, v[1:2], v[2:3]
+v_cmp_neq_f64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x56,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x5a,0x7c]
 
-v_cmp_ngt_f64 vcc, v[254:255], v[2:3]
+v_cmp_neq_f64 vcc, v[254:255], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x56,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5a,0x7c]
 
-v_cmp_ngt_f64 vcc, s[2:3], v[2:3]
+v_cmp_neq_f64 vcc, s[2:3], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x56,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x5a,0x7c]
 
-v_cmp_ngt_f64 vcc, s[104:105], v[2:3]
+v_cmp_neq_f64 vcc, s[104:105], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x56,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5a,0x7c]
 
-v_cmp_ngt_f64 vcc, vcc, v[2:3]
+v_cmp_neq_f64 vcc, vcc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x56,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x5a,0x7c]
 
-v_cmp_ngt_f64 vcc, ttmp[14:15], v[2:3]
+v_cmp_neq_f64 vcc, ttmp[14:15], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x56,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5a,0x7c]
 
-v_cmp_ngt_f64 vcc, exec, v[2:3]
+v_cmp_neq_f64 vcc, exec, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x56,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x5a,0x7c]
 
-v_cmp_ngt_f64 vcc, null, v[2:3]
+v_cmp_neq_f64 vcc, null, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x56,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x5a,0x7c]
 
-v_cmp_ngt_f64 vcc, -1, v[2:3]
+v_cmp_neq_f64 vcc, -1, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x56,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x5a,0x7c]
 
-v_cmp_ngt_f64 vcc, 0.5, v[2:3]
+v_cmp_neq_f64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x56,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x5a,0x7c]
 
-v_cmp_ngt_f64 vcc, src_scc, v[2:3]
+v_cmp_neq_f64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x56,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x5a,0x7c]
 
-v_cmp_ngt_f64 vcc, 0xaf123456, v[254:255]
+v_cmp_neq_f64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_neq_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_nle_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, null, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, null, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x18,0x7c]
+v_cmp_nge_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x12,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x18,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_nge_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x12,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc, v1.l, v2.l
+v_cmp_nge_f16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, v127.l, v2.l
+v_cmp_nge_f16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, s1, v2.l
+v_cmp_nge_f16 vcc, s1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, s105, v2.l
+v_cmp_nge_f16 vcc, s105, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, vcc_lo, v2.l
+v_cmp_nge_f16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, vcc_hi, v2.l
+v_cmp_nge_f16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, ttmp15, v2.l
+v_cmp_nge_f16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, m0, v2.l
+v_cmp_nge_f16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, exec_lo, v2.l
+v_cmp_nge_f16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, exec_hi, v2.l
+v_cmp_nge_f16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, null, v2.l
+v_cmp_nge_f16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, -1, v2.l
+v_cmp_nge_f16 vcc, -1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, 0.5, v2.l
+v_cmp_nge_f16 vcc, 0.5, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, src_scc, v2.l
+v_cmp_nge_f16 vcc, src_scc, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x18,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x12,0x7c]
 
-v_cmp_nle_f16 vcc, 0xfe0b, v127.l
+v_cmp_nge_f16 vcc, 0xfe0b, v127.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x18,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_nge_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x12,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_nle_f32 vcc_lo, v1, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, v1, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, v255, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, v255, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, s1, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, s1, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, s105, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, s105, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, m0, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, m0, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, null, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, null, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, -1, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, -1, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x38,0x7c]
+v_cmp_nge_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_nle_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x39,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_nge_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_nge_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x33,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc, v1, v2
+v_cmp_nge_f32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, v255, v2
+v_cmp_nge_f32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, s1, v2
+v_cmp_nge_f32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, s105, v2
+v_cmp_nge_f32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, vcc_lo, v2
+v_cmp_nge_f32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, vcc_hi, v2
+v_cmp_nge_f32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, ttmp15, v2
+v_cmp_nge_f32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, m0, v2
+v_cmp_nge_f32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, exec_lo, v2
+v_cmp_nge_f32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, exec_hi, v2
+v_cmp_nge_f32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, null, v2
+v_cmp_nge_f32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, -1, v2
+v_cmp_nge_f32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, 0.5, v2
+v_cmp_nge_f32 vcc, 0.5, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, src_scc, v2
+v_cmp_nge_f32 vcc, src_scc, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x38,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x32,0x7c]
 
-v_cmp_nle_f32 vcc, 0xaf123456, v255
+v_cmp_nge_f32 vcc, 0xaf123456, v255
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x39,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_nge_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x33,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_nle_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x58,0x7c]
+v_cmp_nge_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x58,0x7c]
+v_cmp_nge_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x58,0x7c]
+v_cmp_nge_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x58,0x7c]
+v_cmp_nge_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x58,0x7c]
+v_cmp_nge_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x58,0x7c]
+v_cmp_nge_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x58,0x7c]
+v_cmp_nge_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x58,0x7c]
+v_cmp_nge_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x58,0x7c]
+v_cmp_nge_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x58,0x7c]
+v_cmp_nge_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x58,0x7c]
+v_cmp_nge_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_nle_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x59,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_nge_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_nge_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc, v[1:2], v[2:3]
+v_cmp_nge_f64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x58,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x52,0x7c]
 
-v_cmp_nle_f64 vcc, v[254:255], v[2:3]
+v_cmp_nge_f64 vcc, v[254:255], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x58,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x52,0x7c]
 
-v_cmp_nle_f64 vcc, s[2:3], v[2:3]
+v_cmp_nge_f64 vcc, s[2:3], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x58,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x52,0x7c]
 
-v_cmp_nle_f64 vcc, s[104:105], v[2:3]
+v_cmp_nge_f64 vcc, s[104:105], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x58,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x52,0x7c]
 
-v_cmp_nle_f64 vcc, vcc, v[2:3]
+v_cmp_nge_f64 vcc, vcc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x58,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x52,0x7c]
 
-v_cmp_nle_f64 vcc, ttmp[14:15], v[2:3]
+v_cmp_nge_f64 vcc, ttmp[14:15], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x58,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x52,0x7c]
 
-v_cmp_nle_f64 vcc, exec, v[2:3]
+v_cmp_nge_f64 vcc, exec, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x58,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x52,0x7c]
 
-v_cmp_nle_f64 vcc, null, v[2:3]
+v_cmp_nge_f64 vcc, null, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x58,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x52,0x7c]
 
-v_cmp_nle_f64 vcc, -1, v[2:3]
+v_cmp_nge_f64 vcc, -1, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x58,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x52,0x7c]
 
-v_cmp_nle_f64 vcc, 0.5, v[2:3]
+v_cmp_nge_f64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x58,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x52,0x7c]
 
-v_cmp_nle_f64 vcc, src_scc, v[2:3]
+v_cmp_nge_f64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x58,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x52,0x7c]
 
-v_cmp_nle_f64 vcc, 0xaf123456, v[254:255]
+v_cmp_nge_f64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x59,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_nge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_nlg_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, null, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, null, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x14,0x7c]
+v_cmp_ngt_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x14,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ngt_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x16,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f16 vcc, v1.l, v2.l
+v_cmp_ngt_f16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, v127.l, v2.l
+v_cmp_ngt_f16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, s1, v2.l
+v_cmp_ngt_f16 vcc, s1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, s105, v2.l
+v_cmp_ngt_f16 vcc, s105, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, vcc_lo, v2.l
+v_cmp_ngt_f16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, vcc_hi, v2.l
+v_cmp_ngt_f16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, ttmp15, v2.l
+v_cmp_ngt_f16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, m0, v2.l
+v_cmp_ngt_f16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, exec_lo, v2.l
+v_cmp_ngt_f16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, exec_hi, v2.l
+v_cmp_ngt_f16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, null, v2.l
+v_cmp_ngt_f16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, -1, v2.l
+v_cmp_ngt_f16 vcc, -1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, 0.5, v2.l
+v_cmp_ngt_f16 vcc, 0.5, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, src_scc, v2.l
+v_cmp_ngt_f16 vcc, src_scc, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x14,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x16,0x7c]
 
-v_cmp_nlg_f16 vcc, 0xfe0b, v127.l
+v_cmp_ngt_f16 vcc, 0xfe0b, v127.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x14,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_ngt_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x16,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_nlg_f32 vcc_lo, v1, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, v1, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, v255, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, v255, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, s1, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, s1, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, s105, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, s105, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, m0, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, m0, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, null, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, null, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, -1, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, -1, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x34,0x7c]
+v_cmp_ngt_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_nlg_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x35,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_ngt_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ngt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x37,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f32 vcc, v1, v2
+v_cmp_ngt_f32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, v255, v2
+v_cmp_ngt_f32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, s1, v2
+v_cmp_ngt_f32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, s105, v2
+v_cmp_ngt_f32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, vcc_lo, v2
+v_cmp_ngt_f32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, vcc_hi, v2
+v_cmp_ngt_f32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, ttmp15, v2
+v_cmp_ngt_f32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, m0, v2
+v_cmp_ngt_f32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, exec_lo, v2
+v_cmp_ngt_f32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, exec_hi, v2
+v_cmp_ngt_f32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, null, v2
+v_cmp_ngt_f32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, -1, v2
+v_cmp_ngt_f32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, 0.5, v2
+v_cmp_ngt_f32 vcc, 0.5, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, src_scc, v2
+v_cmp_ngt_f32 vcc, src_scc, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x34,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x36,0x7c]
 
-v_cmp_nlg_f32 vcc, 0xaf123456, v255
+v_cmp_ngt_f32 vcc, 0xaf123456, v255
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x35,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_ngt_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x37,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_nlg_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x54,0x7c]
+v_cmp_ngt_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x54,0x7c]
+v_cmp_ngt_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x54,0x7c]
+v_cmp_ngt_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x54,0x7c]
+v_cmp_ngt_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x54,0x7c]
+v_cmp_ngt_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x54,0x7c]
+v_cmp_ngt_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x54,0x7c]
+v_cmp_ngt_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x54,0x7c]
+v_cmp_ngt_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x54,0x7c]
+v_cmp_ngt_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x54,0x7c]
+v_cmp_ngt_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x54,0x7c]
+v_cmp_ngt_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x55,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_ngt_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlg_f64 vcc, v[1:2], v[2:3]
+v_cmp_ngt_f64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x54,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x56,0x7c]
 
-v_cmp_nlg_f64 vcc, v[254:255], v[2:3]
+v_cmp_ngt_f64 vcc, v[254:255], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x54,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x56,0x7c]
 
-v_cmp_nlg_f64 vcc, s[2:3], v[2:3]
+v_cmp_ngt_f64 vcc, s[2:3], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x54,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x56,0x7c]
 
-v_cmp_nlg_f64 vcc, s[104:105], v[2:3]
+v_cmp_ngt_f64 vcc, s[104:105], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x54,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x56,0x7c]
 
-v_cmp_nlg_f64 vcc, vcc, v[2:3]
+v_cmp_ngt_f64 vcc, vcc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x54,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x56,0x7c]
 
-v_cmp_nlg_f64 vcc, ttmp[14:15], v[2:3]
+v_cmp_ngt_f64 vcc, ttmp[14:15], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x54,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x56,0x7c]
 
-v_cmp_nlg_f64 vcc, exec, v[2:3]
+v_cmp_ngt_f64 vcc, exec, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x54,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x56,0x7c]
 
-v_cmp_nlg_f64 vcc, null, v[2:3]
+v_cmp_ngt_f64 vcc, null, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x54,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x56,0x7c]
 
-v_cmp_nlg_f64 vcc, -1, v[2:3]
+v_cmp_ngt_f64 vcc, -1, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x54,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x56,0x7c]
 
-v_cmp_nlg_f64 vcc, 0.5, v[2:3]
+v_cmp_ngt_f64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x54,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x56,0x7c]
 
-v_cmp_nlg_f64 vcc, src_scc, v[2:3]
+v_cmp_ngt_f64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x54,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x56,0x7c]
 
-v_cmp_nlg_f64 vcc, 0xaf123456, v[254:255]
+v_cmp_ngt_f64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x55,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_ngt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_nlt_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, null, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, null, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x1c,0x7c]
+v_cmp_nle_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x1c,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_nle_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x18,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f16 vcc, v1.l, v2.l
+v_cmp_nle_f16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, v127.l, v2.l
+v_cmp_nle_f16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, s1, v2.l
+v_cmp_nle_f16 vcc, s1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, s105, v2.l
+v_cmp_nle_f16 vcc, s105, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, vcc_lo, v2.l
+v_cmp_nle_f16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, vcc_hi, v2.l
+v_cmp_nle_f16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, ttmp15, v2.l
+v_cmp_nle_f16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, m0, v2.l
+v_cmp_nle_f16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, exec_lo, v2.l
+v_cmp_nle_f16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, exec_hi, v2.l
+v_cmp_nle_f16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, null, v2.l
+v_cmp_nle_f16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, -1, v2.l
+v_cmp_nle_f16 vcc, -1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, 0.5, v2.l
+v_cmp_nle_f16 vcc, 0.5, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, src_scc, v2.l
+v_cmp_nle_f16 vcc, src_scc, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x1c,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x18,0x7c]
 
-v_cmp_nlt_f16 vcc, 0xfe0b, v127.l
+v_cmp_nle_f16 vcc, 0xfe0b, v127.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x1c,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_nle_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x18,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_nlt_f32 vcc_lo, v1, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, v1, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, v255, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, v255, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, s1, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, s1, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, s105, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, s105, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, m0, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, m0, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, null, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, null, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, -1, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, -1, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x3c,0x7c]
+v_cmp_nle_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_nlt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3d,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_nle_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_nle_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x39,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f32 vcc, v1, v2
+v_cmp_nle_f32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, v255, v2
+v_cmp_nle_f32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, s1, v2
+v_cmp_nle_f32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, s105, v2
+v_cmp_nle_f32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, vcc_lo, v2
+v_cmp_nle_f32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, vcc_hi, v2
+v_cmp_nle_f32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, ttmp15, v2
+v_cmp_nle_f32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, m0, v2
+v_cmp_nle_f32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, exec_lo, v2
+v_cmp_nle_f32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, exec_hi, v2
+v_cmp_nle_f32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, null, v2
+v_cmp_nle_f32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, -1, v2
+v_cmp_nle_f32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, 0.5, v2
+v_cmp_nle_f32 vcc, 0.5, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, src_scc, v2
+v_cmp_nle_f32 vcc, src_scc, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x3c,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x38,0x7c]
 
-v_cmp_nlt_f32 vcc, 0xaf123456, v255
+v_cmp_nle_f32 vcc, 0xaf123456, v255
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3d,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_nlt_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x39,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_nlt_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x5c,0x7c]
+v_cmp_nle_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5c,0x7c]
+v_cmp_nle_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x5c,0x7c]
+v_cmp_nle_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x5c,0x7c]
+v_cmp_nle_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x5c,0x7c]
+v_cmp_nle_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x5c,0x7c]
+v_cmp_nle_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x5c,0x7c]
+v_cmp_nle_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5d,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_nle_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nlt_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, src_scc, v[2:3]
+v_cmp_nle_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, -
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 // W64: v_cmp_nlt_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x5c,0x7c]
 
@@ -9875,3 +4693,8 @@ v_cmp_u_f64 vcc, src_scc, v[2:3]
 v_cmp_u_f64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 // W64: v_cmp_u_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x51,0x7c,0x56,0x34,0x12,0xaf]
+//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+// GFX12-W32: {{.*}}
+// GFX12-W64: {{.*}}
+// GFX13-W32: {{.*}}
+// GFX13-W64: {{.*}}

>From 96759cbffdb3a95041a44281e4583e5022afb9de Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 12:53:18 +0530
Subject: [PATCH 22/55] Update gfx12_asm_vopcx.s

---
 llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s | 2002 +------------------------
 1 file changed, 8 insertions(+), 1994 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s b/llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
index 9276f9059679c..4fe9c30baff97 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
@@ -416,8 +416,7 @@ v_cmpx_eq_i64 src_scc, v[2:3]
 // GFX: v_cmpx_eq_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xa4,0x7d]
 
 v_cmpx_eq_i64 0xaf123456, v[254:255]
-// GFX12: v_cmpx_eq_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7d,0x56,0x34,0x12,0xaf]
-// GFX13: v_cmpx_eq_i64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa5,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX: v_cmpx_eq_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7d,0x56,0x34,0x12,0xaf]
 
 v_cmpx_eq_u16 v1.l, v2.l
 // GFX: v_cmpx_eq_u16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x74,0x7d]
@@ -555,8 +554,7 @@ v_cmpx_eq_u64 src_scc, v[2:3]
 // GFX: v_cmpx_eq_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xb4,0x7d]
 
 v_cmpx_eq_u64 0xaf123456, v[254:255]
-// GFX12: v_cmpx_eq_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7d,0x56,0x34,0x12,0xaf]
-// GFX13: v_cmpx_eq_u64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb5,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX: v_cmpx_eq_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7d,0x56,0x34,0x12,0xaf]
 
 v_cmpx_ge_f16 v1.l, v2.l
 // GFX: v_cmpx_ge_f16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x0c,0x7d]
@@ -832,8 +830,7 @@ v_cmpx_ge_i64 src_scc, v[2:3]
 // GFX: v_cmpx_ge_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xac,0x7d]
 
 v_cmpx_ge_i64 0xaf123456, v[254:255]
-// GFX12: v_cmpx_ge_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7d,0x56,0x34,0x12,0xaf]
-// GFX13: v_cmpx_ge_i64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xad,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX: v_cmpx_ge_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7d,0x56,0x34,0x12,0xaf]
 
 v_cmpx_ge_u16 v1.l, v2.l
 // GFX: v_cmpx_ge_u16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x7c,0x7d]
@@ -971,8 +968,7 @@ v_cmpx_ge_u64 src_scc, v[2:3]
 // GFX: v_cmpx_ge_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xbc,0x7d]
 
 v_cmpx_ge_u64 0xaf123456, v[254:255]
-// GFX12: v_cmpx_ge_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7d,0x56,0x34,0x12,0xaf]
-// GFX13: v_cmpx_ge_u64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xbd,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX: v_cmpx_ge_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7d,0x56,0x34,0x12,0xaf]
 
 v_cmpx_gt_f16 v1.l, v2.l
 // GFX: v_cmpx_gt_f16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x08,0x7d]
@@ -1248,8 +1244,7 @@ v_cmpx_gt_i64 src_scc, v[2:3]
 // GFX: v_cmpx_gt_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xa8,0x7d]
 
 v_cmpx_gt_i64 0xaf123456, v[254:255]
-// GFX12: v_cmpx_gt_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7d,0x56,0x34,0x12,0xaf]
-// GFX13: v_cmpx_gt_i64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa9,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX: v_cmpx_gt_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7d,0x56,0x34,0x12,0xaf]
 
 v_cmpx_gt_u16 v1.l, v2.l
 // GFX: v_cmpx_gt_u16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x78,0x7d]
@@ -1387,8 +1382,7 @@ v_cmpx_gt_u64 src_scc, v[2:3]
 // GFX: v_cmpx_gt_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xb8,0x7d]
 
 v_cmpx_gt_u64 0xaf123456, v[254:255]
-// GFX12: v_cmpx_gt_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7d,0x56,0x34,0x12,0xaf]
-// GFX13: v_cmpx_gt_u64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb9,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX: v_cmpx_gt_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7d,0x56,0x34,0x12,0xaf]
 
 v_cmpx_le_f16 v1.l, v2.l
 // GFX: v_cmpx_le_f16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x06,0x7d]
@@ -1664,8 +1658,7 @@ v_cmpx_le_i64 src_scc, v[2:3]
 // GFX: v_cmpx_le_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xa6,0x7d]
 
 v_cmpx_le_i64 0xaf123456, v[254:255]
-// GFX12: v_cmpx_le_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7d,0x56,0x34,0x12,0xaf]
-// GFX13: v_cmpx_le_i64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa7,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+// GFX: v_cmpx_le_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7d,0x56,0x34,0x12,0xaf]
 
 v_cmpx_le_u16 v1.l, v2.l
 // GFX: v_cmpx_le_u16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x76,0x7d]
@@ -1761,1983 +1754,4 @@ v_cmpx_le_u32 -1, v2
 // GFX: v_cmpx_le_u32_e32 -1, v2                ; encoding: [0xc1,0x04,0x96,0x7d]
 
 v_cmpx_le_u32 0.5, v2
-// GFX: v_cmpx_le_u32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x96,0x7d]
-
-v_cmpx_le_u32 src_scc, v2
-// GFX: v_cmpx_le_u32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x96,0x7d]
-
-v_cmpx_le_u32 0xaf123456, v255
-// GFX: v_cmpx_le_u32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x97,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_le_u64 v[1:2], v[2:3]
-// GFX: v_cmpx_le_u64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0xb6,0x7d]
-
-v_cmpx_le_u64 v[254:255], v[2:3]
-// GFX: v_cmpx_le_u64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0xb6,0x7d]
-
-v_cmpx_le_u64 s[2:3], v[2:3]
-// GFX: v_cmpx_le_u64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0xb6,0x7d]
-
-v_cmpx_le_u64 s[104:105], v[2:3]
-// GFX: v_cmpx_le_u64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0xb6,0x7d]
-
-v_cmpx_le_u64 vcc, v[2:3]
-// GFX: v_cmpx_le_u64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0xb6,0x7d]
-
-v_cmpx_le_u64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_le_u64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0xb6,0x7d]
-
-v_cmpx_le_u64 exec, v[2:3]
-// GFX: v_cmpx_le_u64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0xb6,0x7d]
-
-v_cmpx_le_u64 null, v[2:3]
-// GFX: v_cmpx_le_u64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0xb6,0x7d]
-
-v_cmpx_le_u64 -1, v[2:3]
-// GFX: v_cmpx_le_u64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0xb6,0x7d]
-
-v_cmpx_le_u64 0.5, v[2:3]
-// GFX: v_cmpx_le_u64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0xb6,0x7d]
-
-v_cmpx_le_u64 src_scc, v[2:3]
-// GFX: v_cmpx_le_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xb6,0x7d]
-
-v_cmpx_le_u64 0xaf123456, v[254:255]
-// GFX12: v_cmpx_le_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7d,0x56,0x34,0x12,0xaf]
-// GFX13: v_cmpx_le_u64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb7,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-v_cmpx_lg_f16 v1.l, v2.l
-// GFX: v_cmpx_lg_f16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x0a,0x7d]
-
-v_cmpx_lg_f16 v127.l, v2.l
-// GFX: v_cmpx_lg_f16_e32 v127.l, v2.l          ; encoding: [0x7f,0x05,0x0a,0x7d]
-
-v_cmpx_lg_f16 s1, v2.l
-// GFX: v_cmpx_lg_f16_e32 s1, v2.l              ; encoding: [0x01,0x04,0x0a,0x7d]
-
-v_cmpx_lg_f16 s105, v2.l
-// GFX: v_cmpx_lg_f16_e32 s105, v2.l            ; encoding: [0x69,0x04,0x0a,0x7d]
-
-v_cmpx_lg_f16 vcc_lo, v2.l
-// GFX: v_cmpx_lg_f16_e32 vcc_lo, v2.l          ; encoding: [0x6a,0x04,0x0a,0x7d]
-
-v_cmpx_lg_f16 vcc_hi, v2.l
-// GFX: v_cmpx_lg_f16_e32 vcc_hi, v2.l          ; encoding: [0x6b,0x04,0x0a,0x7d]
-
-v_cmpx_lg_f16 ttmp15, v2.l
-// GFX: v_cmpx_lg_f16_e32 ttmp15, v2.l          ; encoding: [0x7b,0x04,0x0a,0x7d]
-
-v_cmpx_lg_f16 m0, v2.l
-// GFX: v_cmpx_lg_f16_e32 m0, v2.l              ; encoding: [0x7d,0x04,0x0a,0x7d]
-
-v_cmpx_lg_f16 exec_lo, v2.l
-// GFX: v_cmpx_lg_f16_e32 exec_lo, v2.l         ; encoding: [0x7e,0x04,0x0a,0x7d]
-
-v_cmpx_lg_f16 exec_hi, v2.l
-// GFX: v_cmpx_lg_f16_e32 exec_hi, v2.l         ; encoding: [0x7f,0x04,0x0a,0x7d]
-
-v_cmpx_lg_f16 null, v2.l
-// GFX: v_cmpx_lg_f16_e32 null, v2.l            ; encoding: [0x7c,0x04,0x0a,0x7d]
-
-v_cmpx_lg_f16 -1, v2.l
-// GFX: v_cmpx_lg_f16_e32 -1, v2.l              ; encoding: [0xc1,0x04,0x0a,0x7d]
-
-v_cmpx_lg_f16 0.5, v2.l
-// GFX: v_cmpx_lg_f16_e32 0.5, v2.l             ; encoding: [0xf0,0x04,0x0a,0x7d]
-
-v_cmpx_lg_f16 src_scc, v2.l
-// GFX: v_cmpx_lg_f16_e32 src_scc, v2.l         ; encoding: [0xfd,0x04,0x0a,0x7d]
-
-v_cmpx_lg_f16 0xfe0b, v127.l
-// GFX: v_cmpx_lg_f16_e32 0xfe0b, v127.l        ; encoding: [0xff,0xfe,0x0a,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_lg_f16 v1.h, v2.l
-// GFX: v_cmpx_lg_f16_e32 v1.h, v2.l            ; encoding: [0x81,0x05,0x0a,0x7d]
-
-v_cmpx_lg_f16 v127.h, v2.l
-// GFX: v_cmpx_lg_f16_e32 v127.h, v2.l          ; encoding: [0xff,0x05,0x0a,0x7d]
-
-v_cmpx_lg_f16 src_scc, v2.h
-// GFX: v_cmpx_lg_f16_e32 src_scc, v2.h         ; encoding: [0xfd,0x04,0x0b,0x7d]
-
-v_cmpx_lg_f16 0xfe0b, v127.h
-// GFX: v_cmpx_lg_f16_e32 0xfe0b, v127.h        ; encoding: [0xff,0xfe,0x0b,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_lg_f32 v1, v2
-// GFX: v_cmpx_lg_f32_e32 v1, v2                ; encoding: [0x01,0x05,0x2a,0x7d]
-
-v_cmpx_lg_f32 v255, v2
-// GFX: v_cmpx_lg_f32_e32 v255, v2              ; encoding: [0xff,0x05,0x2a,0x7d]
-
-v_cmpx_lg_f32 s1, v2
-// GFX: v_cmpx_lg_f32_e32 s1, v2                ; encoding: [0x01,0x04,0x2a,0x7d]
-
-v_cmpx_lg_f32 s105, v2
-// GFX: v_cmpx_lg_f32_e32 s105, v2              ; encoding: [0x69,0x04,0x2a,0x7d]
-
-v_cmpx_lg_f32 vcc_lo, v2
-// GFX: v_cmpx_lg_f32_e32 vcc_lo, v2            ; encoding: [0x6a,0x04,0x2a,0x7d]
-
-v_cmpx_lg_f32 vcc_hi, v2
-// GFX: v_cmpx_lg_f32_e32 vcc_hi, v2            ; encoding: [0x6b,0x04,0x2a,0x7d]
-
-v_cmpx_lg_f32 ttmp15, v2
-// GFX: v_cmpx_lg_f32_e32 ttmp15, v2            ; encoding: [0x7b,0x04,0x2a,0x7d]
-
-v_cmpx_lg_f32 m0, v2
-// GFX: v_cmpx_lg_f32_e32 m0, v2                ; encoding: [0x7d,0x04,0x2a,0x7d]
-
-v_cmpx_lg_f32 exec_lo, v2
-// GFX: v_cmpx_lg_f32_e32 exec_lo, v2           ; encoding: [0x7e,0x04,0x2a,0x7d]
-
-v_cmpx_lg_f32 exec_hi, v2
-// GFX: v_cmpx_lg_f32_e32 exec_hi, v2           ; encoding: [0x7f,0x04,0x2a,0x7d]
-
-v_cmpx_lg_f32 null, v2
-// GFX: v_cmpx_lg_f32_e32 null, v2              ; encoding: [0x7c,0x04,0x2a,0x7d]
-
-v_cmpx_lg_f32 -1, v2
-// GFX: v_cmpx_lg_f32_e32 -1, v2                ; encoding: [0xc1,0x04,0x2a,0x7d]
-
-v_cmpx_lg_f32 0.5, v2
-// GFX: v_cmpx_lg_f32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x2a,0x7d]
-
-v_cmpx_lg_f32 src_scc, v2
-// GFX: v_cmpx_lg_f32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x2a,0x7d]
-
-v_cmpx_lg_f32 0xaf123456, v255
-// GFX: v_cmpx_lg_f32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x2b,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_lg_f64 v[1:2], v[2:3]
-// GFX: v_cmpx_lg_f64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0x4a,0x7d]
-
-v_cmpx_lg_f64 v[254:255], v[2:3]
-// GFX: v_cmpx_lg_f64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0x4a,0x7d]
-
-v_cmpx_lg_f64 s[2:3], v[2:3]
-// GFX: v_cmpx_lg_f64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0x4a,0x7d]
-
-v_cmpx_lg_f64 s[104:105], v[2:3]
-// GFX: v_cmpx_lg_f64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0x4a,0x7d]
-
-v_cmpx_lg_f64 vcc, v[2:3]
-// GFX: v_cmpx_lg_f64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0x4a,0x7d]
-
-v_cmpx_lg_f64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_lg_f64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0x4a,0x7d]
-
-v_cmpx_lg_f64 exec, v[2:3]
-// GFX: v_cmpx_lg_f64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0x4a,0x7d]
-
-v_cmpx_lg_f64 null, v[2:3]
-// GFX: v_cmpx_lg_f64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0x4a,0x7d]
-
-v_cmpx_lg_f64 -1, v[2:3]
-// GFX: v_cmpx_lg_f64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0x4a,0x7d]
-
-v_cmpx_lg_f64 0.5, v[2:3]
-// GFX: v_cmpx_lg_f64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0x4a,0x7d]
-
-v_cmpx_lg_f64 src_scc, v[2:3]
-// GFX: v_cmpx_lg_f64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0x4a,0x7d]
-
-v_cmpx_lg_f64 0xaf123456, v[254:255]
-// GFX: v_cmpx_lg_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4b,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_lt_f16 v1.l, v2.l
-// GFX: v_cmpx_lt_f16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x02,0x7d]
-
-v_cmpx_lt_f16 v127.l, v2.l
-// GFX: v_cmpx_lt_f16_e32 v127.l, v2.l          ; encoding: [0x7f,0x05,0x02,0x7d]
-
-v_cmpx_lt_f16 s1, v2.l
-// GFX: v_cmpx_lt_f16_e32 s1, v2.l              ; encoding: [0x01,0x04,0x02,0x7d]
-
-v_cmpx_lt_f16 s105, v2.l
-// GFX: v_cmpx_lt_f16_e32 s105, v2.l            ; encoding: [0x69,0x04,0x02,0x7d]
-
-v_cmpx_lt_f16 vcc_lo, v2.l
-// GFX: v_cmpx_lt_f16_e32 vcc_lo, v2.l          ; encoding: [0x6a,0x04,0x02,0x7d]
-
-v_cmpx_lt_f16 vcc_hi, v2.l
-// GFX: v_cmpx_lt_f16_e32 vcc_hi, v2.l          ; encoding: [0x6b,0x04,0x02,0x7d]
-
-v_cmpx_lt_f16 ttmp15, v2.l
-// GFX: v_cmpx_lt_f16_e32 ttmp15, v2.l          ; encoding: [0x7b,0x04,0x02,0x7d]
-
-v_cmpx_lt_f16 m0, v2.l
-// GFX: v_cmpx_lt_f16_e32 m0, v2.l              ; encoding: [0x7d,0x04,0x02,0x7d]
-
-v_cmpx_lt_f16 exec_lo, v2.l
-// GFX: v_cmpx_lt_f16_e32 exec_lo, v2.l         ; encoding: [0x7e,0x04,0x02,0x7d]
-
-v_cmpx_lt_f16 exec_hi, v2.l
-// GFX: v_cmpx_lt_f16_e32 exec_hi, v2.l         ; encoding: [0x7f,0x04,0x02,0x7d]
-
-v_cmpx_lt_f16 null, v2.l
-// GFX: v_cmpx_lt_f16_e32 null, v2.l            ; encoding: [0x7c,0x04,0x02,0x7d]
-
-v_cmpx_lt_f16 -1, v2.l
-// GFX: v_cmpx_lt_f16_e32 -1, v2.l              ; encoding: [0xc1,0x04,0x02,0x7d]
-
-v_cmpx_lt_f16 0.5, v2.l
-// GFX: v_cmpx_lt_f16_e32 0.5, v2.l             ; encoding: [0xf0,0x04,0x02,0x7d]
-
-v_cmpx_lt_f16 src_scc, v2.l
-// GFX: v_cmpx_lt_f16_e32 src_scc, v2.l         ; encoding: [0xfd,0x04,0x02,0x7d]
-
-v_cmpx_lt_f16 0xfe0b, v127.l
-// GFX: v_cmpx_lt_f16_e32 0xfe0b, v127.l        ; encoding: [0xff,0xfe,0x02,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_lt_f16 v1.h, v2.l
-// GFX: v_cmpx_lt_f16_e32 v1.h, v2.l            ; encoding: [0x81,0x05,0x02,0x7d]
-
-v_cmpx_lt_f16 v127.h, v2.l
-// GFX: v_cmpx_lt_f16_e32 v127.h, v2.l          ; encoding: [0xff,0x05,0x02,0x7d]
-
-v_cmpx_lt_f16 src_scc, v2.h
-// GFX: v_cmpx_lt_f16_e32 src_scc, v2.h         ; encoding: [0xfd,0x04,0x03,0x7d]
-
-v_cmpx_lt_f16 0xfe0b, v127.h
-// GFX: v_cmpx_lt_f16_e32 0xfe0b, v127.h        ; encoding: [0xff,0xfe,0x03,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_lt_f32 v1, v2
-// GFX: v_cmpx_lt_f32_e32 v1, v2                ; encoding: [0x01,0x05,0x22,0x7d]
-
-v_cmpx_lt_f32 v255, v2
-// GFX: v_cmpx_lt_f32_e32 v255, v2              ; encoding: [0xff,0x05,0x22,0x7d]
-
-v_cmpx_lt_f32 s1, v2
-// GFX: v_cmpx_lt_f32_e32 s1, v2                ; encoding: [0x01,0x04,0x22,0x7d]
-
-v_cmpx_lt_f32 s105, v2
-// GFX: v_cmpx_lt_f32_e32 s105, v2              ; encoding: [0x69,0x04,0x22,0x7d]
-
-v_cmpx_lt_f32 vcc_lo, v2
-// GFX: v_cmpx_lt_f32_e32 vcc_lo, v2            ; encoding: [0x6a,0x04,0x22,0x7d]
-
-v_cmpx_lt_f32 vcc_hi, v2
-// GFX: v_cmpx_lt_f32_e32 vcc_hi, v2            ; encoding: [0x6b,0x04,0x22,0x7d]
-
-v_cmpx_lt_f32 ttmp15, v2
-// GFX: v_cmpx_lt_f32_e32 ttmp15, v2            ; encoding: [0x7b,0x04,0x22,0x7d]
-
-v_cmpx_lt_f32 m0, v2
-// GFX: v_cmpx_lt_f32_e32 m0, v2                ; encoding: [0x7d,0x04,0x22,0x7d]
-
-v_cmpx_lt_f32 exec_lo, v2
-// GFX: v_cmpx_lt_f32_e32 exec_lo, v2           ; encoding: [0x7e,0x04,0x22,0x7d]
-
-v_cmpx_lt_f32 exec_hi, v2
-// GFX: v_cmpx_lt_f32_e32 exec_hi, v2           ; encoding: [0x7f,0x04,0x22,0x7d]
-
-v_cmpx_lt_f32 null, v2
-// GFX: v_cmpx_lt_f32_e32 null, v2              ; encoding: [0x7c,0x04,0x22,0x7d]
-
-v_cmpx_lt_f32 -1, v2
-// GFX: v_cmpx_lt_f32_e32 -1, v2                ; encoding: [0xc1,0x04,0x22,0x7d]
-
-v_cmpx_lt_f32 0.5, v2
-// GFX: v_cmpx_lt_f32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x22,0x7d]
-
-v_cmpx_lt_f32 src_scc, v2
-// GFX: v_cmpx_lt_f32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x22,0x7d]
-
-v_cmpx_lt_f32 0xaf123456, v255
-// GFX: v_cmpx_lt_f32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x23,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_lt_f64 v[1:2], v[2:3]
-// GFX: v_cmpx_lt_f64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0x42,0x7d]
-
-v_cmpx_lt_f64 v[254:255], v[2:3]
-// GFX: v_cmpx_lt_f64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0x42,0x7d]
-
-v_cmpx_lt_f64 s[2:3], v[2:3]
-// GFX: v_cmpx_lt_f64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0x42,0x7d]
-
-v_cmpx_lt_f64 s[104:105], v[2:3]
-// GFX: v_cmpx_lt_f64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0x42,0x7d]
-
-v_cmpx_lt_f64 vcc, v[2:3]
-// GFX: v_cmpx_lt_f64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0x42,0x7d]
-
-v_cmpx_lt_f64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_lt_f64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0x42,0x7d]
-
-v_cmpx_lt_f64 exec, v[2:3]
-// GFX: v_cmpx_lt_f64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0x42,0x7d]
-
-v_cmpx_lt_f64 null, v[2:3]
-// GFX: v_cmpx_lt_f64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0x42,0x7d]
-
-v_cmpx_lt_f64 -1, v[2:3]
-// GFX: v_cmpx_lt_f64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0x42,0x7d]
-
-v_cmpx_lt_f64 0.5, v[2:3]
-// GFX: v_cmpx_lt_f64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0x42,0x7d]
-
-v_cmpx_lt_f64 src_scc, v[2:3]
-// GFX: v_cmpx_lt_f64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0x42,0x7d]
-
-v_cmpx_lt_f64 0xaf123456, v[254:255]
-// GFX: v_cmpx_lt_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_lt_i16 v1.l, v2.l
-// GFX: v_cmpx_lt_i16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x62,0x7d]
-
-v_cmpx_lt_i16 v127.l, v2.l
-// GFX: v_cmpx_lt_i16_e32 v127.l, v2.l          ; encoding: [0x7f,0x05,0x62,0x7d]
-
-v_cmpx_lt_i16 s1, v2.l
-// GFX: v_cmpx_lt_i16_e32 s1, v2.l              ; encoding: [0x01,0x04,0x62,0x7d]
-
-v_cmpx_lt_i16 s105, v2.l
-// GFX: v_cmpx_lt_i16_e32 s105, v2.l            ; encoding: [0x69,0x04,0x62,0x7d]
-
-v_cmpx_lt_i16 vcc_lo, v2.l
-// GFX: v_cmpx_lt_i16_e32 vcc_lo, v2.l          ; encoding: [0x6a,0x04,0x62,0x7d]
-
-v_cmpx_lt_i16 vcc_hi, v2.l
-// GFX: v_cmpx_lt_i16_e32 vcc_hi, v2.l          ; encoding: [0x6b,0x04,0x62,0x7d]
-
-v_cmpx_lt_i16 ttmp15, v2.l
-// GFX: v_cmpx_lt_i16_e32 ttmp15, v2.l          ; encoding: [0x7b,0x04,0x62,0x7d]
-
-v_cmpx_lt_i16 m0, v2.l
-// GFX: v_cmpx_lt_i16_e32 m0, v2.l              ; encoding: [0x7d,0x04,0x62,0x7d]
-
-v_cmpx_lt_i16 exec_lo, v2.l
-// GFX: v_cmpx_lt_i16_e32 exec_lo, v2.l         ; encoding: [0x7e,0x04,0x62,0x7d]
-
-v_cmpx_lt_i16 exec_hi, v2.l
-// GFX: v_cmpx_lt_i16_e32 exec_hi, v2.l         ; encoding: [0x7f,0x04,0x62,0x7d]
-
-v_cmpx_lt_i16 null, v2.l
-// GFX: v_cmpx_lt_i16_e32 null, v2.l            ; encoding: [0x7c,0x04,0x62,0x7d]
-
-v_cmpx_lt_i16 -1, v2.l
-// GFX: v_cmpx_lt_i16_e32 -1, v2.l              ; encoding: [0xc1,0x04,0x62,0x7d]
-
-v_cmpx_lt_i16 0.5, v2.l
-// GFX: v_cmpx_lt_i16_e32 0.5, v2.l             ; encoding: [0xf0,0x04,0x62,0x7d]
-
-v_cmpx_lt_i16 src_scc, v2.l
-// GFX: v_cmpx_lt_i16_e32 src_scc, v2.l         ; encoding: [0xfd,0x04,0x62,0x7d]
-
-v_cmpx_lt_i16 0xfe0b, v127.l
-// GFX: v_cmpx_lt_i16_e32 0xfe0b, v127.l        ; encoding: [0xff,0xfe,0x62,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_lt_i16 v1.h, v2.l
-// GFX: v_cmpx_lt_i16_e32 v1.h, v2.l            ; encoding: [0x81,0x05,0x62,0x7d]
-
-v_cmpx_lt_i16 v127.h, v2.l
-// GFX: v_cmpx_lt_i16_e32 v127.h, v2.l          ; encoding: [0xff,0x05,0x62,0x7d]
-
-v_cmpx_lt_i16 src_scc, v2.h
-// GFX: v_cmpx_lt_i16_e32 src_scc, v2.h         ; encoding: [0xfd,0x04,0x63,0x7d]
-
-v_cmpx_lt_i16 0xfe0b, v127.h
-// GFX: v_cmpx_lt_i16_e32 0xfe0b, v127.h        ; encoding: [0xff,0xfe,0x63,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_lt_i32 v1, v2
-// GFX: v_cmpx_lt_i32_e32 v1, v2                ; encoding: [0x01,0x05,0x82,0x7d]
-
-v_cmpx_lt_i32 v255, v2
-// GFX: v_cmpx_lt_i32_e32 v255, v2              ; encoding: [0xff,0x05,0x82,0x7d]
-
-v_cmpx_lt_i32 s1, v2
-// GFX: v_cmpx_lt_i32_e32 s1, v2                ; encoding: [0x01,0x04,0x82,0x7d]
-
-v_cmpx_lt_i32 s105, v2
-// GFX: v_cmpx_lt_i32_e32 s105, v2              ; encoding: [0x69,0x04,0x82,0x7d]
-
-v_cmpx_lt_i32 vcc_lo, v2
-// GFX: v_cmpx_lt_i32_e32 vcc_lo, v2            ; encoding: [0x6a,0x04,0x82,0x7d]
-
-v_cmpx_lt_i32 vcc_hi, v2
-// GFX: v_cmpx_lt_i32_e32 vcc_hi, v2            ; encoding: [0x6b,0x04,0x82,0x7d]
-
-v_cmpx_lt_i32 ttmp15, v2
-// GFX: v_cmpx_lt_i32_e32 ttmp15, v2            ; encoding: [0x7b,0x04,0x82,0x7d]
-
-v_cmpx_lt_i32 m0, v2
-// GFX: v_cmpx_lt_i32_e32 m0, v2                ; encoding: [0x7d,0x04,0x82,0x7d]
-
-v_cmpx_lt_i32 exec_lo, v2
-// GFX: v_cmpx_lt_i32_e32 exec_lo, v2           ; encoding: [0x7e,0x04,0x82,0x7d]
-
-v_cmpx_lt_i32 exec_hi, v2
-// GFX: v_cmpx_lt_i32_e32 exec_hi, v2           ; encoding: [0x7f,0x04,0x82,0x7d]
-
-v_cmpx_lt_i32 null, v2
-// GFX: v_cmpx_lt_i32_e32 null, v2              ; encoding: [0x7c,0x04,0x82,0x7d]
-
-v_cmpx_lt_i32 -1, v2
-// GFX: v_cmpx_lt_i32_e32 -1, v2                ; encoding: [0xc1,0x04,0x82,0x7d]
-
-v_cmpx_lt_i32 0.5, v2
-// GFX: v_cmpx_lt_i32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x82,0x7d]
-
-v_cmpx_lt_i32 src_scc, v2
-// GFX: v_cmpx_lt_i32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x82,0x7d]
-
-v_cmpx_lt_i32 0xaf123456, v255
-// GFX: v_cmpx_lt_i32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x83,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_lt_i64 v[1:2], v[2:3]
-// GFX: v_cmpx_lt_i64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0xa2,0x7d]
-
-v_cmpx_lt_i64 v[254:255], v[2:3]
-// GFX: v_cmpx_lt_i64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0xa2,0x7d]
-
-v_cmpx_lt_i64 s[2:3], v[2:3]
-// GFX: v_cmpx_lt_i64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0xa2,0x7d]
-
-v_cmpx_lt_i64 s[104:105], v[2:3]
-// GFX: v_cmpx_lt_i64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0xa2,0x7d]
-
-v_cmpx_lt_i64 vcc, v[2:3]
-// GFX: v_cmpx_lt_i64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0xa2,0x7d]
-
-v_cmpx_lt_i64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_lt_i64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0xa2,0x7d]
-
-v_cmpx_lt_i64 exec, v[2:3]
-// GFX: v_cmpx_lt_i64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0xa2,0x7d]
-
-v_cmpx_lt_i64 null, v[2:3]
-// GFX: v_cmpx_lt_i64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0xa2,0x7d]
-
-v_cmpx_lt_i64 -1, v[2:3]
-// GFX: v_cmpx_lt_i64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0xa2,0x7d]
-
-v_cmpx_lt_i64 0.5, v[2:3]
-// GFX: v_cmpx_lt_i64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0xa2,0x7d]
-
-v_cmpx_lt_i64 src_scc, v[2:3]
-// GFX: v_cmpx_lt_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xa2,0x7d]
-
-v_cmpx_lt_i64 0xaf123456, v[254:255]
-// GFX12: v_cmpx_lt_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7d,0x56,0x34,0x12,0xaf]
-// GFX13: v_cmpx_lt_i64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa3,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-v_cmpx_lt_u16 v1.l, v2.l
-// GFX: v_cmpx_lt_u16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x72,0x7d]
-
-v_cmpx_lt_u16 v127.l, v2.l
-// GFX: v_cmpx_lt_u16_e32 v127.l, v2.l          ; encoding: [0x7f,0x05,0x72,0x7d]
-
-v_cmpx_lt_u16 s1, v2.l
-// GFX: v_cmpx_lt_u16_e32 s1, v2.l              ; encoding: [0x01,0x04,0x72,0x7d]
-
-v_cmpx_lt_u16 s105, v2.l
-// GFX: v_cmpx_lt_u16_e32 s105, v2.l            ; encoding: [0x69,0x04,0x72,0x7d]
-
-v_cmpx_lt_u16 vcc_lo, v2.l
-// GFX: v_cmpx_lt_u16_e32 vcc_lo, v2.l          ; encoding: [0x6a,0x04,0x72,0x7d]
-
-v_cmpx_lt_u16 vcc_hi, v2.l
-// GFX: v_cmpx_lt_u16_e32 vcc_hi, v2.l          ; encoding: [0x6b,0x04,0x72,0x7d]
-
-v_cmpx_lt_u16 ttmp15, v2.l
-// GFX: v_cmpx_lt_u16_e32 ttmp15, v2.l          ; encoding: [0x7b,0x04,0x72,0x7d]
-
-v_cmpx_lt_u16 m0, v2.l
-// GFX: v_cmpx_lt_u16_e32 m0, v2.l              ; encoding: [0x7d,0x04,0x72,0x7d]
-
-v_cmpx_lt_u16 exec_lo, v2.l
-// GFX: v_cmpx_lt_u16_e32 exec_lo, v2.l         ; encoding: [0x7e,0x04,0x72,0x7d]
-
-v_cmpx_lt_u16 exec_hi, v2.l
-// GFX: v_cmpx_lt_u16_e32 exec_hi, v2.l         ; encoding: [0x7f,0x04,0x72,0x7d]
-
-v_cmpx_lt_u16 null, v2.l
-// GFX: v_cmpx_lt_u16_e32 null, v2.l            ; encoding: [0x7c,0x04,0x72,0x7d]
-
-v_cmpx_lt_u16 -1, v2.l
-// GFX: v_cmpx_lt_u16_e32 -1, v2.l              ; encoding: [0xc1,0x04,0x72,0x7d]
-
-v_cmpx_lt_u16 0.5, v2.l
-// GFX: v_cmpx_lt_u16_e32 0.5, v2.l             ; encoding: [0xf0,0x04,0x72,0x7d]
-
-v_cmpx_lt_u16 src_scc, v2.l
-// GFX: v_cmpx_lt_u16_e32 src_scc, v2.l         ; encoding: [0xfd,0x04,0x72,0x7d]
-
-v_cmpx_lt_u16 0xfe0b, v127.l
-// GFX: v_cmpx_lt_u16_e32 0xfe0b, v127.l        ; encoding: [0xff,0xfe,0x72,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_lt_u16 v1.h, v2.l
-// GFX: v_cmpx_lt_u16_e32 v1.h, v2.l            ; encoding: [0x81,0x05,0x72,0x7d]
-
-v_cmpx_lt_u16 v127.h, v2.l
-// GFX: v_cmpx_lt_u16_e32 v127.h, v2.l          ; encoding: [0xff,0x05,0x72,0x7d]
-
-v_cmpx_lt_u16 src_scc, v2.h
-// GFX: v_cmpx_lt_u16_e32 src_scc, v2.h         ; encoding: [0xfd,0x04,0x73,0x7d]
-
-v_cmpx_lt_u16 0xfe0b, v127.h
-// GFX: v_cmpx_lt_u16_e32 0xfe0b, v127.h        ; encoding: [0xff,0xfe,0x73,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_lt_u32 v1, v2
-// GFX: v_cmpx_lt_u32_e32 v1, v2                ; encoding: [0x01,0x05,0x92,0x7d]
-
-v_cmpx_lt_u32 v255, v2
-// GFX: v_cmpx_lt_u32_e32 v255, v2              ; encoding: [0xff,0x05,0x92,0x7d]
-
-v_cmpx_lt_u32 s1, v2
-// GFX: v_cmpx_lt_u32_e32 s1, v2                ; encoding: [0x01,0x04,0x92,0x7d]
-
-v_cmpx_lt_u32 s105, v2
-// GFX: v_cmpx_lt_u32_e32 s105, v2              ; encoding: [0x69,0x04,0x92,0x7d]
-
-v_cmpx_lt_u32 vcc_lo, v2
-// GFX: v_cmpx_lt_u32_e32 vcc_lo, v2            ; encoding: [0x6a,0x04,0x92,0x7d]
-
-v_cmpx_lt_u32 vcc_hi, v2
-// GFX: v_cmpx_lt_u32_e32 vcc_hi, v2            ; encoding: [0x6b,0x04,0x92,0x7d]
-
-v_cmpx_lt_u32 ttmp15, v2
-// GFX: v_cmpx_lt_u32_e32 ttmp15, v2            ; encoding: [0x7b,0x04,0x92,0x7d]
-
-v_cmpx_lt_u32 m0, v2
-// GFX: v_cmpx_lt_u32_e32 m0, v2                ; encoding: [0x7d,0x04,0x92,0x7d]
-
-v_cmpx_lt_u32 exec_lo, v2
-// GFX: v_cmpx_lt_u32_e32 exec_lo, v2           ; encoding: [0x7e,0x04,0x92,0x7d]
-
-v_cmpx_lt_u32 exec_hi, v2
-// GFX: v_cmpx_lt_u32_e32 exec_hi, v2           ; encoding: [0x7f,0x04,0x92,0x7d]
-
-v_cmpx_lt_u32 null, v2
-// GFX: v_cmpx_lt_u32_e32 null, v2              ; encoding: [0x7c,0x04,0x92,0x7d]
-
-v_cmpx_lt_u32 -1, v2
-// GFX: v_cmpx_lt_u32_e32 -1, v2                ; encoding: [0xc1,0x04,0x92,0x7d]
-
-v_cmpx_lt_u32 0.5, v2
-// GFX: v_cmpx_lt_u32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x92,0x7d]
-
-v_cmpx_lt_u32 src_scc, v2
-// GFX: v_cmpx_lt_u32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x92,0x7d]
-
-v_cmpx_lt_u32 0xaf123456, v255
-// GFX: v_cmpx_lt_u32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x93,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_lt_u64 v[1:2], v[2:3]
-// GFX: v_cmpx_lt_u64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0xb2,0x7d]
-
-v_cmpx_lt_u64 v[254:255], v[2:3]
-// GFX: v_cmpx_lt_u64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0xb2,0x7d]
-
-v_cmpx_lt_u64 s[2:3], v[2:3]
-// GFX: v_cmpx_lt_u64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0xb2,0x7d]
-
-v_cmpx_lt_u64 s[104:105], v[2:3]
-// GFX: v_cmpx_lt_u64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0xb2,0x7d]
-
-v_cmpx_lt_u64 vcc, v[2:3]
-// GFX: v_cmpx_lt_u64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0xb2,0x7d]
-
-v_cmpx_lt_u64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_lt_u64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0xb2,0x7d]
-
-v_cmpx_lt_u64 exec, v[2:3]
-// GFX: v_cmpx_lt_u64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0xb2,0x7d]
-
-v_cmpx_lt_u64 null, v[2:3]
-// GFX: v_cmpx_lt_u64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0xb2,0x7d]
-
-v_cmpx_lt_u64 -1, v[2:3]
-// GFX: v_cmpx_lt_u64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0xb2,0x7d]
-
-v_cmpx_lt_u64 0.5, v[2:3]
-// GFX: v_cmpx_lt_u64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0xb2,0x7d]
-
-v_cmpx_lt_u64 src_scc, v[2:3]
-// GFX: v_cmpx_lt_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xb2,0x7d]
-
-v_cmpx_lt_u64 0xaf123456, v[254:255]
-// GFX12: v_cmpx_lt_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7d,0x56,0x34,0x12,0xaf]
-// GFX13: v_cmpx_lt_u64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb3,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-v_cmpx_ne_i16 v1.l, v2.l
-// GFX: v_cmpx_ne_i16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x6a,0x7d]
-
-v_cmpx_ne_i16 v127.l, v2.l
-// GFX: v_cmpx_ne_i16_e32 v127.l, v2.l          ; encoding: [0x7f,0x05,0x6a,0x7d]
-
-v_cmpx_ne_i16 s1, v2.l
-// GFX: v_cmpx_ne_i16_e32 s1, v2.l              ; encoding: [0x01,0x04,0x6a,0x7d]
-
-v_cmpx_ne_i16 s105, v2.l
-// GFX: v_cmpx_ne_i16_e32 s105, v2.l            ; encoding: [0x69,0x04,0x6a,0x7d]
-
-v_cmpx_ne_i16 vcc_lo, v2.l
-// GFX: v_cmpx_ne_i16_e32 vcc_lo, v2.l          ; encoding: [0x6a,0x04,0x6a,0x7d]
-
-v_cmpx_ne_i16 vcc_hi, v2.l
-// GFX: v_cmpx_ne_i16_e32 vcc_hi, v2.l          ; encoding: [0x6b,0x04,0x6a,0x7d]
-
-v_cmpx_ne_i16 ttmp15, v2.l
-// GFX: v_cmpx_ne_i16_e32 ttmp15, v2.l          ; encoding: [0x7b,0x04,0x6a,0x7d]
-
-v_cmpx_ne_i16 m0, v2.l
-// GFX: v_cmpx_ne_i16_e32 m0, v2.l              ; encoding: [0x7d,0x04,0x6a,0x7d]
-
-v_cmpx_ne_i16 exec_lo, v2.l
-// GFX: v_cmpx_ne_i16_e32 exec_lo, v2.l         ; encoding: [0x7e,0x04,0x6a,0x7d]
-
-v_cmpx_ne_i16 exec_hi, v2.l
-// GFX: v_cmpx_ne_i16_e32 exec_hi, v2.l         ; encoding: [0x7f,0x04,0x6a,0x7d]
-
-v_cmpx_ne_i16 null, v2.l
-// GFX: v_cmpx_ne_i16_e32 null, v2.l            ; encoding: [0x7c,0x04,0x6a,0x7d]
-
-v_cmpx_ne_i16 -1, v2.l
-// GFX: v_cmpx_ne_i16_e32 -1, v2.l              ; encoding: [0xc1,0x04,0x6a,0x7d]
-
-v_cmpx_ne_i16 0.5, v2.l
-// GFX: v_cmpx_ne_i16_e32 0.5, v2.l             ; encoding: [0xf0,0x04,0x6a,0x7d]
-
-v_cmpx_ne_i16 src_scc, v2.l
-// GFX: v_cmpx_ne_i16_e32 src_scc, v2.l         ; encoding: [0xfd,0x04,0x6a,0x7d]
-
-v_cmpx_ne_i16 0xfe0b, v127.l
-// GFX: v_cmpx_ne_i16_e32 0xfe0b, v127.l        ; encoding: [0xff,0xfe,0x6a,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_ne_i16 v1.h, v2.l
-// GFX: v_cmpx_ne_i16_e32 v1.h, v2.l            ; encoding: [0x81,0x05,0x6a,0x7d]
-
-v_cmpx_ne_i16 v127.h, v2.l
-// GFX: v_cmpx_ne_i16_e32 v127.h, v2.l          ; encoding: [0xff,0x05,0x6a,0x7d]
-
-v_cmpx_ne_i16 src_scc, v2.h
-// GFX: v_cmpx_ne_i16_e32 src_scc, v2.h         ; encoding: [0xfd,0x04,0x6b,0x7d]
-
-v_cmpx_ne_i16 0xfe0b, v127.h
-// GFX: v_cmpx_ne_i16_e32 0xfe0b, v127.h        ; encoding: [0xff,0xfe,0x6b,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_ne_i32 v1, v2
-// GFX: v_cmpx_ne_i32_e32 v1, v2                ; encoding: [0x01,0x05,0x8a,0x7d]
-
-v_cmpx_ne_i32 v255, v2
-// GFX: v_cmpx_ne_i32_e32 v255, v2              ; encoding: [0xff,0x05,0x8a,0x7d]
-
-v_cmpx_ne_i32 s1, v2
-// GFX: v_cmpx_ne_i32_e32 s1, v2                ; encoding: [0x01,0x04,0x8a,0x7d]
-
-v_cmpx_ne_i32 s105, v2
-// GFX: v_cmpx_ne_i32_e32 s105, v2              ; encoding: [0x69,0x04,0x8a,0x7d]
-
-v_cmpx_ne_i32 vcc_lo, v2
-// GFX: v_cmpx_ne_i32_e32 vcc_lo, v2            ; encoding: [0x6a,0x04,0x8a,0x7d]
-
-v_cmpx_ne_i32 vcc_hi, v2
-// GFX: v_cmpx_ne_i32_e32 vcc_hi, v2            ; encoding: [0x6b,0x04,0x8a,0x7d]
-
-v_cmpx_ne_i32 ttmp15, v2
-// GFX: v_cmpx_ne_i32_e32 ttmp15, v2            ; encoding: [0x7b,0x04,0x8a,0x7d]
-
-v_cmpx_ne_i32 m0, v2
-// GFX: v_cmpx_ne_i32_e32 m0, v2                ; encoding: [0x7d,0x04,0x8a,0x7d]
-
-v_cmpx_ne_i32 exec_lo, v2
-// GFX: v_cmpx_ne_i32_e32 exec_lo, v2           ; encoding: [0x7e,0x04,0x8a,0x7d]
-
-v_cmpx_ne_i32 exec_hi, v2
-// GFX: v_cmpx_ne_i32_e32 exec_hi, v2           ; encoding: [0x7f,0x04,0x8a,0x7d]
-
-v_cmpx_ne_i32 null, v2
-// GFX: v_cmpx_ne_i32_e32 null, v2              ; encoding: [0x7c,0x04,0x8a,0x7d]
-
-v_cmpx_ne_i32 -1, v2
-// GFX: v_cmpx_ne_i32_e32 -1, v2                ; encoding: [0xc1,0x04,0x8a,0x7d]
-
-v_cmpx_ne_i32 0.5, v2
-// GFX: v_cmpx_ne_i32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x8a,0x7d]
-
-v_cmpx_ne_i32 src_scc, v2
-// GFX: v_cmpx_ne_i32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x8a,0x7d]
-
-v_cmpx_ne_i32 0xaf123456, v255
-// GFX: v_cmpx_ne_i32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x8b,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_ne_i64 v[1:2], v[2:3]
-// GFX: v_cmpx_ne_i64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0xaa,0x7d]
-
-v_cmpx_ne_i64 v[254:255], v[2:3]
-// GFX: v_cmpx_ne_i64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0xaa,0x7d]
-
-v_cmpx_ne_i64 s[2:3], v[2:3]
-// GFX: v_cmpx_ne_i64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0xaa,0x7d]
-
-v_cmpx_ne_i64 s[104:105], v[2:3]
-// GFX: v_cmpx_ne_i64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0xaa,0x7d]
-
-v_cmpx_ne_i64 vcc, v[2:3]
-// GFX: v_cmpx_ne_i64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0xaa,0x7d]
-
-v_cmpx_ne_i64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_ne_i64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0xaa,0x7d]
-
-v_cmpx_ne_i64 exec, v[2:3]
-// GFX: v_cmpx_ne_i64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0xaa,0x7d]
-
-v_cmpx_ne_i64 null, v[2:3]
-// GFX: v_cmpx_ne_i64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0xaa,0x7d]
-
-v_cmpx_ne_i64 -1, v[2:3]
-// GFX: v_cmpx_ne_i64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0xaa,0x7d]
-
-v_cmpx_ne_i64 0.5, v[2:3]
-// GFX: v_cmpx_ne_i64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0xaa,0x7d]
-
-v_cmpx_ne_i64 src_scc, v[2:3]
-// GFX: v_cmpx_ne_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xaa,0x7d]
-
-v_cmpx_ne_i64 0xaf123456, v[254:255]
-// GFX12: v_cmpx_ne_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7d,0x56,0x34,0x12,0xaf]
-// GFX13: v_cmpx_ne_i64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xab,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-v_cmpx_ne_u16 v1.l, v2.l
-// GFX: v_cmpx_ne_u16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x7a,0x7d]
-
-v_cmpx_ne_u16 v127.l, v2.l
-// GFX: v_cmpx_ne_u16_e32 v127.l, v2.l          ; encoding: [0x7f,0x05,0x7a,0x7d]
-
-v_cmpx_ne_u16 s1, v2.l
-// GFX: v_cmpx_ne_u16_e32 s1, v2.l              ; encoding: [0x01,0x04,0x7a,0x7d]
-
-v_cmpx_ne_u16 s105, v2.l
-// GFX: v_cmpx_ne_u16_e32 s105, v2.l            ; encoding: [0x69,0x04,0x7a,0x7d]
-
-v_cmpx_ne_u16 vcc_lo, v2.l
-// GFX: v_cmpx_ne_u16_e32 vcc_lo, v2.l          ; encoding: [0x6a,0x04,0x7a,0x7d]
-
-v_cmpx_ne_u16 vcc_hi, v2.l
-// GFX: v_cmpx_ne_u16_e32 vcc_hi, v2.l          ; encoding: [0x6b,0x04,0x7a,0x7d]
-
-v_cmpx_ne_u16 ttmp15, v2.l
-// GFX: v_cmpx_ne_u16_e32 ttmp15, v2.l          ; encoding: [0x7b,0x04,0x7a,0x7d]
-
-v_cmpx_ne_u16 m0, v2.l
-// GFX: v_cmpx_ne_u16_e32 m0, v2.l              ; encoding: [0x7d,0x04,0x7a,0x7d]
-
-v_cmpx_ne_u16 exec_lo, v2.l
-// GFX: v_cmpx_ne_u16_e32 exec_lo, v2.l         ; encoding: [0x7e,0x04,0x7a,0x7d]
-
-v_cmpx_ne_u16 exec_hi, v2.l
-// GFX: v_cmpx_ne_u16_e32 exec_hi, v2.l         ; encoding: [0x7f,0x04,0x7a,0x7d]
-
-v_cmpx_ne_u16 null, v2.l
-// GFX: v_cmpx_ne_u16_e32 null, v2.l            ; encoding: [0x7c,0x04,0x7a,0x7d]
-
-v_cmpx_ne_u16 -1, v2.l
-// GFX: v_cmpx_ne_u16_e32 -1, v2.l              ; encoding: [0xc1,0x04,0x7a,0x7d]
-
-v_cmpx_ne_u16 0.5, v2.l
-// GFX: v_cmpx_ne_u16_e32 0.5, v2.l             ; encoding: [0xf0,0x04,0x7a,0x7d]
-
-v_cmpx_ne_u16 src_scc, v2.l
-// GFX: v_cmpx_ne_u16_e32 src_scc, v2.l         ; encoding: [0xfd,0x04,0x7a,0x7d]
-
-v_cmpx_ne_u16 0xfe0b, v127.l
-// GFX: v_cmpx_ne_u16_e32 0xfe0b, v127.l        ; encoding: [0xff,0xfe,0x7a,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_ne_u16 v1.h, v2.l
-// GFX: v_cmpx_ne_u16_e32 v1.h, v2.l            ; encoding: [0x81,0x05,0x7a,0x7d]
-
-v_cmpx_ne_u16 v127.h, v2.l
-// GFX: v_cmpx_ne_u16_e32 v127.h, v2.l          ; encoding: [0xff,0x05,0x7a,0x7d]
-
-v_cmpx_ne_u16 src_scc, v2.h
-// GFX: v_cmpx_ne_u16_e32 src_scc, v2.h         ; encoding: [0xfd,0x04,0x7b,0x7d]
-
-v_cmpx_ne_u16 0xfe0b, v127.h
-// GFX: v_cmpx_ne_u16_e32 0xfe0b, v127.h        ; encoding: [0xff,0xfe,0x7b,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_ne_u32 v1, v2
-// GFX: v_cmpx_ne_u32_e32 v1, v2                ; encoding: [0x01,0x05,0x9a,0x7d]
-
-v_cmpx_ne_u32 v255, v2
-// GFX: v_cmpx_ne_u32_e32 v255, v2              ; encoding: [0xff,0x05,0x9a,0x7d]
-
-v_cmpx_ne_u32 s1, v2
-// GFX: v_cmpx_ne_u32_e32 s1, v2                ; encoding: [0x01,0x04,0x9a,0x7d]
-
-v_cmpx_ne_u32 s105, v2
-// GFX: v_cmpx_ne_u32_e32 s105, v2              ; encoding: [0x69,0x04,0x9a,0x7d]
-
-v_cmpx_ne_u32 vcc_lo, v2
-// GFX: v_cmpx_ne_u32_e32 vcc_lo, v2            ; encoding: [0x6a,0x04,0x9a,0x7d]
-
-v_cmpx_ne_u32 vcc_hi, v2
-// GFX: v_cmpx_ne_u32_e32 vcc_hi, v2            ; encoding: [0x6b,0x04,0x9a,0x7d]
-
-v_cmpx_ne_u32 ttmp15, v2
-// GFX: v_cmpx_ne_u32_e32 ttmp15, v2            ; encoding: [0x7b,0x04,0x9a,0x7d]
-
-v_cmpx_ne_u32 m0, v2
-// GFX: v_cmpx_ne_u32_e32 m0, v2                ; encoding: [0x7d,0x04,0x9a,0x7d]
-
-v_cmpx_ne_u32 exec_lo, v2
-// GFX: v_cmpx_ne_u32_e32 exec_lo, v2           ; encoding: [0x7e,0x04,0x9a,0x7d]
-
-v_cmpx_ne_u32 exec_hi, v2
-// GFX: v_cmpx_ne_u32_e32 exec_hi, v2           ; encoding: [0x7f,0x04,0x9a,0x7d]
-
-v_cmpx_ne_u32 null, v2
-// GFX: v_cmpx_ne_u32_e32 null, v2              ; encoding: [0x7c,0x04,0x9a,0x7d]
-
-v_cmpx_ne_u32 -1, v2
-// GFX: v_cmpx_ne_u32_e32 -1, v2                ; encoding: [0xc1,0x04,0x9a,0x7d]
-
-v_cmpx_ne_u32 0.5, v2
-// GFX: v_cmpx_ne_u32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x9a,0x7d]
-
-v_cmpx_ne_u32 src_scc, v2
-// GFX: v_cmpx_ne_u32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x9a,0x7d]
-
-v_cmpx_ne_u32 0xaf123456, v255
-// GFX: v_cmpx_ne_u32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x9b,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_ne_u64 v[1:2], v[2:3]
-// GFX: v_cmpx_ne_u64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0xba,0x7d]
-
-v_cmpx_ne_u64 v[254:255], v[2:3]
-// GFX: v_cmpx_ne_u64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0xba,0x7d]
-
-v_cmpx_ne_u64 s[2:3], v[2:3]
-// GFX: v_cmpx_ne_u64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0xba,0x7d]
-
-v_cmpx_ne_u64 s[104:105], v[2:3]
-// GFX: v_cmpx_ne_u64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0xba,0x7d]
-
-v_cmpx_ne_u64 vcc, v[2:3]
-// GFX: v_cmpx_ne_u64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0xba,0x7d]
-
-v_cmpx_ne_u64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_ne_u64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0xba,0x7d]
-
-v_cmpx_ne_u64 exec, v[2:3]
-// GFX: v_cmpx_ne_u64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0xba,0x7d]
-
-v_cmpx_ne_u64 null, v[2:3]
-// GFX: v_cmpx_ne_u64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0xba,0x7d]
-
-v_cmpx_ne_u64 -1, v[2:3]
-// GFX: v_cmpx_ne_u64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0xba,0x7d]
-
-v_cmpx_ne_u64 0.5, v[2:3]
-// GFX: v_cmpx_ne_u64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0xba,0x7d]
-
-v_cmpx_ne_u64 src_scc, v[2:3]
-// GFX: v_cmpx_ne_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xba,0x7d]
-
-v_cmpx_ne_u64 0xaf123456, v[254:255]
-// GFX12: v_cmpx_ne_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7d,0x56,0x34,0x12,0xaf]
-// GFX13: v_cmpx_ne_u64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xbb,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-v_cmpx_neq_f16 v1.l, v2.l
-// GFX: v_cmpx_neq_f16_e32 v1.l, v2.l           ; encoding: [0x01,0x05,0x1a,0x7d]
-
-v_cmpx_neq_f16 v127.l, v2.l
-// GFX: v_cmpx_neq_f16_e32 v127.l, v2.l         ; encoding: [0x7f,0x05,0x1a,0x7d]
-
-v_cmpx_neq_f16 s1, v2.l
-// GFX: v_cmpx_neq_f16_e32 s1, v2.l             ; encoding: [0x01,0x04,0x1a,0x7d]
-
-v_cmpx_neq_f16 s105, v2.l
-// GFX: v_cmpx_neq_f16_e32 s105, v2.l           ; encoding: [0x69,0x04,0x1a,0x7d]
-
-v_cmpx_neq_f16 vcc_lo, v2.l
-// GFX: v_cmpx_neq_f16_e32 vcc_lo, v2.l         ; encoding: [0x6a,0x04,0x1a,0x7d]
-
-v_cmpx_neq_f16 vcc_hi, v2.l
-// GFX: v_cmpx_neq_f16_e32 vcc_hi, v2.l         ; encoding: [0x6b,0x04,0x1a,0x7d]
-
-v_cmpx_neq_f16 ttmp15, v2.l
-// GFX: v_cmpx_neq_f16_e32 ttmp15, v2.l         ; encoding: [0x7b,0x04,0x1a,0x7d]
-
-v_cmpx_neq_f16 m0, v2.l
-// GFX: v_cmpx_neq_f16_e32 m0, v2.l             ; encoding: [0x7d,0x04,0x1a,0x7d]
-
-v_cmpx_neq_f16 exec_lo, v2.l
-// GFX: v_cmpx_neq_f16_e32 exec_lo, v2.l        ; encoding: [0x7e,0x04,0x1a,0x7d]
-
-v_cmpx_neq_f16 exec_hi, v2.l
-// GFX: v_cmpx_neq_f16_e32 exec_hi, v2.l        ; encoding: [0x7f,0x04,0x1a,0x7d]
-
-v_cmpx_neq_f16 null, v2.l
-// GFX: v_cmpx_neq_f16_e32 null, v2.l           ; encoding: [0x7c,0x04,0x1a,0x7d]
-
-v_cmpx_neq_f16 -1, v2.l
-// GFX: v_cmpx_neq_f16_e32 -1, v2.l             ; encoding: [0xc1,0x04,0x1a,0x7d]
-
-v_cmpx_neq_f16 0.5, v2.l
-// GFX: v_cmpx_neq_f16_e32 0.5, v2.l            ; encoding: [0xf0,0x04,0x1a,0x7d]
-
-v_cmpx_neq_f16 src_scc, v2.l
-// GFX: v_cmpx_neq_f16_e32 src_scc, v2.l        ; encoding: [0xfd,0x04,0x1a,0x7d]
-
-v_cmpx_neq_f16 0xfe0b, v127.l
-// GFX: v_cmpx_neq_f16_e32 0xfe0b, v127.l       ; encoding: [0xff,0xfe,0x1a,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_neq_f16 v1.h, v2.l
-// GFX: v_cmpx_neq_f16_e32 v1.h, v2.l           ; encoding: [0x81,0x05,0x1a,0x7d]
-
-v_cmpx_neq_f16 v127.h, v2.l
-// GFX: v_cmpx_neq_f16_e32 v127.h, v2.l         ; encoding: [0xff,0x05,0x1a,0x7d]
-
-v_cmpx_neq_f16 src_scc, v2.h
-// GFX: v_cmpx_neq_f16_e32 src_scc, v2.h        ; encoding: [0xfd,0x04,0x1b,0x7d]
-
-v_cmpx_neq_f16 0xfe0b, v127.h
-// GFX: v_cmpx_neq_f16_e32 0xfe0b, v127.h       ; encoding: [0xff,0xfe,0x1b,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_neq_f32 v1, v2
-// GFX: v_cmpx_neq_f32_e32 v1, v2               ; encoding: [0x01,0x05,0x3a,0x7d]
-
-v_cmpx_neq_f32 v255, v2
-// GFX: v_cmpx_neq_f32_e32 v255, v2             ; encoding: [0xff,0x05,0x3a,0x7d]
-
-v_cmpx_neq_f32 s1, v2
-// GFX: v_cmpx_neq_f32_e32 s1, v2               ; encoding: [0x01,0x04,0x3a,0x7d]
-
-v_cmpx_neq_f32 s105, v2
-// GFX: v_cmpx_neq_f32_e32 s105, v2             ; encoding: [0x69,0x04,0x3a,0x7d]
-
-v_cmpx_neq_f32 vcc_lo, v2
-// GFX: v_cmpx_neq_f32_e32 vcc_lo, v2           ; encoding: [0x6a,0x04,0x3a,0x7d]
-
-v_cmpx_neq_f32 vcc_hi, v2
-// GFX: v_cmpx_neq_f32_e32 vcc_hi, v2           ; encoding: [0x6b,0x04,0x3a,0x7d]
-
-v_cmpx_neq_f32 ttmp15, v2
-// GFX: v_cmpx_neq_f32_e32 ttmp15, v2           ; encoding: [0x7b,0x04,0x3a,0x7d]
-
-v_cmpx_neq_f32 m0, v2
-// GFX: v_cmpx_neq_f32_e32 m0, v2               ; encoding: [0x7d,0x04,0x3a,0x7d]
-
-v_cmpx_neq_f32 exec_lo, v2
-// GFX: v_cmpx_neq_f32_e32 exec_lo, v2          ; encoding: [0x7e,0x04,0x3a,0x7d]
-
-v_cmpx_neq_f32 exec_hi, v2
-// GFX: v_cmpx_neq_f32_e32 exec_hi, v2          ; encoding: [0x7f,0x04,0x3a,0x7d]
-
-v_cmpx_neq_f32 null, v2
-// GFX: v_cmpx_neq_f32_e32 null, v2             ; encoding: [0x7c,0x04,0x3a,0x7d]
-
-v_cmpx_neq_f32 -1, v2
-// GFX: v_cmpx_neq_f32_e32 -1, v2               ; encoding: [0xc1,0x04,0x3a,0x7d]
-
-v_cmpx_neq_f32 0.5, v2
-// GFX: v_cmpx_neq_f32_e32 0.5, v2              ; encoding: [0xf0,0x04,0x3a,0x7d]
-
-v_cmpx_neq_f32 src_scc, v2
-// GFX: v_cmpx_neq_f32_e32 src_scc, v2          ; encoding: [0xfd,0x04,0x3a,0x7d]
-
-v_cmpx_neq_f32 0xaf123456, v255
-// GFX: v_cmpx_neq_f32_e32 0xaf123456, v255     ; encoding: [0xff,0xfe,0x3b,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_neq_f64 v[1:2], v[2:3]
-// GFX: v_cmpx_neq_f64_e32 v[1:2], v[2:3]       ; encoding: [0x01,0x05,0x5a,0x7d]
-
-v_cmpx_neq_f64 v[254:255], v[2:3]
-// GFX: v_cmpx_neq_f64_e32 v[254:255], v[2:3]   ; encoding: [0xfe,0x05,0x5a,0x7d]
-
-v_cmpx_neq_f64 s[2:3], v[2:3]
-// GFX: v_cmpx_neq_f64_e32 s[2:3], v[2:3]       ; encoding: [0x02,0x04,0x5a,0x7d]
-
-v_cmpx_neq_f64 s[104:105], v[2:3]
-// GFX: v_cmpx_neq_f64_e32 s[104:105], v[2:3]   ; encoding: [0x68,0x04,0x5a,0x7d]
-
-v_cmpx_neq_f64 vcc, v[2:3]
-// GFX: v_cmpx_neq_f64_e32 vcc, v[2:3]          ; encoding: [0x6a,0x04,0x5a,0x7d]
-
-v_cmpx_neq_f64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_neq_f64_e32 ttmp[14:15], v[2:3]  ; encoding: [0x7a,0x04,0x5a,0x7d]
-
-v_cmpx_neq_f64 exec, v[2:3]
-// GFX: v_cmpx_neq_f64_e32 exec, v[2:3]         ; encoding: [0x7e,0x04,0x5a,0x7d]
-
-v_cmpx_neq_f64 null, v[2:3]
-// GFX: v_cmpx_neq_f64_e32 null, v[2:3]         ; encoding: [0x7c,0x04,0x5a,0x7d]
-
-v_cmpx_neq_f64 -1, v[2:3]
-// GFX: v_cmpx_neq_f64_e32 -1, v[2:3]           ; encoding: [0xc1,0x04,0x5a,0x7d]
-
-v_cmpx_neq_f64 0.5, v[2:3]
-// GFX: v_cmpx_neq_f64_e32 0.5, v[2:3]          ; encoding: [0xf0,0x04,0x5a,0x7d]
-
-v_cmpx_neq_f64 src_scc, v[2:3]
-// GFX: v_cmpx_neq_f64_e32 src_scc, v[2:3]      ; encoding: [0xfd,0x04,0x5a,0x7d]
-
-v_cmpx_neq_f64 0xaf123456, v[254:255]
-// GFX: v_cmpx_neq_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_nge_f16 v1.l, v2.l
-// GFX: v_cmpx_nge_f16_e32 v1.l, v2.l           ; encoding: [0x01,0x05,0x12,0x7d]
-
-v_cmpx_nge_f16 v127.l, v2.l
-// GFX: v_cmpx_nge_f16_e32 v127.l, v2.l         ; encoding: [0x7f,0x05,0x12,0x7d]
-
-v_cmpx_nge_f16 s1, v2.l
-// GFX: v_cmpx_nge_f16_e32 s1, v2.l             ; encoding: [0x01,0x04,0x12,0x7d]
-
-v_cmpx_nge_f16 s105, v2.l
-// GFX: v_cmpx_nge_f16_e32 s105, v2.l           ; encoding: [0x69,0x04,0x12,0x7d]
-
-v_cmpx_nge_f16 vcc_lo, v2.l
-// GFX: v_cmpx_nge_f16_e32 vcc_lo, v2.l         ; encoding: [0x6a,0x04,0x12,0x7d]
-
-v_cmpx_nge_f16 vcc_hi, v2.l
-// GFX: v_cmpx_nge_f16_e32 vcc_hi, v2.l         ; encoding: [0x6b,0x04,0x12,0x7d]
-
-v_cmpx_nge_f16 ttmp15, v2.l
-// GFX: v_cmpx_nge_f16_e32 ttmp15, v2.l         ; encoding: [0x7b,0x04,0x12,0x7d]
-
-v_cmpx_nge_f16 m0, v2.l
-// GFX: v_cmpx_nge_f16_e32 m0, v2.l             ; encoding: [0x7d,0x04,0x12,0x7d]
-
-v_cmpx_nge_f16 exec_lo, v2.l
-// GFX: v_cmpx_nge_f16_e32 exec_lo, v2.l        ; encoding: [0x7e,0x04,0x12,0x7d]
-
-v_cmpx_nge_f16 exec_hi, v2.l
-// GFX: v_cmpx_nge_f16_e32 exec_hi, v2.l        ; encoding: [0x7f,0x04,0x12,0x7d]
-
-v_cmpx_nge_f16 null, v2.l
-// GFX: v_cmpx_nge_f16_e32 null, v2.l           ; encoding: [0x7c,0x04,0x12,0x7d]
-
-v_cmpx_nge_f16 -1, v2.l
-// GFX: v_cmpx_nge_f16_e32 -1, v2.l             ; encoding: [0xc1,0x04,0x12,0x7d]
-
-v_cmpx_nge_f16 0.5, v2.l
-// GFX: v_cmpx_nge_f16_e32 0.5, v2.l            ; encoding: [0xf0,0x04,0x12,0x7d]
-
-v_cmpx_nge_f16 src_scc, v2.l
-// GFX: v_cmpx_nge_f16_e32 src_scc, v2.l        ; encoding: [0xfd,0x04,0x12,0x7d]
-
-v_cmpx_nge_f16 0xfe0b, v127.l
-// GFX: v_cmpx_nge_f16_e32 0xfe0b, v127.l       ; encoding: [0xff,0xfe,0x12,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_nge_f16 v1.h, v2.l
-// GFX: v_cmpx_nge_f16_e32 v1.h, v2.l           ; encoding: [0x81,0x05,0x12,0x7d]
-
-v_cmpx_nge_f16 v127.h, v2.l
-// GFX: v_cmpx_nge_f16_e32 v127.h, v2.l         ; encoding: [0xff,0x05,0x12,0x7d]
-
-v_cmpx_nge_f16 src_scc, v2.h
-// GFX: v_cmpx_nge_f16_e32 src_scc, v2.h        ; encoding: [0xfd,0x04,0x13,0x7d]
-
-v_cmpx_nge_f16 0xfe0b, v127.h
-// GFX: v_cmpx_nge_f16_e32 0xfe0b, v127.h       ; encoding: [0xff,0xfe,0x13,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_nge_f32 v1, v2
-// GFX: v_cmpx_nge_f32_e32 v1, v2               ; encoding: [0x01,0x05,0x32,0x7d]
-
-v_cmpx_nge_f32 v255, v2
-// GFX: v_cmpx_nge_f32_e32 v255, v2             ; encoding: [0xff,0x05,0x32,0x7d]
-
-v_cmpx_nge_f32 s1, v2
-// GFX: v_cmpx_nge_f32_e32 s1, v2               ; encoding: [0x01,0x04,0x32,0x7d]
-
-v_cmpx_nge_f32 s105, v2
-// GFX: v_cmpx_nge_f32_e32 s105, v2             ; encoding: [0x69,0x04,0x32,0x7d]
-
-v_cmpx_nge_f32 vcc_lo, v2
-// GFX: v_cmpx_nge_f32_e32 vcc_lo, v2           ; encoding: [0x6a,0x04,0x32,0x7d]
-
-v_cmpx_nge_f32 vcc_hi, v2
-// GFX: v_cmpx_nge_f32_e32 vcc_hi, v2           ; encoding: [0x6b,0x04,0x32,0x7d]
-
-v_cmpx_nge_f32 ttmp15, v2
-// GFX: v_cmpx_nge_f32_e32 ttmp15, v2           ; encoding: [0x7b,0x04,0x32,0x7d]
-
-v_cmpx_nge_f32 m0, v2
-// GFX: v_cmpx_nge_f32_e32 m0, v2               ; encoding: [0x7d,0x04,0x32,0x7d]
-
-v_cmpx_nge_f32 exec_lo, v2
-// GFX: v_cmpx_nge_f32_e32 exec_lo, v2          ; encoding: [0x7e,0x04,0x32,0x7d]
-
-v_cmpx_nge_f32 exec_hi, v2
-// GFX: v_cmpx_nge_f32_e32 exec_hi, v2          ; encoding: [0x7f,0x04,0x32,0x7d]
-
-v_cmpx_nge_f32 null, v2
-// GFX: v_cmpx_nge_f32_e32 null, v2             ; encoding: [0x7c,0x04,0x32,0x7d]
-
-v_cmpx_nge_f32 -1, v2
-// GFX: v_cmpx_nge_f32_e32 -1, v2               ; encoding: [0xc1,0x04,0x32,0x7d]
-
-v_cmpx_nge_f32 0.5, v2
-// GFX: v_cmpx_nge_f32_e32 0.5, v2              ; encoding: [0xf0,0x04,0x32,0x7d]
-
-v_cmpx_nge_f32 src_scc, v2
-// GFX: v_cmpx_nge_f32_e32 src_scc, v2          ; encoding: [0xfd,0x04,0x32,0x7d]
-
-v_cmpx_nge_f32 0xaf123456, v255
-// GFX: v_cmpx_nge_f32_e32 0xaf123456, v255     ; encoding: [0xff,0xfe,0x33,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_nge_f64 v[1:2], v[2:3]
-// GFX: v_cmpx_nge_f64_e32 v[1:2], v[2:3]       ; encoding: [0x01,0x05,0x52,0x7d]
-
-v_cmpx_nge_f64 v[254:255], v[2:3]
-// GFX: v_cmpx_nge_f64_e32 v[254:255], v[2:3]   ; encoding: [0xfe,0x05,0x52,0x7d]
-
-v_cmpx_nge_f64 s[2:3], v[2:3]
-// GFX: v_cmpx_nge_f64_e32 s[2:3], v[2:3]       ; encoding: [0x02,0x04,0x52,0x7d]
-
-v_cmpx_nge_f64 s[104:105], v[2:3]
-// GFX: v_cmpx_nge_f64_e32 s[104:105], v[2:3]   ; encoding: [0x68,0x04,0x52,0x7d]
-
-v_cmpx_nge_f64 vcc, v[2:3]
-// GFX: v_cmpx_nge_f64_e32 vcc, v[2:3]          ; encoding: [0x6a,0x04,0x52,0x7d]
-
-v_cmpx_nge_f64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_nge_f64_e32 ttmp[14:15], v[2:3]  ; encoding: [0x7a,0x04,0x52,0x7d]
-
-v_cmpx_nge_f64 exec, v[2:3]
-// GFX: v_cmpx_nge_f64_e32 exec, v[2:3]         ; encoding: [0x7e,0x04,0x52,0x7d]
-
-v_cmpx_nge_f64 null, v[2:3]
-// GFX: v_cmpx_nge_f64_e32 null, v[2:3]         ; encoding: [0x7c,0x04,0x52,0x7d]
-
-v_cmpx_nge_f64 -1, v[2:3]
-// GFX: v_cmpx_nge_f64_e32 -1, v[2:3]           ; encoding: [0xc1,0x04,0x52,0x7d]
-
-v_cmpx_nge_f64 0.5, v[2:3]
-// GFX: v_cmpx_nge_f64_e32 0.5, v[2:3]          ; encoding: [0xf0,0x04,0x52,0x7d]
-
-v_cmpx_nge_f64 src_scc, v[2:3]
-// GFX: v_cmpx_nge_f64_e32 src_scc, v[2:3]      ; encoding: [0xfd,0x04,0x52,0x7d]
-
-v_cmpx_nge_f64 0xaf123456, v[254:255]
-// GFX: v_cmpx_nge_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_ngt_f16 v1.l, v2.l
-// GFX: v_cmpx_ngt_f16_e32 v1.l, v2.l           ; encoding: [0x01,0x05,0x16,0x7d]
-
-v_cmpx_ngt_f16 v127.l, v2.l
-// GFX: v_cmpx_ngt_f16_e32 v127.l, v2.l         ; encoding: [0x7f,0x05,0x16,0x7d]
-
-v_cmpx_ngt_f16 s1, v2.l
-// GFX: v_cmpx_ngt_f16_e32 s1, v2.l             ; encoding: [0x01,0x04,0x16,0x7d]
-
-v_cmpx_ngt_f16 s105, v2.l
-// GFX: v_cmpx_ngt_f16_e32 s105, v2.l           ; encoding: [0x69,0x04,0x16,0x7d]
-
-v_cmpx_ngt_f16 vcc_lo, v2.l
-// GFX: v_cmpx_ngt_f16_e32 vcc_lo, v2.l         ; encoding: [0x6a,0x04,0x16,0x7d]
-
-v_cmpx_ngt_f16 vcc_hi, v2.l
-// GFX: v_cmpx_ngt_f16_e32 vcc_hi, v2.l         ; encoding: [0x6b,0x04,0x16,0x7d]
-
-v_cmpx_ngt_f16 ttmp15, v2.l
-// GFX: v_cmpx_ngt_f16_e32 ttmp15, v2.l         ; encoding: [0x7b,0x04,0x16,0x7d]
-
-v_cmpx_ngt_f16 m0, v2.l
-// GFX: v_cmpx_ngt_f16_e32 m0, v2.l             ; encoding: [0x7d,0x04,0x16,0x7d]
-
-v_cmpx_ngt_f16 exec_lo, v2.l
-// GFX: v_cmpx_ngt_f16_e32 exec_lo, v2.l        ; encoding: [0x7e,0x04,0x16,0x7d]
-
-v_cmpx_ngt_f16 exec_hi, v2.l
-// GFX: v_cmpx_ngt_f16_e32 exec_hi, v2.l        ; encoding: [0x7f,0x04,0x16,0x7d]
-
-v_cmpx_ngt_f16 null, v2.l
-// GFX: v_cmpx_ngt_f16_e32 null, v2.l           ; encoding: [0x7c,0x04,0x16,0x7d]
-
-v_cmpx_ngt_f16 -1, v2.l
-// GFX: v_cmpx_ngt_f16_e32 -1, v2.l             ; encoding: [0xc1,0x04,0x16,0x7d]
-
-v_cmpx_ngt_f16 0.5, v2.l
-// GFX: v_cmpx_ngt_f16_e32 0.5, v2.l            ; encoding: [0xf0,0x04,0x16,0x7d]
-
-v_cmpx_ngt_f16 src_scc, v2.l
-// GFX: v_cmpx_ngt_f16_e32 src_scc, v2.l        ; encoding: [0xfd,0x04,0x16,0x7d]
-
-v_cmpx_ngt_f16 0xfe0b, v127.l
-// GFX: v_cmpx_ngt_f16_e32 0xfe0b, v127.l       ; encoding: [0xff,0xfe,0x16,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_ngt_f16 v1.h, v2.l
-// GFX: v_cmpx_ngt_f16_e32 v1.h, v2.l           ; encoding: [0x81,0x05,0x16,0x7d]
-
-v_cmpx_ngt_f16 v127.h, v2.l
-// GFX: v_cmpx_ngt_f16_e32 v127.h, v2.l         ; encoding: [0xff,0x05,0x16,0x7d]
-
-v_cmpx_ngt_f16 src_scc, v2.h
-// GFX: v_cmpx_ngt_f16_e32 src_scc, v2.h        ; encoding: [0xfd,0x04,0x17,0x7d]
-
-v_cmpx_ngt_f16 0xfe0b, v127.h
-// GFX: v_cmpx_ngt_f16_e32 0xfe0b, v127.h       ; encoding: [0xff,0xfe,0x17,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_ngt_f32 v1, v2
-// GFX: v_cmpx_ngt_f32_e32 v1, v2               ; encoding: [0x01,0x05,0x36,0x7d]
-
-v_cmpx_ngt_f32 v255, v2
-// GFX: v_cmpx_ngt_f32_e32 v255, v2             ; encoding: [0xff,0x05,0x36,0x7d]
-
-v_cmpx_ngt_f32 s1, v2
-// GFX: v_cmpx_ngt_f32_e32 s1, v2               ; encoding: [0x01,0x04,0x36,0x7d]
-
-v_cmpx_ngt_f32 s105, v2
-// GFX: v_cmpx_ngt_f32_e32 s105, v2             ; encoding: [0x69,0x04,0x36,0x7d]
-
-v_cmpx_ngt_f32 vcc_lo, v2
-// GFX: v_cmpx_ngt_f32_e32 vcc_lo, v2           ; encoding: [0x6a,0x04,0x36,0x7d]
-
-v_cmpx_ngt_f32 vcc_hi, v2
-// GFX: v_cmpx_ngt_f32_e32 vcc_hi, v2           ; encoding: [0x6b,0x04,0x36,0x7d]
-
-v_cmpx_ngt_f32 ttmp15, v2
-// GFX: v_cmpx_ngt_f32_e32 ttmp15, v2           ; encoding: [0x7b,0x04,0x36,0x7d]
-
-v_cmpx_ngt_f32 m0, v2
-// GFX: v_cmpx_ngt_f32_e32 m0, v2               ; encoding: [0x7d,0x04,0x36,0x7d]
-
-v_cmpx_ngt_f32 exec_lo, v2
-// GFX: v_cmpx_ngt_f32_e32 exec_lo, v2          ; encoding: [0x7e,0x04,0x36,0x7d]
-
-v_cmpx_ngt_f32 exec_hi, v2
-// GFX: v_cmpx_ngt_f32_e32 exec_hi, v2          ; encoding: [0x7f,0x04,0x36,0x7d]
-
-v_cmpx_ngt_f32 null, v2
-// GFX: v_cmpx_ngt_f32_e32 null, v2             ; encoding: [0x7c,0x04,0x36,0x7d]
-
-v_cmpx_ngt_f32 -1, v2
-// GFX: v_cmpx_ngt_f32_e32 -1, v2               ; encoding: [0xc1,0x04,0x36,0x7d]
-
-v_cmpx_ngt_f32 0.5, v2
-// GFX: v_cmpx_ngt_f32_e32 0.5, v2              ; encoding: [0xf0,0x04,0x36,0x7d]
-
-v_cmpx_ngt_f32 src_scc, v2
-// GFX: v_cmpx_ngt_f32_e32 src_scc, v2          ; encoding: [0xfd,0x04,0x36,0x7d]
-
-v_cmpx_ngt_f32 0xaf123456, v255
-// GFX: v_cmpx_ngt_f32_e32 0xaf123456, v255     ; encoding: [0xff,0xfe,0x37,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_ngt_f64 v[1:2], v[2:3]
-// GFX: v_cmpx_ngt_f64_e32 v[1:2], v[2:3]       ; encoding: [0x01,0x05,0x56,0x7d]
-
-v_cmpx_ngt_f64 v[254:255], v[2:3]
-// GFX: v_cmpx_ngt_f64_e32 v[254:255], v[2:3]   ; encoding: [0xfe,0x05,0x56,0x7d]
-
-v_cmpx_ngt_f64 s[2:3], v[2:3]
-// GFX: v_cmpx_ngt_f64_e32 s[2:3], v[2:3]       ; encoding: [0x02,0x04,0x56,0x7d]
-
-v_cmpx_ngt_f64 s[104:105], v[2:3]
-// GFX: v_cmpx_ngt_f64_e32 s[104:105], v[2:3]   ; encoding: [0x68,0x04,0x56,0x7d]
-
-v_cmpx_ngt_f64 vcc, v[2:3]
-// GFX: v_cmpx_ngt_f64_e32 vcc, v[2:3]          ; encoding: [0x6a,0x04,0x56,0x7d]
-
-v_cmpx_ngt_f64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_ngt_f64_e32 ttmp[14:15], v[2:3]  ; encoding: [0x7a,0x04,0x56,0x7d]
-
-v_cmpx_ngt_f64 exec, v[2:3]
-// GFX: v_cmpx_ngt_f64_e32 exec, v[2:3]         ; encoding: [0x7e,0x04,0x56,0x7d]
-
-v_cmpx_ngt_f64 null, v[2:3]
-// GFX: v_cmpx_ngt_f64_e32 null, v[2:3]         ; encoding: [0x7c,0x04,0x56,0x7d]
-
-v_cmpx_ngt_f64 -1, v[2:3]
-// GFX: v_cmpx_ngt_f64_e32 -1, v[2:3]           ; encoding: [0xc1,0x04,0x56,0x7d]
-
-v_cmpx_ngt_f64 0.5, v[2:3]
-// GFX: v_cmpx_ngt_f64_e32 0.5, v[2:3]          ; encoding: [0xf0,0x04,0x56,0x7d]
-
-v_cmpx_ngt_f64 src_scc, v[2:3]
-// GFX: v_cmpx_ngt_f64_e32 src_scc, v[2:3]      ; encoding: [0xfd,0x04,0x56,0x7d]
-
-v_cmpx_ngt_f64 0xaf123456, v[254:255]
-// GFX: v_cmpx_ngt_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_nle_f16 v1.l, v2.l
-// GFX: v_cmpx_nle_f16_e32 v1.l, v2.l           ; encoding: [0x01,0x05,0x18,0x7d]
-
-v_cmpx_nle_f16 v127.l, v2.l
-// GFX: v_cmpx_nle_f16_e32 v127.l, v2.l         ; encoding: [0x7f,0x05,0x18,0x7d]
-
-v_cmpx_nle_f16 s1, v2.l
-// GFX: v_cmpx_nle_f16_e32 s1, v2.l             ; encoding: [0x01,0x04,0x18,0x7d]
-
-v_cmpx_nle_f16 s105, v2.l
-// GFX: v_cmpx_nle_f16_e32 s105, v2.l           ; encoding: [0x69,0x04,0x18,0x7d]
-
-v_cmpx_nle_f16 vcc_lo, v2.l
-// GFX: v_cmpx_nle_f16_e32 vcc_lo, v2.l         ; encoding: [0x6a,0x04,0x18,0x7d]
-
-v_cmpx_nle_f16 vcc_hi, v2.l
-// GFX: v_cmpx_nle_f16_e32 vcc_hi, v2.l         ; encoding: [0x6b,0x04,0x18,0x7d]
-
-v_cmpx_nle_f16 ttmp15, v2.l
-// GFX: v_cmpx_nle_f16_e32 ttmp15, v2.l         ; encoding: [0x7b,0x04,0x18,0x7d]
-
-v_cmpx_nle_f16 m0, v2.l
-// GFX: v_cmpx_nle_f16_e32 m0, v2.l             ; encoding: [0x7d,0x04,0x18,0x7d]
-
-v_cmpx_nle_f16 exec_lo, v2.l
-// GFX: v_cmpx_nle_f16_e32 exec_lo, v2.l        ; encoding: [0x7e,0x04,0x18,0x7d]
-
-v_cmpx_nle_f16 exec_hi, v2.l
-// GFX: v_cmpx_nle_f16_e32 exec_hi, v2.l        ; encoding: [0x7f,0x04,0x18,0x7d]
-
-v_cmpx_nle_f16 null, v2.l
-// GFX: v_cmpx_nle_f16_e32 null, v2.l           ; encoding: [0x7c,0x04,0x18,0x7d]
-
-v_cmpx_nle_f16 -1, v2.l
-// GFX: v_cmpx_nle_f16_e32 -1, v2.l             ; encoding: [0xc1,0x04,0x18,0x7d]
-
-v_cmpx_nle_f16 0.5, v2.l
-// GFX: v_cmpx_nle_f16_e32 0.5, v2.l            ; encoding: [0xf0,0x04,0x18,0x7d]
-
-v_cmpx_nle_f16 src_scc, v2.l
-// GFX: v_cmpx_nle_f16_e32 src_scc, v2.l        ; encoding: [0xfd,0x04,0x18,0x7d]
-
-v_cmpx_nle_f16 0xfe0b, v127.l
-// GFX: v_cmpx_nle_f16_e32 0xfe0b, v127.l       ; encoding: [0xff,0xfe,0x18,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_nle_f16 v1.h, v2.l
-// GFX: v_cmpx_nle_f16_e32 v1.h, v2.l           ; encoding: [0x81,0x05,0x18,0x7d]
-
-v_cmpx_nle_f16 v127.h, v2.l
-// GFX: v_cmpx_nle_f16_e32 v127.h, v2.l         ; encoding: [0xff,0x05,0x18,0x7d]
-
-v_cmpx_nle_f16 src_scc, v2.h
-// GFX: v_cmpx_nle_f16_e32 src_scc, v2.h        ; encoding: [0xfd,0x04,0x19,0x7d]
-
-v_cmpx_nle_f16 0xfe0b, v127.h
-// GFX: v_cmpx_nle_f16_e32 0xfe0b, v127.h       ; encoding: [0xff,0xfe,0x19,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_nle_f32 v1, v2
-// GFX: v_cmpx_nle_f32_e32 v1, v2               ; encoding: [0x01,0x05,0x38,0x7d]
-
-v_cmpx_nle_f32 v255, v2
-// GFX: v_cmpx_nle_f32_e32 v255, v2             ; encoding: [0xff,0x05,0x38,0x7d]
-
-v_cmpx_nle_f32 s1, v2
-// GFX: v_cmpx_nle_f32_e32 s1, v2               ; encoding: [0x01,0x04,0x38,0x7d]
-
-v_cmpx_nle_f32 s105, v2
-// GFX: v_cmpx_nle_f32_e32 s105, v2             ; encoding: [0x69,0x04,0x38,0x7d]
-
-v_cmpx_nle_f32 vcc_lo, v2
-// GFX: v_cmpx_nle_f32_e32 vcc_lo, v2           ; encoding: [0x6a,0x04,0x38,0x7d]
-
-v_cmpx_nle_f32 vcc_hi, v2
-// GFX: v_cmpx_nle_f32_e32 vcc_hi, v2           ; encoding: [0x6b,0x04,0x38,0x7d]
-
-v_cmpx_nle_f32 ttmp15, v2
-// GFX: v_cmpx_nle_f32_e32 ttmp15, v2           ; encoding: [0x7b,0x04,0x38,0x7d]
-
-v_cmpx_nle_f32 m0, v2
-// GFX: v_cmpx_nle_f32_e32 m0, v2               ; encoding: [0x7d,0x04,0x38,0x7d]
-
-v_cmpx_nle_f32 exec_lo, v2
-// GFX: v_cmpx_nle_f32_e32 exec_lo, v2          ; encoding: [0x7e,0x04,0x38,0x7d]
-
-v_cmpx_nle_f32 exec_hi, v2
-// GFX: v_cmpx_nle_f32_e32 exec_hi, v2          ; encoding: [0x7f,0x04,0x38,0x7d]
-
-v_cmpx_nle_f32 null, v2
-// GFX: v_cmpx_nle_f32_e32 null, v2             ; encoding: [0x7c,0x04,0x38,0x7d]
-
-v_cmpx_nle_f32 -1, v2
-// GFX: v_cmpx_nle_f32_e32 -1, v2               ; encoding: [0xc1,0x04,0x38,0x7d]
-
-v_cmpx_nle_f32 0.5, v2
-// GFX: v_cmpx_nle_f32_e32 0.5, v2              ; encoding: [0xf0,0x04,0x38,0x7d]
-
-v_cmpx_nle_f32 src_scc, v2
-// GFX: v_cmpx_nle_f32_e32 src_scc, v2          ; encoding: [0xfd,0x04,0x38,0x7d]
-
-v_cmpx_nle_f32 0xaf123456, v255
-// GFX: v_cmpx_nle_f32_e32 0xaf123456, v255     ; encoding: [0xff,0xfe,0x39,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_nle_f64 v[1:2], v[2:3]
-// GFX: v_cmpx_nle_f64_e32 v[1:2], v[2:3]       ; encoding: [0x01,0x05,0x58,0x7d]
-
-v_cmpx_nle_f64 v[254:255], v[2:3]
-// GFX: v_cmpx_nle_f64_e32 v[254:255], v[2:3]   ; encoding: [0xfe,0x05,0x58,0x7d]
-
-v_cmpx_nle_f64 s[2:3], v[2:3]
-// GFX: v_cmpx_nle_f64_e32 s[2:3], v[2:3]       ; encoding: [0x02,0x04,0x58,0x7d]
-
-v_cmpx_nle_f64 s[104:105], v[2:3]
-// GFX: v_cmpx_nle_f64_e32 s[104:105], v[2:3]   ; encoding: [0x68,0x04,0x58,0x7d]
-
-v_cmpx_nle_f64 vcc, v[2:3]
-// GFX: v_cmpx_nle_f64_e32 vcc, v[2:3]          ; encoding: [0x6a,0x04,0x58,0x7d]
-
-v_cmpx_nle_f64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_nle_f64_e32 ttmp[14:15], v[2:3]  ; encoding: [0x7a,0x04,0x58,0x7d]
-
-v_cmpx_nle_f64 exec, v[2:3]
-// GFX: v_cmpx_nle_f64_e32 exec, v[2:3]         ; encoding: [0x7e,0x04,0x58,0x7d]
-
-v_cmpx_nle_f64 null, v[2:3]
-// GFX: v_cmpx_nle_f64_e32 null, v[2:3]         ; encoding: [0x7c,0x04,0x58,0x7d]
-
-v_cmpx_nle_f64 -1, v[2:3]
-// GFX: v_cmpx_nle_f64_e32 -1, v[2:3]           ; encoding: [0xc1,0x04,0x58,0x7d]
-
-v_cmpx_nle_f64 0.5, v[2:3]
-// GFX: v_cmpx_nle_f64_e32 0.5, v[2:3]          ; encoding: [0xf0,0x04,0x58,0x7d]
-
-v_cmpx_nle_f64 src_scc, v[2:3]
-// GFX: v_cmpx_nle_f64_e32 src_scc, v[2:3]      ; encoding: [0xfd,0x04,0x58,0x7d]
-
-v_cmpx_nle_f64 0xaf123456, v[254:255]
-// GFX: v_cmpx_nle_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x59,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_nlg_f16 v1.l, v2.l
-// GFX: v_cmpx_nlg_f16_e32 v1.l, v2.l           ; encoding: [0x01,0x05,0x14,0x7d]
-
-v_cmpx_nlg_f16 v127.l, v2.l
-// GFX: v_cmpx_nlg_f16_e32 v127.l, v2.l         ; encoding: [0x7f,0x05,0x14,0x7d]
-
-v_cmpx_nlg_f16 s1, v2.l
-// GFX: v_cmpx_nlg_f16_e32 s1, v2.l             ; encoding: [0x01,0x04,0x14,0x7d]
-
-v_cmpx_nlg_f16 s105, v2.l
-// GFX: v_cmpx_nlg_f16_e32 s105, v2.l           ; encoding: [0x69,0x04,0x14,0x7d]
-
-v_cmpx_nlg_f16 vcc_lo, v2.l
-// GFX: v_cmpx_nlg_f16_e32 vcc_lo, v2.l         ; encoding: [0x6a,0x04,0x14,0x7d]
-
-v_cmpx_nlg_f16 vcc_hi, v2.l
-// GFX: v_cmpx_nlg_f16_e32 vcc_hi, v2.l         ; encoding: [0x6b,0x04,0x14,0x7d]
-
-v_cmpx_nlg_f16 ttmp15, v2.l
-// GFX: v_cmpx_nlg_f16_e32 ttmp15, v2.l         ; encoding: [0x7b,0x04,0x14,0x7d]
-
-v_cmpx_nlg_f16 m0, v2.l
-// GFX: v_cmpx_nlg_f16_e32 m0, v2.l             ; encoding: [0x7d,0x04,0x14,0x7d]
-
-v_cmpx_nlg_f16 exec_lo, v2.l
-// GFX: v_cmpx_nlg_f16_e32 exec_lo, v2.l        ; encoding: [0x7e,0x04,0x14,0x7d]
-
-v_cmpx_nlg_f16 exec_hi, v2.l
-// GFX: v_cmpx_nlg_f16_e32 exec_hi, v2.l        ; encoding: [0x7f,0x04,0x14,0x7d]
-
-v_cmpx_nlg_f16 null, v2.l
-// GFX: v_cmpx_nlg_f16_e32 null, v2.l           ; encoding: [0x7c,0x04,0x14,0x7d]
-
-v_cmpx_nlg_f16 -1, v2.l
-// GFX: v_cmpx_nlg_f16_e32 -1, v2.l             ; encoding: [0xc1,0x04,0x14,0x7d]
-
-v_cmpx_nlg_f16 0.5, v2.l
-// GFX: v_cmpx_nlg_f16_e32 0.5, v2.l            ; encoding: [0xf0,0x04,0x14,0x7d]
-
-v_cmpx_nlg_f16 src_scc, v2.l
-// GFX: v_cmpx_nlg_f16_e32 src_scc, v2.l        ; encoding: [0xfd,0x04,0x14,0x7d]
-
-v_cmpx_nlg_f16 0xfe0b, v127.l
-// GFX: v_cmpx_nlg_f16_e32 0xfe0b, v127.l       ; encoding: [0xff,0xfe,0x14,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_nlg_f16 v1.h, v2.l
-// GFX: v_cmpx_nlg_f16_e32 v1.h, v2.l           ; encoding: [0x81,0x05,0x14,0x7d]
-
-v_cmpx_nlg_f16 v127.h, v2.l
-// GFX: v_cmpx_nlg_f16_e32 v127.h, v2.l         ; encoding: [0xff,0x05,0x14,0x7d]
-
-v_cmpx_nlg_f16 src_scc, v2.h
-// GFX: v_cmpx_nlg_f16_e32 src_scc, v2.h        ; encoding: [0xfd,0x04,0x15,0x7d]
-
-v_cmpx_nlg_f16 0xfe0b, v127.h
-// GFX: v_cmpx_nlg_f16_e32 0xfe0b, v127.h       ; encoding: [0xff,0xfe,0x15,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_nlg_f32 v1, v2
-// GFX: v_cmpx_nlg_f32_e32 v1, v2               ; encoding: [0x01,0x05,0x34,0x7d]
-
-v_cmpx_nlg_f32 v255, v2
-// GFX: v_cmpx_nlg_f32_e32 v255, v2             ; encoding: [0xff,0x05,0x34,0x7d]
-
-v_cmpx_nlg_f32 s1, v2
-// GFX: v_cmpx_nlg_f32_e32 s1, v2               ; encoding: [0x01,0x04,0x34,0x7d]
-
-v_cmpx_nlg_f32 s105, v2
-// GFX: v_cmpx_nlg_f32_e32 s105, v2             ; encoding: [0x69,0x04,0x34,0x7d]
-
-v_cmpx_nlg_f32 vcc_lo, v2
-// GFX: v_cmpx_nlg_f32_e32 vcc_lo, v2           ; encoding: [0x6a,0x04,0x34,0x7d]
-
-v_cmpx_nlg_f32 vcc_hi, v2
-// GFX: v_cmpx_nlg_f32_e32 vcc_hi, v2           ; encoding: [0x6b,0x04,0x34,0x7d]
-
-v_cmpx_nlg_f32 ttmp15, v2
-// GFX: v_cmpx_nlg_f32_e32 ttmp15, v2           ; encoding: [0x7b,0x04,0x34,0x7d]
-
-v_cmpx_nlg_f32 m0, v2
-// GFX: v_cmpx_nlg_f32_e32 m0, v2               ; encoding: [0x7d,0x04,0x34,0x7d]
-
-v_cmpx_nlg_f32 exec_lo, v2
-// GFX: v_cmpx_nlg_f32_e32 exec_lo, v2          ; encoding: [0x7e,0x04,0x34,0x7d]
-
-v_cmpx_nlg_f32 exec_hi, v2
-// GFX: v_cmpx_nlg_f32_e32 exec_hi, v2          ; encoding: [0x7f,0x04,0x34,0x7d]
-
-v_cmpx_nlg_f32 null, v2
-// GFX: v_cmpx_nlg_f32_e32 null, v2             ; encoding: [0x7c,0x04,0x34,0x7d]
-
-v_cmpx_nlg_f32 -1, v2
-// GFX: v_cmpx_nlg_f32_e32 -1, v2               ; encoding: [0xc1,0x04,0x34,0x7d]
-
-v_cmpx_nlg_f32 0.5, v2
-// GFX: v_cmpx_nlg_f32_e32 0.5, v2              ; encoding: [0xf0,0x04,0x34,0x7d]
-
-v_cmpx_nlg_f32 src_scc, v2
-// GFX: v_cmpx_nlg_f32_e32 src_scc, v2          ; encoding: [0xfd,0x04,0x34,0x7d]
-
-v_cmpx_nlg_f32 0xaf123456, v255
-// GFX: v_cmpx_nlg_f32_e32 0xaf123456, v255     ; encoding: [0xff,0xfe,0x35,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_nlg_f64 v[1:2], v[2:3]
-// GFX: v_cmpx_nlg_f64_e32 v[1:2], v[2:3]       ; encoding: [0x01,0x05,0x54,0x7d]
-
-v_cmpx_nlg_f64 v[254:255], v[2:3]
-// GFX: v_cmpx_nlg_f64_e32 v[254:255], v[2:3]   ; encoding: [0xfe,0x05,0x54,0x7d]
-
-v_cmpx_nlg_f64 s[2:3], v[2:3]
-// GFX: v_cmpx_nlg_f64_e32 s[2:3], v[2:3]       ; encoding: [0x02,0x04,0x54,0x7d]
-
-v_cmpx_nlg_f64 s[104:105], v[2:3]
-// GFX: v_cmpx_nlg_f64_e32 s[104:105], v[2:3]   ; encoding: [0x68,0x04,0x54,0x7d]
-
-v_cmpx_nlg_f64 vcc, v[2:3]
-// GFX: v_cmpx_nlg_f64_e32 vcc, v[2:3]          ; encoding: [0x6a,0x04,0x54,0x7d]
-
-v_cmpx_nlg_f64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_nlg_f64_e32 ttmp[14:15], v[2:3]  ; encoding: [0x7a,0x04,0x54,0x7d]
-
-v_cmpx_nlg_f64 exec, v[2:3]
-// GFX: v_cmpx_nlg_f64_e32 exec, v[2:3]         ; encoding: [0x7e,0x04,0x54,0x7d]
-
-v_cmpx_nlg_f64 null, v[2:3]
-// GFX: v_cmpx_nlg_f64_e32 null, v[2:3]         ; encoding: [0x7c,0x04,0x54,0x7d]
-
-v_cmpx_nlg_f64 -1, v[2:3]
-// GFX: v_cmpx_nlg_f64_e32 -1, v[2:3]           ; encoding: [0xc1,0x04,0x54,0x7d]
-
-v_cmpx_nlg_f64 0.5, v[2:3]
-// GFX: v_cmpx_nlg_f64_e32 0.5, v[2:3]          ; encoding: [0xf0,0x04,0x54,0x7d]
-
-v_cmpx_nlg_f64 src_scc, v[2:3]
-// GFX: v_cmpx_nlg_f64_e32 src_scc, v[2:3]      ; encoding: [0xfd,0x04,0x54,0x7d]
-
-v_cmpx_nlg_f64 0xaf123456, v[254:255]
-// GFX: v_cmpx_nlg_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x55,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_nlt_f16 v1.l, v2.l
-// GFX: v_cmpx_nlt_f16_e32 v1.l, v2.l           ; encoding: [0x01,0x05,0x1c,0x7d]
-
-v_cmpx_nlt_f16 v127.l, v2.l
-// GFX: v_cmpx_nlt_f16_e32 v127.l, v2.l         ; encoding: [0x7f,0x05,0x1c,0x7d]
-
-v_cmpx_nlt_f16 s1, v2.l
-// GFX: v_cmpx_nlt_f16_e32 s1, v2.l             ; encoding: [0x01,0x04,0x1c,0x7d]
-
-v_cmpx_nlt_f16 s105, v2.l
-// GFX: v_cmpx_nlt_f16_e32 s105, v2.l           ; encoding: [0x69,0x04,0x1c,0x7d]
-
-v_cmpx_nlt_f16 vcc_lo, v2.l
-// GFX: v_cmpx_nlt_f16_e32 vcc_lo, v2.l         ; encoding: [0x6a,0x04,0x1c,0x7d]
-
-v_cmpx_nlt_f16 vcc_hi, v2.l
-// GFX: v_cmpx_nlt_f16_e32 vcc_hi, v2.l         ; encoding: [0x6b,0x04,0x1c,0x7d]
-
-v_cmpx_nlt_f16 ttmp15, v2.l
-// GFX: v_cmpx_nlt_f16_e32 ttmp15, v2.l         ; encoding: [0x7b,0x04,0x1c,0x7d]
-
-v_cmpx_nlt_f16 m0, v2.l
-// GFX: v_cmpx_nlt_f16_e32 m0, v2.l             ; encoding: [0x7d,0x04,0x1c,0x7d]
-
-v_cmpx_nlt_f16 exec_lo, v2.l
-// GFX: v_cmpx_nlt_f16_e32 exec_lo, v2.l        ; encoding: [0x7e,0x04,0x1c,0x7d]
-
-v_cmpx_nlt_f16 exec_hi, v2.l
-// GFX: v_cmpx_nlt_f16_e32 exec_hi, v2.l        ; encoding: [0x7f,0x04,0x1c,0x7d]
-
-v_cmpx_nlt_f16 null, v2.l
-// GFX: v_cmpx_nlt_f16_e32 null, v2.l           ; encoding: [0x7c,0x04,0x1c,0x7d]
-
-v_cmpx_nlt_f16 -1, v2.l
-// GFX: v_cmpx_nlt_f16_e32 -1, v2.l             ; encoding: [0xc1,0x04,0x1c,0x7d]
-
-v_cmpx_nlt_f16 0.5, v2.l
-// GFX: v_cmpx_nlt_f16_e32 0.5, v2.l            ; encoding: [0xf0,0x04,0x1c,0x7d]
-
-v_cmpx_nlt_f16 src_scc, v2.l
-// GFX: v_cmpx_nlt_f16_e32 src_scc, v2.l        ; encoding: [0xfd,0x04,0x1c,0x7d]
-
-v_cmpx_nlt_f16 0xfe0b, v127.l
-// GFX: v_cmpx_nlt_f16_e32 0xfe0b, v127.l       ; encoding: [0xff,0xfe,0x1c,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_nlt_f16 v1.h, v2.l
-// GFX: v_cmpx_nlt_f16_e32 v1.h, v2.l           ; encoding: [0x81,0x05,0x1c,0x7d]
-
-v_cmpx_nlt_f16 v127.h, v2.l
-// GFX: v_cmpx_nlt_f16_e32 v127.h, v2.l         ; encoding: [0xff,0x05,0x1c,0x7d]
-
-v_cmpx_nlt_f16 src_scc, v2.h
-// GFX: v_cmpx_nlt_f16_e32 src_scc, v2.h        ; encoding: [0xfd,0x04,0x1d,0x7d]
-
-v_cmpx_nlt_f16 0xfe0b, v127.h
-// GFX: v_cmpx_nlt_f16_e32 0xfe0b, v127.h       ; encoding: [0xff,0xfe,0x1d,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_nlt_f32 v1, v2
-// GFX: v_cmpx_nlt_f32_e32 v1, v2               ; encoding: [0x01,0x05,0x3c,0x7d]
-
-v_cmpx_nlt_f32 v255, v2
-// GFX: v_cmpx_nlt_f32_e32 v255, v2             ; encoding: [0xff,0x05,0x3c,0x7d]
-
-v_cmpx_nlt_f32 s1, v2
-// GFX: v_cmpx_nlt_f32_e32 s1, v2               ; encoding: [0x01,0x04,0x3c,0x7d]
-
-v_cmpx_nlt_f32 s105, v2
-// GFX: v_cmpx_nlt_f32_e32 s105, v2             ; encoding: [0x69,0x04,0x3c,0x7d]
-
-v_cmpx_nlt_f32 vcc_lo, v2
-// GFX: v_cmpx_nlt_f32_e32 vcc_lo, v2           ; encoding: [0x6a,0x04,0x3c,0x7d]
-
-v_cmpx_nlt_f32 vcc_hi, v2
-// GFX: v_cmpx_nlt_f32_e32 vcc_hi, v2           ; encoding: [0x6b,0x04,0x3c,0x7d]
-
-v_cmpx_nlt_f32 ttmp15, v2
-// GFX: v_cmpx_nlt_f32_e32 ttmp15, v2           ; encoding: [0x7b,0x04,0x3c,0x7d]
-
-v_cmpx_nlt_f32 m0, v2
-// GFX: v_cmpx_nlt_f32_e32 m0, v2               ; encoding: [0x7d,0x04,0x3c,0x7d]
-
-v_cmpx_nlt_f32 exec_lo, v2
-// GFX: v_cmpx_nlt_f32_e32 exec_lo, v2          ; encoding: [0x7e,0x04,0x3c,0x7d]
-
-v_cmpx_nlt_f32 exec_hi, v2
-// GFX: v_cmpx_nlt_f32_e32 exec_hi, v2          ; encoding: [0x7f,0x04,0x3c,0x7d]
-
-v_cmpx_nlt_f32 null, v2
-// GFX: v_cmpx_nlt_f32_e32 null, v2             ; encoding: [0x7c,0x04,0x3c,0x7d]
-
-v_cmpx_nlt_f32 -1, v2
-// GFX: v_cmpx_nlt_f32_e32 -1, v2               ; encoding: [0xc1,0x04,0x3c,0x7d]
-
-v_cmpx_nlt_f32 0.5, v2
-// GFX: v_cmpx_nlt_f32_e32 0.5, v2              ; encoding: [0xf0,0x04,0x3c,0x7d]
-
-v_cmpx_nlt_f32 src_scc, v2
-// GFX: v_cmpx_nlt_f32_e32 src_scc, v2          ; encoding: [0xfd,0x04,0x3c,0x7d]
-
-v_cmpx_nlt_f32 0xaf123456, v255
-// GFX: v_cmpx_nlt_f32_e32 0xaf123456, v255     ; encoding: [0xff,0xfe,0x3d,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_nlt_f64 v[1:2], v[2:3]
-// GFX: v_cmpx_nlt_f64_e32 v[1:2], v[2:3]       ; encoding: [0x01,0x05,0x5c,0x7d]
-
-v_cmpx_nlt_f64 v[254:255], v[2:3]
-// GFX: v_cmpx_nlt_f64_e32 v[254:255], v[2:3]   ; encoding: [0xfe,0x05,0x5c,0x7d]
-
-v_cmpx_nlt_f64 s[2:3], v[2:3]
-// GFX: v_cmpx_nlt_f64_e32 s[2:3], v[2:3]       ; encoding: [0x02,0x04,0x5c,0x7d]
-
-v_cmpx_nlt_f64 s[104:105], v[2:3]
-// GFX: v_cmpx_nlt_f64_e32 s[104:105], v[2:3]   ; encoding: [0x68,0x04,0x5c,0x7d]
-
-v_cmpx_nlt_f64 vcc, v[2:3]
-// GFX: v_cmpx_nlt_f64_e32 vcc, v[2:3]          ; encoding: [0x6a,0x04,0x5c,0x7d]
-
-v_cmpx_nlt_f64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_nlt_f64_e32 ttmp[14:15], v[2:3]  ; encoding: [0x7a,0x04,0x5c,0x7d]
-
-v_cmpx_nlt_f64 exec, v[2:3]
-// GFX: v_cmpx_nlt_f64_e32 exec, v[2:3]         ; encoding: [0x7e,0x04,0x5c,0x7d]
-
-v_cmpx_nlt_f64 null, v[2:3]
-// GFX: v_cmpx_nlt_f64_e32 null, v[2:3]         ; encoding: [0x7c,0x04,0x5c,0x7d]
-
-v_cmpx_nlt_f64 -1, v[2:3]
-// GFX: v_cmpx_nlt_f64_e32 -1, v[2:3]           ; encoding: [0xc1,0x04,0x5c,0x7d]
-
-v_cmpx_nlt_f64 0.5, v[2:3]
-// GFX: v_cmpx_nlt_f64_e32 0.5, v[2:3]          ; encoding: [0xf0,0x04,0x5c,0x7d]
-
-v_cmpx_nlt_f64 src_scc, v[2:3]
-// GFX: v_cmpx_nlt_f64_e32 src_scc, v[2:3]      ; encoding: [0xfd,0x04,0x5c,0x7d]
-
-v_cmpx_nlt_f64 0xaf123456, v[254:255]
-// GFX: v_cmpx_nlt_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5d,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_o_f16 v1.l, v2.l
-// GFX: v_cmpx_o_f16_e32 v1.l, v2.l             ; encoding: [0x01,0x05,0x0e,0x7d]
-
-v_cmpx_o_f16 v127.l, v2.l
-// GFX: v_cmpx_o_f16_e32 v127.l, v2.l           ; encoding: [0x7f,0x05,0x0e,0x7d]
-
-v_cmpx_o_f16 s1, v2.l
-// GFX: v_cmpx_o_f16_e32 s1, v2.l               ; encoding: [0x01,0x04,0x0e,0x7d]
-
-v_cmpx_o_f16 s105, v2.l
-// GFX: v_cmpx_o_f16_e32 s105, v2.l             ; encoding: [0x69,0x04,0x0e,0x7d]
-
-v_cmpx_o_f16 vcc_lo, v2.l
-// GFX: v_cmpx_o_f16_e32 vcc_lo, v2.l           ; encoding: [0x6a,0x04,0x0e,0x7d]
-
-v_cmpx_o_f16 vcc_hi, v2.l
-// GFX: v_cmpx_o_f16_e32 vcc_hi, v2.l           ; encoding: [0x6b,0x04,0x0e,0x7d]
-
-v_cmpx_o_f16 ttmp15, v2.l
-// GFX: v_cmpx_o_f16_e32 ttmp15, v2.l           ; encoding: [0x7b,0x04,0x0e,0x7d]
-
-v_cmpx_o_f16 m0, v2.l
-// GFX: v_cmpx_o_f16_e32 m0, v2.l               ; encoding: [0x7d,0x04,0x0e,0x7d]
-
-v_cmpx_o_f16 exec_lo, v2.l
-// GFX: v_cmpx_o_f16_e32 exec_lo, v2.l          ; encoding: [0x7e,0x04,0x0e,0x7d]
-
-v_cmpx_o_f16 exec_hi, v2.l
-// GFX: v_cmpx_o_f16_e32 exec_hi, v2.l          ; encoding: [0x7f,0x04,0x0e,0x7d]
-
-v_cmpx_o_f16 null, v2.l
-// GFX: v_cmpx_o_f16_e32 null, v2.l             ; encoding: [0x7c,0x04,0x0e,0x7d]
-
-v_cmpx_o_f16 -1, v2.l
-// GFX: v_cmpx_o_f16_e32 -1, v2.l               ; encoding: [0xc1,0x04,0x0e,0x7d]
-
-v_cmpx_o_f16 0.5, v2.l
-// GFX: v_cmpx_o_f16_e32 0.5, v2.l              ; encoding: [0xf0,0x04,0x0e,0x7d]
-
-v_cmpx_o_f16 src_scc, v2.l
-// GFX: v_cmpx_o_f16_e32 src_scc, v2.l          ; encoding: [0xfd,0x04,0x0e,0x7d]
-
-v_cmpx_o_f16 0xfe0b, v127.l
-// GFX: v_cmpx_o_f16_e32 0xfe0b, v127.l         ; encoding: [0xff,0xfe,0x0e,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_o_f16 v1.h, v2.l
-// GFX: v_cmpx_o_f16_e32 v1.h, v2.l             ; encoding: [0x81,0x05,0x0e,0x7d]
-
-v_cmpx_o_f16 v127.h, v2.l
-// GFX: v_cmpx_o_f16_e32 v127.h, v2.l           ; encoding: [0xff,0x05,0x0e,0x7d]
-
-v_cmpx_o_f16 src_scc, v2.h
-// GFX: v_cmpx_o_f16_e32 src_scc, v2.h          ; encoding: [0xfd,0x04,0x0f,0x7d]
-
-v_cmpx_o_f16 0xfe0b, v127.h
-// GFX: v_cmpx_o_f16_e32 0xfe0b, v127.h         ; encoding: [0xff,0xfe,0x0f,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_o_f32 v1, v2
-// GFX: v_cmpx_o_f32_e32 v1, v2                 ; encoding: [0x01,0x05,0x2e,0x7d]
-
-v_cmpx_o_f32 v255, v2
-// GFX: v_cmpx_o_f32_e32 v255, v2               ; encoding: [0xff,0x05,0x2e,0x7d]
-
-v_cmpx_o_f32 s1, v2
-// GFX: v_cmpx_o_f32_e32 s1, v2                 ; encoding: [0x01,0x04,0x2e,0x7d]
-
-v_cmpx_o_f32 s105, v2
-// GFX: v_cmpx_o_f32_e32 s105, v2               ; encoding: [0x69,0x04,0x2e,0x7d]
-
-v_cmpx_o_f32 vcc_lo, v2
-// GFX: v_cmpx_o_f32_e32 vcc_lo, v2             ; encoding: [0x6a,0x04,0x2e,0x7d]
-
-v_cmpx_o_f32 vcc_hi, v2
-// GFX: v_cmpx_o_f32_e32 vcc_hi, v2             ; encoding: [0x6b,0x04,0x2e,0x7d]
-
-v_cmpx_o_f32 ttmp15, v2
-// GFX: v_cmpx_o_f32_e32 ttmp15, v2             ; encoding: [0x7b,0x04,0x2e,0x7d]
-
-v_cmpx_o_f32 m0, v2
-// GFX: v_cmpx_o_f32_e32 m0, v2                 ; encoding: [0x7d,0x04,0x2e,0x7d]
-
-v_cmpx_o_f32 exec_lo, v2
-// GFX: v_cmpx_o_f32_e32 exec_lo, v2            ; encoding: [0x7e,0x04,0x2e,0x7d]
-
-v_cmpx_o_f32 exec_hi, v2
-// GFX: v_cmpx_o_f32_e32 exec_hi, v2            ; encoding: [0x7f,0x04,0x2e,0x7d]
-
-v_cmpx_o_f32 null, v2
-// GFX: v_cmpx_o_f32_e32 null, v2               ; encoding: [0x7c,0x04,0x2e,0x7d]
-
-v_cmpx_o_f32 -1, v2
-// GFX: v_cmpx_o_f32_e32 -1, v2                 ; encoding: [0xc1,0x04,0x2e,0x7d]
-
-v_cmpx_o_f32 0.5, v2
-// GFX: v_cmpx_o_f32_e32 0.5, v2                ; encoding: [0xf0,0x04,0x2e,0x7d]
-
-v_cmpx_o_f32 src_scc, v2
-// GFX: v_cmpx_o_f32_e32 src_scc, v2            ; encoding: [0xfd,0x04,0x2e,0x7d]
-
-v_cmpx_o_f32 0xaf123456, v255
-// GFX: v_cmpx_o_f32_e32 0xaf123456, v255       ; encoding: [0xff,0xfe,0x2f,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_o_f64 v[1:2], v[2:3]
-// GFX: v_cmpx_o_f64_e32 v[1:2], v[2:3]         ; encoding: [0x01,0x05,0x4e,0x7d]
-
-v_cmpx_o_f64 v[254:255], v[2:3]
-// GFX: v_cmpx_o_f64_e32 v[254:255], v[2:3]     ; encoding: [0xfe,0x05,0x4e,0x7d]
-
-v_cmpx_o_f64 s[2:3], v[2:3]
-// GFX: v_cmpx_o_f64_e32 s[2:3], v[2:3]         ; encoding: [0x02,0x04,0x4e,0x7d]
-
-v_cmpx_o_f64 s[104:105], v[2:3]
-// GFX: v_cmpx_o_f64_e32 s[104:105], v[2:3]     ; encoding: [0x68,0x04,0x4e,0x7d]
-
-v_cmpx_o_f64 vcc, v[2:3]
-// GFX: v_cmpx_o_f64_e32 vcc, v[2:3]            ; encoding: [0x6a,0x04,0x4e,0x7d]
-
-v_cmpx_o_f64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_o_f64_e32 ttmp[14:15], v[2:3]    ; encoding: [0x7a,0x04,0x4e,0x7d]
-
-v_cmpx_o_f64 exec, v[2:3]
-// GFX: v_cmpx_o_f64_e32 exec, v[2:3]           ; encoding: [0x7e,0x04,0x4e,0x7d]
-
-v_cmpx_o_f64 null, v[2:3]
-// GFX: v_cmpx_o_f64_e32 null, v[2:3]           ; encoding: [0x7c,0x04,0x4e,0x7d]
-
-v_cmpx_o_f64 -1, v[2:3]
-// GFX: v_cmpx_o_f64_e32 -1, v[2:3]             ; encoding: [0xc1,0x04,0x4e,0x7d]
-
-v_cmpx_o_f64 0.5, v[2:3]
-// GFX: v_cmpx_o_f64_e32 0.5, v[2:3]            ; encoding: [0xf0,0x04,0x4e,0x7d]
-
-v_cmpx_o_f64 src_scc, v[2:3]
-// GFX: v_cmpx_o_f64_e32 src_scc, v[2:3]        ; encoding: [0xfd,0x04,0x4e,0x7d]
-
-v_cmpx_o_f64 0xaf123456, v[254:255]
-// GFX: v_cmpx_o_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4f,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_u_f16 v1.l, v2.l
-// GFX: v_cmpx_u_f16_e32 v1.l, v2.l             ; encoding: [0x01,0x05,0x10,0x7d]
-
-v_cmpx_u_f16 v127.l, v2.l
-// GFX: v_cmpx_u_f16_e32 v127.l, v2.l           ; encoding: [0x7f,0x05,0x10,0x7d]
-
-v_cmpx_u_f16 s1, v2.l
-// GFX: v_cmpx_u_f16_e32 s1, v2.l               ; encoding: [0x01,0x04,0x10,0x7d]
-
-v_cmpx_u_f16 s105, v2.l
-// GFX: v_cmpx_u_f16_e32 s105, v2.l             ; encoding: [0x69,0x04,0x10,0x7d]
-
-v_cmpx_u_f16 vcc_lo, v2.l
-// GFX: v_cmpx_u_f16_e32 vcc_lo, v2.l           ; encoding: [0x6a,0x04,0x10,0x7d]
-
-v_cmpx_u_f16 vcc_hi, v2.l
-// GFX: v_cmpx_u_f16_e32 vcc_hi, v2.l           ; encoding: [0x6b,0x04,0x10,0x7d]
-
-v_cmpx_u_f16 ttmp15, v2.l
-// GFX: v_cmpx_u_f16_e32 ttmp15, v2.l           ; encoding: [0x7b,0x04,0x10,0x7d]
-
-v_cmpx_u_f16 m0, v2.l
-// GFX: v_cmpx_u_f16_e32 m0, v2.l               ; encoding: [0x7d,0x04,0x10,0x7d]
-
-v_cmpx_u_f16 exec_lo, v2.l
-// GFX: v_cmpx_u_f16_e32 exec_lo, v2.l          ; encoding: [0x7e,0x04,0x10,0x7d]
-
-v_cmpx_u_f16 exec_hi, v2.l
-// GFX: v_cmpx_u_f16_e32 exec_hi, v2.l          ; encoding: [0x7f,0x04,0x10,0x7d]
-
-v_cmpx_u_f16 null, v2.l
-// GFX: v_cmpx_u_f16_e32 null, v2.l             ; encoding: [0x7c,0x04,0x10,0x7d]
-
-v_cmpx_u_f16 -1, v2.l
-// GFX: v_cmpx_u_f16_e32 -1, v2.l               ; encoding: [0xc1,0x04,0x10,0x7d]
-
-v_cmpx_u_f16 0.5, v2.l
-// GFX: v_cmpx_u_f16_e32 0.5, v2.l              ; encoding: [0xf0,0x04,0x10,0x7d]
-
-v_cmpx_u_f16 src_scc, v2.l
-// GFX: v_cmpx_u_f16_e32 src_scc, v2.l          ; encoding: [0xfd,0x04,0x10,0x7d]
-
-v_cmpx_u_f16 0xfe0b, v127.l
-// GFX: v_cmpx_u_f16_e32 0xfe0b, v127.l         ; encoding: [0xff,0xfe,0x10,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_u_f16 v1.h, v2.l
-// GFX: v_cmpx_u_f16_e32 v1.h, v2.l             ; encoding: [0x81,0x05,0x10,0x7d]
-
-v_cmpx_u_f16 v127.h, v2.l
-// GFX: v_cmpx_u_f16_e32 v127.h, v2.l           ; encoding: [0xff,0x05,0x10,0x7d]
-
-v_cmpx_u_f16 src_scc, v2.h
-// GFX: v_cmpx_u_f16_e32 src_scc, v2.h          ; encoding: [0xfd,0x04,0x11,0x7d]
-
-v_cmpx_u_f16 0xfe0b, v127.h
-// GFX: v_cmpx_u_f16_e32 0xfe0b, v127.h         ; encoding: [0xff,0xfe,0x11,0x7d,0x0b,0xfe,0x00,0x00]
-
-v_cmpx_u_f32 v1, v2
-// GFX: v_cmpx_u_f32_e32 v1, v2                 ; encoding: [0x01,0x05,0x30,0x7d]
-
-v_cmpx_u_f32 v255, v2
-// GFX: v_cmpx_u_f32_e32 v255, v2               ; encoding: [0xff,0x05,0x30,0x7d]
-
-v_cmpx_u_f32 s1, v2
-// GFX: v_cmpx_u_f32_e32 s1, v2                 ; encoding: [0x01,0x04,0x30,0x7d]
-
-v_cmpx_u_f32 s105, v2
-// GFX: v_cmpx_u_f32_e32 s105, v2               ; encoding: [0x69,0x04,0x30,0x7d]
-
-v_cmpx_u_f32 vcc_lo, v2
-// GFX: v_cmpx_u_f32_e32 vcc_lo, v2             ; encoding: [0x6a,0x04,0x30,0x7d]
-
-v_cmpx_u_f32 vcc_hi, v2
-// GFX: v_cmpx_u_f32_e32 vcc_hi, v2             ; encoding: [0x6b,0x04,0x30,0x7d]
-
-v_cmpx_u_f32 ttmp15, v2
-// GFX: v_cmpx_u_f32_e32 ttmp15, v2             ; encoding: [0x7b,0x04,0x30,0x7d]
-
-v_cmpx_u_f32 m0, v2
-// GFX: v_cmpx_u_f32_e32 m0, v2                 ; encoding: [0x7d,0x04,0x30,0x7d]
-
-v_cmpx_u_f32 exec_lo, v2
-// GFX: v_cmpx_u_f32_e32 exec_lo, v2            ; encoding: [0x7e,0x04,0x30,0x7d]
-
-v_cmpx_u_f32 exec_hi, v2
-// GFX: v_cmpx_u_f32_e32 exec_hi, v2            ; encoding: [0x7f,0x04,0x30,0x7d]
-
-v_cmpx_u_f32 null, v2
-// GFX: v_cmpx_u_f32_e32 null, v2               ; encoding: [0x7c,0x04,0x30,0x7d]
-
-v_cmpx_u_f32 -1, v2
-// GFX: v_cmpx_u_f32_e32 -1, v2                 ; encoding: [0xc1,0x04,0x30,0x7d]
-
-v_cmpx_u_f32 0.5, v2
-// GFX: v_cmpx_u_f32_e32 0.5, v2                ; encoding: [0xf0,0x04,0x30,0x7d]
-
-v_cmpx_u_f32 src_scc, v2
-// GFX: v_cmpx_u_f32_e32 src_scc, v2            ; encoding: [0xfd,0x04,0x30,0x7d]
-
-v_cmpx_u_f32 0xaf123456, v255
-// GFX: v_cmpx_u_f32_e32 0xaf123456, v255       ; encoding: [0xff,0xfe,0x31,0x7d,0x56,0x34,0x12,0xaf]
-
-v_cmpx_u_f64 v[1:2], v[2:3]
-// GFX: v_cmpx_u_f64_e32 v[1:2], v[2:3]         ; encoding: [0x01,0x05,0x50,0x7d]
-
-v_cmpx_u_f64 v[254:255], v[2:3]
-// GFX: v_cmpx_u_f64_e32 v[254:255], v[2:3]     ; encoding: [0xfe,0x05,0x50,0x7d]
-
-v_cmpx_u_f64 s[2:3], v[2:3]
-// GFX: v_cmpx_u_f64_e32 s[2:3], v[2:3]         ; encoding: [0x02,0x04,0x50,0x7d]
-
-v_cmpx_u_f64 s[104:105], v[2:3]
-// GFX: v_cmpx_u_f64_e32 s[104:105], v[2:3]     ; encoding: [0x68,0x04,0x50,0x7d]
-
-v_cmpx_u_f64 vcc, v[2:3]
-// GFX: v_cmpx_u_f64_e32 vcc, v[2:3]            ; encoding: [0x6a,0x04,0x50,0x7d]
-
-v_cmpx_u_f64 ttmp[14:15], v[2:3]
-// GFX: v_cmpx_u_f64_e32 ttmp[14:15], v[2:3]    ; encoding: [0x7a,0x04,0x50,0x7d]
-
-v_cmpx_u_f64 exec, v[2:3]
-// GFX: v_cmpx_u_f64_e32 exec, v[2:3]           ; encoding: [0x7e,0x04,0x50,0x7d]
-
-v_cmpx_u_f64 null, v[2:3]
-// GFX: v_cmpx_u_f64_e32 null, v[2:3]           ; encoding: [0x7c,0x04,0x50,0x7d]
-
-v_cmpx_u_f64 -1, v[2:3]
-// GFX: v_cmpx_u_f64_e32 -1, v[2:3]             ; encoding: [0xc1,0x04,0x50,0x7d]
-
-v_cmpx_u_f64 0.5, v[2:3]
-// GFX: v_cmpx_u_f64_e32 0.5, v[2:3]            ; encoding: [0xf0,0x04,0x50,0x7d]
-
-v_cmpx_u_f64 src_scc, v[2:3]
-// GFX: v_cmpx_u_f64_e32 src_scc, v[2:3]        ; encoding: [0xfd,0x04,0x50,0x7d]
-
-v_cmpx_u_f64 0xaf123456, v[254:255]
-// GFX: v_cmpx_u_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x51,0x7d,0x56,0x34,0x12,0xaf]
+// GFX: v_cmpx

>From 74f8587465cf72d3874e5f0d2ca0ce5fb3459f3c Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 13:00:19 +0530
Subject: [PATCH 23/55] Update literals.s

---
 llvm/test/MC/AMDGPU/literals.s | 951 +--------------------------------
 1 file changed, 3 insertions(+), 948 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/literals.s b/llvm/test/MC/AMDGPU/literals.s
index a96e9c4c07873..0b86e493de71e 100644
--- a/llvm/test/MC/AMDGPU/literals.s
+++ b/llvm/test/MC/AMDGPU/literals.s
@@ -100,7 +100,6 @@ v_fract_f64 v[0:1], -3.1415
 // NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 // NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 // SICI: v_fract_f64_e32 v[0:1], 0xc00921ca      ; encoding: [0xff,0x7c,0x00,0x7e,0xca,0x21,0x09,0xc0]
-// NOSICIVI: :[[@LINE-3]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 
 v_trunc_f32 v0, -3.1415
 // GFX11: v_trunc_f32_e32 v0, 0xc0490e56          ; encoding: [0xff,0x42,0x00,0x7e,0x56,0x0e,0x49,0xc0]
@@ -118,7 +117,6 @@ v_fract_f64 v[0:1], 100000000000000000000000.0
 // NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 // NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 // SICI: v_fract_f64_e32 v[0:1], 0x44b52d02      ; encoding: [0xff,0x7c,0x00,0x7e,0x02,0x2d,0xb5,0x44]
-// NOSICIVI: :[[@LINE-3]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 
 v_trunc_f32 v0, 100000000000000000000000.0
 // GFX11: v_trunc_f32_e32 v0, 0x65a96816          ; encoding: [0xff,0x42,0x00,0x7e,0x16,0x68,0xa9,0x65]
@@ -148,7 +146,6 @@ v_fract_f64 v[0:1], 3.402823e+38
 // NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 // NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 // SICI: v_fract_f64_e32 v[0:1], 0x47efffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0xef,0x47]
-// NOSICIVI: :[[@LINE-3]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 
 v_trunc_f32 v0, 3.402823e+38
 // GFX11: v_trunc_f32_e32 v0, 0x7f7ffffd          ; encoding: [0xff,0x42,0x00,0x7e,0xfd,0xff,0x7f,0x7f]
@@ -166,7 +163,6 @@ v_fract_f64 v[0:1], 2.3509886e-38
 // NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 // NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 // SICI: v_fract_f64_e32 v[0:1], 0x381fffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0x1f,0x38]
-// NOSICIVI: :[[@LINE-3]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 
 v_trunc_f32 v0, 2.3509886e-38
 // GFX11: v_trunc_f32_e32 v0, 0xffffff            ; encoding: [0xff,0x42,0x00,0x7e,0xff,0xff,0xff,0x00]
@@ -184,7 +180,6 @@ v_fract_f64 v[0:1], 2.3509886e-70
 // NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 // NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 // SICI: v_fract_f64_e32 v[0:1], 0x3179f623      ; encoding: [0xff,0x7c,0x00,0x7e,0x23,0xf6,0x79,0x31]
-// NOSICIVI: :[[@LINE-3]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
 
 v_trunc_f32 v0, 2.3509886e-70
 // NOGCN: :[[@LINE-1]]:17: error: invalid operand for instruction
@@ -587,14 +582,12 @@ v_trunc_f32_e64 v0, 1234
 // GFX12XX: v_trunc_f32_e64 v0, 0x4d2               ; encoding: [0x00,0x00,0xa1,0xd5,0xff,0x00,0x01,0x02,0xd2,0x04,0x00,0x00]
 // NOGFX89: :[[@LINE-3]]:21: error: literal operands are not supported
 // NOSICI: :[[@LINE-4]]:21: error: literal operands are not supported
-// NOSICIVI: :[[@LINE-1]]:21: error: literal operands are not supported
 
 v_fract_f64_e64 v[0:1], 1234
 // GFX11: v_fract_f64_e64 v[0:1], 0x4d2           ; encoding: [0x00,0x00,0xbe,0xd5,0xff,0x00,0x01,0x02,0xd2,0x04,0x00,0x00]
 // GFX12XX: v_fract_f64_e64 v[0:1], 0x4d2           ; encoding: [0x00,0x00,0xbe,0xd5,0xff,0x00,0x01,0x02,0xd2,0x04,0x00,0x00]
 // NOGFX89: :[[@LINE-3]]:25: error: literal operands are not supported
 // NOSICI: :[[@LINE-4]]:25: error: literal operands are not supported
-// NOSICIVI: :[[@LINE-1]]:25: error: literal operands are not supported
 
 v_trunc_f32_e32 v0, -54321
 // GFX11: v_trunc_f32_e32 v0, 0xffff2bcf          ; encoding: [0xff,0x42,0x00,0x7e,0xcf,0x2b,0xff,0xff]
@@ -641,7 +634,6 @@ v_fract_f64_e32 v[0:1], 0x123456789abcdef0
 // NOGFX12: :[[@LINE-3]]:25: error: invalid operand for instruction
 // NOGFX89: :[[@LINE-4]]:25: error: invalid operand for instruction
 // NOSICI: :[[@LINE-5]]:25: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-1]]:25: error: invalid operand for instruction
 
 v_trunc_f32_e32 v0, 0xffffffffffffffff
 // GFX11: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x42,0x00,0x7e]
@@ -819,7 +811,6 @@ v_and_b32_e64 v0, 1234, v1
 // GFX12XX: v_and_b32_e64 v0, 0x4d2, v1             ; encoding: [0x00,0x00,0x1b,0xd5,0xff,0x02,0x02,0x02,0xd2,0x04,0x00,0x00]
 // NOGFX89: :[[@LINE-3]]:19: error: literal operands are not supported
 // NOSICI: :[[@LINE-4]]:19: error: literal operands are not supported
-// NOSICIVI: :[[@LINE-1]]:19: error: literal operands are not supported
 
 s_mov_b64_e32 s[0:1], -54321
 // GFX11: s_mov_b64 s[0:1], 0xffff2bcf            ; encoding: [0xff,0x01,0x80,0xbe,0xcf,0x2b,0xff,0xff]
@@ -836,9 +827,7 @@ v_and_b32_e32 v0, -54321, v1
 
 s_mov_b64_e32 s[0:1], 0xdeadbeef
 // GFX11: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xff,0x01,0x80,0xbe,0xef,0xbe,0xad,0xde]
-// GFX12: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xff,0x01,0x80,0xbe,0xef,0xbe,0xad,0xde]
-// GFX1250-ASM: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xfe,0x01,0x80,0xbe,0xef,0xbe,0xad,0xde,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_mov_b64 s[0:1], lit64(0xdeadbeef)     ; encoding: [0xfe,0x01,0x80,0xbe,0xef,0xbe,0xad,0xde,0x00,0x00,0x00,0x00]
+// GFX12XX: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xff,0x01,0x80,0xbe,0xef,0xbe,0xad,0xde]
 // GFX89: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xff,0x01,0x80,0xbe,0xef,0xbe,0xad,0xde]
 // SICI: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xff,0x04,0x80,0xbe,0xef,0xbe,0xad,0xde]
 
@@ -850,9 +839,7 @@ v_and_b32_e32 v0, 0xdeadbeef, v1
 
 s_mov_b64_e32 s[0:1], 0xffffffff
 // GFX11: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xff,0x01,0x80,0xbe,0xff,0xff,0xff,0xff]
-// GFX12: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xff,0x01,0x80,0xbe,0xff,0xff,0xff,0xff]
-// GFX1250-ASM: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xfe,0x01,0x80,0xbe,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_mov_b64 s[0:1], lit64(0xffffffff)     ; encoding: [0xfe,0x01,0x80,0xbe,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00]
+// GFX12XX: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xff,0x01,0x80,0xbe,0xff,0xff,0xff,0xff]
 // GFX89: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xff,0x01,0x80,0xbe,0xff,0xff,0xff,0xff]
 // SICI: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xff,0x04,0x80,0xbe,0xff,0xff,0xff,0xff]
 
@@ -868,7 +855,6 @@ s_mov_b64_e32 s[0:1], 0x123456789abcdef0
 // NOGFX12: :[[@LINE-3]]:23: error: invalid operand for instruction
 // NOGFX89: :[[@LINE-4]]:23: error: invalid operand for instruction
 // NOSICI: :[[@LINE-5]]:23: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-1]]:23: error: invalid operand for instruction
 
 v_and_b32_e32 v0, 0x123456789abcdef0, v1
 // NOGCN: :[[@LINE-1]]:19: error: invalid operand for instruction
@@ -961,7 +947,6 @@ v_fract_f64_e32 v[0:1], 0x3fc45f306dc9c882
 // GFX12XX: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x7c,0x00,0x7e]
 // GFX89: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x64,0x00,0x7e]
 // NOSICI: :[[@LINE-4]]:25: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-2]]:25: error: invalid operand for instruction
 
 v_trunc_f32_e32 v0, 0x3e22f983
 // GFX11: v_trunc_f32_e32 v0, 0.15915494          ; encoding: [0xf8,0x42,0x00,0x7e]
@@ -970,934 +955,4 @@ v_trunc_f32_e32 v0, 0x3e22f983
 // SICI: v_trunc_f32_e32 v0, 0x3e22f983          ; encoding: [0xff,0x42,0x00,0x7e,0x83,0xf9,0x22,0x3e]
 
 v_fract_f64_e32 v[0:1], 0x3e22f983
-// GFX11: v_fract_f64_e32 v[0:1], 0x3e22f983      ; encoding: [0xff,0x7c,0x00,0x7e,0x83,0xf9,0x22,0x3e]
-// GFX12XX: v_fract_f64_e32 v[0:1], 0x3e22f983      ; encoding: [0xff,0x7c,0x00,0x7e,0x83,0xf9,0x22,0x3e]
-// GFX89: v_fract_f64_e32 v[0:1], 0x3e22f983      ; encoding: [0xff,0x64,0x00,0x7e,0x83,0xf9,0x22,0x3e]
-// SICI: v_fract_f64_e32 v[0:1], 0x3e22f983      ; encoding: [0xff,0x7c,0x00,0x7e,0x83,0xf9,0x22,0x3e]
-
-v_trunc_f32_e64 v0, 0x3fc45f306dc9c882
-// NOGCN: :[[@LINE-1]]:21: error: invalid operand for instruction
-
-v_fract_f64_e64 v[0:1], 0x3fc45f306dc9c882
-// GFX11: v_fract_f64_e64 v[0:1], 0.15915494309189532 ; encoding: [0x00,0x00,0xbe,0xd5,0xf8,0x00,0x01,0x02]
-// GFX12XX: v_fract_f64_e64 v[0:1], 0.15915494309189532 ; encoding: [0x00,0x00,0xbe,0xd5,0xf8,0x00,0x01,0x02]
-// GFX89: v_fract_f64_e64 v[0:1], 0.15915494309189532 ; encoding: [0x00,0x00,0x72,0xd1,0xf8,0x00,0x00,0x00]
-// NOSICI: :[[@LINE-4]]:25: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-2]]:25: error: invalid operand for instruction
-
-v_trunc_f32_e64 v0, 0x3e22f983
-// GFX11: v_trunc_f32_e64 v0, 0.15915494          ; encoding: [0x00,0x00,0xa1,0xd5,0xf8,0x00,0x01,0x02]
-// GFX12XX: v_trunc_f32_e64 v0, 0.15915494          ; encoding: [0x00,0x00,0xa1,0xd5,0xf8,0x00,0x01,0x02]
-// GFX89: v_trunc_f32_e64 v0, 0.15915494          ; encoding: [0x00,0x00,0x5c,0xd1,0xf8,0x00,0x00,0x00]
-// NOSICI: :[[@LINE-4]]:21: error: literal operands are not supported
-// NOSICIVI: :[[@LINE-2]]:21: error: literal operands are not supported
-
-v_fract_f64_e64 v[0:1], 0x3e22f983
-// GFX11: v_fract_f64_e64 v[0:1], 0x3e22f983      ; encoding: [0x00,0x00,0xbe,0xd5,0xff,0x00,0x01,0x02,0x83,0xf9,0x22,0x3e]
-// GFX12XX: v_fract_f64_e64 v[0:1], 0x3e22f983      ; encoding: [0x00,0x00,0xbe,0xd5,0xff,0x00,0x01,0x02,0x83,0xf9,0x22,0x3e]
-// NOGFX89: :[[@LINE-3]]:25: error: literal operands are not supported
-// NOSICI: :[[@LINE-4]]:25: error: literal operands are not supported
-// NOSICIVI: :[[@LINE-1]]:25: error: literal operands are not supported
-
-s_mov_b64_e32 s[0:1], 0.159154943091895317852646485335
-// GFX8PLUS: s_mov_b64 s[0:1], 0.15915494309189532   ; encoding: [0xf8,0x01,0x80,0xbe]
-// NOSICI: :[[@LINE-2]]:23: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-2]]:23: error: invalid operand for instruction
-
-v_and_b32_e32 v0, 0.159154943091895317852646485335, v1
-// GFX11: v_and_b32_e32 v0, 0.15915494, v1        ; encoding: [0xf8,0x02,0x00,0x36]
-// GFX12XX: v_and_b32_e32 v0, 0.15915494, v1        ; encoding: [0xf8,0x02,0x00,0x36]
-// GFX89: v_and_b32_e32 v0, 0.15915494, v1        ; encoding: [0xf8,0x02,0x00,0x26]
-// SICI: v_and_b32_e32 v0, 0x3e22f983, v1        ; encoding: [0xff,0x02,0x00,0x36,0x83,0xf9,0x22,0x3e]
-
-v_and_b32_e64 v0, 0.159154943091895317852646485335, v1
-// GFX11: v_and_b32_e64 v0, 0.15915494, v1        ; encoding: [0x00,0x00,0x1b,0xd5,0xf8,0x02,0x02,0x02]
-// GFX12XX: v_and_b32_e64 v0, 0.15915494, v1        ; encoding: [0x00,0x00,0x1b,0xd5,0xf8,0x02,0x02,0x02]
-// GFX89: v_and_b32_e64 v0, 0.15915494, v1        ; encoding: [0x00,0x00,0x13,0xd1,0xf8,0x02,0x02,0x00]
-// NOSICI: :[[@LINE-4]]:19: error: literal operands are not supported
-// NOSICIVI: :[[@LINE-2]]:19: error: literal operands are not supported
-
-v_fract_f64 v[0:1], 0.159154943091895317852646485335
-// GFX11: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x7c,0x00,0x7e]
-// GFX12XX: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x7c,0x00,0x7e]
-// GFX89: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x64,0x00,0x7e]
-// NOSICI: :[[@LINE-4]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// SICI: v_fract_f64_e32 v[0:1], 0x3fc45f30      ; encoding: [0xff,0x7c,0x00,0x7e,0x30,0x5f,0xc4,0x3f]
-// NOSICIVI: :[[@LINE-3]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-
-v_trunc_f32 v0, 0.159154943091895317852646485335
-// GFX11: v_trunc_f32_e32 v0, 0.15915494          ; encoding: [0xf8,0x42,0x00,0x7e]
-// GFX12XX: v_trunc_f32_e32 v0, 0.15915494          ; encoding: [0xf8,0x42,0x00,0x7e]
-// GFX89: v_trunc_f32_e32 v0, 0.15915494          ; encoding: [0xf8,0x38,0x00,0x7e]
-// SICI: v_trunc_f32_e32 v0, 0x3e22f983          ; encoding: [0xff,0x42,0x00,0x7e,0x83,0xf9,0x22,0x3e]
-
-v_trunc_f32 v0, lit(0.159154943091895317852646485335)
-// GFX11: v_trunc_f32_e32 v0, lit(0x3e22f983)     ; encoding: [0xff,0x42,0x00,0x7e,0x83,0xf9,0x22,0x3e]
-// GFX12XX: v_trunc_f32_e32 v0, lit(0x3e22f983)     ; encoding: [0xff,0x42,0x00,0x7e,0x83,0xf9,0x22,0x3e]
-// GFX89: v_trunc_f32_e32 v0, lit(0x3e22f983)     ; encoding: [0xff,0x38,0x00,0x7e,0x83,0xf9,0x22,0x3e]
-// SICI: v_trunc_f32_e32 v0, lit(0x3e22f983)     ; encoding: [0xff,0x42,0x00,0x7e,0x83,0xf9,0x22,0x3e]
-
-//---------------------------------------------------------------------------//
-// integer literal truncation checks
-//---------------------------------------------------------------------------//
-
-s_mov_b32 s0, 0x101ffffffff
-// NOGCN: :[[@LINE-1]]:15: error: invalid operand for instruction
-
-s_mov_b32 s0, 0x1000000001
-// NOGCN: :[[@LINE-1]]:15: error: invalid operand for instruction
-
-s_mov_b32 s0, 0x1000000fff
-// NOGCN: :[[@LINE-1]]:15: error: invalid operand for instruction
-
-v_trunc_f32 v0, 0x1fffffffff0
-// NOGCN: :[[@LINE-1]]:17: error: invalid operand for instruction
-
-v_trunc_f32 v0, 0x100000001
-// NOGCN: :[[@LINE-1]]:17: error: invalid operand for instruction
-
-v_trunc_f32 v0, 0x1fffffff000
-// NOGCN: :[[@LINE-1]]:17: error: invalid operand for instruction
-
-s_mov_b64 s[0:1], 0x101ffffffff
-// GFX1250: s_mov_b64 s[0:1], 0x101ffffffff         ; encoding: [0xfe,0x01,0x80,0xbe,0xff,0xff,0xff,0xff,0x01,0x01,0x00,0x00]
-// NOGFX11: :[[@LINE-2]]:19: error: invalid operand for instruction
-// NOGFX12: :[[@LINE-3]]:19: error: invalid operand for instruction
-// NOGFX89: :[[@LINE-4]]:19: error: invalid operand for instruction
-// NOSICI: :[[@LINE-5]]:19: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-1]]:19: error: invalid operand for instruction
-
-s_mov_b64 s[0:1], 0x1000000001
-// GFX1250: s_mov_b64 s[0:1], 0x1000000001          ; encoding: [0xfe,0x01,0x80,0xbe,0x01,0x00,0x00,0x00,0x10,0x00,0x00,0x00]
-// NOGFX11: :[[@LINE-2]]:19: error: invalid operand for instruction
-// NOGFX12: :[[@LINE-3]]:19: error: invalid operand for instruction
-// NOGFX89: :[[@LINE-4]]:19: error: invalid operand for instruction
-// NOSICI: :[[@LINE-5]]:19: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-1]]:19: error: invalid operand for instruction
-
-s_mov_b64 s[0:1], 0x1000000fff
-// GFX1250: s_mov_b64 s[0:1], 0x1000000fff          ; encoding: [0xfe,0x01,0x80,0xbe,0xff,0x0f,0x00,0x00,0x10,0x00,0x00,0x00]
-// NOGFX11: :[[@LINE-2]]:19: error: invalid operand for instruction
-// NOGFX12: :[[@LINE-3]]:19: error: invalid operand for instruction
-// NOGFX89: :[[@LINE-4]]:19: error: invalid operand for instruction
-// NOSICI: :[[@LINE-5]]:19: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-1]]:19: error: invalid operand for instruction
-
-v_trunc_f64 v[0:1], 0x1fffffffff0
-// GFX1250: v_trunc_f64_e32 v[0:1], 0x1fffffffff0   ; encoding: [0xfe,0x2e,0x00,0x7e,0xf0,0xff,0xff,0xff,0xff,0x01,0x00,0x00]
-// NOCI: :[[@LINE-2]]:21: error: invalid operand for instruction
-// NOGFX11: :[[@LINE-3]]:21: error: invalid operand for instruction
-// NOGFX12: :[[@LINE-4]]:21: error: invalid operand for instruction
-// NOGFX89: :[[@LINE-5]]:21: error: invalid operand for instruction
-// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
-// NOCIVI: :[[@LINE-4]]:21: error: invalid operand for instruction
-
-v_trunc_f64 v[0:1], 0x100000001
-// GFX1250: v_trunc_f64_e32 v[0:1], 0x100000001     ; encoding: [0xfe,0x2e,0x00,0x7e,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00]
-// NOCI: :[[@LINE-2]]:21: error: invalid operand for instruction
-// NOGFX11: :[[@LINE-3]]:21: error: invalid operand for instruction
-// NOGFX12: :[[@LINE-4]]:21: error: invalid operand for instruction
-// NOGFX89: :[[@LINE-5]]:21: error: invalid operand for instruction
-// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
-// NOCIVI: :[[@LINE-4]]:21: error: invalid operand for instruction
-
-v_trunc_f64 v[0:1], 0x1fffffff000
-// GFX1250: v_trunc_f64_e32 v[0:1], 0x1fffffff000   ; encoding: [0xfe,0x2e,0x00,0x7e,0x00,0xf0,0xff,0xff,0xff,0x01,0x00,0x00]
-// NOCI: :[[@LINE-2]]:21: error: invalid operand for instruction
-// NOGFX11: :[[@LINE-3]]:21: error: invalid operand for instruction
-// NOGFX12: :[[@LINE-4]]:21: error: invalid operand for instruction
-// NOGFX89: :[[@LINE-5]]:21: error: invalid operand for instruction
-// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
-// NOCIVI: :[[@LINE-4]]:21: error: invalid operand for instruction
-
-//---------------------------------------------------------------------------//
-// named inline values: scc, vccz, execz
-//---------------------------------------------------------------------------//
-
-buffer_atomic_add v0, off, s[0:3], scc offset:4095
-// GFX11: buffer_atomic_add_u32 v0, off, s[0:3], src_scc offset:4095 ; encoding: [0xff,0x0f,0xd4,0xe0,0x00,0x00,0x00,0xfd]
-// GFX12: buffer_atomic_add_u32 v0, off, s[0:3], src_scc offset:4095 ; encoding: [0x7d,0x40,0x0d,0xc4,0x00,0x00,0x80,0x00,0x00,0xff,0x0f,0x00]
-// GFX1250-ASM: buffer_atomic_add_u32 v0, off, s[0:3], src_scc offset:4095 ; encoding: [0x7d,0x40,0x0d,0xc4,0x00,0x00,0x80,0x00,0x00,0xff,0x0f,0x00]
-// GFX1250-DIS: buffer_atomic_add_u32 v0, off, s[0:3], m0 offset:4095 ; encoding: [0x7d,0x40,0x0d,0xc4,0x00,0x00,0x80,0x00,0x00,0xff,0x0f,0x00]
-// GFX89: buffer_atomic_add v0, off, s[0:3], src_scc offset:4095 ; encoding: [0xff,0x0f,0x08,0xe1,0x00,0x00,0x00,0xfd]
-// SICI: buffer_atomic_add v0, off, s[0:3], src_scc offset:4095 ; encoding: [0xff,0x0f,0xc8,0xe0,0x00,0x00,0x00,0xfd]
-
-s_add_i32 s0, vccz, s0
-// GFX89: s_add_i32 s0, src_vccz, s0              ; encoding: [0xfb,0x00,0x00,0x81]
-// NOGFX11: :[[@LINE-2]]:15: error: src_vccz register not available on this GPU
-// NOGFX12: :[[@LINE-3]]:15: error: src_vccz register not available on this GPU
-// NOGFX1250: :[[@LINE-4]]:15: error: src_vccz register not available on this GPU
-// SICI: s_add_i32 s0, src_vccz, s0              ; encoding: [0xfb,0x00,0x00,0x81]
-
-s_add_i32 s0, execz, s0
-// GFX89: s_add_i32 s0, src_execz, s0             ; encoding: [0xfc,0x00,0x00,0x81]
-// NOGFX11: :[[@LINE-2]]:15: error: src_execz register not available on this GPU
-// NOGFX12: :[[@LINE-3]]:15: error: src_execz register not available on this GPU
-// NOGFX1250: :[[@LINE-4]]:15: error: src_execz register not available on this GPU
-// SICI: s_add_i32 s0, src_execz, s0             ; encoding: [0xfc,0x00,0x00,0x81]
-
-s_add_i32 s0, scc, s0
-// GFX11: s_add_i32 s0, src_scc, s0               ; encoding: [0xfd,0x00,0x00,0x81]
-// GFX12XX: s_add_co_i32 s0, src_scc, s0            ; encoding: [0xfd,0x00,0x00,0x81]
-// GFX89: s_add_i32 s0, src_scc, s0               ; encoding: [0xfd,0x00,0x00,0x81]
-// SICI: s_add_i32 s0, src_scc, s0               ; encoding: [0xfd,0x00,0x00,0x81]
-
-s_and_b64 s[0:1], s[0:1], src_vccz
-// GFX89: s_and_b64 s[0:1], s[0:1], src_vccz      ; encoding: [0x00,0xfb,0x80,0x86]
-// NOGFX11: :[[@LINE-2]]:27: error: src_vccz register not available on this GPU
-// NOGFX12: :[[@LINE-3]]:27: error: src_vccz register not available on this GPU
-// NOGFX1250: :[[@LINE-4]]:27: error: src_vccz register not available on this GPU
-// SICI: s_and_b64 s[0:1], s[0:1], src_vccz      ; encoding: [0x00,0xfb,0x80,0x87]
-
-s_and_b64 s[0:1], s[0:1], src_execz
-// GFX89: s_and_b64 s[0:1], s[0:1], src_execz     ; encoding: [0x00,0xfc,0x80,0x86]
-// NOGFX11: :[[@LINE-2]]:27: error: src_execz register not available on this GPU
-// NOGFX12: :[[@LINE-3]]:27: error: src_execz register not available on this GPU
-// NOGFX1250: :[[@LINE-4]]:27: error: src_execz register not available on this GPU
-// SICI: s_and_b64 s[0:1], s[0:1], src_execz     ; encoding: [0x00,0xfc,0x80,0x87]
-
-s_and_b64 s[0:1], s[0:1], src_scc
-// GFX11: s_and_b64 s[0:1], s[0:1], src_scc       ; encoding: [0x00,0xfd,0x80,0x8b]
-// GFX12XX: s_and_b64 s[0:1], s[0:1], src_scc       ; encoding: [0x00,0xfd,0x80,0x8b]
-// GFX89: s_and_b64 s[0:1], s[0:1], src_scc       ; encoding: [0x00,0xfd,0x80,0x86]
-// SICI: s_and_b64 s[0:1], s[0:1], src_scc       ; encoding: [0x00,0xfd,0x80,0x87]
-
-v_add_u16 v0, vccz, v0
-// GFX89: v_add_u16_e32 v0, src_vccz, v0          ; encoding: [0xfb,0x00,0x00,0x4c]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOSICIVI: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-
-v_add_u16_sdwa v0, scc, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// GFX9: v_add_u16_sdwa v0, src_scc, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x00,0x00,0x4c,0xfd,0x06,0x86,0x06]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:20: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_add_u16_sdwa v0, v0, scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// GFX9: v_add_u16_sdwa v0, v0, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0xfa,0x01,0x4c,0x00,0x06,0x06,0x86]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:24: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_add_u32 v0, execz, v0
-// GFX9: v_add_u32_e32 v0, src_execz, v0         ; encoding: [0xfc,0x00,0x00,0x68]
-// NOGFX11: :[[@LINE-2]]:15: error: src_execz register not available on this GPU
-// NOGFX12: :[[@LINE-3]]:15: error: src_execz register not available on this GPU
-// NOGFX1250: :[[@LINE-4]]:15: error: src_execz register not available on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:1: error: operands are not valid for this GPU or mode
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_add_u32_e64 v0, scc, v0
-// GFX11: v_add_nc_u32_e64 v0, src_scc, v0        ; encoding: [0x00,0x00,0x25,0xd5,0xfd,0x00,0x02,0x02]
-// GFX12XX: v_add_nc_u32_e64 v0, src_scc, v0        ; encoding: [0x00,0x00,0x25,0xd5,0xfd,0x00,0x02,0x02]
-// GFX9: v_add_u32_e64 v0, src_scc, v0           ; encoding: [0x00,0x00,0x34,0xd1,0xfd,0x00,0x02,0x00]
-// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-5]]:1: error: operands are not valid for this GPU or mode
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_cmp_eq_i64 vcc, scc, v[0:1]
-// GFX89: v_cmp_eq_i64_e32 vcc, src_scc, v[0:1]   ; encoding: [0xfd,0x00,0xc4,0x7d]
-// NOGFX11: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// SICI: v_cmp_eq_i64_e32 vcc, src_scc, v[0:1]   ; encoding: [0xfd,0x00,0x44,0x7d]
-
-v_max_f16 v0, execz, v0
-// GFX89: v_max_f16_e32 v0, src_execz, v0         ; encoding: [0xfc,0x00,0x00,0x5a]
-// NOGFX11: :[[@LINE-2]]:15: error: src_execz register not available on this GPU
-// NOGFX12: :[[@LINE-3]]:15: error: src_execz register not available on this GPU
-// NOGFX1250: :[[@LINE-4]]:15: error: src_execz register not available on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOSICIVI: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-
-v_max_f32 v0, vccz, v0
-// GFX89: v_max_f32_e32 v0, src_vccz, v0          ; encoding: [0xfb,0x00,0x00,0x16]
-// NOGFX11: :[[@LINE-2]]:15: error: src_vccz register not available on this GPU
-// NOGFX12: :[[@LINE-3]]:15: error: src_vccz register not available on this GPU
-// NOGFX1250: :[[@LINE-4]]:15: error: src_vccz register not available on this GPU
-// SICI: v_max_f32_e32 v0, src_vccz, v0          ; encoding: [0xfb,0x00,0x00,0x20]
-
-v_max_f64 v[0:1], scc, v[0:1]
-// GFX11: v_max_f64 v[0:1], src_scc, v[0:1]       ; encoding: [0x00,0x00,0x2a,0xd7,0xfd,0x00,0x02,0x02]
-// GFX12XX: v_max_num_f64_e32 v[0:1], src_scc, v[0:1] ; encoding: [0xfd,0x00,0x00,0x1c]
-// GFX89: v_max_f64 v[0:1], src_scc, v[0:1]       ; encoding: [0x00,0x00,0x83,0xd2,0xfd,0x00,0x02,0x00]
-// SICI: v_max_f64 v[0:1], src_scc, v[0:1]       ; encoding: [0x00,0x00,0xce,0xd2,0xfd,0x00,0x02,0x00]
-
-v_pk_add_f16 v0, execz, v0
-// GFX9: v_pk_add_f16 v0, src_execz, v0          ; encoding: [0x00,0x40,0x8f,0xd3,0xfc,0x00,0x02,0x18]
-// NOGFX11: :[[@LINE-2]]:18: error: src_execz register not available on this GPU
-// NOGFX12: :[[@LINE-3]]:18: error: src_execz register not available on this GPU
-// NOGFX1250: :[[@LINE-4]]:18: error: src_execz register not available on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_ceil_f16 v0, neg(vccz)
-// GFX89: v_ceil_f16_e64 v0, -src_vccz            ; encoding: [0x00,0x00,0x85,0xd1,0xfb,0x00,0x00,0x20]
-// NOGFX11: :[[@LINE-2]]:20: error: src_vccz register not available on this GPU
-// NOGFX12: :[[@LINE-3]]:20: error: src_vccz register not available on this GPU
-// NOGFX1250: :[[@LINE-4]]:20: error: src_vccz register not available on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOSICIVI: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-
-v_ceil_f16 v0, abs(scc)
-// GFX12: v_ceil_f16_e64 v0, |src_scc|            ; encoding: [0x00,0x01,0xdc,0xd5,0xfd,0x00,0x01,0x02]
-// GFX89: v_ceil_f16_e64 v0, |src_scc|            ; encoding: [0x00,0x01,0x85,0xd1,0xfd,0x00,0x00,0x00]
-// NOGFX11: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOSICIVI: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-
-v_ceil_f16 v0.l, abs(scc)
-// GFX11: v_ceil_f16_e64 v0.l, |src_scc|          ; encoding: [0x00,0x01,0xdc,0xd5,0xfd,0x00,0x01,0x02]
-// GFX1250: v_ceil_f16_e64 v0.l, |src_scc|          ; encoding: [0x00,0x01,0xdc,0xd5,0xfd,0x00,0x01,0x02]
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX89: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_ceil_f64 v[5:6], |execz|
-// CI: v_ceil_f64_e64 v[5:6], |src_execz|      ; encoding: [0x05,0x01,0x30,0xd3,0xfc,0x00,0x00,0x00]
-// GFX89: v_ceil_f64_e64 v[5:6], |src_execz|      ; encoding: [0x05,0x01,0x58,0xd1,0xfc,0x00,0x00,0x00]
-// NOGFX11: :[[@LINE-3]]:21: error: src_execz register not available on this GPU
-// NOGFX12: :[[@LINE-4]]:21: error: src_execz register not available on this GPU
-// NOGFX1250: :[[@LINE-5]]:21: error: src_execz register not available on this GPU
-// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
-
-v_ceil_f64 v[5:6], -vcc
-// CI: v_ceil_f64_e64 v[5:6], -vcc             ; encoding: [0x05,0x00,0x30,0xd3,0x6a,0x00,0x00,0x20]
-// GFX11: v_ceil_f64_e64 v[5:6], -vcc             ; encoding: [0x05,0x00,0x98,0xd5,0x6a,0x00,0x01,0x22]
-// GFX12: v_ceil_f64_e64 v[5:6], -vcc             ; encoding: [0x05,0x00,0x98,0xd5,0x6a,0x00,0x01,0x22]
-// GFX89: v_ceil_f64_e64 v[5:6], -vcc             ; encoding: [0x05,0x00,0x58,0xd1,0x6a,0x00,0x00,0x20]
-// NOGFX1250: :[[@LINE-5]]:12: error: invalid operand for instruction
-// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
-
-v_ceil_f32 v0, -vccz
-// GFX89: v_ceil_f32_e64 v0, -src_vccz            ; encoding: [0x00,0x00,0x5d,0xd1,0xfb,0x00,0x00,0x20]
-// NOGFX11: :[[@LINE-2]]:17: error: src_vccz register not available on this GPU
-// NOGFX12: :[[@LINE-3]]:17: error: src_vccz register not available on this GPU
-// NOGFX1250: :[[@LINE-4]]:17: error: src_vccz register not available on this GPU
-// SICI: v_ceil_f32_e64 v0, -src_vccz            ; encoding: [0x00,0x00,0x44,0xd3,0xfb,0x00,0x00,0x20]
-
-v_ceil_f32 v0, |execz|
-// GFX89: v_ceil_f32_e64 v0, |src_execz|          ; encoding: [0x00,0x01,0x5d,0xd1,0xfc,0x00,0x00,0x00]
-// NOGFX11: :[[@LINE-2]]:17: error: src_execz register not available on this GPU
-// NOGFX12: :[[@LINE-3]]:17: error: src_execz register not available on this GPU
-// NOGFX1250: :[[@LINE-4]]:17: error: src_execz register not available on this GPU
-// SICI: v_ceil_f32_e64 v0, |src_execz|          ; encoding: [0x00,0x01,0x44,0xd3,0xfc,0x00,0x00,0x00]
-
-v_ceil_f16_sdwa v5, |vccz| dst_sel:DWORD dst_unused:UNUSED_PRESERVE
-// GFX9: v_ceil_f16_sdwa v5, |src_vccz| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x8a,0x0a,0x7e,0xfb,0x16,0xa6,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:22: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_ceil_f16_sdwa v5, -scc dst_sel:DWORD dst_unused:UNUSED_PRESERVE
-// GFX9: v_ceil_f16_sdwa v5, -src_scc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x8a,0x0a,0x7e,0xfd,0x16,0x96,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:22: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_ceil_f32_sdwa v5, vccz dst_sel:DWORD src0_sel:DWORD
-// GFX9: v_ceil_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x3a,0x0a,0x7e,0xfb,0x16,0x86,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
-// NOSICI: :[[@LINE-5]]:1: error: sdwa variant of this instruction is not supported
-// NOVI: :[[@LINE-6]]:21: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-1]]:1: error: sdwa variant of this instruction is not supported
-
-v_ceil_f32_sdwa v5, |execz| dst_sel:DWORD src0_sel:DWORD
-// GFX9: v_ceil_f32_sdwa v5, |src_execz| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x3a,0x0a,0x7e,0xfc,0x16,0xa6,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
-// NOSICI: :[[@LINE-5]]:1: error: sdwa variant of this instruction is not supported
-// NOVI: :[[@LINE-6]]:22: error: invalid operand for instruction
-// NOSICIVI: :[[@LINE-1]]:1: error: sdwa variant of this instruction is not supported
-
-//---------------------------------------------------------------------------//
-// named inline values: shared_base, shared_limit, private_base, etc
-//---------------------------------------------------------------------------//
-
-buffer_atomic_add v0, off, s[0:3], src_shared_base offset:4095
-// GFX11: buffer_atomic_add_u32 v0, off, s[0:3], src_shared_base offset:4095 ; encoding: [0xff,0x0f,0xd4,0xe0,0x00,0x00,0x00,0xeb]
-// GFX9: buffer_atomic_add v0, off, s[0:3], src_shared_base offset:4095 ; encoding: [0xff,0x0f,0x08,0xe1,0x00,0x00,0x00,0xeb]
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:36: error: src_shared_base register not available on this GPU
-// NOVI: :[[@LINE-6]]:36: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:36: error: src_shared_base register not available on this GPU
-
-s_add_i32 s0, src_shared_base, s0
-// GFX11: s_add_i32 s0, src_shared_base, s0       ; encoding: [0xeb,0x00,0x00,0x81]
-// GFX12XX: s_add_co_i32 s0, src_shared_base, s0    ; encoding: [0xeb,0x00,0x00,0x81]
-// GFX9: s_add_i32 s0, src_shared_base, s0       ; encoding: [0xeb,0x00,0x00,0x81]
-// NOSICI: :[[@LINE-4]]:15: error: src_shared_base register not available on this GPU
-// NOVI: :[[@LINE-5]]:15: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:15: error: src_shared_base register not available on this GPU
-
-s_add_i32 s0, src_shared_limit, s0
-// GFX11: s_add_i32 s0, src_shared_limit, s0      ; encoding: [0xec,0x00,0x00,0x81]
-// GFX12XX: s_add_co_i32 s0, src_shared_limit, s0   ; encoding: [0xec,0x00,0x00,0x81]
-// GFX9: s_add_i32 s0, src_shared_limit, s0      ; encoding: [0xec,0x00,0x00,0x81]
-// NOSICI: :[[@LINE-4]]:15: error: src_shared_limit register not available on this GPU
-// NOVI: :[[@LINE-5]]:15: error: src_shared_limit register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:15: error: src_shared_limit register not available on this GPU
-
-s_add_i32 s0, src_private_base, s0
-// GFX11: s_add_i32 s0, src_private_base, s0      ; encoding: [0xed,0x00,0x00,0x81]
-// GFX12XX: s_add_co_i32 s0, src_private_base, s0   ; encoding: [0xed,0x00,0x00,0x81]
-// GFX9: s_add_i32 s0, src_private_base, s0      ; encoding: [0xed,0x00,0x00,0x81]
-// NOSICI: :[[@LINE-4]]:15: error: src_private_base register not available on this GPU
-// NOVI: :[[@LINE-5]]:15: error: src_private_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:15: error: src_private_base register not available on this GPU
-
-s_add_i32 s0, src_private_limit, s0
-// GFX11: s_add_i32 s0, src_private_limit, s0     ; encoding: [0xee,0x00,0x00,0x81]
-// GFX12XX: s_add_co_i32 s0, src_private_limit, s0  ; encoding: [0xee,0x00,0x00,0x81]
-// GFX9: s_add_i32 s0, src_private_limit, s0     ; encoding: [0xee,0x00,0x00,0x81]
-// NOSICI: :[[@LINE-4]]:15: error: src_private_limit register not available on this GPU
-// NOVI: :[[@LINE-5]]:15: error: src_private_limit register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:15: error: src_private_limit register not available on this GPU
-
-s_add_i32 s0, src_pops_exiting_wave_id, s0
-// GFX9: s_add_i32 s0, src_pops_exiting_wave_id, s0 ; encoding: [0xef,0x00,0x00,0x81]
-// NOGFX11: :[[@LINE-2]]:15: error: src_pops_exiting_wave_id register not available on this GPU
-// NOGFX12: :[[@LINE-3]]:15: error: src_pops_exiting_wave_id register not available on this GPU
-// NOGFX1250: :[[@LINE-4]]:15: error: src_pops_exiting_wave_id register not available on this GPU
-// NOSICI: :[[@LINE-5]]:15: error: src_pops_exiting_wave_id register not available on this GPU
-// NOVI: :[[@LINE-6]]:15: error: src_pops_exiting_wave_id register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:15: error: src_pops_exiting_wave_id register not available on this GPU
-
-s_and_b64 s[0:1], s[0:1], src_shared_base
-// GFX11: s_and_b64 s[0:1], s[0:1], src_shared_base ; encoding: [0x00,0xeb,0x80,0x8b]
-// GFX12XX: s_and_b64 s[0:1], s[0:1], src_shared_base ; encoding: [0x00,0xeb,0x80,0x8b]
-// GFX9: s_and_b64 s[0:1], s[0:1], src_shared_base ; encoding: [0x00,0xeb,0x80,0x86]
-// NOSICI: :[[@LINE-4]]:27: error: src_shared_base register not available on this GPU
-// NOVI: :[[@LINE-5]]:27: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:27: error: src_shared_base register not available on this GPU
-
-s_and_b64 s[0:1], s[0:1], src_shared_limit
-// GFX11: s_and_b64 s[0:1], s[0:1], src_shared_limit ; encoding: [0x00,0xec,0x80,0x8b]
-// GFX12XX: s_and_b64 s[0:1], s[0:1], src_shared_limit ; encoding: [0x00,0xec,0x80,0x8b]
-// GFX9: s_and_b64 s[0:1], s[0:1], src_shared_limit ; encoding: [0x00,0xec,0x80,0x86]
-// NOSICI: :[[@LINE-4]]:27: error: src_shared_limit register not available on this GPU
-// NOVI: :[[@LINE-5]]:27: error: src_shared_limit register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:27: error: src_shared_limit register not available on this GPU
-
-s_and_b64 s[0:1], s[0:1], src_private_base
-// GFX11: s_and_b64 s[0:1], s[0:1], src_private_base ; encoding: [0x00,0xed,0x80,0x8b]
-// GFX12XX: s_and_b64 s[0:1], s[0:1], src_private_base ; encoding: [0x00,0xed,0x80,0x8b]
-// GFX9: s_and_b64 s[0:1], s[0:1], src_private_base ; encoding: [0x00,0xed,0x80,0x86]
-// NOSICI: :[[@LINE-4]]:27: error: src_private_base register not available on this GPU
-// NOVI: :[[@LINE-5]]:27: error: src_private_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:27: error: src_private_base register not available on this GPU
-
-s_and_b64 s[0:1], s[0:1], src_private_limit
-// GFX11: s_and_b64 s[0:1], s[0:1], src_private_limit ; encoding: [0x00,0xee,0x80,0x8b]
-// GFX12XX: s_and_b64 s[0:1], s[0:1], src_private_limit ; encoding: [0x00,0xee,0x80,0x8b]
-// GFX9: s_and_b64 s[0:1], s[0:1], src_private_limit ; encoding: [0x00,0xee,0x80,0x86]
-// NOSICI: :[[@LINE-4]]:27: error: src_private_limit register not available on this GPU
-// NOVI: :[[@LINE-5]]:27: error: src_private_limit register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:27: error: src_private_limit register not available on this GPU
-
-s_and_b64 s[0:1], s[0:1], src_pops_exiting_wave_id
-// GFX9: s_and_b64 s[0:1], s[0:1], src_pops_exiting_wave_id ; encoding: [0x00,0xef,0x80,0x86]
-// NOGFX11: :[[@LINE-2]]:27: error: src_pops_exiting_wave_id register not available on this GPU
-// NOGFX12: :[[@LINE-3]]:27: error: src_pops_exiting_wave_id register not available on this GPU
-// NOGFX1250: :[[@LINE-4]]:27: error: src_pops_exiting_wave_id register not available on this GPU
-// NOSICI: :[[@LINE-5]]:27: error: src_pops_exiting_wave_id register not available on this GPU
-// NOVI: :[[@LINE-6]]:27: error: src_pops_exiting_wave_id register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:27: error: src_pops_exiting_wave_id register not available on this GPU
-
-v_add_u16 v0, src_shared_base, v0
-// GFX9: v_add_u16_e32 v0, src_shared_base, v0   ; encoding: [0xeb,0x00,0x00,0x4c]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:15: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_add_u16_sdwa v0, src_shared_base, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// GFX9: v_add_u16_sdwa v0, src_shared_base, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x00,0x00,0x4c,0xeb,0x06,0x86,0x06]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:20: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_add_u16_sdwa v0, v0, src_shared_base dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// GFX9: v_add_u16_sdwa v0, v0, src_shared_base dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0xd6,0x01,0x4c,0x00,0x06,0x06,0x86]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:24: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_add_u32 v0, src_shared_base, v0
-// GFX11: v_add_nc_u32_e32 v0, src_shared_base, v0 ; encoding: [0xeb,0x00,0x00,0x4a]
-// GFX12XX: v_add_nc_u32_e32 v0, src_shared_base, v0 ; encoding: [0xeb,0x00,0x00,0x4a]
-// GFX9: v_add_u32_e32 v0, src_shared_base, v0   ; encoding: [0xeb,0x00,0x00,0x68]
-// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-5]]:15: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_add_u32_e64 v0, src_shared_base, v0
-// GFX11: v_add_nc_u32_e64 v0, src_shared_base, v0 ; encoding: [0x00,0x00,0x25,0xd5,0xeb,0x00,0x02,0x02]
-// GFX12XX: v_add_nc_u32_e64 v0, src_shared_base, v0 ; encoding: [0x00,0x00,0x25,0xd5,0xeb,0x00,0x02,0x02]
-// GFX9: v_add_u32_e64 v0, src_shared_base, v0   ; encoding: [0x00,0x00,0x34,0xd1,0xeb,0x00,0x02,0x00]
-// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-5]]:19: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_cmp_eq_i64 vcc, src_shared_base, v[0:1]
-// GFX9: v_cmp_eq_i64_e32 vcc, src_shared_base, v[0:1] ; encoding: [0xeb,0x00,0xc4,0x7d]
-// NOGFX11: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:19: error: src_shared_base register not available on this GPU
-// NOVI: :[[@LINE-6]]:19: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:19: error: src_shared_base register not available on this GPU
-
-v_max_f16 v0, src_shared_base, v0
-// GFX12: v_max_num_f16_e32 v0, src_shared_base, v0 ; encoding: [0xeb,0x00,0x00,0x62]
-// GFX9: v_max_f16_e32 v0, src_shared_base, v0   ; encoding: [0xeb,0x00,0x00,0x5a]
-// NOGFX11: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:15: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_max_f16 v0.l, src_shared_base, v0.l
-// GFX11: v_max_f16_e32 v0.l, src_shared_base, v0.l ; encoding: [0xeb,0x00,0x00,0x72]
-// GFX1250: v_max_num_f16_e32 v0.l, src_shared_base, v0.l ; encoding: [0xeb,0x00,0x00,0x62]
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX9: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:17: error: src_shared_base register not available on this GPU
-
-v_max_f32 v0, src_shared_base, v0
-// GFX11: v_max_f32_e32 v0, src_shared_base, v0   ; encoding: [0xeb,0x00,0x00,0x20]
-// GFX12XX: v_max_num_f32_e32 v0, src_shared_base, v0 ; encoding: [0xeb,0x00,0x00,0x2c]
-// GFX9: v_max_f32_e32 v0, src_shared_base, v0   ; encoding: [0xeb,0x00,0x00,0x16]
-// NOSICI: :[[@LINE-4]]:15: error: src_shared_base register not available on this GPU
-// NOVI: :[[@LINE-5]]:15: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:15: error: src_shared_base register not available on this GPU
-
-v_max_f64 v[0:1], src_shared_base, v[0:1]
-// GFX11: v_max_f64 v[0:1], src_shared_base, v[0:1] ; encoding: [0x00,0x00,0x2a,0xd7,0xeb,0x00,0x02,0x02]
-// GFX12XX: v_max_num_f64_e32 v[0:1], src_shared_base, v[0:1] ; encoding: [0xeb,0x00,0x00,0x1c]
-// GFX9: v_max_f64 v[0:1], src_shared_base, v[0:1] ; encoding: [0x00,0x00,0x83,0xd2,0xeb,0x00,0x02,0x00]
-// NOSICI: :[[@LINE-4]]:19: error: src_shared_base register not available on this GPU
-// NOVI: :[[@LINE-5]]:19: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:19: error: src_shared_base register not available on this GPU
-
-v_pk_add_f16 v0, src_shared_base, v0
-// GFX11: v_pk_add_f16 v0, src_shared_base, v0    ; encoding: [0x00,0x40,0x0f,0xcc,0xeb,0x00,0x02,0x1a]
-// GFX12XX: v_pk_add_f16 v0, src_shared_base, v0    ; encoding: [0x00,0x40,0x0f,0xcc,0xeb,0x00,0x02,0x1a]
-// GFX9: v_pk_add_f16 v0, src_shared_base, v0    ; encoding: [0x00,0x40,0x8f,0xd3,0xeb,0x00,0x02,0x18]
-// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_ceil_f16 v0, neg(src_shared_base)
-// GFX12: v_ceil_f16_e64 v0, -src_shared_base     ; encoding: [0x00,0x00,0xdc,0xd5,0xeb,0x00,0x01,0x22]
-// GFX9: v_ceil_f16_e64 v0, -src_shared_base     ; encoding: [0x00,0x00,0x85,0xd1,0xeb,0x00,0x00,0x20]
-// NOGFX11: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:20: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_ceil_f16 v0.l, neg(src_shared_base)
-// GFX11: v_ceil_f16_e64 v0.l, -src_shared_base   ; encoding: [0x00,0x00,0xdc,0xd5,0xeb,0x00,0x01,0x22]
-// GFX1250: v_ceil_f16_e64 v0.l, -src_shared_base   ; encoding: [0x00,0x00,0xdc,0xd5,0xeb,0x00,0x01,0x22]
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX9: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:22: error: src_shared_base register not available on this GPU
-
-v_ceil_f16 v0, abs(src_shared_base)
-// GFX12: v_ceil_f16_e64 v0, |src_shared_base|    ; encoding: [0x00,0x01,0xdc,0xd5,0xeb,0x00,0x01,0x02]
-// GFX9: v_ceil_f16_e64 v0, |src_shared_base|    ; encoding: [0x00,0x01,0x85,0xd1,0xeb,0x00,0x00,0x00]
-// NOGFX11: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:20: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_ceil_f16 v0.l, abs(src_shared_base)
-// GFX11: v_ceil_f16_e64 v0.l, |src_shared_base|  ; encoding: [0x00,0x01,0xdc,0xd5,0xeb,0x00,0x01,0x02]
-// GFX1250: v_ceil_f16_e64 v0.l, |src_shared_base|  ; encoding: [0x00,0x01,0xdc,0xd5,0xeb,0x00,0x01,0x02]
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX9: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:22: error: src_shared_base register not available on this GPU
-
-v_ceil_f64 v[5:6], |src_shared_base|
-// GFX11: v_ceil_f64_e64 v[5:6], |src_shared_base| ; encoding: [0x05,0x01,0x98,0xd5,0xeb,0x00,0x01,0x02]
-// GFX12: v_ceil_f64_e64 v[5:6], |src_shared_base| ; encoding: [0x05,0x01,0x98,0xd5,0xeb,0x00,0x01,0x02]
-// GFX9: v_ceil_f64_e64 v[5:6], |src_shared_base| ; encoding: [0x05,0x01,0x58,0xd1,0xeb,0x00,0x00,0x00]
-// NOCI: :[[@LINE-4]]:21: error: src_shared_base register not available on this GPU
-// NOGFX1250: :[[@LINE-5]]:12: error: invalid operand for instruction
-// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-7]]:21: error: src_shared_base register not available on this GPU
-// NOCIVI: :[[@LINE-5]]:21: error: src_shared_base register not available on this GPU
-
-v_ceil_f64 v[5:6], -src_shared_base
-// GFX11: v_ceil_f64_e64 v[5:6], -src_shared_base ; encoding: [0x05,0x00,0x98,0xd5,0xeb,0x00,0x01,0x22]
-// GFX12: v_ceil_f64_e64 v[5:6], -src_shared_base ; encoding: [0x05,0x00,0x98,0xd5,0xeb,0x00,0x01,0x22]
-// GFX9: v_ceil_f64_e64 v[5:6], -src_shared_base ; encoding: [0x05,0x00,0x58,0xd1,0xeb,0x00,0x00,0x20]
-// NOCI: :[[@LINE-4]]:21: error: src_shared_base register not available on this GPU
-// NOGFX1250: :[[@LINE-5]]:12: error: invalid operand for instruction
-// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-7]]:21: error: src_shared_base register not available on this GPU
-// NOCIVI: :[[@LINE-5]]:21: error: src_shared_base register not available on this GPU
-
-v_ceil_f32 v0, -src_shared_base
-// GFX11: v_ceil_f32_e64 v0, -src_shared_base     ; encoding: [0x00,0x00,0xa2,0xd5,0xeb,0x00,0x01,0x22]
-// GFX12XX: v_ceil_f32_e64 v0, -src_shared_base     ; encoding: [0x00,0x00,0xa2,0xd5,0xeb,0x00,0x01,0x22]
-// GFX9: v_ceil_f32_e64 v0, -src_shared_base     ; encoding: [0x00,0x00,0x5d,0xd1,0xeb,0x00,0x00,0x20]
-// NOSICI: :[[@LINE-4]]:17: error: src_shared_base register not available on this GPU
-// NOVI: :[[@LINE-5]]:17: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:17: error: src_shared_base register not available on this GPU
-
-v_ceil_f32 v0, |src_shared_base|
-// GFX11: v_ceil_f32_e64 v0, |src_shared_base|    ; encoding: [0x00,0x01,0xa2,0xd5,0xeb,0x00,0x01,0x02]
-// GFX12XX: v_ceil_f32_e64 v0, |src_shared_base|    ; encoding: [0x00,0x01,0xa2,0xd5,0xeb,0x00,0x01,0x02]
-// GFX9: v_ceil_f32_e64 v0, |src_shared_base|    ; encoding: [0x00,0x01,0x5d,0xd1,0xeb,0x00,0x00,0x00]
-// NOSICI: :[[@LINE-4]]:17: error: src_shared_base register not available on this GPU
-// NOVI: :[[@LINE-5]]:17: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:17: error: src_shared_base register not available on this GPU
-
-v_ceil_f16_sdwa v5, |src_shared_base| dst_sel:DWORD dst_unused:UNUSED_PRESERVE
-// GFX9: v_ceil_f16_sdwa v5, |src_shared_base| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x8a,0x0a,0x7e,0xeb,0x16,0xa6,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:22: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_ceil_f16_sdwa v5, -src_shared_base dst_sel:DWORD dst_unused:UNUSED_PRESERVE
-// GFX9: v_ceil_f16_sdwa v5, -src_shared_base dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x8a,0x0a,0x7e,0xeb,0x16,0x96,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:22: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_ceil_f32_sdwa v5, src_shared_base dst_sel:DWORD src0_sel:DWORD
-// GFX9: v_ceil_f32_sdwa v5, src_shared_base dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x3a,0x0a,0x7e,0xeb,0x16,0x86,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
-// NOSICI: :[[@LINE-5]]:1: error: sdwa variant of this instruction is not supported
-// NOVI: :[[@LINE-6]]:21: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: sdwa variant of this instruction is not supported
-
-v_ceil_f32_sdwa v5, |src_shared_base| dst_sel:DWORD src0_sel:DWORD
-// GFX9: v_ceil_f32_sdwa v5, |src_shared_base| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x3a,0x0a,0x7e,0xeb,0x16,0xa6,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
-// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
-// NOSICI: :[[@LINE-5]]:1: error: sdwa variant of this instruction is not supported
-// NOVI: :[[@LINE-6]]:22: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: sdwa variant of this instruction is not supported
-
-//---------------------------------------------------------------------------//
-// named inline values compete with other scalars for constant bus access
-//---------------------------------------------------------------------------//
-
-v_add_u32 v0, private_base, s0
-// GFX11: v_add_nc_u32_e64 v0, src_private_base, s0 ; encoding: [0x00,0x00,0x25,0xd5,0xed,0x00,0x00,0x02]
-// GFX12XX: v_add_nc_u32_e64 v0, src_private_base, s0 ; encoding: [0x00,0x00,0x25,0xd5,0xed,0x00,0x00,0x02]
-// NOGFX9: :[[@LINE-3]]:29: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-5]]:15: error: src_private_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_add_u32 v0, scc, s0
-// GFX11: v_add_nc_u32_e64 v0, src_scc, s0        ; encoding: [0x00,0x00,0x25,0xd5,0xfd,0x00,0x00,0x02]
-// GFX12XX: v_add_nc_u32_e64 v0, src_scc, s0        ; encoding: [0x00,0x00,0x25,0xd5,0xfd,0x00,0x00,0x02]
-// NOGFX9: :[[@LINE-3]]:20: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-5]]:1: error: operands are not valid for this GPU or mode
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-// v_div_fmas implicitly reads VCC
-v_div_fmas_f32 v0, shared_base, v0, v1
-// GFX11: v_div_fmas_f32 v0, src_shared_base, v0, v1 ; encoding: [0x00,0x00,0x37,0xd6,0xeb,0x00,0x06,0x04]
-// GFX12XX: v_div_fmas_f32 v0, src_shared_base, v0, v1 ; encoding: [0x00,0x00,0x37,0xd6,0xeb,0x00,0x06,0x04]
-// NOGFX9: :[[@LINE-3]]:20: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-4]]:20: error: src_shared_base register not available on this GPU
-// NOVI: :[[@LINE-5]]:20: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:20: error: src_shared_base register not available on this GPU
-
-// v_div_fmas implicitly reads VCC
-v_div_fmas_f32 v0, v0, shared_limit, v1
-// GFX11: v_div_fmas_f32 v0, v0, src_shared_limit, v1 ; encoding: [0x00,0x00,0x37,0xd6,0x00,0xd9,0x05,0x04]
-// GFX12XX: v_div_fmas_f32 v0, v0, src_shared_limit, v1 ; encoding: [0x00,0x00,0x37,0xd6,0x00,0xd9,0x05,0x04]
-// NOGFX9: :[[@LINE-3]]:24: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-4]]:24: error: src_shared_limit register not available on this GPU
-// NOVI: :[[@LINE-5]]:24: error: src_shared_limit register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:24: error: src_shared_limit register not available on this GPU
-
-// v_div_fmas implicitly reads VCC
-v_div_fmas_f32 v0, v0, v1, private_limit
-// GFX11: v_div_fmas_f32 v0, v0, v1, src_private_limit ; encoding: [0x00,0x00,0x37,0xd6,0x00,0x03,0xba,0x03]
-// GFX12XX: v_div_fmas_f32 v0, v0, v1, src_private_limit ; encoding: [0x00,0x00,0x37,0xd6,0x00,0x03,0xba,0x03]
-// NOGFX9: :[[@LINE-3]]:28: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-4]]:28: error: src_private_limit register not available on this GPU
-// NOVI: :[[@LINE-5]]:28: error: src_private_limit register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:28: error: src_private_limit register not available on this GPU
-
-// v_div_fmas implicitly reads VCC
-v_div_fmas_f32 v0, execz, v0, v1
-// NOGFX11: :[[@LINE-1]]:20: error: src_execz register not available on this GPU
-// NOGFX12: :[[@LINE-2]]:20: error: src_execz register not available on this GPU
-// NOGFX1250: :[[@LINE-3]]:20: error: src_execz register not available on this GPU
-// NOGFX89: :[[@LINE-4]]:20: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-5]]:20: error: invalid operand (violates constant bus restrictions)
-// NOSICIVI: :[[@LINE-1]]:20: error: invalid operand (violates constant bus restrictions)
-
-// v_div_fmas implicitly reads VCC
-v_div_fmas_f32 v0, v0, scc, v1
-// GFX11: v_div_fmas_f32 v0, v0, src_scc, v1      ; encoding: [0x00,0x00,0x37,0xd6,0x00,0xfb,0x05,0x04]
-// GFX12XX: v_div_fmas_f32 v0, v0, src_scc, v1      ; encoding: [0x00,0x00,0x37,0xd6,0x00,0xfb,0x05,0x04]
-// NOGFX89: :[[@LINE-3]]:24: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-4]]:24: error: invalid operand (violates constant bus restrictions)
-// NOSICIVI: :[[@LINE-1]]:24: error: invalid operand (violates constant bus restrictions)
-
-// v_div_fmas implicitly reads VCC
-v_div_fmas_f32 v0, v0, v1, vccz
-// NOGFX11: :[[@LINE-1]]:28: error: src_vccz register not available on this GPU
-// NOGFX12: :[[@LINE-2]]:28: error: src_vccz register not available on this GPU
-// NOGFX1250: :[[@LINE-3]]:28: error: src_vccz register not available on this GPU
-// NOGFX89: :[[@LINE-4]]:28: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-5]]:28: error: invalid operand (violates constant bus restrictions)
-// NOSICIVI: :[[@LINE-1]]:28: error: invalid operand (violates constant bus restrictions)
-
-// v_addc_co_u32 implicitly reads VCC (VOP2)
-v_addc_co_u32 v0, vcc, shared_base, v0, vcc
-// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX9: :[[@LINE-4]]:24: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_madak_f32 v0, shared_base, v0, 0x11213141
-// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX9: :[[@LINE-4]]:17: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-5]]:17: error: src_shared_base register not available on this GPU
-// NOVI: :[[@LINE-6]]:17: error: src_shared_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:17: error: src_shared_base register not available on this GPU
-
-v_madak_f32 v0, scc, v0, 0x11213141
-// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:17: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-5]]:17: error: invalid operand (violates constant bus restrictions)
-// NOSICIVI: :[[@LINE-1]]:17: error: invalid operand (violates constant bus restrictions)
-
-v_madak_f32 v0, 0xff32ff, v0, 0x11213141
-// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:31: error: only one unique literal operand is allowed
-// NOSICI: :[[@LINE-5]]:31: error: only one unique literal operand is allowed
-// NOSICIVI: :[[@LINE-1]]:31: error: only one unique literal operand is allowed
-
-v_madak_f32 v0, 0xff32ff, v0, 1
-// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:31: error: only one unique literal operand is allowed
-// NOSICI: :[[@LINE-5]]:31: error: only one unique literal operand is allowed
-// NOSICIVI: :[[@LINE-1]]:31: error: only one unique literal operand is allowed
-
-v_madmk_f32 v0, 0xff32ff, 0x11213141, v0
-// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:27: error: only one unique literal operand is allowed
-// NOSICI: :[[@LINE-5]]:27: error: only one unique literal operand is allowed
-// NOSICIVI: :[[@LINE-1]]:27: error: only one unique literal operand is allowed
-
-v_madmk_f32 v0, 0xff32ff, -1, v0
-// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:27: error: only one unique literal operand is allowed
-// NOSICI: :[[@LINE-5]]:27: error: only one unique literal operand is allowed
-// NOSICIVI: :[[@LINE-1]]:27: error: only one unique literal operand is allowed
-
-v_madak_f16 v0, 0xff32, v0, 0x1122
-// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:29: error: only one unique literal operand is allowed
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_madak_f16 v0, 0xff32, v0, 0
-// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:29: error: only one unique literal operand is allowed
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_madmk_f16 v0, 0xff32, 0x1122, v0
-// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:25: error: only one unique literal operand is allowed
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_madmk_f16 v0, 0xff32, 1, v0
-// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:25: error: only one unique literal operand is allowed
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_cmp_eq_f32 s[0:1], private_base, private_limit
-// NOGFX11: :[[@LINE-1]]:14: error: invalid operand for instruction
-// NOGFX12: :[[@LINE-2]]:14: error: invalid operand for instruction
-// NOGFX1250: :[[@LINE-3]]:14: error: invalid operand for instruction
-// NOGFX9: :[[@LINE-4]]:36: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-5]]:22: error: src_private_base register not available on this GPU
-// NOVI: :[[@LINE-6]]:22: error: src_private_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:22: error: src_private_base register not available on this GPU
-
-v_cmp_eq_f32 s[0:1], private_base, s0
-// NOGFX11: :[[@LINE-1]]:14: error: invalid operand for instruction
-// NOGFX12: :[[@LINE-2]]:14: error: invalid operand for instruction
-// NOGFX1250: :[[@LINE-3]]:14: error: invalid operand for instruction
-// NOGFX9: :[[@LINE-4]]:36: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-5]]:22: error: src_private_base register not available on this GPU
-// NOVI: :[[@LINE-6]]:22: error: src_private_base register not available on this GPU
-// NOSICIVI: :[[@LINE-1]]:22: error: src_private_base register not available on this GPU
-
-v_cmp_eq_f32 s[0:1], execz, s0
-// NOGFX11: :[[@LINE-1]]:22: error: src_execz register not available on this GPU
-// NOGFX12: :[[@LINE-2]]:22: error: src_execz register not available on this GPU
-// NOGFX1250: :[[@LINE-3]]:22: error: src_execz register not available on this GPU
-// NOGFX89: :[[@LINE-4]]:29: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-5]]:29: error: invalid operand (violates constant bus restrictions)
-// NOSICIVI: :[[@LINE-1]]:29: error: invalid operand (violates constant bus restrictions)
-
-v_pk_add_f16 v255, private_base, private_limit
-// GFX11: v_pk_add_f16 v255, src_private_base, src_private_limit ; encoding: [0xff,0x40,0x0f,0xcc,0xed,0xdc,0x01,0x1a]
-// GFX12XX: v_pk_add_f16 v255, src_private_base, src_private_limit ; encoding: [0xff,0x40,0x0f,0xcc,0xed,0xdc,0x01,0x1a]
-// NOGFX9: :[[@LINE-3]]:34: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-v_pk_add_f16 v255, vccz, execz
-// NOGFX11: :[[@LINE-1]]:20: error: src_vccz register not available on this GPU
-// NOGFX12: :[[@LINE-2]]:20: error: src_vccz register not available on this GPU
-// NOGFX1250: :[[@LINE-3]]:20: error: src_vccz register not available on this GPU
-// NOGFX9: :[[@LINE-4]]:26: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
-// NOSICIVI: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-
-//---------------------------------------------------------------------------//
-// check lit() syntax.
-//---------------------------------------------------------------------------//
-
-v_sqrt_f32 v2, lit(123)
-// GFX11: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
-// GFX12: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
-// GFX1250-ASM: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
-// GFX1250-DIS: v_sqrt_f32_e32 v2, 0x7b                 ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
-// GFX89: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x4e,0x04,0x7e,0x7b,0x00,0x00,0x00]
-// SICI: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
-
-v_sqrt_f32 v2, abs(lit(123))
-// GFX11: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
-// GFX12: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
-// GFX1250-ASM: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
-// GFX1250-DIS: v_sqrt_f32_e32 v2, 0x7b                 ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
-// GFX89: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x4e,0x04,0x7e,0x7b,0x00,0x00,0x00]
-// SICI: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
-
-v_sqrt_f32 v2, lit(123.0)
-// GFX11: v_sqrt_f32_e32 v2, lit(0x42f60000)      ; encoding: [0xff,0x66,0x04,0x7e,0x00,0x00,0xf6,0x42]
-// GFX12: v_sqrt_f32_e32 v2, lit(0x42f60000)      ; encoding: [0xff,0x66,0x04,0x7e,0x00,0x00,0xf6,0x42]
-// GFX1250-ASM: v_sqrt_f32_e32 v2, lit(0x42f60000)      ; encoding: [0xff,0x66,0x04,0x7e,0x00,0x00,0xf6,0x42]
-// GFX1250-DIS: v_sqrt_f32_e32 v2, 0x42f60000           ; encoding: [0xff,0x66,0x04,0x7e,0x00,0x00,0xf6,0x42]
-// GFX89: v_sqrt_f32_e32 v2, lit(0x42f60000)      ; encoding: [0xff,0x4e,0x04,0x7e,0x00,0x00,0xf6,0x42]
-// SICI: v_sqrt_f32_e32 v2, lit(0x42f60000)      ; encoding: [0xff,0x66,0x04,0x7e,0x00,0x00,0xf6,0x42]
-
-v_sqrt_f64 v[2:3], lit(123.0)
-// GFX11: v_sqrt_f64_e32 v[2:3], lit(0x405ec000)  ; encoding: [0xff,0x68,0x04,0x7e,0x00,0xc0,0x5e,0x40]
-// GFX12: v_sqrt_f64_e32 v[2:3], lit(0x405ec000)  ; encoding: [0xff,0x68,0x04,0x7e,0x00,0xc0,0x5e,0x40]
-// GFX1250-ASM: v_sqrt_f64_e32 v[2:3], lit(0x405ec000)  ; encoding: [0xfe,0x68,0x04,0x7e,0x00,0xc0,0x5e,0x40,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: v_sqrt_f64_e32 v[2:3], lit64(0x405ec000) ; encoding: [0xfe,0x68,0x04,0x7e,0x00,0xc0,0x5e,0x40,0x00,0x00,0x00,0x00]
-// GFX89: v_sqrt_f64_e32 v[2:3], lit(0x405ec000)  ; encoding: [0xff,0x50,0x04,0x7e,0x00,0xc0,0x5e,0x40]
-// SICI: v_sqrt_f64_e32 v[2:3], lit(0x405ec000)  ; encoding: [0xff,0x68,0x04,0x7e,0x00,0xc0,0x5e,0x40]
-
-v_sqrt_f64 v[2:3], lit(123)
-// GFX11: v_sqrt_f64_e32 v[2:3], lit(0x7b)        ; encoding: [0xff,0x68,0x04,0x7e,0x7b,0x00,0x00,0x00]
-// GFX12: v_sqrt_f64_e32 v[2:3], lit(0x7b)        ; encoding: [0xff,0x68,0x04,0x7e,0x7b,0x00,0x00,0x00]
-// GFX1250-ASM: v_sqrt_f64_e32 v[2:3], lit(0x7b)        ; encoding: [0xfe,0x68,0x04,0x7e,0x7b,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: v_sqrt_f64_e32 v[2:3], lit64(0x7b)      ; encoding: [0xfe,0x68,0x04,0x7e,0x7b,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
-// GFX89: v_sqrt_f64_e32 v[2:3], lit(0x7b)        ; encoding: [0xff,0x50,0x04,0x7e,0x7b,0x00,0x00,0x00]
-// SICI: v_sqrt_f64_e32 v[2:3], lit(0x7b)        ; encoding: [0xff,0x68,0x04,0x7e,0x7b,0x00,0x00,0x00]
-
-v_sqrt_f32 v2, lit 123.0
-// NOGCN: :[[@LINE-1]]:20: error: expected left paren after lit
-
-v_sqrt_f32 v2, lit(123.0
-// NOGCN: :[[@LINE-1]]:25: error: expected closing parentheses
-
-v_sqrt_f32 v2, lit(v1)
-// NOGCN: :[[@LINE-1]]:20: error: expected immediate with lit modifier
-
-// Make sure lit() is accepted on operands without modifiers.
-
-v_madak_f32 v4, lit(0x7e8), v8, lit(0x7e8)
-// GFX89: v_madak_f32 v4, lit(0x7e8), v8, lit(0x7e8) ; encoding: [0xff,0x10,0x08,0x30,0xe8,0x07,0x00,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// SICI: v_madak_f32 v4, lit(0x7e8), v8, lit(0x7e8) ; encoding: [0xff,0x10,0x08,0x42,0xe8,0x07,0x00,0x00]
-
-v_madak_f32 v4, lit(lit(0x7e8)), v8, lit(0x7e8)
-// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:24: error: not a valid operand.
-// NOSICI: :[[@LINE-5]]:24: error: not a valid operand.
-// NOSICIVI: :[[@LINE-1]]:24: error: not a valid operand.
+// GFX11: v_fract_f64_e32 v[0:1], 0x3e22

>From 664f365c9c6fad1dcb53c17a2b0e05d79c40d9e9 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 13:25:43 +0530
Subject: [PATCH 24/55] Update literals.s

---
 llvm/test/MC/AMDGPU/literals.s | 10814 ++++++++++++++++++++++++++++---
 1 file changed, 9857 insertions(+), 957 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/literals.s b/llvm/test/MC/AMDGPU/literals.s
index 0b86e493de71e..c3c8d941ad43f 100644
--- a/llvm/test/MC/AMDGPU/literals.s
+++ b/llvm/test/MC/AMDGPU/literals.s
@@ -1,958 +1,9858 @@
 // NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
-// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=SICI
-// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=SICI,CI
-// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=GFX8PLUS,GFX89
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefixes=GFX8PLUS,GFX89,GFX9
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck %s --check-prefixes=GFX8PLUS,GFX11
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -show-encoding %s | FileCheck %s --check-prefixes=GFX8PLUS,GFX12XX,GFX12
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 -show-encoding %s | FileCheck %s --check-prefixes=GFX8PLUS,GFX12XX,GFX1250,GFX1250-ASM
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 -show-encoding %s | %extract-encodings | llvm-mc -triple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 -disassemble -show-encoding | FileCheck %s --check-prefixes=GFX8PLUS,GFX12XX,GFX1250,GFX1250-DIS
-
-// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOSICI,NOSI --implicit-check-not=error:
-// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOSICI,NOCI --implicit-check-not=error:
-// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOGFX8PLUS,NOGFX89,NOVI --implicit-check-not=error:
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOGFX8PLUS,NOGFX89,NOGFX9 --implicit-check-not=error:
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOGFX8PLUS,NOGFX11 --implicit-check-not=error:
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 %s -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOGFX8PLUS,NOGFX12 --implicit-check-not=error:
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1250 %s -mattr=+real-true16 -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOGFX8PLUS,NOGFX1250 --implicit-check-not=error:
-
-//---------------------------------------------------------------------------//
-// fp literal, expected fp operand
-//---------------------------------------------------------------------------//
-
-v_fract_f64 v[0:1], 0.5
-// GFX11: v_fract_f64_e32 v[0:1], 0.5             ; encoding: [0xf0,0x7c,0x00,0x7e]
-// GFX12XX: v_fract_f64_e32 v[0:1], 0.5             ; encoding: [0xf0,0x7c,0x00,0x7e]
-// GFX89: v_fract_f64_e32 v[0:1], 0.5             ; encoding: [0xf0,0x64,0x00,0x7e]
-// SICI: v_fract_f64_e32 v[0:1], 0.5             ; encoding: [0xf0,0x7c,0x00,0x7e]
-
-v_sqrt_f64 v[0:1], -4.0
-// GFX11: v_sqrt_f64_e32 v[0:1], -4.0             ; encoding: [0xf7,0x68,0x00,0x7e]
-// GFX12XX: v_sqrt_f64_e32 v[0:1], -4.0             ; encoding: [0xf7,0x68,0x00,0x7e]
-// GFX89: v_sqrt_f64_e32 v[0:1], -4.0             ; encoding: [0xf7,0x50,0x00,0x7e]
-// SICI: v_sqrt_f64_e32 v[0:1], -4.0             ; encoding: [0xf7,0x68,0x00,0x7e]
-
-v_log_clamp_f32 v1, 0.5
-// NOGFX8PLUS: :[[@LINE-1]]:1: error: instruction not supported on this GPU
-// SICI: v_log_clamp_f32_e32 v1, 0.5             ; encoding: [0xf0,0x4c,0x02,0x7e]
-
-v_trunc_f32 v0, 0.5
-// GFX11: v_trunc_f32_e32 v0, 0.5                 ; encoding: [0xf0,0x42,0x00,0x7e]
-// GFX12XX: v_trunc_f32_e32 v0, 0.5                 ; encoding: [0xf0,0x42,0x00,0x7e]
-// GFX89: v_trunc_f32_e32 v0, 0.5                 ; encoding: [0xf0,0x38,0x00,0x7e]
-// SICI: v_trunc_f32_e32 v0, 0.5                 ; encoding: [0xf0,0x42,0x00,0x7e]
-
-v_fract_f64 v[0:1], -1.0
-// GFX11: v_fract_f64_e32 v[0:1], -1.0            ; encoding: [0xf3,0x7c,0x00,0x7e]
-// GFX12XX: v_fract_f64_e32 v[0:1], -1.0            ; encoding: [0xf3,0x7c,0x00,0x7e]
-// GFX89: v_fract_f64_e32 v[0:1], -1.0            ; encoding: [0xf3,0x64,0x00,0x7e]
-// SICI: v_fract_f64_e32 v[0:1], -1.0            ; encoding: [0xf3,0x7c,0x00,0x7e]
-
-v_trunc_f32 v0, -1.0
-// GFX11: v_trunc_f32_e32 v0, -1.0                ; encoding: [0xf3,0x42,0x00,0x7e]
-// GFX12XX: v_trunc_f32_e32 v0, -1.0                ; encoding: [0xf3,0x42,0x00,0x7e]
-// GFX89: v_trunc_f32_e32 v0, -1.0                ; encoding: [0xf3,0x38,0x00,0x7e]
-// SICI: v_trunc_f32_e32 v0, -1.0                ; encoding: [0xf3,0x42,0x00,0x7e]
-
-v_fract_f64 v[0:1], 4.0
-// GFX11: v_fract_f64_e32 v[0:1], 4.0             ; encoding: [0xf6,0x7c,0x00,0x7e]
-// GFX12XX: v_fract_f64_e32 v[0:1], 4.0             ; encoding: [0xf6,0x7c,0x00,0x7e]
-// GFX89: v_fract_f64_e32 v[0:1], 4.0             ; encoding: [0xf6,0x64,0x00,0x7e]
-// SICI: v_fract_f64_e32 v[0:1], 4.0             ; encoding: [0xf6,0x7c,0x00,0x7e]
-
-v_trunc_f32 v0, 4.0
-// GFX11: v_trunc_f32_e32 v0, 4.0                 ; encoding: [0xf6,0x42,0x00,0x7e]
-// GFX12XX: v_trunc_f32_e32 v0, 4.0                 ; encoding: [0xf6,0x42,0x00,0x7e]
-// GFX89: v_trunc_f32_e32 v0, 4.0                 ; encoding: [0xf6,0x38,0x00,0x7e]
-// SICI: v_trunc_f32_e32 v0, 4.0                 ; encoding: [0xf6,0x42,0x00,0x7e]
-
-v_fract_f64 v[0:1], 0.0
-// GFX11: v_fract_f64_e32 v[0:1], 0               ; encoding: [0x80,0x7c,0x00,0x7e]
-// GFX12XX: v_fract_f64_e32 v[0:1], 0               ; encoding: [0x80,0x7c,0x00,0x7e]
-// GFX89: v_fract_f64_e32 v[0:1], 0               ; encoding: [0x80,0x64,0x00,0x7e]
-// SICI: v_fract_f64_e32 v[0:1], 0               ; encoding: [0x80,0x7c,0x00,0x7e]
-
-v_trunc_f32 v0, 0.0
-// GFX11: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x42,0x00,0x7e]
-// GFX12XX: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x42,0x00,0x7e]
-// GFX89: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x38,0x00,0x7e]
-// SICI: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x42,0x00,0x7e]
-
-v_fract_f64 v[0:1], 1.5
-// GFX11: v_fract_f64_e32 v[0:1], 0x3ff80000      ; encoding: [0xff,0x7c,0x00,0x7e,0x00,0x00,0xf8,0x3f]
-// GFX12XX: v_fract_f64_e32 v[0:1], 0x3ff80000      ; encoding: [0xff,0x7c,0x00,0x7e,0x00,0x00,0xf8,0x3f]
-// GFX89: v_fract_f64_e32 v[0:1], 0x3ff80000      ; encoding: [0xff,0x64,0x00,0x7e,0x00,0x00,0xf8,0x3f]
-// SICI: v_fract_f64_e32 v[0:1], 0x3ff80000      ; encoding: [0xff,0x7c,0x00,0x7e,0x00,0x00,0xf8,0x3f]
-
-v_trunc_f32 v0, 1.5
-// GFX11: v_trunc_f32_e32 v0, 0x3fc00000          ; encoding: [0xff,0x42,0x00,0x7e,0x00,0x00,0xc0,0x3f]
-// GFX12XX: v_trunc_f32_e32 v0, 0x3fc00000          ; encoding: [0xff,0x42,0x00,0x7e,0x00,0x00,0xc0,0x3f]
-// GFX89: v_trunc_f32_e32 v0, 0x3fc00000          ; encoding: [0xff,0x38,0x00,0x7e,0x00,0x00,0xc0,0x3f]
-// SICI: v_trunc_f32_e32 v0, 0x3fc00000          ; encoding: [0xff,0x42,0x00,0x7e,0x00,0x00,0xc0,0x3f]
-
-v_fract_f64 v[0:1], -3.1415
-// GFX11: v_fract_f64_e32 v[0:1], 0xc00921ca      ; encoding: [0xff,0x7c,0x00,0x7e,0xca,0x21,0x09,0xc0]
-// GFX12: v_fract_f64_e32 v[0:1], 0xc00921ca      ; encoding: [0xff,0x7c,0x00,0x7e,0xca,0x21,0x09,0xc0]
-// GFX1250: v_fract_f64_e32 v[0:1], 0xc00921cac083126f ; encoding: [0xfe,0x7c,0x00,0x7e,0x6f,0x12,0x83,0xc0,0xca,0x21,0x09,0xc0]
-// GFX89: v_fract_f64_e32 v[0:1], 0xc00921ca      ; encoding: [0xff,0x64,0x00,0x7e,0xca,0x21,0x09,0xc0]
-// NOGFX11: :[[@LINE-5]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOGFX12: :[[@LINE-6]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// SICI: v_fract_f64_e32 v[0:1], 0xc00921ca      ; encoding: [0xff,0x7c,0x00,0x7e,0xca,0x21,0x09,0xc0]
-
-v_trunc_f32 v0, -3.1415
-// GFX11: v_trunc_f32_e32 v0, 0xc0490e56          ; encoding: [0xff,0x42,0x00,0x7e,0x56,0x0e,0x49,0xc0]
-// GFX12XX: v_trunc_f32_e32 v0, 0xc0490e56          ; encoding: [0xff,0x42,0x00,0x7e,0x56,0x0e,0x49,0xc0]
-// GFX89: v_trunc_f32_e32 v0, 0xc0490e56          ; encoding: [0xff,0x38,0x00,0x7e,0x56,0x0e,0x49,0xc0]
-// SICI: v_trunc_f32_e32 v0, 0xc0490e56          ; encoding: [0xff,0x42,0x00,0x7e,0x56,0x0e,0x49,0xc0]
-
-v_fract_f64 v[0:1], 100000000000000000000000.0
-// GFX11: v_fract_f64_e32 v[0:1], 0x44b52d02      ; encoding: [0xff,0x7c,0x00,0x7e,0x02,0x2d,0xb5,0x44]
-// GFX12: v_fract_f64_e32 v[0:1], 0x44b52d02      ; encoding: [0xff,0x7c,0x00,0x7e,0x02,0x2d,0xb5,0x44]
-// GFX1250: v_fract_f64_e32 v[0:1], 0x44b52d02c7e14af6 ; encoding: [0xfe,0x7c,0x00,0x7e,0xf6,0x4a,0xe1,0xc7,0x02,0x2d,0xb5,0x44]
-// GFX89: v_fract_f64_e32 v[0:1], 0x44b52d02      ; encoding: [0xff,0x64,0x00,0x7e,0x02,0x2d,0xb5,0x44]
-// NOGFX11: :[[@LINE-5]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOGFX12: :[[@LINE-6]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// SICI: v_fract_f64_e32 v[0:1], 0x44b52d02      ; encoding: [0xff,0x7c,0x00,0x7e,0x02,0x2d,0xb5,0x44]
-
-v_trunc_f32 v0, 100000000000000000000000.0
-// GFX11: v_trunc_f32_e32 v0, 0x65a96816          ; encoding: [0xff,0x42,0x00,0x7e,0x16,0x68,0xa9,0x65]
-// GFX12XX: v_trunc_f32_e32 v0, 0x65a96816          ; encoding: [0xff,0x42,0x00,0x7e,0x16,0x68,0xa9,0x65]
-// GFX89: v_trunc_f32_e32 v0, 0x65a96816          ; encoding: [0xff,0x38,0x00,0x7e,0x16,0x68,0xa9,0x65]
-// SICI: v_trunc_f32_e32 v0, 0x65a96816          ; encoding: [0xff,0x42,0x00,0x7e,0x16,0x68,0xa9,0x65]
-
-v_fract_f64 v[0:1], 10000000.0
-// GFX11: v_fract_f64_e32 v[0:1], 0x416312d0      ; encoding: [0xff,0x7c,0x00,0x7e,0xd0,0x12,0x63,0x41]
-// GFX12XX: v_fract_f64_e32 v[0:1], 0x416312d0      ; encoding: [0xff,0x7c,0x00,0x7e,0xd0,0x12,0x63,0x41]
-// GFX89: v_fract_f64_e32 v[0:1], 0x416312d0      ; encoding: [0xff,0x64,0x00,0x7e,0xd0,0x12,0x63,0x41]
-// SICI: v_fract_f64_e32 v[0:1], 0x416312d0      ; encoding: [0xff,0x7c,0x00,0x7e,0xd0,0x12,0x63,0x41]
-
-v_trunc_f32 v0, 10000000.0
-// GFX11: v_trunc_f32_e32 v0, 0x4b189680          ; encoding: [0xff,0x42,0x00,0x7e,0x80,0x96,0x18,0x4b]
-// GFX12XX: v_trunc_f32_e32 v0, 0x4b189680          ; encoding: [0xff,0x42,0x00,0x7e,0x80,0x96,0x18,0x4b]
-// GFX89: v_trunc_f32_e32 v0, 0x4b189680          ; encoding: [0xff,0x38,0x00,0x7e,0x80,0x96,0x18,0x4b]
-// SICI: v_trunc_f32_e32 v0, 0x4b189680          ; encoding: [0xff,0x42,0x00,0x7e,0x80,0x96,0x18,0x4b]
-
-v_fract_f64 v[0:1], 3.402823e+38
-// GFX11: v_fract_f64_e32 v[0:1], 0x47efffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0xef,0x47]
-// GFX12: v_fract_f64_e32 v[0:1], 0x47efffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0xef,0x47]
-// GFX1250: v_fract_f64_e32 v[0:1], 0x47efffff966ad924 ; encoding: [0xfe,0x7c,0x00,0x7e,0x24,0xd9,0x6a,0x96,0xff,0xff,0xef,0x47]
-// GFX89: v_fract_f64_e32 v[0:1], 0x47efffff      ; encoding: [0xff,0x64,0x00,0x7e,0xff,0xff,0xef,0x47]
-// NOGFX11: :[[@LINE-5]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOGFX12: :[[@LINE-6]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// SICI: v_fract_f64_e32 v[0:1], 0x47efffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0xef,0x47]
-
-v_trunc_f32 v0, 3.402823e+38
-// GFX11: v_trunc_f32_e32 v0, 0x7f7ffffd          ; encoding: [0xff,0x42,0x00,0x7e,0xfd,0xff,0x7f,0x7f]
-// GFX12XX: v_trunc_f32_e32 v0, 0x7f7ffffd          ; encoding: [0xff,0x42,0x00,0x7e,0xfd,0xff,0x7f,0x7f]
-// GFX89: v_trunc_f32_e32 v0, 0x7f7ffffd          ; encoding: [0xff,0x38,0x00,0x7e,0xfd,0xff,0x7f,0x7f]
-// SICI: v_trunc_f32_e32 v0, 0x7f7ffffd          ; encoding: [0xff,0x42,0x00,0x7e,0xfd,0xff,0x7f,0x7f]
-
-v_fract_f64 v[0:1], 2.3509886e-38
-// GFX11: v_fract_f64_e32 v[0:1], 0x381fffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0x1f,0x38]
-// GFX12: v_fract_f64_e32 v[0:1], 0x381fffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0x1f,0x38]
-// GFX1250: v_fract_f64_e32 v[0:1], 0x381fffffe8c9d9fb ; encoding: [0xfe,0x7c,0x00,0x7e,0xfb,0xd9,0xc9,0xe8,0xff,0xff,0x1f,0x38]
-// GFX89: v_fract_f64_e32 v[0:1], 0x381fffff      ; encoding: [0xff,0x64,0x00,0x7e,0xff,0xff,0x1f,0x38]
-// NOGFX11: :[[@LINE-5]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOGFX12: :[[@LINE-6]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// SICI: v_fract_f64_e32 v[0:1], 0x381fffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0x1f,0x38]
-
-v_trunc_f32 v0, 2.3509886e-38
-// GFX11: v_trunc_f32_e32 v0, 0xffffff            ; encoding: [0xff,0x42,0x00,0x7e,0xff,0xff,0xff,0x00]
-// GFX12XX: v_trunc_f32_e32 v0, 0xffffff            ; encoding: [0xff,0x42,0x00,0x7e,0xff,0xff,0xff,0x00]
-// GFX89: v_trunc_f32_e32 v0, 0xffffff            ; encoding: [0xff,0x38,0x00,0x7e,0xff,0xff,0xff,0x00]
-// SICI: v_trunc_f32_e32 v0, 0xffffff            ; encoding: [0xff,0x42,0x00,0x7e,0xff,0xff,0xff,0x00]
-
-v_fract_f64 v[0:1], 2.3509886e-70
-// GFX11: v_fract_f64_e32 v[0:1], 0x3179f623      ; encoding: [0xff,0x7c,0x00,0x7e,0x23,0xf6,0x79,0x31]
-// GFX12: v_fract_f64_e32 v[0:1], 0x3179f623      ; encoding: [0xff,0x7c,0x00,0x7e,0x23,0xf6,0x79,0x31]
-// GFX1250: v_fract_f64_e32 v[0:1], 0x3179f623c2d3cf3c ; encoding: [0xfe,0x7c,0x00,0x7e,0x3c,0xcf,0xd3,0xc2,0x23,0xf6,0x79,0x31]
-// GFX89: v_fract_f64_e32 v[0:1], 0x3179f623      ; encoding: [0xff,0x64,0x00,0x7e,0x23,0xf6,0x79,0x31]
-// NOGFX11: :[[@LINE-5]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOGFX12: :[[@LINE-6]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
-// SICI: v_fract_f64_e32 v[0:1], 0x3179f623      ; encoding: [0xff,0x7c,0x00,0x7e,0x23,0xf6,0x79,0x31]
-
-v_trunc_f32 v0, 2.3509886e-70
-// NOGCN: :[[@LINE-1]]:17: error: invalid operand for instruction
-
-v_fract_f64_e32 v[0:1], 1.0
-// GFX11: v_fract_f64_e32 v[0:1], 1.0             ; encoding: [0xf2,0x7c,0x00,0x7e]
-// GFX12XX: v_fract_f64_e32 v[0:1], 1.0             ; encoding: [0xf2,0x7c,0x00,0x7e]
-// GFX89: v_fract_f64_e32 v[0:1], 1.0             ; encoding: [0xf2,0x64,0x00,0x7e]
-// SICI: v_fract_f64_e32 v[0:1], 1.0             ; encoding: [0xf2,0x7c,0x00,0x7e]
-
-v_fract_f64_e32 v[0:1], lit(1.0)
-// GFX11: v_fract_f64_e32 v[0:1], lit(0x3ff00000) ; encoding: [0xff,0x7c,0x00,0x7e,0x00,0x00,0xf0,0x3f]
-// GFX12: v_fract_f64_e32 v[0:1], lit(0x3ff00000) ; encoding: [0xff,0x7c,0x00,0x7e,0x00,0x00,0xf0,0x3f]
-// GFX1250-ASM: v_fract_f64_e32 v[0:1], lit(0x3ff00000) ; encoding: [0xfe,0x7c,0x00,0x7e,0x00,0x00,0xf0,0x3f,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: v_fract_f64_e32 v[0:1], lit64(0x3ff00000) ; encoding: [0xfe,0x7c,0x00,0x7e,0x00,0x00,0xf0,0x3f,0x00,0x00,0x00,0x00]
-// GFX89: v_fract_f64_e32 v[0:1], lit(0x3ff00000) ; encoding: [0xff,0x64,0x00,0x7e,0x00,0x00,0xf0,0x3f]
-// SICI: v_fract_f64_e32 v[0:1], lit(0x3ff00000) ; encoding: [0xff,0x7c,0x00,0x7e,0x00,0x00,0xf0,0x3f]
-
-v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], 1.0
-// GFX11: v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], 1.0 ; encoding: [0x08,0x40,0x44,0xcc,0x00,0x09,0xca,0x1b]
-// NOGFX12: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], lit(1.0)
-// NOGFX11: :[[@LINE-1]]:54: error: invalid operand for instruction
-// NOGFX12: :[[@LINE-2]]:54: error: invalid operand for instruction
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_cos_f16_e32 v5.l, 1.0
-// GFX11: v_cos_f16_e32 v5.l, 1.0                 ; encoding: [0xf2,0xc2,0x0a,0x7e]
-// GFX1250: v_cos_f16_e32 v5.l, 1.0                 ; encoding: [0xf2,0xc2,0x0a,0x7e]
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX89: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_cos_f16_e32 v5.l, lit(1.0)
-// GFX11: v_cos_f16_e32 v5.l, lit(0x3c00)         ; encoding: [0xff,0xc2,0x0a,0x7e,0x00,0x3c,0x00,0x00]
-// GFX1250: v_cos_f16_e32 v5.l, lit(0x3c00)         ; encoding: [0xff,0xc2,0x0a,0x7e,0x00,0x3c,0x00,0x00]
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX89: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_tanh_bf16 v5.l, 1.0
-// GFX1250: v_tanh_bf16_e32 v5.l, 1.0               ; encoding: [0xf2,0x94,0x0a,0x7e]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_tanh_bf16 v5.l, lit(1.0)
-// GFX1250: v_tanh_bf16_e32 v5.l, lit(0x3f80)       ; encoding: [0xff,0x94,0x0a,0x7e,0x80,0x3f,0x00,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_trunc_f32_e32 v0, 1.0
-// GFX11: v_trunc_f32_e32 v0, 1.0                 ; encoding: [0xf2,0x42,0x00,0x7e]
-// GFX12XX: v_trunc_f32_e32 v0, 1.0                 ; encoding: [0xf2,0x42,0x00,0x7e]
-// GFX89: v_trunc_f32_e32 v0, 1.0                 ; encoding: [0xf2,0x38,0x00,0x7e]
-// SICI: v_trunc_f32_e32 v0, 1.0                 ; encoding: [0xf2,0x42,0x00,0x7e]
-
-v_trunc_f32_e32 v0, lit(1.0)
-// GFX11: v_trunc_f32_e32 v0, lit(0x3f800000)     ; encoding: [0xff,0x42,0x00,0x7e,0x00,0x00,0x80,0x3f]
-// GFX12XX: v_trunc_f32_e32 v0, lit(0x3f800000)     ; encoding: [0xff,0x42,0x00,0x7e,0x00,0x00,0x80,0x3f]
-// GFX89: v_trunc_f32_e32 v0, lit(0x3f800000)     ; encoding: [0xff,0x38,0x00,0x7e,0x00,0x00,0x80,0x3f]
-// SICI: v_trunc_f32_e32 v0, lit(0x3f800000)     ; encoding: [0xff,0x42,0x00,0x7e,0x00,0x00,0x80,0x3f]
-
-v_dot2_bf16_bf16 v5.l, v1, v2, 1.0
-// GFX11: v_dot2_bf16_bf16 v5.l, v1, v2, 1.0      ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0xca,0x03]
-// NOGFX12: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_dot2_bf16_bf16 v5.l, v1, v2, lit(1.0)
-// GFX11: v_dot2_bf16_bf16 v5.l, v1, v2, lit(0x3f80) ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0xfe,0x03,0x80,0x3f,0x00,0x00]
-// NOGFX12: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_dot2_f32_f16 v5, v1, 1.0, v2
-// GFX11: v_dot2_f32_f16 v5, v1, 1.0, v2          ; encoding: [0x05,0x40,0x13,0xcc,0x01,0xe5,0x09,0x1c]
-// GFX12: v_dot2_f32_f16 v5, v1, 1.0, v2          ; encoding: [0x05,0x40,0x13,0xcc,0x01,0xe5,0x09,0x1c]
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_dot2_f32_f16 v5, v1, lit(1.0), v2
-// GFX11: v_dot2_f32_f16 v5, v1, lit(0x3c00), v2  ; encoding: [0x05,0x40,0x13,0xcc,0x01,0xff,0x09,0x1c,0x00,0x3c,0x00,0x00]
-// GFX12: v_dot2_f32_f16 v5, v1, lit(0x3c00), v2  ; encoding: [0x05,0x40,0x13,0xcc,0x01,0xff,0x09,0x1c,0x00,0x3c,0x00,0x00]
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_cvt_pk_fp8_f16 v1.l, 1.0
-// GFX1250: v_cvt_pk_fp8_f16 v1.l, 0x3c00           ; encoding: [0x01,0x00,0x72,0xd7,0xff,0x00,0x01,0x02,0x00,0x3c,0x00,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_cvt_pk_fp8_f16 v1.l, lit(1.0)
-// GFX1250-ASM: v_cvt_pk_fp8_f16 v1.l, lit(0x3c00)      ; encoding: [0x01,0x00,0x72,0xd7,0xff,0x00,0x01,0x02,0x00,0x3c,0x00,0x00]
-// GFX1250-DIS: v_cvt_pk_fp8_f16 v1.l, 0x3c00           ; encoding: [0x01,0x00,0x72,0xd7,0xff,0x00,0x01,0x02,0x00,0x3c,0x00,0x00]
-// NOGFX11: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
-
-//---------------------------------------------------------------------------//
-// fp literal, expected int operand
-//---------------------------------------------------------------------------//
-
-s_mov_b64_e32 s[0:1], 0.5
-// GFX8PLUS: s_mov_b64 s[0:1], 0.5                   ; encoding: [0xf0,0x01,0x80,0xbe]
-// SICI: s_mov_b64 s[0:1], 0.5                   ; encoding: [0xf0,0x04,0x80,0xbe]
-
-s_mov_b64 s[0:1], lit(0.5)
-// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
-
-v_and_b32_e32 v0, 0.5, v1
-// GFX11: v_and_b32_e32 v0, 0.5, v1               ; encoding: [0xf0,0x02,0x00,0x36]
-// GFX12XX: v_and_b32_e32 v0, 0.5, v1               ; encoding: [0xf0,0x02,0x00,0x36]
-// GFX89: v_and_b32_e32 v0, 0.5, v1               ; encoding: [0xf0,0x02,0x00,0x26]
-// SICI: v_and_b32_e32 v0, 0.5, v1               ; encoding: [0xf0,0x02,0x00,0x36]
-
-v_and_b32_e64 v0, 0.5, v1
-// GFX11: v_and_b32_e64 v0, 0.5, v1               ; encoding: [0x00,0x00,0x1b,0xd5,0xf0,0x02,0x02,0x02]
-// GFX12XX: v_and_b32_e64 v0, 0.5, v1               ; encoding: [0x00,0x00,0x1b,0xd5,0xf0,0x02,0x02,0x02]
-// GFX89: v_and_b32_e64 v0, 0.5, v1               ; encoding: [0x00,0x00,0x13,0xd1,0xf0,0x02,0x02,0x00]
-// SICI: v_and_b32_e64 v0, 0.5, v1               ; encoding: [0x00,0x00,0x36,0xd2,0xf0,0x02,0x02,0x00]
-
-s_mov_b64_e32 s[0:1], -1.0
-// GFX8PLUS: s_mov_b64 s[0:1], -1.0                  ; encoding: [0xf3,0x01,0x80,0xbe]
-// SICI: s_mov_b64 s[0:1], -1.0                  ; encoding: [0xf3,0x04,0x80,0xbe]
-
-v_and_b32_e32 v0, -1.0, v1
-// GFX11: v_and_b32_e32 v0, -1.0, v1              ; encoding: [0xf3,0x02,0x00,0x36]
-// GFX12XX: v_and_b32_e32 v0, -1.0, v1              ; encoding: [0xf3,0x02,0x00,0x36]
-// GFX89: v_and_b32_e32 v0, -1.0, v1              ; encoding: [0xf3,0x02,0x00,0x26]
-// SICI: v_and_b32_e32 v0, -1.0, v1              ; encoding: [0xf3,0x02,0x00,0x36]
-
-v_and_b32_e64 v0, -1.0, v1
-// GFX11: v_and_b32_e64 v0, -1.0, v1              ; encoding: [0x00,0x00,0x1b,0xd5,0xf3,0x02,0x02,0x02]
-// GFX12XX: v_and_b32_e64 v0, -1.0, v1              ; encoding: [0x00,0x00,0x1b,0xd5,0xf3,0x02,0x02,0x02]
-// GFX89: v_and_b32_e64 v0, -1.0, v1              ; encoding: [0x00,0x00,0x13,0xd1,0xf3,0x02,0x02,0x00]
-// SICI: v_and_b32_e64 v0, -1.0, v1              ; encoding: [0x00,0x00,0x36,0xd2,0xf3,0x02,0x02,0x00]
-
-s_mov_b64_e32 s[0:1], 4.0
-// GFX8PLUS: s_mov_b64 s[0:1], 4.0                   ; encoding: [0xf6,0x01,0x80,0xbe]
-// SICI: s_mov_b64 s[0:1], 4.0                   ; encoding: [0xf6,0x04,0x80,0xbe]
-
-v_and_b32_e32 v0, 4.0, v1
-// GFX11: v_and_b32_e32 v0, 4.0, v1               ; encoding: [0xf6,0x02,0x00,0x36]
-// GFX12XX: v_and_b32_e32 v0, 4.0, v1               ; encoding: [0xf6,0x02,0x00,0x36]
-// GFX89: v_and_b32_e32 v0, 4.0, v1               ; encoding: [0xf6,0x02,0x00,0x26]
-// SICI: v_and_b32_e32 v0, 4.0, v1               ; encoding: [0xf6,0x02,0x00,0x36]
-
-v_and_b32_e64 v0, 4.0, v1
-// GFX11: v_and_b32_e64 v0, 4.0, v1               ; encoding: [0x00,0x00,0x1b,0xd5,0xf6,0x02,0x02,0x02]
-// GFX12XX: v_and_b32_e64 v0, 4.0, v1               ; encoding: [0x00,0x00,0x1b,0xd5,0xf6,0x02,0x02,0x02]
-// GFX89: v_and_b32_e64 v0, 4.0, v1               ; encoding: [0x00,0x00,0x13,0xd1,0xf6,0x02,0x02,0x00]
-// SICI: v_and_b32_e64 v0, 4.0, v1               ; encoding: [0x00,0x00,0x36,0xd2,0xf6,0x02,0x02,0x00]
-
-s_mov_b64_e32 s[0:1], 0.0
-// GFX8PLUS: s_mov_b64 s[0:1], 0                     ; encoding: [0x80,0x01,0x80,0xbe]
-// SICI: s_mov_b64 s[0:1], 0                     ; encoding: [0x80,0x04,0x80,0xbe]
-
-v_and_b32_e32 v0, 0.0, v1
-// GFX11: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x36]
-// GFX12XX: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x36]
-// GFX89: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x26]
-// SICI: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x36]
-
-v_and_b32_e64 v0, 0.0, v1
-// GFX11: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x1b,0xd5,0x80,0x02,0x02,0x02]
-// GFX12XX: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x1b,0xd5,0x80,0x02,0x02,0x02]
-// GFX89: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x13,0xd1,0x80,0x02,0x02,0x00]
-// SICI: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x36,0xd2,0x80,0x02,0x02,0x00]
-
-s_mov_b64_e32 s[0:1], 1.5
-// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
-
-v_and_b32_e32 v0, 1.5, v1
-// GFX11: v_and_b32_e32 v0, 0x3fc00000, v1        ; encoding: [0xff,0x02,0x00,0x36,0x00,0x00,0xc0,0x3f]
-// GFX12XX: v_and_b32_e32 v0, 0x3fc00000, v1        ; encoding: [0xff,0x02,0x00,0x36,0x00,0x00,0xc0,0x3f]
-// GFX89: v_and_b32_e32 v0, 0x3fc00000, v1        ; encoding: [0xff,0x02,0x00,0x26,0x00,0x00,0xc0,0x3f]
-// SICI: v_and_b32_e32 v0, 0x3fc00000, v1        ; encoding: [0xff,0x02,0x00,0x36,0x00,0x00,0xc0,0x3f]
-
-s_mov_b64_e32 s[0:1], -3.1415
-// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
-
-v_and_b32_e32 v0, -3.1415, v1
-// GFX11: v_and_b32_e32 v0, 0xc0490e56, v1        ; encoding: [0xff,0x02,0x00,0x36,0x56,0x0e,0x49,0xc0]
-// GFX12XX: v_and_b32_e32 v0, 0xc0490e56, v1        ; encoding: [0xff,0x02,0x00,0x36,0x56,0x0e,0x49,0xc0]
-// GFX89: v_and_b32_e32 v0, 0xc0490e56, v1        ; encoding: [0xff,0x02,0x00,0x26,0x56,0x0e,0x49,0xc0]
-// SICI: v_and_b32_e32 v0, 0xc0490e56, v1        ; encoding: [0xff,0x02,0x00,0x36,0x56,0x0e,0x49,0xc0]
-
-s_mov_b64_e32 s[0:1], 100000000000000000000000.0
-// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
-
-v_and_b32_e32 v0, 100000000000000000000000.0, v1
-// GFX11: v_and_b32_e32 v0, 0x65a96816, v1        ; encoding: [0xff,0x02,0x00,0x36,0x16,0x68,0xa9,0x65]
-// GFX12XX: v_and_b32_e32 v0, 0x65a96816, v1        ; encoding: [0xff,0x02,0x00,0x36,0x16,0x68,0xa9,0x65]
-// GFX89: v_and_b32_e32 v0, 0x65a96816, v1        ; encoding: [0xff,0x02,0x00,0x26,0x16,0x68,0xa9,0x65]
-// SICI: v_and_b32_e32 v0, 0x65a96816, v1        ; encoding: [0xff,0x02,0x00,0x36,0x16,0x68,0xa9,0x65]
-
-s_mov_b64_e32 s[0:1], 10000000.0
-// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
-
-v_and_b32_e32 v0, 10000000.0, v1
-// GFX11: v_and_b32_e32 v0, 0x4b189680, v1        ; encoding: [0xff,0x02,0x00,0x36,0x80,0x96,0x18,0x4b]
-// GFX12XX: v_and_b32_e32 v0, 0x4b189680, v1        ; encoding: [0xff,0x02,0x00,0x36,0x80,0x96,0x18,0x4b]
-// GFX89: v_and_b32_e32 v0, 0x4b189680, v1        ; encoding: [0xff,0x02,0x00,0x26,0x80,0x96,0x18,0x4b]
-// SICI: v_and_b32_e32 v0, 0x4b189680, v1        ; encoding: [0xff,0x02,0x00,0x36,0x80,0x96,0x18,0x4b]
-
-s_mov_b64_e32 s[0:1], 3.402823e+38
-// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
-
-v_and_b32_e32 v0, 3.402823e+38, v1
-// GFX11: v_and_b32_e32 v0, 0x7f7ffffd, v1        ; encoding: [0xff,0x02,0x00,0x36,0xfd,0xff,0x7f,0x7f]
-// GFX12XX: v_and_b32_e32 v0, 0x7f7ffffd, v1        ; encoding: [0xff,0x02,0x00,0x36,0xfd,0xff,0x7f,0x7f]
-// GFX89: v_and_b32_e32 v0, 0x7f7ffffd, v1        ; encoding: [0xff,0x02,0x00,0x26,0xfd,0xff,0x7f,0x7f]
-// SICI: v_and_b32_e32 v0, 0x7f7ffffd, v1        ; encoding: [0xff,0x02,0x00,0x36,0xfd,0xff,0x7f,0x7f]
-
-s_mov_b64_e32 s[0:1], 2.3509886e-38
-// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
-
-v_and_b32_e32 v0, 2.3509886e-38, v1
-// GFX11: v_and_b32_e32 v0, 0xffffff, v1          ; encoding: [0xff,0x02,0x00,0x36,0xff,0xff,0xff,0x00]
-// GFX12XX: v_and_b32_e32 v0, 0xffffff, v1          ; encoding: [0xff,0x02,0x00,0x36,0xff,0xff,0xff,0x00]
-// GFX89: v_and_b32_e32 v0, 0xffffff, v1          ; encoding: [0xff,0x02,0x00,0x26,0xff,0xff,0xff,0x00]
-// SICI: v_and_b32_e32 v0, 0xffffff, v1          ; encoding: [0xff,0x02,0x00,0x36,0xff,0xff,0xff,0x00]
-
-s_mov_b64_e32 s[0:1], 2.3509886e-70
-// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
-
-v_and_b32_e32 v0, 2.3509886e-70, v1
-// NOGCN: :[[@LINE-1]]:19: error: invalid operand for instruction
-
-v_not_b16 v5.l, 1.0
-// GFX11: v_not_b16_e32 v5.l, 1.0                 ; encoding: [0xf2,0xd2,0x0a,0x7e]
-// GFX1250-ASM: v_not_b16_e32 v5.l, 1.0                 ; encoding: [0xf2,0xd2,0x0a,0x7e]
-// GFX1250-DIS: v_not_b16_e32 v5.l, 0x3c00              ; encoding: [0xff,0xd2,0x0a,0x7e,0x00,0x3c,0x00,0x00]
-// NOGFX12: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOGFX89: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
-
-v_not_b16 v5.l, lit(1.0)
-// GFX11: v_not_b16_e32 v5.l, lit(0x3f800000)     ; encoding: [0xff,0xd2,0x0a,0x7e,0x00,0x00,0x80,0x3f]
-// GFX1250: v_not_b16_e32 v5.l, lit(0x3f800000)     ; encoding: [0xff,0xd2,0x0a,0x7e,0x00,0x00,0x80,0x3f]
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_and_b32_e32 v0, 1.0, v1
-// GFX11: v_and_b32_e32 v0, 1.0, v1               ; encoding: [0xf2,0x02,0x00,0x36]
-// GFX12XX: v_and_b32_e32 v0, 1.0, v1               ; encoding: [0xf2,0x02,0x00,0x36]
-// GFX89: v_and_b32_e32 v0, 1.0, v1               ; encoding: [0xf2,0x02,0x00,0x26]
-// SICI: v_and_b32_e32 v0, 1.0, v1               ; encoding: [0xf2,0x02,0x00,0x36]
-
-v_and_b32_e32 v0, lit(1.0), v1
-// GFX11: v_and_b32_e32 v0, lit(0x3f800000), v1   ; encoding: [0xff,0x02,0x00,0x36,0x00,0x00,0x80,0x3f]
-// GFX12XX: v_and_b32_e32 v0, lit(0x3f800000), v1   ; encoding: [0xff,0x02,0x00,0x36,0x00,0x00,0x80,0x3f]
-// GFX89: v_and_b32_e32 v0, lit(0x3f800000), v1   ; encoding: [0xff,0x02,0x00,0x26,0x00,0x00,0x80,0x3f]
-// SICI: v_and_b32_e32 v0, lit(0x3f800000), v1   ; encoding: [0xff,0x02,0x00,0x36,0x00,0x00,0x80,0x3f]
-
-v_pk_add_u16 v5, exec_lo, 1.0
-// GFX11: v_pk_add_u16 v5, exec_lo, 1.0           ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0xe4,0x01,0x1a]
-// GFX12XX: v_pk_add_u16 v5, exec_lo, 1.0           ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0xe4,0x01,0x1a]
-// GFX9: v_pk_add_u16 v5, exec_lo, 1.0           ; encoding: [0x05,0x40,0x8a,0xd3,0x7e,0xe4,0x01,0x18]
-// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_pk_add_u16 v5, exec_lo, lit(1.0)
-// GFX11: v_pk_add_u16 v5, exec_lo, lit(0x3f800000) ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0xfe,0x01,0x1a,0x00,0x00,0x80,0x3f]
-// GFX12XX: v_pk_add_u16 v5, exec_lo, lit(0x3f800000) ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0xfe,0x01,0x1a,0x00,0x00,0x80,0x3f]
-// NOGFX9: :[[@LINE-3]]:31: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], 1.0
-// GFX1250: v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], 1.0 ; encoding: [0x02,0x00,0x42,0xd6,0x04,0x09,0xca,0x03]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], lit(1.0)
-// GFX1250: v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], lit(0x3f800000) ; encoding: [0x02,0x00,0x42,0xd6,0x04,0x09,0xfe,0x03,0x00,0x00,0x80,0x3f]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-//---------------------------------------------------------------------------//
-// int literal, expected fp operand
-//---------------------------------------------------------------------------//
-
-v_trunc_f32_e32 v0, 0
-// GFX11: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x42,0x00,0x7e]
-// GFX12XX: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x42,0x00,0x7e]
-// GFX89: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x38,0x00,0x7e]
-// SICI: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x42,0x00,0x7e]
-
-v_fract_f64_e32 v[0:1], 1
-// GFX11: v_fract_f64_e32 v[0:1], 1               ; encoding: [0x81,0x7c,0x00,0x7e]
-// GFX12XX: v_fract_f64_e32 v[0:1], 1               ; encoding: [0x81,0x7c,0x00,0x7e]
-// GFX89: v_fract_f64_e32 v[0:1], 1               ; encoding: [0x81,0x64,0x00,0x7e]
-// SICI: v_fract_f64_e32 v[0:1], 1               ; encoding: [0x81,0x7c,0x00,0x7e]
-
-v_fract_f64_e32 v[0:1], lit(1)
-// GFX11: v_fract_f64_e32 v[0:1], lit(0x1)        ; encoding: [0xff,0x7c,0x00,0x7e,0x01,0x00,0x00,0x00]
-// GFX12: v_fract_f64_e32 v[0:1], lit(0x1)        ; encoding: [0xff,0x7c,0x00,0x7e,0x01,0x00,0x00,0x00]
-// GFX1250-ASM: v_fract_f64_e32 v[0:1], lit(0x1)        ; encoding: [0xfe,0x7c,0x00,0x7e,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: v_fract_f64_e32 v[0:1], lit64(0x1)      ; encoding: [0xfe,0x7c,0x00,0x7e,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
-// GFX89: v_fract_f64_e32 v[0:1], lit(0x1)        ; encoding: [0xff,0x64,0x00,0x7e,0x01,0x00,0x00,0x00]
-// SICI: v_fract_f64_e32 v[0:1], lit(0x1)        ; encoding: [0xff,0x7c,0x00,0x7e,0x01,0x00,0x00,0x00]
-
-v_trunc_f32_e64 v0, 0
-// GFX11: v_trunc_f32_e64 v0, 0                   ; encoding: [0x00,0x00,0xa1,0xd5,0x80,0x00,0x01,0x02]
-// GFX12XX: v_trunc_f32_e64 v0, 0                   ; encoding: [0x00,0x00,0xa1,0xd5,0x80,0x00,0x01,0x02]
-// GFX89: v_trunc_f32_e64 v0, 0                   ; encoding: [0x00,0x00,0x5c,0xd1,0x80,0x00,0x00,0x00]
-// SICI: v_trunc_f32_e64 v0, 0                   ; encoding: [0x00,0x00,0x42,0xd3,0x80,0x00,0x00,0x00]
-
-v_fract_f64_e64 v[0:1], 0
-// GFX11: v_fract_f64_e64 v[0:1], 0               ; encoding: [0x00,0x00,0xbe,0xd5,0x80,0x00,0x01,0x02]
-// GFX12XX: v_fract_f64_e64 v[0:1], 0               ; encoding: [0x00,0x00,0xbe,0xd5,0x80,0x00,0x01,0x02]
-// GFX89: v_fract_f64_e64 v[0:1], 0               ; encoding: [0x00,0x00,0x72,0xd1,0x80,0x00,0x00,0x00]
-// SICI: v_fract_f64_e64 v[0:1], 0               ; encoding: [0x00,0x00,0x7c,0xd3,0x80,0x00,0x00,0x00]
-
-v_trunc_f32_e32 v0, -13
-// GFX11: v_trunc_f32_e32 v0, -13                 ; encoding: [0xcd,0x42,0x00,0x7e]
-// GFX12XX: v_trunc_f32_e32 v0, -13                 ; encoding: [0xcd,0x42,0x00,0x7e]
-// GFX89: v_trunc_f32_e32 v0, -13                 ; encoding: [0xcd,0x38,0x00,0x7e]
-// SICI: v_trunc_f32_e32 v0, -13                 ; encoding: [0xcd,0x42,0x00,0x7e]
-
-v_fract_f64_e32 v[0:1], -13
-// GFX11: v_fract_f64_e32 v[0:1], -13             ; encoding: [0xcd,0x7c,0x00,0x7e]
-// GFX12XX: v_fract_f64_e32 v[0:1], -13             ; encoding: [0xcd,0x7c,0x00,0x7e]
-// GFX89: v_fract_f64_e32 v[0:1], -13             ; encoding: [0xcd,0x64,0x00,0x7e]
-// SICI: v_fract_f64_e32 v[0:1], -13             ; encoding: [0xcd,0x7c,0x00,0x7e]
-
-v_trunc_f32_e64 v0, -13
-// GFX11: v_trunc_f32_e64 v0, -13                 ; encoding: [0x00,0x00,0xa1,0xd5,0xcd,0x00,0x01,0x02]
-// GFX12XX: v_trunc_f32_e64 v0, -13                 ; encoding: [0x00,0x00,0xa1,0xd5,0xcd,0x00,0x01,0x02]
-// GFX89: v_trunc_f32_e64 v0, -13                 ; encoding: [0x00,0x00,0x5c,0xd1,0xcd,0x00,0x00,0x00]
-// SICI: v_trunc_f32_e64 v0, -13                 ; encoding: [0x00,0x00,0x42,0xd3,0xcd,0x00,0x00,0x00]
-
-v_fract_f64_e64 v[0:1], -13
-// GFX11: v_fract_f64_e64 v[0:1], -13             ; encoding: [0x00,0x00,0xbe,0xd5,0xcd,0x00,0x01,0x02]
-// GFX12XX: v_fract_f64_e64 v[0:1], -13             ; encoding: [0x00,0x00,0xbe,0xd5,0xcd,0x00,0x01,0x02]
-// GFX89: v_fract_f64_e64 v[0:1], -13             ; encoding: [0x00,0x00,0x72,0xd1,0xcd,0x00,0x00,0x00]
-// SICI: v_fract_f64_e64 v[0:1], -13             ; encoding: [0x00,0x00,0x7c,0xd3,0xcd,0x00,0x00,0x00]
-
-v_trunc_f32_e32 v0, 35
-// GFX11: v_trunc_f32_e32 v0, 35                  ; encoding: [0xa3,0x42,0x00,0x7e]
-// GFX12XX: v_trunc_f32_e32 v0, 35                  ; encoding: [0xa3,0x42,0x00,0x7e]
-// GFX89: v_trunc_f32_e32 v0, 35                  ; encoding: [0xa3,0x38,0x00,0x7e]
-// SICI: v_trunc_f32_e32 v0, 35                  ; encoding: [0xa3,0x42,0x00,0x7e]
-
-v_fract_f64_e32 v[0:1], 35
-// GFX11: v_fract_f64_e32 v[0:1], 35              ; encoding: [0xa3,0x7c,0x00,0x7e]
-// GFX12XX: v_fract_f64_e32 v[0:1], 35              ; encoding: [0xa3,0x7c,0x00,0x7e]
-// GFX89: v_fract_f64_e32 v[0:1], 35              ; encoding: [0xa3,0x64,0x00,0x7e]
-// SICI: v_fract_f64_e32 v[0:1], 35              ; encoding: [0xa3,0x7c,0x00,0x7e]
-
-v_trunc_f32_e64 v0, 35
-// GFX11: v_trunc_f32_e64 v0, 35                  ; encoding: [0x00,0x00,0xa1,0xd5,0xa3,0x00,0x01,0x02]
-// GFX12XX: v_trunc_f32_e64 v0, 35                  ; encoding: [0x00,0x00,0xa1,0xd5,0xa3,0x00,0x01,0x02]
-// GFX89: v_trunc_f32_e64 v0, 35                  ; encoding: [0x00,0x00,0x5c,0xd1,0xa3,0x00,0x00,0x00]
-// SICI: v_trunc_f32_e64 v0, 35                  ; encoding: [0x00,0x00,0x42,0xd3,0xa3,0x00,0x00,0x00]
-
-v_fract_f64_e64 v[0:1], 35
-// GFX11: v_fract_f64_e64 v[0:1], 35              ; encoding: [0x00,0x00,0xbe,0xd5,0xa3,0x00,0x01,0x02]
-// GFX12XX: v_fract_f64_e64 v[0:1], 35              ; encoding: [0x00,0x00,0xbe,0xd5,0xa3,0x00,0x01,0x02]
-// GFX89: v_fract_f64_e64 v[0:1], 35              ; encoding: [0x00,0x00,0x72,0xd1,0xa3,0x00,0x00,0x00]
-// SICI: v_fract_f64_e64 v[0:1], 35              ; encoding: [0x00,0x00,0x7c,0xd3,0xa3,0x00,0x00,0x00]
-
-v_trunc_f32_e32 v0, 1234
-// GFX11: v_trunc_f32_e32 v0, 0x4d2               ; encoding: [0xff,0x42,0x00,0x7e,0xd2,0x04,0x00,0x00]
-// GFX12XX: v_trunc_f32_e32 v0, 0x4d2               ; encoding: [0xff,0x42,0x00,0x7e,0xd2,0x04,0x00,0x00]
-// GFX89: v_trunc_f32_e32 v0, 0x4d2               ; encoding: [0xff,0x38,0x00,0x7e,0xd2,0x04,0x00,0x00]
-// SICI: v_trunc_f32_e32 v0, 0x4d2               ; encoding: [0xff,0x42,0x00,0x7e,0xd2,0x04,0x00,0x00]
-
-v_fract_f64_e32 v[0:1], 1234
-// GFX11: v_fract_f64_e32 v[0:1], 0x4d2           ; encoding: [0xff,0x7c,0x00,0x7e,0xd2,0x04,0x00,0x00]
-// GFX12XX: v_fract_f64_e32 v[0:1], 0x4d2           ; encoding: [0xff,0x7c,0x00,0x7e,0xd2,0x04,0x00,0x00]
-// GFX89: v_fract_f64_e32 v[0:1], 0x4d2           ; encoding: [0xff,0x64,0x00,0x7e,0xd2,0x04,0x00,0x00]
-// SICI: v_fract_f64_e32 v[0:1], 0x4d2           ; encoding: [0xff,0x7c,0x00,0x7e,0xd2,0x04,0x00,0x00]
-
-v_trunc_f32_e64 v0, 1234
-// GFX11: v_trunc_f32_e64 v0, 0x4d2               ; encoding: [0x00,0x00,0xa1,0xd5,0xff,0x00,0x01,0x02,0xd2,0x04,0x00,0x00]
-// GFX12XX: v_trunc_f32_e64 v0, 0x4d2               ; encoding: [0x00,0x00,0xa1,0xd5,0xff,0x00,0x01,0x02,0xd2,0x04,0x00,0x00]
-// NOGFX89: :[[@LINE-3]]:21: error: literal operands are not supported
-// NOSICI: :[[@LINE-4]]:21: error: literal operands are not supported
-
-v_fract_f64_e64 v[0:1], 1234
-// GFX11: v_fract_f64_e64 v[0:1], 0x4d2           ; encoding: [0x00,0x00,0xbe,0xd5,0xff,0x00,0x01,0x02,0xd2,0x04,0x00,0x00]
-// GFX12XX: v_fract_f64_e64 v[0:1], 0x4d2           ; encoding: [0x00,0x00,0xbe,0xd5,0xff,0x00,0x01,0x02,0xd2,0x04,0x00,0x00]
-// NOGFX89: :[[@LINE-3]]:25: error: literal operands are not supported
-// NOSICI: :[[@LINE-4]]:25: error: literal operands are not supported
-
-v_trunc_f32_e32 v0, -54321
-// GFX11: v_trunc_f32_e32 v0, 0xffff2bcf          ; encoding: [0xff,0x42,0x00,0x7e,0xcf,0x2b,0xff,0xff]
-// GFX12XX: v_trunc_f32_e32 v0, 0xffff2bcf          ; encoding: [0xff,0x42,0x00,0x7e,0xcf,0x2b,0xff,0xff]
-// GFX89: v_trunc_f32_e32 v0, 0xffff2bcf          ; encoding: [0xff,0x38,0x00,0x7e,0xcf,0x2b,0xff,0xff]
-// SICI: v_trunc_f32_e32 v0, 0xffff2bcf          ; encoding: [0xff,0x42,0x00,0x7e,0xcf,0x2b,0xff,0xff]
-
-v_fract_f64_e32 v[0:1], -54321
-// GFX11: v_fract_f64_e32 v[0:1], 0xffff2bcf      ; encoding: [0xff,0x7c,0x00,0x7e,0xcf,0x2b,0xff,0xff]
-// GFX12XX: v_fract_f64_e32 v[0:1], 0xffff2bcf      ; encoding: [0xff,0x7c,0x00,0x7e,0xcf,0x2b,0xff,0xff]
-// GFX89: v_fract_f64_e32 v[0:1], 0xffff2bcf      ; encoding: [0xff,0x64,0x00,0x7e,0xcf,0x2b,0xff,0xff]
-// SICI: v_fract_f64_e32 v[0:1], 0xffff2bcf      ; encoding: [0xff,0x7c,0x00,0x7e,0xcf,0x2b,0xff,0xff]
-
-v_trunc_f32_e32 v0, 0xdeadbeef
-// GFX11: v_trunc_f32_e32 v0, 0xdeadbeef          ; encoding: [0xff,0x42,0x00,0x7e,0xef,0xbe,0xad,0xde]
-// GFX12XX: v_trunc_f32_e32 v0, 0xdeadbeef          ; encoding: [0xff,0x42,0x00,0x7e,0xef,0xbe,0xad,0xde]
-// GFX89: v_trunc_f32_e32 v0, 0xdeadbeef          ; encoding: [0xff,0x38,0x00,0x7e,0xef,0xbe,0xad,0xde]
-// SICI: v_trunc_f32_e32 v0, 0xdeadbeef          ; encoding: [0xff,0x42,0x00,0x7e,0xef,0xbe,0xad,0xde]
-
-v_fract_f64_e32 v[0:1], 0xdeadbeef
-// GFX11: v_fract_f64_e32 v[0:1], 0xdeadbeef      ; encoding: [0xff,0x7c,0x00,0x7e,0xef,0xbe,0xad,0xde]
-// GFX12XX: v_fract_f64_e32 v[0:1], 0xdeadbeef      ; encoding: [0xff,0x7c,0x00,0x7e,0xef,0xbe,0xad,0xde]
-// GFX89: v_fract_f64_e32 v[0:1], 0xdeadbeef      ; encoding: [0xff,0x64,0x00,0x7e,0xef,0xbe,0xad,0xde]
-// SICI: v_fract_f64_e32 v[0:1], 0xdeadbeef      ; encoding: [0xff,0x7c,0x00,0x7e,0xef,0xbe,0xad,0xde]
-
-v_trunc_f32_e32 v0, 0xffffffff
-// GFX11: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x42,0x00,0x7e]
-// GFX12XX: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x42,0x00,0x7e]
-// GFX89: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x38,0x00,0x7e]
-// SICI: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x42,0x00,0x7e]
-
-v_fract_f64_e32 v[0:1], 0xffffffff
-// GFX11: v_fract_f64_e32 v[0:1], 0xffffffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0xff,0xff]
-// GFX12XX: v_fract_f64_e32 v[0:1], 0xffffffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0xff,0xff]
-// GFX89: v_fract_f64_e32 v[0:1], 0xffffffff      ; encoding: [0xff,0x64,0x00,0x7e,0xff,0xff,0xff,0xff]
-// SICI: v_fract_f64_e32 v[0:1], 0xffffffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0xff,0xff]
-
-v_trunc_f32_e32 v0, 0x123456789abcdef0
-// NOGCN: :[[@LINE-1]]:21: error: invalid operand for instruction
-
-v_fract_f64_e32 v[0:1], 0x123456789abcdef0
-// GFX1250: v_fract_f64_e32 v[0:1], 0x123456789abcdef0 ; encoding: [0xfe,0x7c,0x00,0x7e,0xf0,0xde,0xbc,0x9a,0x78,0x56,0x34,0x12]
-// NOGFX11: :[[@LINE-2]]:25: error: invalid operand for instruction
-// NOGFX12: :[[@LINE-3]]:25: error: invalid operand for instruction
-// NOGFX89: :[[@LINE-4]]:25: error: invalid operand for instruction
-// NOSICI: :[[@LINE-5]]:25: error: invalid operand for instruction
-
-v_trunc_f32_e32 v0, 0xffffffffffffffff
-// GFX11: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x42,0x00,0x7e]
-// GFX12XX: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x42,0x00,0x7e]
-// GFX89: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x38,0x00,0x7e]
-// SICI: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x42,0x00,0x7e]
-
-v_fract_f64_e32 v[0:1], 0xffffffffffffffff
-// GFX11: v_fract_f64_e32 v[0:1], -1              ; encoding: [0xc1,0x7c,0x00,0x7e]
-// GFX12XX: v_fract_f64_e32 v[0:1], -1              ; encoding: [0xc1,0x7c,0x00,0x7e]
-// GFX89: v_fract_f64_e32 v[0:1], -1              ; encoding: [0xc1,0x64,0x00,0x7e]
-// SICI: v_fract_f64_e32 v[0:1], -1              ; encoding: [0xc1,0x7c,0x00,0x7e]
-
-v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], 1
-// GFX11: v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], 1 ; encoding: [0x08,0x40,0x44,0xcc,0x00,0x09,0x06,0x1a]
-// NOGFX12: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], lit(1)
-// NOGFX11: :[[@LINE-1]]:54: error: invalid operand for instruction
-// NOGFX12: :[[@LINE-2]]:54: error: invalid operand for instruction
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_cos_f16_e32 v5.l, 1
-// GFX11: v_cos_f16_e32 v5.l, 1                   ; encoding: [0x81,0xc2,0x0a,0x7e]
-// GFX1250: v_cos_f16_e32 v5.l, 1                   ; encoding: [0x81,0xc2,0x0a,0x7e]
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX89: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_cos_f16_e32 v5.l, lit(1)
-// GFX11: v_cos_f16_e32 v5.l, lit(0x1)            ; encoding: [0xff,0xc2,0x0a,0x7e,0x01,0x00,0x00,0x00]
-// GFX1250: v_cos_f16_e32 v5.l, lit(0x1)            ; encoding: [0xff,0xc2,0x0a,0x7e,0x01,0x00,0x00,0x00]
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX89: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_tanh_bf16 v5.l, 1
-// GFX1250: v_tanh_bf16_e32 v5.l, 1                 ; encoding: [0x81,0x94,0x0a,0x7e]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_tanh_bf16 v5.l, lit(1)
-// GFX1250: v_tanh_bf16_e32 v5.l, lit(0x1)          ; encoding: [0xff,0x94,0x0a,0x7e,0x01,0x00,0x00,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_trunc_f32_e32 v0, 1
-// GFX11: v_trunc_f32_e32 v0, 1                   ; encoding: [0x81,0x42,0x00,0x7e]
-// GFX12XX: v_trunc_f32_e32 v0, 1                   ; encoding: [0x81,0x42,0x00,0x7e]
-// GFX89: v_trunc_f32_e32 v0, 1                   ; encoding: [0x81,0x38,0x00,0x7e]
-// SICI: v_trunc_f32_e32 v0, 1                   ; encoding: [0x81,0x42,0x00,0x7e]
-
-v_trunc_f32_e32 v0, lit(1)
-// GFX11: v_trunc_f32_e32 v0, lit(0x1)            ; encoding: [0xff,0x42,0x00,0x7e,0x01,0x00,0x00,0x00]
-// GFX12XX: v_trunc_f32_e32 v0, lit(0x1)            ; encoding: [0xff,0x42,0x00,0x7e,0x01,0x00,0x00,0x00]
-// GFX89: v_trunc_f32_e32 v0, lit(0x1)            ; encoding: [0xff,0x38,0x00,0x7e,0x01,0x00,0x00,0x00]
-// SICI: v_trunc_f32_e32 v0, lit(0x1)            ; encoding: [0xff,0x42,0x00,0x7e,0x01,0x00,0x00,0x00]
-
-v_dot2_bf16_bf16 v5.l, v1, v2, 1
-// GFX11: v_dot2_bf16_bf16 v5.l, v1, v2, 1        ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0x06,0x02]
-// NOGFX12: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_dot2_bf16_bf16 v5.l, v1, v2, lit(1)
-// GFX11: v_dot2_bf16_bf16 v5.l, v1, v2, lit(0x1) ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0xfe,0x03,0x01,0x00,0x00,0x00]
-// NOGFX12: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_dot2_f32_f16 v5, v1, 1, v2
-// GFX11: v_dot2_f32_f16 v5, v1, 1, v2            ; encoding: [0x05,0x40,0x13,0xcc,0x01,0x03,0x09,0x1c]
-// GFX12: v_dot2_f32_f16 v5, v1, 1, v2            ; encoding: [0x05,0x40,0x13,0xcc,0x01,0x03,0x09,0x1c]
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_dot2_f32_f16 v5, v1, lit(1), v2
-// GFX11: v_dot2_f32_f16 v5, v1, lit(0x1), v2     ; encoding: [0x05,0x40,0x13,0xcc,0x01,0xff,0x09,0x1c,0x01,0x00,0x00,0x00]
-// GFX12: v_dot2_f32_f16 v5, v1, lit(0x1), v2     ; encoding: [0x05,0x40,0x13,0xcc,0x01,0xff,0x09,0x1c,0x01,0x00,0x00,0x00]
-// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_cvt_pk_fp8_f16 v1.l, 1
-// GFX1250: v_cvt_pk_fp8_f16 v1.l, 1                ; encoding: [0x01,0x00,0x72,0xd7,0xff,0x00,0x01,0x02,0x01,0x00,0x00,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_cvt_pk_fp8_f16 v1.l, lit(1)
-// GFX1250-ASM: v_cvt_pk_fp8_f16 v1.l, lit(0x1)         ; encoding: [0x01,0x00,0x72,0xd7,0xff,0x00,0x01,0x02,0x01,0x00,0x00,0x00]
-// GFX1250-DIS: v_cvt_pk_fp8_f16 v1.l, 1                ; encoding: [0x01,0x00,0x72,0xd7,0xff,0x00,0x01,0x02,0x01,0x00,0x00,0x00]
-// NOGFX11: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
-
-//---------------------------------------------------------------------------//
-// int literal, expected int operand
-//---------------------------------------------------------------------------//
-
-s_mov_b64_e32 s[0:1], 0
-// GFX8PLUS: s_mov_b64 s[0:1], 0                     ; encoding: [0x80,0x01,0x80,0xbe]
-// SICI: s_mov_b64 s[0:1], 0                     ; encoding: [0x80,0x04,0x80,0xbe]
-
-v_and_b32_e32 v0, 0, v1
-// GFX11: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x36]
-// GFX12XX: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x36]
-// GFX89: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x26]
-// SICI: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x36]
-
-v_and_b32_e64 v0, 0, v1
-// GFX11: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x1b,0xd5,0x80,0x02,0x02,0x02]
-// GFX12XX: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x1b,0xd5,0x80,0x02,0x02,0x02]
-// GFX89: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x13,0xd1,0x80,0x02,0x02,0x00]
-// SICI: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x36,0xd2,0x80,0x02,0x02,0x00]
-
-s_mov_b64_e32 s[0:1], -13
-// GFX8PLUS: s_mov_b64 s[0:1], -13                   ; encoding: [0xcd,0x01,0x80,0xbe]
-// SICI: s_mov_b64 s[0:1], -13                   ; encoding: [0xcd,0x04,0x80,0xbe]
-
-v_and_b32_e32 v0, -13, v1
-// GFX11: v_and_b32_e32 v0, -13, v1               ; encoding: [0xcd,0x02,0x00,0x36]
-// GFX12XX: v_and_b32_e32 v0, -13, v1               ; encoding: [0xcd,0x02,0x00,0x36]
-// GFX89: v_and_b32_e32 v0, -13, v1               ; encoding: [0xcd,0x02,0x00,0x26]
-// SICI: v_and_b32_e32 v0, -13, v1               ; encoding: [0xcd,0x02,0x00,0x36]
-
-v_and_b32_e64 v0, -13, v1
-// GFX11: v_and_b32_e64 v0, -13, v1               ; encoding: [0x00,0x00,0x1b,0xd5,0xcd,0x02,0x02,0x02]
-// GFX12XX: v_and_b32_e64 v0, -13, v1               ; encoding: [0x00,0x00,0x1b,0xd5,0xcd,0x02,0x02,0x02]
-// GFX89: v_and_b32_e64 v0, -13, v1               ; encoding: [0x00,0x00,0x13,0xd1,0xcd,0x02,0x02,0x00]
-// SICI: v_and_b32_e64 v0, -13, v1               ; encoding: [0x00,0x00,0x36,0xd2,0xcd,0x02,0x02,0x00]
-
-s_mov_b64_e32 s[0:1], 35
-// GFX8PLUS: s_mov_b64 s[0:1], 35                    ; encoding: [0xa3,0x01,0x80,0xbe]
-// SICI: s_mov_b64 s[0:1], 35                    ; encoding: [0xa3,0x04,0x80,0xbe]
-
-v_and_b32_e32 v0, 35, v1
-// GFX11: v_and_b32_e32 v0, 35, v1                ; encoding: [0xa3,0x02,0x00,0x36]
-// GFX12XX: v_and_b32_e32 v0, 35, v1                ; encoding: [0xa3,0x02,0x00,0x36]
-// GFX89: v_and_b32_e32 v0, 35, v1                ; encoding: [0xa3,0x02,0x00,0x26]
-// SICI: v_and_b32_e32 v0, 35, v1                ; encoding: [0xa3,0x02,0x00,0x36]
-
-v_and_b32_e64 v0, 35, v1
-// GFX11: v_and_b32_e64 v0, 35, v1                ; encoding: [0x00,0x00,0x1b,0xd5,0xa3,0x02,0x02,0x02]
-// GFX12XX: v_and_b32_e64 v0, 35, v1                ; encoding: [0x00,0x00,0x1b,0xd5,0xa3,0x02,0x02,0x02]
-// GFX89: v_and_b32_e64 v0, 35, v1                ; encoding: [0x00,0x00,0x13,0xd1,0xa3,0x02,0x02,0x00]
-// SICI: v_and_b32_e64 v0, 35, v1                ; encoding: [0x00,0x00,0x36,0xd2,0xa3,0x02,0x02,0x00]
-
-s_mov_b64_e32 s[0:1], 1234
-// GFX8PLUS: s_mov_b64 s[0:1], 0x4d2                 ; encoding: [0xff,0x01,0x80,0xbe,0xd2,0x04,0x00,0x00]
-// SICI: s_mov_b64 s[0:1], 0x4d2                 ; encoding: [0xff,0x04,0x80,0xbe,0xd2,0x04,0x00,0x00]
-
-v_and_b32_e32 v0, 1234, v1
-// GFX11: v_and_b32_e32 v0, 0x4d2, v1             ; encoding: [0xff,0x02,0x00,0x36,0xd2,0x04,0x00,0x00]
-// GFX12XX: v_and_b32_e32 v0, 0x4d2, v1             ; encoding: [0xff,0x02,0x00,0x36,0xd2,0x04,0x00,0x00]
-// GFX89: v_and_b32_e32 v0, 0x4d2, v1             ; encoding: [0xff,0x02,0x00,0x26,0xd2,0x04,0x00,0x00]
-// SICI: v_and_b32_e32 v0, 0x4d2, v1             ; encoding: [0xff,0x02,0x00,0x36,0xd2,0x04,0x00,0x00]
-
-v_and_b32_e64 v0, 1234, v1
-// GFX11: v_and_b32_e64 v0, 0x4d2, v1             ; encoding: [0x00,0x00,0x1b,0xd5,0xff,0x02,0x02,0x02,0xd2,0x04,0x00,0x00]
-// GFX12XX: v_and_b32_e64 v0, 0x4d2, v1             ; encoding: [0x00,0x00,0x1b,0xd5,0xff,0x02,0x02,0x02,0xd2,0x04,0x00,0x00]
-// NOGFX89: :[[@LINE-3]]:19: error: literal operands are not supported
-// NOSICI: :[[@LINE-4]]:19: error: literal operands are not supported
-
-s_mov_b64_e32 s[0:1], -54321
-// GFX11: s_mov_b64 s[0:1], 0xffff2bcf            ; encoding: [0xff,0x01,0x80,0xbe,0xcf,0x2b,0xff,0xff]
-// GFX12: s_mov_b64 s[0:1], 0xffff2bcf            ; encoding: [0xff,0x01,0x80,0xbe,0xcf,0x2b,0xff,0xff]
-// GFX1250: s_mov_b64 s[0:1], 0xffffffffffff2bcf    ; encoding: [0xfe,0x01,0x80,0xbe,0xcf,0x2b,0xff,0xff,0xff,0xff,0xff,0xff]
-// GFX89: s_mov_b64 s[0:1], 0xffff2bcf            ; encoding: [0xff,0x01,0x80,0xbe,0xcf,0x2b,0xff,0xff]
-// SICI: s_mov_b64 s[0:1], 0xffff2bcf            ; encoding: [0xff,0x04,0x80,0xbe,0xcf,0x2b,0xff,0xff]
-
-v_and_b32_e32 v0, -54321, v1
-// GFX11: v_and_b32_e32 v0, 0xffff2bcf, v1        ; encoding: [0xff,0x02,0x00,0x36,0xcf,0x2b,0xff,0xff]
-// GFX12XX: v_and_b32_e32 v0, 0xffff2bcf, v1        ; encoding: [0xff,0x02,0x00,0x36,0xcf,0x2b,0xff,0xff]
-// GFX89: v_and_b32_e32 v0, 0xffff2bcf, v1        ; encoding: [0xff,0x02,0x00,0x26,0xcf,0x2b,0xff,0xff]
-// SICI: v_and_b32_e32 v0, 0xffff2bcf, v1        ; encoding: [0xff,0x02,0x00,0x36,0xcf,0x2b,0xff,0xff]
-
-s_mov_b64_e32 s[0:1], 0xdeadbeef
-// GFX11: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xff,0x01,0x80,0xbe,0xef,0xbe,0xad,0xde]
-// GFX12XX: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xff,0x01,0x80,0xbe,0xef,0xbe,0xad,0xde]
-// GFX89: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xff,0x01,0x80,0xbe,0xef,0xbe,0xad,0xde]
-// SICI: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xff,0x04,0x80,0xbe,0xef,0xbe,0xad,0xde]
-
-v_and_b32_e32 v0, 0xdeadbeef, v1
-// GFX11: v_and_b32_e32 v0, 0xdeadbeef, v1        ; encoding: [0xff,0x02,0x00,0x36,0xef,0xbe,0xad,0xde]
-// GFX12XX: v_and_b32_e32 v0, 0xdeadbeef, v1        ; encoding: [0xff,0x02,0x00,0x36,0xef,0xbe,0xad,0xde]
-// GFX89: v_and_b32_e32 v0, 0xdeadbeef, v1        ; encoding: [0xff,0x02,0x00,0x26,0xef,0xbe,0xad,0xde]
-// SICI: v_and_b32_e32 v0, 0xdeadbeef, v1        ; encoding: [0xff,0x02,0x00,0x36,0xef,0xbe,0xad,0xde]
-
-s_mov_b64_e32 s[0:1], 0xffffffff
-// GFX11: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xff,0x01,0x80,0xbe,0xff,0xff,0xff,0xff]
-// GFX12XX: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xff,0x01,0x80,0xbe,0xff,0xff,0xff,0xff]
-// GFX89: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xff,0x01,0x80,0xbe,0xff,0xff,0xff,0xff]
-// SICI: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xff,0x04,0x80,0xbe,0xff,0xff,0xff,0xff]
-
-v_and_b32_e32 v0, 0xffffffff, v1
-// GFX11: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x36]
-// GFX12XX: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x36]
-// GFX89: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x26]
-// SICI: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x36]
-
-s_mov_b64_e32 s[0:1], 0x123456789abcdef0
-// GFX1250: s_mov_b64 s[0:1], 0x123456789abcdef0    ; encoding: [0xfe,0x01,0x80,0xbe,0xf0,0xde,0xbc,0x9a,0x78,0x56,0x34,0x12]
-// NOGFX11: :[[@LINE-2]]:23: error: invalid operand for instruction
-// NOGFX12: :[[@LINE-3]]:23: error: invalid operand for instruction
-// NOGFX89: :[[@LINE-4]]:23: error: invalid operand for instruction
-// NOSICI: :[[@LINE-5]]:23: error: invalid operand for instruction
-
-v_and_b32_e32 v0, 0x123456789abcdef0, v1
-// NOGCN: :[[@LINE-1]]:19: error: invalid operand for instruction
-
-s_mov_b64_e32 s[0:1], 0xffffffffffffffff
-// GFX8PLUS: s_mov_b64 s[0:1], -1                    ; encoding: [0xc1,0x01,0x80,0xbe]
-// SICI: s_mov_b64 s[0:1], -1                    ; encoding: [0xc1,0x04,0x80,0xbe]
-
-v_and_b32_e32 v0, 0xffffffffffffffff, v1
-// GFX11: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x36]
-// GFX12XX: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x36]
-// GFX89: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x26]
-// SICI: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x36]
-
-v_not_b16 v5.l, 1
-// GFX11: v_not_b16_e32 v5.l, 1                   ; encoding: [0x81,0xd2,0x0a,0x7e]
-// GFX1250: v_not_b16_e32 v5.l, 1                   ; encoding: [0x81,0xd2,0x0a,0x7e]
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_not_b16 v5.l, lit(1)
-// GFX11: v_not_b16_e32 v5.l, lit(0x1)            ; encoding: [0xff,0xd2,0x0a,0x7e,0x01,0x00,0x00,0x00]
-// GFX1250: v_not_b16_e32 v5.l, lit(0x1)            ; encoding: [0xff,0xd2,0x0a,0x7e,0x01,0x00,0x00,0x00]
-// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-s_mov_b64 s[0:1], 1
-// GFX8PLUS: s_mov_b64 s[0:1], 1                     ; encoding: [0x81,0x01,0x80,0xbe]
-// SICI: s_mov_b64 s[0:1], 1                     ; encoding: [0x81,0x04,0x80,0xbe]
-
-s_mov_b64 s[0:1], lit(1)
-// GFX11: s_mov_b64 s[0:1], lit(0x1)              ; encoding: [0xff,0x01,0x80,0xbe,0x01,0x00,0x00,0x00]
-// GFX12: s_mov_b64 s[0:1], lit(0x1)              ; encoding: [0xff,0x01,0x80,0xbe,0x01,0x00,0x00,0x00]
-// GFX1250-ASM: s_mov_b64 s[0:1], lit(0x1)              ; encoding: [0xfe,0x01,0x80,0xbe,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
-// GFX1250-DIS: s_mov_b64 s[0:1], lit64(0x1)            ; encoding: [0xfe,0x01,0x80,0xbe,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
-// GFX89: s_mov_b64 s[0:1], lit(0x1)              ; encoding: [0xff,0x01,0x80,0xbe,0x01,0x00,0x00,0x00]
-// SICI: s_mov_b64 s[0:1], lit(0x1)              ; encoding: [0xff,0x04,0x80,0xbe,0x01,0x00,0x00,0x00]
-
-v_and_b32_e32 v0, 1, v1
-// GFX11: v_and_b32_e32 v0, 1, v1                 ; encoding: [0x81,0x02,0x00,0x36]
-// GFX12XX: v_and_b32_e32 v0, 1, v1                 ; encoding: [0x81,0x02,0x00,0x36]
-// GFX89: v_and_b32_e32 v0, 1, v1                 ; encoding: [0x81,0x02,0x00,0x26]
-// SICI: v_and_b32_e32 v0, 1, v1                 ; encoding: [0x81,0x02,0x00,0x36]
-
-v_and_b32_e32 v0, lit(1), v1
-// GFX11: v_and_b32_e32 v0, lit(0x1), v1          ; encoding: [0xff,0x02,0x00,0x36,0x01,0x00,0x00,0x00]
-// GFX12XX: v_and_b32_e32 v0, lit(0x1), v1          ; encoding: [0xff,0x02,0x00,0x36,0x01,0x00,0x00,0x00]
-// GFX89: v_and_b32_e32 v0, lit(0x1), v1          ; encoding: [0xff,0x02,0x00,0x26,0x01,0x00,0x00,0x00]
-// SICI: v_and_b32_e32 v0, lit(0x1), v1          ; encoding: [0xff,0x02,0x00,0x36,0x01,0x00,0x00,0x00]
-
-v_pk_add_u16 v5, exec_lo, 1
-// GFX11: v_pk_add_u16 v5, exec_lo, 1             ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0x02,0x01,0x1a]
-// GFX12XX: v_pk_add_u16 v5, exec_lo, 1             ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0x02,0x01,0x1a]
-// GFX9: v_pk_add_u16 v5, exec_lo, 1             ; encoding: [0x05,0x40,0x8a,0xd3,0x7e,0x02,0x01,0x18]
-// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_pk_add_u16 v5, exec_lo, lit(1)
-// GFX11: v_pk_add_u16 v5, exec_lo, lit(0x1)      ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0xfe,0x01,0x1a,0x01,0x00,0x00,0x00]
-// GFX12XX: v_pk_add_u16 v5, exec_lo, lit(0x1)      ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0xfe,0x01,0x1a,0x01,0x00,0x00,0x00]
-// NOGFX9: :[[@LINE-3]]:31: error: invalid operand (violates constant bus restrictions)
-// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOVI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], 1
-// GFX1250: v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], 1 ; encoding: [0x02,0x00,0x42,0xd6,0x04,0x09,0x06,0x02]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], lit(1)
-// GFX1250: v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], lit(0x1) ; encoding: [0x02,0x00,0x42,0xd6,0x04,0x09,0xfe,0x03,0x01,0x00,0x00,0x00]
-// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
-// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
-// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
-// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
-
-//---------------------------------------------------------------------------//
-// 1/(2*PI)
-//---------------------------------------------------------------------------//
-
-v_trunc_f32_e32 v0, 0x3fc45f306dc9c882
-// NOGCN: :[[@LINE-1]]:21: error: invalid operand for instruction
-
-v_fract_f64_e32 v[0:1], 0x3fc45f306dc9c882
-// GFX11: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x7c,0x00,0x7e]
-// GFX12XX: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x7c,0x00,0x7e]
-// GFX89: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x64,0x00,0x7e]
-// NOSICI: :[[@LINE-4]]:25: error: invalid operand for instruction
-
-v_trunc_f32_e32 v0, 0x3e22f983
-// GFX11: v_trunc_f32_e32 v0, 0.15915494          ; encoding: [0xf8,0x42,0x00,0x7e]
-// GFX12XX: v_trunc_f32_e32 v0, 0.15915494          ; encoding: [0xf8,0x42,0x00,0x7e]
-// GFX89: v_trunc_f32_e32 v0, 0.15915494          ; encoding: [0xf8,0x38,0x00,0x7e]
-// SICI: v_trunc_f32_e32 v0, 0x3e22f983          ; encoding: [0xff,0x42,0x00,0x7e,0x83,0xf9,0x22,0x3e]
-
-v_fract_f64_e32 v[0:1], 0x3e22f983
-// GFX11: v_fract_f64_e32 v[0:1], 0x3e22
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefixes=W32,GFX12-W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1310 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefixes=W32,GFX13-W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s | FileCheck --check-prefixes=W64,GFX12-W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1310 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s | FileCheck --check-prefixes=W64,GFX13-W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1310 -mattr=+wavefrontsize32,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1310 -mattr=+wavefrontsize64,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+
+v_cmp_class_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, v1.l, v2.l  ; encoding: [0x01,0x05,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, v127.l, v2.l ; encoding: [0x7f,0x05,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, s1, v2.l    ; encoding: [0x01,0x04,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, s105, v2.l  ; encoding: [0x69,0x04,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, vcc_lo, v2.l ; encoding: [0x6a,0x04,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, vcc_hi, v2.l ; encoding: [0x6b,0x04,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, ttmp15, v2.l ; encoding: [0x7b,0x04,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, m0, v2.l    ; encoding: [0x7d,0x04,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, null, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, null, v2.l  ; encoding: [0x7c,0x04,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, -1, v2.l    ; encoding: [0xc1,0x04,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, 0.5, v2.l   ; encoding: [0xf0,0x04,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_class_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0xfa,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, v1.l, v2.l     ; encoding: [0x01,0x05,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, v127.l, v2.l   ; encoding: [0x7f,0x05,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, s1, v2.l       ; encoding: [0x01,0x04,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, s105, v2.l     ; encoding: [0x69,0x04,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, ttmp15, v2.l   ; encoding: [0x7b,0x04,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, m0, v2.l       ; encoding: [0x7d,0x04,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, exec_lo, v2.l  ; encoding: [0x7e,0x04,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, exec_hi, v2.l  ; encoding: [0x7f,0x04,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, null, v2.l     ; encoding: [0x7c,0x04,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, -1, v2.l       ; encoding: [0xc1,0x04,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, 0.5, v2.l      ; encoding: [0xf0,0x04,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, src_scc, v2.l  ; encoding: [0xfd,0x04,0xfa,0x7c]
+
+v_cmp_class_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0xfa,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_class_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, v1.h, v2.l  ; encoding: [0x81,0x05,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, v1.h, v2.l     ; encoding: [0x81,0x05,0xfa,0x7c]
+
+v_cmp_class_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_class_f16_e32 vcc_lo, v127.h, v2.l ; encoding: [0xff,0x05,0xfa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, v127.h, v2.l   ; encoding: [0xff,0x05,0xfa,0x7c]
+
+v_cmp_class_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_class_f16_e32 vcc_lo, src_scc, v2.h ; encoding: [0xfd,0x04,0xfb,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, src_scc, v2.h  ; encoding: [0xfd,0x04,0xfb,0x7c]
+
+v_cmp_class_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_class_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0xfb,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f16_e32 vcc, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0xfb,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_class_f32 vcc_lo, v1, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, v1, v2      ; encoding: [0x01,0x05,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, v255, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, v255, v2    ; encoding: [0xff,0x05,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, s1, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, s1, v2      ; encoding: [0x01,0x04,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, s105, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, s105, v2    ; encoding: [0x69,0x04,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, vcc_lo, v2  ; encoding: [0x6a,0x04,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, vcc_hi, v2  ; encoding: [0x6b,0x04,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, ttmp15, v2  ; encoding: [0x7b,0x04,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, m0, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, m0, v2      ; encoding: [0x7d,0x04,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, exec_lo, v2 ; encoding: [0x7e,0x04,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, exec_hi, v2 ; encoding: [0x7f,0x04,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, null, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, null, v2    ; encoding: [0x7c,0x04,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, -1, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, -1, v2      ; encoding: [0xc1,0x04,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, 0.5, v2     ; encoding: [0xf0,0x04,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_class_f32_e32 vcc_lo, src_scc, v2 ; encoding: [0xfd,0x04,0xfc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_class_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0xfd,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, v1, v2         ; encoding: [0x01,0x05,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, v255, v2       ; encoding: [0xff,0x05,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, s1, v2         ; encoding: [0x01,0x04,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, s105, v2       ; encoding: [0x69,0x04,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, vcc_lo, v2     ; encoding: [0x6a,0x04,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, vcc_hi, v2     ; encoding: [0x6b,0x04,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, ttmp15, v2     ; encoding: [0x7b,0x04,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, m0, v2         ; encoding: [0x7d,0x04,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, exec_lo, v2    ; encoding: [0x7e,0x04,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, exec_hi, v2    ; encoding: [0x7f,0x04,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, null, v2       ; encoding: [0x7c,0x04,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, -1, v2         ; encoding: [0xc1,0x04,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, 0.5, v2        ; encoding: [0xf0,0x04,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, src_scc, v2    ; encoding: [0xfd,0x04,0xfc,0x7c]
+
+v_cmp_class_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0xfd,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_class_f64 vcc_lo, v[1:2], v2
+// W32: v_cmp_class_f64_e32 vcc_lo, v[1:2], v2  ; encoding: [0x01,0x05,0xfe,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f64 vcc_lo, v[254:255], v2
+// W32: v_cmp_class_f64_e32 vcc_lo, v[254:255], v2 ; encoding: [0xfe,0x05,0xfe,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f64 vcc_lo, s[2:3], v2
+// W32: v_cmp_class_f64_e32 vcc_lo, s[2:3], v2  ; encoding: [0x02,0x04,0xfe,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f64 vcc_lo, s[104:105], v2
+// W32: v_cmp_class_f64_e32 vcc_lo, s[104:105], v2 ; encoding: [0x68,0x04,0xfe,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f64 vcc_lo, vcc, v2
+// W32: v_cmp_class_f64_e32 vcc_lo, vcc, v2     ; encoding: [0x6a,0x04,0xfe,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f64 vcc_lo, ttmp[14:15], v2
+// W32: v_cmp_class_f64_e32 vcc_lo, ttmp[14:15], v2 ; encoding: [0x7a,0x04,0xfe,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f64 vcc_lo, exec, v2
+// W32: v_cmp_class_f64_e32 vcc_lo, exec, v2    ; encoding: [0x7e,0x04,0xfe,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f64 vcc_lo, null, v2
+// W32: v_cmp_class_f64_e32 vcc_lo, null, v2    ; encoding: [0x7c,0x04,0xfe,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f64 vcc_lo, -1, v2
+// W32: v_cmp_class_f64_e32 vcc_lo, -1, v2      ; encoding: [0xc1,0x04,0xfe,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f64 vcc_lo, 0.5, v2
+// W32: v_cmp_class_f64_e32 vcc_lo, 0.5, v2     ; encoding: [0xf0,0x04,0xfe,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f64 vcc_lo, src_scc, v2
+// W32: v_cmp_class_f64_e32 vcc_lo, src_scc, v2 ; encoding: [0xfd,0x04,0xfe,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f64 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_class_f64_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0xff,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_class_f64 vcc, v[1:2], v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f64_e32 vcc, v[1:2], v2     ; encoding: [0x01,0x05,0xfe,0x7c]
+
+v_cmp_class_f64 vcc, v[254:255], v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f64_e32 vcc, v[254:255], v2 ; encoding: [0xfe,0x05,0xfe,0x7c]
+
+v_cmp_class_f64 vcc, s[2:3], v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f64_e32 vcc, s[2:3], v2     ; encoding: [0x02,0x04,0xfe,0x7c]
+
+v_cmp_class_f64 vcc, s[104:105], v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f64_e32 vcc, s[104:105], v2 ; encoding: [0x68,0x04,0xfe,0x7c]
+
+v_cmp_class_f64 vcc, vcc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f64_e32 vcc, vcc, v2        ; encoding: [0x6a,0x04,0xfe,0x7c]
+
+v_cmp_class_f64 vcc, ttmp[14:15], v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f64_e32 vcc, ttmp[14:15], v2 ; encoding: [0x7a,0x04,0xfe,0x7c]
+
+v_cmp_class_f64 vcc, exec, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f64_e32 vcc, exec, v2       ; encoding: [0x7e,0x04,0xfe,0x7c]
+
+v_cmp_class_f64 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f64_e32 vcc, null, v2       ; encoding: [0x7c,0x04,0xfe,0x7c]
+
+v_cmp_class_f64 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f64_e32 vcc, -1, v2         ; encoding: [0xc1,0x04,0xfe,0x7c]
+
+v_cmp_class_f64 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f64_e32 vcc, 0.5, v2        ; encoding: [0xf0,0x04,0xfe,0x7c]
+
+v_cmp_class_f64 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f64_e32 vcc, src_scc, v2    ; encoding: [0xfd,0x04,0xfe,0x7c]
+
+v_cmp_class_f64 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_class_f64_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0xff,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_eq_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, null, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x04,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x04,0x7c]
+
+v_cmp_eq_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x04,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_eq_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x04,0x7c]
+
+v_cmp_eq_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_eq_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x04,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x04,0x7c]
+
+v_cmp_eq_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_eq_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x05,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x05,0x7c]
+
+v_cmp_eq_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_eq_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x05,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x05,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_eq_f32 vcc_lo, v1, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, v255, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, s1, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, s105, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, m0, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, null, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, -1, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_eq_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x24,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_eq_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x25,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x24,0x7c]
+
+v_cmp_eq_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x25,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_eq_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_eq_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x44,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_eq_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x44,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_eq_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x44,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_eq_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x44,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_eq_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x44,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_eq_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x44,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_eq_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x44,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_eq_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x44,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_eq_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x44,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_eq_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x44,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_eq_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x44,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_eq_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x45,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x44,0x7c]
+
+v_cmp_eq_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x44,0x7c]
+
+v_cmp_eq_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x44,0x7c]
+
+v_cmp_eq_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x44,0x7c]
+
+v_cmp_eq_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x44,0x7c]
+
+v_cmp_eq_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x44,0x7c]
+
+v_cmp_eq_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x44,0x7c]
+
+v_cmp_eq_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x44,0x7c]
+
+v_cmp_eq_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x44,0x7c]
+
+v_cmp_eq_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x44,0x7c]
+
+v_cmp_eq_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x44,0x7c]
+
+v_cmp_eq_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x45,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, null, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x64,0x7c]
+
+v_cmp_eq_i16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_eq_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x64,0x7c]
+
+v_cmp_eq_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x64,0x7c]
+
+v_cmp_eq_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_eq_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x65,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x65,0x7c]
+
+v_cmp_eq_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_eq_i32 vcc_lo, v1, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, v255, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, s1, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, s105, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, ttmp15, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, m0, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, exec_lo, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, exec_hi, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, null, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, -1, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, 0.5, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, src_scc, v2
+// W32: v_cmp_eq_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x84,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_eq_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x85,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x84,0x7c]
+
+v_cmp_eq_i32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x85,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_eq_i64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_eq_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_eq_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_eq_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_eq_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_eq_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_eq_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_eq_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i64 vcc_lo, null, v[2:3]
+// W32: v_cmp_eq_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_eq_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_eq_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_eq_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_eq_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa4,0x7c]
+
+v_cmp_eq_i64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa4,0x7c]
+
+v_cmp_eq_i64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa4,0x7c]
+
+v_cmp_eq_i64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa4,0x7c]
+
+v_cmp_eq_i64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa4,0x7c]
+
+v_cmp_eq_i64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa4,0x7c]
+
+v_cmp_eq_i64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa4,0x7c]
+
+v_cmp_eq_i64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa4,0x7c]
+
+v_cmp_eq_i64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa4,0x7c]
+
+v_cmp_eq_i64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa4,0x7c]
+
+v_cmp_eq_i64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa4,0x7c]
+
+v_cmp_eq_i64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, null, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x74,0x7c]
+
+v_cmp_eq_u16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_eq_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x74,0x7c]
+
+v_cmp_eq_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x74,0x7c]
+
+v_cmp_eq_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_eq_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x75,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x75,0x7c]
+
+v_cmp_eq_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_eq_u32 vcc_lo, v1, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, v255, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, s1, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, s105, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, ttmp15, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, m0, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, null, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, -1, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_eq_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x95,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x94,0x7c]
+
+v_cmp_eq_u32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x95,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_eq_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u64 vcc_lo, null, v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb4,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_eq_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb4,0x7c]
+
+v_cmp_eq_u64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb4,0x7c]
+
+v_cmp_eq_u64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb4,0x7c]
+
+v_cmp_eq_u64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb4,0x7c]
+
+v_cmp_eq_u64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb4,0x7c]
+
+v_cmp_eq_u64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb4,0x7c]
+
+v_cmp_eq_u64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb4,0x7c]
+
+v_cmp_eq_u64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb4,0x7c]
+
+v_cmp_eq_u64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb4,0x7c]
+
+v_cmp_eq_u64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb4,0x7c]
+
+v_cmp_eq_u64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb4,0x7c]
+
+v_cmp_eq_u64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ge_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, null, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x0c,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x0c,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ge_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ge_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x0d,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x0d,0x7c]
+
+v_cmp_ge_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ge_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x0d,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x0d,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ge_f32 vcc_lo, v1, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, v255, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, s1, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, s105, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, m0, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, null, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, -1, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ge_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x2d,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x2c,0x7c]
+
+v_cmp_ge_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x2d,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ge_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ge_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4d,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4d,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, null, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ge_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_ge_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6d,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6d,0x7c]
+
+v_cmp_ge_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ge_i32 vcc_lo, v1, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, v255, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, s1, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, s105, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, m0, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, null, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, -1, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, 0.5, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, src_scc, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ge_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x8d,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x8c,0x7c]
+
+v_cmp_ge_i32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x8d,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ge_i64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xac,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xac,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xac,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xac,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xac,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xac,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xac,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xac,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xac,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xac,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xac,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ge_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xac,0x7c]
+
+v_cmp_ge_i64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xac,0x7c]
+
+v_cmp_ge_i64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xac,0x7c]
+
+v_cmp_ge_i64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xac,0x7c]
+
+v_cmp_ge_i64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xac,0x7c]
+
+v_cmp_ge_i64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xac,0x7c]
+
+v_cmp_ge_i64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xac,0x7c]
+
+v_cmp_ge_i64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xac,0x7c]
+
+v_cmp_ge_i64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xac,0x7c]
+
+v_cmp_ge_i64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xac,0x7c]
+
+v_cmp_ge_i64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xac,0x7c]
+
+v_cmp_ge_i64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, null, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ge_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_ge_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7c,0x7c]
+
+v_cmp_ge_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7d,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7d,0x7c]
+
+v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ge_u32 vcc_lo, v1, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, v255, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, s1, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, s105, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, m0, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, null, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, -1, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ge_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x9d,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x9d,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ge_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ge_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_gt_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, null, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x08,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x08,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x08,0x7c]
+
+v_cmp_gt_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x08,0x7c]
+
+v_cmp_gt_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_gt_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x09,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x09,0x7c]
+
+v_cmp_gt_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_gt_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x09,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x09,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_f32 vcc_lo, v1, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, v255, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, s1, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, s105, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, m0, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, null, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, -1, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_gt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x29,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x29,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_gt_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_gt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, null, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_gt_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x68,0x7c]
+
+v_cmp_gt_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x68,0x7c]
+
+v_cmp_gt_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x69,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x69,0x7c]
+
+v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_i32 vcc_lo, v1, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v255, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, s1, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, s105, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, ttmp15, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, m0, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, exec_lo, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, exec_hi, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, null, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, -1, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, 0.5, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, src_scc, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_gt_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x89,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x89,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_gt_i64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, null, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_gt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, null, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_gt_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x78,0x7c]
+
+v_cmp_gt_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x78,0x7c]
+
+v_cmp_gt_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x79,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x79,0x7c]
+
+v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_u32 vcc_lo, v1, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, v255, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, s1, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, s105, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, ttmp15, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, m0, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, null, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, -1, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_gt_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x99,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x99,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_gt_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, null, v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_gt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_le_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, null, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_le_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x06,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x06,0x7c]
+
+v_cmp_le_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x06,0x7c]
+
+v_cmp_le_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x06,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_le_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x06,0x7c]
+
+v_cmp_le_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x06,0x7c]
+
+v_cmp_le_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_le_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x07,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x07,0x7c]
+
+v_cmp_le_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_le_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x07,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x07,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_le_f32 vcc_lo, v1, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, v255, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, s1, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, s105, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, m0, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, null, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, -1, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_le_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x27,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x26,0x7c]
+
+v_cmp_le_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x26,0x7c]
+
+v_cmp_le_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x27,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_le_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_le_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x47,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x46,0x7c]
+
+v_cmp_le_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x46,0x7c]
+
+v_cmp_le_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x47,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_le_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, null, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x66,0x7c]
+
+v_cmp_le_i16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x66,0x7c]
+
+v_cmp_le_i16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_le_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_le_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x66,0x7c]
+
+v_cmp_le_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x66,0x7c]
+
+v_cmp_le_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x67,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x67,0x7c]
+
+v_cmp_le_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_le_i32 vcc_lo, v1, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, v255, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, s1, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, s105, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, ttmp15, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, m0, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, exec_lo, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, exec_hi, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, null, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, -1, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, 0.5, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, src_scc, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_le_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x87,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x86,0x7c]
+
+v_cmp_le_i32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x86,0x7c]
+
+v_cmp_le_i32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x87,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_le_i64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, null, v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_le_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_le_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, null, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x76,0x7c]
+
+v_cmp_le_u16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x76,0x7c]
+
+v_cmp_le_u16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_le_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_le_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x76,0x7c]
+
+v_cmp_le_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x76,0x7c]
+
+v_cmp_le_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x77,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x77,0x7c]
+
+v_cmp_le_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_le_u32 vcc_lo, v1, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, v255, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, s1, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, s105, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, ttmp15, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, m0, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, null, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, -1, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_le_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x97,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x96,0x7c]
+
+v_cmp_le_u32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x96,0x7c]
+
+v_cmp_le_u32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x97,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_le_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, null, v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_le_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lg_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, null, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x0a,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x0a,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lg_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_lg_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x0b,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x0b,0x7c]
+
+v_cmp_lg_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_lg_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x0b,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x0b,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lg_f32 vcc_lo, v1, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, v255, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, s1, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, s105, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, m0, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, null, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, -1, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_lg_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x2b,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x2b,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lg_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_lg_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4b,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4b,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lt_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, null, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x02,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x02,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lt_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x02,0x7c]
+
+v_cmp_lt_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x02,0x7c]
+
+v_cmp_lt_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_lt_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x03,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x03,0x7c]
+
+v_cmp_lt_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_lt_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x03,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x03,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lt_f32 vcc_lo, v1, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, v255, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, s1, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, s105, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, m0, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, null, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, -1, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_lt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x23,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x23,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lt_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_lt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, null, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lt_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_lt_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x62,0x7c]
+
+v_cmp_lt_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x62,0x7c]
+
+v_cmp_lt_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x63,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x63,0x7c]
+
+v_cmp_lt_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lt_i32 vcc_lo, v1, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, v255, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, s1, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, s105, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, ttmp15, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, m0, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, exec_lo, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, exec_hi, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, null, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, -1, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, 0.5, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, src_scc, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_lt_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x83,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x83,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lt_i64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, null, v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_lt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, null, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lt_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_lt_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x72,0x7c]
+
+v_cmp_lt_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x72,0x7c]
+
+v_cmp_lt_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x73,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x73,0x7c]
+
+v_cmp_lt_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lt_u32 vcc_lo, v1, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, v255, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, s1, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, s105, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, ttmp15, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, m0, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, null, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, -1, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_lt_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x93,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x93,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lt_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, null, v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_lt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, null, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ne_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_ne_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6b,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6b,0x7c]
+
+v_cmp_ne_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ne_i32 vcc_lo, v1, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, v255, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, s1, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, s105, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, m0, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, null, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, -1, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, 0.5, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, src_scc, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ne_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x8b,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x8b,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ne_i64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ne_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, null, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ne_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_ne_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7b,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7b,0x7c]
+
+v_cmp_ne_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ne_u32 vcc_lo, v1, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, v255, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, s1, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, s105, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, m0, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, null, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, -1, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ne_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x9b,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x9b,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ne_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ne_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_neq_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, null, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x1a,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x1a,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_neq_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, v1.h, v2.l    ; encoding: [0x81,0x05,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, v1.h, v2.l       ; encoding: [0x81,0x05,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, v127.h, v2.l  ; encoding: [0xff,0x05,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, v127.h, v2.l     ; encoding: [0xff,0x05,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_neq_f16_e32 vcc_lo, src_scc, v2.h ; encoding: [0xfd,0x04,0x1b,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, src_scc, v2.h    ; encoding: [0xfd,0x04,0x1b,0x7c]
+
+v_cmp_neq_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_neq_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x1b,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, 0xfe0b, v127.h   ; encoding: [0xff,0xfe,0x1b,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_neq_f16 vcc, 0.5, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, 0.5, v127.l      ; encoding: [0xf0,0xfe,0x1a,0x7c]
+
+v_cmp_neq_f32 vcc_lo, v1, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, v255, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, s1, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, s105, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, m0, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, null, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, -1, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_neq_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3b,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3b,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_neq_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x5a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x5a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x5a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x5a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x5a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x5a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x5a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x5a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_neq_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x5a,0x7c]
+
+v_cmp_neq_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5a,0x7c]
+
+v_cmp_neq_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x5a,0x7c]
+
+v_cmp_neq_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5a,0x7c]
+
+v_cmp_neq_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x5a,0x7c]
+
+v_cmp_neq_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5a,0x7c]
+
+v_cmp_neq_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x5a,0x7c]
+
+v_cmp_neq_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x5a,0x7c]
+
+v_cmp_neq_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x5a,0x7c]
+
+v_cmp_neq_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x5a,0x7c]
+
+v_cmp_neq_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x5a,0x7c]
+
+v_cmp_neq_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_nge_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, null, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x12,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x12,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_nge_f32 vcc_lo, v1, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, v255, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, s1, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, s105, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, m0, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, null, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, -1, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x32,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_nge_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x33,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x32,0x7c]
+
+v_cmp_nge_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x33,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_nge_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_nge_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ngt_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, null, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x16,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x16,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x16,0x7c]
+
+v_cmp_ngt_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x16,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ngt_f32 vcc_lo, v1, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, v255, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, s1, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, s105, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, m0, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, null, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, -1, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x36,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ngt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x37,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x36,0x7c]
+
+v_cmp_ngt_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x37,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ngt_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x56,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x56,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x56,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x56,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x56,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x56,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x56,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x56,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x56,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x56,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x56,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ngt_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x56,0x7c]
+
+v_cmp_ngt_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x56,0x7c]
+
+v_cmp_ngt_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x56,0x7c]
+
+v_cmp_ngt_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x56,0x7c]
+
+v_cmp_ngt_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x56,0x7c]
+
+v_cmp_ngt_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x56,0x7c]
+
+v_cmp_ngt_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x56,0x7c]
+
+v_cmp_ngt_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x56,0x7c]
+
+v_cmp_ngt_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x56,0x7c]
+
+v_cmp_ngt_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x56,0x7c]
+
+v_cmp_ngt_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x56,0x7c]
+
+v_cmp_ngt_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_nle_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, null, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x18,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x18,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x18,0x7c]
+
+v_cmp_nle_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x18,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_nle_f32 vcc_lo, v1, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, v255, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, s1, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, s105, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, m0, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, null, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, -1, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x38,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_nle_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x39,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x38,0x7c]
+
+v_cmp_nle_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x39,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_nle_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x58,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x58,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x58,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x58,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x58,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x58,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x58,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x58,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x58,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x58,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x58,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_nle_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x59,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nle_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x58,0x7c]
+
+v_cmp_nle_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x58,0x7c]
+
+v_cmp_nle_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x58,0x7c]
+
+v_cmp_nle_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x58,0x7c]
+
+v_cmp_nle_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x58,0x7c]
+
+v_cmp_nle_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x58,0x7c]
+
+v_cmp_nle_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x58,0x7c]
+
+v_cmp_nle_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x58,0x7c]
+
+v_cmp_nle_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x58,0x7c]
+
+v_cmp_nle_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x58,0x7c]
+
+v_cmp_nle_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x58,0x7c]
+
+v_cmp_nle_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nle_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x59,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_nlg_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, null, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x14,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x14,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x14,0x7c]
+
+v_cmp_nlg_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x14,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_nlg_f32 vcc_lo, v1, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, v255, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, s1, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, s105, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, m0, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, null, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, -1, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x34,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_nlg_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x35,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x34,0x7c]
+
+v_cmp_nlg_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x35,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_nlg_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x54,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x54,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x54,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x54,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x54,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x54,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x54,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x54,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x54,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x54,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x54,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x55,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlg_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x54,0x7c]
+
+v_cmp_nlg_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x54,0x7c]
+
+v_cmp_nlg_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x54,0x7c]
+
+v_cmp_nlg_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x54,0x7c]
+
+v_cmp_nlg_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x54,0x7c]
+
+v_cmp_nlg_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x54,0x7c]
+
+v_cmp_nlg_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x54,0x7c]
+
+v_cmp_nlg_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x54,0x7c]
+
+v_cmp_nlg_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x54,0x7c]
+
+v_cmp_nlg_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x54,0x7c]
+
+v_cmp_nlg_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x54,0x7c]
+
+v_cmp_nlg_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlg_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x55,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_nlt_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, null, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x1c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x1c,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x1c,0x7c]
+
+v_cmp_nlt_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x1c,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_nlt_f32 vcc_lo, v1, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, v255, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, s1, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, s105, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, m0, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, null, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, -1, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x3c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_nlt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3d,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x3c,0x7c]
+
+v_cmp_nlt_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3d,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_nlt_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5d,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5d,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_o_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, v1.l, v2.l      ; encoding: [0x01,0x05,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, v127.l, v2.l    ; encoding: [0x7f,0x05,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, s1, v2.l        ; encoding: [0x01,0x04,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, s105, v2.l      ; encoding: [0x69,0x04,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, vcc_lo, v2.l    ; encoding: [0x6a,0x04,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, vcc_hi, v2.l    ; encoding: [0x6b,0x04,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, ttmp15, v2.l    ; encoding: [0x7b,0x04,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, m0, v2.l        ; encoding: [0x7d,0x04,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, exec_lo, v2.l   ; encoding: [0x7e,0x04,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, exec_hi, v2.l   ; encoding: [0x7f,0x04,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, null, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, null, v2.l      ; encoding: [0x7c,0x04,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, -1, v2.l        ; encoding: [0xc1,0x04,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, 0.5, v2.l       ; encoding: [0xf0,0x04,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_o_f16_e32 vcc_lo, src_scc, v2.l   ; encoding: [0xfd,0x04,0x0e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_o_f16_e32 vcc_lo, 0xfe0b, v127.l  ; encoding: [0xff,0xfe,0x0e,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, v1.l, v2.l         ; encoding: [0x01,0x05,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, v127.l, v2.l       ; encoding: [0x7f,0x05,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, s1, v2.l           ; encoding: [0x01,0x04,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, s105, v2.l         ; encoding: [0x69,0x04,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, vcc_lo, v2.l       ; encoding: [0x6a,0x04,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, vcc_hi, v2.l       ; encoding: [0x6b,0x04,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, ttmp15, v2.l       ; encoding: [0x7b,0x04,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, m0, v2.l           ; encoding: [0x7d,0x04,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, exec_lo, v2.l      ; encoding: [0x7e,0x04,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, exec_hi, v2.l      ; encoding: [0x7f,0x04,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, null, v2.l         ; encoding: [0x7c,0x04,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, -1, v2.l           ; encoding: [0xc1,0x04,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, 0.5, v2.l          ; encoding: [0xf0,0x04,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, src_scc, v2.l      ; encoding: [0xfd,0x04,0x0e,0x7c]
+
+v_cmp_o_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f16_e32 vcc, 0xfe0b, v127.l     ; encoding: [0xff,0xfe,0x0e,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_o_f32 vcc_lo, v1, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, v1, v2          ; encoding: [0x01,0x05,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, v255, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, v255, v2        ; encoding: [0xff,0x05,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, s1, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, s1, v2          ; encoding: [0x01,0x04,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, s105, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, s105, v2        ; encoding: [0x69,0x04,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, vcc_lo, v2      ; encoding: [0x6a,0x04,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, vcc_hi, v2      ; encoding: [0x6b,0x04,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, ttmp15, v2      ; encoding: [0x7b,0x04,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, m0, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, m0, v2          ; encoding: [0x7d,0x04,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, exec_lo, v2     ; encoding: [0x7e,0x04,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, exec_hi, v2     ; encoding: [0x7f,0x04,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, null, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, null, v2        ; encoding: [0x7c,0x04,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, -1, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, -1, v2          ; encoding: [0xc1,0x04,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, 0.5, v2         ; encoding: [0xf0,0x04,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_o_f32_e32 vcc_lo, src_scc, v2     ; encoding: [0xfd,0x04,0x2e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_o_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x2f,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, v1, v2             ; encoding: [0x01,0x05,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, v255, v2           ; encoding: [0xff,0x05,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, s1, v2             ; encoding: [0x01,0x04,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, s105, v2           ; encoding: [0x69,0x04,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, vcc_lo, v2         ; encoding: [0x6a,0x04,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, vcc_hi, v2         ; encoding: [0x6b,0x04,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, ttmp15, v2         ; encoding: [0x7b,0x04,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, m0, v2             ; encoding: [0x7d,0x04,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, exec_lo, v2        ; encoding: [0x7e,0x04,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, exec_hi, v2        ; encoding: [0x7f,0x04,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, null, v2           ; encoding: [0x7c,0x04,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, -1, v2             ; encoding: [0xc1,0x04,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, 0.5, v2            ; encoding: [0xf0,0x04,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, src_scc, v2        ; encoding: [0xfd,0x04,0x2e,0x7c]
+
+v_cmp_o_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f32_e32 vcc, 0xaf123456, v255   ; encoding: [0xff,0xfe,0x2f,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_o_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_o_f64_e32 vcc_lo, v[1:2], v[2:3]  ; encoding: [0x01,0x05,0x4e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_o_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_o_f64_e32 vcc_lo, s[2:3], v[2:3]  ; encoding: [0x02,0x04,0x4e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_o_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_o_f64_e32 vcc_lo, vcc, v[2:3]     ; encoding: [0x6a,0x04,0x4e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_o_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_o_f64_e32 vcc_lo, exec, v[2:3]    ; encoding: [0x7e,0x04,0x4e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_o_f64_e32 vcc_lo, null, v[2:3]    ; encoding: [0x7c,0x04,0x4e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_o_f64_e32 vcc_lo, -1, v[2:3]      ; encoding: [0xc1,0x04,0x4e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_o_f64_e32 vcc_lo, 0.5, v[2:3]     ; encoding: [0xf0,0x04,0x4e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_o_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x4e,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_o_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4f,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_o_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f64_e32 vcc, v[1:2], v[2:3]     ; encoding: [0x01,0x05,0x4e,0x7c]
+
+v_cmp_o_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4e,0x7c]
+
+v_cmp_o_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f64_e32 vcc, s[2:3], v[2:3]     ; encoding: [0x02,0x04,0x4e,0x7c]
+
+v_cmp_o_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4e,0x7c]
+
+v_cmp_o_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f64_e32 vcc, vcc, v[2:3]        ; encoding: [0x6a,0x04,0x4e,0x7c]
+
+v_cmp_o_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4e,0x7c]
+
+v_cmp_o_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f64_e32 vcc, exec, v[2:3]       ; encoding: [0x7e,0x04,0x4e,0x7c]
+
+v_cmp_o_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f64_e32 vcc, null, v[2:3]       ; encoding: [0x7c,0x04,0x4e,0x7c]
+
+v_cmp_o_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f64_e32 vcc, -1, v[2:3]         ; encoding: [0xc1,0x04,0x4e,0x7c]
+
+v_cmp_o_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f64_e32 vcc, 0.5, v[2:3]        ; encoding: [0xf0,0x04,0x4e,0x7c]
+
+v_cmp_o_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f64_e32 vcc, src_scc, v[2:3]    ; encoding: [0xfd,0x04,0x4e,0x7c]
+
+v_cmp_o_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_o_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4f,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_u_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, v1.l, v2.l      ; encoding: [0x01,0x05,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, v127.l, v2.l    ; encoding: [0x7f,0x05,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, s1, v2.l        ; encoding: [0x01,0x04,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, s105, v2.l      ; encoding: [0x69,0x04,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, vcc_lo, v2.l    ; encoding: [0x6a,0x04,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, vcc_hi, v2.l    ; encoding: [0x6b,0x04,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, ttmp15, v2.l    ; encoding: [0x7b,0x04,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, m0, v2.l        ; encoding: [0x7d,0x04,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, exec_lo, v2.l   ; encoding: [0x7e,0x04,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, exec_hi, v2.l   ; encoding: [0x7f,0x04,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, null, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, null, v2.l      ; encoding: [0x7c,0x04,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, -1, v2.l        ; encoding: [0xc1,0x04,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, 0.5, v2.l       ; encoding: [0xf0,0x04,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, src_scc, v2.l   ; encoding: [0xfd,0x04,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_u_f16_e32 vcc_lo, 0xfe0b, v127.l  ; encoding: [0xff,0xfe,0x10,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, v1.l, v2.l         ; encoding: [0x01,0x05,0x10,0x7c]
+
+v_cmp_u_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, v127.l, v2.l       ; encoding: [0x7f,0x05,0x10,0x7c]
+
+v_cmp_u_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, s1, v2.l           ; encoding: [0x01,0x04,0x10,0x7c]
+
+v_cmp_u_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, s105, v2.l         ; encoding: [0x69,0x04,0x10,0x7c]
+
+v_cmp_u_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, vcc_lo, v2.l       ; encoding: [0x6a,0x04,0x10,0x7c]
+
+v_cmp_u_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, vcc_hi, v2.l       ; encoding: [0x6b,0x04,0x10,0x7c]
+
+v_cmp_u_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, ttmp15, v2.l       ; encoding: [0x7b,0x04,0x10,0x7c]
+
+v_cmp_u_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, m0, v2.l           ; encoding: [0x7d,0x04,0x10,0x7c]
+
+v_cmp_u_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, exec_lo, v2.l      ; encoding: [0x7e,0x04,0x10,0x7c]
+
+v_cmp_u_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, exec_hi, v2.l      ; encoding: [0x7f,0x04,0x10,0x7c]
+
+v_cmp_u_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, null, v2.l         ; encoding: [0x7c,0x04,0x10,0x7c]
+
+v_cmp_u_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, -1, v2.l           ; encoding: [0xc1,0x04,0x10,0x7c]
+
+v_cmp_u_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, 0.5, v2.l          ; encoding: [0xf0,0x04,0x10,0x7c]
+
+v_cmp_u_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, src_scc, v2.l      ; encoding: [0xfd,0x04,0x10,0x7c]
+
+v_cmp_u_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, 0xfe0b, v127.l     ; encoding: [0xff,0xfe,0x10,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_u_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, v1.h, v2.l      ; encoding: [0x81,0x05,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, v1.h, v2.l         ; encoding: [0x81,0x05,0x10,0x7c]
+
+v_cmp_u_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_u_f16_e32 vcc_lo, v127.h, v2.l    ; encoding: [0xff,0x05,0x10,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, v127.h, v2.l       ; encoding: [0xff,0x05,0x10,0x7c]
+
+v_cmp_u_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_u_f16_e32 vcc_lo, src_scc, v2.h   ; encoding: [0xfd,0x04,0x11,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, src_scc, v2.h      ; encoding: [0xfd,0x04,0x11,0x7c]
+
+v_cmp_u_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_u_f16_e32 vcc_lo, 0xfe0b, v127.h  ; encoding: [0xff,0xfe,0x11,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f16_e32 vcc, 0xfe0b, v127.h     ; encoding: [0xff,0xfe,0x11,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_u_f32 vcc_lo, v1, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, v1, v2          ; encoding: [0x01,0x05,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, v255, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, v255, v2        ; encoding: [0xff,0x05,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, s1, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, s1, v2          ; encoding: [0x01,0x04,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, s105, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, s105, v2        ; encoding: [0x69,0x04,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, vcc_lo, v2      ; encoding: [0x6a,0x04,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, vcc_hi, v2      ; encoding: [0x6b,0x04,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, ttmp15, v2      ; encoding: [0x7b,0x04,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, m0, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, m0, v2          ; encoding: [0x7d,0x04,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, exec_lo, v2     ; encoding: [0x7e,0x04,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, exec_hi, v2     ; encoding: [0x7f,0x04,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, null, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, null, v2        ; encoding: [0x7c,0x04,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, -1, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, -1, v2          ; encoding: [0xc1,0x04,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, 0.5, v2         ; encoding: [0xf0,0x04,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_u_f32_e32 vcc_lo, src_scc, v2     ; encoding: [0xfd,0x04,0x30,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_u_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x31,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, v1, v2             ; encoding: [0x01,0x05,0x30,0x7c]
+
+v_cmp_u_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, v255, v2           ; encoding: [0xff,0x05,0x30,0x7c]
+
+v_cmp_u_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, s1, v2             ; encoding: [0x01,0x04,0x30,0x7c]
+
+v_cmp_u_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, s105, v2           ; encoding: [0x69,0x04,0x30,0x7c]
+
+v_cmp_u_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, vcc_lo, v2         ; encoding: [0x6a,0x04,0x30,0x7c]
+
+v_cmp_u_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, vcc_hi, v2         ; encoding: [0x6b,0x04,0x30,0x7c]
+
+v_cmp_u_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, ttmp15, v2         ; encoding: [0x7b,0x04,0x30,0x7c]
+
+v_cmp_u_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, m0, v2             ; encoding: [0x7d,0x04,0x30,0x7c]
+
+v_cmp_u_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, exec_lo, v2        ; encoding: [0x7e,0x04,0x30,0x7c]
+
+v_cmp_u_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, exec_hi, v2        ; encoding: [0x7f,0x04,0x30,0x7c]
+
+v_cmp_u_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, null, v2           ; encoding: [0x7c,0x04,0x30,0x7c]
+
+v_cmp_u_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, -1, v2             ; encoding: [0xc1,0x04,0x30,0x7c]
+
+v_cmp_u_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, 0.5, v2            ; encoding: [0xf0,0x04,0x30,0x7c]
+
+v_cmp_u_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, src_scc, v2        ; encoding: [0xfd,0x04,0x30,0x7c]
+
+v_cmp_u_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f32_e32 vcc, 0xaf123456, v255   ; encoding: [0xff,0xfe,0x31,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_u_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_u_f64_e32 vcc_lo, v[1:2], v[2:3]  ; encoding: [0x01,0x05,0x50,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_u_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x50,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_u_f64_e32 vcc_lo, s[2:3], v[2:3]  ; encoding: [0x02,0x04,0x50,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_u_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x50,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_u_f64_e32 vcc_lo, vcc, v[2:3]     ; encoding: [0x6a,0x04,0x50,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_u_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x50,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_u_f64_e32 vcc_lo, exec, v[2:3]    ; encoding: [0x7e,0x04,0x50,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_u_f64_e32 vcc_lo, null, v[2:3]    ; encoding: [0x7c,0x04,0x50,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_u_f64_e32 vcc_lo, -1, v[2:3]      ; encoding: [0xc1,0x04,0x50,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_u_f64_e32 vcc_lo, 0.5, v[2:3]     ; encoding: [0xf0,0x04,0x50,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_u_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x50,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_u_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x51,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_u_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f64_e32 vcc, v[1:2], v[2:3]     ; encoding: [0x01,0x05,0x50,0x7c]
+
+v_cmp_u_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x50,0x7c]
+
+v_cmp_u_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f64_e32 vcc, s[2:3], v[2:3]     ; encoding: [0x02,0x04,0x50,0x7c]
+
+v_cmp_u_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x50,0x7c]
+
+v_cmp_u_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f64_e32 vcc, vcc, v[2:3]        ; encoding: [0x6a,0x04,0x50,0x7c]
+
+v_cmp_u_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x50,0x7c]
+
+v_cmp_u_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f64_e32 vcc, exec, v[2:3]       ; encoding: [0x7e,0x04,0x50,0x7c]
+
+v_cmp_u_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f64_e32 vcc, null, v[2:3]       ; encoding: [0x7c,0x04,0x50,0x7c]
+
+v_cmp_u_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f64_e32 vcc, -1, v[2:3]         ; encoding: [0xc1,0x04,0x50,0x7c]
+
+v_cmp_u_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f64_e32 vcc, 0.5, v[2:3]        ; encoding: [0xf0,0x04,0x50,0x7c]
+
+v_cmp_u_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f64_e32 vcc, src_scc, v[2:3]    ; encoding: [0xfd,0x04,0x50,0x7c]
+
+v_cmp_u_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_u_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x51,0x7c,0x56,0x34,0x12,0xaf]
+//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+// GFX12-W32: {{.*}}
+// GFX12-W64: {{.*}}
+// GFX13-W32: {{.*}}
+// GFX13-W64: {{.*}}

>From c3b01784778462823b047354119f089fed9da624 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 13:28:33 +0530
Subject: [PATCH 25/55] Update gfx12_asm_vopc.s

---
 llvm/test/MC/AMDGPU/gfx12_asm_vopc.s | 7970 +++++++++++++++++++++-----
 1 file changed, 6564 insertions(+), 1406 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vopc.s b/llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
index d5caeac333cb4..c3c8d941ad43f 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
@@ -1312,2677 +1312,7835 @@ v_cmp_eq_u32 vcc_lo, m0, v2
 // W32: v_cmp_eq_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x94,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u32 vcc_
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7c,0x7c]
+v_cmp_eq_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7c,0x7c]
+v_cmp_eq_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7c,0x7c]
+v_cmp_eq_u32 vcc_lo, null, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7c,0x7c]
+v_cmp_eq_u32 vcc_lo, -1, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7c,0x7c]
+v_cmp_eq_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7c,0x7c]
+v_cmp_eq_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_eq_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x94,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, src_scc, v2.l
+v_cmp_eq_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_eq_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x95,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7c,0x7c]
+// W64: v_cmp_eq_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x94,0x7c]
 
-v_cmp_ge_u16 vcc, 0xfe0b, v127.l
+v_cmp_eq_u32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_eq_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x94,0x7c]
 
-v_cmp_ge_u16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x94,0x7c]
 
-v_cmp_ge_u16 vcc, 0x3800, v2.l
+v_cmp_eq_u32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+// W64: v_cmp_eq_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x94,0x7c]
 
-v_cmp_ge_u16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x94,0x7c]
 
-v_cmp_ge_u16 vcc, v1.h, v2.l
+v_cmp_eq_u32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7c,0x7c]
+// W64: v_cmp_eq_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x94,0x7c]
 
-v_cmp_ge_u16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x94,0x7c]
 
-v_cmp_ge_u16 vcc, v127.h, v2.l
+v_cmp_eq_u32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7c,0x7c]
+// W64: v_cmp_eq_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x94,0x7c]
 
-v_cmp_ge_u16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7d,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x94,0x7c]
 
-v_cmp_ge_u16 vcc, src_scc, v2.h
+v_cmp_eq_u32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7d,0x7c]
+// W64: v_cmp_eq_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x94,0x7c]
 
-v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x94,0x7c]
 
-v_cmp_ge_u16 vcc, 0xfe0b, v127.h
+v_cmp_eq_u32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_eq_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x94,0x7c]
 
-v_cmp_ge_u32 vcc_lo, v1, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x94,0x7c]
 
-v_cmp_ge_u32 vcc_lo, v255, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x94,0x7c]
 
-v_cmp_ge_u32 vcc_lo, s1, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_eq_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x95,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_ge_u32 vcc_lo, s105, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x9c,0x7c]
+v_cmp_eq_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb4,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x9c,0x7c]
+v_cmp_eq_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb4,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x9c,0x7c]
+v_cmp_eq_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb4,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x9c,0x7c]
+v_cmp_eq_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb4,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, m0, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x9c,0x7c]
+v_cmp_eq_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb4,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x9c,0x7c]
+v_cmp_eq_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb4,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x9c,0x7c]
+v_cmp_eq_u64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb4,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, null, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x9c,0x7c]
+v_cmp_eq_u64 vcc_lo, null, v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb4,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, -1, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x9c,0x7c]
+v_cmp_eq_u64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb4,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x9c,0x7c]
+v_cmp_eq_u64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb4,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x9c,0x7c]
+v_cmp_eq_u64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_eq_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb4,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ge_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x9d,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_eq_u64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_eq_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc, v1, v2
+v_cmp_eq_u64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x9c,0x7c]
+// W64: v_cmp_eq_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb4,0x7c]
 
-v_cmp_ge_u32 vcc, v255, v2
+v_cmp_eq_u64 vcc, v[254:255], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x9c,0x7c]
+// W64: v_cmp_eq_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb4,0x7c]
 
-v_cmp_ge_u32 vcc, s1, v2
+v_cmp_eq_u64 vcc, s[2:3], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x9c,0x7c]
+// W64: v_cmp_eq_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb4,0x7c]
 
-v_cmp_ge_u32 vcc, s105, v2
+v_cmp_eq_u64 vcc, s[104:105], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x9c,0x7c]
+// W64: v_cmp_eq_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb4,0x7c]
 
-v_cmp_ge_u32 vcc, vcc_lo, v2
+v_cmp_eq_u64 vcc, vcc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x9c,0x7c]
+// W64: v_cmp_eq_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb4,0x7c]
 
-v_cmp_ge_u32 vcc, vcc_hi, v2
+v_cmp_eq_u64 vcc, ttmp[14:15], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x9c,0x7c]
+// W64: v_cmp_eq_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb4,0x7c]
 
-v_cmp_ge_u32 vcc, ttmp15, v2
+v_cmp_eq_u64 vcc, exec, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x9c,0x7c]
+// W64: v_cmp_eq_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb4,0x7c]
 
-v_cmp_ge_u32 vcc, m0, v2
+v_cmp_eq_u64 vcc, null, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x9c,0x7c]
+// W64: v_cmp_eq_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb4,0x7c]
 
-v_cmp_ge_u32 vcc, exec_lo, v2
+v_cmp_eq_u64 vcc, -1, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x9c,0x7c]
+// W64: v_cmp_eq_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb4,0x7c]
 
-v_cmp_ge_u32 vcc, exec_hi, v2
+v_cmp_eq_u64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x9c,0x7c]
+// W64: v_cmp_eq_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb4,0x7c]
 
-v_cmp_ge_u32 vcc, null, v2
+v_cmp_eq_u64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x9c,0x7c]
+// W64: v_cmp_eq_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb4,0x7c]
 
-v_cmp_ge_u32 vcc, -1, v2
+v_cmp_eq_u64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x9c,0x7c]
+// W64: v_cmp_eq_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_ge_u32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x9c,0x7c]
+v_cmp_ge_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x9c,0x7c]
+v_cmp_ge_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x9d,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_ge_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x0c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xbc,0x7c]
+v_cmp_ge_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x0c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xbc,0x7c]
+v_cmp_ge_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x0c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xbc,0x7c]
+v_cmp_ge_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x0c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xbc,0x7c]
+v_cmp_ge_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x0c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xbc,0x7c]
+v_cmp_ge_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x0c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xbc,0x7c]
+v_cmp_ge_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x0c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xbc,0x7c]
+v_cmp_ge_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x0c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xbc,0x7c]
+v_cmp_ge_f16 vcc_lo, null, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x0c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xbc,0x7c]
+v_cmp_ge_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x0c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xbc,0x7c]
+v_cmp_ge_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x0c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xbc,0x7c]
+v_cmp_ge_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x0c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_ge_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_ge_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x0c,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u64 vcc, v[1:2], v[2:3]
+v_cmp_ge_f16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xbc,0x7c]
+// W64: v_cmp_ge_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x0c,0x7c]
 
-v_cmp_ge_u64 vcc, v[254:255], v[2:3]
+v_cmp_ge_f16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xbc,0x7c]
+// W64: v_cmp_ge_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x0c,0x7c]
 
-v_cmp_ge_u64 vcc, s[2:3], v[2:3]
+v_cmp_ge_f16 vcc, s1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xbc,0x7c]
+// W64: v_cmp_ge_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x0c,0x7c]
 
-v_cmp_ge_u64 vcc, s[104:105], v[2:3]
+v_cmp_ge_f16 vcc, s105, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xbc,0x7c]
+// W64: v_cmp_ge_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x0c,0x7c]
 
-v_cmp_ge_u64 vcc, vcc, v[2:3]
+v_cmp_ge_f16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xbc,0x7c]
+// W64: v_cmp_ge_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x0c,0x7c]
 
-v_cmp_ge_u64 vcc, ttmp[14:15], v[2:3]
+v_cmp_ge_f16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xbc,0x7c]
+// W64: v_cmp_ge_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x0c,0x7c]
 
-v_cmp_ge_u64 vcc, exec, v[2:3]
+v_cmp_ge_f16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xbc,0x7c]
+// W64: v_cmp_ge_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x0c,0x7c]
 
-v_cmp_ge_u64 vcc, null, v[2:3]
+v_cmp_ge_f16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xbc,0x7c]
+// W64: v_cmp_ge_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x0c,0x7c]
 
-v_cmp_ge_u64 vcc, -1, v[2:3]
+v_cmp_ge_f16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xbc,0x7c]
+// W64: v_cmp_ge_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x0c,0x7c]
 
-v_cmp_ge_u64 vcc, 0.5, v[2:3]
+v_cmp_ge_f16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xbc,0x7c]
+// W64: v_cmp_ge_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x0c,0x7c]
 
-v_cmp_ge_u64 vcc, src_scc, v[2:3]
+v_cmp_ge_f16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xbc,0x7c]
+// W64: v_cmp_ge_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x0c,0x7c]
 
-v_cmp_ge_u64 vcc, 0xaf123456, v[254:255]
+v_cmp_ge_f16 vcc, -1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_ge_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x0c,0x7c]
 
-v_cmp_gt_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x08,0x7c]
+v_cmp_ge_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x0c,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ge_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x0c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x08,0x7c]
+v_cmp_ge_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x0c,0x7c]
+
+v_cmp_ge_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ge_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x0c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x08,0x7c]
+v_cmp_ge_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ge_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x0d,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x08,0x7c]
+v_cmp_ge_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x0d,0x7c]
+
+v_cmp_ge_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ge_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x0d,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x08,0x7c]
+v_cmp_ge_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x0d,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ge_f32 vcc_lo, v1, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x2c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x08,0x7c]
+v_cmp_ge_f32 vcc_lo, v255, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x2c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x08,0x7c]
+v_cmp_ge_f32 vcc_lo, s1, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x2c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x08,0x7c]
+v_cmp_ge_f32 vcc_lo, s105, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x2c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x08,0x7c]
+v_cmp_ge_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x2c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x08,0x7c]
+v_cmp_ge_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x2c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, null, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x08,0x7c]
+v_cmp_ge_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x2c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x08,0x7c]
+v_cmp_ge_f32 vcc_lo, m0, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x2c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x08,0x7c]
+v_cmp_ge_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x2c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x08,0x7c]
+v_cmp_ge_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x2c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x08,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ge_f32 vcc_lo, null, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x2c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc, v1.l, v2.l
+v_cmp_ge_f32 vcc_lo, -1, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_ge_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x2c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ge_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x2d,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, v127.l, v2.l
+v_cmp_ge_f32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, s1, v2.l
+v_cmp_ge_f32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, s105, v2.l
+v_cmp_ge_f32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, vcc_lo, v2.l
+v_cmp_ge_f32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, vcc_hi, v2.l
+v_cmp_ge_f32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, ttmp15, v2.l
+v_cmp_ge_f32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, m0, v2.l
+v_cmp_ge_f32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, exec_lo, v2.l
+v_cmp_ge_f32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, exec_hi, v2.l
+v_cmp_ge_f32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, null, v2.l
+v_cmp_ge_f32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, -1, v2.l
+v_cmp_ge_f32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, 0.5, v2.l
+v_cmp_ge_f32 vcc, 0.5, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, src_scc, v2.l
+v_cmp_ge_f32 vcc, src_scc, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x08,0x7c]
+// W64: v_cmp_ge_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x2c,0x7c]
 
-v_cmp_gt_f16 vcc, 0xfe0b, v127.l
+v_cmp_ge_f32 vcc, 0xaf123456, v255
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x08,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_ge_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x2d,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_gt_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x08,0x7c]
+v_cmp_ge_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x4c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x08,0x7c]
+v_cmp_ge_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x08,0x7c]
+v_cmp_ge_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x4c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x08,0x7c]
+v_cmp_ge_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_gt_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x09,0x7c]
+v_cmp_ge_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x4c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x09,0x7c]
+v_cmp_ge_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_gt_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x09,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ge_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x4c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f16 vcc, 0xfe0b, v127.h
+v_cmp_ge_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ge_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x4c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ge_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4d,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_f64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x09,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_ge_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x4c,0x7c]
 
-v_cmp_gt_f32 vcc_lo, v1, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x28,0x7c]
+v_cmp_ge_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x4c,0x7c]
+
+v_cmp_ge_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4d,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, v255, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x28,0x7c]
+v_cmp_ge_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, s1, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x28,0x7c]
+v_cmp_ge_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, s105, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x28,0x7c]
+v_cmp_ge_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x28,0x7c]
+v_cmp_ge_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x28,0x7c]
+v_cmp_ge_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x28,0x7c]
+v_cmp_ge_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, m0, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x28,0x7c]
+v_cmp_ge_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x28,0x7c]
+v_cmp_ge_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x28,0x7c]
+v_cmp_ge_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, null, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x28,0x7c]
+v_cmp_ge_i16 vcc_lo, null, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, -1, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x28,0x7c]
+v_cmp_ge_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x28,0x7c]
+v_cmp_ge_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x28,0x7c]
+v_cmp_ge_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_gt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x29,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_ge_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f32 vcc, v1, v2
+v_cmp_ge_i16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, v255, v2
+v_cmp_ge_i16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, s1, v2
+v_cmp_ge_i16 vcc, s1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, s105, v2
+v_cmp_ge_i16 vcc, s105, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, vcc_lo, v2
+v_cmp_ge_i16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, vcc_hi, v2
+v_cmp_ge_i16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, ttmp15, v2
+v_cmp_ge_i16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, m0, v2
+v_cmp_ge_i16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, exec_lo, v2
+v_cmp_ge_i16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, exec_hi, v2
+v_cmp_ge_i16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, null, v2
+v_cmp_ge_i16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, -1, v2
+v_cmp_ge_i16 vcc, -1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, 0.5, v2
+v_cmp_ge_i16 vcc, 0.5, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, src_scc, v2
+v_cmp_ge_i16 vcc, src_scc, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x28,0x7c]
+// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6c,0x7c]
 
-v_cmp_gt_f32 vcc, 0xaf123456, v255
+v_cmp_ge_i16 vcc, 0xfe0b, v127.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x29,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_gt_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x48,0x7c]
+v_cmp_ge_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x48,0x7c]
+v_cmp_ge_i16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_ge_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x48,0x7c]
+v_cmp_ge_i16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x48,0x7c]
+v_cmp_ge_i16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6c,0x7c]
+
+v_cmp_ge_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6d,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x48,0x7c]
+v_cmp_ge_i16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6d,0x7c]
+
+v_cmp_ge_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x48,0x7c]
+v_cmp_ge_i16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ge_i32 vcc_lo, v1, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x8c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x48,0x7c]
+v_cmp_ge_i32 vcc_lo, v255, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x8c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x48,0x7c]
+v_cmp_ge_i32 vcc_lo, s1, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x8c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x48,0x7c]
+v_cmp_ge_i32 vcc_lo, s105, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x8c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x48,0x7c]
+v_cmp_ge_i32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x8c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x48,0x7c]
+v_cmp_ge_i32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x8c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_gt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_ge_i32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x8c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_f64 vcc, v[1:2], v[2:3]
+v_cmp_ge_i32 vcc_lo, m0, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, null, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, -1, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, 0.5, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, src_scc, v2
+// W32: v_cmp_ge_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x8c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ge_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x8d,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x48,0x7c]
+// W64: v_cmp_ge_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x8c,0x7c]
 
-v_cmp_gt_f64 vcc, v[254:255], v[2:3]
+v_cmp_ge_i32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x48,0x7c]
+// W64: v_cmp_ge_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x8c,0x7c]
 
-v_cmp_gt_f64 vcc, s[2:3], v[2:3]
+v_cmp_ge_i32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x48,0x7c]
+// W64: v_cmp_ge_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x8c,0x7c]
 
-v_cmp_gt_f64 vcc, s[104:105], v[2:3]
+v_cmp_ge_i32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x48,0x7c]
+// W64: v_cmp_ge_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x8c,0x7c]
 
-v_cmp_gt_f64 vcc, vcc, v[2:3]
+v_cmp_ge_i32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x48,0x7c]
+// W64: v_cmp_ge_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x8c,0x7c]
 
-v_cmp_gt_f64 vcc, ttmp[14:15], v[2:3]
+v_cmp_ge_i32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x48,0x7c]
+// W64: v_cmp_ge_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x8c,0x7c]
 
-v_cmp_gt_f64 vcc, exec, v[2:3]
+v_cmp_ge_i32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x48,0x7c]
+// W64: v_cmp_ge_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x8c,0x7c]
 
-v_cmp_gt_f64 vcc, null, v[2:3]
+v_cmp_ge_i32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x48,0x7c]
+// W64: v_cmp_ge_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x8c,0x7c]
 
-v_cmp_gt_f64 vcc, -1, v[2:3]
+v_cmp_ge_i32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x48,0x7c]
+// W64: v_cmp_ge_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x8c,0x7c]
 
-v_cmp_gt_f64 vcc, 0.5, v[2:3]
+v_cmp_ge_i32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x48,0x7c]
+// W64: v_cmp_ge_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x8c,0x7c]
 
-v_cmp_gt_f64 vcc, src_scc, v[2:3]
+v_cmp_ge_i32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x48,0x7c]
+// W64: v_cmp_ge_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x8c,0x7c]
 
-v_cmp_gt_f64 vcc, 0xaf123456, v[254:255]
+v_cmp_ge_i32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_ge_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x8c,0x7c]
 
-v_cmp_gt_i16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x8c,0x7c]
 
-v_cmp_gt_i16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x8c,0x7c]
 
-v_cmp_gt_i16 vcc_lo, s1, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x8d,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_gt_i16 vcc_lo, s105, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x68,0x7c]
+v_cmp_ge_i64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xac,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x68,0x7c]
+v_cmp_ge_i64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xac,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x68,0x7c]
+v_cmp_ge_i64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xac,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x68,0x7c]
+v_cmp_ge_i64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xac,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, m0, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x68,0x7c]
+v_cmp_ge_i64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xac,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x68,0x7c]
+v_cmp_ge_i64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xac,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x68,0x7c]
+v_cmp_ge_i64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xac,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, null, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x68,0x7c]
+v_cmp_ge_i64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xac,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, -1, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x68,0x7c]
+v_cmp_ge_i64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xac,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x68,0x7c]
+v_cmp_ge_i64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xac,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x68,0x7c]
+v_cmp_ge_i64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ge_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xac,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ge_i64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ge_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1.l, v2.l
+v_cmp_ge_i64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x68,0x7c]
+// W64: v_cmp_ge_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xac,0x7c]
 
-v_cmp_gt_i16 vcc, v127.l, v2.l
+v_cmp_ge_i64 vcc, v[254:255], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x68,0x7c]
+// W64: v_cmp_ge_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xac,0x7c]
 
-v_cmp_gt_i16 vcc, s1, v2.l
+v_cmp_ge_i64 vcc, s[2:3], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x68,0x7c]
+// W64: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xac,0x7c]
 
-v_cmp_gt_i16 vcc, s105, v2.l
+v_cmp_ge_i64 vcc, s[104:105], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x68,0x7c]
+// W64: v_cmp_ge_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xac,0x7c]
 
-v_cmp_gt_i16 vcc, vcc_lo, v2.l
+v_cmp_ge_i64 vcc, vcc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x68,0x7c]
+// W64: v_cmp_ge_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xac,0x7c]
 
-v_cmp_gt_i16 vcc, vcc_hi, v2.l
+v_cmp_ge_i64 vcc, ttmp[14:15], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x68,0x7c]
+// W64: v_cmp_ge_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xac,0x7c]
 
-v_cmp_gt_i16 vcc, ttmp15, v2.l
+v_cmp_ge_i64 vcc, exec, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x68,0x7c]
+// W64: v_cmp_ge_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xac,0x7c]
 
-v_cmp_gt_i16 vcc, m0, v2.l
+v_cmp_ge_i64 vcc, null, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x68,0x7c]
+// W64: v_cmp_ge_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xac,0x7c]
 
-v_cmp_gt_i16 vcc, exec_lo, v2.l
+v_cmp_ge_i64 vcc, -1, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x68,0x7c]
+// W64: v_cmp_ge_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xac,0x7c]
 
-v_cmp_gt_i16 vcc, exec_hi, v2.l
+v_cmp_ge_i64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x68,0x7c]
+// W64: v_cmp_ge_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xac,0x7c]
 
-v_cmp_gt_i16 vcc, null, v2.l
+v_cmp_ge_i64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x68,0x7c]
+// W64: v_cmp_ge_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xac,0x7c]
 
-v_cmp_gt_i16 vcc, -1, v2.l
+v_cmp_ge_i64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x68,0x7c]
+// W64: v_cmp_ge_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_gt_i16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_i16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_gt_i16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x68,0x7c]
+v_cmp_ge_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x68,0x7c]
-
-v_cmp_gt_i16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x68,0x7c]
+v_cmp_ge_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x68,0x7c]
-
-v_cmp_gt_i16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x69,0x7c]
+v_cmp_ge_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x69,0x7c]
-
-v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ge_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_i32 vcc_lo, v1, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x88,0x7c]
+v_cmp_ge_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v255, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x88,0x7c]
+v_cmp_ge_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, s1, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x88,0x7c]
+v_cmp_ge_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, s105, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x88,0x7c]
+v_cmp_ge_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x88,0x7c]
+v_cmp_ge_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x88,0x7c]
+v_cmp_ge_u16 vcc_lo, null, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, ttmp15, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x88,0x7c]
+v_cmp_ge_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, m0, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x88,0x7c]
+v_cmp_ge_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, exec_lo, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x88,0x7c]
+v_cmp_ge_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, exec_hi, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x88,0x7c]
+v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, null, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc_lo, -1, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc_lo, 0.5, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc_lo, src_scc, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_gt_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x89,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc, v1, v2
+v_cmp_ge_u16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc, v255, v2
+v_cmp_ge_u16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc, s1, v2
+v_cmp_ge_u16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc, s105, v2
+v_cmp_ge_u16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc, vcc_lo, v2
+v_cmp_ge_u16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc, vcc_hi, v2
+v_cmp_ge_u16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc, ttmp15, v2
+v_cmp_ge_u16 vcc, -1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc, m0, v2
+v_cmp_ge_u16 vcc, 0.5, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc, exec_lo, v2
+v_cmp_ge_u16 vcc, src_scc, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc, exec_hi, v2
+v_cmp_ge_u16 vcc, 0xfe0b, v127.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_gt_i32 vcc, null, v2
+v_cmp_ge_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, 0x3800, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
 
-v_cmp_gt_i32 vcc, -1, v2
+v_cmp_ge_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.h, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc, 0.5, v2
+v_cmp_ge_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v127.h, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7c,0x7c]
 
-v_cmp_gt_i32 vcc, src_scc, v2
+v_cmp_ge_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7d,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, src_scc, v2.h
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x88,0x7c]
+// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7d,0x7c]
 
-v_cmp_gt_i32 vcc, 0xaf123456, v255
+v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, 0xfe0b, v127.h
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x89,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_gt_i64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, v1, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, v255, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, s1, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, s105, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc_lo, null, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, m0, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, null, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_gt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_ge_u32 vcc_lo, -1, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x9c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_ge_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x9c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa8,0x7c]
+v_cmp_ge_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ge_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x9d,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i64 vcc, s[104:105], v[2:3]
+v_cmp_ge_u32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa8,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x9c,0x7c]
 
-v_cmp_gt_i64 vcc, vcc, v[2:3]
+v_cmp_ge_u32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa8,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x9c,0x7c]
 
-v_cmp_gt_i64 vcc, ttmp[14:15], v[2:3]
+v_cmp_ge_u32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa8,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x9c,0x7c]
 
-v_cmp_gt_i64 vcc, exec, v[2:3]
+v_cmp_ge_u32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa8,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x9c,0x7c]
 
-v_cmp_gt_i64 vcc, null, v[2:3]
+v_cmp_ge_u32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa8,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x9c,0x7c]
 
-v_cmp_gt_i64 vcc, -1, v[2:3]
+v_cmp_ge_u32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa8,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x9c,0x7c]
 
-v_cmp_gt_i64 vcc, 0.5, v[2:3]
+v_cmp_ge_u32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa8,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x9c,0x7c]
 
-v_cmp_gt_i64 vcc, src_scc, v[2:3]
+v_cmp_ge_u32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa8,0x7c]
+// W64: v_cmp_ge_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x9c,0x7c]
 
-v_cmp_gt_i64 vcc, 0xaf123456, v[254:255]
+v_cmp_ge_u32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_ge_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x9c,0x7c]
+
+v_cmp_ge_u32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x9d,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ge_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ge_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xbc,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ge_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xbc,0x7c]
+
+v_cmp_ge_u64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ge_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_gt_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, null, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x08,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x08,0x7c]
+
+v_cmp_gt_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x08,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x08,0x7c]
+
+v_cmp_gt_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_gt_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x08,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x08,0x7c]
+
+v_cmp_gt_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_gt_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x09,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x09,0x7c]
+
+v_cmp_gt_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_gt_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x09,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x09,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_f32 vcc_lo, v1, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, v255, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, s1, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, s105, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, m0, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, null, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, -1, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_gt_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x28,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_gt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x29,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x28,0x7c]
+
+v_cmp_gt_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x29,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_gt_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_gt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x48,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_gt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x48,0x7c]
+
+v_cmp_gt_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, null, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x68,0x7c]
+
+v_cmp_gt_i16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_gt_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x68,0x7c]
+
+v_cmp_gt_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x68,0x7c]
+
+v_cmp_gt_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x69,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x69,0x7c]
+
+v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_i32 vcc_lo, v1, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v255, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, s1, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, s105, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, ttmp15, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, m0, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, exec_lo, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, exec_hi, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, null, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, -1, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, 0.5, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, src_scc, v2
+// W32: v_cmp_gt_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x88,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_gt_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x89,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x88,0x7c]
+
+v_cmp_gt_i32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x89,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_gt_i64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, null, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_gt_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_gt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa8,0x7c]
+
+v_cmp_gt_i64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
 
 v_cmp_gt_u16 vcc_lo, v1.l, v2.l
 // W32: v_cmp_gt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, null, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x78,0x7c]
+
+v_cmp_gt_u16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_gt_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x78,0x7c]
+
+v_cmp_gt_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x78,0x7c]
+
+v_cmp_gt_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x79,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x79,0x7c]
+
+v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_gt_u32 vcc_lo, v1, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, v255, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, s1, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, s105, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, ttmp15, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, m0, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, null, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, -1, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_gt_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x98,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_gt_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x99,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x98,0x7c]
+
+v_cmp_gt_u32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x99,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_gt_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, null, v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_gt_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb8,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_gt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb8,0x7c]
+
+v_cmp_gt_u64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_gt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_le_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, null, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_le_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x06,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x06,0x7c]
+
+v_cmp_le_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x06,0x7c]
+
+v_cmp_le_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x06,0x7c]
+
+v_cmp_le_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x06,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_le_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x06,0x7c]
+
+v_cmp_le_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_le_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x06,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x06,0x7c]
+
+v_cmp_le_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_le_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x07,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x07,0x7c]
+
+v_cmp_le_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_le_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x07,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x07,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_le_f32 vcc_lo, v1, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, v255, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, s1, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, s105, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, m0, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, null, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, -1, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_le_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x26,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_le_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x27,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x26,0x7c]
+
+v_cmp_le_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x26,0x7c]
+
+v_cmp_le_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x26,0x7c]
+
+v_cmp_le_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x27,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_le_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_le_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x46,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_le_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x47,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x46,0x7c]
+
+v_cmp_le_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x46,0x7c]
+
+v_cmp_le_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x46,0x7c]
+
+v_cmp_le_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x47,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_le_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, null, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x66,0x7c]
+
+v_cmp_le_i16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x66,0x7c]
+
+v_cmp_le_i16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x66,0x7c]
+
+v_cmp_le_i16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_le_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_le_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x66,0x7c]
+
+v_cmp_le_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x66,0x7c]
+
+v_cmp_le_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x67,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x67,0x7c]
+
+v_cmp_le_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_le_i32 vcc_lo, v1, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, v255, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, s1, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, s105, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, ttmp15, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, m0, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, exec_lo, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, exec_hi, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, null, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, -1, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, 0.5, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, src_scc, v2
+// W32: v_cmp_le_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x86,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_le_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x87,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x86,0x7c]
+
+v_cmp_le_i32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x86,0x7c]
+
+v_cmp_le_i32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x86,0x7c]
+
+v_cmp_le_i32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x87,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_le_i64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, null, v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_le_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_le_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa6,0x7c]
+
+v_cmp_le_i64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_le_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, null, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x76,0x7c]
+
+v_cmp_le_u16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x76,0x7c]
+
+v_cmp_le_u16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x76,0x7c]
+
+v_cmp_le_u16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_le_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_le_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x76,0x7c]
+
+v_cmp_le_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x76,0x7c]
+
+v_cmp_le_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x77,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x77,0x7c]
+
+v_cmp_le_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_le_u32 vcc_lo, v1, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, v255, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, s1, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, s105, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, ttmp15, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, m0, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, null, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, -1, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_le_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x96,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_le_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x97,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x96,0x7c]
+
+v_cmp_le_u32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x96,0x7c]
+
+v_cmp_le_u32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x96,0x7c]
+
+v_cmp_le_u32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x97,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_le_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, null, v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_le_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb6,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_le_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb6,0x7c]
+
+v_cmp_le_u64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_le_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lg_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, null, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x0a,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x0a,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lg_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_lg_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x0a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x0a,0x7c]
+
+v_cmp_lg_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_lg_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x0b,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x0b,0x7c]
+
+v_cmp_lg_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_lg_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x0b,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x0b,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lg_f32 vcc_lo, v1, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, v255, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, s1, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, s105, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, m0, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, null, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, -1, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_lg_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x2a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_lg_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x2b,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x2a,0x7c]
+
+v_cmp_lg_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x2b,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lg_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_lg_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x4a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_lg_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4b,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lg_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x4a,0x7c]
+
+v_cmp_lg_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lg_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4b,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lt_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, null, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x02,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x02,0x7c]
+
+v_cmp_lt_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x02,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lt_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x02,0x7c]
+
+v_cmp_lt_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_lt_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x02,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x02,0x7c]
+
+v_cmp_lt_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_lt_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x03,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x03,0x7c]
+
+v_cmp_lt_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_lt_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x03,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x03,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lt_f32 vcc_lo, v1, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, v255, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, s1, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, s105, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, m0, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, null, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, -1, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_lt_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x22,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_lt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x23,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x22,0x7c]
+
+v_cmp_lt_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x23,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lt_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_lt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x42,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_lt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x42,0x7c]
+
+v_cmp_lt_f64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, null, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x62,0x7c]
+
+v_cmp_lt_i16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lt_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_lt_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x62,0x7c]
+
+v_cmp_lt_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x62,0x7c]
+
+v_cmp_lt_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x63,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x63,0x7c]
+
+v_cmp_lt_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lt_i32 vcc_lo, v1, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, v255, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, s1, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, s105, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, ttmp15, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, m0, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, exec_lo, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, exec_hi, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, null, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, -1, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, 0.5, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, src_scc, v2
+// W32: v_cmp_lt_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x82,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_lt_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x83,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x82,0x7c]
+
+v_cmp_lt_i32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x83,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lt_i64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, null, v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_lt_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_lt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa2,0x7c]
+
+v_cmp_lt_i64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, null, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x72,0x7c]
+
+v_cmp_lt_u16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lt_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_lt_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x72,0x7c]
+
+v_cmp_lt_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x72,0x7c]
+
+v_cmp_lt_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x73,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x73,0x7c]
+
+v_cmp_lt_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_lt_u32 vcc_lo, v1, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, v255, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, s1, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, s105, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, ttmp15, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, m0, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, null, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, -1, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_lt_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x92,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_lt_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x93,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x92,0x7c]
+
+v_cmp_lt_u32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x93,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_lt_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, null, v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_lt_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb2,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_lt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb2,0x7c]
+
+v_cmp_lt_u64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_lt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, null, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ne_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_ne_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6a,0x7c]
+
+v_cmp_ne_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6b,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6b,0x7c]
+
+v_cmp_ne_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ne_i32 vcc_lo, v1, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, v255, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, s1, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, s105, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, m0, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, null, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, -1, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, 0.5, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, src_scc, v2
+// W32: v_cmp_ne_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x8a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ne_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x8b,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x8a,0x7c]
+
+v_cmp_ne_i32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x8b,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ne_i64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ne_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xaa,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ne_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xaa,0x7c]
+
+v_cmp_ne_i64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, null, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ne_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, 0x3800, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+
+v_cmp_ne_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7a,0x7c]
+
+v_cmp_ne_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7b,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7b,0x7c]
+
+v_cmp_ne_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_ne_u32 vcc_lo, v1, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, v255, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, s1, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, s105, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, m0, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, null, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, -1, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, 0.5, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, src_scc, v2
+// W32: v_cmp_ne_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x9a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ne_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x9b,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x9a,0x7c]
+
+v_cmp_ne_u32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x9b,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_ne_u64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ne_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xba,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ne_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, src_scc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xba,0x7c]
+
+v_cmp_ne_u64 vcc, 0xaf123456, v[254:255]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ne_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_neq_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, null, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x1a,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc, v1.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, v127.l, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, vcc_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, ttmp15, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, exec_lo, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, null, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, 0.5, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc, 0xfe0b, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x1a,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_neq_f16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, v1.h, v2.l    ; encoding: [0x81,0x05,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc, v1.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, v1.h, v2.l       ; encoding: [0x81,0x05,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_neq_f16_e32 vcc_lo, v127.h, v2.l  ; encoding: [0xff,0x05,0x1a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc, v127.h, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, v127.h, v2.l     ; encoding: [0xff,0x05,0x1a,0x7c]
+
+v_cmp_neq_f16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_neq_f16_e32 vcc_lo, src_scc, v2.h ; encoding: [0xfd,0x04,0x1b,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc, src_scc, v2.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, src_scc, v2.h    ; encoding: [0xfd,0x04,0x1b,0x7c]
+
+v_cmp_neq_f16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_neq_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x1b,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f16 vcc, 0xfe0b, v127.h
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, 0xfe0b, v127.h   ; encoding: [0xff,0xfe,0x1b,0x7c,0x0b,0xfe,0x00,0x00]
+
+v_cmp_neq_f16 vcc, 0.5, v127.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f16_e32 vcc, 0.5, v127.l      ; encoding: [0xf0,0xfe,0x1a,0x7c]
+
+v_cmp_neq_f32 vcc_lo, v1, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, v255, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, s1, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, s105, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, m0, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x3a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f32 vcc_lo, null, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, s1, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x78,0x7c]
+v_cmp_neq_f32 vcc_lo, -1, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, s105, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x78,0x7c]
+v_cmp_neq_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x78,0x7c]
+v_cmp_neq_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_neq_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x3a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x78,0x7c]
+v_cmp_neq_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_neq_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3b,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x78,0x7c]
+v_cmp_neq_f32 vcc, v1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, v255, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, s1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, s105, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, vcc_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, vcc_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, ttmp15, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, m0, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, exec_lo, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, exec_hi, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, null, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, -1, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, 0.5, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, src_scc, v2
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x3a,0x7c]
+
+v_cmp_neq_f32 vcc, 0xaf123456, v255
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_neq_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3b,0x7c,0x56,0x34,0x12,0xaf]
+
+v_cmp_neq_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, m0, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x78,0x7c]
+v_cmp_neq_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x78,0x7c]
+v_cmp_neq_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x78,0x7c]
+v_cmp_neq_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, null, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x78,0x7c]
+v_cmp_neq_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, -1, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x78,0x7c]
+v_cmp_neq_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x78,0x7c]
+v_cmp_neq_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x78,0x7c]
+v_cmp_neq_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_neq_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x5a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1.l, v2.l
+v_cmp_neq_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x5a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_neq_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x5a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_neq_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_neq_f64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x78,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x5a,0x7c]
 
-v_cmp_gt_u16 vcc, v127.l, v2.l
+v_cmp_neq_f64 vcc, v[254:255], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x78,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5a,0x7c]
 
-v_cmp_gt_u16 vcc, s1, v2.l
+v_cmp_neq_f64 vcc, s[2:3], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x78,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x5a,0x7c]
 
-v_cmp_gt_u16 vcc, s105, v2.l
+v_cmp_neq_f64 vcc, s[104:105], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x78,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5a,0x7c]
 
-v_cmp_gt_u16 vcc, vcc_lo, v2.l
+v_cmp_neq_f64 vcc, vcc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x78,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x5a,0x7c]
 
-v_cmp_gt_u16 vcc, vcc_hi, v2.l
+v_cmp_neq_f64 vcc, ttmp[14:15], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x78,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5a,0x7c]
 
-v_cmp_gt_u16 vcc, ttmp15, v2.l
+v_cmp_neq_f64 vcc, exec, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x78,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x5a,0x7c]
 
-v_cmp_gt_u16 vcc, m0, v2.l
+v_cmp_neq_f64 vcc, null, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x78,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x5a,0x7c]
 
-v_cmp_gt_u16 vcc, exec_lo, v2.l
+v_cmp_neq_f64 vcc, -1, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x78,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x5a,0x7c]
 
-v_cmp_gt_u16 vcc, exec_hi, v2.l
+v_cmp_neq_f64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x78,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x5a,0x7c]
 
-v_cmp_gt_u16 vcc, null, v2.l
+v_cmp_neq_f64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x78,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x5a,0x7c]
 
-v_cmp_gt_u16 vcc, -1, v2.l
+v_cmp_neq_f64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x78,0x7c]
+// W64: v_cmp_neq_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_gt_u16 vcc, 0.5, v2.l
+v_cmp_nge_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, null, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x12,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_nge_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x12,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x78,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x12,0x7c]
 
-v_cmp_gt_u16 vcc, src_scc, v2.l
+v_cmp_nge_f16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x78,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x12,0x7c]
 
-v_cmp_gt_u16 vcc, 0xfe0b, v127.l
+v_cmp_nge_f16 vcc, s1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, s105, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x12,0x7c]
+
+v_cmp_nge_f16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_nge_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x12,0x7c]
 
-v_cmp_gt_u16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_nge_f16 vcc, vcc_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x12,0x7c]
 
-v_cmp_gt_u16 vcc, 0x3800, v2.l
+v_cmp_nge_f16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+// W64: v_cmp_nge_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x12,0x7c]
 
-v_cmp_gt_u16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_nge_f16 vcc, m0, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x12,0x7c]
 
-v_cmp_gt_u16 vcc, v1.h, v2.l
+v_cmp_nge_f16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x78,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x12,0x7c]
 
-v_cmp_gt_u16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_nge_f16 vcc, exec_hi, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x12,0x7c]
 
-v_cmp_gt_u16 vcc, v127.h, v2.l
+v_cmp_nge_f16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x78,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x12,0x7c]
 
-v_cmp_gt_u16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x79,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_nge_f16 vcc, -1, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x12,0x7c]
 
-v_cmp_gt_u16 vcc, src_scc, v2.h
+v_cmp_nge_f16 vcc, 0.5, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x79,0x7c]
+// W64: v_cmp_nge_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x12,0x7c]
 
-v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_nge_f16 vcc, src_scc, v2.l
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x12,0x7c]
 
-v_cmp_gt_u16 vcc, 0xfe0b, v127.h
+v_cmp_nge_f16 vcc, 0xfe0b, v127.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_nge_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x12,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_gt_u32 vcc_lo, v1, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, v1, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, v255, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, v255, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, s1, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, s1, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, s105, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, s105, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, ttmp15, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, m0, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, m0, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, null, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, null, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, -1, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, -1, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x98,0x7c]
+v_cmp_nge_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_nge_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x32,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_gt_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x99,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_nge_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_nge_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x33,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u32 vcc, v1, v2
+v_cmp_nge_f32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, v255, v2
+v_cmp_nge_f32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, s1, v2
+v_cmp_nge_f32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, s105, v2
+v_cmp_nge_f32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, vcc_lo, v2
+v_cmp_nge_f32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, vcc_hi, v2
+v_cmp_nge_f32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, ttmp15, v2
+v_cmp_nge_f32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, m0, v2
+v_cmp_nge_f32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, exec_lo, v2
+v_cmp_nge_f32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, exec_hi, v2
+v_cmp_nge_f32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, null, v2
+v_cmp_nge_f32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, -1, v2
+v_cmp_nge_f32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, 0.5, v2
+v_cmp_nge_f32 vcc, 0.5, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, src_scc, v2
+v_cmp_nge_f32 vcc, src_scc, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x98,0x7c]
+// W64: v_cmp_nge_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x32,0x7c]
 
-v_cmp_gt_u32 vcc, 0xaf123456, v255
+v_cmp_nge_f32 vcc, 0xaf123456, v255
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x99,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_nge_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x33,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_gt_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb8,0x7c]
+v_cmp_nge_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb8,0x7c]
+v_cmp_nge_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb8,0x7c]
+v_cmp_nge_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb8,0x7c]
+v_cmp_nge_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb8,0x7c]
+v_cmp_nge_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb8,0x7c]
+v_cmp_nge_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x52,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u64 vcc_lo, exec, v[2:3]
-// W3
+v_cmp_nge_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_nge_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x52,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_nge_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nge_f64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xba,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x52,0x7c]
+
+v_cmp_nge_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nge_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x52,0x7c]
 
-v_cmp_ne_u64 vcc, 0.5, v[2:3]
+v_cmp_nge_f64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xba,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x52,0x7c]
 
-v_cmp_ne_u64 vcc, src_scc, v[2:3]
+v_cmp_nge_f64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xba,0x7c]
+// W64: v_cmp_nge_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x52,0x7c]
 
-v_cmp_ne_u64 vcc, 0xaf123456, v[254:255]
+v_cmp_nge_f64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_nge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_neq_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, null, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, null, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x1a,0x7c]
+v_cmp_ngt_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x16,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x1a,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ngt_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ngt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x16,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, vcc_hi, v2.l
+v_cmp_ngt_f16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x1a,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, ttmp15, v2.l
+v_cmp_ngt_f16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x1a,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, m0, v2.l
+v_cmp_ngt_f16 vcc, s1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x1a,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, exec_lo, v2.l
+v_cmp_ngt_f16 vcc, s105, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x1a,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, exec_hi, v2.l
+v_cmp_ngt_f16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x1a,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, null, v2.l
+v_cmp_ngt_f16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x1a,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, -1, v2.l
+v_cmp_ngt_f16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x1a,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, 0.5, v2.l
+v_cmp_ngt_f16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x1a,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, src_scc, v2.l
+v_cmp_ngt_f16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x1a,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, 0xfe0b, v127.l
+v_cmp_ngt_f16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x1a,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_neq_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, v1.h, v2.l    ; encoding: [0x81,0x05,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, v1.h, v2.l
+v_cmp_ngt_f16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, v1.h, v2.l       ; encoding: [0x81,0x05,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, v127.h, v2.l  ; encoding: [0xff,0x05,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, v127.h, v2.l
+v_cmp_ngt_f16 vcc, -1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, v127.h, v2.l     ; encoding: [0xff,0x05,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_neq_f16_e32 vcc_lo, src_scc, v2.h ; encoding: [0xfd,0x04,0x1b,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, src_scc, v2.h
+v_cmp_ngt_f16 vcc, 0.5, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, src_scc, v2.h    ; encoding: [0xfd,0x04,0x1b,0x7c]
-
-v_cmp_neq_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_neq_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x1b,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_ngt_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, 0xfe0b, v127.h
+v_cmp_ngt_f16 vcc, src_scc, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, 0xfe0b, v127.h   ; encoding: [0xff,0xfe,0x1b,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_ngt_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x16,0x7c]
 
-v_cmp_neq_f16 vcc, 0.5, v127.l
+v_cmp_ngt_f16 vcc, 0xfe0b, v127.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, 0.5, v127.l      ; encoding: [0xf0,0xfe,0x1a,0x7c]
+// W64: v_cmp_ngt_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x16,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_neq_f32 vcc_lo, v1, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, v1, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, v255, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, v255, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, s1, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, s1, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, s105, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, s105, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, m0, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, m0, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, null, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, null, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, -1, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, -1, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x3a,0x7c]
+v_cmp_ngt_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_ngt_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x36,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_neq_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3b,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_ngt_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_ngt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x37,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f32 vcc, v1, v2
+v_cmp_ngt_f32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, v255, v2
+v_cmp_ngt_f32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, s1, v2
+v_cmp_ngt_f32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, s105, v2
+v_cmp_ngt_f32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, vcc_lo, v2
+v_cmp_ngt_f32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, vcc_hi, v2
+v_cmp_ngt_f32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, ttmp15, v2
+v_cmp_ngt_f32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, m0, v2
+v_cmp_ngt_f32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, exec_lo, v2
+v_cmp_ngt_f32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, exec_hi, v2
+v_cmp_ngt_f32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, null, v2
+v_cmp_ngt_f32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, -1, v2
+v_cmp_ngt_f32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, 0.5, v2
+v_cmp_ngt_f32 vcc, 0.5, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, src_scc, v2
+v_cmp_ngt_f32 vcc, src_scc, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x3a,0x7c]
+// W64: v_cmp_ngt_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x36,0x7c]
 
-v_cmp_neq_f32 vcc, 0xaf123456, v255
+v_cmp_ngt_f32 vcc, 0xaf123456, v255
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3b,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_ngt_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x37,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_neq_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x5a,0x7c]
+v_cmp_ngt_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5a,0x7c]
+v_cmp_ngt_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x5a,0x7c]
+v_cmp_ngt_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5a,0x7c]
+v_cmp_ngt_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x5a,0x7c]
+v_cmp_ngt_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5a,0x7c]
+v_cmp_ngt_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x5a,0x7c]
+v_cmp_ngt_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x5a,0x7c]
+v_cmp_ngt_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x5a,0x7c]
+v_cmp_ngt_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x5a,0x7c]
+v_cmp_ngt_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x5a,0x7c]
+v_cmp_ngt_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x56,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_neq_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_ngt_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_ngt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_neq_f64 vcc, v[1:2], v[2:3]
+v_cmp_ngt_f64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x5a,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x56,0x7c]
 
-v_cmp_neq_f64 vcc, v[254:255], v[2:3]
+v_cmp_ngt_f64 vcc, v[254:255], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5a,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x56,0x7c]
 
-v_cmp_neq_f64 vcc, s[2:3], v[2:3]
+v_cmp_ngt_f64 vcc, s[2:3], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x5a,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x56,0x7c]
 
-v_cmp_neq_f64 vcc, s[104:105], v[2:3]
+v_cmp_ngt_f64 vcc, s[104:105], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5a,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x56,0x7c]
 
-v_cmp_neq_f64 vcc, vcc, v[2:3]
+v_cmp_ngt_f64 vcc, vcc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x5a,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x56,0x7c]
 
-v_cmp_neq_f64 vcc, ttmp[14:15], v[2:3]
+v_cmp_ngt_f64 vcc, ttmp[14:15], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5a,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x56,0x7c]
 
-v_cmp_neq_f64 vcc, exec, v[2:3]
+v_cmp_ngt_f64 vcc, exec, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x5a,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x56,0x7c]
 
-v_cmp_neq_f64 vcc, null, v[2:3]
+v_cmp_ngt_f64 vcc, null, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x5a,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x56,0x7c]
 
-v_cmp_neq_f64 vcc, -1, v[2:3]
+v_cmp_ngt_f64 vcc, -1, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x5a,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x56,0x7c]
 
-v_cmp_neq_f64 vcc, 0.5, v[2:3]
+v_cmp_ngt_f64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x5a,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x56,0x7c]
 
-v_cmp_neq_f64 vcc, src_scc, v[2:3]
+v_cmp_ngt_f64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x5a,0x7c]
+// W64: v_cmp_ngt_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x56,0x7c]
 
-v_cmp_neq_f64 vcc, 0xaf123456, v[254:255]
+v_cmp_ngt_f64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_ngt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_nge_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, null, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, null, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x12,0x7c]
+v_cmp_nle_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x18,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x12,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_nle_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_nle_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x18,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f16 vcc, v1.l, v2.l
+v_cmp_nle_f16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, v127.l, v2.l
+v_cmp_nle_f16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, s1, v2.l
+v_cmp_nle_f16 vcc, s1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, s105, v2.l
+v_cmp_nle_f16 vcc, s105, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, vcc_lo, v2.l
+v_cmp_nle_f16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, vcc_hi, v2.l
+v_cmp_nle_f16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, ttmp15, v2.l
+v_cmp_nle_f16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, m0, v2.l
+v_cmp_nle_f16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, exec_lo, v2.l
+v_cmp_nle_f16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, exec_hi, v2.l
+v_cmp_nle_f16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, null, v2.l
+v_cmp_nle_f16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, -1, v2.l
+v_cmp_nle_f16 vcc, -1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, 0.5, v2.l
+v_cmp_nle_f16 vcc, 0.5, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, src_scc, v2.l
+v_cmp_nle_f16 vcc, src_scc, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x12,0x7c]
+// W64: v_cmp_nle_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x18,0x7c]
 
-v_cmp_nge_f16 vcc, 0xfe0b, v127.l
+v_cmp_nle_f16 vcc, 0xfe0b, v127.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x12,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_nle_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x18,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_nge_f32 vcc_lo, v1, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, v1, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, v255, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, v255, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, s1, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, s1, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, s105, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, s105, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, m0, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, m0, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, null, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, null, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, -1, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, -1, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x32,0x7c]
+v_cmp_nle_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_nle_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x38,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_nge_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x33,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_nle_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_nle_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x39,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f32 vcc, v1, v2
+v_cmp_nle_f32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, v255, v2
+v_cmp_nle_f32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, s1, v2
+v_cmp_nle_f32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, s105, v2
+v_cmp_nle_f32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, vcc_lo, v2
+v_cmp_nle_f32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, vcc_hi, v2
+v_cmp_nle_f32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, ttmp15, v2
+v_cmp_nle_f32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, m0, v2
+v_cmp_nle_f32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, exec_lo, v2
+v_cmp_nle_f32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, exec_hi, v2
+v_cmp_nle_f32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, null, v2
+v_cmp_nle_f32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, -1, v2
+v_cmp_nle_f32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, 0.5, v2
+v_cmp_nle_f32 vcc, 0.5, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, src_scc, v2
+v_cmp_nle_f32 vcc, src_scc, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x32,0x7c]
+// W64: v_cmp_nle_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x38,0x7c]
 
-v_cmp_nge_f32 vcc, 0xaf123456, v255
+v_cmp_nle_f32 vcc, 0xaf123456, v255
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x33,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_nle_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x39,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_nge_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x52,0x7c]
+v_cmp_nle_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x52,0x7c]
+v_cmp_nle_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x52,0x7c]
+v_cmp_nle_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x52,0x7c]
+v_cmp_nle_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x52,0x7c]
+v_cmp_nle_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x52,0x7c]
+v_cmp_nle_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x52,0x7c]
+v_cmp_nle_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x52,0x7c]
+v_cmp_nle_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x52,0x7c]
+v_cmp_nle_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x52,0x7c]
+v_cmp_nle_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x52,0x7c]
+v_cmp_nle_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_nle_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x58,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_nge_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_nle_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_nle_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x59,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nge_f64 vcc, v[1:2], v[2:3]
+v_cmp_nle_f64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x52,0x7c]
+// W64: v_cmp_nle_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x58,0x7c]
 
-v_cmp_nge_f64 vcc, v[254:255], v[2:3]
+v_cmp_nle_f64 vcc, v[254:255], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x52,0x7c]
+// W64: v_cmp_nle_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x58,0x7c]
 
-v_cmp_nge_f64 vcc, s[2:3], v[2:3]
+v_cmp_nle_f64 vcc, s[2:3], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x52,0x7c]
+// W64: v_cmp_nle_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x58,0x7c]
 
-v_cmp_nge_f64 vcc, s[104:105], v[2:3]
+v_cmp_nle_f64 vcc, s[104:105], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x52,0x7c]
+// W64: v_cmp_nle_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x58,0x7c]
 
-v_cmp_nge_f64 vcc, vcc, v[2:3]
+v_cmp_nle_f64 vcc, vcc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x52,0x7c]
+// W64: v_cmp_nle_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x58,0x7c]
 
-v_cmp_nge_f64 vcc, ttmp[14:15], v[2:3]
+v_cmp_nle_f64 vcc, ttmp[14:15], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x52,0x7c]
+// W64: v_cmp_nle_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x58,0x7c]
 
-v_cmp_nge_f64 vcc, exec, v[2:3]
+v_cmp_nle_f64 vcc, exec, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x52,0x7c]
+// W64: v_cmp_nle_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x58,0x7c]
 
-v_cmp_nge_f64 vcc, null, v[2:3]
+v_cmp_nle_f64 vcc, null, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x52,0x7c]
+// W64: v_cmp_nle_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x58,0x7c]
 
-v_cmp_nge_f64 vcc, -1, v[2:3]
+v_cmp_nle_f64 vcc, -1, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x52,0x7c]
+// W64: v_cmp_nle_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x58,0x7c]
 
-v_cmp_nge_f64 vcc, 0.5, v[2:3]
+v_cmp_nle_f64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x52,0x7c]
+// W64: v_cmp_nle_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x58,0x7c]
 
-v_cmp_nge_f64 vcc, src_scc, v[2:3]
+v_cmp_nle_f64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x52,0x7c]
+// W64: v_cmp_nle_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x58,0x7c]
 
-v_cmp_nge_f64 vcc, 0xaf123456, v[254:255]
+v_cmp_nle_f64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_nle_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x59,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_ngt_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, null, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, null, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x16,0x7c]
+v_cmp_nlg_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x14,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x16,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_nlg_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_nlg_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x14,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f16 vcc, v1.l, v2.l
+v_cmp_nlg_f16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, v127.l, v2.l
+v_cmp_nlg_f16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, s1, v2.l
+v_cmp_nlg_f16 vcc, s1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, s105, v2.l
+v_cmp_nlg_f16 vcc, s105, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, vcc_lo, v2.l
+v_cmp_nlg_f16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, vcc_hi, v2.l
+v_cmp_nlg_f16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, ttmp15, v2.l
+v_cmp_nlg_f16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, m0, v2.l
+v_cmp_nlg_f16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, exec_lo, v2.l
+v_cmp_nlg_f16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, exec_hi, v2.l
+v_cmp_nlg_f16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, null, v2.l
+v_cmp_nlg_f16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, -1, v2.l
+v_cmp_nlg_f16 vcc, -1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, 0.5, v2.l
+v_cmp_nlg_f16 vcc, 0.5, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, src_scc, v2.l
+v_cmp_nlg_f16 vcc, src_scc, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x16,0x7c]
+// W64: v_cmp_nlg_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x14,0x7c]
 
-v_cmp_ngt_f16 vcc, 0xfe0b, v127.l
+v_cmp_nlg_f16 vcc, 0xfe0b, v127.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x16,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_nlg_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x14,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_ngt_f32 vcc_lo, v1, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x36,0x7c]
+v_cmp_nlg_f32 vcc_lo, v1, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, v255, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x36,0x7c]
+v_cmp_nlg_f32 vcc_lo, v255, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, s1, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x36,0x7c]
+v_cmp_nlg_f32 vcc_lo, s1, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, s105, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x36,0x7c]
+v_cmp_nlg_f32 vcc_lo, s105, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x36,0x7c]
+v_cmp_nlg_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x36,0x7c]
+v_cmp_nlg_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x36,0x7c]
+v_cmp_nlg_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, m0, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x36,0x7c]
+v_cmp_nlg_f32 vcc_lo, m0, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x36,0x7c]
+
+v_cmp_nlg_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x36,0x7c]
+v_cmp_nlg_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, null, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x36,0x7c]
+v_cmp_nlg_f32 vcc_lo, null, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, -1, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x36,0x7c]
+v_cmp_nlg_f32 vcc_lo, -1, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x36,0x7c]
+v_cmp_nlg_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x36,0x7c]
+v_cmp_nlg_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_nlg_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x34,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ngt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x37,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_nlg_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_nlg_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x35,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f32 vcc, v1, v2
+v_cmp_nlg_f32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, v255, v2
+v_cmp_nlg_f32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, s1, v2
+v_cmp_nlg_f32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, s105, v2
+v_cmp_nlg_f32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, vcc_lo, v2
+v_cmp_nlg_f32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, vcc_hi, v2
+v_cmp_nlg_f32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, ttmp15, v2
+v_cmp_nlg_f32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, m0, v2
+v_cmp_nlg_f32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, exec_lo, v2
+v_cmp_nlg_f32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, exec_hi, v2
+v_cmp_nlg_f32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, null, v2
+v_cmp_nlg_f32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, -1, v2
+v_cmp_nlg_f32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, 0.5, v2
+v_cmp_nlg_f32 vcc, 0.5, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, src_scc, v2
+v_cmp_nlg_f32 vcc, src_scc, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x36,0x7c]
+// W64: v_cmp_nlg_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x34,0x7c]
 
-v_cmp_ngt_f32 vcc, 0xaf123456, v255
+v_cmp_nlg_f32 vcc, 0xaf123456, v255
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x37,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_nlg_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x35,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_ngt_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x56,0x7c]
+v_cmp_nlg_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x54,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x56,0x7c]
+v_cmp_nlg_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x54,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x56,0x7c]
+v_cmp_nlg_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x54,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x56,0x7c]
+v_cmp_nlg_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x54,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x56,0x7c]
+v_cmp_nlg_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x54,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x56,0x7c]
+v_cmp_nlg_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x54,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x56,0x7c]
+v_cmp_nlg_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x54,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x56,0x7c]
+v_cmp_nlg_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x54,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x56,0x7c]
+v_cmp_nlg_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x54,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x56,0x7c]
+v_cmp_nlg_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x54,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x56,0x7c]
+v_cmp_nlg_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x54,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_nlg_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_nlg_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x55,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ngt_f64 vcc, v[1:2], v[2:3]
+v_cmp_nlg_f64 vcc, v[1:2], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x56,0x7c]
+// W64: v_cmp_nlg_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x54,0x7c]
 
-v_cmp_ngt_f64 vcc, v[254:255], v[2:3]
+v_cmp_nlg_f64 vcc, v[254:255], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x56,0x7c]
+// W64: v_cmp_nlg_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x54,0x7c]
 
-v_cmp_ngt_f64 vcc, s[2:3], v[2:3]
+v_cmp_nlg_f64 vcc, s[2:3], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x56,0x7c]
+// W64: v_cmp_nlg_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x54,0x7c]
 
-v_cmp_ngt_f64 vcc, s[104:105], v[2:3]
+v_cmp_nlg_f64 vcc, s[104:105], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x56,0x7c]
+// W64: v_cmp_nlg_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x54,0x7c]
 
-v_cmp_ngt_f64 vcc, vcc, v[2:3]
+v_cmp_nlg_f64 vcc, vcc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x56,0x7c]
+// W64: v_cmp_nlg_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x54,0x7c]
 
-v_cmp_ngt_f64 vcc, ttmp[14:15], v[2:3]
+v_cmp_nlg_f64 vcc, ttmp[14:15], v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x56,0x7c]
+// W64: v_cmp_nlg_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x54,0x7c]
 
-v_cmp_ngt_f64 vcc, exec, v[2:3]
+v_cmp_nlg_f64 vcc, exec, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x56,0x7c]
+// W64: v_cmp_nlg_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x54,0x7c]
 
-v_cmp_ngt_f64 vcc, null, v[2:3]
+v_cmp_nlg_f64 vcc, null, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x56,0x7c]
+// W64: v_cmp_nlg_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x54,0x7c]
 
-v_cmp_ngt_f64 vcc, -1, v[2:3]
+v_cmp_nlg_f64 vcc, -1, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x56,0x7c]
+// W64: v_cmp_nlg_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x54,0x7c]
 
-v_cmp_ngt_f64 vcc, 0.5, v[2:3]
+v_cmp_nlg_f64 vcc, 0.5, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x56,0x7c]
+// W64: v_cmp_nlg_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x54,0x7c]
 
-v_cmp_ngt_f64 vcc, src_scc, v[2:3]
+v_cmp_nlg_f64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x56,0x7c]
+// W64: v_cmp_nlg_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x54,0x7c]
 
-v_cmp_ngt_f64 vcc, 0xaf123456, v[254:255]
+v_cmp_nlg_f64 vcc, 0xaf123456, v[254:255]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_nlg_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x55,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_nle_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, s1, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, s105, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, m0, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, null, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, null, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, -1, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x18,0x7c]
+v_cmp_nlt_f16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x1c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x18,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_nlt_f16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_nlt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x1c,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f16 vcc, v1.l, v2.l
+v_cmp_nlt_f16 vcc, v1.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, v127.l, v2.l
+v_cmp_nlt_f16 vcc, v127.l, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, s1, v2.l
+v_cmp_nlt_f16 vcc, s1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, s105, v2.l
+v_cmp_nlt_f16 vcc, s105, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, vcc_lo, v2.l
+v_cmp_nlt_f16 vcc, vcc_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, vcc_hi, v2.l
+v_cmp_nlt_f16 vcc, vcc_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, ttmp15, v2.l
+v_cmp_nlt_f16 vcc, ttmp15, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, m0, v2.l
+v_cmp_nlt_f16 vcc, m0, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, exec_lo, v2.l
+v_cmp_nlt_f16 vcc, exec_lo, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, exec_hi, v2.l
+v_cmp_nlt_f16 vcc, exec_hi, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, null, v2.l
+v_cmp_nlt_f16 vcc, null, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, -1, v2.l
+v_cmp_nlt_f16 vcc, -1, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, 0.5, v2.l
+v_cmp_nlt_f16 vcc, 0.5, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, src_scc, v2.l
+v_cmp_nlt_f16 vcc, src_scc, v2.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x18,0x7c]
+// W64: v_cmp_nlt_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x1c,0x7c]
 
-v_cmp_nle_f16 vcc, 0xfe0b, v127.l
+v_cmp_nlt_f16 vcc, 0xfe0b, v127.l
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x18,0x7c,0x0b,0xfe,0x00,0x00]
+// W64: v_cmp_nlt_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x1c,0x7c,0x0b,0xfe,0x00,0x00]
 
-v_cmp_nle_f32 vcc_lo, v1, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, v1, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, v255, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, v255, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, s1, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, s1, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, s105, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, s105, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, vcc_lo, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, vcc_hi, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, ttmp15, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, m0, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, m0, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, exec_lo, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, exec_hi, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, null, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, null, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, -1, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, -1, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, 0.5, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x38,0x7c]
+v_cmp_nlt_f32 vcc_lo, src_scc, v2
+// W32: v_cmp_nlt_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x3c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_nle_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x39,0x7c,0x56,0x34,0x12,0xaf]
+v_cmp_nlt_f32 vcc_lo, 0xaf123456, v255
+// W32: v_cmp_nlt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3d,0x7c,0x56,0x34,0x12,0xaf]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f32 vcc, v1, v2
+v_cmp_nlt_f32 vcc, v1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, v255, v2
+v_cmp_nlt_f32 vcc, v255, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, s1, v2
+v_cmp_nlt_f32 vcc, s1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, s105, v2
+v_cmp_nlt_f32 vcc, s105, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, vcc_lo, v2
+v_cmp_nlt_f32 vcc, vcc_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, vcc_hi, v2
+v_cmp_nlt_f32 vcc, vcc_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, ttmp15, v2
+v_cmp_nlt_f32 vcc, ttmp15, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, m0, v2
+v_cmp_nlt_f32 vcc, m0, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, exec_lo, v2
+v_cmp_nlt_f32 vcc, exec_lo, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, exec_hi, v2
+v_cmp_nlt_f32 vcc, exec_hi, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, null, v2
+v_cmp_nlt_f32 vcc, null, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, -1, v2
+v_cmp_nlt_f32 vcc, -1, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, 0.5, v2
+v_cmp_nlt_f32 vcc, 0.5, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, src_scc, v2
+v_cmp_nlt_f32 vcc, src_scc, v2
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x38,0x7c]
+// W64: v_cmp_nlt_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x3c,0x7c]
 
-v_cmp_nle_f32 vcc, 0xaf123456, v255
+v_cmp_nlt_f32 vcc, 0xaf123456, v255
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x39,0x7c,0x56,0x34,0x12,0xaf]
+// W64: v_cmp_nlt_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3d,0x7c,0x56,0x34,0x12,0xaf]
 
-v_cmp_nle_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x58,0x7c]
+v_cmp_nlt_f64 vcc_lo, v[1:2], v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x5c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x58,0x7c]
+v_cmp_nlt_f64 vcc_lo, v[254:255], v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x58,0x7c]
+v_cmp_nlt_f64 vcc_lo, s[2:3], v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x5c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x58,0x7c]
+v_cmp_nlt_f64 vcc_lo, s[104:105], v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x58,0x7c]
+v_cmp_nlt_f64 vcc_lo, vcc, v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x5c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x58,0x7c]
+v_cmp_nlt_f64 vcc_lo, ttmp[14:15], v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x58,0x7c]
+v_cmp_nlt_f64 vcc_lo, exec, v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x5c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x58,0x7c]
+v_cmp_nlt_f64 vcc_lo, null, v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x5c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_nle_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, -
+v_cmp_nlt_f64 vcc_lo, -1, v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, 0.5, v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, src_scc, v[2:3]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x5c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc_lo, 0xaf123456, v[254:255]
+// W32: v_cmp_nlt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5d,0x7c,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_nlt_f64 vcc, v[1:2], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, v[254:255], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, s[2:3], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, s[104:105], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, vcc, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, ttmp[14:15], v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, exec, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, null, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, -1, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, 0.5, v[2:3]
+// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+// W64: v_cmp_nlt_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x5c,0x7c]
+
+v_cmp_nlt_f64 vcc, src_scc, v[2:3]
 // W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 // W64: v_cmp_nlt_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x5c,0x7c]
 

>From c2ed046883abd9279f4f8bbbae7144bd4b7ea860 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 13:30:02 +0530
Subject: [PATCH 26/55] Update gfx12_asm_vopcx.s

---
 llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s | 1979 ++++++++++++++++++++++++-
 1 file changed, 1978 insertions(+), 1 deletion(-)

diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s b/llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
index 4fe9c30baff97..bbee8cc023c98 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
@@ -1754,4 +1754,1981 @@ v_cmpx_le_u32 -1, v2
 // GFX: v_cmpx_le_u32_e32 -1, v2                ; encoding: [0xc1,0x04,0x96,0x7d]
 
 v_cmpx_le_u32 0.5, v2
-// GFX: v_cmpx
+// GFX: v_cmpx_le_u32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x96,0x7d]
+
+v_cmpx_le_u32 src_scc, v2
+// GFX: v_cmpx_le_u32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x96,0x7d]
+
+v_cmpx_le_u32 0xaf123456, v255
+// GFX: v_cmpx_le_u32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x97,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_le_u64 v[1:2], v[2:3]
+// GFX: v_cmpx_le_u64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0xb6,0x7d]
+
+v_cmpx_le_u64 v[254:255], v[2:3]
+// GFX: v_cmpx_le_u64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0xb6,0x7d]
+
+v_cmpx_le_u64 s[2:3], v[2:3]
+// GFX: v_cmpx_le_u64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0xb6,0x7d]
+
+v_cmpx_le_u64 s[104:105], v[2:3]
+// GFX: v_cmpx_le_u64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0xb6,0x7d]
+
+v_cmpx_le_u64 vcc, v[2:3]
+// GFX: v_cmpx_le_u64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0xb6,0x7d]
+
+v_cmpx_le_u64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_le_u64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0xb6,0x7d]
+
+v_cmpx_le_u64 exec, v[2:3]
+// GFX: v_cmpx_le_u64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0xb6,0x7d]
+
+v_cmpx_le_u64 null, v[2:3]
+// GFX: v_cmpx_le_u64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0xb6,0x7d]
+
+v_cmpx_le_u64 -1, v[2:3]
+// GFX: v_cmpx_le_u64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0xb6,0x7d]
+
+v_cmpx_le_u64 0.5, v[2:3]
+// GFX: v_cmpx_le_u64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0xb6,0x7d]
+
+v_cmpx_le_u64 src_scc, v[2:3]
+// GFX: v_cmpx_le_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xb6,0x7d]
+
+v_cmpx_le_u64 0xaf123456, v[254:255]
+// GFX: v_cmpx_le_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_lg_f16 v1.l, v2.l
+// GFX: v_cmpx_lg_f16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x0a,0x7d]
+
+v_cmpx_lg_f16 v127.l, v2.l
+// GFX: v_cmpx_lg_f16_e32 v127.l, v2.l          ; encoding: [0x7f,0x05,0x0a,0x7d]
+
+v_cmpx_lg_f16 s1, v2.l
+// GFX: v_cmpx_lg_f16_e32 s1, v2.l              ; encoding: [0x01,0x04,0x0a,0x7d]
+
+v_cmpx_lg_f16 s105, v2.l
+// GFX: v_cmpx_lg_f16_e32 s105, v2.l            ; encoding: [0x69,0x04,0x0a,0x7d]
+
+v_cmpx_lg_f16 vcc_lo, v2.l
+// GFX: v_cmpx_lg_f16_e32 vcc_lo, v2.l          ; encoding: [0x6a,0x04,0x0a,0x7d]
+
+v_cmpx_lg_f16 vcc_hi, v2.l
+// GFX: v_cmpx_lg_f16_e32 vcc_hi, v2.l          ; encoding: [0x6b,0x04,0x0a,0x7d]
+
+v_cmpx_lg_f16 ttmp15, v2.l
+// GFX: v_cmpx_lg_f16_e32 ttmp15, v2.l          ; encoding: [0x7b,0x04,0x0a,0x7d]
+
+v_cmpx_lg_f16 m0, v2.l
+// GFX: v_cmpx_lg_f16_e32 m0, v2.l              ; encoding: [0x7d,0x04,0x0a,0x7d]
+
+v_cmpx_lg_f16 exec_lo, v2.l
+// GFX: v_cmpx_lg_f16_e32 exec_lo, v2.l         ; encoding: [0x7e,0x04,0x0a,0x7d]
+
+v_cmpx_lg_f16 exec_hi, v2.l
+// GFX: v_cmpx_lg_f16_e32 exec_hi, v2.l         ; encoding: [0x7f,0x04,0x0a,0x7d]
+
+v_cmpx_lg_f16 null, v2.l
+// GFX: v_cmpx_lg_f16_e32 null, v2.l            ; encoding: [0x7c,0x04,0x0a,0x7d]
+
+v_cmpx_lg_f16 -1, v2.l
+// GFX: v_cmpx_lg_f16_e32 -1, v2.l              ; encoding: [0xc1,0x04,0x0a,0x7d]
+
+v_cmpx_lg_f16 0.5, v2.l
+// GFX: v_cmpx_lg_f16_e32 0.5, v2.l             ; encoding: [0xf0,0x04,0x0a,0x7d]
+
+v_cmpx_lg_f16 src_scc, v2.l
+// GFX: v_cmpx_lg_f16_e32 src_scc, v2.l         ; encoding: [0xfd,0x04,0x0a,0x7d]
+
+v_cmpx_lg_f16 0xfe0b, v127.l
+// GFX: v_cmpx_lg_f16_e32 0xfe0b, v127.l        ; encoding: [0xff,0xfe,0x0a,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_lg_f16 v1.h, v2.l
+// GFX: v_cmpx_lg_f16_e32 v1.h, v2.l            ; encoding: [0x81,0x05,0x0a,0x7d]
+
+v_cmpx_lg_f16 v127.h, v2.l
+// GFX: v_cmpx_lg_f16_e32 v127.h, v2.l          ; encoding: [0xff,0x05,0x0a,0x7d]
+
+v_cmpx_lg_f16 src_scc, v2.h
+// GFX: v_cmpx_lg_f16_e32 src_scc, v2.h         ; encoding: [0xfd,0x04,0x0b,0x7d]
+
+v_cmpx_lg_f16 0xfe0b, v127.h
+// GFX: v_cmpx_lg_f16_e32 0xfe0b, v127.h        ; encoding: [0xff,0xfe,0x0b,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_lg_f32 v1, v2
+// GFX: v_cmpx_lg_f32_e32 v1, v2                ; encoding: [0x01,0x05,0x2a,0x7d]
+
+v_cmpx_lg_f32 v255, v2
+// GFX: v_cmpx_lg_f32_e32 v255, v2              ; encoding: [0xff,0x05,0x2a,0x7d]
+
+v_cmpx_lg_f32 s1, v2
+// GFX: v_cmpx_lg_f32_e32 s1, v2                ; encoding: [0x01,0x04,0x2a,0x7d]
+
+v_cmpx_lg_f32 s105, v2
+// GFX: v_cmpx_lg_f32_e32 s105, v2              ; encoding: [0x69,0x04,0x2a,0x7d]
+
+v_cmpx_lg_f32 vcc_lo, v2
+// GFX: v_cmpx_lg_f32_e32 vcc_lo, v2            ; encoding: [0x6a,0x04,0x2a,0x7d]
+
+v_cmpx_lg_f32 vcc_hi, v2
+// GFX: v_cmpx_lg_f32_e32 vcc_hi, v2            ; encoding: [0x6b,0x04,0x2a,0x7d]
+
+v_cmpx_lg_f32 ttmp15, v2
+// GFX: v_cmpx_lg_f32_e32 ttmp15, v2            ; encoding: [0x7b,0x04,0x2a,0x7d]
+
+v_cmpx_lg_f32 m0, v2
+// GFX: v_cmpx_lg_f32_e32 m0, v2                ; encoding: [0x7d,0x04,0x2a,0x7d]
+
+v_cmpx_lg_f32 exec_lo, v2
+// GFX: v_cmpx_lg_f32_e32 exec_lo, v2           ; encoding: [0x7e,0x04,0x2a,0x7d]
+
+v_cmpx_lg_f32 exec_hi, v2
+// GFX: v_cmpx_lg_f32_e32 exec_hi, v2           ; encoding: [0x7f,0x04,0x2a,0x7d]
+
+v_cmpx_lg_f32 null, v2
+// GFX: v_cmpx_lg_f32_e32 null, v2              ; encoding: [0x7c,0x04,0x2a,0x7d]
+
+v_cmpx_lg_f32 -1, v2
+// GFX: v_cmpx_lg_f32_e32 -1, v2                ; encoding: [0xc1,0x04,0x2a,0x7d]
+
+v_cmpx_lg_f32 0.5, v2
+// GFX: v_cmpx_lg_f32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x2a,0x7d]
+
+v_cmpx_lg_f32 src_scc, v2
+// GFX: v_cmpx_lg_f32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x2a,0x7d]
+
+v_cmpx_lg_f32 0xaf123456, v255
+// GFX: v_cmpx_lg_f32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x2b,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_lg_f64 v[1:2], v[2:3]
+// GFX: v_cmpx_lg_f64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0x4a,0x7d]
+
+v_cmpx_lg_f64 v[254:255], v[2:3]
+// GFX: v_cmpx_lg_f64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0x4a,0x7d]
+
+v_cmpx_lg_f64 s[2:3], v[2:3]
+// GFX: v_cmpx_lg_f64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0x4a,0x7d]
+
+v_cmpx_lg_f64 s[104:105], v[2:3]
+// GFX: v_cmpx_lg_f64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0x4a,0x7d]
+
+v_cmpx_lg_f64 vcc, v[2:3]
+// GFX: v_cmpx_lg_f64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0x4a,0x7d]
+
+v_cmpx_lg_f64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_lg_f64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0x4a,0x7d]
+
+v_cmpx_lg_f64 exec, v[2:3]
+// GFX: v_cmpx_lg_f64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0x4a,0x7d]
+
+v_cmpx_lg_f64 null, v[2:3]
+// GFX: v_cmpx_lg_f64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0x4a,0x7d]
+
+v_cmpx_lg_f64 -1, v[2:3]
+// GFX: v_cmpx_lg_f64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0x4a,0x7d]
+
+v_cmpx_lg_f64 0.5, v[2:3]
+// GFX: v_cmpx_lg_f64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0x4a,0x7d]
+
+v_cmpx_lg_f64 src_scc, v[2:3]
+// GFX: v_cmpx_lg_f64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0x4a,0x7d]
+
+v_cmpx_lg_f64 0xaf123456, v[254:255]
+// GFX: v_cmpx_lg_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4b,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_lt_f16 v1.l, v2.l
+// GFX: v_cmpx_lt_f16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x02,0x7d]
+
+v_cmpx_lt_f16 v127.l, v2.l
+// GFX: v_cmpx_lt_f16_e32 v127.l, v2.l          ; encoding: [0x7f,0x05,0x02,0x7d]
+
+v_cmpx_lt_f16 s1, v2.l
+// GFX: v_cmpx_lt_f16_e32 s1, v2.l              ; encoding: [0x01,0x04,0x02,0x7d]
+
+v_cmpx_lt_f16 s105, v2.l
+// GFX: v_cmpx_lt_f16_e32 s105, v2.l            ; encoding: [0x69,0x04,0x02,0x7d]
+
+v_cmpx_lt_f16 vcc_lo, v2.l
+// GFX: v_cmpx_lt_f16_e32 vcc_lo, v2.l          ; encoding: [0x6a,0x04,0x02,0x7d]
+
+v_cmpx_lt_f16 vcc_hi, v2.l
+// GFX: v_cmpx_lt_f16_e32 vcc_hi, v2.l          ; encoding: [0x6b,0x04,0x02,0x7d]
+
+v_cmpx_lt_f16 ttmp15, v2.l
+// GFX: v_cmpx_lt_f16_e32 ttmp15, v2.l          ; encoding: [0x7b,0x04,0x02,0x7d]
+
+v_cmpx_lt_f16 m0, v2.l
+// GFX: v_cmpx_lt_f16_e32 m0, v2.l              ; encoding: [0x7d,0x04,0x02,0x7d]
+
+v_cmpx_lt_f16 exec_lo, v2.l
+// GFX: v_cmpx_lt_f16_e32 exec_lo, v2.l         ; encoding: [0x7e,0x04,0x02,0x7d]
+
+v_cmpx_lt_f16 exec_hi, v2.l
+// GFX: v_cmpx_lt_f16_e32 exec_hi, v2.l         ; encoding: [0x7f,0x04,0x02,0x7d]
+
+v_cmpx_lt_f16 null, v2.l
+// GFX: v_cmpx_lt_f16_e32 null, v2.l            ; encoding: [0x7c,0x04,0x02,0x7d]
+
+v_cmpx_lt_f16 -1, v2.l
+// GFX: v_cmpx_lt_f16_e32 -1, v2.l              ; encoding: [0xc1,0x04,0x02,0x7d]
+
+v_cmpx_lt_f16 0.5, v2.l
+// GFX: v_cmpx_lt_f16_e32 0.5, v2.l             ; encoding: [0xf0,0x04,0x02,0x7d]
+
+v_cmpx_lt_f16 src_scc, v2.l
+// GFX: v_cmpx_lt_f16_e32 src_scc, v2.l         ; encoding: [0xfd,0x04,0x02,0x7d]
+
+v_cmpx_lt_f16 0xfe0b, v127.l
+// GFX: v_cmpx_lt_f16_e32 0xfe0b, v127.l        ; encoding: [0xff,0xfe,0x02,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_lt_f16 v1.h, v2.l
+// GFX: v_cmpx_lt_f16_e32 v1.h, v2.l            ; encoding: [0x81,0x05,0x02,0x7d]
+
+v_cmpx_lt_f16 v127.h, v2.l
+// GFX: v_cmpx_lt_f16_e32 v127.h, v2.l          ; encoding: [0xff,0x05,0x02,0x7d]
+
+v_cmpx_lt_f16 src_scc, v2.h
+// GFX: v_cmpx_lt_f16_e32 src_scc, v2.h         ; encoding: [0xfd,0x04,0x03,0x7d]
+
+v_cmpx_lt_f16 0xfe0b, v127.h
+// GFX: v_cmpx_lt_f16_e32 0xfe0b, v127.h        ; encoding: [0xff,0xfe,0x03,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_lt_f32 v1, v2
+// GFX: v_cmpx_lt_f32_e32 v1, v2                ; encoding: [0x01,0x05,0x22,0x7d]
+
+v_cmpx_lt_f32 v255, v2
+// GFX: v_cmpx_lt_f32_e32 v255, v2              ; encoding: [0xff,0x05,0x22,0x7d]
+
+v_cmpx_lt_f32 s1, v2
+// GFX: v_cmpx_lt_f32_e32 s1, v2                ; encoding: [0x01,0x04,0x22,0x7d]
+
+v_cmpx_lt_f32 s105, v2
+// GFX: v_cmpx_lt_f32_e32 s105, v2              ; encoding: [0x69,0x04,0x22,0x7d]
+
+v_cmpx_lt_f32 vcc_lo, v2
+// GFX: v_cmpx_lt_f32_e32 vcc_lo, v2            ; encoding: [0x6a,0x04,0x22,0x7d]
+
+v_cmpx_lt_f32 vcc_hi, v2
+// GFX: v_cmpx_lt_f32_e32 vcc_hi, v2            ; encoding: [0x6b,0x04,0x22,0x7d]
+
+v_cmpx_lt_f32 ttmp15, v2
+// GFX: v_cmpx_lt_f32_e32 ttmp15, v2            ; encoding: [0x7b,0x04,0x22,0x7d]
+
+v_cmpx_lt_f32 m0, v2
+// GFX: v_cmpx_lt_f32_e32 m0, v2                ; encoding: [0x7d,0x04,0x22,0x7d]
+
+v_cmpx_lt_f32 exec_lo, v2
+// GFX: v_cmpx_lt_f32_e32 exec_lo, v2           ; encoding: [0x7e,0x04,0x22,0x7d]
+
+v_cmpx_lt_f32 exec_hi, v2
+// GFX: v_cmpx_lt_f32_e32 exec_hi, v2           ; encoding: [0x7f,0x04,0x22,0x7d]
+
+v_cmpx_lt_f32 null, v2
+// GFX: v_cmpx_lt_f32_e32 null, v2              ; encoding: [0x7c,0x04,0x22,0x7d]
+
+v_cmpx_lt_f32 -1, v2
+// GFX: v_cmpx_lt_f32_e32 -1, v2                ; encoding: [0xc1,0x04,0x22,0x7d]
+
+v_cmpx_lt_f32 0.5, v2
+// GFX: v_cmpx_lt_f32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x22,0x7d]
+
+v_cmpx_lt_f32 src_scc, v2
+// GFX: v_cmpx_lt_f32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x22,0x7d]
+
+v_cmpx_lt_f32 0xaf123456, v255
+// GFX: v_cmpx_lt_f32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x23,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_lt_f64 v[1:2], v[2:3]
+// GFX: v_cmpx_lt_f64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0x42,0x7d]
+
+v_cmpx_lt_f64 v[254:255], v[2:3]
+// GFX: v_cmpx_lt_f64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0x42,0x7d]
+
+v_cmpx_lt_f64 s[2:3], v[2:3]
+// GFX: v_cmpx_lt_f64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0x42,0x7d]
+
+v_cmpx_lt_f64 s[104:105], v[2:3]
+// GFX: v_cmpx_lt_f64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0x42,0x7d]
+
+v_cmpx_lt_f64 vcc, v[2:3]
+// GFX: v_cmpx_lt_f64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0x42,0x7d]
+
+v_cmpx_lt_f64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_lt_f64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0x42,0x7d]
+
+v_cmpx_lt_f64 exec, v[2:3]
+// GFX: v_cmpx_lt_f64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0x42,0x7d]
+
+v_cmpx_lt_f64 null, v[2:3]
+// GFX: v_cmpx_lt_f64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0x42,0x7d]
+
+v_cmpx_lt_f64 -1, v[2:3]
+// GFX: v_cmpx_lt_f64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0x42,0x7d]
+
+v_cmpx_lt_f64 0.5, v[2:3]
+// GFX: v_cmpx_lt_f64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0x42,0x7d]
+
+v_cmpx_lt_f64 src_scc, v[2:3]
+// GFX: v_cmpx_lt_f64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0x42,0x7d]
+
+v_cmpx_lt_f64 0xaf123456, v[254:255]
+// GFX: v_cmpx_lt_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_lt_i16 v1.l, v2.l
+// GFX: v_cmpx_lt_i16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x62,0x7d]
+
+v_cmpx_lt_i16 v127.l, v2.l
+// GFX: v_cmpx_lt_i16_e32 v127.l, v2.l          ; encoding: [0x7f,0x05,0x62,0x7d]
+
+v_cmpx_lt_i16 s1, v2.l
+// GFX: v_cmpx_lt_i16_e32 s1, v2.l              ; encoding: [0x01,0x04,0x62,0x7d]
+
+v_cmpx_lt_i16 s105, v2.l
+// GFX: v_cmpx_lt_i16_e32 s105, v2.l            ; encoding: [0x69,0x04,0x62,0x7d]
+
+v_cmpx_lt_i16 vcc_lo, v2.l
+// GFX: v_cmpx_lt_i16_e32 vcc_lo, v2.l          ; encoding: [0x6a,0x04,0x62,0x7d]
+
+v_cmpx_lt_i16 vcc_hi, v2.l
+// GFX: v_cmpx_lt_i16_e32 vcc_hi, v2.l          ; encoding: [0x6b,0x04,0x62,0x7d]
+
+v_cmpx_lt_i16 ttmp15, v2.l
+// GFX: v_cmpx_lt_i16_e32 ttmp15, v2.l          ; encoding: [0x7b,0x04,0x62,0x7d]
+
+v_cmpx_lt_i16 m0, v2.l
+// GFX: v_cmpx_lt_i16_e32 m0, v2.l              ; encoding: [0x7d,0x04,0x62,0x7d]
+
+v_cmpx_lt_i16 exec_lo, v2.l
+// GFX: v_cmpx_lt_i16_e32 exec_lo, v2.l         ; encoding: [0x7e,0x04,0x62,0x7d]
+
+v_cmpx_lt_i16 exec_hi, v2.l
+// GFX: v_cmpx_lt_i16_e32 exec_hi, v2.l         ; encoding: [0x7f,0x04,0x62,0x7d]
+
+v_cmpx_lt_i16 null, v2.l
+// GFX: v_cmpx_lt_i16_e32 null, v2.l            ; encoding: [0x7c,0x04,0x62,0x7d]
+
+v_cmpx_lt_i16 -1, v2.l
+// GFX: v_cmpx_lt_i16_e32 -1, v2.l              ; encoding: [0xc1,0x04,0x62,0x7d]
+
+v_cmpx_lt_i16 0.5, v2.l
+// GFX: v_cmpx_lt_i16_e32 0.5, v2.l             ; encoding: [0xf0,0x04,0x62,0x7d]
+
+v_cmpx_lt_i16 src_scc, v2.l
+// GFX: v_cmpx_lt_i16_e32 src_scc, v2.l         ; encoding: [0xfd,0x04,0x62,0x7d]
+
+v_cmpx_lt_i16 0xfe0b, v127.l
+// GFX: v_cmpx_lt_i16_e32 0xfe0b, v127.l        ; encoding: [0xff,0xfe,0x62,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_lt_i16 v1.h, v2.l
+// GFX: v_cmpx_lt_i16_e32 v1.h, v2.l            ; encoding: [0x81,0x05,0x62,0x7d]
+
+v_cmpx_lt_i16 v127.h, v2.l
+// GFX: v_cmpx_lt_i16_e32 v127.h, v2.l          ; encoding: [0xff,0x05,0x62,0x7d]
+
+v_cmpx_lt_i16 src_scc, v2.h
+// GFX: v_cmpx_lt_i16_e32 src_scc, v2.h         ; encoding: [0xfd,0x04,0x63,0x7d]
+
+v_cmpx_lt_i16 0xfe0b, v127.h
+// GFX: v_cmpx_lt_i16_e32 0xfe0b, v127.h        ; encoding: [0xff,0xfe,0x63,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_lt_i32 v1, v2
+// GFX: v_cmpx_lt_i32_e32 v1, v2                ; encoding: [0x01,0x05,0x82,0x7d]
+
+v_cmpx_lt_i32 v255, v2
+// GFX: v_cmpx_lt_i32_e32 v255, v2              ; encoding: [0xff,0x05,0x82,0x7d]
+
+v_cmpx_lt_i32 s1, v2
+// GFX: v_cmpx_lt_i32_e32 s1, v2                ; encoding: [0x01,0x04,0x82,0x7d]
+
+v_cmpx_lt_i32 s105, v2
+// GFX: v_cmpx_lt_i32_e32 s105, v2              ; encoding: [0x69,0x04,0x82,0x7d]
+
+v_cmpx_lt_i32 vcc_lo, v2
+// GFX: v_cmpx_lt_i32_e32 vcc_lo, v2            ; encoding: [0x6a,0x04,0x82,0x7d]
+
+v_cmpx_lt_i32 vcc_hi, v2
+// GFX: v_cmpx_lt_i32_e32 vcc_hi, v2            ; encoding: [0x6b,0x04,0x82,0x7d]
+
+v_cmpx_lt_i32 ttmp15, v2
+// GFX: v_cmpx_lt_i32_e32 ttmp15, v2            ; encoding: [0x7b,0x04,0x82,0x7d]
+
+v_cmpx_lt_i32 m0, v2
+// GFX: v_cmpx_lt_i32_e32 m0, v2                ; encoding: [0x7d,0x04,0x82,0x7d]
+
+v_cmpx_lt_i32 exec_lo, v2
+// GFX: v_cmpx_lt_i32_e32 exec_lo, v2           ; encoding: [0x7e,0x04,0x82,0x7d]
+
+v_cmpx_lt_i32 exec_hi, v2
+// GFX: v_cmpx_lt_i32_e32 exec_hi, v2           ; encoding: [0x7f,0x04,0x82,0x7d]
+
+v_cmpx_lt_i32 null, v2
+// GFX: v_cmpx_lt_i32_e32 null, v2              ; encoding: [0x7c,0x04,0x82,0x7d]
+
+v_cmpx_lt_i32 -1, v2
+// GFX: v_cmpx_lt_i32_e32 -1, v2                ; encoding: [0xc1,0x04,0x82,0x7d]
+
+v_cmpx_lt_i32 0.5, v2
+// GFX: v_cmpx_lt_i32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x82,0x7d]
+
+v_cmpx_lt_i32 src_scc, v2
+// GFX: v_cmpx_lt_i32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x82,0x7d]
+
+v_cmpx_lt_i32 0xaf123456, v255
+// GFX: v_cmpx_lt_i32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x83,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_lt_i64 v[1:2], v[2:3]
+// GFX: v_cmpx_lt_i64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0xa2,0x7d]
+
+v_cmpx_lt_i64 v[254:255], v[2:3]
+// GFX: v_cmpx_lt_i64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0xa2,0x7d]
+
+v_cmpx_lt_i64 s[2:3], v[2:3]
+// GFX: v_cmpx_lt_i64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0xa2,0x7d]
+
+v_cmpx_lt_i64 s[104:105], v[2:3]
+// GFX: v_cmpx_lt_i64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0xa2,0x7d]
+
+v_cmpx_lt_i64 vcc, v[2:3]
+// GFX: v_cmpx_lt_i64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0xa2,0x7d]
+
+v_cmpx_lt_i64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_lt_i64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0xa2,0x7d]
+
+v_cmpx_lt_i64 exec, v[2:3]
+// GFX: v_cmpx_lt_i64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0xa2,0x7d]
+
+v_cmpx_lt_i64 null, v[2:3]
+// GFX: v_cmpx_lt_i64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0xa2,0x7d]
+
+v_cmpx_lt_i64 -1, v[2:3]
+// GFX: v_cmpx_lt_i64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0xa2,0x7d]
+
+v_cmpx_lt_i64 0.5, v[2:3]
+// GFX: v_cmpx_lt_i64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0xa2,0x7d]
+
+v_cmpx_lt_i64 src_scc, v[2:3]
+// GFX: v_cmpx_lt_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xa2,0x7d]
+
+v_cmpx_lt_i64 0xaf123456, v[254:255]
+// GFX: v_cmpx_lt_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_lt_u16 v1.l, v2.l
+// GFX: v_cmpx_lt_u16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x72,0x7d]
+
+v_cmpx_lt_u16 v127.l, v2.l
+// GFX: v_cmpx_lt_u16_e32 v127.l, v2.l          ; encoding: [0x7f,0x05,0x72,0x7d]
+
+v_cmpx_lt_u16 s1, v2.l
+// GFX: v_cmpx_lt_u16_e32 s1, v2.l              ; encoding: [0x01,0x04,0x72,0x7d]
+
+v_cmpx_lt_u16 s105, v2.l
+// GFX: v_cmpx_lt_u16_e32 s105, v2.l            ; encoding: [0x69,0x04,0x72,0x7d]
+
+v_cmpx_lt_u16 vcc_lo, v2.l
+// GFX: v_cmpx_lt_u16_e32 vcc_lo, v2.l          ; encoding: [0x6a,0x04,0x72,0x7d]
+
+v_cmpx_lt_u16 vcc_hi, v2.l
+// GFX: v_cmpx_lt_u16_e32 vcc_hi, v2.l          ; encoding: [0x6b,0x04,0x72,0x7d]
+
+v_cmpx_lt_u16 ttmp15, v2.l
+// GFX: v_cmpx_lt_u16_e32 ttmp15, v2.l          ; encoding: [0x7b,0x04,0x72,0x7d]
+
+v_cmpx_lt_u16 m0, v2.l
+// GFX: v_cmpx_lt_u16_e32 m0, v2.l              ; encoding: [0x7d,0x04,0x72,0x7d]
+
+v_cmpx_lt_u16 exec_lo, v2.l
+// GFX: v_cmpx_lt_u16_e32 exec_lo, v2.l         ; encoding: [0x7e,0x04,0x72,0x7d]
+
+v_cmpx_lt_u16 exec_hi, v2.l
+// GFX: v_cmpx_lt_u16_e32 exec_hi, v2.l         ; encoding: [0x7f,0x04,0x72,0x7d]
+
+v_cmpx_lt_u16 null, v2.l
+// GFX: v_cmpx_lt_u16_e32 null, v2.l            ; encoding: [0x7c,0x04,0x72,0x7d]
+
+v_cmpx_lt_u16 -1, v2.l
+// GFX: v_cmpx_lt_u16_e32 -1, v2.l              ; encoding: [0xc1,0x04,0x72,0x7d]
+
+v_cmpx_lt_u16 0.5, v2.l
+// GFX: v_cmpx_lt_u16_e32 0.5, v2.l             ; encoding: [0xf0,0x04,0x72,0x7d]
+
+v_cmpx_lt_u16 src_scc, v2.l
+// GFX: v_cmpx_lt_u16_e32 src_scc, v2.l         ; encoding: [0xfd,0x04,0x72,0x7d]
+
+v_cmpx_lt_u16 0xfe0b, v127.l
+// GFX: v_cmpx_lt_u16_e32 0xfe0b, v127.l        ; encoding: [0xff,0xfe,0x72,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_lt_u16 v1.h, v2.l
+// GFX: v_cmpx_lt_u16_e32 v1.h, v2.l            ; encoding: [0x81,0x05,0x72,0x7d]
+
+v_cmpx_lt_u16 v127.h, v2.l
+// GFX: v_cmpx_lt_u16_e32 v127.h, v2.l          ; encoding: [0xff,0x05,0x72,0x7d]
+
+v_cmpx_lt_u16 src_scc, v2.h
+// GFX: v_cmpx_lt_u16_e32 src_scc, v2.h         ; encoding: [0xfd,0x04,0x73,0x7d]
+
+v_cmpx_lt_u16 0xfe0b, v127.h
+// GFX: v_cmpx_lt_u16_e32 0xfe0b, v127.h        ; encoding: [0xff,0xfe,0x73,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_lt_u32 v1, v2
+// GFX: v_cmpx_lt_u32_e32 v1, v2                ; encoding: [0x01,0x05,0x92,0x7d]
+
+v_cmpx_lt_u32 v255, v2
+// GFX: v_cmpx_lt_u32_e32 v255, v2              ; encoding: [0xff,0x05,0x92,0x7d]
+
+v_cmpx_lt_u32 s1, v2
+// GFX: v_cmpx_lt_u32_e32 s1, v2                ; encoding: [0x01,0x04,0x92,0x7d]
+
+v_cmpx_lt_u32 s105, v2
+// GFX: v_cmpx_lt_u32_e32 s105, v2              ; encoding: [0x69,0x04,0x92,0x7d]
+
+v_cmpx_lt_u32 vcc_lo, v2
+// GFX: v_cmpx_lt_u32_e32 vcc_lo, v2            ; encoding: [0x6a,0x04,0x92,0x7d]
+
+v_cmpx_lt_u32 vcc_hi, v2
+// GFX: v_cmpx_lt_u32_e32 vcc_hi, v2            ; encoding: [0x6b,0x04,0x92,0x7d]
+
+v_cmpx_lt_u32 ttmp15, v2
+// GFX: v_cmpx_lt_u32_e32 ttmp15, v2            ; encoding: [0x7b,0x04,0x92,0x7d]
+
+v_cmpx_lt_u32 m0, v2
+// GFX: v_cmpx_lt_u32_e32 m0, v2                ; encoding: [0x7d,0x04,0x92,0x7d]
+
+v_cmpx_lt_u32 exec_lo, v2
+// GFX: v_cmpx_lt_u32_e32 exec_lo, v2           ; encoding: [0x7e,0x04,0x92,0x7d]
+
+v_cmpx_lt_u32 exec_hi, v2
+// GFX: v_cmpx_lt_u32_e32 exec_hi, v2           ; encoding: [0x7f,0x04,0x92,0x7d]
+
+v_cmpx_lt_u32 null, v2
+// GFX: v_cmpx_lt_u32_e32 null, v2              ; encoding: [0x7c,0x04,0x92,0x7d]
+
+v_cmpx_lt_u32 -1, v2
+// GFX: v_cmpx_lt_u32_e32 -1, v2                ; encoding: [0xc1,0x04,0x92,0x7d]
+
+v_cmpx_lt_u32 0.5, v2
+// GFX: v_cmpx_lt_u32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x92,0x7d]
+
+v_cmpx_lt_u32 src_scc, v2
+// GFX: v_cmpx_lt_u32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x92,0x7d]
+
+v_cmpx_lt_u32 0xaf123456, v255
+// GFX: v_cmpx_lt_u32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x93,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_lt_u64 v[1:2], v[2:3]
+// GFX: v_cmpx_lt_u64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0xb2,0x7d]
+
+v_cmpx_lt_u64 v[254:255], v[2:3]
+// GFX: v_cmpx_lt_u64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0xb2,0x7d]
+
+v_cmpx_lt_u64 s[2:3], v[2:3]
+// GFX: v_cmpx_lt_u64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0xb2,0x7d]
+
+v_cmpx_lt_u64 s[104:105], v[2:3]
+// GFX: v_cmpx_lt_u64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0xb2,0x7d]
+
+v_cmpx_lt_u64 vcc, v[2:3]
+// GFX: v_cmpx_lt_u64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0xb2,0x7d]
+
+v_cmpx_lt_u64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_lt_u64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0xb2,0x7d]
+
+v_cmpx_lt_u64 exec, v[2:3]
+// GFX: v_cmpx_lt_u64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0xb2,0x7d]
+
+v_cmpx_lt_u64 null, v[2:3]
+// GFX: v_cmpx_lt_u64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0xb2,0x7d]
+
+v_cmpx_lt_u64 -1, v[2:3]
+// GFX: v_cmpx_lt_u64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0xb2,0x7d]
+
+v_cmpx_lt_u64 0.5, v[2:3]
+// GFX: v_cmpx_lt_u64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0xb2,0x7d]
+
+v_cmpx_lt_u64 src_scc, v[2:3]
+// GFX: v_cmpx_lt_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xb2,0x7d]
+
+v_cmpx_lt_u64 0xaf123456, v[254:255]
+// GFX: v_cmpx_lt_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_ne_i16 v1.l, v2.l
+// GFX: v_cmpx_ne_i16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x6a,0x7d]
+
+v_cmpx_ne_i16 v127.l, v2.l
+// GFX: v_cmpx_ne_i16_e32 v127.l, v2.l          ; encoding: [0x7f,0x05,0x6a,0x7d]
+
+v_cmpx_ne_i16 s1, v2.l
+// GFX: v_cmpx_ne_i16_e32 s1, v2.l              ; encoding: [0x01,0x04,0x6a,0x7d]
+
+v_cmpx_ne_i16 s105, v2.l
+// GFX: v_cmpx_ne_i16_e32 s105, v2.l            ; encoding: [0x69,0x04,0x6a,0x7d]
+
+v_cmpx_ne_i16 vcc_lo, v2.l
+// GFX: v_cmpx_ne_i16_e32 vcc_lo, v2.l          ; encoding: [0x6a,0x04,0x6a,0x7d]
+
+v_cmpx_ne_i16 vcc_hi, v2.l
+// GFX: v_cmpx_ne_i16_e32 vcc_hi, v2.l          ; encoding: [0x6b,0x04,0x6a,0x7d]
+
+v_cmpx_ne_i16 ttmp15, v2.l
+// GFX: v_cmpx_ne_i16_e32 ttmp15, v2.l          ; encoding: [0x7b,0x04,0x6a,0x7d]
+
+v_cmpx_ne_i16 m0, v2.l
+// GFX: v_cmpx_ne_i16_e32 m0, v2.l              ; encoding: [0x7d,0x04,0x6a,0x7d]
+
+v_cmpx_ne_i16 exec_lo, v2.l
+// GFX: v_cmpx_ne_i16_e32 exec_lo, v2.l         ; encoding: [0x7e,0x04,0x6a,0x7d]
+
+v_cmpx_ne_i16 exec_hi, v2.l
+// GFX: v_cmpx_ne_i16_e32 exec_hi, v2.l         ; encoding: [0x7f,0x04,0x6a,0x7d]
+
+v_cmpx_ne_i16 null, v2.l
+// GFX: v_cmpx_ne_i16_e32 null, v2.l            ; encoding: [0x7c,0x04,0x6a,0x7d]
+
+v_cmpx_ne_i16 -1, v2.l
+// GFX: v_cmpx_ne_i16_e32 -1, v2.l              ; encoding: [0xc1,0x04,0x6a,0x7d]
+
+v_cmpx_ne_i16 0.5, v2.l
+// GFX: v_cmpx_ne_i16_e32 0.5, v2.l             ; encoding: [0xf0,0x04,0x6a,0x7d]
+
+v_cmpx_ne_i16 src_scc, v2.l
+// GFX: v_cmpx_ne_i16_e32 src_scc, v2.l         ; encoding: [0xfd,0x04,0x6a,0x7d]
+
+v_cmpx_ne_i16 0xfe0b, v127.l
+// GFX: v_cmpx_ne_i16_e32 0xfe0b, v127.l        ; encoding: [0xff,0xfe,0x6a,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_ne_i16 v1.h, v2.l
+// GFX: v_cmpx_ne_i16_e32 v1.h, v2.l            ; encoding: [0x81,0x05,0x6a,0x7d]
+
+v_cmpx_ne_i16 v127.h, v2.l
+// GFX: v_cmpx_ne_i16_e32 v127.h, v2.l          ; encoding: [0xff,0x05,0x6a,0x7d]
+
+v_cmpx_ne_i16 src_scc, v2.h
+// GFX: v_cmpx_ne_i16_e32 src_scc, v2.h         ; encoding: [0xfd,0x04,0x6b,0x7d]
+
+v_cmpx_ne_i16 0xfe0b, v127.h
+// GFX: v_cmpx_ne_i16_e32 0xfe0b, v127.h        ; encoding: [0xff,0xfe,0x6b,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_ne_i32 v1, v2
+// GFX: v_cmpx_ne_i32_e32 v1, v2                ; encoding: [0x01,0x05,0x8a,0x7d]
+
+v_cmpx_ne_i32 v255, v2
+// GFX: v_cmpx_ne_i32_e32 v255, v2              ; encoding: [0xff,0x05,0x8a,0x7d]
+
+v_cmpx_ne_i32 s1, v2
+// GFX: v_cmpx_ne_i32_e32 s1, v2                ; encoding: [0x01,0x04,0x8a,0x7d]
+
+v_cmpx_ne_i32 s105, v2
+// GFX: v_cmpx_ne_i32_e32 s105, v2              ; encoding: [0x69,0x04,0x8a,0x7d]
+
+v_cmpx_ne_i32 vcc_lo, v2
+// GFX: v_cmpx_ne_i32_e32 vcc_lo, v2            ; encoding: [0x6a,0x04,0x8a,0x7d]
+
+v_cmpx_ne_i32 vcc_hi, v2
+// GFX: v_cmpx_ne_i32_e32 vcc_hi, v2            ; encoding: [0x6b,0x04,0x8a,0x7d]
+
+v_cmpx_ne_i32 ttmp15, v2
+// GFX: v_cmpx_ne_i32_e32 ttmp15, v2            ; encoding: [0x7b,0x04,0x8a,0x7d]
+
+v_cmpx_ne_i32 m0, v2
+// GFX: v_cmpx_ne_i32_e32 m0, v2                ; encoding: [0x7d,0x04,0x8a,0x7d]
+
+v_cmpx_ne_i32 exec_lo, v2
+// GFX: v_cmpx_ne_i32_e32 exec_lo, v2           ; encoding: [0x7e,0x04,0x8a,0x7d]
+
+v_cmpx_ne_i32 exec_hi, v2
+// GFX: v_cmpx_ne_i32_e32 exec_hi, v2           ; encoding: [0x7f,0x04,0x8a,0x7d]
+
+v_cmpx_ne_i32 null, v2
+// GFX: v_cmpx_ne_i32_e32 null, v2              ; encoding: [0x7c,0x04,0x8a,0x7d]
+
+v_cmpx_ne_i32 -1, v2
+// GFX: v_cmpx_ne_i32_e32 -1, v2                ; encoding: [0xc1,0x04,0x8a,0x7d]
+
+v_cmpx_ne_i32 0.5, v2
+// GFX: v_cmpx_ne_i32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x8a,0x7d]
+
+v_cmpx_ne_i32 src_scc, v2
+// GFX: v_cmpx_ne_i32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x8a,0x7d]
+
+v_cmpx_ne_i32 0xaf123456, v255
+// GFX: v_cmpx_ne_i32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x8b,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_ne_i64 v[1:2], v[2:3]
+// GFX: v_cmpx_ne_i64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0xaa,0x7d]
+
+v_cmpx_ne_i64 v[254:255], v[2:3]
+// GFX: v_cmpx_ne_i64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0xaa,0x7d]
+
+v_cmpx_ne_i64 s[2:3], v[2:3]
+// GFX: v_cmpx_ne_i64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0xaa,0x7d]
+
+v_cmpx_ne_i64 s[104:105], v[2:3]
+// GFX: v_cmpx_ne_i64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0xaa,0x7d]
+
+v_cmpx_ne_i64 vcc, v[2:3]
+// GFX: v_cmpx_ne_i64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0xaa,0x7d]
+
+v_cmpx_ne_i64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_ne_i64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0xaa,0x7d]
+
+v_cmpx_ne_i64 exec, v[2:3]
+// GFX: v_cmpx_ne_i64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0xaa,0x7d]
+
+v_cmpx_ne_i64 null, v[2:3]
+// GFX: v_cmpx_ne_i64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0xaa,0x7d]
+
+v_cmpx_ne_i64 -1, v[2:3]
+// GFX: v_cmpx_ne_i64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0xaa,0x7d]
+
+v_cmpx_ne_i64 0.5, v[2:3]
+// GFX: v_cmpx_ne_i64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0xaa,0x7d]
+
+v_cmpx_ne_i64 src_scc, v[2:3]
+// GFX: v_cmpx_ne_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xaa,0x7d]
+
+v_cmpx_ne_i64 0xaf123456, v[254:255]
+// GFX: v_cmpx_ne_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_ne_u16 v1.l, v2.l
+// GFX: v_cmpx_ne_u16_e32 v1.l, v2.l            ; encoding: [0x01,0x05,0x7a,0x7d]
+
+v_cmpx_ne_u16 v127.l, v2.l
+// GFX: v_cmpx_ne_u16_e32 v127.l, v2.l          ; encoding: [0x7f,0x05,0x7a,0x7d]
+
+v_cmpx_ne_u16 s1, v2.l
+// GFX: v_cmpx_ne_u16_e32 s1, v2.l              ; encoding: [0x01,0x04,0x7a,0x7d]
+
+v_cmpx_ne_u16 s105, v2.l
+// GFX: v_cmpx_ne_u16_e32 s105, v2.l            ; encoding: [0x69,0x04,0x7a,0x7d]
+
+v_cmpx_ne_u16 vcc_lo, v2.l
+// GFX: v_cmpx_ne_u16_e32 vcc_lo, v2.l          ; encoding: [0x6a,0x04,0x7a,0x7d]
+
+v_cmpx_ne_u16 vcc_hi, v2.l
+// GFX: v_cmpx_ne_u16_e32 vcc_hi, v2.l          ; encoding: [0x6b,0x04,0x7a,0x7d]
+
+v_cmpx_ne_u16 ttmp15, v2.l
+// GFX: v_cmpx_ne_u16_e32 ttmp15, v2.l          ; encoding: [0x7b,0x04,0x7a,0x7d]
+
+v_cmpx_ne_u16 m0, v2.l
+// GFX: v_cmpx_ne_u16_e32 m0, v2.l              ; encoding: [0x7d,0x04,0x7a,0x7d]
+
+v_cmpx_ne_u16 exec_lo, v2.l
+// GFX: v_cmpx_ne_u16_e32 exec_lo, v2.l         ; encoding: [0x7e,0x04,0x7a,0x7d]
+
+v_cmpx_ne_u16 exec_hi, v2.l
+// GFX: v_cmpx_ne_u16_e32 exec_hi, v2.l         ; encoding: [0x7f,0x04,0x7a,0x7d]
+
+v_cmpx_ne_u16 null, v2.l
+// GFX: v_cmpx_ne_u16_e32 null, v2.l            ; encoding: [0x7c,0x04,0x7a,0x7d]
+
+v_cmpx_ne_u16 -1, v2.l
+// GFX: v_cmpx_ne_u16_e32 -1, v2.l              ; encoding: [0xc1,0x04,0x7a,0x7d]
+
+v_cmpx_ne_u16 0.5, v2.l
+// GFX: v_cmpx_ne_u16_e32 0.5, v2.l             ; encoding: [0xf0,0x04,0x7a,0x7d]
+
+v_cmpx_ne_u16 src_scc, v2.l
+// GFX: v_cmpx_ne_u16_e32 src_scc, v2.l         ; encoding: [0xfd,0x04,0x7a,0x7d]
+
+v_cmpx_ne_u16 0xfe0b, v127.l
+// GFX: v_cmpx_ne_u16_e32 0xfe0b, v127.l        ; encoding: [0xff,0xfe,0x7a,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_ne_u16 v1.h, v2.l
+// GFX: v_cmpx_ne_u16_e32 v1.h, v2.l            ; encoding: [0x81,0x05,0x7a,0x7d]
+
+v_cmpx_ne_u16 v127.h, v2.l
+// GFX: v_cmpx_ne_u16_e32 v127.h, v2.l          ; encoding: [0xff,0x05,0x7a,0x7d]
+
+v_cmpx_ne_u16 src_scc, v2.h
+// GFX: v_cmpx_ne_u16_e32 src_scc, v2.h         ; encoding: [0xfd,0x04,0x7b,0x7d]
+
+v_cmpx_ne_u16 0xfe0b, v127.h
+// GFX: v_cmpx_ne_u16_e32 0xfe0b, v127.h        ; encoding: [0xff,0xfe,0x7b,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_ne_u32 v1, v2
+// GFX: v_cmpx_ne_u32_e32 v1, v2                ; encoding: [0x01,0x05,0x9a,0x7d]
+
+v_cmpx_ne_u32 v255, v2
+// GFX: v_cmpx_ne_u32_e32 v255, v2              ; encoding: [0xff,0x05,0x9a,0x7d]
+
+v_cmpx_ne_u32 s1, v2
+// GFX: v_cmpx_ne_u32_e32 s1, v2                ; encoding: [0x01,0x04,0x9a,0x7d]
+
+v_cmpx_ne_u32 s105, v2
+// GFX: v_cmpx_ne_u32_e32 s105, v2              ; encoding: [0x69,0x04,0x9a,0x7d]
+
+v_cmpx_ne_u32 vcc_lo, v2
+// GFX: v_cmpx_ne_u32_e32 vcc_lo, v2            ; encoding: [0x6a,0x04,0x9a,0x7d]
+
+v_cmpx_ne_u32 vcc_hi, v2
+// GFX: v_cmpx_ne_u32_e32 vcc_hi, v2            ; encoding: [0x6b,0x04,0x9a,0x7d]
+
+v_cmpx_ne_u32 ttmp15, v2
+// GFX: v_cmpx_ne_u32_e32 ttmp15, v2            ; encoding: [0x7b,0x04,0x9a,0x7d]
+
+v_cmpx_ne_u32 m0, v2
+// GFX: v_cmpx_ne_u32_e32 m0, v2                ; encoding: [0x7d,0x04,0x9a,0x7d]
+
+v_cmpx_ne_u32 exec_lo, v2
+// GFX: v_cmpx_ne_u32_e32 exec_lo, v2           ; encoding: [0x7e,0x04,0x9a,0x7d]
+
+v_cmpx_ne_u32 exec_hi, v2
+// GFX: v_cmpx_ne_u32_e32 exec_hi, v2           ; encoding: [0x7f,0x04,0x9a,0x7d]
+
+v_cmpx_ne_u32 null, v2
+// GFX: v_cmpx_ne_u32_e32 null, v2              ; encoding: [0x7c,0x04,0x9a,0x7d]
+
+v_cmpx_ne_u32 -1, v2
+// GFX: v_cmpx_ne_u32_e32 -1, v2                ; encoding: [0xc1,0x04,0x9a,0x7d]
+
+v_cmpx_ne_u32 0.5, v2
+// GFX: v_cmpx_ne_u32_e32 0.5, v2               ; encoding: [0xf0,0x04,0x9a,0x7d]
+
+v_cmpx_ne_u32 src_scc, v2
+// GFX: v_cmpx_ne_u32_e32 src_scc, v2           ; encoding: [0xfd,0x04,0x9a,0x7d]
+
+v_cmpx_ne_u32 0xaf123456, v255
+// GFX: v_cmpx_ne_u32_e32 0xaf123456, v255      ; encoding: [0xff,0xfe,0x9b,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_ne_u64 v[1:2], v[2:3]
+// GFX: v_cmpx_ne_u64_e32 v[1:2], v[2:3]        ; encoding: [0x01,0x05,0xba,0x7d]
+
+v_cmpx_ne_u64 v[254:255], v[2:3]
+// GFX: v_cmpx_ne_u64_e32 v[254:255], v[2:3]    ; encoding: [0xfe,0x05,0xba,0x7d]
+
+v_cmpx_ne_u64 s[2:3], v[2:3]
+// GFX: v_cmpx_ne_u64_e32 s[2:3], v[2:3]        ; encoding: [0x02,0x04,0xba,0x7d]
+
+v_cmpx_ne_u64 s[104:105], v[2:3]
+// GFX: v_cmpx_ne_u64_e32 s[104:105], v[2:3]    ; encoding: [0x68,0x04,0xba,0x7d]
+
+v_cmpx_ne_u64 vcc, v[2:3]
+// GFX: v_cmpx_ne_u64_e32 vcc, v[2:3]           ; encoding: [0x6a,0x04,0xba,0x7d]
+
+v_cmpx_ne_u64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_ne_u64_e32 ttmp[14:15], v[2:3]   ; encoding: [0x7a,0x04,0xba,0x7d]
+
+v_cmpx_ne_u64 exec, v[2:3]
+// GFX: v_cmpx_ne_u64_e32 exec, v[2:3]          ; encoding: [0x7e,0x04,0xba,0x7d]
+
+v_cmpx_ne_u64 null, v[2:3]
+// GFX: v_cmpx_ne_u64_e32 null, v[2:3]          ; encoding: [0x7c,0x04,0xba,0x7d]
+
+v_cmpx_ne_u64 -1, v[2:3]
+// GFX: v_cmpx_ne_u64_e32 -1, v[2:3]            ; encoding: [0xc1,0x04,0xba,0x7d]
+
+v_cmpx_ne_u64 0.5, v[2:3]
+// GFX: v_cmpx_ne_u64_e32 0.5, v[2:3]           ; encoding: [0xf0,0x04,0xba,0x7d]
+
+v_cmpx_ne_u64 src_scc, v[2:3]
+// GFX: v_cmpx_ne_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xba,0x7d]
+
+v_cmpx_ne_u64 0xaf123456, v[254:255]
+// GFX: v_cmpx_ne_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_neq_f16 v1.l, v2.l
+// GFX: v_cmpx_neq_f16_e32 v1.l, v2.l           ; encoding: [0x01,0x05,0x1a,0x7d]
+
+v_cmpx_neq_f16 v127.l, v2.l
+// GFX: v_cmpx_neq_f16_e32 v127.l, v2.l         ; encoding: [0x7f,0x05,0x1a,0x7d]
+
+v_cmpx_neq_f16 s1, v2.l
+// GFX: v_cmpx_neq_f16_e32 s1, v2.l             ; encoding: [0x01,0x04,0x1a,0x7d]
+
+v_cmpx_neq_f16 s105, v2.l
+// GFX: v_cmpx_neq_f16_e32 s105, v2.l           ; encoding: [0x69,0x04,0x1a,0x7d]
+
+v_cmpx_neq_f16 vcc_lo, v2.l
+// GFX: v_cmpx_neq_f16_e32 vcc_lo, v2.l         ; encoding: [0x6a,0x04,0x1a,0x7d]
+
+v_cmpx_neq_f16 vcc_hi, v2.l
+// GFX: v_cmpx_neq_f16_e32 vcc_hi, v2.l         ; encoding: [0x6b,0x04,0x1a,0x7d]
+
+v_cmpx_neq_f16 ttmp15, v2.l
+// GFX: v_cmpx_neq_f16_e32 ttmp15, v2.l         ; encoding: [0x7b,0x04,0x1a,0x7d]
+
+v_cmpx_neq_f16 m0, v2.l
+// GFX: v_cmpx_neq_f16_e32 m0, v2.l             ; encoding: [0x7d,0x04,0x1a,0x7d]
+
+v_cmpx_neq_f16 exec_lo, v2.l
+// GFX: v_cmpx_neq_f16_e32 exec_lo, v2.l        ; encoding: [0x7e,0x04,0x1a,0x7d]
+
+v_cmpx_neq_f16 exec_hi, v2.l
+// GFX: v_cmpx_neq_f16_e32 exec_hi, v2.l        ; encoding: [0x7f,0x04,0x1a,0x7d]
+
+v_cmpx_neq_f16 null, v2.l
+// GFX: v_cmpx_neq_f16_e32 null, v2.l           ; encoding: [0x7c,0x04,0x1a,0x7d]
+
+v_cmpx_neq_f16 -1, v2.l
+// GFX: v_cmpx_neq_f16_e32 -1, v2.l             ; encoding: [0xc1,0x04,0x1a,0x7d]
+
+v_cmpx_neq_f16 0.5, v2.l
+// GFX: v_cmpx_neq_f16_e32 0.5, v2.l            ; encoding: [0xf0,0x04,0x1a,0x7d]
+
+v_cmpx_neq_f16 src_scc, v2.l
+// GFX: v_cmpx_neq_f16_e32 src_scc, v2.l        ; encoding: [0xfd,0x04,0x1a,0x7d]
+
+v_cmpx_neq_f16 0xfe0b, v127.l
+// GFX: v_cmpx_neq_f16_e32 0xfe0b, v127.l       ; encoding: [0xff,0xfe,0x1a,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_neq_f16 v1.h, v2.l
+// GFX: v_cmpx_neq_f16_e32 v1.h, v2.l           ; encoding: [0x81,0x05,0x1a,0x7d]
+
+v_cmpx_neq_f16 v127.h, v2.l
+// GFX: v_cmpx_neq_f16_e32 v127.h, v2.l         ; encoding: [0xff,0x05,0x1a,0x7d]
+
+v_cmpx_neq_f16 src_scc, v2.h
+// GFX: v_cmpx_neq_f16_e32 src_scc, v2.h        ; encoding: [0xfd,0x04,0x1b,0x7d]
+
+v_cmpx_neq_f16 0xfe0b, v127.h
+// GFX: v_cmpx_neq_f16_e32 0xfe0b, v127.h       ; encoding: [0xff,0xfe,0x1b,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_neq_f32 v1, v2
+// GFX: v_cmpx_neq_f32_e32 v1, v2               ; encoding: [0x01,0x05,0x3a,0x7d]
+
+v_cmpx_neq_f32 v255, v2
+// GFX: v_cmpx_neq_f32_e32 v255, v2             ; encoding: [0xff,0x05,0x3a,0x7d]
+
+v_cmpx_neq_f32 s1, v2
+// GFX: v_cmpx_neq_f32_e32 s1, v2               ; encoding: [0x01,0x04,0x3a,0x7d]
+
+v_cmpx_neq_f32 s105, v2
+// GFX: v_cmpx_neq_f32_e32 s105, v2             ; encoding: [0x69,0x04,0x3a,0x7d]
+
+v_cmpx_neq_f32 vcc_lo, v2
+// GFX: v_cmpx_neq_f32_e32 vcc_lo, v2           ; encoding: [0x6a,0x04,0x3a,0x7d]
+
+v_cmpx_neq_f32 vcc_hi, v2
+// GFX: v_cmpx_neq_f32_e32 vcc_hi, v2           ; encoding: [0x6b,0x04,0x3a,0x7d]
+
+v_cmpx_neq_f32 ttmp15, v2
+// GFX: v_cmpx_neq_f32_e32 ttmp15, v2           ; encoding: [0x7b,0x04,0x3a,0x7d]
+
+v_cmpx_neq_f32 m0, v2
+// GFX: v_cmpx_neq_f32_e32 m0, v2               ; encoding: [0x7d,0x04,0x3a,0x7d]
+
+v_cmpx_neq_f32 exec_lo, v2
+// GFX: v_cmpx_neq_f32_e32 exec_lo, v2          ; encoding: [0x7e,0x04,0x3a,0x7d]
+
+v_cmpx_neq_f32 exec_hi, v2
+// GFX: v_cmpx_neq_f32_e32 exec_hi, v2          ; encoding: [0x7f,0x04,0x3a,0x7d]
+
+v_cmpx_neq_f32 null, v2
+// GFX: v_cmpx_neq_f32_e32 null, v2             ; encoding: [0x7c,0x04,0x3a,0x7d]
+
+v_cmpx_neq_f32 -1, v2
+// GFX: v_cmpx_neq_f32_e32 -1, v2               ; encoding: [0xc1,0x04,0x3a,0x7d]
+
+v_cmpx_neq_f32 0.5, v2
+// GFX: v_cmpx_neq_f32_e32 0.5, v2              ; encoding: [0xf0,0x04,0x3a,0x7d]
+
+v_cmpx_neq_f32 src_scc, v2
+// GFX: v_cmpx_neq_f32_e32 src_scc, v2          ; encoding: [0xfd,0x04,0x3a,0x7d]
+
+v_cmpx_neq_f32 0xaf123456, v255
+// GFX: v_cmpx_neq_f32_e32 0xaf123456, v255     ; encoding: [0xff,0xfe,0x3b,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_neq_f64 v[1:2], v[2:3]
+// GFX: v_cmpx_neq_f64_e32 v[1:2], v[2:3]       ; encoding: [0x01,0x05,0x5a,0x7d]
+
+v_cmpx_neq_f64 v[254:255], v[2:3]
+// GFX: v_cmpx_neq_f64_e32 v[254:255], v[2:3]   ; encoding: [0xfe,0x05,0x5a,0x7d]
+
+v_cmpx_neq_f64 s[2:3], v[2:3]
+// GFX: v_cmpx_neq_f64_e32 s[2:3], v[2:3]       ; encoding: [0x02,0x04,0x5a,0x7d]
+
+v_cmpx_neq_f64 s[104:105], v[2:3]
+// GFX: v_cmpx_neq_f64_e32 s[104:105], v[2:3]   ; encoding: [0x68,0x04,0x5a,0x7d]
+
+v_cmpx_neq_f64 vcc, v[2:3]
+// GFX: v_cmpx_neq_f64_e32 vcc, v[2:3]          ; encoding: [0x6a,0x04,0x5a,0x7d]
+
+v_cmpx_neq_f64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_neq_f64_e32 ttmp[14:15], v[2:3]  ; encoding: [0x7a,0x04,0x5a,0x7d]
+
+v_cmpx_neq_f64 exec, v[2:3]
+// GFX: v_cmpx_neq_f64_e32 exec, v[2:3]         ; encoding: [0x7e,0x04,0x5a,0x7d]
+
+v_cmpx_neq_f64 null, v[2:3]
+// GFX: v_cmpx_neq_f64_e32 null, v[2:3]         ; encoding: [0x7c,0x04,0x5a,0x7d]
+
+v_cmpx_neq_f64 -1, v[2:3]
+// GFX: v_cmpx_neq_f64_e32 -1, v[2:3]           ; encoding: [0xc1,0x04,0x5a,0x7d]
+
+v_cmpx_neq_f64 0.5, v[2:3]
+// GFX: v_cmpx_neq_f64_e32 0.5, v[2:3]          ; encoding: [0xf0,0x04,0x5a,0x7d]
+
+v_cmpx_neq_f64 src_scc, v[2:3]
+// GFX: v_cmpx_neq_f64_e32 src_scc, v[2:3]      ; encoding: [0xfd,0x04,0x5a,0x7d]
+
+v_cmpx_neq_f64 0xaf123456, v[254:255]
+// GFX: v_cmpx_neq_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_nge_f16 v1.l, v2.l
+// GFX: v_cmpx_nge_f16_e32 v1.l, v2.l           ; encoding: [0x01,0x05,0x12,0x7d]
+
+v_cmpx_nge_f16 v127.l, v2.l
+// GFX: v_cmpx_nge_f16_e32 v127.l, v2.l         ; encoding: [0x7f,0x05,0x12,0x7d]
+
+v_cmpx_nge_f16 s1, v2.l
+// GFX: v_cmpx_nge_f16_e32 s1, v2.l             ; encoding: [0x01,0x04,0x12,0x7d]
+
+v_cmpx_nge_f16 s105, v2.l
+// GFX: v_cmpx_nge_f16_e32 s105, v2.l           ; encoding: [0x69,0x04,0x12,0x7d]
+
+v_cmpx_nge_f16 vcc_lo, v2.l
+// GFX: v_cmpx_nge_f16_e32 vcc_lo, v2.l         ; encoding: [0x6a,0x04,0x12,0x7d]
+
+v_cmpx_nge_f16 vcc_hi, v2.l
+// GFX: v_cmpx_nge_f16_e32 vcc_hi, v2.l         ; encoding: [0x6b,0x04,0x12,0x7d]
+
+v_cmpx_nge_f16 ttmp15, v2.l
+// GFX: v_cmpx_nge_f16_e32 ttmp15, v2.l         ; encoding: [0x7b,0x04,0x12,0x7d]
+
+v_cmpx_nge_f16 m0, v2.l
+// GFX: v_cmpx_nge_f16_e32 m0, v2.l             ; encoding: [0x7d,0x04,0x12,0x7d]
+
+v_cmpx_nge_f16 exec_lo, v2.l
+// GFX: v_cmpx_nge_f16_e32 exec_lo, v2.l        ; encoding: [0x7e,0x04,0x12,0x7d]
+
+v_cmpx_nge_f16 exec_hi, v2.l
+// GFX: v_cmpx_nge_f16_e32 exec_hi, v2.l        ; encoding: [0x7f,0x04,0x12,0x7d]
+
+v_cmpx_nge_f16 null, v2.l
+// GFX: v_cmpx_nge_f16_e32 null, v2.l           ; encoding: [0x7c,0x04,0x12,0x7d]
+
+v_cmpx_nge_f16 -1, v2.l
+// GFX: v_cmpx_nge_f16_e32 -1, v2.l             ; encoding: [0xc1,0x04,0x12,0x7d]
+
+v_cmpx_nge_f16 0.5, v2.l
+// GFX: v_cmpx_nge_f16_e32 0.5, v2.l            ; encoding: [0xf0,0x04,0x12,0x7d]
+
+v_cmpx_nge_f16 src_scc, v2.l
+// GFX: v_cmpx_nge_f16_e32 src_scc, v2.l        ; encoding: [0xfd,0x04,0x12,0x7d]
+
+v_cmpx_nge_f16 0xfe0b, v127.l
+// GFX: v_cmpx_nge_f16_e32 0xfe0b, v127.l       ; encoding: [0xff,0xfe,0x12,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_nge_f16 v1.h, v2.l
+// GFX: v_cmpx_nge_f16_e32 v1.h, v2.l           ; encoding: [0x81,0x05,0x12,0x7d]
+
+v_cmpx_nge_f16 v127.h, v2.l
+// GFX: v_cmpx_nge_f16_e32 v127.h, v2.l         ; encoding: [0xff,0x05,0x12,0x7d]
+
+v_cmpx_nge_f16 src_scc, v2.h
+// GFX: v_cmpx_nge_f16_e32 src_scc, v2.h        ; encoding: [0xfd,0x04,0x13,0x7d]
+
+v_cmpx_nge_f16 0xfe0b, v127.h
+// GFX: v_cmpx_nge_f16_e32 0xfe0b, v127.h       ; encoding: [0xff,0xfe,0x13,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_nge_f32 v1, v2
+// GFX: v_cmpx_nge_f32_e32 v1, v2               ; encoding: [0x01,0x05,0x32,0x7d]
+
+v_cmpx_nge_f32 v255, v2
+// GFX: v_cmpx_nge_f32_e32 v255, v2             ; encoding: [0xff,0x05,0x32,0x7d]
+
+v_cmpx_nge_f32 s1, v2
+// GFX: v_cmpx_nge_f32_e32 s1, v2               ; encoding: [0x01,0x04,0x32,0x7d]
+
+v_cmpx_nge_f32 s105, v2
+// GFX: v_cmpx_nge_f32_e32 s105, v2             ; encoding: [0x69,0x04,0x32,0x7d]
+
+v_cmpx_nge_f32 vcc_lo, v2
+// GFX: v_cmpx_nge_f32_e32 vcc_lo, v2           ; encoding: [0x6a,0x04,0x32,0x7d]
+
+v_cmpx_nge_f32 vcc_hi, v2
+// GFX: v_cmpx_nge_f32_e32 vcc_hi, v2           ; encoding: [0x6b,0x04,0x32,0x7d]
+
+v_cmpx_nge_f32 ttmp15, v2
+// GFX: v_cmpx_nge_f32_e32 ttmp15, v2           ; encoding: [0x7b,0x04,0x32,0x7d]
+
+v_cmpx_nge_f32 m0, v2
+// GFX: v_cmpx_nge_f32_e32 m0, v2               ; encoding: [0x7d,0x04,0x32,0x7d]
+
+v_cmpx_nge_f32 exec_lo, v2
+// GFX: v_cmpx_nge_f32_e32 exec_lo, v2          ; encoding: [0x7e,0x04,0x32,0x7d]
+
+v_cmpx_nge_f32 exec_hi, v2
+// GFX: v_cmpx_nge_f32_e32 exec_hi, v2          ; encoding: [0x7f,0x04,0x32,0x7d]
+
+v_cmpx_nge_f32 null, v2
+// GFX: v_cmpx_nge_f32_e32 null, v2             ; encoding: [0x7c,0x04,0x32,0x7d]
+
+v_cmpx_nge_f32 -1, v2
+// GFX: v_cmpx_nge_f32_e32 -1, v2               ; encoding: [0xc1,0x04,0x32,0x7d]
+
+v_cmpx_nge_f32 0.5, v2
+// GFX: v_cmpx_nge_f32_e32 0.5, v2              ; encoding: [0xf0,0x04,0x32,0x7d]
+
+v_cmpx_nge_f32 src_scc, v2
+// GFX: v_cmpx_nge_f32_e32 src_scc, v2          ; encoding: [0xfd,0x04,0x32,0x7d]
+
+v_cmpx_nge_f32 0xaf123456, v255
+// GFX: v_cmpx_nge_f32_e32 0xaf123456, v255     ; encoding: [0xff,0xfe,0x33,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_nge_f64 v[1:2], v[2:3]
+// GFX: v_cmpx_nge_f64_e32 v[1:2], v[2:3]       ; encoding: [0x01,0x05,0x52,0x7d]
+
+v_cmpx_nge_f64 v[254:255], v[2:3]
+// GFX: v_cmpx_nge_f64_e32 v[254:255], v[2:3]   ; encoding: [0xfe,0x05,0x52,0x7d]
+
+v_cmpx_nge_f64 s[2:3], v[2:3]
+// GFX: v_cmpx_nge_f64_e32 s[2:3], v[2:3]       ; encoding: [0x02,0x04,0x52,0x7d]
+
+v_cmpx_nge_f64 s[104:105], v[2:3]
+// GFX: v_cmpx_nge_f64_e32 s[104:105], v[2:3]   ; encoding: [0x68,0x04,0x52,0x7d]
+
+v_cmpx_nge_f64 vcc, v[2:3]
+// GFX: v_cmpx_nge_f64_e32 vcc, v[2:3]          ; encoding: [0x6a,0x04,0x52,0x7d]
+
+v_cmpx_nge_f64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_nge_f64_e32 ttmp[14:15], v[2:3]  ; encoding: [0x7a,0x04,0x52,0x7d]
+
+v_cmpx_nge_f64 exec, v[2:3]
+// GFX: v_cmpx_nge_f64_e32 exec, v[2:3]         ; encoding: [0x7e,0x04,0x52,0x7d]
+
+v_cmpx_nge_f64 null, v[2:3]
+// GFX: v_cmpx_nge_f64_e32 null, v[2:3]         ; encoding: [0x7c,0x04,0x52,0x7d]
+
+v_cmpx_nge_f64 -1, v[2:3]
+// GFX: v_cmpx_nge_f64_e32 -1, v[2:3]           ; encoding: [0xc1,0x04,0x52,0x7d]
+
+v_cmpx_nge_f64 0.5, v[2:3]
+// GFX: v_cmpx_nge_f64_e32 0.5, v[2:3]          ; encoding: [0xf0,0x04,0x52,0x7d]
+
+v_cmpx_nge_f64 src_scc, v[2:3]
+// GFX: v_cmpx_nge_f64_e32 src_scc, v[2:3]      ; encoding: [0xfd,0x04,0x52,0x7d]
+
+v_cmpx_nge_f64 0xaf123456, v[254:255]
+// GFX: v_cmpx_nge_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_ngt_f16 v1.l, v2.l
+// GFX: v_cmpx_ngt_f16_e32 v1.l, v2.l           ; encoding: [0x01,0x05,0x16,0x7d]
+
+v_cmpx_ngt_f16 v127.l, v2.l
+// GFX: v_cmpx_ngt_f16_e32 v127.l, v2.l         ; encoding: [0x7f,0x05,0x16,0x7d]
+
+v_cmpx_ngt_f16 s1, v2.l
+// GFX: v_cmpx_ngt_f16_e32 s1, v2.l             ; encoding: [0x01,0x04,0x16,0x7d]
+
+v_cmpx_ngt_f16 s105, v2.l
+// GFX: v_cmpx_ngt_f16_e32 s105, v2.l           ; encoding: [0x69,0x04,0x16,0x7d]
+
+v_cmpx_ngt_f16 vcc_lo, v2.l
+// GFX: v_cmpx_ngt_f16_e32 vcc_lo, v2.l         ; encoding: [0x6a,0x04,0x16,0x7d]
+
+v_cmpx_ngt_f16 vcc_hi, v2.l
+// GFX: v_cmpx_ngt_f16_e32 vcc_hi, v2.l         ; encoding: [0x6b,0x04,0x16,0x7d]
+
+v_cmpx_ngt_f16 ttmp15, v2.l
+// GFX: v_cmpx_ngt_f16_e32 ttmp15, v2.l         ; encoding: [0x7b,0x04,0x16,0x7d]
+
+v_cmpx_ngt_f16 m0, v2.l
+// GFX: v_cmpx_ngt_f16_e32 m0, v2.l             ; encoding: [0x7d,0x04,0x16,0x7d]
+
+v_cmpx_ngt_f16 exec_lo, v2.l
+// GFX: v_cmpx_ngt_f16_e32 exec_lo, v2.l        ; encoding: [0x7e,0x04,0x16,0x7d]
+
+v_cmpx_ngt_f16 exec_hi, v2.l
+// GFX: v_cmpx_ngt_f16_e32 exec_hi, v2.l        ; encoding: [0x7f,0x04,0x16,0x7d]
+
+v_cmpx_ngt_f16 null, v2.l
+// GFX: v_cmpx_ngt_f16_e32 null, v2.l           ; encoding: [0x7c,0x04,0x16,0x7d]
+
+v_cmpx_ngt_f16 -1, v2.l
+// GFX: v_cmpx_ngt_f16_e32 -1, v2.l             ; encoding: [0xc1,0x04,0x16,0x7d]
+
+v_cmpx_ngt_f16 0.5, v2.l
+// GFX: v_cmpx_ngt_f16_e32 0.5, v2.l            ; encoding: [0xf0,0x04,0x16,0x7d]
+
+v_cmpx_ngt_f16 src_scc, v2.l
+// GFX: v_cmpx_ngt_f16_e32 src_scc, v2.l        ; encoding: [0xfd,0x04,0x16,0x7d]
+
+v_cmpx_ngt_f16 0xfe0b, v127.l
+// GFX: v_cmpx_ngt_f16_e32 0xfe0b, v127.l       ; encoding: [0xff,0xfe,0x16,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_ngt_f16 v1.h, v2.l
+// GFX: v_cmpx_ngt_f16_e32 v1.h, v2.l           ; encoding: [0x81,0x05,0x16,0x7d]
+
+v_cmpx_ngt_f16 v127.h, v2.l
+// GFX: v_cmpx_ngt_f16_e32 v127.h, v2.l         ; encoding: [0xff,0x05,0x16,0x7d]
+
+v_cmpx_ngt_f16 src_scc, v2.h
+// GFX: v_cmpx_ngt_f16_e32 src_scc, v2.h        ; encoding: [0xfd,0x04,0x17,0x7d]
+
+v_cmpx_ngt_f16 0xfe0b, v127.h
+// GFX: v_cmpx_ngt_f16_e32 0xfe0b, v127.h       ; encoding: [0xff,0xfe,0x17,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_ngt_f32 v1, v2
+// GFX: v_cmpx_ngt_f32_e32 v1, v2               ; encoding: [0x01,0x05,0x36,0x7d]
+
+v_cmpx_ngt_f32 v255, v2
+// GFX: v_cmpx_ngt_f32_e32 v255, v2             ; encoding: [0xff,0x05,0x36,0x7d]
+
+v_cmpx_ngt_f32 s1, v2
+// GFX: v_cmpx_ngt_f32_e32 s1, v2               ; encoding: [0x01,0x04,0x36,0x7d]
+
+v_cmpx_ngt_f32 s105, v2
+// GFX: v_cmpx_ngt_f32_e32 s105, v2             ; encoding: [0x69,0x04,0x36,0x7d]
+
+v_cmpx_ngt_f32 vcc_lo, v2
+// GFX: v_cmpx_ngt_f32_e32 vcc_lo, v2           ; encoding: [0x6a,0x04,0x36,0x7d]
+
+v_cmpx_ngt_f32 vcc_hi, v2
+// GFX: v_cmpx_ngt_f32_e32 vcc_hi, v2           ; encoding: [0x6b,0x04,0x36,0x7d]
+
+v_cmpx_ngt_f32 ttmp15, v2
+// GFX: v_cmpx_ngt_f32_e32 ttmp15, v2           ; encoding: [0x7b,0x04,0x36,0x7d]
+
+v_cmpx_ngt_f32 m0, v2
+// GFX: v_cmpx_ngt_f32_e32 m0, v2               ; encoding: [0x7d,0x04,0x36,0x7d]
+
+v_cmpx_ngt_f32 exec_lo, v2
+// GFX: v_cmpx_ngt_f32_e32 exec_lo, v2          ; encoding: [0x7e,0x04,0x36,0x7d]
+
+v_cmpx_ngt_f32 exec_hi, v2
+// GFX: v_cmpx_ngt_f32_e32 exec_hi, v2          ; encoding: [0x7f,0x04,0x36,0x7d]
+
+v_cmpx_ngt_f32 null, v2
+// GFX: v_cmpx_ngt_f32_e32 null, v2             ; encoding: [0x7c,0x04,0x36,0x7d]
+
+v_cmpx_ngt_f32 -1, v2
+// GFX: v_cmpx_ngt_f32_e32 -1, v2               ; encoding: [0xc1,0x04,0x36,0x7d]
+
+v_cmpx_ngt_f32 0.5, v2
+// GFX: v_cmpx_ngt_f32_e32 0.5, v2              ; encoding: [0xf0,0x04,0x36,0x7d]
+
+v_cmpx_ngt_f32 src_scc, v2
+// GFX: v_cmpx_ngt_f32_e32 src_scc, v2          ; encoding: [0xfd,0x04,0x36,0x7d]
+
+v_cmpx_ngt_f32 0xaf123456, v255
+// GFX: v_cmpx_ngt_f32_e32 0xaf123456, v255     ; encoding: [0xff,0xfe,0x37,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_ngt_f64 v[1:2], v[2:3]
+// GFX: v_cmpx_ngt_f64_e32 v[1:2], v[2:3]       ; encoding: [0x01,0x05,0x56,0x7d]
+
+v_cmpx_ngt_f64 v[254:255], v[2:3]
+// GFX: v_cmpx_ngt_f64_e32 v[254:255], v[2:3]   ; encoding: [0xfe,0x05,0x56,0x7d]
+
+v_cmpx_ngt_f64 s[2:3], v[2:3]
+// GFX: v_cmpx_ngt_f64_e32 s[2:3], v[2:3]       ; encoding: [0x02,0x04,0x56,0x7d]
+
+v_cmpx_ngt_f64 s[104:105], v[2:3]
+// GFX: v_cmpx_ngt_f64_e32 s[104:105], v[2:3]   ; encoding: [0x68,0x04,0x56,0x7d]
+
+v_cmpx_ngt_f64 vcc, v[2:3]
+// GFX: v_cmpx_ngt_f64_e32 vcc, v[2:3]          ; encoding: [0x6a,0x04,0x56,0x7d]
+
+v_cmpx_ngt_f64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_ngt_f64_e32 ttmp[14:15], v[2:3]  ; encoding: [0x7a,0x04,0x56,0x7d]
+
+v_cmpx_ngt_f64 exec, v[2:3]
+// GFX: v_cmpx_ngt_f64_e32 exec, v[2:3]         ; encoding: [0x7e,0x04,0x56,0x7d]
+
+v_cmpx_ngt_f64 null, v[2:3]
+// GFX: v_cmpx_ngt_f64_e32 null, v[2:3]         ; encoding: [0x7c,0x04,0x56,0x7d]
+
+v_cmpx_ngt_f64 -1, v[2:3]
+// GFX: v_cmpx_ngt_f64_e32 -1, v[2:3]           ; encoding: [0xc1,0x04,0x56,0x7d]
+
+v_cmpx_ngt_f64 0.5, v[2:3]
+// GFX: v_cmpx_ngt_f64_e32 0.5, v[2:3]          ; encoding: [0xf0,0x04,0x56,0x7d]
+
+v_cmpx_ngt_f64 src_scc, v[2:3]
+// GFX: v_cmpx_ngt_f64_e32 src_scc, v[2:3]      ; encoding: [0xfd,0x04,0x56,0x7d]
+
+v_cmpx_ngt_f64 0xaf123456, v[254:255]
+// GFX: v_cmpx_ngt_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_nle_f16 v1.l, v2.l
+// GFX: v_cmpx_nle_f16_e32 v1.l, v2.l           ; encoding: [0x01,0x05,0x18,0x7d]
+
+v_cmpx_nle_f16 v127.l, v2.l
+// GFX: v_cmpx_nle_f16_e32 v127.l, v2.l         ; encoding: [0x7f,0x05,0x18,0x7d]
+
+v_cmpx_nle_f16 s1, v2.l
+// GFX: v_cmpx_nle_f16_e32 s1, v2.l             ; encoding: [0x01,0x04,0x18,0x7d]
+
+v_cmpx_nle_f16 s105, v2.l
+// GFX: v_cmpx_nle_f16_e32 s105, v2.l           ; encoding: [0x69,0x04,0x18,0x7d]
+
+v_cmpx_nle_f16 vcc_lo, v2.l
+// GFX: v_cmpx_nle_f16_e32 vcc_lo, v2.l         ; encoding: [0x6a,0x04,0x18,0x7d]
+
+v_cmpx_nle_f16 vcc_hi, v2.l
+// GFX: v_cmpx_nle_f16_e32 vcc_hi, v2.l         ; encoding: [0x6b,0x04,0x18,0x7d]
+
+v_cmpx_nle_f16 ttmp15, v2.l
+// GFX: v_cmpx_nle_f16_e32 ttmp15, v2.l         ; encoding: [0x7b,0x04,0x18,0x7d]
+
+v_cmpx_nle_f16 m0, v2.l
+// GFX: v_cmpx_nle_f16_e32 m0, v2.l             ; encoding: [0x7d,0x04,0x18,0x7d]
+
+v_cmpx_nle_f16 exec_lo, v2.l
+// GFX: v_cmpx_nle_f16_e32 exec_lo, v2.l        ; encoding: [0x7e,0x04,0x18,0x7d]
+
+v_cmpx_nle_f16 exec_hi, v2.l
+// GFX: v_cmpx_nle_f16_e32 exec_hi, v2.l        ; encoding: [0x7f,0x04,0x18,0x7d]
+
+v_cmpx_nle_f16 null, v2.l
+// GFX: v_cmpx_nle_f16_e32 null, v2.l           ; encoding: [0x7c,0x04,0x18,0x7d]
+
+v_cmpx_nle_f16 -1, v2.l
+// GFX: v_cmpx_nle_f16_e32 -1, v2.l             ; encoding: [0xc1,0x04,0x18,0x7d]
+
+v_cmpx_nle_f16 0.5, v2.l
+// GFX: v_cmpx_nle_f16_e32 0.5, v2.l            ; encoding: [0xf0,0x04,0x18,0x7d]
+
+v_cmpx_nle_f16 src_scc, v2.l
+// GFX: v_cmpx_nle_f16_e32 src_scc, v2.l        ; encoding: [0xfd,0x04,0x18,0x7d]
+
+v_cmpx_nle_f16 0xfe0b, v127.l
+// GFX: v_cmpx_nle_f16_e32 0xfe0b, v127.l       ; encoding: [0xff,0xfe,0x18,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_nle_f16 v1.h, v2.l
+// GFX: v_cmpx_nle_f16_e32 v1.h, v2.l           ; encoding: [0x81,0x05,0x18,0x7d]
+
+v_cmpx_nle_f16 v127.h, v2.l
+// GFX: v_cmpx_nle_f16_e32 v127.h, v2.l         ; encoding: [0xff,0x05,0x18,0x7d]
+
+v_cmpx_nle_f16 src_scc, v2.h
+// GFX: v_cmpx_nle_f16_e32 src_scc, v2.h        ; encoding: [0xfd,0x04,0x19,0x7d]
+
+v_cmpx_nle_f16 0xfe0b, v127.h
+// GFX: v_cmpx_nle_f16_e32 0xfe0b, v127.h       ; encoding: [0xff,0xfe,0x19,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_nle_f32 v1, v2
+// GFX: v_cmpx_nle_f32_e32 v1, v2               ; encoding: [0x01,0x05,0x38,0x7d]
+
+v_cmpx_nle_f32 v255, v2
+// GFX: v_cmpx_nle_f32_e32 v255, v2             ; encoding: [0xff,0x05,0x38,0x7d]
+
+v_cmpx_nle_f32 s1, v2
+// GFX: v_cmpx_nle_f32_e32 s1, v2               ; encoding: [0x01,0x04,0x38,0x7d]
+
+v_cmpx_nle_f32 s105, v2
+// GFX: v_cmpx_nle_f32_e32 s105, v2             ; encoding: [0x69,0x04,0x38,0x7d]
+
+v_cmpx_nle_f32 vcc_lo, v2
+// GFX: v_cmpx_nle_f32_e32 vcc_lo, v2           ; encoding: [0x6a,0x04,0x38,0x7d]
+
+v_cmpx_nle_f32 vcc_hi, v2
+// GFX: v_cmpx_nle_f32_e32 vcc_hi, v2           ; encoding: [0x6b,0x04,0x38,0x7d]
+
+v_cmpx_nle_f32 ttmp15, v2
+// GFX: v_cmpx_nle_f32_e32 ttmp15, v2           ; encoding: [0x7b,0x04,0x38,0x7d]
+
+v_cmpx_nle_f32 m0, v2
+// GFX: v_cmpx_nle_f32_e32 m0, v2               ; encoding: [0x7d,0x04,0x38,0x7d]
+
+v_cmpx_nle_f32 exec_lo, v2
+// GFX: v_cmpx_nle_f32_e32 exec_lo, v2          ; encoding: [0x7e,0x04,0x38,0x7d]
+
+v_cmpx_nle_f32 exec_hi, v2
+// GFX: v_cmpx_nle_f32_e32 exec_hi, v2          ; encoding: [0x7f,0x04,0x38,0x7d]
+
+v_cmpx_nle_f32 null, v2
+// GFX: v_cmpx_nle_f32_e32 null, v2             ; encoding: [0x7c,0x04,0x38,0x7d]
+
+v_cmpx_nle_f32 -1, v2
+// GFX: v_cmpx_nle_f32_e32 -1, v2               ; encoding: [0xc1,0x04,0x38,0x7d]
+
+v_cmpx_nle_f32 0.5, v2
+// GFX: v_cmpx_nle_f32_e32 0.5, v2              ; encoding: [0xf0,0x04,0x38,0x7d]
+
+v_cmpx_nle_f32 src_scc, v2
+// GFX: v_cmpx_nle_f32_e32 src_scc, v2          ; encoding: [0xfd,0x04,0x38,0x7d]
+
+v_cmpx_nle_f32 0xaf123456, v255
+// GFX: v_cmpx_nle_f32_e32 0xaf123456, v255     ; encoding: [0xff,0xfe,0x39,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_nle_f64 v[1:2], v[2:3]
+// GFX: v_cmpx_nle_f64_e32 v[1:2], v[2:3]       ; encoding: [0x01,0x05,0x58,0x7d]
+
+v_cmpx_nle_f64 v[254:255], v[2:3]
+// GFX: v_cmpx_nle_f64_e32 v[254:255], v[2:3]   ; encoding: [0xfe,0x05,0x58,0x7d]
+
+v_cmpx_nle_f64 s[2:3], v[2:3]
+// GFX: v_cmpx_nle_f64_e32 s[2:3], v[2:3]       ; encoding: [0x02,0x04,0x58,0x7d]
+
+v_cmpx_nle_f64 s[104:105], v[2:3]
+// GFX: v_cmpx_nle_f64_e32 s[104:105], v[2:3]   ; encoding: [0x68,0x04,0x58,0x7d]
+
+v_cmpx_nle_f64 vcc, v[2:3]
+// GFX: v_cmpx_nle_f64_e32 vcc, v[2:3]          ; encoding: [0x6a,0x04,0x58,0x7d]
+
+v_cmpx_nle_f64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_nle_f64_e32 ttmp[14:15], v[2:3]  ; encoding: [0x7a,0x04,0x58,0x7d]
+
+v_cmpx_nle_f64 exec, v[2:3]
+// GFX: v_cmpx_nle_f64_e32 exec, v[2:3]         ; encoding: [0x7e,0x04,0x58,0x7d]
+
+v_cmpx_nle_f64 null, v[2:3]
+// GFX: v_cmpx_nle_f64_e32 null, v[2:3]         ; encoding: [0x7c,0x04,0x58,0x7d]
+
+v_cmpx_nle_f64 -1, v[2:3]
+// GFX: v_cmpx_nle_f64_e32 -1, v[2:3]           ; encoding: [0xc1,0x04,0x58,0x7d]
+
+v_cmpx_nle_f64 0.5, v[2:3]
+// GFX: v_cmpx_nle_f64_e32 0.5, v[2:3]          ; encoding: [0xf0,0x04,0x58,0x7d]
+
+v_cmpx_nle_f64 src_scc, v[2:3]
+// GFX: v_cmpx_nle_f64_e32 src_scc, v[2:3]      ; encoding: [0xfd,0x04,0x58,0x7d]
+
+v_cmpx_nle_f64 0xaf123456, v[254:255]
+// GFX: v_cmpx_nle_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x59,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_nlg_f16 v1.l, v2.l
+// GFX: v_cmpx_nlg_f16_e32 v1.l, v2.l           ; encoding: [0x01,0x05,0x14,0x7d]
+
+v_cmpx_nlg_f16 v127.l, v2.l
+// GFX: v_cmpx_nlg_f16_e32 v127.l, v2.l         ; encoding: [0x7f,0x05,0x14,0x7d]
+
+v_cmpx_nlg_f16 s1, v2.l
+// GFX: v_cmpx_nlg_f16_e32 s1, v2.l             ; encoding: [0x01,0x04,0x14,0x7d]
+
+v_cmpx_nlg_f16 s105, v2.l
+// GFX: v_cmpx_nlg_f16_e32 s105, v2.l           ; encoding: [0x69,0x04,0x14,0x7d]
+
+v_cmpx_nlg_f16 vcc_lo, v2.l
+// GFX: v_cmpx_nlg_f16_e32 vcc_lo, v2.l         ; encoding: [0x6a,0x04,0x14,0x7d]
+
+v_cmpx_nlg_f16 vcc_hi, v2.l
+// GFX: v_cmpx_nlg_f16_e32 vcc_hi, v2.l         ; encoding: [0x6b,0x04,0x14,0x7d]
+
+v_cmpx_nlg_f16 ttmp15, v2.l
+// GFX: v_cmpx_nlg_f16_e32 ttmp15, v2.l         ; encoding: [0x7b,0x04,0x14,0x7d]
+
+v_cmpx_nlg_f16 m0, v2.l
+// GFX: v_cmpx_nlg_f16_e32 m0, v2.l             ; encoding: [0x7d,0x04,0x14,0x7d]
+
+v_cmpx_nlg_f16 exec_lo, v2.l
+// GFX: v_cmpx_nlg_f16_e32 exec_lo, v2.l        ; encoding: [0x7e,0x04,0x14,0x7d]
+
+v_cmpx_nlg_f16 exec_hi, v2.l
+// GFX: v_cmpx_nlg_f16_e32 exec_hi, v2.l        ; encoding: [0x7f,0x04,0x14,0x7d]
+
+v_cmpx_nlg_f16 null, v2.l
+// GFX: v_cmpx_nlg_f16_e32 null, v2.l           ; encoding: [0x7c,0x04,0x14,0x7d]
+
+v_cmpx_nlg_f16 -1, v2.l
+// GFX: v_cmpx_nlg_f16_e32 -1, v2.l             ; encoding: [0xc1,0x04,0x14,0x7d]
+
+v_cmpx_nlg_f16 0.5, v2.l
+// GFX: v_cmpx_nlg_f16_e32 0.5, v2.l            ; encoding: [0xf0,0x04,0x14,0x7d]
+
+v_cmpx_nlg_f16 src_scc, v2.l
+// GFX: v_cmpx_nlg_f16_e32 src_scc, v2.l        ; encoding: [0xfd,0x04,0x14,0x7d]
+
+v_cmpx_nlg_f16 0xfe0b, v127.l
+// GFX: v_cmpx_nlg_f16_e32 0xfe0b, v127.l       ; encoding: [0xff,0xfe,0x14,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_nlg_f16 v1.h, v2.l
+// GFX: v_cmpx_nlg_f16_e32 v1.h, v2.l           ; encoding: [0x81,0x05,0x14,0x7d]
+
+v_cmpx_nlg_f16 v127.h, v2.l
+// GFX: v_cmpx_nlg_f16_e32 v127.h, v2.l         ; encoding: [0xff,0x05,0x14,0x7d]
+
+v_cmpx_nlg_f16 src_scc, v2.h
+// GFX: v_cmpx_nlg_f16_e32 src_scc, v2.h        ; encoding: [0xfd,0x04,0x15,0x7d]
+
+v_cmpx_nlg_f16 0xfe0b, v127.h
+// GFX: v_cmpx_nlg_f16_e32 0xfe0b, v127.h       ; encoding: [0xff,0xfe,0x15,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_nlg_f32 v1, v2
+// GFX: v_cmpx_nlg_f32_e32 v1, v2               ; encoding: [0x01,0x05,0x34,0x7d]
+
+v_cmpx_nlg_f32 v255, v2
+// GFX: v_cmpx_nlg_f32_e32 v255, v2             ; encoding: [0xff,0x05,0x34,0x7d]
+
+v_cmpx_nlg_f32 s1, v2
+// GFX: v_cmpx_nlg_f32_e32 s1, v2               ; encoding: [0x01,0x04,0x34,0x7d]
+
+v_cmpx_nlg_f32 s105, v2
+// GFX: v_cmpx_nlg_f32_e32 s105, v2             ; encoding: [0x69,0x04,0x34,0x7d]
+
+v_cmpx_nlg_f32 vcc_lo, v2
+// GFX: v_cmpx_nlg_f32_e32 vcc_lo, v2           ; encoding: [0x6a,0x04,0x34,0x7d]
+
+v_cmpx_nlg_f32 vcc_hi, v2
+// GFX: v_cmpx_nlg_f32_e32 vcc_hi, v2           ; encoding: [0x6b,0x04,0x34,0x7d]
+
+v_cmpx_nlg_f32 ttmp15, v2
+// GFX: v_cmpx_nlg_f32_e32 ttmp15, v2           ; encoding: [0x7b,0x04,0x34,0x7d]
+
+v_cmpx_nlg_f32 m0, v2
+// GFX: v_cmpx_nlg_f32_e32 m0, v2               ; encoding: [0x7d,0x04,0x34,0x7d]
+
+v_cmpx_nlg_f32 exec_lo, v2
+// GFX: v_cmpx_nlg_f32_e32 exec_lo, v2          ; encoding: [0x7e,0x04,0x34,0x7d]
+
+v_cmpx_nlg_f32 exec_hi, v2
+// GFX: v_cmpx_nlg_f32_e32 exec_hi, v2          ; encoding: [0x7f,0x04,0x34,0x7d]
+
+v_cmpx_nlg_f32 null, v2
+// GFX: v_cmpx_nlg_f32_e32 null, v2             ; encoding: [0x7c,0x04,0x34,0x7d]
+
+v_cmpx_nlg_f32 -1, v2
+// GFX: v_cmpx_nlg_f32_e32 -1, v2               ; encoding: [0xc1,0x04,0x34,0x7d]
+
+v_cmpx_nlg_f32 0.5, v2
+// GFX: v_cmpx_nlg_f32_e32 0.5, v2              ; encoding: [0xf0,0x04,0x34,0x7d]
+
+v_cmpx_nlg_f32 src_scc, v2
+// GFX: v_cmpx_nlg_f32_e32 src_scc, v2          ; encoding: [0xfd,0x04,0x34,0x7d]
+
+v_cmpx_nlg_f32 0xaf123456, v255
+// GFX: v_cmpx_nlg_f32_e32 0xaf123456, v255     ; encoding: [0xff,0xfe,0x35,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_nlg_f64 v[1:2], v[2:3]
+// GFX: v_cmpx_nlg_f64_e32 v[1:2], v[2:3]       ; encoding: [0x01,0x05,0x54,0x7d]
+
+v_cmpx_nlg_f64 v[254:255], v[2:3]
+// GFX: v_cmpx_nlg_f64_e32 v[254:255], v[2:3]   ; encoding: [0xfe,0x05,0x54,0x7d]
+
+v_cmpx_nlg_f64 s[2:3], v[2:3]
+// GFX: v_cmpx_nlg_f64_e32 s[2:3], v[2:3]       ; encoding: [0x02,0x04,0x54,0x7d]
+
+v_cmpx_nlg_f64 s[104:105], v[2:3]
+// GFX: v_cmpx_nlg_f64_e32 s[104:105], v[2:3]   ; encoding: [0x68,0x04,0x54,0x7d]
+
+v_cmpx_nlg_f64 vcc, v[2:3]
+// GFX: v_cmpx_nlg_f64_e32 vcc, v[2:3]          ; encoding: [0x6a,0x04,0x54,0x7d]
+
+v_cmpx_nlg_f64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_nlg_f64_e32 ttmp[14:15], v[2:3]  ; encoding: [0x7a,0x04,0x54,0x7d]
+
+v_cmpx_nlg_f64 exec, v[2:3]
+// GFX: v_cmpx_nlg_f64_e32 exec, v[2:3]         ; encoding: [0x7e,0x04,0x54,0x7d]
+
+v_cmpx_nlg_f64 null, v[2:3]
+// GFX: v_cmpx_nlg_f64_e32 null, v[2:3]         ; encoding: [0x7c,0x04,0x54,0x7d]
+
+v_cmpx_nlg_f64 -1, v[2:3]
+// GFX: v_cmpx_nlg_f64_e32 -1, v[2:3]           ; encoding: [0xc1,0x04,0x54,0x7d]
+
+v_cmpx_nlg_f64 0.5, v[2:3]
+// GFX: v_cmpx_nlg_f64_e32 0.5, v[2:3]          ; encoding: [0xf0,0x04,0x54,0x7d]
+
+v_cmpx_nlg_f64 src_scc, v[2:3]
+// GFX: v_cmpx_nlg_f64_e32 src_scc, v[2:3]      ; encoding: [0xfd,0x04,0x54,0x7d]
+
+v_cmpx_nlg_f64 0xaf123456, v[254:255]
+// GFX: v_cmpx_nlg_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x55,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_nlt_f16 v1.l, v2.l
+// GFX: v_cmpx_nlt_f16_e32 v1.l, v2.l           ; encoding: [0x01,0x05,0x1c,0x7d]
+
+v_cmpx_nlt_f16 v127.l, v2.l
+// GFX: v_cmpx_nlt_f16_e32 v127.l, v2.l         ; encoding: [0x7f,0x05,0x1c,0x7d]
+
+v_cmpx_nlt_f16 s1, v2.l
+// GFX: v_cmpx_nlt_f16_e32 s1, v2.l             ; encoding: [0x01,0x04,0x1c,0x7d]
+
+v_cmpx_nlt_f16 s105, v2.l
+// GFX: v_cmpx_nlt_f16_e32 s105, v2.l           ; encoding: [0x69,0x04,0x1c,0x7d]
+
+v_cmpx_nlt_f16 vcc_lo, v2.l
+// GFX: v_cmpx_nlt_f16_e32 vcc_lo, v2.l         ; encoding: [0x6a,0x04,0x1c,0x7d]
+
+v_cmpx_nlt_f16 vcc_hi, v2.l
+// GFX: v_cmpx_nlt_f16_e32 vcc_hi, v2.l         ; encoding: [0x6b,0x04,0x1c,0x7d]
+
+v_cmpx_nlt_f16 ttmp15, v2.l
+// GFX: v_cmpx_nlt_f16_e32 ttmp15, v2.l         ; encoding: [0x7b,0x04,0x1c,0x7d]
+
+v_cmpx_nlt_f16 m0, v2.l
+// GFX: v_cmpx_nlt_f16_e32 m0, v2.l             ; encoding: [0x7d,0x04,0x1c,0x7d]
+
+v_cmpx_nlt_f16 exec_lo, v2.l
+// GFX: v_cmpx_nlt_f16_e32 exec_lo, v2.l        ; encoding: [0x7e,0x04,0x1c,0x7d]
+
+v_cmpx_nlt_f16 exec_hi, v2.l
+// GFX: v_cmpx_nlt_f16_e32 exec_hi, v2.l        ; encoding: [0x7f,0x04,0x1c,0x7d]
+
+v_cmpx_nlt_f16 null, v2.l
+// GFX: v_cmpx_nlt_f16_e32 null, v2.l           ; encoding: [0x7c,0x04,0x1c,0x7d]
+
+v_cmpx_nlt_f16 -1, v2.l
+// GFX: v_cmpx_nlt_f16_e32 -1, v2.l             ; encoding: [0xc1,0x04,0x1c,0x7d]
+
+v_cmpx_nlt_f16 0.5, v2.l
+// GFX: v_cmpx_nlt_f16_e32 0.5, v2.l            ; encoding: [0xf0,0x04,0x1c,0x7d]
+
+v_cmpx_nlt_f16 src_scc, v2.l
+// GFX: v_cmpx_nlt_f16_e32 src_scc, v2.l        ; encoding: [0xfd,0x04,0x1c,0x7d]
+
+v_cmpx_nlt_f16 0xfe0b, v127.l
+// GFX: v_cmpx_nlt_f16_e32 0xfe0b, v127.l       ; encoding: [0xff,0xfe,0x1c,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_nlt_f16 v1.h, v2.l
+// GFX: v_cmpx_nlt_f16_e32 v1.h, v2.l           ; encoding: [0x81,0x05,0x1c,0x7d]
+
+v_cmpx_nlt_f16 v127.h, v2.l
+// GFX: v_cmpx_nlt_f16_e32 v127.h, v2.l         ; encoding: [0xff,0x05,0x1c,0x7d]
+
+v_cmpx_nlt_f16 src_scc, v2.h
+// GFX: v_cmpx_nlt_f16_e32 src_scc, v2.h        ; encoding: [0xfd,0x04,0x1d,0x7d]
+
+v_cmpx_nlt_f16 0xfe0b, v127.h
+// GFX: v_cmpx_nlt_f16_e32 0xfe0b, v127.h       ; encoding: [0xff,0xfe,0x1d,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_nlt_f32 v1, v2
+// GFX: v_cmpx_nlt_f32_e32 v1, v2               ; encoding: [0x01,0x05,0x3c,0x7d]
+
+v_cmpx_nlt_f32 v255, v2
+// GFX: v_cmpx_nlt_f32_e32 v255, v2             ; encoding: [0xff,0x05,0x3c,0x7d]
+
+v_cmpx_nlt_f32 s1, v2
+// GFX: v_cmpx_nlt_f32_e32 s1, v2               ; encoding: [0x01,0x04,0x3c,0x7d]
+
+v_cmpx_nlt_f32 s105, v2
+// GFX: v_cmpx_nlt_f32_e32 s105, v2             ; encoding: [0x69,0x04,0x3c,0x7d]
+
+v_cmpx_nlt_f32 vcc_lo, v2
+// GFX: v_cmpx_nlt_f32_e32 vcc_lo, v2           ; encoding: [0x6a,0x04,0x3c,0x7d]
+
+v_cmpx_nlt_f32 vcc_hi, v2
+// GFX: v_cmpx_nlt_f32_e32 vcc_hi, v2           ; encoding: [0x6b,0x04,0x3c,0x7d]
+
+v_cmpx_nlt_f32 ttmp15, v2
+// GFX: v_cmpx_nlt_f32_e32 ttmp15, v2           ; encoding: [0x7b,0x04,0x3c,0x7d]
+
+v_cmpx_nlt_f32 m0, v2
+// GFX: v_cmpx_nlt_f32_e32 m0, v2               ; encoding: [0x7d,0x04,0x3c,0x7d]
+
+v_cmpx_nlt_f32 exec_lo, v2
+// GFX: v_cmpx_nlt_f32_e32 exec_lo, v2          ; encoding: [0x7e,0x04,0x3c,0x7d]
+
+v_cmpx_nlt_f32 exec_hi, v2
+// GFX: v_cmpx_nlt_f32_e32 exec_hi, v2          ; encoding: [0x7f,0x04,0x3c,0x7d]
+
+v_cmpx_nlt_f32 null, v2
+// GFX: v_cmpx_nlt_f32_e32 null, v2             ; encoding: [0x7c,0x04,0x3c,0x7d]
+
+v_cmpx_nlt_f32 -1, v2
+// GFX: v_cmpx_nlt_f32_e32 -1, v2               ; encoding: [0xc1,0x04,0x3c,0x7d]
+
+v_cmpx_nlt_f32 0.5, v2
+// GFX: v_cmpx_nlt_f32_e32 0.5, v2              ; encoding: [0xf0,0x04,0x3c,0x7d]
+
+v_cmpx_nlt_f32 src_scc, v2
+// GFX: v_cmpx_nlt_f32_e32 src_scc, v2          ; encoding: [0xfd,0x04,0x3c,0x7d]
+
+v_cmpx_nlt_f32 0xaf123456, v255
+// GFX: v_cmpx_nlt_f32_e32 0xaf123456, v255     ; encoding: [0xff,0xfe,0x3d,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_nlt_f64 v[1:2], v[2:3]
+// GFX: v_cmpx_nlt_f64_e32 v[1:2], v[2:3]       ; encoding: [0x01,0x05,0x5c,0x7d]
+
+v_cmpx_nlt_f64 v[254:255], v[2:3]
+// GFX: v_cmpx_nlt_f64_e32 v[254:255], v[2:3]   ; encoding: [0xfe,0x05,0x5c,0x7d]
+
+v_cmpx_nlt_f64 s[2:3], v[2:3]
+// GFX: v_cmpx_nlt_f64_e32 s[2:3], v[2:3]       ; encoding: [0x02,0x04,0x5c,0x7d]
+
+v_cmpx_nlt_f64 s[104:105], v[2:3]
+// GFX: v_cmpx_nlt_f64_e32 s[104:105], v[2:3]   ; encoding: [0x68,0x04,0x5c,0x7d]
+
+v_cmpx_nlt_f64 vcc, v[2:3]
+// GFX: v_cmpx_nlt_f64_e32 vcc, v[2:3]          ; encoding: [0x6a,0x04,0x5c,0x7d]
+
+v_cmpx_nlt_f64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_nlt_f64_e32 ttmp[14:15], v[2:3]  ; encoding: [0x7a,0x04,0x5c,0x7d]
+
+v_cmpx_nlt_f64 exec, v[2:3]
+// GFX: v_cmpx_nlt_f64_e32 exec, v[2:3]         ; encoding: [0x7e,0x04,0x5c,0x7d]
+
+v_cmpx_nlt_f64 null, v[2:3]
+// GFX: v_cmpx_nlt_f64_e32 null, v[2:3]         ; encoding: [0x7c,0x04,0x5c,0x7d]
+
+v_cmpx_nlt_f64 -1, v[2:3]
+// GFX: v_cmpx_nlt_f64_e32 -1, v[2:3]           ; encoding: [0xc1,0x04,0x5c,0x7d]
+
+v_cmpx_nlt_f64 0.5, v[2:3]
+// GFX: v_cmpx_nlt_f64_e32 0.5, v[2:3]          ; encoding: [0xf0,0x04,0x5c,0x7d]
+
+v_cmpx_nlt_f64 src_scc, v[2:3]
+// GFX: v_cmpx_nlt_f64_e32 src_scc, v[2:3]      ; encoding: [0xfd,0x04,0x5c,0x7d]
+
+v_cmpx_nlt_f64 0xaf123456, v[254:255]
+// GFX: v_cmpx_nlt_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5d,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_o_f16 v1.l, v2.l
+// GFX: v_cmpx_o_f16_e32 v1.l, v2.l             ; encoding: [0x01,0x05,0x0e,0x7d]
+
+v_cmpx_o_f16 v127.l, v2.l
+// GFX: v_cmpx_o_f16_e32 v127.l, v2.l           ; encoding: [0x7f,0x05,0x0e,0x7d]
+
+v_cmpx_o_f16 s1, v2.l
+// GFX: v_cmpx_o_f16_e32 s1, v2.l               ; encoding: [0x01,0x04,0x0e,0x7d]
+
+v_cmpx_o_f16 s105, v2.l
+// GFX: v_cmpx_o_f16_e32 s105, v2.l             ; encoding: [0x69,0x04,0x0e,0x7d]
+
+v_cmpx_o_f16 vcc_lo, v2.l
+// GFX: v_cmpx_o_f16_e32 vcc_lo, v2.l           ; encoding: [0x6a,0x04,0x0e,0x7d]
+
+v_cmpx_o_f16 vcc_hi, v2.l
+// GFX: v_cmpx_o_f16_e32 vcc_hi, v2.l           ; encoding: [0x6b,0x04,0x0e,0x7d]
+
+v_cmpx_o_f16 ttmp15, v2.l
+// GFX: v_cmpx_o_f16_e32 ttmp15, v2.l           ; encoding: [0x7b,0x04,0x0e,0x7d]
+
+v_cmpx_o_f16 m0, v2.l
+// GFX: v_cmpx_o_f16_e32 m0, v2.l               ; encoding: [0x7d,0x04,0x0e,0x7d]
+
+v_cmpx_o_f16 exec_lo, v2.l
+// GFX: v_cmpx_o_f16_e32 exec_lo, v2.l          ; encoding: [0x7e,0x04,0x0e,0x7d]
+
+v_cmpx_o_f16 exec_hi, v2.l
+// GFX: v_cmpx_o_f16_e32 exec_hi, v2.l          ; encoding: [0x7f,0x04,0x0e,0x7d]
+
+v_cmpx_o_f16 null, v2.l
+// GFX: v_cmpx_o_f16_e32 null, v2.l             ; encoding: [0x7c,0x04,0x0e,0x7d]
+
+v_cmpx_o_f16 -1, v2.l
+// GFX: v_cmpx_o_f16_e32 -1, v2.l               ; encoding: [0xc1,0x04,0x0e,0x7d]
+
+v_cmpx_o_f16 0.5, v2.l
+// GFX: v_cmpx_o_f16_e32 0.5, v2.l              ; encoding: [0xf0,0x04,0x0e,0x7d]
+
+v_cmpx_o_f16 src_scc, v2.l
+// GFX: v_cmpx_o_f16_e32 src_scc, v2.l          ; encoding: [0xfd,0x04,0x0e,0x7d]
+
+v_cmpx_o_f16 0xfe0b, v127.l
+// GFX: v_cmpx_o_f16_e32 0xfe0b, v127.l         ; encoding: [0xff,0xfe,0x0e,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_o_f16 v1.h, v2.l
+// GFX: v_cmpx_o_f16_e32 v1.h, v2.l             ; encoding: [0x81,0x05,0x0e,0x7d]
+
+v_cmpx_o_f16 v127.h, v2.l
+// GFX: v_cmpx_o_f16_e32 v127.h, v2.l           ; encoding: [0xff,0x05,0x0e,0x7d]
+
+v_cmpx_o_f16 src_scc, v2.h
+// GFX: v_cmpx_o_f16_e32 src_scc, v2.h          ; encoding: [0xfd,0x04,0x0f,0x7d]
+
+v_cmpx_o_f16 0xfe0b, v127.h
+// GFX: v_cmpx_o_f16_e32 0xfe0b, v127.h         ; encoding: [0xff,0xfe,0x0f,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_o_f32 v1, v2
+// GFX: v_cmpx_o_f32_e32 v1, v2                 ; encoding: [0x01,0x05,0x2e,0x7d]
+
+v_cmpx_o_f32 v255, v2
+// GFX: v_cmpx_o_f32_e32 v255, v2               ; encoding: [0xff,0x05,0x2e,0x7d]
+
+v_cmpx_o_f32 s1, v2
+// GFX: v_cmpx_o_f32_e32 s1, v2                 ; encoding: [0x01,0x04,0x2e,0x7d]
+
+v_cmpx_o_f32 s105, v2
+// GFX: v_cmpx_o_f32_e32 s105, v2               ; encoding: [0x69,0x04,0x2e,0x7d]
+
+v_cmpx_o_f32 vcc_lo, v2
+// GFX: v_cmpx_o_f32_e32 vcc_lo, v2             ; encoding: [0x6a,0x04,0x2e,0x7d]
+
+v_cmpx_o_f32 vcc_hi, v2
+// GFX: v_cmpx_o_f32_e32 vcc_hi, v2             ; encoding: [0x6b,0x04,0x2e,0x7d]
+
+v_cmpx_o_f32 ttmp15, v2
+// GFX: v_cmpx_o_f32_e32 ttmp15, v2             ; encoding: [0x7b,0x04,0x2e,0x7d]
+
+v_cmpx_o_f32 m0, v2
+// GFX: v_cmpx_o_f32_e32 m0, v2                 ; encoding: [0x7d,0x04,0x2e,0x7d]
+
+v_cmpx_o_f32 exec_lo, v2
+// GFX: v_cmpx_o_f32_e32 exec_lo, v2            ; encoding: [0x7e,0x04,0x2e,0x7d]
+
+v_cmpx_o_f32 exec_hi, v2
+// GFX: v_cmpx_o_f32_e32 exec_hi, v2            ; encoding: [0x7f,0x04,0x2e,0x7d]
+
+v_cmpx_o_f32 null, v2
+// GFX: v_cmpx_o_f32_e32 null, v2               ; encoding: [0x7c,0x04,0x2e,0x7d]
+
+v_cmpx_o_f32 -1, v2
+// GFX: v_cmpx_o_f32_e32 -1, v2                 ; encoding: [0xc1,0x04,0x2e,0x7d]
+
+v_cmpx_o_f32 0.5, v2
+// GFX: v_cmpx_o_f32_e32 0.5, v2                ; encoding: [0xf0,0x04,0x2e,0x7d]
+
+v_cmpx_o_f32 src_scc, v2
+// GFX: v_cmpx_o_f32_e32 src_scc, v2            ; encoding: [0xfd,0x04,0x2e,0x7d]
+
+v_cmpx_o_f32 0xaf123456, v255
+// GFX: v_cmpx_o_f32_e32 0xaf123456, v255       ; encoding: [0xff,0xfe,0x2f,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_o_f64 v[1:2], v[2:3]
+// GFX: v_cmpx_o_f64_e32 v[1:2], v[2:3]         ; encoding: [0x01,0x05,0x4e,0x7d]
+
+v_cmpx_o_f64 v[254:255], v[2:3]
+// GFX: v_cmpx_o_f64_e32 v[254:255], v[2:3]     ; encoding: [0xfe,0x05,0x4e,0x7d]
+
+v_cmpx_o_f64 s[2:3], v[2:3]
+// GFX: v_cmpx_o_f64_e32 s[2:3], v[2:3]         ; encoding: [0x02,0x04,0x4e,0x7d]
+
+v_cmpx_o_f64 s[104:105], v[2:3]
+// GFX: v_cmpx_o_f64_e32 s[104:105], v[2:3]     ; encoding: [0x68,0x04,0x4e,0x7d]
+
+v_cmpx_o_f64 vcc, v[2:3]
+// GFX: v_cmpx_o_f64_e32 vcc, v[2:3]            ; encoding: [0x6a,0x04,0x4e,0x7d]
+
+v_cmpx_o_f64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_o_f64_e32 ttmp[14:15], v[2:3]    ; encoding: [0x7a,0x04,0x4e,0x7d]
+
+v_cmpx_o_f64 exec, v[2:3]
+// GFX: v_cmpx_o_f64_e32 exec, v[2:3]           ; encoding: [0x7e,0x04,0x4e,0x7d]
+
+v_cmpx_o_f64 null, v[2:3]
+// GFX: v_cmpx_o_f64_e32 null, v[2:3]           ; encoding: [0x7c,0x04,0x4e,0x7d]
+
+v_cmpx_o_f64 -1, v[2:3]
+// GFX: v_cmpx_o_f64_e32 -1, v[2:3]             ; encoding: [0xc1,0x04,0x4e,0x7d]
+
+v_cmpx_o_f64 0.5, v[2:3]
+// GFX: v_cmpx_o_f64_e32 0.5, v[2:3]            ; encoding: [0xf0,0x04,0x4e,0x7d]
+
+v_cmpx_o_f64 src_scc, v[2:3]
+// GFX: v_cmpx_o_f64_e32 src_scc, v[2:3]        ; encoding: [0xfd,0x04,0x4e,0x7d]
+
+v_cmpx_o_f64 0xaf123456, v[254:255]
+// GFX: v_cmpx_o_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4f,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_u_f16 v1.l, v2.l
+// GFX: v_cmpx_u_f16_e32 v1.l, v2.l             ; encoding: [0x01,0x05,0x10,0x7d]
+
+v_cmpx_u_f16 v127.l, v2.l
+// GFX: v_cmpx_u_f16_e32 v127.l, v2.l           ; encoding: [0x7f,0x05,0x10,0x7d]
+
+v_cmpx_u_f16 s1, v2.l
+// GFX: v_cmpx_u_f16_e32 s1, v2.l               ; encoding: [0x01,0x04,0x10,0x7d]
+
+v_cmpx_u_f16 s105, v2.l
+// GFX: v_cmpx_u_f16_e32 s105, v2.l             ; encoding: [0x69,0x04,0x10,0x7d]
+
+v_cmpx_u_f16 vcc_lo, v2.l
+// GFX: v_cmpx_u_f16_e32 vcc_lo, v2.l           ; encoding: [0x6a,0x04,0x10,0x7d]
+
+v_cmpx_u_f16 vcc_hi, v2.l
+// GFX: v_cmpx_u_f16_e32 vcc_hi, v2.l           ; encoding: [0x6b,0x04,0x10,0x7d]
+
+v_cmpx_u_f16 ttmp15, v2.l
+// GFX: v_cmpx_u_f16_e32 ttmp15, v2.l           ; encoding: [0x7b,0x04,0x10,0x7d]
+
+v_cmpx_u_f16 m0, v2.l
+// GFX: v_cmpx_u_f16_e32 m0, v2.l               ; encoding: [0x7d,0x04,0x10,0x7d]
+
+v_cmpx_u_f16 exec_lo, v2.l
+// GFX: v_cmpx_u_f16_e32 exec_lo, v2.l          ; encoding: [0x7e,0x04,0x10,0x7d]
+
+v_cmpx_u_f16 exec_hi, v2.l
+// GFX: v_cmpx_u_f16_e32 exec_hi, v2.l          ; encoding: [0x7f,0x04,0x10,0x7d]
+
+v_cmpx_u_f16 null, v2.l
+// GFX: v_cmpx_u_f16_e32 null, v2.l             ; encoding: [0x7c,0x04,0x10,0x7d]
+
+v_cmpx_u_f16 -1, v2.l
+// GFX: v_cmpx_u_f16_e32 -1, v2.l               ; encoding: [0xc1,0x04,0x10,0x7d]
+
+v_cmpx_u_f16 0.5, v2.l
+// GFX: v_cmpx_u_f16_e32 0.5, v2.l              ; encoding: [0xf0,0x04,0x10,0x7d]
+
+v_cmpx_u_f16 src_scc, v2.l
+// GFX: v_cmpx_u_f16_e32 src_scc, v2.l          ; encoding: [0xfd,0x04,0x10,0x7d]
+
+v_cmpx_u_f16 0xfe0b, v127.l
+// GFX: v_cmpx_u_f16_e32 0xfe0b, v127.l         ; encoding: [0xff,0xfe,0x10,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_u_f16 v1.h, v2.l
+// GFX: v_cmpx_u_f16_e32 v1.h, v2.l             ; encoding: [0x81,0x05,0x10,0x7d]
+
+v_cmpx_u_f16 v127.h, v2.l
+// GFX: v_cmpx_u_f16_e32 v127.h, v2.l           ; encoding: [0xff,0x05,0x10,0x7d]
+
+v_cmpx_u_f16 src_scc, v2.h
+// GFX: v_cmpx_u_f16_e32 src_scc, v2.h          ; encoding: [0xfd,0x04,0x11,0x7d]
+
+v_cmpx_u_f16 0xfe0b, v127.h
+// GFX: v_cmpx_u_f16_e32 0xfe0b, v127.h         ; encoding: [0xff,0xfe,0x11,0x7d,0x0b,0xfe,0x00,0x00]
+
+v_cmpx_u_f32 v1, v2
+// GFX: v_cmpx_u_f32_e32 v1, v2                 ; encoding: [0x01,0x05,0x30,0x7d]
+
+v_cmpx_u_f32 v255, v2
+// GFX: v_cmpx_u_f32_e32 v255, v2               ; encoding: [0xff,0x05,0x30,0x7d]
+
+v_cmpx_u_f32 s1, v2
+// GFX: v_cmpx_u_f32_e32 s1, v2                 ; encoding: [0x01,0x04,0x30,0x7d]
+
+v_cmpx_u_f32 s105, v2
+// GFX: v_cmpx_u_f32_e32 s105, v2               ; encoding: [0x69,0x04,0x30,0x7d]
+
+v_cmpx_u_f32 vcc_lo, v2
+// GFX: v_cmpx_u_f32_e32 vcc_lo, v2             ; encoding: [0x6a,0x04,0x30,0x7d]
+
+v_cmpx_u_f32 vcc_hi, v2
+// GFX: v_cmpx_u_f32_e32 vcc_hi, v2             ; encoding: [0x6b,0x04,0x30,0x7d]
+
+v_cmpx_u_f32 ttmp15, v2
+// GFX: v_cmpx_u_f32_e32 ttmp15, v2             ; encoding: [0x7b,0x04,0x30,0x7d]
+
+v_cmpx_u_f32 m0, v2
+// GFX: v_cmpx_u_f32_e32 m0, v2                 ; encoding: [0x7d,0x04,0x30,0x7d]
+
+v_cmpx_u_f32 exec_lo, v2
+// GFX: v_cmpx_u_f32_e32 exec_lo, v2            ; encoding: [0x7e,0x04,0x30,0x7d]
+
+v_cmpx_u_f32 exec_hi, v2
+// GFX: v_cmpx_u_f32_e32 exec_hi, v2            ; encoding: [0x7f,0x04,0x30,0x7d]
+
+v_cmpx_u_f32 null, v2
+// GFX: v_cmpx_u_f32_e32 null, v2               ; encoding: [0x7c,0x04,0x30,0x7d]
+
+v_cmpx_u_f32 -1, v2
+// GFX: v_cmpx_u_f32_e32 -1, v2                 ; encoding: [0xc1,0x04,0x30,0x7d]
+
+v_cmpx_u_f32 0.5, v2
+// GFX: v_cmpx_u_f32_e32 0.5, v2                ; encoding: [0xf0,0x04,0x30,0x7d]
+
+v_cmpx_u_f32 src_scc, v2
+// GFX: v_cmpx_u_f32_e32 src_scc, v2            ; encoding: [0xfd,0x04,0x30,0x7d]
+
+v_cmpx_u_f32 0xaf123456, v255
+// GFX: v_cmpx_u_f32_e32 0xaf123456, v255       ; encoding: [0xff,0xfe,0x31,0x7d,0x56,0x34,0x12,0xaf]
+
+v_cmpx_u_f64 v[1:2], v[2:3]
+// GFX: v_cmpx_u_f64_e32 v[1:2], v[2:3]         ; encoding: [0x01,0x05,0x50,0x7d]
+
+v_cmpx_u_f64 v[254:255], v[2:3]
+// GFX: v_cmpx_u_f64_e32 v[254:255], v[2:3]     ; encoding: [0xfe,0x05,0x50,0x7d]
+
+v_cmpx_u_f64 s[2:3], v[2:3]
+// GFX: v_cmpx_u_f64_e32 s[2:3], v[2:3]         ; encoding: [0x02,0x04,0x50,0x7d]
+
+v_cmpx_u_f64 s[104:105], v[2:3]
+// GFX: v_cmpx_u_f64_e32 s[104:105], v[2:3]     ; encoding: [0x68,0x04,0x50,0x7d]
+
+v_cmpx_u_f64 vcc, v[2:3]
+// GFX: v_cmpx_u_f64_e32 vcc, v[2:3]            ; encoding: [0x6a,0x04,0x50,0x7d]
+
+v_cmpx_u_f64 ttmp[14:15], v[2:3]
+// GFX: v_cmpx_u_f64_e32 ttmp[14:15], v[2:3]    ; encoding: [0x7a,0x04,0x50,0x7d]
+
+v_cmpx_u_f64 exec, v[2:3]
+// GFX: v_cmpx_u_f64_e32 exec, v[2:3]           ; encoding: [0x7e,0x04,0x50,0x7d]
+
+v_cmpx_u_f64 null, v[2:3]
+// GFX: v_cmpx_u_f64_e32 null, v[2:3]           ; encoding: [0x7c,0x04,0x50,0x7d]
+
+v_cmpx_u_f64 -1, v[2:3]
+// GFX: v_cmpx_u_f64_e32 -1, v[2:3]             ; encoding: [0xc1,0x04,0x50,0x7d]
+
+v_cmpx_u_f64 0.5, v[2:3]
+// GFX: v_cmpx_u_f64_e32 0.5, v[2:3]            ; encoding: [0xf0,0x04,0x50,0x7d]
+
+v_cmpx_u_f64 src_scc, v[2:3]
+// GFX: v_cmpx_u_f64_e32 src_scc, v[2:3]        ; encoding: [0xfd,0x04,0x50,0x7d]
+
+v_cmpx_u_f64 0xaf123456, v[254:255]
+// GFX: v_cmpx_u_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x51,0x7d,0x56,0x34,0x12,0xaf]
+//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+// GFX12: {{.*}}
+// GFX13: {{.*}}

>From 2f732fcdcdd497fff3a1af661d145c1cd689cff0 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 13:30:39 +0530
Subject: [PATCH 27/55] Update literals.s

---
 llvm/test/MC/AMDGPU/literals.s | 11663 +++++--------------------------
 1 file changed, 1806 insertions(+), 9857 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/literals.s b/llvm/test/MC/AMDGPU/literals.s
index c3c8d941ad43f..886489350041f 100644
--- a/llvm/test/MC/AMDGPU/literals.s
+++ b/llvm/test/MC/AMDGPU/literals.s
@@ -1,9858 +1,1807 @@
 // NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefixes=W32,GFX12-W32 %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1310 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefixes=W32,GFX13-W32 %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s | FileCheck --check-prefixes=W64,GFX12-W64 %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1310 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s | FileCheck --check-prefixes=W64,GFX13-W64 %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1310 -mattr=+wavefrontsize32,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1310 -mattr=+wavefrontsize64,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
-
-v_cmp_class_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, v1.l, v2.l  ; encoding: [0x01,0x05,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, v127.l, v2.l ; encoding: [0x7f,0x05,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, s1, v2.l    ; encoding: [0x01,0x04,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, s105, v2.l  ; encoding: [0x69,0x04,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, vcc_lo, v2.l ; encoding: [0x6a,0x04,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, vcc_hi, v2.l ; encoding: [0x6b,0x04,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, ttmp15, v2.l ; encoding: [0x7b,0x04,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, m0, v2.l    ; encoding: [0x7d,0x04,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, null, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, null, v2.l  ; encoding: [0x7c,0x04,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, -1, v2.l    ; encoding: [0xc1,0x04,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, 0.5, v2.l   ; encoding: [0xf0,0x04,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_class_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0xfa,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, v1.l, v2.l     ; encoding: [0x01,0x05,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, v127.l, v2.l   ; encoding: [0x7f,0x05,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, s1, v2.l       ; encoding: [0x01,0x04,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, s105, v2.l     ; encoding: [0x69,0x04,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, ttmp15, v2.l   ; encoding: [0x7b,0x04,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, m0, v2.l       ; encoding: [0x7d,0x04,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, exec_lo, v2.l  ; encoding: [0x7e,0x04,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, exec_hi, v2.l  ; encoding: [0x7f,0x04,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, null, v2.l     ; encoding: [0x7c,0x04,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, -1, v2.l       ; encoding: [0xc1,0x04,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, 0.5, v2.l      ; encoding: [0xf0,0x04,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, src_scc, v2.l  ; encoding: [0xfd,0x04,0xfa,0x7c]
-
-v_cmp_class_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0xfa,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_class_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, v1.h, v2.l  ; encoding: [0x81,0x05,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, v1.h, v2.l     ; encoding: [0x81,0x05,0xfa,0x7c]
-
-v_cmp_class_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_class_f16_e32 vcc_lo, v127.h, v2.l ; encoding: [0xff,0x05,0xfa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, v127.h, v2.l   ; encoding: [0xff,0x05,0xfa,0x7c]
-
-v_cmp_class_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_class_f16_e32 vcc_lo, src_scc, v2.h ; encoding: [0xfd,0x04,0xfb,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, src_scc, v2.h  ; encoding: [0xfd,0x04,0xfb,0x7c]
-
-v_cmp_class_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_class_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0xfb,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f16_e32 vcc, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0xfb,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_class_f32 vcc_lo, v1, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, v1, v2      ; encoding: [0x01,0x05,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, v255, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, v255, v2    ; encoding: [0xff,0x05,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, s1, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, s1, v2      ; encoding: [0x01,0x04,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, s105, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, s105, v2    ; encoding: [0x69,0x04,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, vcc_lo, v2  ; encoding: [0x6a,0x04,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, vcc_hi, v2  ; encoding: [0x6b,0x04,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, ttmp15, v2  ; encoding: [0x7b,0x04,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, m0, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, m0, v2      ; encoding: [0x7d,0x04,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, exec_lo, v2 ; encoding: [0x7e,0x04,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, exec_hi, v2 ; encoding: [0x7f,0x04,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, null, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, null, v2    ; encoding: [0x7c,0x04,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, -1, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, -1, v2      ; encoding: [0xc1,0x04,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, 0.5, v2     ; encoding: [0xf0,0x04,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_class_f32_e32 vcc_lo, src_scc, v2 ; encoding: [0xfd,0x04,0xfc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_class_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0xfd,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, v1, v2         ; encoding: [0x01,0x05,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, v255, v2       ; encoding: [0xff,0x05,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, s1, v2         ; encoding: [0x01,0x04,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, s105, v2       ; encoding: [0x69,0x04,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, vcc_lo, v2     ; encoding: [0x6a,0x04,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, vcc_hi, v2     ; encoding: [0x6b,0x04,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, ttmp15, v2     ; encoding: [0x7b,0x04,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, m0, v2         ; encoding: [0x7d,0x04,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, exec_lo, v2    ; encoding: [0x7e,0x04,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, exec_hi, v2    ; encoding: [0x7f,0x04,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, null, v2       ; encoding: [0x7c,0x04,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, -1, v2         ; encoding: [0xc1,0x04,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, 0.5, v2        ; encoding: [0xf0,0x04,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, src_scc, v2    ; encoding: [0xfd,0x04,0xfc,0x7c]
-
-v_cmp_class_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0xfd,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_class_f64 vcc_lo, v[1:2], v2
-// W32: v_cmp_class_f64_e32 vcc_lo, v[1:2], v2  ; encoding: [0x01,0x05,0xfe,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f64 vcc_lo, v[254:255], v2
-// W32: v_cmp_class_f64_e32 vcc_lo, v[254:255], v2 ; encoding: [0xfe,0x05,0xfe,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f64 vcc_lo, s[2:3], v2
-// W32: v_cmp_class_f64_e32 vcc_lo, s[2:3], v2  ; encoding: [0x02,0x04,0xfe,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f64 vcc_lo, s[104:105], v2
-// W32: v_cmp_class_f64_e32 vcc_lo, s[104:105], v2 ; encoding: [0x68,0x04,0xfe,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f64 vcc_lo, vcc, v2
-// W32: v_cmp_class_f64_e32 vcc_lo, vcc, v2     ; encoding: [0x6a,0x04,0xfe,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f64 vcc_lo, ttmp[14:15], v2
-// W32: v_cmp_class_f64_e32 vcc_lo, ttmp[14:15], v2 ; encoding: [0x7a,0x04,0xfe,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f64 vcc_lo, exec, v2
-// W32: v_cmp_class_f64_e32 vcc_lo, exec, v2    ; encoding: [0x7e,0x04,0xfe,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f64 vcc_lo, null, v2
-// W32: v_cmp_class_f64_e32 vcc_lo, null, v2    ; encoding: [0x7c,0x04,0xfe,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f64 vcc_lo, -1, v2
-// W32: v_cmp_class_f64_e32 vcc_lo, -1, v2      ; encoding: [0xc1,0x04,0xfe,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f64 vcc_lo, 0.5, v2
-// W32: v_cmp_class_f64_e32 vcc_lo, 0.5, v2     ; encoding: [0xf0,0x04,0xfe,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f64 vcc_lo, src_scc, v2
-// W32: v_cmp_class_f64_e32 vcc_lo, src_scc, v2 ; encoding: [0xfd,0x04,0xfe,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f64 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_class_f64_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0xff,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_class_f64 vcc, v[1:2], v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f64_e32 vcc, v[1:2], v2     ; encoding: [0x01,0x05,0xfe,0x7c]
-
-v_cmp_class_f64 vcc, v[254:255], v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f64_e32 vcc, v[254:255], v2 ; encoding: [0xfe,0x05,0xfe,0x7c]
-
-v_cmp_class_f64 vcc, s[2:3], v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f64_e32 vcc, s[2:3], v2     ; encoding: [0x02,0x04,0xfe,0x7c]
-
-v_cmp_class_f64 vcc, s[104:105], v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f64_e32 vcc, s[104:105], v2 ; encoding: [0x68,0x04,0xfe,0x7c]
-
-v_cmp_class_f64 vcc, vcc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f64_e32 vcc, vcc, v2        ; encoding: [0x6a,0x04,0xfe,0x7c]
-
-v_cmp_class_f64 vcc, ttmp[14:15], v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f64_e32 vcc, ttmp[14:15], v2 ; encoding: [0x7a,0x04,0xfe,0x7c]
-
-v_cmp_class_f64 vcc, exec, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f64_e32 vcc, exec, v2       ; encoding: [0x7e,0x04,0xfe,0x7c]
-
-v_cmp_class_f64 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f64_e32 vcc, null, v2       ; encoding: [0x7c,0x04,0xfe,0x7c]
-
-v_cmp_class_f64 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f64_e32 vcc, -1, v2         ; encoding: [0xc1,0x04,0xfe,0x7c]
-
-v_cmp_class_f64 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f64_e32 vcc, 0.5, v2        ; encoding: [0xf0,0x04,0xfe,0x7c]
-
-v_cmp_class_f64 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f64_e32 vcc, src_scc, v2    ; encoding: [0xfd,0x04,0xfe,0x7c]
-
-v_cmp_class_f64 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_class_f64_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0xff,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_eq_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, null, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x04,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x04,0x7c]
-
-v_cmp_eq_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x04,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_eq_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x04,0x7c]
-
-v_cmp_eq_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_eq_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x04,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x04,0x7c]
-
-v_cmp_eq_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_eq_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x05,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x05,0x7c]
-
-v_cmp_eq_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_eq_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x05,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x05,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_eq_f32 vcc_lo, v1, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, v255, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, s1, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, s105, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, m0, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, null, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, -1, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_eq_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x24,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_eq_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x25,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x24,0x7c]
-
-v_cmp_eq_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x25,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_eq_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_eq_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x44,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_eq_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x44,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_eq_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x44,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_eq_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x44,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_eq_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x44,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_eq_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x44,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_eq_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x44,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_eq_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x44,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_eq_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x44,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_eq_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x44,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_eq_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x44,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_eq_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x45,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x44,0x7c]
-
-v_cmp_eq_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x44,0x7c]
-
-v_cmp_eq_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x44,0x7c]
-
-v_cmp_eq_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x44,0x7c]
-
-v_cmp_eq_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x44,0x7c]
-
-v_cmp_eq_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x44,0x7c]
-
-v_cmp_eq_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x44,0x7c]
-
-v_cmp_eq_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x44,0x7c]
-
-v_cmp_eq_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x44,0x7c]
-
-v_cmp_eq_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x44,0x7c]
-
-v_cmp_eq_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x44,0x7c]
-
-v_cmp_eq_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x45,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_eq_i16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, s1, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, s105, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, m0, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, null, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, -1, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x64,0x7c]
-
-v_cmp_eq_i16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_eq_i16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x64,0x7c]
-
-v_cmp_eq_i16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x64,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x64,0x7c]
-
-v_cmp_eq_i16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_eq_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_eq_i16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x65,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x65,0x7c]
-
-v_cmp_eq_i16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_eq_i32 vcc_lo, v1, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, v255, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, s1, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, s105, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, ttmp15, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, m0, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, exec_lo, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, exec_hi, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, null, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, -1, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, 0.5, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, src_scc, v2
-// W32: v_cmp_eq_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x84,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_eq_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x85,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x84,0x7c]
-
-v_cmp_eq_i32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x85,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_eq_i64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_eq_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_eq_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_eq_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_eq_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_eq_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_eq_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_eq_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i64 vcc_lo, null, v[2:3]
-// W32: v_cmp_eq_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_eq_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_eq_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_eq_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_eq_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_i64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa4,0x7c]
-
-v_cmp_eq_i64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa4,0x7c]
-
-v_cmp_eq_i64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa4,0x7c]
-
-v_cmp_eq_i64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa4,0x7c]
-
-v_cmp_eq_i64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa4,0x7c]
-
-v_cmp_eq_i64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa4,0x7c]
-
-v_cmp_eq_i64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa4,0x7c]
-
-v_cmp_eq_i64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa4,0x7c]
-
-v_cmp_eq_i64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa4,0x7c]
-
-v_cmp_eq_i64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa4,0x7c]
-
-v_cmp_eq_i64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa4,0x7c]
-
-v_cmp_eq_i64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_eq_u16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, s1, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, s105, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, m0, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, null, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, -1, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x74,0x7c]
-
-v_cmp_eq_u16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_eq_u16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x74,0x7c]
-
-v_cmp_eq_u16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x74,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x74,0x7c]
-
-v_cmp_eq_u16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_eq_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_eq_u16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x75,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x75,0x7c]
-
-v_cmp_eq_u16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_eq_u32 vcc_lo, v1, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, v255, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, s1, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, s105, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, ttmp15, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, m0, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, null, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, -1, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_eq_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x94,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_eq_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x95,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x94,0x7c]
-
-v_cmp_eq_u32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x95,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_eq_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u64 vcc_lo, null, v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_eq_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb4,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_eq_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_eq_u64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb4,0x7c]
-
-v_cmp_eq_u64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb4,0x7c]
-
-v_cmp_eq_u64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb4,0x7c]
-
-v_cmp_eq_u64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb4,0x7c]
-
-v_cmp_eq_u64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb4,0x7c]
-
-v_cmp_eq_u64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb4,0x7c]
-
-v_cmp_eq_u64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb4,0x7c]
-
-v_cmp_eq_u64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb4,0x7c]
-
-v_cmp_eq_u64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb4,0x7c]
-
-v_cmp_eq_u64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb4,0x7c]
-
-v_cmp_eq_u64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb4,0x7c]
-
-v_cmp_eq_u64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_eq_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ge_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, null, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x0c,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x0c,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ge_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x0c,0x7c]
-
-v_cmp_ge_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_ge_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x0c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_ge_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x0d,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x0d,0x7c]
-
-v_cmp_ge_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_ge_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x0d,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x0d,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ge_f32 vcc_lo, v1, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, v255, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, s1, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, s105, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, m0, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, null, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, -1, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_ge_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x2c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ge_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x2d,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x2c,0x7c]
-
-v_cmp_ge_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x2d,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ge_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ge_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x4c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_ge_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4d,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x4c,0x7c]
-
-v_cmp_ge_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4d,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ge_i16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, s1, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, s105, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, m0, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, null, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, -1, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ge_i16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_ge_i16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_ge_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6c,0x7c]
-
-v_cmp_ge_i16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6d,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6d,0x7c]
-
-v_cmp_ge_i16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ge_i32 vcc_lo, v1, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, v255, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, s1, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, s105, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, m0, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, null, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, -1, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, 0.5, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, src_scc, v2
-// W32: v_cmp_ge_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x8c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ge_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x8d,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x8c,0x7c]
-
-v_cmp_ge_i32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x8d,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ge_i64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xac,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xac,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xac,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xac,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xac,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xac,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xac,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xac,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xac,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xac,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ge_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xac,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_ge_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_i64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xac,0x7c]
-
-v_cmp_ge_i64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xac,0x7c]
-
-v_cmp_ge_i64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xac,0x7c]
-
-v_cmp_ge_i64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xac,0x7c]
-
-v_cmp_ge_i64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xac,0x7c]
-
-v_cmp_ge_i64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xac,0x7c]
-
-v_cmp_ge_i64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xac,0x7c]
-
-v_cmp_ge_i64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xac,0x7c]
-
-v_cmp_ge_i64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xac,0x7c]
-
-v_cmp_ge_i64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xac,0x7c]
-
-v_cmp_ge_i64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xac,0x7c]
-
-v_cmp_ge_i64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ge_u16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, s1, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, s105, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, m0, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, null, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, -1, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ge_u16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_ge_u16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_ge_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7c,0x7c]
-
-v_cmp_ge_u16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7d,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7d,0x7c]
-
-v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ge_u32 vcc_lo, v1, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, v255, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, s1, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, s105, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, m0, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, null, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, -1, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_ge_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x9c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ge_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x9d,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x9c,0x7c]
-
-v_cmp_ge_u32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x9d,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ge_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xbc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xbc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xbc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xbc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xbc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xbc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xbc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xbc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xbc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xbc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ge_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xbc,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_ge_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ge_u64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xbc,0x7c]
-
-v_cmp_ge_u64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xbc,0x7c]
-
-v_cmp_ge_u64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xbc,0x7c]
-
-v_cmp_ge_u64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xbc,0x7c]
-
-v_cmp_ge_u64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xbc,0x7c]
-
-v_cmp_ge_u64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xbc,0x7c]
-
-v_cmp_ge_u64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xbc,0x7c]
-
-v_cmp_ge_u64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xbc,0x7c]
-
-v_cmp_ge_u64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xbc,0x7c]
-
-v_cmp_ge_u64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xbc,0x7c]
-
-v_cmp_ge_u64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xbc,0x7c]
-
-v_cmp_ge_u64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ge_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_gt_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, null, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x08,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x08,0x7c]
-
-v_cmp_gt_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x08,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x08,0x7c]
-
-v_cmp_gt_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_gt_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x08,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x08,0x7c]
-
-v_cmp_gt_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_gt_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x09,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x09,0x7c]
-
-v_cmp_gt_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_gt_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x09,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x09,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_f32 vcc_lo, v1, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, v255, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, s1, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, s105, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, m0, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, null, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, -1, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_gt_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x28,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_gt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x29,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x28,0x7c]
-
-v_cmp_gt_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x29,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_gt_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_gt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x48,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_gt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x48,0x7c]
-
-v_cmp_gt_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_gt_i16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, s1, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, s105, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, m0, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, null, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, -1, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x68,0x7c]
-
-v_cmp_gt_i16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_i16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_gt_i16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x68,0x7c]
-
-v_cmp_gt_i16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_gt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x68,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x68,0x7c]
-
-v_cmp_gt_i16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x69,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x69,0x7c]
-
-v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_i32 vcc_lo, v1, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, v255, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, s1, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, s105, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, ttmp15, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, m0, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, exec_lo, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, exec_hi, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, null, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, -1, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, 0.5, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, src_scc, v2
-// W32: v_cmp_gt_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x88,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_gt_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x89,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x88,0x7c]
-
-v_cmp_gt_i32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x89,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_gt_i64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, null, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_gt_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_gt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_i64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa8,0x7c]
-
-v_cmp_gt_i64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_gt_u16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, s1, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, s105, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, m0, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, null, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, -1, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x78,0x7c]
-
-v_cmp_gt_u16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_u16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_gt_u16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x78,0x7c]
-
-v_cmp_gt_u16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_gt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x78,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x78,0x7c]
-
-v_cmp_gt_u16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x79,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x79,0x7c]
-
-v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_gt_u32 vcc_lo, v1, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, v255, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, s1, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, s105, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, ttmp15, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, m0, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, null, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, -1, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_gt_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x98,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_gt_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x99,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x98,0x7c]
-
-v_cmp_gt_u32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x99,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_gt_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, null, v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_gt_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb8,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_gt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_gt_u64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb8,0x7c]
-
-v_cmp_gt_u64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_gt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_le_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, null, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_le_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x06,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x06,0x7c]
-
-v_cmp_le_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x06,0x7c]
-
-v_cmp_le_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x06,0x7c]
-
-v_cmp_le_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x06,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_le_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x06,0x7c]
-
-v_cmp_le_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_le_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x06,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x06,0x7c]
-
-v_cmp_le_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_le_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x07,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x07,0x7c]
-
-v_cmp_le_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_le_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x07,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x07,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_le_f32 vcc_lo, v1, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, v255, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, s1, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, s105, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, m0, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, null, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, -1, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_le_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x26,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_le_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x27,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x26,0x7c]
-
-v_cmp_le_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x26,0x7c]
-
-v_cmp_le_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x26,0x7c]
-
-v_cmp_le_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x27,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_le_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_le_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x46,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_le_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x47,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x46,0x7c]
-
-v_cmp_le_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x46,0x7c]
-
-v_cmp_le_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x46,0x7c]
-
-v_cmp_le_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x47,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_le_i16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, s1, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, s105, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, m0, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, null, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, -1, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x66,0x7c]
-
-v_cmp_le_i16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x66,0x7c]
-
-v_cmp_le_i16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x66,0x7c]
-
-v_cmp_le_i16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_le_i16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_le_i16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x66,0x7c]
-
-v_cmp_le_i16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_le_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x66,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x66,0x7c]
-
-v_cmp_le_i16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x67,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x67,0x7c]
-
-v_cmp_le_i16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_le_i32 vcc_lo, v1, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, v255, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, s1, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, s105, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, ttmp15, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, m0, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, exec_lo, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, exec_hi, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, null, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, -1, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, 0.5, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, src_scc, v2
-// W32: v_cmp_le_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x86,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_le_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x87,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x86,0x7c]
-
-v_cmp_le_i32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x86,0x7c]
-
-v_cmp_le_i32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x86,0x7c]
-
-v_cmp_le_i32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x87,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_le_i64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, null, v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_le_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_le_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_i64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa6,0x7c]
-
-v_cmp_le_i64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_le_u16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, s1, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, s105, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, m0, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, null, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, -1, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x76,0x7c]
-
-v_cmp_le_u16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x76,0x7c]
-
-v_cmp_le_u16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x76,0x7c]
-
-v_cmp_le_u16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_le_u16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_le_u16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x76,0x7c]
-
-v_cmp_le_u16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_le_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x76,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x76,0x7c]
-
-v_cmp_le_u16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x77,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x77,0x7c]
-
-v_cmp_le_u16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_le_u32 vcc_lo, v1, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, v255, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, s1, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, s105, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, ttmp15, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, m0, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, null, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, -1, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_le_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x96,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_le_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x97,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x96,0x7c]
-
-v_cmp_le_u32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x96,0x7c]
-
-v_cmp_le_u32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x96,0x7c]
-
-v_cmp_le_u32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x97,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_le_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, null, v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_le_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb6,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_le_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_le_u64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb6,0x7c]
-
-v_cmp_le_u64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_le_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lg_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, null, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x0a,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x0a,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lg_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_lg_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x0a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x0a,0x7c]
-
-v_cmp_lg_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_lg_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x0b,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x0b,0x7c]
-
-v_cmp_lg_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_lg_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x0b,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x0b,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lg_f32 vcc_lo, v1, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, v255, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, s1, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, s105, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, m0, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, null, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, -1, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_lg_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x2a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_lg_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x2b,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x2a,0x7c]
-
-v_cmp_lg_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x2b,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lg_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_lg_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x4a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_lg_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4b,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lg_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x4a,0x7c]
-
-v_cmp_lg_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lg_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4b,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lt_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, null, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x02,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x02,0x7c]
-
-v_cmp_lt_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x02,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lt_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x02,0x7c]
-
-v_cmp_lt_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_lt_f16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x02,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x02,0x7c]
-
-v_cmp_lt_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_lt_f16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x03,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x03,0x7c]
-
-v_cmp_lt_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_lt_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x03,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x03,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lt_f32 vcc_lo, v1, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, v255, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, s1, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, s105, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, m0, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, null, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, -1, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_lt_f32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x22,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_lt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x23,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x22,0x7c]
-
-v_cmp_lt_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x23,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lt_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_lt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x42,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_lt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0x42,0x7c]
-
-v_cmp_lt_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lt_i16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, s1, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, s105, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, m0, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, null, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, -1, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x62,0x7c]
-
-v_cmp_lt_i16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lt_i16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_lt_i16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x62,0x7c]
-
-v_cmp_lt_i16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_lt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x62,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x62,0x7c]
-
-v_cmp_lt_i16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x63,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x63,0x7c]
-
-v_cmp_lt_i16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lt_i32 vcc_lo, v1, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, v255, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, s1, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, s105, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, ttmp15, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, m0, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, exec_lo, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, exec_hi, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, null, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, -1, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, 0.5, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, src_scc, v2
-// W32: v_cmp_lt_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x82,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_lt_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x83,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x82,0x7c]
-
-v_cmp_lt_i32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x83,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lt_i64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, null, v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_lt_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xa2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_lt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_i64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa2,0x7c]
-
-v_cmp_lt_i64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lt_u16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, s1, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, s105, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, m0, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, null, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, -1, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x72,0x7c]
-
-v_cmp_lt_u16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lt_u16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_lt_u16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x72,0x7c]
-
-v_cmp_lt_u16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_lt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x72,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x72,0x7c]
-
-v_cmp_lt_u16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x73,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x73,0x7c]
-
-v_cmp_lt_u16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_lt_u32 vcc_lo, v1, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, v255, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, s1, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, s105, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, ttmp15, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, m0, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, null, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, -1, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_lt_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x92,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_lt_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x93,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x92,0x7c]
-
-v_cmp_lt_u32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x93,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_lt_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, null, v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_lt_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xb2,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_lt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_lt_u64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb2,0x7c]
-
-v_cmp_lt_u64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_lt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ne_i16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, s1, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, s105, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, m0, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, null, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, -1, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ne_i16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_ne_i16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_ne_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6a,0x7c]
-
-v_cmp_ne_i16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6b,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6b,0x7c]
-
-v_cmp_ne_i16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ne_i32 vcc_lo, v1, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, v255, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, s1, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, s105, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, m0, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, null, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, -1, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, 0.5, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, src_scc, v2
-// W32: v_cmp_ne_i32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x8a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ne_i32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x8b,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x8a,0x7c]
-
-v_cmp_ne_i32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x8b,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ne_i64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ne_i64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xaa,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_ne_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_i64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xaa,0x7c]
-
-v_cmp_ne_i64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ne_u16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, s1, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, s105, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, m0, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, null, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, -1, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ne_u16 vcc_lo, 0x3800, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc, 0x3800, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
-
-v_cmp_ne_u16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_ne_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7a,0x7c]
-
-v_cmp_ne_u16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7b,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7b,0x7c]
-
-v_cmp_ne_u16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ne_u32 vcc_lo, v1, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, v255, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, v255, v2       ; encoding: [0xff,0x05,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, s1, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, s105, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, m0, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, null, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, -1, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, 0.5, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, src_scc, v2
-// W32: v_cmp_ne_u32_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x9a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ne_u32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x9b,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, v255, v2          ; encoding: [0xff,0x05,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x9a,0x7c]
-
-v_cmp_ne_u32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u32_e32 vcc, 0xaf123456, v255  ; encoding: [0xff,0xfe,0x9b,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ne_u64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, vcc, v[2:3]    ; encoding: [0x6a,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, exec, v[2:3]   ; encoding: [0x7e,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, null, v[2:3]   ; encoding: [0x7c,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, -1, v[2:3]     ; encoding: [0xc1,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, 0.5, v[2:3]    ; encoding: [0xf0,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ne_u64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0xba,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_ne_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, v[1:2], v[2:3]    ; encoding: [0x01,0x05,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, s[2:3], v[2:3]    ; encoding: [0x02,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, vcc, v[2:3]       ; encoding: [0x6a,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, exec, v[2:3]      ; encoding: [0x7e,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, null, v[2:3]      ; encoding: [0x7c,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, -1, v[2:3]        ; encoding: [0xc1,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, 0.5, v[2:3]       ; encoding: [0xf0,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xba,0x7c]
-
-v_cmp_ne_u64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ne_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_neq_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, null, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x1a,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x1a,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_neq_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, v1.h, v2.l    ; encoding: [0x81,0x05,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, v1.h, v2.l       ; encoding: [0x81,0x05,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_neq_f16_e32 vcc_lo, v127.h, v2.l  ; encoding: [0xff,0x05,0x1a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, v127.h, v2.l     ; encoding: [0xff,0x05,0x1a,0x7c]
-
-v_cmp_neq_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_neq_f16_e32 vcc_lo, src_scc, v2.h ; encoding: [0xfd,0x04,0x1b,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, src_scc, v2.h    ; encoding: [0xfd,0x04,0x1b,0x7c]
-
-v_cmp_neq_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_neq_f16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x1b,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, 0xfe0b, v127.h   ; encoding: [0xff,0xfe,0x1b,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_neq_f16 vcc, 0.5, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f16_e32 vcc, 0.5, v127.l      ; encoding: [0xf0,0xfe,0x1a,0x7c]
-
-v_cmp_neq_f32 vcc_lo, v1, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, v255, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, s1, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, s105, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, m0, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, null, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, -1, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_neq_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x3a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_neq_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3b,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x3a,0x7c]
-
-v_cmp_neq_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3b,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_neq_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_neq_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x5a,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_neq_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_neq_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x5a,0x7c]
-
-v_cmp_neq_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_neq_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5b,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_nge_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, null, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x12,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_nge_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x12,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x12,0x7c]
-
-v_cmp_nge_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x12,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_nge_f32 vcc_lo, v1, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, v255, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, s1, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, s105, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, m0, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, null, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, -1, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_nge_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x32,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_nge_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x33,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x32,0x7c]
-
-v_cmp_nge_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x33,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_nge_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_nge_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x52,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_nge_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nge_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x52,0x7c]
-
-v_cmp_nge_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x53,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ngt_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, null, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x16,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_ngt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x16,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x16,0x7c]
-
-v_cmp_ngt_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x16,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_ngt_f32 vcc_lo, v1, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, v255, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, s1, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, s105, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, m0, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, null, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, -1, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_ngt_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x36,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_ngt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x37,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x36,0x7c]
-
-v_cmp_ngt_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x37,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_ngt_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x56,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x56,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x56,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x56,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x56,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x56,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x56,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x56,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x56,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x56,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x56,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_ngt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ngt_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x56,0x7c]
-
-v_cmp_ngt_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x56,0x7c]
-
-v_cmp_ngt_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x56,0x7c]
-
-v_cmp_ngt_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x56,0x7c]
-
-v_cmp_ngt_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x56,0x7c]
-
-v_cmp_ngt_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x56,0x7c]
-
-v_cmp_ngt_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x56,0x7c]
-
-v_cmp_ngt_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x56,0x7c]
-
-v_cmp_ngt_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x56,0x7c]
-
-v_cmp_ngt_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x56,0x7c]
-
-v_cmp_ngt_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x56,0x7c]
-
-v_cmp_ngt_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_ngt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x57,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_nle_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, null, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x18,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_nle_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x18,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x18,0x7c]
-
-v_cmp_nle_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x18,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_nle_f32 vcc_lo, v1, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, v255, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, s1, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, s105, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, m0, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, null, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, -1, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_nle_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x38,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_nle_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x39,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x38,0x7c]
-
-v_cmp_nle_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x39,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_nle_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x58,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x58,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x58,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x58,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x58,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x58,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x58,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x58,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x58,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x58,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_nle_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x58,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_nle_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x59,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nle_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x58,0x7c]
-
-v_cmp_nle_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x58,0x7c]
-
-v_cmp_nle_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x58,0x7c]
-
-v_cmp_nle_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x58,0x7c]
-
-v_cmp_nle_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x58,0x7c]
-
-v_cmp_nle_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x58,0x7c]
-
-v_cmp_nle_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x58,0x7c]
-
-v_cmp_nle_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x58,0x7c]
-
-v_cmp_nle_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x58,0x7c]
-
-v_cmp_nle_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x58,0x7c]
-
-v_cmp_nle_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x58,0x7c]
-
-v_cmp_nle_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nle_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x59,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_nlg_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, null, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x14,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_nlg_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x14,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x14,0x7c]
-
-v_cmp_nlg_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x14,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_nlg_f32 vcc_lo, v1, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, v255, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, s1, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, s105, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, m0, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, null, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, -1, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_nlg_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x34,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_nlg_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x35,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x34,0x7c]
-
-v_cmp_nlg_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x35,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_nlg_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x54,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x54,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x54,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x54,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x54,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x54,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x54,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x54,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x54,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x54,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x54,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_nlg_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x55,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlg_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x54,0x7c]
-
-v_cmp_nlg_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x54,0x7c]
-
-v_cmp_nlg_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x54,0x7c]
-
-v_cmp_nlg_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x54,0x7c]
-
-v_cmp_nlg_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x54,0x7c]
-
-v_cmp_nlg_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x54,0x7c]
-
-v_cmp_nlg_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x54,0x7c]
-
-v_cmp_nlg_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x54,0x7c]
-
-v_cmp_nlg_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x54,0x7c]
-
-v_cmp_nlg_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x54,0x7c]
-
-v_cmp_nlg_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x54,0x7c]
-
-v_cmp_nlg_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlg_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x55,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_nlt_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, v1.l, v2.l    ; encoding: [0x01,0x05,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, v127.l, v2.l  ; encoding: [0x7f,0x05,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, s1, v2.l      ; encoding: [0x01,0x04,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, s105, v2.l    ; encoding: [0x69,0x04,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, vcc_lo, v2.l  ; encoding: [0x6a,0x04,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, vcc_hi, v2.l  ; encoding: [0x6b,0x04,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, ttmp15, v2.l  ; encoding: [0x7b,0x04,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, m0, v2.l      ; encoding: [0x7d,0x04,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, exec_lo, v2.l ; encoding: [0x7e,0x04,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, exec_hi, v2.l ; encoding: [0x7f,0x04,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, null, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, null, v2.l    ; encoding: [0x7c,0x04,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, -1, v2.l      ; encoding: [0xc1,0x04,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, 0.5, v2.l     ; encoding: [0xf0,0x04,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, src_scc, v2.l ; encoding: [0xfd,0x04,0x1c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_nlt_f16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x1c,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, v1.l, v2.l       ; encoding: [0x01,0x05,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, v127.l, v2.l     ; encoding: [0x7f,0x05,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, s1, v2.l         ; encoding: [0x01,0x04,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, s105, v2.l       ; encoding: [0x69,0x04,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, vcc_lo, v2.l     ; encoding: [0x6a,0x04,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, vcc_hi, v2.l     ; encoding: [0x6b,0x04,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, ttmp15, v2.l     ; encoding: [0x7b,0x04,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, m0, v2.l         ; encoding: [0x7d,0x04,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, exec_lo, v2.l    ; encoding: [0x7e,0x04,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, exec_hi, v2.l    ; encoding: [0x7f,0x04,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, null, v2.l       ; encoding: [0x7c,0x04,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, -1, v2.l         ; encoding: [0xc1,0x04,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, 0.5, v2.l        ; encoding: [0xf0,0x04,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, src_scc, v2.l    ; encoding: [0xfd,0x04,0x1c,0x7c]
-
-v_cmp_nlt_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f16_e32 vcc, 0xfe0b, v127.l   ; encoding: [0xff,0xfe,0x1c,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_nlt_f32 vcc_lo, v1, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, v1, v2        ; encoding: [0x01,0x05,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, v255, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, v255, v2      ; encoding: [0xff,0x05,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, s1, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, s1, v2        ; encoding: [0x01,0x04,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, s105, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, s105, v2      ; encoding: [0x69,0x04,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, vcc_lo, v2    ; encoding: [0x6a,0x04,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, vcc_hi, v2    ; encoding: [0x6b,0x04,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, ttmp15, v2    ; encoding: [0x7b,0x04,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, m0, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, m0, v2        ; encoding: [0x7d,0x04,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, exec_lo, v2   ; encoding: [0x7e,0x04,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, exec_hi, v2   ; encoding: [0x7f,0x04,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, null, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, null, v2      ; encoding: [0x7c,0x04,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, -1, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, -1, v2        ; encoding: [0xc1,0x04,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, 0.5, v2       ; encoding: [0xf0,0x04,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_nlt_f32_e32 vcc_lo, src_scc, v2   ; encoding: [0xfd,0x04,0x3c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_nlt_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3d,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, v1, v2           ; encoding: [0x01,0x05,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, v255, v2         ; encoding: [0xff,0x05,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, s1, v2           ; encoding: [0x01,0x04,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, s105, v2         ; encoding: [0x69,0x04,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, vcc_lo, v2       ; encoding: [0x6a,0x04,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, vcc_hi, v2       ; encoding: [0x6b,0x04,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, ttmp15, v2       ; encoding: [0x7b,0x04,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, m0, v2           ; encoding: [0x7d,0x04,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, exec_lo, v2      ; encoding: [0x7e,0x04,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, exec_hi, v2      ; encoding: [0x7f,0x04,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, null, v2         ; encoding: [0x7c,0x04,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, -1, v2           ; encoding: [0xc1,0x04,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, 0.5, v2          ; encoding: [0xf0,0x04,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, src_scc, v2      ; encoding: [0xfd,0x04,0x3c,0x7c]
-
-v_cmp_nlt_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f32_e32 vcc, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x3d,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_nlt_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, v[1:2], v[2:3] ; encoding: [0x01,0x05,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, s[2:3], v[2:3] ; encoding: [0x02,0x04,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, vcc, v[2:3]   ; encoding: [0x6a,0x04,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, exec, v[2:3]  ; encoding: [0x7e,0x04,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, null, v[2:3]  ; encoding: [0x7c,0x04,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, -1, v[2:3]    ; encoding: [0xc1,0x04,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, 0.5, v[2:3]   ; encoding: [0xf0,0x04,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x5c,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_nlt_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5d,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_nlt_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, v[1:2], v[2:3]   ; encoding: [0x01,0x05,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, s[2:3], v[2:3]   ; encoding: [0x02,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, vcc, v[2:3]      ; encoding: [0x6a,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, exec, v[2:3]     ; encoding: [0x7e,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, null, v[2:3]     ; encoding: [0x7c,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, -1, v[2:3]       ; encoding: [0xc1,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, 0.5, v[2:3]      ; encoding: [0xf0,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, src_scc, v[2:3]  ; encoding: [0xfd,0x04,0x5c,0x7c]
-
-v_cmp_nlt_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_nlt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x5d,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_o_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, v1.l, v2.l      ; encoding: [0x01,0x05,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, v127.l, v2.l    ; encoding: [0x7f,0x05,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, s1, v2.l        ; encoding: [0x01,0x04,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, s105, v2.l      ; encoding: [0x69,0x04,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, vcc_lo, v2.l    ; encoding: [0x6a,0x04,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, vcc_hi, v2.l    ; encoding: [0x6b,0x04,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, ttmp15, v2.l    ; encoding: [0x7b,0x04,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, m0, v2.l        ; encoding: [0x7d,0x04,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, exec_lo, v2.l   ; encoding: [0x7e,0x04,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, exec_hi, v2.l   ; encoding: [0x7f,0x04,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, null, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, null, v2.l      ; encoding: [0x7c,0x04,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, -1, v2.l        ; encoding: [0xc1,0x04,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, 0.5, v2.l       ; encoding: [0xf0,0x04,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_o_f16_e32 vcc_lo, src_scc, v2.l   ; encoding: [0xfd,0x04,0x0e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_o_f16_e32 vcc_lo, 0xfe0b, v127.l  ; encoding: [0xff,0xfe,0x0e,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, v1.l, v2.l         ; encoding: [0x01,0x05,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, v127.l, v2.l       ; encoding: [0x7f,0x05,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, s1, v2.l           ; encoding: [0x01,0x04,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, s105, v2.l         ; encoding: [0x69,0x04,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, vcc_lo, v2.l       ; encoding: [0x6a,0x04,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, vcc_hi, v2.l       ; encoding: [0x6b,0x04,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, ttmp15, v2.l       ; encoding: [0x7b,0x04,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, m0, v2.l           ; encoding: [0x7d,0x04,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, exec_lo, v2.l      ; encoding: [0x7e,0x04,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, exec_hi, v2.l      ; encoding: [0x7f,0x04,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, null, v2.l         ; encoding: [0x7c,0x04,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, -1, v2.l           ; encoding: [0xc1,0x04,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, 0.5, v2.l          ; encoding: [0xf0,0x04,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, src_scc, v2.l      ; encoding: [0xfd,0x04,0x0e,0x7c]
-
-v_cmp_o_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f16_e32 vcc, 0xfe0b, v127.l     ; encoding: [0xff,0xfe,0x0e,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_o_f32 vcc_lo, v1, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, v1, v2          ; encoding: [0x01,0x05,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, v255, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, v255, v2        ; encoding: [0xff,0x05,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, s1, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, s1, v2          ; encoding: [0x01,0x04,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, s105, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, s105, v2        ; encoding: [0x69,0x04,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, vcc_lo, v2      ; encoding: [0x6a,0x04,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, vcc_hi, v2      ; encoding: [0x6b,0x04,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, ttmp15, v2      ; encoding: [0x7b,0x04,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, m0, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, m0, v2          ; encoding: [0x7d,0x04,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, exec_lo, v2     ; encoding: [0x7e,0x04,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, exec_hi, v2     ; encoding: [0x7f,0x04,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, null, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, null, v2        ; encoding: [0x7c,0x04,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, -1, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, -1, v2          ; encoding: [0xc1,0x04,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, 0.5, v2         ; encoding: [0xf0,0x04,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_o_f32_e32 vcc_lo, src_scc, v2     ; encoding: [0xfd,0x04,0x2e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_o_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x2f,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, v1, v2             ; encoding: [0x01,0x05,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, v255, v2           ; encoding: [0xff,0x05,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, s1, v2             ; encoding: [0x01,0x04,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, s105, v2           ; encoding: [0x69,0x04,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, vcc_lo, v2         ; encoding: [0x6a,0x04,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, vcc_hi, v2         ; encoding: [0x6b,0x04,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, ttmp15, v2         ; encoding: [0x7b,0x04,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, m0, v2             ; encoding: [0x7d,0x04,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, exec_lo, v2        ; encoding: [0x7e,0x04,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, exec_hi, v2        ; encoding: [0x7f,0x04,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, null, v2           ; encoding: [0x7c,0x04,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, -1, v2             ; encoding: [0xc1,0x04,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, 0.5, v2            ; encoding: [0xf0,0x04,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, src_scc, v2        ; encoding: [0xfd,0x04,0x2e,0x7c]
-
-v_cmp_o_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f32_e32 vcc, 0xaf123456, v255   ; encoding: [0xff,0xfe,0x2f,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_o_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_o_f64_e32 vcc_lo, v[1:2], v[2:3]  ; encoding: [0x01,0x05,0x4e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_o_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_o_f64_e32 vcc_lo, s[2:3], v[2:3]  ; encoding: [0x02,0x04,0x4e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_o_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_o_f64_e32 vcc_lo, vcc, v[2:3]     ; encoding: [0x6a,0x04,0x4e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_o_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_o_f64_e32 vcc_lo, exec, v[2:3]    ; encoding: [0x7e,0x04,0x4e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_o_f64_e32 vcc_lo, null, v[2:3]    ; encoding: [0x7c,0x04,0x4e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_o_f64_e32 vcc_lo, -1, v[2:3]      ; encoding: [0xc1,0x04,0x4e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_o_f64_e32 vcc_lo, 0.5, v[2:3]     ; encoding: [0xf0,0x04,0x4e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_o_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x4e,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_o_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4f,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_o_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f64_e32 vcc, v[1:2], v[2:3]     ; encoding: [0x01,0x05,0x4e,0x7c]
-
-v_cmp_o_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x4e,0x7c]
-
-v_cmp_o_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f64_e32 vcc, s[2:3], v[2:3]     ; encoding: [0x02,0x04,0x4e,0x7c]
-
-v_cmp_o_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x4e,0x7c]
-
-v_cmp_o_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f64_e32 vcc, vcc, v[2:3]        ; encoding: [0x6a,0x04,0x4e,0x7c]
-
-v_cmp_o_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x4e,0x7c]
-
-v_cmp_o_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f64_e32 vcc, exec, v[2:3]       ; encoding: [0x7e,0x04,0x4e,0x7c]
-
-v_cmp_o_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f64_e32 vcc, null, v[2:3]       ; encoding: [0x7c,0x04,0x4e,0x7c]
-
-v_cmp_o_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f64_e32 vcc, -1, v[2:3]         ; encoding: [0xc1,0x04,0x4e,0x7c]
-
-v_cmp_o_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f64_e32 vcc, 0.5, v[2:3]        ; encoding: [0xf0,0x04,0x4e,0x7c]
-
-v_cmp_o_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f64_e32 vcc, src_scc, v[2:3]    ; encoding: [0xfd,0x04,0x4e,0x7c]
-
-v_cmp_o_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_o_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4f,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_u_f16 vcc_lo, v1.l, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, v1.l, v2.l      ; encoding: [0x01,0x05,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, v127.l, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, v127.l, v2.l    ; encoding: [0x7f,0x05,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, s1, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, s1, v2.l        ; encoding: [0x01,0x04,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, s105, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, s105, v2.l      ; encoding: [0x69,0x04,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, vcc_lo, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, vcc_lo, v2.l    ; encoding: [0x6a,0x04,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, vcc_hi, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, vcc_hi, v2.l    ; encoding: [0x6b,0x04,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, ttmp15, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, ttmp15, v2.l    ; encoding: [0x7b,0x04,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, m0, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, m0, v2.l        ; encoding: [0x7d,0x04,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, exec_lo, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, exec_lo, v2.l   ; encoding: [0x7e,0x04,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, exec_hi, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, exec_hi, v2.l   ; encoding: [0x7f,0x04,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, null, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, null, v2.l      ; encoding: [0x7c,0x04,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, -1, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, -1, v2.l        ; encoding: [0xc1,0x04,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, 0.5, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, 0.5, v2.l       ; encoding: [0xf0,0x04,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, src_scc, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, src_scc, v2.l   ; encoding: [0xfd,0x04,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc_lo, 0xfe0b, v127.l
-// W32: v_cmp_u_f16_e32 vcc_lo, 0xfe0b, v127.l  ; encoding: [0xff,0xfe,0x10,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc, v1.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, v1.l, v2.l         ; encoding: [0x01,0x05,0x10,0x7c]
-
-v_cmp_u_f16 vcc, v127.l, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, v127.l, v2.l       ; encoding: [0x7f,0x05,0x10,0x7c]
-
-v_cmp_u_f16 vcc, s1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, s1, v2.l           ; encoding: [0x01,0x04,0x10,0x7c]
-
-v_cmp_u_f16 vcc, s105, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, s105, v2.l         ; encoding: [0x69,0x04,0x10,0x7c]
-
-v_cmp_u_f16 vcc, vcc_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, vcc_lo, v2.l       ; encoding: [0x6a,0x04,0x10,0x7c]
-
-v_cmp_u_f16 vcc, vcc_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, vcc_hi, v2.l       ; encoding: [0x6b,0x04,0x10,0x7c]
-
-v_cmp_u_f16 vcc, ttmp15, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, ttmp15, v2.l       ; encoding: [0x7b,0x04,0x10,0x7c]
-
-v_cmp_u_f16 vcc, m0, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, m0, v2.l           ; encoding: [0x7d,0x04,0x10,0x7c]
-
-v_cmp_u_f16 vcc, exec_lo, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, exec_lo, v2.l      ; encoding: [0x7e,0x04,0x10,0x7c]
-
-v_cmp_u_f16 vcc, exec_hi, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, exec_hi, v2.l      ; encoding: [0x7f,0x04,0x10,0x7c]
-
-v_cmp_u_f16 vcc, null, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, null, v2.l         ; encoding: [0x7c,0x04,0x10,0x7c]
-
-v_cmp_u_f16 vcc, -1, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, -1, v2.l           ; encoding: [0xc1,0x04,0x10,0x7c]
-
-v_cmp_u_f16 vcc, 0.5, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, 0.5, v2.l          ; encoding: [0xf0,0x04,0x10,0x7c]
-
-v_cmp_u_f16 vcc, src_scc, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, src_scc, v2.l      ; encoding: [0xfd,0x04,0x10,0x7c]
-
-v_cmp_u_f16 vcc, 0xfe0b, v127.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, 0xfe0b, v127.l     ; encoding: [0xff,0xfe,0x10,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_u_f16 vcc_lo, v1.h, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, v1.h, v2.l      ; encoding: [0x81,0x05,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc, v1.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, v1.h, v2.l         ; encoding: [0x81,0x05,0x10,0x7c]
-
-v_cmp_u_f16 vcc_lo, v127.h, v2.l
-// W32: v_cmp_u_f16_e32 vcc_lo, v127.h, v2.l    ; encoding: [0xff,0x05,0x10,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc, v127.h, v2.l
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, v127.h, v2.l       ; encoding: [0xff,0x05,0x10,0x7c]
-
-v_cmp_u_f16 vcc_lo, src_scc, v2.h
-// W32: v_cmp_u_f16_e32 vcc_lo, src_scc, v2.h   ; encoding: [0xfd,0x04,0x11,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc, src_scc, v2.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, src_scc, v2.h      ; encoding: [0xfd,0x04,0x11,0x7c]
-
-v_cmp_u_f16 vcc_lo, 0xfe0b, v127.h
-// W32: v_cmp_u_f16_e32 vcc_lo, 0xfe0b, v127.h  ; encoding: [0xff,0xfe,0x11,0x7c,0x0b,0xfe,0x00,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f16 vcc, 0xfe0b, v127.h
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f16_e32 vcc, 0xfe0b, v127.h     ; encoding: [0xff,0xfe,0x11,0x7c,0x0b,0xfe,0x00,0x00]
-
-v_cmp_u_f32 vcc_lo, v1, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, v1, v2          ; encoding: [0x01,0x05,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, v255, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, v255, v2        ; encoding: [0xff,0x05,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, s1, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, s1, v2          ; encoding: [0x01,0x04,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, s105, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, s105, v2        ; encoding: [0x69,0x04,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, vcc_lo, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, vcc_lo, v2      ; encoding: [0x6a,0x04,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, vcc_hi, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, vcc_hi, v2      ; encoding: [0x6b,0x04,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, ttmp15, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, ttmp15, v2      ; encoding: [0x7b,0x04,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, m0, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, m0, v2          ; encoding: [0x7d,0x04,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, exec_lo, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, exec_lo, v2     ; encoding: [0x7e,0x04,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, exec_hi, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, exec_hi, v2     ; encoding: [0x7f,0x04,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, null, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, null, v2        ; encoding: [0x7c,0x04,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, -1, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, -1, v2          ; encoding: [0xc1,0x04,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, 0.5, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, 0.5, v2         ; encoding: [0xf0,0x04,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, src_scc, v2
-// W32: v_cmp_u_f32_e32 vcc_lo, src_scc, v2     ; encoding: [0xfd,0x04,0x30,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc_lo, 0xaf123456, v255
-// W32: v_cmp_u_f32_e32 vcc_lo, 0xaf123456, v255 ; encoding: [0xff,0xfe,0x31,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f32 vcc, v1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, v1, v2             ; encoding: [0x01,0x05,0x30,0x7c]
-
-v_cmp_u_f32 vcc, v255, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, v255, v2           ; encoding: [0xff,0x05,0x30,0x7c]
-
-v_cmp_u_f32 vcc, s1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, s1, v2             ; encoding: [0x01,0x04,0x30,0x7c]
-
-v_cmp_u_f32 vcc, s105, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, s105, v2           ; encoding: [0x69,0x04,0x30,0x7c]
-
-v_cmp_u_f32 vcc, vcc_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, vcc_lo, v2         ; encoding: [0x6a,0x04,0x30,0x7c]
-
-v_cmp_u_f32 vcc, vcc_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, vcc_hi, v2         ; encoding: [0x6b,0x04,0x30,0x7c]
-
-v_cmp_u_f32 vcc, ttmp15, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, ttmp15, v2         ; encoding: [0x7b,0x04,0x30,0x7c]
-
-v_cmp_u_f32 vcc, m0, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, m0, v2             ; encoding: [0x7d,0x04,0x30,0x7c]
-
-v_cmp_u_f32 vcc, exec_lo, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, exec_lo, v2        ; encoding: [0x7e,0x04,0x30,0x7c]
-
-v_cmp_u_f32 vcc, exec_hi, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, exec_hi, v2        ; encoding: [0x7f,0x04,0x30,0x7c]
-
-v_cmp_u_f32 vcc, null, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, null, v2           ; encoding: [0x7c,0x04,0x30,0x7c]
-
-v_cmp_u_f32 vcc, -1, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, -1, v2             ; encoding: [0xc1,0x04,0x30,0x7c]
-
-v_cmp_u_f32 vcc, 0.5, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, 0.5, v2            ; encoding: [0xf0,0x04,0x30,0x7c]
-
-v_cmp_u_f32 vcc, src_scc, v2
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, src_scc, v2        ; encoding: [0xfd,0x04,0x30,0x7c]
-
-v_cmp_u_f32 vcc, 0xaf123456, v255
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f32_e32 vcc, 0xaf123456, v255   ; encoding: [0xff,0xfe,0x31,0x7c,0x56,0x34,0x12,0xaf]
-
-v_cmp_u_f64 vcc_lo, v[1:2], v[2:3]
-// W32: v_cmp_u_f64_e32 vcc_lo, v[1:2], v[2:3]  ; encoding: [0x01,0x05,0x50,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f64 vcc_lo, v[254:255], v[2:3]
-// W32: v_cmp_u_f64_e32 vcc_lo, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x50,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f64 vcc_lo, s[2:3], v[2:3]
-// W32: v_cmp_u_f64_e32 vcc_lo, s[2:3], v[2:3]  ; encoding: [0x02,0x04,0x50,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f64 vcc_lo, s[104:105], v[2:3]
-// W32: v_cmp_u_f64_e32 vcc_lo, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x50,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f64 vcc_lo, vcc, v[2:3]
-// W32: v_cmp_u_f64_e32 vcc_lo, vcc, v[2:3]     ; encoding: [0x6a,0x04,0x50,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f64 vcc_lo, ttmp[14:15], v[2:3]
-// W32: v_cmp_u_f64_e32 vcc_lo, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x50,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f64 vcc_lo, exec, v[2:3]
-// W32: v_cmp_u_f64_e32 vcc_lo, exec, v[2:3]    ; encoding: [0x7e,0x04,0x50,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f64 vcc_lo, null, v[2:3]
-// W32: v_cmp_u_f64_e32 vcc_lo, null, v[2:3]    ; encoding: [0x7c,0x04,0x50,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f64 vcc_lo, -1, v[2:3]
-// W32: v_cmp_u_f64_e32 vcc_lo, -1, v[2:3]      ; encoding: [0xc1,0x04,0x50,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f64 vcc_lo, 0.5, v[2:3]
-// W32: v_cmp_u_f64_e32 vcc_lo, 0.5, v[2:3]     ; encoding: [0xf0,0x04,0x50,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f64 vcc_lo, src_scc, v[2:3]
-// W32: v_cmp_u_f64_e32 vcc_lo, src_scc, v[2:3] ; encoding: [0xfd,0x04,0x50,0x7c]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f64 vcc_lo, 0xaf123456, v[254:255]
-// W32: v_cmp_u_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x51,0x7c,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_u_f64 vcc, v[1:2], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f64_e32 vcc, v[1:2], v[2:3]     ; encoding: [0x01,0x05,0x50,0x7c]
-
-v_cmp_u_f64 vcc, v[254:255], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f64_e32 vcc, v[254:255], v[2:3] ; encoding: [0xfe,0x05,0x50,0x7c]
-
-v_cmp_u_f64 vcc, s[2:3], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f64_e32 vcc, s[2:3], v[2:3]     ; encoding: [0x02,0x04,0x50,0x7c]
-
-v_cmp_u_f64 vcc, s[104:105], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f64_e32 vcc, s[104:105], v[2:3] ; encoding: [0x68,0x04,0x50,0x7c]
-
-v_cmp_u_f64 vcc, vcc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f64_e32 vcc, vcc, v[2:3]        ; encoding: [0x6a,0x04,0x50,0x7c]
-
-v_cmp_u_f64 vcc, ttmp[14:15], v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f64_e32 vcc, ttmp[14:15], v[2:3] ; encoding: [0x7a,0x04,0x50,0x7c]
-
-v_cmp_u_f64 vcc, exec, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f64_e32 vcc, exec, v[2:3]       ; encoding: [0x7e,0x04,0x50,0x7c]
-
-v_cmp_u_f64 vcc, null, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f64_e32 vcc, null, v[2:3]       ; encoding: [0x7c,0x04,0x50,0x7c]
-
-v_cmp_u_f64 vcc, -1, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f64_e32 vcc, -1, v[2:3]         ; encoding: [0xc1,0x04,0x50,0x7c]
-
-v_cmp_u_f64 vcc, 0.5, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f64_e32 vcc, 0.5, v[2:3]        ; encoding: [0xf0,0x04,0x50,0x7c]
-
-v_cmp_u_f64 vcc, src_scc, v[2:3]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f64_e32 vcc, src_scc, v[2:3]    ; encoding: [0xfd,0x04,0x50,0x7c]
-
-v_cmp_u_f64 vcc, 0xaf123456, v[254:255]
-// W32-ERR: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-// W64: v_cmp_u_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x51,0x7c,0x56,0x34,0x12,0xaf]
-//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-// GFX12-W32: {{.*}}
-// GFX12-W64: {{.*}}
-// GFX13-W32: {{.*}}
-// GFX13-W64: {{.*}}
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=SICI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefixes=SICI,CI
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefixes=GFX8PLUS,GFX89
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefixes=GFX8PLUS,GFX89,GFX9
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck %s --check-prefixes=GFX8PLUS,GFX11
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -show-encoding %s | FileCheck %s --check-prefixes=GFX8PLUS,GFX12XX,GFX12
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 -show-encoding %s | FileCheck %s --check-prefixes=GFX8PLUS,GFX12XX,GFX1250,GFX1250-ASM
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 -show-encoding %s | %extract-encodings | llvm-mc -triple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 -disassemble -show-encoding | FileCheck %s --check-prefixes=GFX8PLUS,GFX12XX,GFX1250,GFX1250-DIS
+
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOSICI,NOSI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=bonaire %s -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOSICI,NOCI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga %s -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOGFX8PLUS,NOGFX89,NOVI --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx900 %s -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOGFX8PLUS,NOGFX89,NOGFX9 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOGFX8PLUS,NOGFX11 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 %s -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOGFX8PLUS,NOGFX12 --implicit-check-not=error:
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1250 %s -mattr=+real-true16 -filetype=null 2>&1 | FileCheck %s --check-prefixes=NOGCN,NOGFX8PLUS,NOGFX1250 --implicit-check-not=error:
+
+//---------------------------------------------------------------------------//
+// fp literal, expected fp operand
+//---------------------------------------------------------------------------//
+
+v_fract_f64 v[0:1], 0.5
+// GFX11: v_fract_f64_e32 v[0:1], 0.5             ; encoding: [0xf0,0x7c,0x00,0x7e]
+// GFX12XX: v_fract_f64_e32 v[0:1], 0.5             ; encoding: [0xf0,0x7c,0x00,0x7e]
+// GFX89: v_fract_f64_e32 v[0:1], 0.5             ; encoding: [0xf0,0x64,0x00,0x7e]
+// SICI: v_fract_f64_e32 v[0:1], 0.5             ; encoding: [0xf0,0x7c,0x00,0x7e]
+
+v_sqrt_f64 v[0:1], -4.0
+// GFX11: v_sqrt_f64_e32 v[0:1], -4.0             ; encoding: [0xf7,0x68,0x00,0x7e]
+// GFX12XX: v_sqrt_f64_e32 v[0:1], -4.0             ; encoding: [0xf7,0x68,0x00,0x7e]
+// GFX89: v_sqrt_f64_e32 v[0:1], -4.0             ; encoding: [0xf7,0x50,0x00,0x7e]
+// SICI: v_sqrt_f64_e32 v[0:1], -4.0             ; encoding: [0xf7,0x68,0x00,0x7e]
+
+v_log_clamp_f32 v1, 0.5
+// NOGFX8PLUS: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// SICI: v_log_clamp_f32_e32 v1, 0.5             ; encoding: [0xf0,0x4c,0x02,0x7e]
+
+v_trunc_f32 v0, 0.5
+// GFX11: v_trunc_f32_e32 v0, 0.5                 ; encoding: [0xf0,0x42,0x00,0x7e]
+// GFX12XX: v_trunc_f32_e32 v0, 0.5                 ; encoding: [0xf0,0x42,0x00,0x7e]
+// GFX89: v_trunc_f32_e32 v0, 0.5                 ; encoding: [0xf0,0x38,0x00,0x7e]
+// SICI: v_trunc_f32_e32 v0, 0.5                 ; encoding: [0xf0,0x42,0x00,0x7e]
+
+v_fract_f64 v[0:1], -1.0
+// GFX11: v_fract_f64_e32 v[0:1], -1.0            ; encoding: [0xf3,0x7c,0x00,0x7e]
+// GFX12XX: v_fract_f64_e32 v[0:1], -1.0            ; encoding: [0xf3,0x7c,0x00,0x7e]
+// GFX89: v_fract_f64_e32 v[0:1], -1.0            ; encoding: [0xf3,0x64,0x00,0x7e]
+// SICI: v_fract_f64_e32 v[0:1], -1.0            ; encoding: [0xf3,0x7c,0x00,0x7e]
+
+v_trunc_f32 v0, -1.0
+// GFX11: v_trunc_f32_e32 v0, -1.0                ; encoding: [0xf3,0x42,0x00,0x7e]
+// GFX12XX: v_trunc_f32_e32 v0, -1.0                ; encoding: [0xf3,0x42,0x00,0x7e]
+// GFX89: v_trunc_f32_e32 v0, -1.0                ; encoding: [0xf3,0x38,0x00,0x7e]
+// SICI: v_trunc_f32_e32 v0, -1.0                ; encoding: [0xf3,0x42,0x00,0x7e]
+
+v_fract_f64 v[0:1], 4.0
+// GFX11: v_fract_f64_e32 v[0:1], 4.0             ; encoding: [0xf6,0x7c,0x00,0x7e]
+// GFX12XX: v_fract_f64_e32 v[0:1], 4.0             ; encoding: [0xf6,0x7c,0x00,0x7e]
+// GFX89: v_fract_f64_e32 v[0:1], 4.0             ; encoding: [0xf6,0x64,0x00,0x7e]
+// SICI: v_fract_f64_e32 v[0:1], 4.0             ; encoding: [0xf6,0x7c,0x00,0x7e]
+
+v_trunc_f32 v0, 4.0
+// GFX11: v_trunc_f32_e32 v0, 4.0                 ; encoding: [0xf6,0x42,0x00,0x7e]
+// GFX12XX: v_trunc_f32_e32 v0, 4.0                 ; encoding: [0xf6,0x42,0x00,0x7e]
+// GFX89: v_trunc_f32_e32 v0, 4.0                 ; encoding: [0xf6,0x38,0x00,0x7e]
+// SICI: v_trunc_f32_e32 v0, 4.0                 ; encoding: [0xf6,0x42,0x00,0x7e]
+
+v_fract_f64 v[0:1], 0.0
+// GFX11: v_fract_f64_e32 v[0:1], 0               ; encoding: [0x80,0x7c,0x00,0x7e]
+// GFX12XX: v_fract_f64_e32 v[0:1], 0               ; encoding: [0x80,0x7c,0x00,0x7e]
+// GFX89: v_fract_f64_e32 v[0:1], 0               ; encoding: [0x80,0x64,0x00,0x7e]
+// SICI: v_fract_f64_e32 v[0:1], 0               ; encoding: [0x80,0x7c,0x00,0x7e]
+
+v_trunc_f32 v0, 0.0
+// GFX11: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x42,0x00,0x7e]
+// GFX12XX: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x42,0x00,0x7e]
+// GFX89: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x38,0x00,0x7e]
+// SICI: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x42,0x00,0x7e]
+
+v_fract_f64 v[0:1], 1.5
+// GFX11: v_fract_f64_e32 v[0:1], 0x3ff80000      ; encoding: [0xff,0x7c,0x00,0x7e,0x00,0x00,0xf8,0x3f]
+// GFX12XX: v_fract_f64_e32 v[0:1], 0x3ff80000      ; encoding: [0xff,0x7c,0x00,0x7e,0x00,0x00,0xf8,0x3f]
+// GFX89: v_fract_f64_e32 v[0:1], 0x3ff80000      ; encoding: [0xff,0x64,0x00,0x7e,0x00,0x00,0xf8,0x3f]
+// SICI: v_fract_f64_e32 v[0:1], 0x3ff80000      ; encoding: [0xff,0x7c,0x00,0x7e,0x00,0x00,0xf8,0x3f]
+
+v_trunc_f32 v0, 1.5
+// GFX11: v_trunc_f32_e32 v0, 0x3fc00000          ; encoding: [0xff,0x42,0x00,0x7e,0x00,0x00,0xc0,0x3f]
+// GFX12XX: v_trunc_f32_e32 v0, 0x3fc00000          ; encoding: [0xff,0x42,0x00,0x7e,0x00,0x00,0xc0,0x3f]
+// GFX89: v_trunc_f32_e32 v0, 0x3fc00000          ; encoding: [0xff,0x38,0x00,0x7e,0x00,0x00,0xc0,0x3f]
+// SICI: v_trunc_f32_e32 v0, 0x3fc00000          ; encoding: [0xff,0x42,0x00,0x7e,0x00,0x00,0xc0,0x3f]
+
+v_fract_f64 v[0:1], -3.1415
+// GFX11: v_fract_f64_e32 v[0:1], 0xc00921ca      ; encoding: [0xff,0x7c,0x00,0x7e,0xca,0x21,0x09,0xc0]
+// GFX12: v_fract_f64_e32 v[0:1], 0xc00921ca      ; encoding: [0xff,0x7c,0x00,0x7e,0xca,0x21,0x09,0xc0]
+// GFX1250: v_fract_f64_e32 v[0:1], 0xc00921cac083126f ; encoding: [0xfe,0x7c,0x00,0x7e,0x6f,0x12,0x83,0xc0,0xca,0x21,0x09,0xc0]
+// GFX89: v_fract_f64_e32 v[0:1], 0xc00921ca      ; encoding: [0xff,0x64,0x00,0x7e,0xca,0x21,0x09,0xc0]
+// NOGFX11: :[[@LINE-5]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOGFX12: :[[@LINE-6]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// SICI: v_fract_f64_e32 v[0:1], 0xc00921ca      ; encoding: [0xff,0x7c,0x00,0x7e,0xca,0x21,0x09,0xc0]
+
+v_trunc_f32 v0, -3.1415
+// GFX11: v_trunc_f32_e32 v0, 0xc0490e56          ; encoding: [0xff,0x42,0x00,0x7e,0x56,0x0e,0x49,0xc0]
+// GFX12XX: v_trunc_f32_e32 v0, 0xc0490e56          ; encoding: [0xff,0x42,0x00,0x7e,0x56,0x0e,0x49,0xc0]
+// GFX89: v_trunc_f32_e32 v0, 0xc0490e56          ; encoding: [0xff,0x38,0x00,0x7e,0x56,0x0e,0x49,0xc0]
+// SICI: v_trunc_f32_e32 v0, 0xc0490e56          ; encoding: [0xff,0x42,0x00,0x7e,0x56,0x0e,0x49,0xc0]
+
+v_fract_f64 v[0:1], 100000000000000000000000.0
+// GFX11: v_fract_f64_e32 v[0:1], 0x44b52d02      ; encoding: [0xff,0x7c,0x00,0x7e,0x02,0x2d,0xb5,0x44]
+// GFX12: v_fract_f64_e32 v[0:1], 0x44b52d02      ; encoding: [0xff,0x7c,0x00,0x7e,0x02,0x2d,0xb5,0x44]
+// GFX1250: v_fract_f64_e32 v[0:1], 0x44b52d02c7e14af6 ; encoding: [0xfe,0x7c,0x00,0x7e,0xf6,0x4a,0xe1,0xc7,0x02,0x2d,0xb5,0x44]
+// GFX89: v_fract_f64_e32 v[0:1], 0x44b52d02      ; encoding: [0xff,0x64,0x00,0x7e,0x02,0x2d,0xb5,0x44]
+// NOGFX11: :[[@LINE-5]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOGFX12: :[[@LINE-6]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// SICI: v_fract_f64_e32 v[0:1], 0x44b52d02      ; encoding: [0xff,0x7c,0x00,0x7e,0x02,0x2d,0xb5,0x44]
+
+v_trunc_f32 v0, 100000000000000000000000.0
+// GFX11: v_trunc_f32_e32 v0, 0x65a96816          ; encoding: [0xff,0x42,0x00,0x7e,0x16,0x68,0xa9,0x65]
+// GFX12XX: v_trunc_f32_e32 v0, 0x65a96816          ; encoding: [0xff,0x42,0x00,0x7e,0x16,0x68,0xa9,0x65]
+// GFX89: v_trunc_f32_e32 v0, 0x65a96816          ; encoding: [0xff,0x38,0x00,0x7e,0x16,0x68,0xa9,0x65]
+// SICI: v_trunc_f32_e32 v0, 0x65a96816          ; encoding: [0xff,0x42,0x00,0x7e,0x16,0x68,0xa9,0x65]
+
+v_fract_f64 v[0:1], 10000000.0
+// GFX11: v_fract_f64_e32 v[0:1], 0x416312d0      ; encoding: [0xff,0x7c,0x00,0x7e,0xd0,0x12,0x63,0x41]
+// GFX12XX: v_fract_f64_e32 v[0:1], 0x416312d0      ; encoding: [0xff,0x7c,0x00,0x7e,0xd0,0x12,0x63,0x41]
+// GFX89: v_fract_f64_e32 v[0:1], 0x416312d0      ; encoding: [0xff,0x64,0x00,0x7e,0xd0,0x12,0x63,0x41]
+// SICI: v_fract_f64_e32 v[0:1], 0x416312d0      ; encoding: [0xff,0x7c,0x00,0x7e,0xd0,0x12,0x63,0x41]
+
+v_trunc_f32 v0, 10000000.0
+// GFX11: v_trunc_f32_e32 v0, 0x4b189680          ; encoding: [0xff,0x42,0x00,0x7e,0x80,0x96,0x18,0x4b]
+// GFX12XX: v_trunc_f32_e32 v0, 0x4b189680          ; encoding: [0xff,0x42,0x00,0x7e,0x80,0x96,0x18,0x4b]
+// GFX89: v_trunc_f32_e32 v0, 0x4b189680          ; encoding: [0xff,0x38,0x00,0x7e,0x80,0x96,0x18,0x4b]
+// SICI: v_trunc_f32_e32 v0, 0x4b189680          ; encoding: [0xff,0x42,0x00,0x7e,0x80,0x96,0x18,0x4b]
+
+v_fract_f64 v[0:1], 3.402823e+38
+// GFX11: v_fract_f64_e32 v[0:1], 0x47efffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0xef,0x47]
+// GFX12: v_fract_f64_e32 v[0:1], 0x47efffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0xef,0x47]
+// GFX1250: v_fract_f64_e32 v[0:1], 0x47efffff966ad924 ; encoding: [0xfe,0x7c,0x00,0x7e,0x24,0xd9,0x6a,0x96,0xff,0xff,0xef,0x47]
+// GFX89: v_fract_f64_e32 v[0:1], 0x47efffff      ; encoding: [0xff,0x64,0x00,0x7e,0xff,0xff,0xef,0x47]
+// NOGFX11: :[[@LINE-5]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOGFX12: :[[@LINE-6]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// SICI: v_fract_f64_e32 v[0:1], 0x47efffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0xef,0x47]
+
+v_trunc_f32 v0, 3.402823e+38
+// GFX11: v_trunc_f32_e32 v0, 0x7f7ffffd          ; encoding: [0xff,0x42,0x00,0x7e,0xfd,0xff,0x7f,0x7f]
+// GFX12XX: v_trunc_f32_e32 v0, 0x7f7ffffd          ; encoding: [0xff,0x42,0x00,0x7e,0xfd,0xff,0x7f,0x7f]
+// GFX89: v_trunc_f32_e32 v0, 0x7f7ffffd          ; encoding: [0xff,0x38,0x00,0x7e,0xfd,0xff,0x7f,0x7f]
+// SICI: v_trunc_f32_e32 v0, 0x7f7ffffd          ; encoding: [0xff,0x42,0x00,0x7e,0xfd,0xff,0x7f,0x7f]
+
+v_fract_f64 v[0:1], 2.3509886e-38
+// GFX11: v_fract_f64_e32 v[0:1], 0x381fffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0x1f,0x38]
+// GFX12: v_fract_f64_e32 v[0:1], 0x381fffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0x1f,0x38]
+// GFX1250: v_fract_f64_e32 v[0:1], 0x381fffffe8c9d9fb ; encoding: [0xfe,0x7c,0x00,0x7e,0xfb,0xd9,0xc9,0xe8,0xff,0xff,0x1f,0x38]
+// GFX89: v_fract_f64_e32 v[0:1], 0x381fffff      ; encoding: [0xff,0x64,0x00,0x7e,0xff,0xff,0x1f,0x38]
+// NOGFX11: :[[@LINE-5]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOGFX12: :[[@LINE-6]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// SICI: v_fract_f64_e32 v[0:1], 0x381fffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0x1f,0x38]
+
+v_trunc_f32 v0, 2.3509886e-38
+// GFX11: v_trunc_f32_e32 v0, 0xffffff            ; encoding: [0xff,0x42,0x00,0x7e,0xff,0xff,0xff,0x00]
+// GFX12XX: v_trunc_f32_e32 v0, 0xffffff            ; encoding: [0xff,0x42,0x00,0x7e,0xff,0xff,0xff,0x00]
+// GFX89: v_trunc_f32_e32 v0, 0xffffff            ; encoding: [0xff,0x38,0x00,0x7e,0xff,0xff,0xff,0x00]
+// SICI: v_trunc_f32_e32 v0, 0xffffff            ; encoding: [0xff,0x42,0x00,0x7e,0xff,0xff,0xff,0x00]
+
+v_fract_f64 v[0:1], 2.3509886e-70
+// GFX11: v_fract_f64_e32 v[0:1], 0x3179f623      ; encoding: [0xff,0x7c,0x00,0x7e,0x23,0xf6,0x79,0x31]
+// GFX12: v_fract_f64_e32 v[0:1], 0x3179f623      ; encoding: [0xff,0x7c,0x00,0x7e,0x23,0xf6,0x79,0x31]
+// GFX1250: v_fract_f64_e32 v[0:1], 0x3179f623c2d3cf3c ; encoding: [0xfe,0x7c,0x00,0x7e,0x3c,0xcf,0xd3,0xc2,0x23,0xf6,0x79,0x31]
+// GFX89: v_fract_f64_e32 v[0:1], 0x3179f623      ; encoding: [0xff,0x64,0x00,0x7e,0x23,0xf6,0x79,0x31]
+// NOGFX11: :[[@LINE-5]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOGFX12: :[[@LINE-6]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOGFX89: :[[@LINE-7]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// NOSICI: :[[@LINE-8]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// SICI: v_fract_f64_e32 v[0:1], 0x3179f623      ; encoding: [0xff,0x7c,0x00,0x7e,0x23,0xf6,0x79,0x31]
+
+v_trunc_f32 v0, 2.3509886e-70
+// NOGCN: :[[@LINE-1]]:17: error: invalid operand for instruction
+
+v_fract_f64_e32 v[0:1], 1.0
+// GFX11: v_fract_f64_e32 v[0:1], 1.0             ; encoding: [0xf2,0x7c,0x00,0x7e]
+// GFX12XX: v_fract_f64_e32 v[0:1], 1.0             ; encoding: [0xf2,0x7c,0x00,0x7e]
+// GFX89: v_fract_f64_e32 v[0:1], 1.0             ; encoding: [0xf2,0x64,0x00,0x7e]
+// SICI: v_fract_f64_e32 v[0:1], 1.0             ; encoding: [0xf2,0x7c,0x00,0x7e]
+
+v_fract_f64_e32 v[0:1], lit(1.0)
+// GFX11: v_fract_f64_e32 v[0:1], lit(0x3ff00000) ; encoding: [0xff,0x7c,0x00,0x7e,0x00,0x00,0xf0,0x3f]
+// GFX12: v_fract_f64_e32 v[0:1], lit(0x3ff00000) ; encoding: [0xff,0x7c,0x00,0x7e,0x00,0x00,0xf0,0x3f]
+// GFX1250-ASM: v_fract_f64_e32 v[0:1], lit(0x3ff00000) ; encoding: [0xfe,0x7c,0x00,0x7e,0x00,0x00,0xf0,0x3f,0x00,0x00,0x00,0x00]
+// GFX1250-DIS: v_fract_f64_e32 v[0:1], lit64(0x3ff00000) ; encoding: [0xfe,0x7c,0x00,0x7e,0x00,0x00,0xf0,0x3f,0x00,0x00,0x00,0x00]
+// GFX89: v_fract_f64_e32 v[0:1], lit(0x3ff00000) ; encoding: [0xff,0x64,0x00,0x7e,0x00,0x00,0xf0,0x3f]
+// SICI: v_fract_f64_e32 v[0:1], lit(0x3ff00000) ; encoding: [0xff,0x7c,0x00,0x7e,0x00,0x00,0xf0,0x3f]
+
+v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], 1.0
+// GFX11: v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], 1.0 ; encoding: [0x08,0x40,0x44,0xcc,0x00,0x09,0xca,0x1b]
+// NOGFX12: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], lit(1.0)
+// NOGFX11: :[[@LINE-1]]:54: error: invalid operand for instruction
+// NOGFX12: :[[@LINE-2]]:54: error: invalid operand for instruction
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_cos_f16_e32 v5.l, 1.0
+// GFX11: v_cos_f16_e32 v5.l, 1.0                 ; encoding: [0xf2,0xc2,0x0a,0x7e]
+// GFX1250: v_cos_f16_e32 v5.l, 1.0                 ; encoding: [0xf2,0xc2,0x0a,0x7e]
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX89: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_cos_f16_e32 v5.l, lit(1.0)
+// GFX11: v_cos_f16_e32 v5.l, lit(0x3c00)         ; encoding: [0xff,0xc2,0x0a,0x7e,0x00,0x3c,0x00,0x00]
+// GFX1250: v_cos_f16_e32 v5.l, lit(0x3c00)         ; encoding: [0xff,0xc2,0x0a,0x7e,0x00,0x3c,0x00,0x00]
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX89: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_tanh_bf16 v5.l, 1.0
+// GFX1250: v_tanh_bf16_e32 v5.l, 1.0               ; encoding: [0xf2,0x94,0x0a,0x7e]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_tanh_bf16 v5.l, lit(1.0)
+// GFX1250: v_tanh_bf16_e32 v5.l, lit(0x3f80)       ; encoding: [0xff,0x94,0x0a,0x7e,0x80,0x3f,0x00,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_trunc_f32_e32 v0, 1.0
+// GFX11: v_trunc_f32_e32 v0, 1.0                 ; encoding: [0xf2,0x42,0x00,0x7e]
+// GFX12XX: v_trunc_f32_e32 v0, 1.0                 ; encoding: [0xf2,0x42,0x00,0x7e]
+// GFX89: v_trunc_f32_e32 v0, 1.0                 ; encoding: [0xf2,0x38,0x00,0x7e]
+// SICI: v_trunc_f32_e32 v0, 1.0                 ; encoding: [0xf2,0x42,0x00,0x7e]
+
+v_trunc_f32_e32 v0, lit(1.0)
+// GFX11: v_trunc_f32_e32 v0, lit(0x3f800000)     ; encoding: [0xff,0x42,0x00,0x7e,0x00,0x00,0x80,0x3f]
+// GFX12XX: v_trunc_f32_e32 v0, lit(0x3f800000)     ; encoding: [0xff,0x42,0x00,0x7e,0x00,0x00,0x80,0x3f]
+// GFX89: v_trunc_f32_e32 v0, lit(0x3f800000)     ; encoding: [0xff,0x38,0x00,0x7e,0x00,0x00,0x80,0x3f]
+// SICI: v_trunc_f32_e32 v0, lit(0x3f800000)     ; encoding: [0xff,0x42,0x00,0x7e,0x00,0x00,0x80,0x3f]
+
+v_dot2_bf16_bf16 v5.l, v1, v2, 1.0
+// GFX11: v_dot2_bf16_bf16 v5.l, v1, v2, 1.0      ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0xca,0x03]
+// NOGFX12: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_dot2_bf16_bf16 v5.l, v1, v2, lit(1.0)
+// GFX11: v_dot2_bf16_bf16 v5.l, v1, v2, lit(0x3f80) ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0xfe,0x03,0x80,0x3f,0x00,0x00]
+// NOGFX12: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_dot2_f32_f16 v5, v1, 1.0, v2
+// GFX11: v_dot2_f32_f16 v5, v1, 1.0, v2          ; encoding: [0x05,0x40,0x13,0xcc,0x01,0xe5,0x09,0x1c]
+// GFX12: v_dot2_f32_f16 v5, v1, 1.0, v2          ; encoding: [0x05,0x40,0x13,0xcc,0x01,0xe5,0x09,0x1c]
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_dot2_f32_f16 v5, v1, lit(1.0), v2
+// GFX11: v_dot2_f32_f16 v5, v1, lit(0x3c00), v2  ; encoding: [0x05,0x40,0x13,0xcc,0x01,0xff,0x09,0x1c,0x00,0x3c,0x00,0x00]
+// GFX12: v_dot2_f32_f16 v5, v1, lit(0x3c00), v2  ; encoding: [0x05,0x40,0x13,0xcc,0x01,0xff,0x09,0x1c,0x00,0x3c,0x00,0x00]
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_cvt_pk_fp8_f16 v1.l, 1.0
+// GFX1250: v_cvt_pk_fp8_f16 v1.l, 0x3c00           ; encoding: [0x01,0x00,0x72,0xd7,0xff,0x00,0x01,0x02,0x00,0x3c,0x00,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_cvt_pk_fp8_f16 v1.l, lit(1.0)
+// GFX1250-ASM: v_cvt_pk_fp8_f16 v1.l, lit(0x3c00)      ; encoding: [0x01,0x00,0x72,0xd7,0xff,0x00,0x01,0x02,0x00,0x3c,0x00,0x00]
+// GFX1250-DIS: v_cvt_pk_fp8_f16 v1.l, 0x3c00           ; encoding: [0x01,0x00,0x72,0xd7,0xff,0x00,0x01,0x02,0x00,0x3c,0x00,0x00]
+// NOGFX11: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
+
+//---------------------------------------------------------------------------//
+// fp literal, expected int operand
+//---------------------------------------------------------------------------//
+
+s_mov_b64_e32 s[0:1], 0.5
+// GFX8PLUS: s_mov_b64 s[0:1], 0.5                   ; encoding: [0xf0,0x01,0x80,0xbe]
+// SICI: s_mov_b64 s[0:1], 0.5                   ; encoding: [0xf0,0x04,0x80,0xbe]
+
+s_mov_b64 s[0:1], lit(0.5)
+// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_and_b32_e32 v0, 0.5, v1
+// GFX11: v_and_b32_e32 v0, 0.5, v1               ; encoding: [0xf0,0x02,0x00,0x36]
+// GFX12XX: v_and_b32_e32 v0, 0.5, v1               ; encoding: [0xf0,0x02,0x00,0x36]
+// GFX89: v_and_b32_e32 v0, 0.5, v1               ; encoding: [0xf0,0x02,0x00,0x26]
+// SICI: v_and_b32_e32 v0, 0.5, v1               ; encoding: [0xf0,0x02,0x00,0x36]
+
+v_and_b32_e64 v0, 0.5, v1
+// GFX11: v_and_b32_e64 v0, 0.5, v1               ; encoding: [0x00,0x00,0x1b,0xd5,0xf0,0x02,0x02,0x02]
+// GFX12XX: v_and_b32_e64 v0, 0.5, v1               ; encoding: [0x00,0x00,0x1b,0xd5,0xf0,0x02,0x02,0x02]
+// GFX89: v_and_b32_e64 v0, 0.5, v1               ; encoding: [0x00,0x00,0x13,0xd1,0xf0,0x02,0x02,0x00]
+// SICI: v_and_b32_e64 v0, 0.5, v1               ; encoding: [0x00,0x00,0x36,0xd2,0xf0,0x02,0x02,0x00]
+
+s_mov_b64_e32 s[0:1], -1.0
+// GFX8PLUS: s_mov_b64 s[0:1], -1.0                  ; encoding: [0xf3,0x01,0x80,0xbe]
+// SICI: s_mov_b64 s[0:1], -1.0                  ; encoding: [0xf3,0x04,0x80,0xbe]
+
+v_and_b32_e32 v0, -1.0, v1
+// GFX11: v_and_b32_e32 v0, -1.0, v1              ; encoding: [0xf3,0x02,0x00,0x36]
+// GFX12XX: v_and_b32_e32 v0, -1.0, v1              ; encoding: [0xf3,0x02,0x00,0x36]
+// GFX89: v_and_b32_e32 v0, -1.0, v1              ; encoding: [0xf3,0x02,0x00,0x26]
+// SICI: v_and_b32_e32 v0, -1.0, v1              ; encoding: [0xf3,0x02,0x00,0x36]
+
+v_and_b32_e64 v0, -1.0, v1
+// GFX11: v_and_b32_e64 v0, -1.0, v1              ; encoding: [0x00,0x00,0x1b,0xd5,0xf3,0x02,0x02,0x02]
+// GFX12XX: v_and_b32_e64 v0, -1.0, v1              ; encoding: [0x00,0x00,0x1b,0xd5,0xf3,0x02,0x02,0x02]
+// GFX89: v_and_b32_e64 v0, -1.0, v1              ; encoding: [0x00,0x00,0x13,0xd1,0xf3,0x02,0x02,0x00]
+// SICI: v_and_b32_e64 v0, -1.0, v1              ; encoding: [0x00,0x00,0x36,0xd2,0xf3,0x02,0x02,0x00]
+
+s_mov_b64_e32 s[0:1], 4.0
+// GFX8PLUS: s_mov_b64 s[0:1], 4.0                   ; encoding: [0xf6,0x01,0x80,0xbe]
+// SICI: s_mov_b64 s[0:1], 4.0                   ; encoding: [0xf6,0x04,0x80,0xbe]
+
+v_and_b32_e32 v0, 4.0, v1
+// GFX11: v_and_b32_e32 v0, 4.0, v1               ; encoding: [0xf6,0x02,0x00,0x36]
+// GFX12XX: v_and_b32_e32 v0, 4.0, v1               ; encoding: [0xf6,0x02,0x00,0x36]
+// GFX89: v_and_b32_e32 v0, 4.0, v1               ; encoding: [0xf6,0x02,0x00,0x26]
+// SICI: v_and_b32_e32 v0, 4.0, v1               ; encoding: [0xf6,0x02,0x00,0x36]
+
+v_and_b32_e64 v0, 4.0, v1
+// GFX11: v_and_b32_e64 v0, 4.0, v1               ; encoding: [0x00,0x00,0x1b,0xd5,0xf6,0x02,0x02,0x02]
+// GFX12XX: v_and_b32_e64 v0, 4.0, v1               ; encoding: [0x00,0x00,0x1b,0xd5,0xf6,0x02,0x02,0x02]
+// GFX89: v_and_b32_e64 v0, 4.0, v1               ; encoding: [0x00,0x00,0x13,0xd1,0xf6,0x02,0x02,0x00]
+// SICI: v_and_b32_e64 v0, 4.0, v1               ; encoding: [0x00,0x00,0x36,0xd2,0xf6,0x02,0x02,0x00]
+
+s_mov_b64_e32 s[0:1], 0.0
+// GFX8PLUS: s_mov_b64 s[0:1], 0                     ; encoding: [0x80,0x01,0x80,0xbe]
+// SICI: s_mov_b64 s[0:1], 0                     ; encoding: [0x80,0x04,0x80,0xbe]
+
+v_and_b32_e32 v0, 0.0, v1
+// GFX11: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x36]
+// GFX12XX: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x36]
+// GFX89: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x26]
+// SICI: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x36]
+
+v_and_b32_e64 v0, 0.0, v1
+// GFX11: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x1b,0xd5,0x80,0x02,0x02,0x02]
+// GFX12XX: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x1b,0xd5,0x80,0x02,0x02,0x02]
+// GFX89: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x13,0xd1,0x80,0x02,0x02,0x00]
+// SICI: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x36,0xd2,0x80,0x02,0x02,0x00]
+
+s_mov_b64_e32 s[0:1], 1.5
+// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_and_b32_e32 v0, 1.5, v1
+// GFX11: v_and_b32_e32 v0, 0x3fc00000, v1        ; encoding: [0xff,0x02,0x00,0x36,0x00,0x00,0xc0,0x3f]
+// GFX12XX: v_and_b32_e32 v0, 0x3fc00000, v1        ; encoding: [0xff,0x02,0x00,0x36,0x00,0x00,0xc0,0x3f]
+// GFX89: v_and_b32_e32 v0, 0x3fc00000, v1        ; encoding: [0xff,0x02,0x00,0x26,0x00,0x00,0xc0,0x3f]
+// SICI: v_and_b32_e32 v0, 0x3fc00000, v1        ; encoding: [0xff,0x02,0x00,0x36,0x00,0x00,0xc0,0x3f]
+
+s_mov_b64_e32 s[0:1], -3.1415
+// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_and_b32_e32 v0, -3.1415, v1
+// GFX11: v_and_b32_e32 v0, 0xc0490e56, v1        ; encoding: [0xff,0x02,0x00,0x36,0x56,0x0e,0x49,0xc0]
+// GFX12XX: v_and_b32_e32 v0, 0xc0490e56, v1        ; encoding: [0xff,0x02,0x00,0x36,0x56,0x0e,0x49,0xc0]
+// GFX89: v_and_b32_e32 v0, 0xc0490e56, v1        ; encoding: [0xff,0x02,0x00,0x26,0x56,0x0e,0x49,0xc0]
+// SICI: v_and_b32_e32 v0, 0xc0490e56, v1        ; encoding: [0xff,0x02,0x00,0x36,0x56,0x0e,0x49,0xc0]
+
+s_mov_b64_e32 s[0:1], 100000000000000000000000.0
+// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_and_b32_e32 v0, 100000000000000000000000.0, v1
+// GFX11: v_and_b32_e32 v0, 0x65a96816, v1        ; encoding: [0xff,0x02,0x00,0x36,0x16,0x68,0xa9,0x65]
+// GFX12XX: v_and_b32_e32 v0, 0x65a96816, v1        ; encoding: [0xff,0x02,0x00,0x36,0x16,0x68,0xa9,0x65]
+// GFX89: v_and_b32_e32 v0, 0x65a96816, v1        ; encoding: [0xff,0x02,0x00,0x26,0x16,0x68,0xa9,0x65]
+// SICI: v_and_b32_e32 v0, 0x65a96816, v1        ; encoding: [0xff,0x02,0x00,0x36,0x16,0x68,0xa9,0x65]
+
+s_mov_b64_e32 s[0:1], 10000000.0
+// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_and_b32_e32 v0, 10000000.0, v1
+// GFX11: v_and_b32_e32 v0, 0x4b189680, v1        ; encoding: [0xff,0x02,0x00,0x36,0x80,0x96,0x18,0x4b]
+// GFX12XX: v_and_b32_e32 v0, 0x4b189680, v1        ; encoding: [0xff,0x02,0x00,0x36,0x80,0x96,0x18,0x4b]
+// GFX89: v_and_b32_e32 v0, 0x4b189680, v1        ; encoding: [0xff,0x02,0x00,0x26,0x80,0x96,0x18,0x4b]
+// SICI: v_and_b32_e32 v0, 0x4b189680, v1        ; encoding: [0xff,0x02,0x00,0x36,0x80,0x96,0x18,0x4b]
+
+s_mov_b64_e32 s[0:1], 3.402823e+38
+// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_and_b32_e32 v0, 3.402823e+38, v1
+// GFX11: v_and_b32_e32 v0, 0x7f7ffffd, v1        ; encoding: [0xff,0x02,0x00,0x36,0xfd,0xff,0x7f,0x7f]
+// GFX12XX: v_and_b32_e32 v0, 0x7f7ffffd, v1        ; encoding: [0xff,0x02,0x00,0x36,0xfd,0xff,0x7f,0x7f]
+// GFX89: v_and_b32_e32 v0, 0x7f7ffffd, v1        ; encoding: [0xff,0x02,0x00,0x26,0xfd,0xff,0x7f,0x7f]
+// SICI: v_and_b32_e32 v0, 0x7f7ffffd, v1        ; encoding: [0xff,0x02,0x00,0x36,0xfd,0xff,0x7f,0x7f]
+
+s_mov_b64_e32 s[0:1], 2.3509886e-38
+// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_and_b32_e32 v0, 2.3509886e-38, v1
+// GFX11: v_and_b32_e32 v0, 0xffffff, v1          ; encoding: [0xff,0x02,0x00,0x36,0xff,0xff,0xff,0x00]
+// GFX12XX: v_and_b32_e32 v0, 0xffffff, v1          ; encoding: [0xff,0x02,0x00,0x36,0xff,0xff,0xff,0x00]
+// GFX89: v_and_b32_e32 v0, 0xffffff, v1          ; encoding: [0xff,0x02,0x00,0x26,0xff,0xff,0xff,0x00]
+// SICI: v_and_b32_e32 v0, 0xffffff, v1          ; encoding: [0xff,0x02,0x00,0x36,0xff,0xff,0xff,0x00]
+
+s_mov_b64_e32 s[0:1], 2.3509886e-70
+// NOGCN: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_and_b32_e32 v0, 2.3509886e-70, v1
+// NOGCN: :[[@LINE-1]]:19: error: invalid operand for instruction
+
+v_not_b16 v5.l, 1.0
+// GFX11: v_not_b16_e32 v5.l, 1.0                 ; encoding: [0xf2,0xd2,0x0a,0x7e]
+// GFX1250-ASM: v_not_b16_e32 v5.l, 1.0                 ; encoding: [0xf2,0xd2,0x0a,0x7e]
+// GFX1250-DIS: v_not_b16_e32 v5.l, 0x3c00              ; encoding: [0xff,0xd2,0x0a,0x7e,0x00,0x3c,0x00,0x00]
+// NOGFX12: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOGFX89: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
+
+v_not_b16 v5.l, lit(1.0)
+// GFX11: v_not_b16_e32 v5.l, lit(0x3f800000)     ; encoding: [0xff,0xd2,0x0a,0x7e,0x00,0x00,0x80,0x3f]
+// GFX1250: v_not_b16_e32 v5.l, lit(0x3f800000)     ; encoding: [0xff,0xd2,0x0a,0x7e,0x00,0x00,0x80,0x3f]
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_and_b32_e32 v0, 1.0, v1
+// GFX11: v_and_b32_e32 v0, 1.0, v1               ; encoding: [0xf2,0x02,0x00,0x36]
+// GFX12XX: v_and_b32_e32 v0, 1.0, v1               ; encoding: [0xf2,0x02,0x00,0x36]
+// GFX89: v_and_b32_e32 v0, 1.0, v1               ; encoding: [0xf2,0x02,0x00,0x26]
+// SICI: v_and_b32_e32 v0, 1.0, v1               ; encoding: [0xf2,0x02,0x00,0x36]
+
+v_and_b32_e32 v0, lit(1.0), v1
+// GFX11: v_and_b32_e32 v0, lit(0x3f800000), v1   ; encoding: [0xff,0x02,0x00,0x36,0x00,0x00,0x80,0x3f]
+// GFX12XX: v_and_b32_e32 v0, lit(0x3f800000), v1   ; encoding: [0xff,0x02,0x00,0x36,0x00,0x00,0x80,0x3f]
+// GFX89: v_and_b32_e32 v0, lit(0x3f800000), v1   ; encoding: [0xff,0x02,0x00,0x26,0x00,0x00,0x80,0x3f]
+// SICI: v_and_b32_e32 v0, lit(0x3f800000), v1   ; encoding: [0xff,0x02,0x00,0x36,0x00,0x00,0x80,0x3f]
+
+v_pk_add_u16 v5, exec_lo, 1.0
+// GFX11: v_pk_add_u16 v5, exec_lo, 1.0           ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0xe4,0x01,0x1a]
+// GFX12XX: v_pk_add_u16 v5, exec_lo, 1.0           ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0xe4,0x01,0x1a]
+// GFX9: v_pk_add_u16 v5, exec_lo, 1.0           ; encoding: [0x05,0x40,0x8a,0xd3,0x7e,0xe4,0x01,0x18]
+// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_pk_add_u16 v5, exec_lo, lit(1.0)
+// GFX11: v_pk_add_u16 v5, exec_lo, lit(0x3f800000) ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0xfe,0x01,0x1a,0x00,0x00,0x80,0x3f]
+// GFX12XX: v_pk_add_u16 v5, exec_lo, lit(0x3f800000) ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0xfe,0x01,0x1a,0x00,0x00,0x80,0x3f]
+// NOGFX9: :[[@LINE-3]]:31: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], 1.0
+// GFX1250: v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], 1.0 ; encoding: [0x02,0x00,0x42,0xd6,0x04,0x09,0xca,0x03]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], lit(1.0)
+// GFX1250: v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], lit(0x3f800000) ; encoding: [0x02,0x00,0x42,0xd6,0x04,0x09,0xfe,0x03,0x00,0x00,0x80,0x3f]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+//---------------------------------------------------------------------------//
+// int literal, expected fp operand
+//---------------------------------------------------------------------------//
+
+v_trunc_f32_e32 v0, 0
+// GFX11: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x42,0x00,0x7e]
+// GFX12XX: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x42,0x00,0x7e]
+// GFX89: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x38,0x00,0x7e]
+// SICI: v_trunc_f32_e32 v0, 0                   ; encoding: [0x80,0x42,0x00,0x7e]
+
+v_fract_f64_e32 v[0:1], 1
+// GFX11: v_fract_f64_e32 v[0:1], 1               ; encoding: [0x81,0x7c,0x00,0x7e]
+// GFX12XX: v_fract_f64_e32 v[0:1], 1               ; encoding: [0x81,0x7c,0x00,0x7e]
+// GFX89: v_fract_f64_e32 v[0:1], 1               ; encoding: [0x81,0x64,0x00,0x7e]
+// SICI: v_fract_f64_e32 v[0:1], 1               ; encoding: [0x81,0x7c,0x00,0x7e]
+
+v_fract_f64_e32 v[0:1], lit(1)
+// GFX11: v_fract_f64_e32 v[0:1], lit(0x1)        ; encoding: [0xff,0x7c,0x00,0x7e,0x01,0x00,0x00,0x00]
+// GFX12: v_fract_f64_e32 v[0:1], lit(0x1)        ; encoding: [0xff,0x7c,0x00,0x7e,0x01,0x00,0x00,0x00]
+// GFX1250-ASM: v_fract_f64_e32 v[0:1], lit(0x1)        ; encoding: [0xfe,0x7c,0x00,0x7e,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
+// GFX1250-DIS: v_fract_f64_e32 v[0:1], lit64(0x1)      ; encoding: [0xfe,0x7c,0x00,0x7e,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
+// GFX89: v_fract_f64_e32 v[0:1], lit(0x1)        ; encoding: [0xff,0x64,0x00,0x7e,0x01,0x00,0x00,0x00]
+// SICI: v_fract_f64_e32 v[0:1], lit(0x1)        ; encoding: [0xff,0x7c,0x00,0x7e,0x01,0x00,0x00,0x00]
+
+v_trunc_f32_e64 v0, 0
+// GFX11: v_trunc_f32_e64 v0, 0                   ; encoding: [0x00,0x00,0xa1,0xd5,0x80,0x00,0x01,0x02]
+// GFX12XX: v_trunc_f32_e64 v0, 0                   ; encoding: [0x00,0x00,0xa1,0xd5,0x80,0x00,0x01,0x02]
+// GFX89: v_trunc_f32_e64 v0, 0                   ; encoding: [0x00,0x00,0x5c,0xd1,0x80,0x00,0x00,0x00]
+// SICI: v_trunc_f32_e64 v0, 0                   ; encoding: [0x00,0x00,0x42,0xd3,0x80,0x00,0x00,0x00]
+
+v_fract_f64_e64 v[0:1], 0
+// GFX11: v_fract_f64_e64 v[0:1], 0               ; encoding: [0x00,0x00,0xbe,0xd5,0x80,0x00,0x01,0x02]
+// GFX12XX: v_fract_f64_e64 v[0:1], 0               ; encoding: [0x00,0x00,0xbe,0xd5,0x80,0x00,0x01,0x02]
+// GFX89: v_fract_f64_e64 v[0:1], 0               ; encoding: [0x00,0x00,0x72,0xd1,0x80,0x00,0x00,0x00]
+// SICI: v_fract_f64_e64 v[0:1], 0               ; encoding: [0x00,0x00,0x7c,0xd3,0x80,0x00,0x00,0x00]
+
+v_trunc_f32_e32 v0, -13
+// GFX11: v_trunc_f32_e32 v0, -13                 ; encoding: [0xcd,0x42,0x00,0x7e]
+// GFX12XX: v_trunc_f32_e32 v0, -13                 ; encoding: [0xcd,0x42,0x00,0x7e]
+// GFX89: v_trunc_f32_e32 v0, -13                 ; encoding: [0xcd,0x38,0x00,0x7e]
+// SICI: v_trunc_f32_e32 v0, -13                 ; encoding: [0xcd,0x42,0x00,0x7e]
+
+v_fract_f64_e32 v[0:1], -13
+// GFX11: v_fract_f64_e32 v[0:1], -13             ; encoding: [0xcd,0x7c,0x00,0x7e]
+// GFX12XX: v_fract_f64_e32 v[0:1], -13             ; encoding: [0xcd,0x7c,0x00,0x7e]
+// GFX89: v_fract_f64_e32 v[0:1], -13             ; encoding: [0xcd,0x64,0x00,0x7e]
+// SICI: v_fract_f64_e32 v[0:1], -13             ; encoding: [0xcd,0x7c,0x00,0x7e]
+
+v_trunc_f32_e64 v0, -13
+// GFX11: v_trunc_f32_e64 v0, -13                 ; encoding: [0x00,0x00,0xa1,0xd5,0xcd,0x00,0x01,0x02]
+// GFX12XX: v_trunc_f32_e64 v0, -13                 ; encoding: [0x00,0x00,0xa1,0xd5,0xcd,0x00,0x01,0x02]
+// GFX89: v_trunc_f32_e64 v0, -13                 ; encoding: [0x00,0x00,0x5c,0xd1,0xcd,0x00,0x00,0x00]
+// SICI: v_trunc_f32_e64 v0, -13                 ; encoding: [0x00,0x00,0x42,0xd3,0xcd,0x00,0x00,0x00]
+
+v_fract_f64_e64 v[0:1], -13
+// GFX11: v_fract_f64_e64 v[0:1], -13             ; encoding: [0x00,0x00,0xbe,0xd5,0xcd,0x00,0x01,0x02]
+// GFX12XX: v_fract_f64_e64 v[0:1], -13             ; encoding: [0x00,0x00,0xbe,0xd5,0xcd,0x00,0x01,0x02]
+// GFX89: v_fract_f64_e64 v[0:1], -13             ; encoding: [0x00,0x00,0x72,0xd1,0xcd,0x00,0x00,0x00]
+// SICI: v_fract_f64_e64 v[0:1], -13             ; encoding: [0x00,0x00,0x7c,0xd3,0xcd,0x00,0x00,0x00]
+
+v_trunc_f32_e32 v0, 35
+// GFX11: v_trunc_f32_e32 v0, 35                  ; encoding: [0xa3,0x42,0x00,0x7e]
+// GFX12XX: v_trunc_f32_e32 v0, 35                  ; encoding: [0xa3,0x42,0x00,0x7e]
+// GFX89: v_trunc_f32_e32 v0, 35                  ; encoding: [0xa3,0x38,0x00,0x7e]
+// SICI: v_trunc_f32_e32 v0, 35                  ; encoding: [0xa3,0x42,0x00,0x7e]
+
+v_fract_f64_e32 v[0:1], 35
+// GFX11: v_fract_f64_e32 v[0:1], 35              ; encoding: [0xa3,0x7c,0x00,0x7e]
+// GFX12XX: v_fract_f64_e32 v[0:1], 35              ; encoding: [0xa3,0x7c,0x00,0x7e]
+// GFX89: v_fract_f64_e32 v[0:1], 35              ; encoding: [0xa3,0x64,0x00,0x7e]
+// SICI: v_fract_f64_e32 v[0:1], 35              ; encoding: [0xa3,0x7c,0x00,0x7e]
+
+v_trunc_f32_e64 v0, 35
+// GFX11: v_trunc_f32_e64 v0, 35                  ; encoding: [0x00,0x00,0xa1,0xd5,0xa3,0x00,0x01,0x02]
+// GFX12XX: v_trunc_f32_e64 v0, 35                  ; encoding: [0x00,0x00,0xa1,0xd5,0xa3,0x00,0x01,0x02]
+// GFX89: v_trunc_f32_e64 v0, 35                  ; encoding: [0x00,0x00,0x5c,0xd1,0xa3,0x00,0x00,0x00]
+// SICI: v_trunc_f32_e64 v0, 35                  ; encoding: [0x00,0x00,0x42,0xd3,0xa3,0x00,0x00,0x00]
+
+v_fract_f64_e64 v[0:1], 35
+// GFX11: v_fract_f64_e64 v[0:1], 35              ; encoding: [0x00,0x00,0xbe,0xd5,0xa3,0x00,0x01,0x02]
+// GFX12XX: v_fract_f64_e64 v[0:1], 35              ; encoding: [0x00,0x00,0xbe,0xd5,0xa3,0x00,0x01,0x02]
+// GFX89: v_fract_f64_e64 v[0:1], 35              ; encoding: [0x00,0x00,0x72,0xd1,0xa3,0x00,0x00,0x00]
+// SICI: v_fract_f64_e64 v[0:1], 35              ; encoding: [0x00,0x00,0x7c,0xd3,0xa3,0x00,0x00,0x00]
+
+v_trunc_f32_e32 v0, 1234
+// GFX11: v_trunc_f32_e32 v0, 0x4d2               ; encoding: [0xff,0x42,0x00,0x7e,0xd2,0x04,0x00,0x00]
+// GFX12XX: v_trunc_f32_e32 v0, 0x4d2               ; encoding: [0xff,0x42,0x00,0x7e,0xd2,0x04,0x00,0x00]
+// GFX89: v_trunc_f32_e32 v0, 0x4d2               ; encoding: [0xff,0x38,0x00,0x7e,0xd2,0x04,0x00,0x00]
+// SICI: v_trunc_f32_e32 v0, 0x4d2               ; encoding: [0xff,0x42,0x00,0x7e,0xd2,0x04,0x00,0x00]
+
+v_fract_f64_e32 v[0:1], 1234
+// GFX11: v_fract_f64_e32 v[0:1], 0x4d2           ; encoding: [0xff,0x7c,0x00,0x7e,0xd2,0x04,0x00,0x00]
+// GFX12XX: v_fract_f64_e32 v[0:1], 0x4d2           ; encoding: [0xff,0x7c,0x00,0x7e,0xd2,0x04,0x00,0x00]
+// GFX89: v_fract_f64_e32 v[0:1], 0x4d2           ; encoding: [0xff,0x64,0x00,0x7e,0xd2,0x04,0x00,0x00]
+// SICI: v_fract_f64_e32 v[0:1], 0x4d2           ; encoding: [0xff,0x7c,0x00,0x7e,0xd2,0x04,0x00,0x00]
+
+v_trunc_f32_e64 v0, 1234
+// GFX11: v_trunc_f32_e64 v0, 0x4d2               ; encoding: [0x00,0x00,0xa1,0xd5,0xff,0x00,0x01,0x02,0xd2,0x04,0x00,0x00]
+// GFX12XX: v_trunc_f32_e64 v0, 0x4d2               ; encoding: [0x00,0x00,0xa1,0xd5,0xff,0x00,0x01,0x02,0xd2,0x04,0x00,0x00]
+// NOGFX89: :[[@LINE-3]]:21: error: literal operands are not supported
+// NOSICI: :[[@LINE-4]]:21: error: literal operands are not supported
+
+v_fract_f64_e64 v[0:1], 1234
+// GFX11: v_fract_f64_e64 v[0:1], 0x4d2           ; encoding: [0x00,0x00,0xbe,0xd5,0xff,0x00,0x01,0x02,0xd2,0x04,0x00,0x00]
+// GFX12XX: v_fract_f64_e64 v[0:1], 0x4d2           ; encoding: [0x00,0x00,0xbe,0xd5,0xff,0x00,0x01,0x02,0xd2,0x04,0x00,0x00]
+// NOGFX89: :[[@LINE-3]]:25: error: literal operands are not supported
+// NOSICI: :[[@LINE-4]]:25: error: literal operands are not supported
+
+v_trunc_f32_e32 v0, -54321
+// GFX11: v_trunc_f32_e32 v0, 0xffff2bcf          ; encoding: [0xff,0x42,0x00,0x7e,0xcf,0x2b,0xff,0xff]
+// GFX12XX: v_trunc_f32_e32 v0, 0xffff2bcf          ; encoding: [0xff,0x42,0x00,0x7e,0xcf,0x2b,0xff,0xff]
+// GFX89: v_trunc_f32_e32 v0, 0xffff2bcf          ; encoding: [0xff,0x38,0x00,0x7e,0xcf,0x2b,0xff,0xff]
+// SICI: v_trunc_f32_e32 v0, 0xffff2bcf          ; encoding: [0xff,0x42,0x00,0x7e,0xcf,0x2b,0xff,0xff]
+
+v_fract_f64_e32 v[0:1], -54321
+// GFX11: v_fract_f64_e32 v[0:1], 0xffff2bcf      ; encoding: [0xff,0x7c,0x00,0x7e,0xcf,0x2b,0xff,0xff]
+// GFX12XX: v_fract_f64_e32 v[0:1], 0xffff2bcf      ; encoding: [0xff,0x7c,0x00,0x7e,0xcf,0x2b,0xff,0xff]
+// GFX89: v_fract_f64_e32 v[0:1], 0xffff2bcf      ; encoding: [0xff,0x64,0x00,0x7e,0xcf,0x2b,0xff,0xff]
+// SICI: v_fract_f64_e32 v[0:1], 0xffff2bcf      ; encoding: [0xff,0x7c,0x00,0x7e,0xcf,0x2b,0xff,0xff]
+
+v_trunc_f32_e32 v0, 0xdeadbeef
+// GFX11: v_trunc_f32_e32 v0, 0xdeadbeef          ; encoding: [0xff,0x42,0x00,0x7e,0xef,0xbe,0xad,0xde]
+// GFX12XX: v_trunc_f32_e32 v0, 0xdeadbeef          ; encoding: [0xff,0x42,0x00,0x7e,0xef,0xbe,0xad,0xde]
+// GFX89: v_trunc_f32_e32 v0, 0xdeadbeef          ; encoding: [0xff,0x38,0x00,0x7e,0xef,0xbe,0xad,0xde]
+// SICI: v_trunc_f32_e32 v0, 0xdeadbeef          ; encoding: [0xff,0x42,0x00,0x7e,0xef,0xbe,0xad,0xde]
+
+v_fract_f64_e32 v[0:1], 0xdeadbeef
+// GFX11: v_fract_f64_e32 v[0:1], 0xdeadbeef      ; encoding: [0xff,0x7c,0x00,0x7e,0xef,0xbe,0xad,0xde]
+// GFX12XX: v_fract_f64_e32 v[0:1], 0xdeadbeef      ; encoding: [0xff,0x7c,0x00,0x7e,0xef,0xbe,0xad,0xde]
+// GFX89: v_fract_f64_e32 v[0:1], 0xdeadbeef      ; encoding: [0xff,0x64,0x00,0x7e,0xef,0xbe,0xad,0xde]
+// SICI: v_fract_f64_e32 v[0:1], 0xdeadbeef      ; encoding: [0xff,0x7c,0x00,0x7e,0xef,0xbe,0xad,0xde]
+
+v_trunc_f32_e32 v0, 0xffffffff
+// GFX11: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x42,0x00,0x7e]
+// GFX12XX: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x42,0x00,0x7e]
+// GFX89: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x38,0x00,0x7e]
+// SICI: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x42,0x00,0x7e]
+
+v_fract_f64_e32 v[0:1], 0xffffffff
+// GFX11: v_fract_f64_e32 v[0:1], 0xffffffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0xff,0xff]
+// GFX12XX: v_fract_f64_e32 v[0:1], 0xffffffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0xff,0xff]
+// GFX89: v_fract_f64_e32 v[0:1], 0xffffffff      ; encoding: [0xff,0x64,0x00,0x7e,0xff,0xff,0xff,0xff]
+// SICI: v_fract_f64_e32 v[0:1], 0xffffffff      ; encoding: [0xff,0x7c,0x00,0x7e,0xff,0xff,0xff,0xff]
+
+v_trunc_f32_e32 v0, 0x123456789abcdef0
+// NOGCN: :[[@LINE-1]]:21: error: invalid operand for instruction
+
+v_fract_f64_e32 v[0:1], 0x123456789abcdef0
+// GFX1250: v_fract_f64_e32 v[0:1], 0x123456789abcdef0 ; encoding: [0xfe,0x7c,0x00,0x7e,0xf0,0xde,0xbc,0x9a,0x78,0x56,0x34,0x12]
+// NOGFX11: :[[@LINE-2]]:25: error: invalid operand for instruction
+// NOGFX12: :[[@LINE-3]]:25: error: invalid operand for instruction
+// NOGFX89: :[[@LINE-4]]:25: error: invalid operand for instruction
+// NOSICI: :[[@LINE-5]]:25: error: invalid operand for instruction
+
+v_trunc_f32_e32 v0, 0xffffffffffffffff
+// GFX11: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x42,0x00,0x7e]
+// GFX12XX: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x42,0x00,0x7e]
+// GFX89: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x38,0x00,0x7e]
+// SICI: v_trunc_f32_e32 v0, -1                  ; encoding: [0xc1,0x42,0x00,0x7e]
+
+v_fract_f64_e32 v[0:1], 0xffffffffffffffff
+// GFX11: v_fract_f64_e32 v[0:1], -1              ; encoding: [0xc1,0x7c,0x00,0x7e]
+// GFX12XX: v_fract_f64_e32 v[0:1], -1              ; encoding: [0xc1,0x7c,0x00,0x7e]
+// GFX89: v_fract_f64_e32 v[0:1], -1              ; encoding: [0xc1,0x64,0x00,0x7e]
+// SICI: v_fract_f64_e32 v[0:1], -1              ; encoding: [0xc1,0x7c,0x00,0x7e]
+
+v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], 1
+// GFX11: v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], 1 ; encoding: [0x08,0x40,0x44,0xcc,0x00,0x09,0x06,0x1a]
+// NOGFX12: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], lit(1)
+// NOGFX11: :[[@LINE-1]]:54: error: invalid operand for instruction
+// NOGFX12: :[[@LINE-2]]:54: error: invalid operand for instruction
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_cos_f16_e32 v5.l, 1
+// GFX11: v_cos_f16_e32 v5.l, 1                   ; encoding: [0x81,0xc2,0x0a,0x7e]
+// GFX1250: v_cos_f16_e32 v5.l, 1                   ; encoding: [0x81,0xc2,0x0a,0x7e]
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX89: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_cos_f16_e32 v5.l, lit(1)
+// GFX11: v_cos_f16_e32 v5.l, lit(0x1)            ; encoding: [0xff,0xc2,0x0a,0x7e,0x01,0x00,0x00,0x00]
+// GFX1250: v_cos_f16_e32 v5.l, lit(0x1)            ; encoding: [0xff,0xc2,0x0a,0x7e,0x01,0x00,0x00,0x00]
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX89: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_tanh_bf16 v5.l, 1
+// GFX1250: v_tanh_bf16_e32 v5.l, 1                 ; encoding: [0x81,0x94,0x0a,0x7e]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_tanh_bf16 v5.l, lit(1)
+// GFX1250: v_tanh_bf16_e32 v5.l, lit(0x1)          ; encoding: [0xff,0x94,0x0a,0x7e,0x01,0x00,0x00,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_trunc_f32_e32 v0, 1
+// GFX11: v_trunc_f32_e32 v0, 1                   ; encoding: [0x81,0x42,0x00,0x7e]
+// GFX12XX: v_trunc_f32_e32 v0, 1                   ; encoding: [0x81,0x42,0x00,0x7e]
+// GFX89: v_trunc_f32_e32 v0, 1                   ; encoding: [0x81,0x38,0x00,0x7e]
+// SICI: v_trunc_f32_e32 v0, 1                   ; encoding: [0x81,0x42,0x00,0x7e]
+
+v_trunc_f32_e32 v0, lit(1)
+// GFX11: v_trunc_f32_e32 v0, lit(0x1)            ; encoding: [0xff,0x42,0x00,0x7e,0x01,0x00,0x00,0x00]
+// GFX12XX: v_trunc_f32_e32 v0, lit(0x1)            ; encoding: [0xff,0x42,0x00,0x7e,0x01,0x00,0x00,0x00]
+// GFX89: v_trunc_f32_e32 v0, lit(0x1)            ; encoding: [0xff,0x38,0x00,0x7e,0x01,0x00,0x00,0x00]
+// SICI: v_trunc_f32_e32 v0, lit(0x1)            ; encoding: [0xff,0x42,0x00,0x7e,0x01,0x00,0x00,0x00]
+
+v_dot2_bf16_bf16 v5.l, v1, v2, 1
+// GFX11: v_dot2_bf16_bf16 v5.l, v1, v2, 1        ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0x06,0x02]
+// NOGFX12: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_dot2_bf16_bf16 v5.l, v1, v2, lit(1)
+// GFX11: v_dot2_bf16_bf16 v5.l, v1, v2, lit(0x1) ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0xfe,0x03,0x01,0x00,0x00,0x00]
+// NOGFX12: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_dot2_f32_f16 v5, v1, 1, v2
+// GFX11: v_dot2_f32_f16 v5, v1, 1, v2            ; encoding: [0x05,0x40,0x13,0xcc,0x01,0x03,0x09,0x1c]
+// GFX12: v_dot2_f32_f16 v5, v1, 1, v2            ; encoding: [0x05,0x40,0x13,0xcc,0x01,0x03,0x09,0x1c]
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_dot2_f32_f16 v5, v1, lit(1), v2
+// GFX11: v_dot2_f32_f16 v5, v1, lit(0x1), v2     ; encoding: [0x05,0x40,0x13,0xcc,0x01,0xff,0x09,0x1c,0x01,0x00,0x00,0x00]
+// GFX12: v_dot2_f32_f16 v5, v1, lit(0x1), v2     ; encoding: [0x05,0x40,0x13,0xcc,0x01,0xff,0x09,0x1c,0x01,0x00,0x00,0x00]
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_cvt_pk_fp8_f16 v1.l, 1
+// GFX1250: v_cvt_pk_fp8_f16 v1.l, 1                ; encoding: [0x01,0x00,0x72,0xd7,0xff,0x00,0x01,0x02,0x01,0x00,0x00,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_cvt_pk_fp8_f16 v1.l, lit(1)
+// GFX1250-ASM: v_cvt_pk_fp8_f16 v1.l, lit(0x1)         ; encoding: [0x01,0x00,0x72,0xd7,0xff,0x00,0x01,0x02,0x01,0x00,0x00,0x00]
+// GFX1250-DIS: v_cvt_pk_fp8_f16 v1.l, 1                ; encoding: [0x01,0x00,0x72,0xd7,0xff,0x00,0x01,0x02,0x01,0x00,0x00,0x00]
+// NOGFX11: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
+
+//---------------------------------------------------------------------------//
+// int literal, expected int operand
+//---------------------------------------------------------------------------//
+
+s_mov_b64_e32 s[0:1], 0
+// GFX8PLUS: s_mov_b64 s[0:1], 0                     ; encoding: [0x80,0x01,0x80,0xbe]
+// SICI: s_mov_b64 s[0:1], 0                     ; encoding: [0x80,0x04,0x80,0xbe]
+
+v_and_b32_e32 v0, 0, v1
+// GFX11: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x36]
+// GFX12XX: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x36]
+// GFX89: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x26]
+// SICI: v_and_b32_e32 v0, 0, v1                 ; encoding: [0x80,0x02,0x00,0x36]
+
+v_and_b32_e64 v0, 0, v1
+// GFX11: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x1b,0xd5,0x80,0x02,0x02,0x02]
+// GFX12XX: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x1b,0xd5,0x80,0x02,0x02,0x02]
+// GFX89: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x13,0xd1,0x80,0x02,0x02,0x00]
+// SICI: v_and_b32_e64 v0, 0, v1                 ; encoding: [0x00,0x00,0x36,0xd2,0x80,0x02,0x02,0x00]
+
+s_mov_b64_e32 s[0:1], -13
+// GFX8PLUS: s_mov_b64 s[0:1], -13                   ; encoding: [0xcd,0x01,0x80,0xbe]
+// SICI: s_mov_b64 s[0:1], -13                   ; encoding: [0xcd,0x04,0x80,0xbe]
+
+v_and_b32_e32 v0, -13, v1
+// GFX11: v_and_b32_e32 v0, -13, v1               ; encoding: [0xcd,0x02,0x00,0x36]
+// GFX12XX: v_and_b32_e32 v0, -13, v1               ; encoding: [0xcd,0x02,0x00,0x36]
+// GFX89: v_and_b32_e32 v0, -13, v1               ; encoding: [0xcd,0x02,0x00,0x26]
+// SICI: v_and_b32_e32 v0, -13, v1               ; encoding: [0xcd,0x02,0x00,0x36]
+
+v_and_b32_e64 v0, -13, v1
+// GFX11: v_and_b32_e64 v0, -13, v1               ; encoding: [0x00,0x00,0x1b,0xd5,0xcd,0x02,0x02,0x02]
+// GFX12XX: v_and_b32_e64 v0, -13, v1               ; encoding: [0x00,0x00,0x1b,0xd5,0xcd,0x02,0x02,0x02]
+// GFX89: v_and_b32_e64 v0, -13, v1               ; encoding: [0x00,0x00,0x13,0xd1,0xcd,0x02,0x02,0x00]
+// SICI: v_and_b32_e64 v0, -13, v1               ; encoding: [0x00,0x00,0x36,0xd2,0xcd,0x02,0x02,0x00]
+
+s_mov_b64_e32 s[0:1], 35
+// GFX8PLUS: s_mov_b64 s[0:1], 35                    ; encoding: [0xa3,0x01,0x80,0xbe]
+// SICI: s_mov_b64 s[0:1], 35                    ; encoding: [0xa3,0x04,0x80,0xbe]
+
+v_and_b32_e32 v0, 35, v1
+// GFX11: v_and_b32_e32 v0, 35, v1                ; encoding: [0xa3,0x02,0x00,0x36]
+// GFX12XX: v_and_b32_e32 v0, 35, v1                ; encoding: [0xa3,0x02,0x00,0x36]
+// GFX89: v_and_b32_e32 v0, 35, v1                ; encoding: [0xa3,0x02,0x00,0x26]
+// SICI: v_and_b32_e32 v0, 35, v1                ; encoding: [0xa3,0x02,0x00,0x36]
+
+v_and_b32_e64 v0, 35, v1
+// GFX11: v_and_b32_e64 v0, 35, v1                ; encoding: [0x00,0x00,0x1b,0xd5,0xa3,0x02,0x02,0x02]
+// GFX12XX: v_and_b32_e64 v0, 35, v1                ; encoding: [0x00,0x00,0x1b,0xd5,0xa3,0x02,0x02,0x02]
+// GFX89: v_and_b32_e64 v0, 35, v1                ; encoding: [0x00,0x00,0x13,0xd1,0xa3,0x02,0x02,0x00]
+// SICI: v_and_b32_e64 v0, 35, v1                ; encoding: [0x00,0x00,0x36,0xd2,0xa3,0x02,0x02,0x00]
+
+s_mov_b64_e32 s[0:1], 1234
+// GFX8PLUS: s_mov_b64 s[0:1], 0x4d2                 ; encoding: [0xff,0x01,0x80,0xbe,0xd2,0x04,0x00,0x00]
+// SICI: s_mov_b64 s[0:1], 0x4d2                 ; encoding: [0xff,0x04,0x80,0xbe,0xd2,0x04,0x00,0x00]
+
+v_and_b32_e32 v0, 1234, v1
+// GFX11: v_and_b32_e32 v0, 0x4d2, v1             ; encoding: [0xff,0x02,0x00,0x36,0xd2,0x04,0x00,0x00]
+// GFX12XX: v_and_b32_e32 v0, 0x4d2, v1             ; encoding: [0xff,0x02,0x00,0x36,0xd2,0x04,0x00,0x00]
+// GFX89: v_and_b32_e32 v0, 0x4d2, v1             ; encoding: [0xff,0x02,0x00,0x26,0xd2,0x04,0x00,0x00]
+// SICI: v_and_b32_e32 v0, 0x4d2, v1             ; encoding: [0xff,0x02,0x00,0x36,0xd2,0x04,0x00,0x00]
+
+v_and_b32_e64 v0, 1234, v1
+// GFX11: v_and_b32_e64 v0, 0x4d2, v1             ; encoding: [0x00,0x00,0x1b,0xd5,0xff,0x02,0x02,0x02,0xd2,0x04,0x00,0x00]
+// GFX12XX: v_and_b32_e64 v0, 0x4d2, v1             ; encoding: [0x00,0x00,0x1b,0xd5,0xff,0x02,0x02,0x02,0xd2,0x04,0x00,0x00]
+// NOGFX89: :[[@LINE-3]]:19: error: literal operands are not supported
+// NOSICI: :[[@LINE-4]]:19: error: literal operands are not supported
+
+s_mov_b64_e32 s[0:1], -54321
+// GFX11: s_mov_b64 s[0:1], 0xffff2bcf            ; encoding: [0xff,0x01,0x80,0xbe,0xcf,0x2b,0xff,0xff]
+// GFX12: s_mov_b64 s[0:1], 0xffff2bcf            ; encoding: [0xff,0x01,0x80,0xbe,0xcf,0x2b,0xff,0xff]
+// GFX1250: s_mov_b64 s[0:1], 0xffffffffffff2bcf    ; encoding: [0xfe,0x01,0x80,0xbe,0xcf,0x2b,0xff,0xff,0xff,0xff,0xff,0xff]
+// GFX89: s_mov_b64 s[0:1], 0xffff2bcf            ; encoding: [0xff,0x01,0x80,0xbe,0xcf,0x2b,0xff,0xff]
+// SICI: s_mov_b64 s[0:1], 0xffff2bcf            ; encoding: [0xff,0x04,0x80,0xbe,0xcf,0x2b,0xff,0xff]
+
+v_and_b32_e32 v0, -54321, v1
+// GFX11: v_and_b32_e32 v0, 0xffff2bcf, v1        ; encoding: [0xff,0x02,0x00,0x36,0xcf,0x2b,0xff,0xff]
+// GFX12XX: v_and_b32_e32 v0, 0xffff2bcf, v1        ; encoding: [0xff,0x02,0x00,0x36,0xcf,0x2b,0xff,0xff]
+// GFX89: v_and_b32_e32 v0, 0xffff2bcf, v1        ; encoding: [0xff,0x02,0x00,0x26,0xcf,0x2b,0xff,0xff]
+// SICI: v_and_b32_e32 v0, 0xffff2bcf, v1        ; encoding: [0xff,0x02,0x00,0x36,0xcf,0x2b,0xff,0xff]
+
+s_mov_b64_e32 s[0:1], 0xdeadbeef
+// GFX11: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xff,0x01,0x80,0xbe,0xef,0xbe,0xad,0xde]
+// GFX12XX: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xff,0x01,0x80,0xbe,0xef,0xbe,0xad,0xde]
+// GFX89: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xff,0x01,0x80,0xbe,0xef,0xbe,0xad,0xde]
+// SICI: s_mov_b64 s[0:1], 0xdeadbeef            ; encoding: [0xff,0x04,0x80,0xbe,0xef,0xbe,0xad,0xde]
+
+v_and_b32_e32 v0, 0xdeadbeef, v1
+// GFX11: v_and_b32_e32 v0, 0xdeadbeef, v1        ; encoding: [0xff,0x02,0x00,0x36,0xef,0xbe,0xad,0xde]
+// GFX12XX: v_and_b32_e32 v0, 0xdeadbeef, v1        ; encoding: [0xff,0x02,0x00,0x36,0xef,0xbe,0xad,0xde]
+// GFX89: v_and_b32_e32 v0, 0xdeadbeef, v1        ; encoding: [0xff,0x02,0x00,0x26,0xef,0xbe,0xad,0xde]
+// SICI: v_and_b32_e32 v0, 0xdeadbeef, v1        ; encoding: [0xff,0x02,0x00,0x36,0xef,0xbe,0xad,0xde]
+
+s_mov_b64_e32 s[0:1], 0xffffffff
+// GFX11: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xff,0x01,0x80,0xbe,0xff,0xff,0xff,0xff]
+// GFX12XX: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xff,0x01,0x80,0xbe,0xff,0xff,0xff,0xff]
+// GFX89: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xff,0x01,0x80,0xbe,0xff,0xff,0xff,0xff]
+// SICI: s_mov_b64 s[0:1], 0xffffffff            ; encoding: [0xff,0x04,0x80,0xbe,0xff,0xff,0xff,0xff]
+
+v_and_b32_e32 v0, 0xffffffff, v1
+// GFX11: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x36]
+// GFX12XX: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x36]
+// GFX89: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x26]
+// SICI: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x36]
+
+s_mov_b64_e32 s[0:1], 0x123456789abcdef0
+// GFX1250: s_mov_b64 s[0:1], 0x123456789abcdef0    ; encoding: [0xfe,0x01,0x80,0xbe,0xf0,0xde,0xbc,0x9a,0x78,0x56,0x34,0x12]
+// NOGFX11: :[[@LINE-2]]:23: error: invalid operand for instruction
+// NOGFX12: :[[@LINE-3]]:23: error: invalid operand for instruction
+// NOGFX89: :[[@LINE-4]]:23: error: invalid operand for instruction
+// NOSICI: :[[@LINE-5]]:23: error: invalid operand for instruction
+
+v_and_b32_e32 v0, 0x123456789abcdef0, v1
+// NOGCN: :[[@LINE-1]]:19: error: invalid operand for instruction
+
+s_mov_b64_e32 s[0:1], 0xffffffffffffffff
+// GFX8PLUS: s_mov_b64 s[0:1], -1                    ; encoding: [0xc1,0x01,0x80,0xbe]
+// SICI: s_mov_b64 s[0:1], -1                    ; encoding: [0xc1,0x04,0x80,0xbe]
+
+v_and_b32_e32 v0, 0xffffffffffffffff, v1
+// GFX11: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x36]
+// GFX12XX: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x36]
+// GFX89: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x26]
+// SICI: v_and_b32_e32 v0, -1, v1                ; encoding: [0xc1,0x02,0x00,0x36]
+
+v_not_b16 v5.l, 1
+// GFX11: v_not_b16_e32 v5.l, 1                   ; encoding: [0x81,0xd2,0x0a,0x7e]
+// GFX1250: v_not_b16_e32 v5.l, 1                   ; encoding: [0x81,0xd2,0x0a,0x7e]
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_not_b16 v5.l, lit(1)
+// GFX11: v_not_b16_e32 v5.l, lit(0x1)            ; encoding: [0xff,0xd2,0x0a,0x7e,0x01,0x00,0x00,0x00]
+// GFX1250: v_not_b16_e32 v5.l, lit(0x1)            ; encoding: [0xff,0xd2,0x0a,0x7e,0x01,0x00,0x00,0x00]
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+s_mov_b64 s[0:1], 1
+// GFX8PLUS: s_mov_b64 s[0:1], 1                     ; encoding: [0x81,0x01,0x80,0xbe]
+// SICI: s_mov_b64 s[0:1], 1                     ; encoding: [0x81,0x04,0x80,0xbe]
+
+s_mov_b64 s[0:1], lit(1)
+// GFX11: s_mov_b64 s[0:1], lit(0x1)              ; encoding: [0xff,0x01,0x80,0xbe,0x01,0x00,0x00,0x00]
+// GFX12: s_mov_b64 s[0:1], lit(0x1)              ; encoding: [0xff,0x01,0x80,0xbe,0x01,0x00,0x00,0x00]
+// GFX1250-ASM: s_mov_b64 s[0:1], lit(0x1)              ; encoding: [0xfe,0x01,0x80,0xbe,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
+// GFX1250-DIS: s_mov_b64 s[0:1], lit64(0x1)            ; encoding: [0xfe,0x01,0x80,0xbe,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
+// GFX89: s_mov_b64 s[0:1], lit(0x1)              ; encoding: [0xff,0x01,0x80,0xbe,0x01,0x00,0x00,0x00]
+// SICI: s_mov_b64 s[0:1], lit(0x1)              ; encoding: [0xff,0x04,0x80,0xbe,0x01,0x00,0x00,0x00]
+
+v_and_b32_e32 v0, 1, v1
+// GFX11: v_and_b32_e32 v0, 1, v1                 ; encoding: [0x81,0x02,0x00,0x36]
+// GFX12XX: v_and_b32_e32 v0, 1, v1                 ; encoding: [0x81,0x02,0x00,0x36]
+// GFX89: v_and_b32_e32 v0, 1, v1                 ; encoding: [0x81,0x02,0x00,0x26]
+// SICI: v_and_b32_e32 v0, 1, v1                 ; encoding: [0x81,0x02,0x00,0x36]
+
+v_and_b32_e32 v0, lit(1), v1
+// GFX11: v_and_b32_e32 v0, lit(0x1), v1          ; encoding: [0xff,0x02,0x00,0x36,0x01,0x00,0x00,0x00]
+// GFX12XX: v_and_b32_e32 v0, lit(0x1), v1          ; encoding: [0xff,0x02,0x00,0x36,0x01,0x00,0x00,0x00]
+// GFX89: v_and_b32_e32 v0, lit(0x1), v1          ; encoding: [0xff,0x02,0x00,0x26,0x01,0x00,0x00,0x00]
+// SICI: v_and_b32_e32 v0, lit(0x1), v1          ; encoding: [0xff,0x02,0x00,0x36,0x01,0x00,0x00,0x00]
+
+v_pk_add_u16 v5, exec_lo, 1
+// GFX11: v_pk_add_u16 v5, exec_lo, 1             ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0x02,0x01,0x1a]
+// GFX12XX: v_pk_add_u16 v5, exec_lo, 1             ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0x02,0x01,0x1a]
+// GFX9: v_pk_add_u16 v5, exec_lo, 1             ; encoding: [0x05,0x40,0x8a,0xd3,0x7e,0x02,0x01,0x18]
+// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_pk_add_u16 v5, exec_lo, lit(1)
+// GFX11: v_pk_add_u16 v5, exec_lo, lit(0x1)      ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0xfe,0x01,0x1a,0x01,0x00,0x00,0x00]
+// GFX12XX: v_pk_add_u16 v5, exec_lo, lit(0x1)      ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0xfe,0x01,0x1a,0x01,0x00,0x00,0x00]
+// NOGFX9: :[[@LINE-3]]:31: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], 1
+// GFX1250: v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], 1 ; encoding: [0x02,0x00,0x42,0xd6,0x04,0x09,0x06,0x02]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], lit(1)
+// GFX1250: v_perm_pk16_b6_u4 v[2:4], v4, v[4:5], lit(0x1) ; encoding: [0x02,0x00,0x42,0xd6,0x04,0x09,0xfe,0x03,0x01,0x00,0x00,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+//---------------------------------------------------------------------------//
+// 1/(2*PI)
+//---------------------------------------------------------------------------//
+
+v_trunc_f32_e32 v0, 0x3fc45f306dc9c882
+// NOGCN: :[[@LINE-1]]:21: error: invalid operand for instruction
+
+v_fract_f64_e32 v[0:1], 0x3fc45f306dc9c882
+// GFX11: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x7c,0x00,0x7e]
+// GFX12XX: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x7c,0x00,0x7e]
+// GFX89: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x64,0x00,0x7e]
+// NOSICI: :[[@LINE-4]]:25: error: invalid operand for instruction
+
+v_trunc_f32_e32 v0, 0x3e22f983
+// GFX11: v_trunc_f32_e32 v0, 0.15915494          ; encoding: [0xf8,0x42,0x00,0x7e]
+// GFX12XX: v_trunc_f32_e32 v0, 0.15915494          ; encoding: [0xf8,0x42,0x00,0x7e]
+// GFX89: v_trunc_f32_e32 v0, 0.15915494          ; encoding: [0xf8,0x38,0x00,0x7e]
+// SICI: v_trunc_f32_e32 v0, 0x3e22f983          ; encoding: [0xff,0x42,0x00,0x7e,0x83,0xf9,0x22,0x3e]
+
+v_fract_f64_e32 v[0:1], 0x3e22f983
+// GFX11: v_fract_f64_e32 v[0:1], 0x3e22f983      ; encoding: [0xff,0x7c,0x00,0x7e,0x83,0xf9,0x22,0x3e]
+// GFX12XX: v_fract_f64_e32 v[0:1], 0x3e22f983      ; encoding: [0xff,0x7c,0x00,0x7e,0x83,0xf9,0x22,0x3e]
+// GFX89: v_fract_f64_e32 v[0:1], 0x3e22f983      ; encoding: [0xff,0x64,0x00,0x7e,0x83,0xf9,0x22,0x3e]
+// SICI: v_fract_f64_e32 v[0:1], 0x3e22f983      ; encoding: [0xff,0x7c,0x00,0x7e,0x83,0xf9,0x22,0x3e]
+
+v_trunc_f32_e64 v0, 0x3fc45f306dc9c882
+// NOGCN: :[[@LINE-1]]:21: error: invalid operand for instruction
+
+v_fract_f64_e64 v[0:1], 0x3fc45f306dc9c882
+// GFX11: v_fract_f64_e64 v[0:1], 0.15915494309189532 ; encoding: [0x00,0x00,0xbe,0xd5,0xf8,0x00,0x01,0x02]
+// GFX12XX: v_fract_f64_e64 v[0:1], 0.15915494309189532 ; encoding: [0x00,0x00,0xbe,0xd5,0xf8,0x00,0x01,0x02]
+// GFX89: v_fract_f64_e64 v[0:1], 0.15915494309189532 ; encoding: [0x00,0x00,0x72,0xd1,0xf8,0x00,0x00,0x00]
+// NOSICI: :[[@LINE-4]]:25: error: invalid operand for instruction
+
+v_trunc_f32_e64 v0, 0x3e22f983
+// GFX11: v_trunc_f32_e64 v0, 0.15915494          ; encoding: [0x00,0x00,0xa1,0xd5,0xf8,0x00,0x01,0x02]
+// GFX12XX: v_trunc_f32_e64 v0, 0.15915494          ; encoding: [0x00,0x00,0xa1,0xd5,0xf8,0x00,0x01,0x02]
+// GFX89: v_trunc_f32_e64 v0, 0.15915494          ; encoding: [0x00,0x00,0x5c,0xd1,0xf8,0x00,0x00,0x00]
+// NOSICI: :[[@LINE-4]]:21: error: literal operands are not supported
+
+v_fract_f64_e64 v[0:1], 0x3e22f983
+// GFX11: v_fract_f64_e64 v[0:1], 0x3e22f983      ; encoding: [0x00,0x00,0xbe,0xd5,0xff,0x00,0x01,0x02,0x83,0xf9,0x22,0x3e]
+// GFX12XX: v_fract_f64_e64 v[0:1], 0x3e22f983      ; encoding: [0x00,0x00,0xbe,0xd5,0xff,0x00,0x01,0x02,0x83,0xf9,0x22,0x3e]
+// NOGFX89: :[[@LINE-3]]:25: error: literal operands are not supported
+// NOSICI: :[[@LINE-4]]:25: error: literal operands are not supported
+
+s_mov_b64_e32 s[0:1], 0.159154943091895317852646485335
+// GFX8PLUS: s_mov_b64 s[0:1], 0.15915494309189532   ; encoding: [0xf8,0x01,0x80,0xbe]
+// NOSICI: :[[@LINE-2]]:23: error: invalid operand for instruction
+
+v_and_b32_e32 v0, 0.159154943091895317852646485335, v1
+// GFX11: v_and_b32_e32 v0, 0.15915494, v1        ; encoding: [0xf8,0x02,0x00,0x36]
+// GFX12XX: v_and_b32_e32 v0, 0.15915494, v1        ; encoding: [0xf8,0x02,0x00,0x36]
+// GFX89: v_and_b32_e32 v0, 0.15915494, v1        ; encoding: [0xf8,0x02,0x00,0x26]
+// SICI: v_and_b32_e32 v0, 0x3e22f983, v1        ; encoding: [0xff,0x02,0x00,0x36,0x83,0xf9,0x22,0x3e]
+
+v_and_b32_e64 v0, 0.159154943091895317852646485335, v1
+// GFX11: v_and_b32_e64 v0, 0.15915494, v1        ; encoding: [0x00,0x00,0x1b,0xd5,0xf8,0x02,0x02,0x02]
+// GFX12XX: v_and_b32_e64 v0, 0.15915494, v1        ; encoding: [0x00,0x00,0x1b,0xd5,0xf8,0x02,0x02,0x02]
+// GFX89: v_and_b32_e64 v0, 0.15915494, v1        ; encoding: [0x00,0x00,0x13,0xd1,0xf8,0x02,0x02,0x00]
+// NOSICI: :[[@LINE-4]]:19: error: literal operands are not supported
+
+v_fract_f64 v[0:1], 0.159154943091895317852646485335
+// GFX11: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x7c,0x00,0x7e]
+// GFX12XX: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x7c,0x00,0x7e]
+// GFX89: v_fract_f64_e32 v[0:1], 0.15915494309189532 ; encoding: [0xf8,0x64,0x00,0x7e]
+// NOSICI: :[[@LINE-4]]:1: warning: Can't encode literal as exact 64-bit floating-point operand. Low 32-bits will be set to zero
+// SICI: v_fract_f64_e32 v[0:1], 0x3fc45f30      ; encoding: [0xff,0x7c,0x00,0x7e,0x30,0x5f,0xc4,0x3f]
+
+v_trunc_f32 v0, 0.159154943091895317852646485335
+// GFX11: v_trunc_f32_e32 v0, 0.15915494          ; encoding: [0xf8,0x42,0x00,0x7e]
+// GFX12XX: v_trunc_f32_e32 v0, 0.15915494          ; encoding: [0xf8,0x42,0x00,0x7e]
+// GFX89: v_trunc_f32_e32 v0, 0.15915494          ; encoding: [0xf8,0x38,0x00,0x7e]
+// SICI: v_trunc_f32_e32 v0, 0x3e22f983          ; encoding: [0xff,0x42,0x00,0x7e,0x83,0xf9,0x22,0x3e]
+
+v_trunc_f32 v0, lit(0.159154943091895317852646485335)
+// GFX11: v_trunc_f32_e32 v0, lit(0x3e22f983)     ; encoding: [0xff,0x42,0x00,0x7e,0x83,0xf9,0x22,0x3e]
+// GFX12XX: v_trunc_f32_e32 v0, lit(0x3e22f983)     ; encoding: [0xff,0x42,0x00,0x7e,0x83,0xf9,0x22,0x3e]
+// GFX89: v_trunc_f32_e32 v0, lit(0x3e22f983)     ; encoding: [0xff,0x38,0x00,0x7e,0x83,0xf9,0x22,0x3e]
+// SICI: v_trunc_f32_e32 v0, lit(0x3e22f983)     ; encoding: [0xff,0x42,0x00,0x7e,0x83,0xf9,0x22,0x3e]
+
+//---------------------------------------------------------------------------//
+// integer literal truncation checks
+//---------------------------------------------------------------------------//
+
+s_mov_b32 s0, 0x101ffffffff
+// NOGCN: :[[@LINE-1]]:15: error: invalid operand for instruction
+
+s_mov_b32 s0, 0x1000000001
+// NOGCN: :[[@LINE-1]]:15: error: invalid operand for instruction
+
+s_mov_b32 s0, 0x1000000fff
+// NOGCN: :[[@LINE-1]]:15: error: invalid operand for instruction
+
+v_trunc_f32 v0, 0x1fffffffff0
+// NOGCN: :[[@LINE-1]]:17: error: invalid operand for instruction
+
+v_trunc_f32 v0, 0x100000001
+// NOGCN: :[[@LINE-1]]:17: error: invalid operand for instruction
+
+v_trunc_f32 v0, 0x1fffffff000
+// NOGCN: :[[@LINE-1]]:17: error: invalid operand for instruction
+
+s_mov_b64 s[0:1], 0x101ffffffff
+// GFX1250: s_mov_b64 s[0:1], 0x101ffffffff         ; encoding: [0xfe,0x01,0x80,0xbe,0xff,0xff,0xff,0xff,0x01,0x01,0x00,0x00]
+// NOGFX11: :[[@LINE-2]]:19: error: invalid operand for instruction
+// NOGFX12: :[[@LINE-3]]:19: error: invalid operand for instruction
+// NOGFX89: :[[@LINE-4]]:19: error: invalid operand for instruction
+// NOSICI: :[[@LINE-5]]:19: error: invalid operand for instruction
+
+s_mov_b64 s[0:1], 0x1000000001
+// GFX1250: s_mov_b64 s[0:1], 0x1000000001          ; encoding: [0xfe,0x01,0x80,0xbe,0x01,0x00,0x00,0x00,0x10,0x00,0x00,0x00]
+// NOGFX11: :[[@LINE-2]]:19: error: invalid operand for instruction
+// NOGFX12: :[[@LINE-3]]:19: error: invalid operand for instruction
+// NOGFX89: :[[@LINE-4]]:19: error: invalid operand for instruction
+// NOSICI: :[[@LINE-5]]:19: error: invalid operand for instruction
+
+s_mov_b64 s[0:1], 0x1000000fff
+// GFX1250: s_mov_b64 s[0:1], 0x1000000fff          ; encoding: [0xfe,0x01,0x80,0xbe,0xff,0x0f,0x00,0x00,0x10,0x00,0x00,0x00]
+// NOGFX11: :[[@LINE-2]]:19: error: invalid operand for instruction
+// NOGFX12: :[[@LINE-3]]:19: error: invalid operand for instruction
+// NOGFX89: :[[@LINE-4]]:19: error: invalid operand for instruction
+// NOSICI: :[[@LINE-5]]:19: error: invalid operand for instruction
+
+v_trunc_f64 v[0:1], 0x1fffffffff0
+// GFX1250: v_trunc_f64_e32 v[0:1], 0x1fffffffff0   ; encoding: [0xfe,0x2e,0x00,0x7e,0xf0,0xff,0xff,0xff,0xff,0x01,0x00,0x00]
+// NOCI: :[[@LINE-2]]:21: error: invalid operand for instruction
+// NOGFX11: :[[@LINE-3]]:21: error: invalid operand for instruction
+// NOGFX12: :[[@LINE-4]]:21: error: invalid operand for instruction
+// NOGFX89: :[[@LINE-5]]:21: error: invalid operand for instruction
+// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
+
+v_trunc_f64 v[0:1], 0x100000001
+// GFX1250: v_trunc_f64_e32 v[0:1], 0x100000001     ; encoding: [0xfe,0x2e,0x00,0x7e,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00]
+// NOCI: :[[@LINE-2]]:21: error: invalid operand for instruction
+// NOGFX11: :[[@LINE-3]]:21: error: invalid operand for instruction
+// NOGFX12: :[[@LINE-4]]:21: error: invalid operand for instruction
+// NOGFX89: :[[@LINE-5]]:21: error: invalid operand for instruction
+// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
+
+v_trunc_f64 v[0:1], 0x1fffffff000
+// GFX1250: v_trunc_f64_e32 v[0:1], 0x1fffffff000   ; encoding: [0xfe,0x2e,0x00,0x7e,0x00,0xf0,0xff,0xff,0xff,0x01,0x00,0x00]
+// NOCI: :[[@LINE-2]]:21: error: invalid operand for instruction
+// NOGFX11: :[[@LINE-3]]:21: error: invalid operand for instruction
+// NOGFX12: :[[@LINE-4]]:21: error: invalid operand for instruction
+// NOGFX89: :[[@LINE-5]]:21: error: invalid operand for instruction
+// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
+
+//---------------------------------------------------------------------------//
+// named inline values: scc, vccz, execz
+//---------------------------------------------------------------------------//
+
+buffer_atomic_add v0, off, s[0:3], scc offset:4095
+// GFX11: buffer_atomic_add_u32 v0, off, s[0:3], src_scc offset:4095 ; encoding: [0xff,0x0f,0xd4,0xe0,0x00,0x00,0x00,0xfd]
+// GFX12: buffer_atomic_add_u32 v0, off, s[0:3], src_scc offset:4095 ; encoding: [0x7d,0x40,0x0d,0xc4,0x00,0x00,0x80,0x00,0x00,0xff,0x0f,0x00]
+// GFX1250-ASM: buffer_atomic_add_u32 v0, off, s[0:3], src_scc offset:4095 ; encoding: [0x7d,0x40,0x0d,0xc4,0x00,0x00,0x80,0x00,0x00,0xff,0x0f,0x00]
+// GFX1250-DIS: buffer_atomic_add_u32 v0, off, s[0:3], m0 offset:4095 ; encoding: [0x7d,0x40,0x0d,0xc4,0x00,0x00,0x80,0x00,0x00,0xff,0x0f,0x00]
+// GFX89: buffer_atomic_add v0, off, s[0:3], src_scc offset:4095 ; encoding: [0xff,0x0f,0x08,0xe1,0x00,0x00,0x00,0xfd]
+// SICI: buffer_atomic_add v0, off, s[0:3], src_scc offset:4095 ; encoding: [0xff,0x0f,0xc8,0xe0,0x00,0x00,0x00,0xfd]
+
+s_add_i32 s0, vccz, s0
+// GFX89: s_add_i32 s0, src_vccz, s0              ; encoding: [0xfb,0x00,0x00,0x81]
+// NOGFX11: :[[@LINE-2]]:15: error: src_vccz register not available on this GPU
+// NOGFX12: :[[@LINE-3]]:15: error: src_vccz register not available on this GPU
+// NOGFX1250: :[[@LINE-4]]:15: error: src_vccz register not available on this GPU
+// SICI: s_add_i32 s0, src_vccz, s0              ; encoding: [0xfb,0x00,0x00,0x81]
+
+s_add_i32 s0, execz, s0
+// GFX89: s_add_i32 s0, src_execz, s0             ; encoding: [0xfc,0x00,0x00,0x81]
+// NOGFX11: :[[@LINE-2]]:15: error: src_execz register not available on this GPU
+// NOGFX12: :[[@LINE-3]]:15: error: src_execz register not available on this GPU
+// NOGFX1250: :[[@LINE-4]]:15: error: src_execz register not available on this GPU
+// SICI: s_add_i32 s0, src_execz, s0             ; encoding: [0xfc,0x00,0x00,0x81]
+
+s_add_i32 s0, scc, s0
+// GFX11: s_add_i32 s0, src_scc, s0               ; encoding: [0xfd,0x00,0x00,0x81]
+// GFX12XX: s_add_co_i32 s0, src_scc, s0            ; encoding: [0xfd,0x00,0x00,0x81]
+// GFX89: s_add_i32 s0, src_scc, s0               ; encoding: [0xfd,0x00,0x00,0x81]
+// SICI: s_add_i32 s0, src_scc, s0               ; encoding: [0xfd,0x00,0x00,0x81]
+
+s_and_b64 s[0:1], s[0:1], src_vccz
+// GFX89: s_and_b64 s[0:1], s[0:1], src_vccz      ; encoding: [0x00,0xfb,0x80,0x86]
+// NOGFX11: :[[@LINE-2]]:27: error: src_vccz register not available on this GPU
+// NOGFX12: :[[@LINE-3]]:27: error: src_vccz register not available on this GPU
+// NOGFX1250: :[[@LINE-4]]:27: error: src_vccz register not available on this GPU
+// SICI: s_and_b64 s[0:1], s[0:1], src_vccz      ; encoding: [0x00,0xfb,0x80,0x87]
+
+s_and_b64 s[0:1], s[0:1], src_execz
+// GFX89: s_and_b64 s[0:1], s[0:1], src_execz     ; encoding: [0x00,0xfc,0x80,0x86]
+// NOGFX11: :[[@LINE-2]]:27: error: src_execz register not available on this GPU
+// NOGFX12: :[[@LINE-3]]:27: error: src_execz register not available on this GPU
+// NOGFX1250: :[[@LINE-4]]:27: error: src_execz register not available on this GPU
+// SICI: s_and_b64 s[0:1], s[0:1], src_execz     ; encoding: [0x00,0xfc,0x80,0x87]
+
+s_and_b64 s[0:1], s[0:1], src_scc
+// GFX11: s_and_b64 s[0:1], s[0:1], src_scc       ; encoding: [0x00,0xfd,0x80,0x8b]
+// GFX12XX: s_and_b64 s[0:1], s[0:1], src_scc       ; encoding: [0x00,0xfd,0x80,0x8b]
+// GFX89: s_and_b64 s[0:1], s[0:1], src_scc       ; encoding: [0x00,0xfd,0x80,0x86]
+// SICI: s_and_b64 s[0:1], s[0:1], src_scc       ; encoding: [0x00,0xfd,0x80,0x87]
+
+v_add_u16 v0, vccz, v0
+// GFX89: v_add_u16_e32 v0, src_vccz, v0          ; encoding: [0xfb,0x00,0x00,0x4c]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_add_u16_sdwa v0, scc, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// GFX9: v_add_u16_sdwa v0, src_scc, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x00,0x00,0x4c,0xfd,0x06,0x86,0x06]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:20: error: invalid operand for instruction
+
+v_add_u16_sdwa v0, v0, scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// GFX9: v_add_u16_sdwa v0, v0, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0xfa,0x01,0x4c,0x00,0x06,0x06,0x86]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:24: error: invalid operand for instruction
+
+v_add_u32 v0, execz, v0
+// GFX9: v_add_u32_e32 v0, src_execz, v0         ; encoding: [0xfc,0x00,0x00,0x68]
+// NOGFX11: :[[@LINE-2]]:15: error: src_execz register not available on this GPU
+// NOGFX12: :[[@LINE-3]]:15: error: src_execz register not available on this GPU
+// NOGFX1250: :[[@LINE-4]]:15: error: src_execz register not available on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:1: error: operands are not valid for this GPU or mode
+
+v_add_u32_e64 v0, scc, v0
+// GFX11: v_add_nc_u32_e64 v0, src_scc, v0        ; encoding: [0x00,0x00,0x25,0xd5,0xfd,0x00,0x02,0x02]
+// GFX12XX: v_add_nc_u32_e64 v0, src_scc, v0        ; encoding: [0x00,0x00,0x25,0xd5,0xfd,0x00,0x02,0x02]
+// GFX9: v_add_u32_e64 v0, src_scc, v0           ; encoding: [0x00,0x00,0x34,0xd1,0xfd,0x00,0x02,0x00]
+// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-5]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i64 vcc, scc, v[0:1]
+// GFX89: v_cmp_eq_i64_e32 vcc, src_scc, v[0:1]   ; encoding: [0xfd,0x00,0xc4,0x7d]
+// NOGFX11: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// SICI: v_cmp_eq_i64_e32 vcc, src_scc, v[0:1]   ; encoding: [0xfd,0x00,0x44,0x7d]
+
+v_max_f16 v0, execz, v0
+// GFX89: v_max_f16_e32 v0, src_execz, v0         ; encoding: [0xfc,0x00,0x00,0x5a]
+// NOGFX11: :[[@LINE-2]]:15: error: src_execz register not available on this GPU
+// NOGFX12: :[[@LINE-3]]:15: error: src_execz register not available on this GPU
+// NOGFX1250: :[[@LINE-4]]:15: error: src_execz register not available on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_max_f32 v0, vccz, v0
+// GFX89: v_max_f32_e32 v0, src_vccz, v0          ; encoding: [0xfb,0x00,0x00,0x16]
+// NOGFX11: :[[@LINE-2]]:15: error: src_vccz register not available on this GPU
+// NOGFX12: :[[@LINE-3]]:15: error: src_vccz register not available on this GPU
+// NOGFX1250: :[[@LINE-4]]:15: error: src_vccz register not available on this GPU
+// SICI: v_max_f32_e32 v0, src_vccz, v0          ; encoding: [0xfb,0x00,0x00,0x20]
+
+v_max_f64 v[0:1], scc, v[0:1]
+// GFX11: v_max_f64 v[0:1], src_scc, v[0:1]       ; encoding: [0x00,0x00,0x2a,0xd7,0xfd,0x00,0x02,0x02]
+// GFX12XX: v_max_num_f64_e32 v[0:1], src_scc, v[0:1] ; encoding: [0xfd,0x00,0x00,0x1c]
+// GFX89: v_max_f64 v[0:1], src_scc, v[0:1]       ; encoding: [0x00,0x00,0x83,0xd2,0xfd,0x00,0x02,0x00]
+// SICI: v_max_f64 v[0:1], src_scc, v[0:1]       ; encoding: [0x00,0x00,0xce,0xd2,0xfd,0x00,0x02,0x00]
+
+v_pk_add_f16 v0, execz, v0
+// GFX9: v_pk_add_f16 v0, src_execz, v0          ; encoding: [0x00,0x40,0x8f,0xd3,0xfc,0x00,0x02,0x18]
+// NOGFX11: :[[@LINE-2]]:18: error: src_execz register not available on this GPU
+// NOGFX12: :[[@LINE-3]]:18: error: src_execz register not available on this GPU
+// NOGFX1250: :[[@LINE-4]]:18: error: src_execz register not available on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
+
+v_ceil_f16 v0, neg(vccz)
+// GFX89: v_ceil_f16_e64 v0, -src_vccz            ; encoding: [0x00,0x00,0x85,0xd1,0xfb,0x00,0x00,0x20]
+// NOGFX11: :[[@LINE-2]]:20: error: src_vccz register not available on this GPU
+// NOGFX12: :[[@LINE-3]]:20: error: src_vccz register not available on this GPU
+// NOGFX1250: :[[@LINE-4]]:20: error: src_vccz register not available on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_ceil_f16 v0, abs(scc)
+// GFX12: v_ceil_f16_e64 v0, |src_scc|            ; encoding: [0x00,0x01,0xdc,0xd5,0xfd,0x00,0x01,0x02]
+// GFX89: v_ceil_f16_e64 v0, |src_scc|            ; encoding: [0x00,0x01,0x85,0xd1,0xfd,0x00,0x00,0x00]
+// NOGFX11: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_ceil_f16 v0.l, abs(scc)
+// GFX11: v_ceil_f16_e64 v0.l, |src_scc|          ; encoding: [0x00,0x01,0xdc,0xd5,0xfd,0x00,0x01,0x02]
+// GFX1250: v_ceil_f16_e64 v0.l, |src_scc|          ; encoding: [0x00,0x01,0xdc,0xd5,0xfd,0x00,0x01,0x02]
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX89: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_ceil_f64 v[5:6], |execz|
+// CI: v_ceil_f64_e64 v[5:6], |src_execz|      ; encoding: [0x05,0x01,0x30,0xd3,0xfc,0x00,0x00,0x00]
+// GFX89: v_ceil_f64_e64 v[5:6], |src_execz|      ; encoding: [0x05,0x01,0x58,0xd1,0xfc,0x00,0x00,0x00]
+// NOGFX11: :[[@LINE-3]]:21: error: src_execz register not available on this GPU
+// NOGFX12: :[[@LINE-4]]:21: error: src_execz register not available on this GPU
+// NOGFX1250: :[[@LINE-5]]:21: error: src_execz register not available on this GPU
+// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
+
+v_ceil_f64 v[5:6], -vcc
+// CI: v_ceil_f64_e64 v[5:6], -vcc             ; encoding: [0x05,0x00,0x30,0xd3,0x6a,0x00,0x00,0x20]
+// GFX11: v_ceil_f64_e64 v[5:6], -vcc             ; encoding: [0x05,0x00,0x98,0xd5,0x6a,0x00,0x01,0x22]
+// GFX12: v_ceil_f64_e64 v[5:6], -vcc             ; encoding: [0x05,0x00,0x98,0xd5,0x6a,0x00,0x01,0x22]
+// GFX89: v_ceil_f64_e64 v[5:6], -vcc             ; encoding: [0x05,0x00,0x58,0xd1,0x6a,0x00,0x00,0x20]
+// NOGFX1250: :[[@LINE-5]]:12: error: invalid operand for instruction
+// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
+
+v_ceil_f32 v0, -vccz
+// GFX89: v_ceil_f32_e64 v0, -src_vccz            ; encoding: [0x00,0x00,0x5d,0xd1,0xfb,0x00,0x00,0x20]
+// NOGFX11: :[[@LINE-2]]:17: error: src_vccz register not available on this GPU
+// NOGFX12: :[[@LINE-3]]:17: error: src_vccz register not available on this GPU
+// NOGFX1250: :[[@LINE-4]]:17: error: src_vccz register not available on this GPU
+// SICI: v_ceil_f32_e64 v0, -src_vccz            ; encoding: [0x00,0x00,0x44,0xd3,0xfb,0x00,0x00,0x20]
+
+v_ceil_f32 v0, |execz|
+// GFX89: v_ceil_f32_e64 v0, |src_execz|          ; encoding: [0x00,0x01,0x5d,0xd1,0xfc,0x00,0x00,0x00]
+// NOGFX11: :[[@LINE-2]]:17: error: src_execz register not available on this GPU
+// NOGFX12: :[[@LINE-3]]:17: error: src_execz register not available on this GPU
+// NOGFX1250: :[[@LINE-4]]:17: error: src_execz register not available on this GPU
+// SICI: v_ceil_f32_e64 v0, |src_execz|          ; encoding: [0x00,0x01,0x44,0xd3,0xfc,0x00,0x00,0x00]
+
+v_ceil_f16_sdwa v5, |vccz| dst_sel:DWORD dst_unused:UNUSED_PRESERVE
+// GFX9: v_ceil_f16_sdwa v5, |src_vccz| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x8a,0x0a,0x7e,0xfb,0x16,0xa6,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:22: error: invalid operand for instruction
+
+v_ceil_f16_sdwa v5, -scc dst_sel:DWORD dst_unused:UNUSED_PRESERVE
+// GFX9: v_ceil_f16_sdwa v5, -src_scc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x8a,0x0a,0x7e,0xfd,0x16,0x96,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:22: error: invalid operand for instruction
+
+v_ceil_f32_sdwa v5, vccz dst_sel:DWORD src0_sel:DWORD
+// GFX9: v_ceil_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x3a,0x0a,0x7e,0xfb,0x16,0x86,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
+// NOSICI: :[[@LINE-5]]:1: error: sdwa variant of this instruction is not supported
+// NOVI: :[[@LINE-6]]:21: error: invalid operand for instruction
+
+v_ceil_f32_sdwa v5, |execz| dst_sel:DWORD src0_sel:DWORD
+// GFX9: v_ceil_f32_sdwa v5, |src_execz| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x3a,0x0a,0x7e,0xfc,0x16,0xa6,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
+// NOSICI: :[[@LINE-5]]:1: error: sdwa variant of this instruction is not supported
+// NOVI: :[[@LINE-6]]:22: error: invalid operand for instruction
+
+//---------------------------------------------------------------------------//
+// named inline values: shared_base, shared_limit, private_base, etc
+//---------------------------------------------------------------------------//
+
+buffer_atomic_add v0, off, s[0:3], src_shared_base offset:4095
+// GFX11: buffer_atomic_add_u32 v0, off, s[0:3], src_shared_base offset:4095 ; encoding: [0xff,0x0f,0xd4,0xe0,0x00,0x00,0x00,0xeb]
+// GFX9: buffer_atomic_add v0, off, s[0:3], src_shared_base offset:4095 ; encoding: [0xff,0x0f,0x08,0xe1,0x00,0x00,0x00,0xeb]
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:36: error: src_shared_base register not available on this GPU
+// NOVI: :[[@LINE-6]]:36: error: src_shared_base register not available on this GPU
+
+s_add_i32 s0, src_shared_base, s0
+// GFX11: s_add_i32 s0, src_shared_base, s0       ; encoding: [0xeb,0x00,0x00,0x81]
+// GFX12XX: s_add_co_i32 s0, src_shared_base, s0    ; encoding: [0xeb,0x00,0x00,0x81]
+// GFX9: s_add_i32 s0, src_shared_base, s0       ; encoding: [0xeb,0x00,0x00,0x81]
+// NOSICI: :[[@LINE-4]]:15: error: src_shared_base register not available on this GPU
+// NOVI: :[[@LINE-5]]:15: error: src_shared_base register not available on this GPU
+
+s_add_i32 s0, src_shared_limit, s0
+// GFX11: s_add_i32 s0, src_shared_limit, s0      ; encoding: [0xec,0x00,0x00,0x81]
+// GFX12XX: s_add_co_i32 s0, src_shared_limit, s0   ; encoding: [0xec,0x00,0x00,0x81]
+// GFX9: s_add_i32 s0, src_shared_limit, s0      ; encoding: [0xec,0x00,0x00,0x81]
+// NOSICI: :[[@LINE-4]]:15: error: src_shared_limit register not available on this GPU
+// NOVI: :[[@LINE-5]]:15: error: src_shared_limit register not available on this GPU
+
+s_add_i32 s0, src_private_base, s0
+// GFX11: s_add_i32 s0, src_private_base, s0      ; encoding: [0xed,0x00,0x00,0x81]
+// GFX12XX: s_add_co_i32 s0, src_private_base, s0   ; encoding: [0xed,0x00,0x00,0x81]
+// GFX9: s_add_i32 s0, src_private_base, s0      ; encoding: [0xed,0x00,0x00,0x81]
+// NOSICI: :[[@LINE-4]]:15: error: src_private_base register not available on this GPU
+// NOVI: :[[@LINE-5]]:15: error: src_private_base register not available on this GPU
+
+s_add_i32 s0, src_private_limit, s0
+// GFX11: s_add_i32 s0, src_private_limit, s0     ; encoding: [0xee,0x00,0x00,0x81]
+// GFX12XX: s_add_co_i32 s0, src_private_limit, s0  ; encoding: [0xee,0x00,0x00,0x81]
+// GFX9: s_add_i32 s0, src_private_limit, s0     ; encoding: [0xee,0x00,0x00,0x81]
+// NOSICI: :[[@LINE-4]]:15: error: src_private_limit register not available on this GPU
+// NOVI: :[[@LINE-5]]:15: error: src_private_limit register not available on this GPU
+
+s_add_i32 s0, src_pops_exiting_wave_id, s0
+// GFX9: s_add_i32 s0, src_pops_exiting_wave_id, s0 ; encoding: [0xef,0x00,0x00,0x81]
+// NOGFX11: :[[@LINE-2]]:15: error: src_pops_exiting_wave_id register not available on this GPU
+// NOGFX12: :[[@LINE-3]]:15: error: src_pops_exiting_wave_id register not available on this GPU
+// NOGFX1250: :[[@LINE-4]]:15: error: src_pops_exiting_wave_id register not available on this GPU
+// NOSICI: :[[@LINE-5]]:15: error: src_pops_exiting_wave_id register not available on this GPU
+// NOVI: :[[@LINE-6]]:15: error: src_pops_exiting_wave_id register not available on this GPU
+
+s_and_b64 s[0:1], s[0:1], src_shared_base
+// GFX11: s_and_b64 s[0:1], s[0:1], src_shared_base ; encoding: [0x00,0xeb,0x80,0x8b]
+// GFX12XX: s_and_b64 s[0:1], s[0:1], src_shared_base ; encoding: [0x00,0xeb,0x80,0x8b]
+// GFX9: s_and_b64 s[0:1], s[0:1], src_shared_base ; encoding: [0x00,0xeb,0x80,0x86]
+// NOSICI: :[[@LINE-4]]:27: error: src_shared_base register not available on this GPU
+// NOVI: :[[@LINE-5]]:27: error: src_shared_base register not available on this GPU
+
+s_and_b64 s[0:1], s[0:1], src_shared_limit
+// GFX11: s_and_b64 s[0:1], s[0:1], src_shared_limit ; encoding: [0x00,0xec,0x80,0x8b]
+// GFX12XX: s_and_b64 s[0:1], s[0:1], src_shared_limit ; encoding: [0x00,0xec,0x80,0x8b]
+// GFX9: s_and_b64 s[0:1], s[0:1], src_shared_limit ; encoding: [0x00,0xec,0x80,0x86]
+// NOSICI: :[[@LINE-4]]:27: error: src_shared_limit register not available on this GPU
+// NOVI: :[[@LINE-5]]:27: error: src_shared_limit register not available on this GPU
+
+s_and_b64 s[0:1], s[0:1], src_private_base
+// GFX11: s_and_b64 s[0:1], s[0:1], src_private_base ; encoding: [0x00,0xed,0x80,0x8b]
+// GFX12XX: s_and_b64 s[0:1], s[0:1], src_private_base ; encoding: [0x00,0xed,0x80,0x8b]
+// GFX9: s_and_b64 s[0:1], s[0:1], src_private_base ; encoding: [0x00,0xed,0x80,0x86]
+// NOSICI: :[[@LINE-4]]:27: error: src_private_base register not available on this GPU
+// NOVI: :[[@LINE-5]]:27: error: src_private_base register not available on this GPU
+
+s_and_b64 s[0:1], s[0:1], src_private_limit
+// GFX11: s_and_b64 s[0:1], s[0:1], src_private_limit ; encoding: [0x00,0xee,0x80,0x8b]
+// GFX12XX: s_and_b64 s[0:1], s[0:1], src_private_limit ; encoding: [0x00,0xee,0x80,0x8b]
+// GFX9: s_and_b64 s[0:1], s[0:1], src_private_limit ; encoding: [0x00,0xee,0x80,0x86]
+// NOSICI: :[[@LINE-4]]:27: error: src_private_limit register not available on this GPU
+// NOVI: :[[@LINE-5]]:27: error: src_private_limit register not available on this GPU
+
+s_and_b64 s[0:1], s[0:1], src_pops_exiting_wave_id
+// GFX9: s_and_b64 s[0:1], s[0:1], src_pops_exiting_wave_id ; encoding: [0x00,0xef,0x80,0x86]
+// NOGFX11: :[[@LINE-2]]:27: error: src_pops_exiting_wave_id register not available on this GPU
+// NOGFX12: :[[@LINE-3]]:27: error: src_pops_exiting_wave_id register not available on this GPU
+// NOGFX1250: :[[@LINE-4]]:27: error: src_pops_exiting_wave_id register not available on this GPU
+// NOSICI: :[[@LINE-5]]:27: error: src_pops_exiting_wave_id register not available on this GPU
+// NOVI: :[[@LINE-6]]:27: error: src_pops_exiting_wave_id register not available on this GPU
+
+v_add_u16 v0, src_shared_base, v0
+// GFX9: v_add_u16_e32 v0, src_shared_base, v0   ; encoding: [0xeb,0x00,0x00,0x4c]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:15: error: src_shared_base register not available on this GPU
+
+v_add_u16_sdwa v0, src_shared_base, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// GFX9: v_add_u16_sdwa v0, src_shared_base, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x00,0x00,0x4c,0xeb,0x06,0x86,0x06]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:20: error: src_shared_base register not available on this GPU
+
+v_add_u16_sdwa v0, v0, src_shared_base dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// GFX9: v_add_u16_sdwa v0, v0, src_shared_base dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0xd6,0x01,0x4c,0x00,0x06,0x06,0x86]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:24: error: src_shared_base register not available on this GPU
+
+v_add_u32 v0, src_shared_base, v0
+// GFX11: v_add_nc_u32_e32 v0, src_shared_base, v0 ; encoding: [0xeb,0x00,0x00,0x4a]
+// GFX12XX: v_add_nc_u32_e32 v0, src_shared_base, v0 ; encoding: [0xeb,0x00,0x00,0x4a]
+// GFX9: v_add_u32_e32 v0, src_shared_base, v0   ; encoding: [0xeb,0x00,0x00,0x68]
+// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-5]]:15: error: src_shared_base register not available on this GPU
+
+v_add_u32_e64 v0, src_shared_base, v0
+// GFX11: v_add_nc_u32_e64 v0, src_shared_base, v0 ; encoding: [0x00,0x00,0x25,0xd5,0xeb,0x00,0x02,0x02]
+// GFX12XX: v_add_nc_u32_e64 v0, src_shared_base, v0 ; encoding: [0x00,0x00,0x25,0xd5,0xeb,0x00,0x02,0x02]
+// GFX9: v_add_u32_e64 v0, src_shared_base, v0   ; encoding: [0x00,0x00,0x34,0xd1,0xeb,0x00,0x02,0x00]
+// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-5]]:19: error: src_shared_base register not available on this GPU
+
+v_cmp_eq_i64 vcc, src_shared_base, v[0:1]
+// GFX9: v_cmp_eq_i64_e32 vcc, src_shared_base, v[0:1] ; encoding: [0xeb,0x00,0xc4,0x7d]
+// NOGFX11: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:19: error: src_shared_base register not available on this GPU
+// NOVI: :[[@LINE-6]]:19: error: src_shared_base register not available on this GPU
+
+v_max_f16 v0, src_shared_base, v0
+// GFX12: v_max_num_f16_e32 v0, src_shared_base, v0 ; encoding: [0xeb,0x00,0x00,0x62]
+// GFX9: v_max_f16_e32 v0, src_shared_base, v0   ; encoding: [0xeb,0x00,0x00,0x5a]
+// NOGFX11: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:15: error: src_shared_base register not available on this GPU
+
+v_max_f16 v0.l, src_shared_base, v0.l
+// GFX11: v_max_f16_e32 v0.l, src_shared_base, v0.l ; encoding: [0xeb,0x00,0x00,0x72]
+// GFX1250: v_max_num_f16_e32 v0.l, src_shared_base, v0.l ; encoding: [0xeb,0x00,0x00,0x62]
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX9: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:17: error: src_shared_base register not available on this GPU
+
+v_max_f32 v0, src_shared_base, v0
+// GFX11: v_max_f32_e32 v0, src_shared_base, v0   ; encoding: [0xeb,0x00,0x00,0x20]
+// GFX12XX: v_max_num_f32_e32 v0, src_shared_base, v0 ; encoding: [0xeb,0x00,0x00,0x2c]
+// GFX9: v_max_f32_e32 v0, src_shared_base, v0   ; encoding: [0xeb,0x00,0x00,0x16]
+// NOSICI: :[[@LINE-4]]:15: error: src_shared_base register not available on this GPU
+// NOVI: :[[@LINE-5]]:15: error: src_shared_base register not available on this GPU
+
+v_max_f64 v[0:1], src_shared_base, v[0:1]
+// GFX11: v_max_f64 v[0:1], src_shared_base, v[0:1] ; encoding: [0x00,0x00,0x2a,0xd7,0xeb,0x00,0x02,0x02]
+// GFX12XX: v_max_num_f64_e32 v[0:1], src_shared_base, v[0:1] ; encoding: [0xeb,0x00,0x00,0x1c]
+// GFX9: v_max_f64 v[0:1], src_shared_base, v[0:1] ; encoding: [0x00,0x00,0x83,0xd2,0xeb,0x00,0x02,0x00]
+// NOSICI: :[[@LINE-4]]:19: error: src_shared_base register not available on this GPU
+// NOVI: :[[@LINE-5]]:19: error: src_shared_base register not available on this GPU
+
+v_pk_add_f16 v0, src_shared_base, v0
+// GFX11: v_pk_add_f16 v0, src_shared_base, v0    ; encoding: [0x00,0x40,0x0f,0xcc,0xeb,0x00,0x02,0x1a]
+// GFX12XX: v_pk_add_f16 v0, src_shared_base, v0    ; encoding: [0x00,0x40,0x0f,0xcc,0xeb,0x00,0x02,0x1a]
+// GFX9: v_pk_add_f16 v0, src_shared_base, v0    ; encoding: [0x00,0x40,0x8f,0xd3,0xeb,0x00,0x02,0x18]
+// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_ceil_f16 v0, neg(src_shared_base)
+// GFX12: v_ceil_f16_e64 v0, -src_shared_base     ; encoding: [0x00,0x00,0xdc,0xd5,0xeb,0x00,0x01,0x22]
+// GFX9: v_ceil_f16_e64 v0, -src_shared_base     ; encoding: [0x00,0x00,0x85,0xd1,0xeb,0x00,0x00,0x20]
+// NOGFX11: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:20: error: src_shared_base register not available on this GPU
+
+v_ceil_f16 v0.l, neg(src_shared_base)
+// GFX11: v_ceil_f16_e64 v0.l, -src_shared_base   ; encoding: [0x00,0x00,0xdc,0xd5,0xeb,0x00,0x01,0x22]
+// GFX1250: v_ceil_f16_e64 v0.l, -src_shared_base   ; encoding: [0x00,0x00,0xdc,0xd5,0xeb,0x00,0x01,0x22]
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX9: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:22: error: src_shared_base register not available on this GPU
+
+v_ceil_f16 v0, abs(src_shared_base)
+// GFX12: v_ceil_f16_e64 v0, |src_shared_base|    ; encoding: [0x00,0x01,0xdc,0xd5,0xeb,0x00,0x01,0x02]
+// GFX9: v_ceil_f16_e64 v0, |src_shared_base|    ; encoding: [0x00,0x01,0x85,0xd1,0xeb,0x00,0x00,0x00]
+// NOGFX11: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX1250: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:20: error: src_shared_base register not available on this GPU
+
+v_ceil_f16 v0.l, abs(src_shared_base)
+// GFX11: v_ceil_f16_e64 v0.l, |src_shared_base|  ; encoding: [0x00,0x01,0xdc,0xd5,0xeb,0x00,0x01,0x02]
+// GFX1250: v_ceil_f16_e64 v0.l, |src_shared_base|  ; encoding: [0x00,0x01,0xdc,0xd5,0xeb,0x00,0x01,0x02]
+// NOGFX12: :[[@LINE-3]]:1: error: operands are not valid for this GPU or mode
+// NOGFX9: :[[@LINE-4]]:1: error: operands are not valid for this GPU or mode
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:22: error: src_shared_base register not available on this GPU
+
+v_ceil_f64 v[5:6], |src_shared_base|
+// GFX11: v_ceil_f64_e64 v[5:6], |src_shared_base| ; encoding: [0x05,0x01,0x98,0xd5,0xeb,0x00,0x01,0x02]
+// GFX12: v_ceil_f64_e64 v[5:6], |src_shared_base| ; encoding: [0x05,0x01,0x98,0xd5,0xeb,0x00,0x01,0x02]
+// GFX9: v_ceil_f64_e64 v[5:6], |src_shared_base| ; encoding: [0x05,0x01,0x58,0xd1,0xeb,0x00,0x00,0x00]
+// NOCI: :[[@LINE-4]]:21: error: src_shared_base register not available on this GPU
+// NOGFX1250: :[[@LINE-5]]:12: error: invalid operand for instruction
+// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-7]]:21: error: src_shared_base register not available on this GPU
+
+v_ceil_f64 v[5:6], -src_shared_base
+// GFX11: v_ceil_f64_e64 v[5:6], -src_shared_base ; encoding: [0x05,0x00,0x98,0xd5,0xeb,0x00,0x01,0x22]
+// GFX12: v_ceil_f64_e64 v[5:6], -src_shared_base ; encoding: [0x05,0x00,0x98,0xd5,0xeb,0x00,0x01,0x22]
+// GFX9: v_ceil_f64_e64 v[5:6], -src_shared_base ; encoding: [0x05,0x00,0x58,0xd1,0xeb,0x00,0x00,0x20]
+// NOCI: :[[@LINE-4]]:21: error: src_shared_base register not available on this GPU
+// NOGFX1250: :[[@LINE-5]]:12: error: invalid operand for instruction
+// NOSI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-7]]:21: error: src_shared_base register not available on this GPU
+
+v_ceil_f32 v0, -src_shared_base
+// GFX11: v_ceil_f32_e64 v0, -src_shared_base     ; encoding: [0x00,0x00,0xa2,0xd5,0xeb,0x00,0x01,0x22]
+// GFX12XX: v_ceil_f32_e64 v0, -src_shared_base     ; encoding: [0x00,0x00,0xa2,0xd5,0xeb,0x00,0x01,0x22]
+// GFX9: v_ceil_f32_e64 v0, -src_shared_base     ; encoding: [0x00,0x00,0x5d,0xd1,0xeb,0x00,0x00,0x20]
+// NOSICI: :[[@LINE-4]]:17: error: src_shared_base register not available on this GPU
+// NOVI: :[[@LINE-5]]:17: error: src_shared_base register not available on this GPU
+
+v_ceil_f32 v0, |src_shared_base|
+// GFX11: v_ceil_f32_e64 v0, |src_shared_base|    ; encoding: [0x00,0x01,0xa2,0xd5,0xeb,0x00,0x01,0x02]
+// GFX12XX: v_ceil_f32_e64 v0, |src_shared_base|    ; encoding: [0x00,0x01,0xa2,0xd5,0xeb,0x00,0x01,0x02]
+// GFX9: v_ceil_f32_e64 v0, |src_shared_base|    ; encoding: [0x00,0x01,0x5d,0xd1,0xeb,0x00,0x00,0x00]
+// NOSICI: :[[@LINE-4]]:17: error: src_shared_base register not available on this GPU
+// NOVI: :[[@LINE-5]]:17: error: src_shared_base register not available on this GPU
+
+v_ceil_f16_sdwa v5, |src_shared_base| dst_sel:DWORD dst_unused:UNUSED_PRESERVE
+// GFX9: v_ceil_f16_sdwa v5, |src_shared_base| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x8a,0x0a,0x7e,0xeb,0x16,0xa6,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:22: error: src_shared_base register not available on this GPU
+
+v_ceil_f16_sdwa v5, -src_shared_base dst_sel:DWORD dst_unused:UNUSED_PRESERVE
+// GFX9: v_ceil_f16_sdwa v5, -src_shared_base dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x8a,0x0a,0x7e,0xeb,0x16,0x96,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:22: error: src_shared_base register not available on this GPU
+
+v_ceil_f32_sdwa v5, src_shared_base dst_sel:DWORD src0_sel:DWORD
+// GFX9: v_ceil_f32_sdwa v5, src_shared_base dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x3a,0x0a,0x7e,0xeb,0x16,0x86,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
+// NOSICI: :[[@LINE-5]]:1: error: sdwa variant of this instruction is not supported
+// NOVI: :[[@LINE-6]]:21: error: src_shared_base register not available on this GPU
+
+v_ceil_f32_sdwa v5, |src_shared_base| dst_sel:DWORD src0_sel:DWORD
+// GFX9: v_ceil_f32_sdwa v5, |src_shared_base| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x3a,0x0a,0x7e,0xeb,0x16,0xa6,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX12: :[[@LINE-3]]:1: error: sdwa variant of this instruction is not supported
+// NOGFX1250: :[[@LINE-4]]:1: error: sdwa variant of this instruction is not supported
+// NOSICI: :[[@LINE-5]]:1: error: sdwa variant of this instruction is not supported
+// NOVI: :[[@LINE-6]]:22: error: src_shared_base register not available on this GPU
+
+//---------------------------------------------------------------------------//
+// named inline values compete with other scalars for constant bus access
+//---------------------------------------------------------------------------//
+
+v_add_u32 v0, private_base, s0
+// GFX11: v_add_nc_u32_e64 v0, src_private_base, s0 ; encoding: [0x00,0x00,0x25,0xd5,0xed,0x00,0x00,0x02]
+// GFX12XX: v_add_nc_u32_e64 v0, src_private_base, s0 ; encoding: [0x00,0x00,0x25,0xd5,0xed,0x00,0x00,0x02]
+// NOGFX9: :[[@LINE-3]]:29: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-5]]:15: error: src_private_base register not available on this GPU
+
+v_add_u32 v0, scc, s0
+// GFX11: v_add_nc_u32_e64 v0, src_scc, s0        ; encoding: [0x00,0x00,0x25,0xd5,0xfd,0x00,0x00,0x02]
+// GFX12XX: v_add_nc_u32_e64 v0, src_scc, s0        ; encoding: [0x00,0x00,0x25,0xd5,0xfd,0x00,0x00,0x02]
+// NOGFX9: :[[@LINE-3]]:20: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-5]]:1: error: operands are not valid for this GPU or mode
+
+// v_div_fmas implicitly reads VCC
+v_div_fmas_f32 v0, shared_base, v0, v1
+// GFX11: v_div_fmas_f32 v0, src_shared_base, v0, v1 ; encoding: [0x00,0x00,0x37,0xd6,0xeb,0x00,0x06,0x04]
+// GFX12XX: v_div_fmas_f32 v0, src_shared_base, v0, v1 ; encoding: [0x00,0x00,0x37,0xd6,0xeb,0x00,0x06,0x04]
+// NOGFX9: :[[@LINE-3]]:20: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-4]]:20: error: src_shared_base register not available on this GPU
+// NOVI: :[[@LINE-5]]:20: error: src_shared_base register not available on this GPU
+
+// v_div_fmas implicitly reads VCC
+v_div_fmas_f32 v0, v0, shared_limit, v1
+// GFX11: v_div_fmas_f32 v0, v0, src_shared_limit, v1 ; encoding: [0x00,0x00,0x37,0xd6,0x00,0xd9,0x05,0x04]
+// GFX12XX: v_div_fmas_f32 v0, v0, src_shared_limit, v1 ; encoding: [0x00,0x00,0x37,0xd6,0x00,0xd9,0x05,0x04]
+// NOGFX9: :[[@LINE-3]]:24: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-4]]:24: error: src_shared_limit register not available on this GPU
+// NOVI: :[[@LINE-5]]:24: error: src_shared_limit register not available on this GPU
+
+// v_div_fmas implicitly reads VCC
+v_div_fmas_f32 v0, v0, v1, private_limit
+// GFX11: v_div_fmas_f32 v0, v0, v1, src_private_limit ; encoding: [0x00,0x00,0x37,0xd6,0x00,0x03,0xba,0x03]
+// GFX12XX: v_div_fmas_f32 v0, v0, v1, src_private_limit ; encoding: [0x00,0x00,0x37,0xd6,0x00,0x03,0xba,0x03]
+// NOGFX9: :[[@LINE-3]]:28: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-4]]:28: error: src_private_limit register not available on this GPU
+// NOVI: :[[@LINE-5]]:28: error: src_private_limit register not available on this GPU
+
+// v_div_fmas implicitly reads VCC
+v_div_fmas_f32 v0, execz, v0, v1
+// NOGFX11: :[[@LINE-1]]:20: error: src_execz register not available on this GPU
+// NOGFX12: :[[@LINE-2]]:20: error: src_execz register not available on this GPU
+// NOGFX1250: :[[@LINE-3]]:20: error: src_execz register not available on this GPU
+// NOGFX89: :[[@LINE-4]]:20: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-5]]:20: error: invalid operand (violates constant bus restrictions)
+
+// v_div_fmas implicitly reads VCC
+v_div_fmas_f32 v0, v0, scc, v1
+// GFX11: v_div_fmas_f32 v0, v0, src_scc, v1      ; encoding: [0x00,0x00,0x37,0xd6,0x00,0xfb,0x05,0x04]
+// GFX12XX: v_div_fmas_f32 v0, v0, src_scc, v1      ; encoding: [0x00,0x00,0x37,0xd6,0x00,0xfb,0x05,0x04]
+// NOGFX89: :[[@LINE-3]]:24: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-4]]:24: error: invalid operand (violates constant bus restrictions)
+
+// v_div_fmas implicitly reads VCC
+v_div_fmas_f32 v0, v0, v1, vccz
+// NOGFX11: :[[@LINE-1]]:28: error: src_vccz register not available on this GPU
+// NOGFX12: :[[@LINE-2]]:28: error: src_vccz register not available on this GPU
+// NOGFX1250: :[[@LINE-3]]:28: error: src_vccz register not available on this GPU
+// NOGFX89: :[[@LINE-4]]:28: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-5]]:28: error: invalid operand (violates constant bus restrictions)
+
+// v_addc_co_u32 implicitly reads VCC (VOP2)
+v_addc_co_u32 v0, vcc, shared_base, v0, vcc
+// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX9: :[[@LINE-4]]:24: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
+
+v_madak_f32 v0, shared_base, v0, 0x11213141
+// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX9: :[[@LINE-4]]:17: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-5]]:17: error: src_shared_base register not available on this GPU
+// NOVI: :[[@LINE-6]]:17: error: src_shared_base register not available on this GPU
+
+v_madak_f32 v0, scc, v0, 0x11213141
+// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:17: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-5]]:17: error: invalid operand (violates constant bus restrictions)
+
+v_madak_f32 v0, 0xff32ff, v0, 0x11213141
+// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:31: error: only one unique literal operand is allowed
+// NOSICI: :[[@LINE-5]]:31: error: only one unique literal operand is allowed
+
+v_madak_f32 v0, 0xff32ff, v0, 1
+// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:31: error: only one unique literal operand is allowed
+// NOSICI: :[[@LINE-5]]:31: error: only one unique literal operand is allowed
+
+v_madmk_f32 v0, 0xff32ff, 0x11213141, v0
+// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:27: error: only one unique literal operand is allowed
+// NOSICI: :[[@LINE-5]]:27: error: only one unique literal operand is allowed
+
+v_madmk_f32 v0, 0xff32ff, -1, v0
+// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:27: error: only one unique literal operand is allowed
+// NOSICI: :[[@LINE-5]]:27: error: only one unique literal operand is allowed
+
+v_madak_f16 v0, 0xff32, v0, 0x1122
+// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:29: error: only one unique literal operand is allowed
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_madak_f16 v0, 0xff32, v0, 0
+// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:29: error: only one unique literal operand is allowed
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_madmk_f16 v0, 0xff32, 0x1122, v0
+// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:25: error: only one unique literal operand is allowed
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_madmk_f16 v0, 0xff32, 1, v0
+// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:25: error: only one unique literal operand is allowed
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_cmp_eq_f32 s[0:1], private_base, private_limit
+// NOGFX11: :[[@LINE-1]]:14: error: invalid operand for instruction
+// NOGFX12: :[[@LINE-2]]:14: error: invalid operand for instruction
+// NOGFX1250: :[[@LINE-3]]:14: error: invalid operand for instruction
+// NOGFX9: :[[@LINE-4]]:36: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-5]]:22: error: src_private_base register not available on this GPU
+// NOVI: :[[@LINE-6]]:22: error: src_private_base register not available on this GPU
+
+v_cmp_eq_f32 s[0:1], private_base, s0
+// NOGFX11: :[[@LINE-1]]:14: error: invalid operand for instruction
+// NOGFX12: :[[@LINE-2]]:14: error: invalid operand for instruction
+// NOGFX1250: :[[@LINE-3]]:14: error: invalid operand for instruction
+// NOGFX9: :[[@LINE-4]]:36: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-5]]:22: error: src_private_base register not available on this GPU
+// NOVI: :[[@LINE-6]]:22: error: src_private_base register not available on this GPU
+
+v_cmp_eq_f32 s[0:1], execz, s0
+// NOGFX11: :[[@LINE-1]]:22: error: src_execz register not available on this GPU
+// NOGFX12: :[[@LINE-2]]:22: error: src_execz register not available on this GPU
+// NOGFX1250: :[[@LINE-3]]:22: error: src_execz register not available on this GPU
+// NOGFX89: :[[@LINE-4]]:29: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-5]]:29: error: invalid operand (violates constant bus restrictions)
+
+v_pk_add_f16 v255, private_base, private_limit
+// GFX11: v_pk_add_f16 v255, src_private_base, src_private_limit ; encoding: [0xff,0x40,0x0f,0xcc,0xed,0xdc,0x01,0x1a]
+// GFX12XX: v_pk_add_f16 v255, src_private_base, src_private_limit ; encoding: [0xff,0x40,0x0f,0xcc,0xed,0xdc,0x01,0x1a]
+// NOGFX9: :[[@LINE-3]]:34: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+
+v_pk_add_f16 v255, vccz, execz
+// NOGFX11: :[[@LINE-1]]:20: error: src_vccz register not available on this GPU
+// NOGFX12: :[[@LINE-2]]:20: error: src_vccz register not available on this GPU
+// NOGFX1250: :[[@LINE-3]]:20: error: src_vccz register not available on this GPU
+// NOGFX9: :[[@LINE-4]]:26: error: invalid operand (violates constant bus restrictions)
+// NOSICI: :[[@LINE-5]]:1: error: instruction not supported on this GPU
+// NOVI: :[[@LINE-6]]:1: error: instruction not supported on this GPU
+
+//---------------------------------------------------------------------------//
+// check lit() syntax.
+//---------------------------------------------------------------------------//
+
+v_sqrt_f32 v2, lit(123)
+// GFX11: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
+// GFX12: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
+// GFX1250-ASM: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
+// GFX1250-DIS: v_sqrt_f32_e32 v2, 0x7b                 ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
+// GFX89: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x4e,0x04,0x7e,0x7b,0x00,0x00,0x00]
+// SICI: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
+
+v_sqrt_f32 v2, abs(lit(123))
+// GFX11: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
+// GFX12: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
+// GFX1250-ASM: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
+// GFX1250-DIS: v_sqrt_f32_e32 v2, 0x7b                 ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
+// GFX89: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x4e,0x04,0x7e,0x7b,0x00,0x00,0x00]
+// SICI: v_sqrt_f32_e32 v2, lit(0x7b)            ; encoding: [0xff,0x66,0x04,0x7e,0x7b,0x00,0x00,0x00]
+
+v_sqrt_f32 v2, lit(123.0)
+// GFX11: v_sqrt_f32_e32 v2, lit(0x42f60000)      ; encoding: [0xff,0x66,0x04,0x7e,0x00,0x00,0xf6,0x42]
+// GFX12: v_sqrt_f32_e32 v2, lit(0x42f60000)      ; encoding: [0xff,0x66,0x04,0x7e,0x00,0x00,0xf6,0x42]
+// GFX1250-ASM: v_sqrt_f32_e32 v2, lit(0x42f60000)      ; encoding: [0xff,0x66,0x04,0x7e,0x00,0x00,0xf6,0x42]
+// GFX1250-DIS: v_sqrt_f32_e32 v2, 0x42f60000           ; encoding: [0xff,0x66,0x04,0x7e,0x00,0x00,0xf6,0x42]
+// GFX89: v_sqrt_f32_e32 v2, lit(0x42f60000)      ; encoding: [0xff,0x4e,0x04,0x7e,0x00,0x00,0xf6,0x42]
+// SICI: v_sqrt_f32_e32 v2, lit(0x42f60000)      ; encoding: [0xff,0x66,0x04,0x7e,0x00,0x00,0xf6,0x42]
+
+v_sqrt_f64 v[2:3], lit(123.0)
+// GFX11: v_sqrt_f64_e32 v[2:3], lit(0x405ec000)  ; encoding: [0xff,0x68,0x04,0x7e,0x00,0xc0,0x5e,0x40]
+// GFX12: v_sqrt_f64_e32 v[2:3], lit(0x405ec000)  ; encoding: [0xff,0x68,0x04,0x7e,0x00,0xc0,0x5e,0x40]
+// GFX1250-ASM: v_sqrt_f64_e32 v[2:3], lit(0x405ec000)  ; encoding: [0xfe,0x68,0x04,0x7e,0x00,0xc0,0x5e,0x40,0x00,0x00,0x00,0x00]
+// GFX1250-DIS: v_sqrt_f64_e32 v[2:3], lit64(0x405ec000) ; encoding: [0xfe,0x68,0x04,0x7e,0x00,0xc0,0x5e,0x40,0x00,0x00,0x00,0x00]
+// GFX89: v_sqrt_f64_e32 v[2:3], lit(0x405ec000)  ; encoding: [0xff,0x50,0x04,0x7e,0x00,0xc0,0x5e,0x40]
+// SICI: v_sqrt_f64_e32 v[2:3], lit(0x405ec000)  ; encoding: [0xff,0x68,0x04,0x7e,0x00,0xc0,0x5e,0x40]
+
+v_sqrt_f64 v[2:3], lit(123)
+// GFX11: v_sqrt_f64_e32 v[2:3], lit(0x7b)        ; encoding: [0xff,0x68,0x04,0x7e,0x7b,0x00,0x00,0x00]
+// GFX12: v_sqrt_f64_e32 v[2:3], lit(0x7b)        ; encoding: [0xff,0x68,0x04,0x7e,0x7b,0x00,0x00,0x00]
+// GFX1250-ASM: v_sqrt_f64_e32 v[2:3], lit(0x7b)        ; encoding: [0xfe,0x68,0x04,0x7e,0x7b,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
+// GFX1250-DIS: v_sqrt_f64_e32 v[2:3], lit64(0x7b)      ; encoding: [0xfe,0x68,0x04,0x7e,0x7b,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
+// GFX89: v_sqrt_f64_e32 v[2:3], lit(0x7b)        ; encoding: [0xff,0x50,0x04,0x7e,0x7b,0x00,0x00,0x00]
+// SICI: v_sqrt_f64_e32 v[2:3], lit(0x7b)        ; encoding: [0xff,0x68,0x04,0x7e,0x7b,0x00,0x00,0x00]
+
+v_sqrt_f32 v2, lit 123.0
+// NOGCN: :[[@LINE-1]]:20: error: expected left paren after lit
+
+v_sqrt_f32 v2, lit(123.0
+// NOGCN: :[[@LINE-1]]:25: error: expected closing parentheses
+
+v_sqrt_f32 v2, lit(v1)
+// NOGCN: :[[@LINE-1]]:20: error: expected immediate with lit modifier
+
+// Make sure lit() is accepted on operands without modifiers.
+
+v_madak_f32 v4, lit(0x7e8), v8, lit(0x7e8)
+// GFX89: v_madak_f32 v4, lit(0x7e8), v8, lit(0x7e8) ; encoding: [0xff,0x10,0x08,0x30,0xe8,0x07,0x00,0x00]
+// NOGFX11: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-4]]:1: error: instruction not supported on this GPU
+// SICI: v_madak_f32 v4, lit(0x7e8), v8, lit(0x7e8) ; encoding: [0xff,0x10,0x08,0x42,0xe8,0x07,0x00,0x00]
+
+v_madak_f32 v4, lit(lit(0x7e8)), v8, lit(0x7e8)
+// NOGFX11: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// NOGFX12: :[[@LINE-2]]:1: error: instruction not supported on this GPU
+// NOGFX1250: :[[@LINE-3]]:1: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE-4]]:24: error: not a valid operand.
+// NOSICI: :[[@LINE-5]]:24: error: not a valid operand.

>From 17d04e53ee5afc1cc06e92111e81b39143087a02 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 14:39:09 +0530
Subject: [PATCH 28/55] Update AMDGPUMCCodeEmitter.cpp

---
 llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
index 3f4fcdc1b9154..04ca8291bb748 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
@@ -325,12 +325,12 @@ std::optional<uint64_t> AMDGPUMCCodeEmitter::getLitEncoding(
   case AMDGPU::OPERAND_REG_INLINE_C_INT64:
     // Signed 64-bit integer operand - use IsInt<32> for 32-bit literal check
     return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, false,
-                            /IsSigned=/true);
+                            /*IsSigned=*/true);
 
   case AMDGPU::OPERAND_REG_IMM_B64:
     // Unsigned 64-bit integer operand - use IsUInt<32> for 32-bit literal check
     return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, false,
-                            /IsSigned=/false);
+                            /*IsSigned=*/false);
 
   case AMDGPU::OPERAND_REG_INLINE_C_FP64:
   case AMDGPU::OPERAND_REG_INLINE_AC_FP64:

>From b619f39a7a8757bdc8ca2491cda8f5b055995273 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 14:44:07 +0530
Subject: [PATCH 29/55] Update gfx12_asm_sop1.s

---
 llvm/test/MC/AMDGPU/gfx12_asm_sop1.s | 60 ++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_sop1.s b/llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
index 9d459cc98aad2..5c666a9f32211 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
@@ -3047,6 +3047,66 @@ s_bitreplicate_b64_b32 s[0:1], 0
 // GFX12: s_bitreplicate_b64_b32 s[0:1], 0        ; encoding: [0x80,0x14,0x80,0xbe]
 
 s_bitreplicate_b64_b32 s[0:1], -1
+// GFX12: s_bitreplicate_b64_b32 s[0:1], -1       ; encoding: [0xc1,0x14,0x80,0xbe]
+
+s_bitreplicate_b64_b32 s[0:1], 0.5
+// GFX12: s_bitreplicate_b64_b32 s[0:1], 0.5      ; encoding: [0xf0,0x14,0x80,0xbe]
+
+s_bitreplicate_b64_b32 s[0:1], -4.0
+// GFX12: s_bitreplicate_b64_b32 s[0:1], -4.0     ; encoding: [0xf7,0x14,0x80,0xbe]
+
+s_bitreplicate_b64_b32 s[0:1], 0x3f717273
+// GFX12: s_bitreplicate_b64_b32 s[0:1], 0x3f717273 ; encoding: [0xff,0x14,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+s_bitreplicate_b64_b32 s[0:1], 0xaf123456
+// GFX12: s_bitreplicate_b64_b32 s[0:1], 0xaf123456 ; encoding: [0xff,0x14,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+s_and_saveexec_b32 s0, s1
+// GFX12: s_and_saveexec_b32 s0, s1               ; encoding: [0x01,0x20,0x80,0xbe]
+
+s_and_saveexec_b32 s105, s104
+// GFX12: s_and_saveexec_b32 s105, s104           ; encoding: [0x68,0x20,0xe9,0xbe]
+
+s_and_saveexec_b32 s0, s104
+// GFX12: s_and_saveexec_b32 s0, s104             ; encoding: [0x68,0x20,0x80,0xbe]
+
+s_and_saveexec_b32 s105, s1
+// GFX12: s_and_saveexec_b32 s105, s1             ; encoding: [0x01,0x20,0xe9,0xbe]
+
+s_and_saveexec_b32 vcc_lo, s1
+// GFX12: s_and_saveexec_b32 vcc_lo, s1           ; encoding: [0x01,0x20,0xea,0xbe]
+
+s_and_saveexec_b32 vcc_hi, s1
+// GFX12: s_and_saveexec_b32 vcc_hi, s1           ; encoding: [0x01,0x20,0xeb,0xbe]
+
+s_and_saveexec_b32 s0, exec_lo
+// GFX12: s_and_saveexec_b32 s0, exec_lo          ; encoding: [0x7e,0x20,0x80,0xbe]
+
+s_and_saveexec_b32 s0, exec_hi
+// GFX12: s_and_saveexec_b32 s0, exec_hi          ; encoding: [0x7f,0x20,0x80,0xbe]
+
+s_and_saveexec_b32 s0, vcc_lo
+// GFX12: s_and_saveexec_b32 s0, vcc_lo           ; encoding: [0x6a,0x20,0x80,0xbe]
+
+s_and_saveexec_b32 s0, vcc_hi
+// GFX12: s_and_saveexec_b32 s0, vcc_hi           ; encoding: [0x6b,0x20,0x80,0xbe]
+
+s_and_saveexec_b32 s0, m0
+// GFX12: s_and_saveexec_b32 s0, m0               ; encoding: [0x7d,0x20,0x80,0xbe]
+
+s_and_saveexec_b32 s0, 0
+// GFX12: s_and_saveexec_b32 s0, 0                ; encoding: [0x80,0x20,0x80,0xbe]
+
+s_and_saveexec_b32 s0, -1
+// GFX12: s_and_saveexec_b32 s0, -1               ; encoding: [0xc1,0x20,0x80,0xbe]
+
+s_and_saveexec_b32 s0, 0.5
+// GFX12: s_and_saveexec_b32 s0, 0.5              ; encoding: [0xf0,0x20,0x80,0xbe]
+
+s_and_saveexec_b32 s0, -4.0
+// GFX12: s_and_saveexec_b32 s0, -4.0             ; encoding: [0xf7,0x20,0x80,0xbe]
+
+s_and_saveexec_b32 s0, 0x3f717273
 // GFX12: s_and_saveexec_b32 s0, 0x3f717273       ; encoding: [0xff,0x20,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 s_and_saveexec_b32 s0, 0xaf123456

>From 0e9a108876c04083d1bb3b088664d19bc947ec86 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 14:48:06 +0530
Subject: [PATCH 30/55] Update gfx1250_asm_vop1.s

---
 llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
index 1211ed42515c0..f590c978b1789 100644
--- a/llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
@@ -737,9 +737,9 @@ v_sat_pk4_u4_u8 v1.h, v2
 
 v_permlane16_swap_b32 v1, v2
 // GFX1250: v_permlane16_swap_b32_e32 v1, v2        ; encoding: [0x02,0x93,0x02,0x7e]
-//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-// GFX1250-ASM: {{.*}}
-// GFX1250-DIS: {{.*}}
 
 v_permlane16_swap_b32_e32 v1, v2
 // GFX1250: v_permlane16_swap_b32_e32 v1, v2        ; encoding: [0x02,0x93,0x02,0x7e]
+//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+// GFX1250-ASM: {{.*}}
+// GFX1250-DIS: {{.*}}

>From d44987a36708315a6e3f75d490b0b1121306886c Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 15:04:17 +0530
Subject: [PATCH 31/55] Update gfx12_asm_sop2.s

---
 llvm/test/MC/AMDGPU/gfx12_asm_sop2.s | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_sop2.s b/llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
index 1fced42f694a8..ea11f661ff035 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
@@ -5375,9 +5375,6 @@ s_lshl2_add_u32 s0, s1, 0
 s_lshl2_add_u32 s0, s1, -1
 // GFX12: s_lshl2_add_u32 s0, s1, -1              ; encoding: [0x01,0xc1,0x80,0x87]
 
-s_lshl2_add_u32 s0, s1, -1
-// GFX12: s_lshl2_add_u32 s0, s1, -1              ; encoding: [0x01,0xc1,0x80,0x87]
-
 s_lshl2_add_u32 s0, s1, 0.5
 // GFX12: s_lshl2_add_u32 s0, s1, 0.5             ; encoding: [0x01,0xf0,0x80,0x87]
 

>From 17471d6fe4e614a316133237681709e63b6cb13b Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 15:19:09 +0530
Subject: [PATCH 32/55] Update SIDefines.h

---
 llvm/lib/Target/AMDGPU/SIDefines.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h
index b836162ed9370..ebef7ce974f15 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -201,8 +201,8 @@ namespace AMDGPU {
 enum OperandType : unsigned {
   /// Operands with register, 32-bit, or 64-bit immediate
   OPERAND_REG_IMM_INT32 = MCOI::OPERAND_FIRST_TARGET,
-  OPERAND_REG_IMM_INT64,  // Signed 64-bit integer operand (uses IsInt<32>)
-  OPERAND_REG_IMM_B64,    // Unsigned 64-bit integer operand (uses IsUInt<32>)
+  OPERAND_REG_IMM_INT64, // Signed 64-bit integer operand (uses IsInt<32>)
+  OPERAND_REG_IMM_B64,   // Unsigned 64-bit integer operand (uses IsUInt<32>)
   OPERAND_REG_IMM_INT16,
   OPERAND_REG_IMM_FP32,
   OPERAND_REG_IMM_FP64,

>From 28189841eb007f2fa3334adf16b951291a103f4f Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 15:20:26 +0530
Subject: [PATCH 33/55] Update SIInstrInfo.cpp

---
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index cb66575bc959d..d52890c795ab7 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -6544,10 +6544,8 @@ bool SIInstrInfo::isOperandLegal(const MachineInstr &MI, unsigned OpIdx,
   if (MO->isImm()) {
     uint64_t Imm = MO->getImm();
     bool Is64BitFPOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_FP64;
-    bool Is64BitSignedOp =
-        OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_INT64;
-    bool Is64BitUnsignedOp =
-        OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_B64;
+    bool Is64BitSignedOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_INT64;
+    bool Is64BitUnsignedOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_B64;
     bool Is64BitOp = Is64BitFPOp || Is64BitSignedOp || Is64BitUnsignedOp ||
                      OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_V2INT32 ||
                      OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_V2FP32;

>From f5cdb17c5cd8a9654f4deb31d7211b7a3c8ef588 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 18:16:37 +0530
Subject: [PATCH 34/55] Update gfx12_dasm_sop1.txt

---
 .../Disassembler/AMDGPU/gfx12_dasm_sop1.txt   | 2746 +----------------
 1 file changed, 2 insertions(+), 2744 deletions(-)

diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
index 06ef877de27cb..107527b62560f 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
@@ -867,8 +867,7 @@
 # GFX12: s_and_not0_saveexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x2d,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 0xff,0x2d,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_and_not0_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x2d,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_and_not0_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xfe,0x2d,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_and_not0_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x2d,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 0xc1,0x2d,0x80,0xbe
 # GFX12: s_and_not0_saveexec_b64 s[0:1], -1      ; encoding: [0xc1,0x2d,0x80,0xbe]
@@ -958,8 +957,7 @@
 # GFX12: s_and_not0_wrexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x35,0x80,0xbe,0x73,0x72,0x71,0x3f]
 
 0xff,0x35,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_and_not0_wrexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x35,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_and_not0_wrexec_b64 s[0:1], 0xaf123456 ; encoding: [0xfe,0x35,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_and_not0_wrexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x35,0x80,0xbe,0x56,0x34,0x12,0xaf]
 
 0xc1,0x35,0x80,0xbe
 # GFX12: s_and_not0_wrexec_b64 s[0:1], -1        ; encoding: [0xc1,0x35,0x80,0xbe]
@@ -1019,2743 +1017,3 @@
 # GFX12: s_and_not1_saveexec_b32 s0, s104        ; encoding: [0x68,0x30,0x80,0xbe]
 
 0x01,0x30,0x80,0xbe
-# GFX12: s_and_not1_saveexec_b32 s0, s1          ; encoding: [0x01,0x30,0x80,0xbe]
-
-0x6b,0x30,0x80,0xbe
-# GFX12: s_and_not1_saveexec_b32 s0, vcc_hi      ; encoding: [0x6b,0x30,0x80,0xbe]
-
-0x6a,0x30,0x80,0xbe
-# GFX12: s_and_not1_saveexec_b32 s0, vcc_lo      ; encoding: [0x6a,0x30,0x80,0xbe]
-
-0x68,0x30,0xe9,0xbe
-# GFX12: s_and_not1_saveexec_b32 s105, s104      ; encoding: [0x68,0x30,0xe9,0xbe]
-
-0x01,0x30,0xe9,0xbe
-# GFX12: s_and_not1_saveexec_b32 s105, s1        ; encoding: [0x01,0x30,0xe9,0xbe]
-
-0x01,0x30,0xeb,0xbe
-# GFX12: s_and_not1_saveexec_b32 vcc_hi, s1      ; encoding: [0x01,0x30,0xeb,0xbe]
-
-0x01,0x30,0xea,0xbe
-# GFX12: s_and_not1_saveexec_b32 vcc_lo, s1      ; encoding: [0x01,0x30,0xea,0xbe]
-
-0xf0,0x31,0x80,0xbe
-# GFX12: s_and_not1_saveexec_b64 s[0:1], 0.5     ; encoding: [0xf0,0x31,0x80,0xbe]
-
-0x80,0x31,0x80,0xbe
-# GFX12: s_and_not1_saveexec_b64 s[0:1], 0       ; encoding: [0x80,0x31,0x80,0xbe]
-
-0xff,0x31,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_and_not1_saveexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x31,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x31,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_and_not1_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x31,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_and_not1_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xfe,0x31,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x31,0x80,0xbe
-# GFX12: s_and_not1_saveexec_b64 s[0:1], -1      ; encoding: [0xc1,0x31,0x80,0xbe]
-
-0xf7,0x31,0x80,0xbe
-# GFX12: s_and_not1_saveexec_b64 s[0:1], -4.0    ; encoding: [0xf7,0x31,0x80,0xbe]
-
-0x7e,0x31,0x80,0xbe
-# GFX12: s_and_not1_saveexec_b64 s[0:1], exec    ; encoding: [0x7e,0x31,0x80,0xbe]
-
-0x66,0x31,0x80,0xbe
-# GFX12: s_and_not1_saveexec_b64 s[0:1], s[102:103] ; encoding: [0x66,0x31,0x80,0xbe]
-
-0x02,0x31,0x80,0xbe
-# GFX12: s_and_not1_saveexec_b64 s[0:1], s[2:3]  ; encoding: [0x02,0x31,0x80,0xbe]
-
-0x6a,0x31,0x80,0xbe
-# GFX12: s_and_not1_saveexec_b64 s[0:1], vcc     ; encoding: [0x6a,0x31,0x80,0xbe]
-
-0x66,0x31,0xe8,0xbe
-# GFX12: s_and_not1_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x31,0xe8,0xbe]
-
-0x02,0x31,0xe8,0xbe
-# GFX12: s_and_not1_saveexec_b64 s[104:105], s[2:3] ; encoding: [0x02,0x31,0xe8,0xbe]
-
-0x02,0x31,0xea,0xbe
-# GFX12: s_and_not1_saveexec_b64 vcc, s[2:3]     ; encoding: [0x02,0x31,0xea,0xbe]
-
-0xf0,0x36,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b32 s0, 0.5           ; encoding: [0xf0,0x36,0x80,0xbe]
-
-0x80,0x36,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b32 s0, 0             ; encoding: [0x80,0x36,0x80,0xbe]
-
-0xff,0x36,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_and_not1_wrexec_b32 s0, 0x3f717273    ; encoding: [0xff,0x36,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x36,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_and_not1_wrexec_b32 s0, 0xaf123456    ; encoding: [0xff,0x36,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x36,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b32 s0, -1            ; encoding: [0xc1,0x36,0x80,0xbe]
-
-0xf7,0x36,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b32 s0, -4.0          ; encoding: [0xf7,0x36,0x80,0xbe]
-
-0x7f,0x36,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b32 s0, exec_hi       ; encoding: [0x7f,0x36,0x80,0xbe]
-
-0x7e,0x36,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b32 s0, exec_lo       ; encoding: [0x7e,0x36,0x80,0xbe]
-
-0x7d,0x36,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b32 s0, m0            ; encoding: [0x7d,0x36,0x80,0xbe]
-
-0x68,0x36,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b32 s0, s104          ; encoding: [0x68,0x36,0x80,0xbe]
-
-0x01,0x36,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b32 s0, s1            ; encoding: [0x01,0x36,0x80,0xbe]
-
-0x6b,0x36,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b32 s0, vcc_hi        ; encoding: [0x6b,0x36,0x80,0xbe]
-
-0x6a,0x36,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b32 s0, vcc_lo        ; encoding: [0x6a,0x36,0x80,0xbe]
-
-0x68,0x36,0xe9,0xbe
-# GFX12: s_and_not1_wrexec_b32 s105, s104        ; encoding: [0x68,0x36,0xe9,0xbe]
-
-0x01,0x36,0xe9,0xbe
-# GFX12: s_and_not1_wrexec_b32 s105, s1          ; encoding: [0x01,0x36,0xe9,0xbe]
-
-0x01,0x36,0xeb,0xbe
-# GFX12: s_and_not1_wrexec_b32 vcc_hi, s1        ; encoding: [0x01,0x36,0xeb,0xbe]
-
-0x01,0x36,0xea,0xbe
-# GFX12: s_and_not1_wrexec_b32 vcc_lo, s1        ; encoding: [0x01,0x36,0xea,0xbe]
-
-0xf0,0x37,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b64 s[0:1], 0.5       ; encoding: [0xf0,0x37,0x80,0xbe]
-
-0x80,0x37,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b64 s[0:1], 0         ; encoding: [0x80,0x37,0x80,0xbe]
-
-0xff,0x37,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_and_not1_wrexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x37,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x37,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_and_not1_wrexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x37,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_and_not1_wrexec_b64 s[0:1], 0xaf123456 ; encoding: [0xfe,0x37,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x37,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b64 s[0:1], -1        ; encoding: [0xc1,0x37,0x80,0xbe]
-
-0xf7,0x37,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b64 s[0:1], -4.0      ; encoding: [0xf7,0x37,0x80,0xbe]
-
-0x7e,0x37,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b64 s[0:1], exec      ; encoding: [0x7e,0x37,0x80,0xbe]
-
-0x66,0x37,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b64 s[0:1], s[102:103] ; encoding: [0x66,0x37,0x80,0xbe]
-
-0x02,0x37,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b64 s[0:1], s[2:3]    ; encoding: [0x02,0x37,0x80,0xbe]
-
-0x6a,0x37,0x80,0xbe
-# GFX12: s_and_not1_wrexec_b64 s[0:1], vcc       ; encoding: [0x6a,0x37,0x80,0xbe]
-
-0x66,0x37,0xe8,0xbe
-# GFX12: s_and_not1_wrexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x37,0xe8,0xbe]
-
-0x02,0x37,0xe8,0xbe
-# GFX12: s_and_not1_wrexec_b64 s[104:105], s[2:3] ; encoding: [0x02,0x37,0xe8,0xbe]
-
-0x02,0x37,0xea,0xbe
-# GFX12: s_and_not1_wrexec_b64 vcc, s[2:3]       ; encoding: [0x02,0x37,0xea,0xbe]
-
-0xf0,0x20,0x80,0xbe
-# GFX12: s_and_saveexec_b32 s0, 0.5              ; encoding: [0xf0,0x20,0x80,0xbe]
-
-0x80,0x20,0x80,0xbe
-# GFX12: s_and_saveexec_b32 s0, 0                ; encoding: [0x80,0x20,0x80,0xbe]
-
-0xff,0x20,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_and_saveexec_b32 s0, 0x3f717273       ; encoding: [0xff,0x20,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x20,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_and_saveexec_b32 s0, 0xaf123456       ; encoding: [0xff,0x20,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x20,0x80,0xbe
-# GFX12: s_and_saveexec_b32 s0, -1               ; encoding: [0xc1,0x20,0x80,0xbe]
-
-0xf7,0x20,0x80,0xbe
-# GFX12: s_and_saveexec_b32 s0, -4.0             ; encoding: [0xf7,0x20,0x80,0xbe]
-
-0x7f,0x20,0x80,0xbe
-# GFX12: s_and_saveexec_b32 s0, exec_hi          ; encoding: [0x7f,0x20,0x80,0xbe]
-
-0x7e,0x20,0x80,0xbe
-# GFX12: s_and_saveexec_b32 s0, exec_lo          ; encoding: [0x7e,0x20,0x80,0xbe]
-
-0x7d,0x20,0x80,0xbe
-# GFX12: s_and_saveexec_b32 s0, m0               ; encoding: [0x7d,0x20,0x80,0xbe]
-
-0x68,0x20,0x80,0xbe
-# GFX12: s_and_saveexec_b32 s0, s104             ; encoding: [0x68,0x20,0x80,0xbe]
-
-0x01,0x20,0x80,0xbe
-# GFX12: s_and_saveexec_b32 s0, s1               ; encoding: [0x01,0x20,0x80,0xbe]
-
-0x6b,0x20,0x80,0xbe
-# GFX12: s_and_saveexec_b32 s0, vcc_hi           ; encoding: [0x6b,0x20,0x80,0xbe]
-
-0x6a,0x20,0x80,0xbe
-# GFX12: s_and_saveexec_b32 s0, vcc_lo           ; encoding: [0x6a,0x20,0x80,0xbe]
-
-0x68,0x20,0xe9,0xbe
-# GFX12: s_and_saveexec_b32 s105, s104           ; encoding: [0x68,0x20,0xe9,0xbe]
-
-0x01,0x20,0xe9,0xbe
-# GFX12: s_and_saveexec_b32 s105, s1             ; encoding: [0x01,0x20,0xe9,0xbe]
-
-0x01,0x20,0xeb,0xbe
-# GFX12: s_and_saveexec_b32 vcc_hi, s1           ; encoding: [0x01,0x20,0xeb,0xbe]
-
-0x01,0x20,0xea,0xbe
-# GFX12: s_and_saveexec_b32 vcc_lo, s1           ; encoding: [0x01,0x20,0xea,0xbe]
-
-0xf0,0x21,0x80,0xbe
-# GFX12: s_and_saveexec_b64 s[0:1], 0.5          ; encoding: [0xf0,0x21,0x80,0xbe]
-
-0x80,0x21,0x80,0xbe
-# GFX12: s_and_saveexec_b64 s[0:1], 0            ; encoding: [0x80,0x21,0x80,0xbe]
-
-0xff,0x21,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_and_saveexec_b64 s[0:1], 0x3f717273   ; encoding: [0xff,0x21,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x21,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_and_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xff,0x21,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_and_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xfe,0x21,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x21,0x80,0xbe
-# GFX12: s_and_saveexec_b64 s[0:1], -1           ; encoding: [0xc1,0x21,0x80,0xbe]
-
-0xf7,0x21,0x80,0xbe
-# GFX12: s_and_saveexec_b64 s[0:1], -4.0         ; encoding: [0xf7,0x21,0x80,0xbe]
-
-0x7e,0x21,0x80,0xbe
-# GFX12: s_and_saveexec_b64 s[0:1], exec         ; encoding: [0x7e,0x21,0x80,0xbe]
-
-0x66,0x21,0x80,0xbe
-# GFX12: s_and_saveexec_b64 s[0:1], s[102:103]   ; encoding: [0x66,0x21,0x80,0xbe]
-
-0x02,0x21,0x80,0xbe
-# GFX12: s_and_saveexec_b64 s[0:1], s[2:3]       ; encoding: [0x02,0x21,0x80,0xbe]
-
-0x6a,0x21,0x80,0xbe
-# GFX12: s_and_saveexec_b64 s[0:1], vcc          ; encoding: [0x6a,0x21,0x80,0xbe]
-
-0x66,0x21,0xe8,0xbe
-# GFX12: s_and_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x21,0xe8,0xbe]
-
-0x02,0x21,0xe8,0xbe
-# GFX12: s_and_saveexec_b64 s[104:105], s[2:3]   ; encoding: [0x02,0x21,0xe8,0xbe]
-
-0x02,0x21,0xea,0xbe
-# GFX12: s_and_saveexec_b64 vcc, s[2:3]          ; encoding: [0x02,0x21,0xea,0xbe]
-
-0x01,0x16,0xff,0xbe
-# GFX12: s_bcnt0_i32_b32 exec_hi, s1             ; encoding: [0x01,0x16,0xff,0xbe]
-
-0x01,0x16,0xfe,0xbe
-# GFX12: s_bcnt0_i32_b32 exec_lo, s1             ; encoding: [0x01,0x16,0xfe,0xbe]
-
-0x01,0x16,0xfd,0xbe
-# GFX12: s_bcnt0_i32_b32 m0, s1                  ; encoding: [0x01,0x16,0xfd,0xbe]
-
-0xf0,0x16,0x80,0xbe
-# GFX12: s_bcnt0_i32_b32 s0, 0.5                 ; encoding: [0xf0,0x16,0x80,0xbe]
-
-0x80,0x16,0x80,0xbe
-# GFX12: s_bcnt0_i32_b32 s0, 0                   ; encoding: [0x80,0x16,0x80,0xbe]
-
-0xff,0x16,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_bcnt0_i32_b32 s0, 0x3f717273          ; encoding: [0xff,0x16,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x16,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_bcnt0_i32_b32 s0, 0xaf123456          ; encoding: [0xff,0x16,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x16,0x80,0xbe
-# GFX12: s_bcnt0_i32_b32 s0, -1                  ; encoding: [0xc1,0x16,0x80,0xbe]
-
-0xf7,0x16,0x80,0xbe
-# GFX12: s_bcnt0_i32_b32 s0, -4.0                ; encoding: [0xf7,0x16,0x80,0xbe]
-
-0x7f,0x16,0x80,0xbe
-# GFX12: s_bcnt0_i32_b32 s0, exec_hi             ; encoding: [0x7f,0x16,0x80,0xbe]
-
-0x7e,0x16,0x80,0xbe
-# GFX12: s_bcnt0_i32_b32 s0, exec_lo             ; encoding: [0x7e,0x16,0x80,0xbe]
-
-0x7d,0x16,0x80,0xbe
-# GFX12: s_bcnt0_i32_b32 s0, m0                  ; encoding: [0x7d,0x16,0x80,0xbe]
-
-0x68,0x16,0x80,0xbe
-# GFX12: s_bcnt0_i32_b32 s0, s104                ; encoding: [0x68,0x16,0x80,0xbe]
-
-0x01,0x16,0x80,0xbe
-# GFX12: s_bcnt0_i32_b32 s0, s1                  ; encoding: [0x01,0x16,0x80,0xbe]
-
-0x6b,0x16,0x80,0xbe
-# GFX12: s_bcnt0_i32_b32 s0, vcc_hi              ; encoding: [0x6b,0x16,0x80,0xbe]
-
-0x6a,0x16,0x80,0xbe
-# GFX12: s_bcnt0_i32_b32 s0, vcc_lo              ; encoding: [0x6a,0x16,0x80,0xbe]
-
-0x68,0x16,0xe9,0xbe
-# GFX12: s_bcnt0_i32_b32 s105, s104              ; encoding: [0x68,0x16,0xe9,0xbe]
-
-0x01,0x16,0xe9,0xbe
-# GFX12: s_bcnt0_i32_b32 s105, s1                ; encoding: [0x01,0x16,0xe9,0xbe]
-
-0x01,0x16,0xeb,0xbe
-# GFX12: s_bcnt0_i32_b32 vcc_hi, s1              ; encoding: [0x01,0x16,0xeb,0xbe]
-
-0x01,0x16,0xea,0xbe
-# GFX12: s_bcnt0_i32_b32 vcc_lo, s1              ; encoding: [0x01,0x16,0xea,0xbe]
-
-0x02,0x17,0xff,0xbe
-# GFX12: s_bcnt0_i32_b64 exec_hi, s[2:3]         ; encoding: [0x02,0x17,0xff,0xbe]
-
-0x02,0x17,0xfe,0xbe
-# GFX12: s_bcnt0_i32_b64 exec_lo, s[2:3]         ; encoding: [0x02,0x17,0xfe,0xbe]
-
-0x02,0x17,0xfd,0xbe
-# GFX12: s_bcnt0_i32_b64 m0, s[2:3]              ; encoding: [0x02,0x17,0xfd,0xbe]
-
-0xf0,0x17,0x80,0xbe
-# GFX12: s_bcnt0_i32_b64 s0, 0.5                 ; encoding: [0xf0,0x17,0x80,0xbe]
-
-0x80,0x17,0x80,0xbe
-# GFX12: s_bcnt0_i32_b64 s0, 0                   ; encoding: [0x80,0x17,0x80,0xbe]
-
-0xff,0x17,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_bcnt0_i32_b64 s0, 0x3f717273          ; encoding: [0xff,0x17,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x17,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_bcnt0_i32_b64 s0, 0xaf123456          ; encoding: [0xff,0x17,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_bcnt0_i32_b64 s0, 0xaf123456          ; encoding: [0xfe,0x17,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x17,0x80,0xbe
-# GFX12: s_bcnt0_i32_b64 s0, -1                  ; encoding: [0xc1,0x17,0x80,0xbe]
-
-0xf7,0x17,0x80,0xbe
-# GFX12: s_bcnt0_i32_b64 s0, -4.0                ; encoding: [0xf7,0x17,0x80,0xbe]
-
-0x7e,0x17,0x80,0xbe
-# GFX12: s_bcnt0_i32_b64 s0, exec                ; encoding: [0x7e,0x17,0x80,0xbe]
-
-0x66,0x17,0x80,0xbe
-# GFX12: s_bcnt0_i32_b64 s0, s[102:103]          ; encoding: [0x66,0x17,0x80,0xbe]
-
-0x02,0x17,0x80,0xbe
-# GFX12: s_bcnt0_i32_b64 s0, s[2:3]              ; encoding: [0x02,0x17,0x80,0xbe]
-
-0x6a,0x17,0x80,0xbe
-# GFX12: s_bcnt0_i32_b64 s0, vcc                 ; encoding: [0x6a,0x17,0x80,0xbe]
-
-0x66,0x17,0xe9,0xbe
-# GFX12: s_bcnt0_i32_b64 s105, s[102:103]        ; encoding: [0x66,0x17,0xe9,0xbe]
-
-0x02,0x17,0xe9,0xbe
-# GFX12: s_bcnt0_i32_b64 s105, s[2:3]            ; encoding: [0x02,0x17,0xe9,0xbe]
-
-0x02,0x17,0xeb,0xbe
-# GFX12: s_bcnt0_i32_b64 vcc_hi, s[2:3]          ; encoding: [0x02,0x17,0xeb,0xbe]
-
-0x02,0x17,0xea,0xbe
-# GFX12: s_bcnt0_i32_b64 vcc_lo, s[2:3]          ; encoding: [0x02,0x17,0xea,0xbe]
-
-0x01,0x18,0xff,0xbe
-# GFX12: s_bcnt1_i32_b32 exec_hi, s1             ; encoding: [0x01,0x18,0xff,0xbe]
-
-0x01,0x18,0xfe,0xbe
-# GFX12: s_bcnt1_i32_b32 exec_lo, s1             ; encoding: [0x01,0x18,0xfe,0xbe]
-
-0x01,0x18,0xfd,0xbe
-# GFX12: s_bcnt1_i32_b32 m0, s1                  ; encoding: [0x01,0x18,0xfd,0xbe]
-
-0xf0,0x18,0x80,0xbe
-# GFX12: s_bcnt1_i32_b32 s0, 0.5                 ; encoding: [0xf0,0x18,0x80,0xbe]
-
-0x80,0x18,0x80,0xbe
-# GFX12: s_bcnt1_i32_b32 s0, 0                   ; encoding: [0x80,0x18,0x80,0xbe]
-
-0xff,0x18,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_bcnt1_i32_b32 s0, 0x3f717273          ; encoding: [0xff,0x18,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x18,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_bcnt1_i32_b32 s0, 0xaf123456          ; encoding: [0xff,0x18,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x18,0x80,0xbe
-# GFX12: s_bcnt1_i32_b32 s0, -1                  ; encoding: [0xc1,0x18,0x80,0xbe]
-
-0xf7,0x18,0x80,0xbe
-# GFX12: s_bcnt1_i32_b32 s0, -4.0                ; encoding: [0xf7,0x18,0x80,0xbe]
-
-0x7f,0x18,0x80,0xbe
-# GFX12: s_bcnt1_i32_b32 s0, exec_hi             ; encoding: [0x7f,0x18,0x80,0xbe]
-
-0x7e,0x18,0x80,0xbe
-# GFX12: s_bcnt1_i32_b32 s0, exec_lo             ; encoding: [0x7e,0x18,0x80,0xbe]
-
-0x7d,0x18,0x80,0xbe
-# GFX12: s_bcnt1_i32_b32 s0, m0                  ; encoding: [0x7d,0x18,0x80,0xbe]
-
-0x68,0x18,0x80,0xbe
-# GFX12: s_bcnt1_i32_b32 s0, s104                ; encoding: [0x68,0x18,0x80,0xbe]
-
-0x01,0x18,0x80,0xbe
-# GFX12: s_bcnt1_i32_b32 s0, s1                  ; encoding: [0x01,0x18,0x80,0xbe]
-
-0x6b,0x18,0x80,0xbe
-# GFX12: s_bcnt1_i32_b32 s0, vcc_hi              ; encoding: [0x6b,0x18,0x80,0xbe]
-
-0x6a,0x18,0x80,0xbe
-# GFX12: s_bcnt1_i32_b32 s0, vcc_lo              ; encoding: [0x6a,0x18,0x80,0xbe]
-
-0x68,0x18,0xe9,0xbe
-# GFX12: s_bcnt1_i32_b32 s105, s104              ; encoding: [0x68,0x18,0xe9,0xbe]
-
-0x01,0x18,0xe9,0xbe
-# GFX12: s_bcnt1_i32_b32 s105, s1                ; encoding: [0x01,0x18,0xe9,0xbe]
-
-0x01,0x18,0xeb,0xbe
-# GFX12: s_bcnt1_i32_b32 vcc_hi, s1              ; encoding: [0x01,0x18,0xeb,0xbe]
-
-0x01,0x18,0xea,0xbe
-# GFX12: s_bcnt1_i32_b32 vcc_lo, s1              ; encoding: [0x01,0x18,0xea,0xbe]
-
-0x02,0x19,0xff,0xbe
-# GFX12: s_bcnt1_i32_b64 exec_hi, s[2:3]         ; encoding: [0x02,0x19,0xff,0xbe]
-
-0x02,0x19,0xfe,0xbe
-# GFX12: s_bcnt1_i32_b64 exec_lo, s[2:3]         ; encoding: [0x02,0x19,0xfe,0xbe]
-
-0x02,0x19,0xfd,0xbe
-# GFX12: s_bcnt1_i32_b64 m0, s[2:3]              ; encoding: [0x02,0x19,0xfd,0xbe]
-
-0xf0,0x19,0x80,0xbe
-# GFX12: s_bcnt1_i32_b64 s0, 0.5                 ; encoding: [0xf0,0x19,0x80,0xbe]
-
-0x80,0x19,0x80,0xbe
-# GFX12: s_bcnt1_i32_b64 s0, 0                   ; encoding: [0x80,0x19,0x80,0xbe]
-
-0xff,0x19,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_bcnt1_i32_b64 s0, 0x3f717273          ; encoding: [0xff,0x19,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x19,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_bcnt1_i32_b64 s0, 0xaf123456          ; encoding: [0xff,0x19,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_bcnt1_i32_b64 s0, 0xaf123456          ; encoding: [0xfe,0x19,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x19,0x80,0xbe
-# GFX12: s_bcnt1_i32_b64 s0, -1                  ; encoding: [0xc1,0x19,0x80,0xbe]
-
-0xf7,0x19,0x80,0xbe
-# GFX12: s_bcnt1_i32_b64 s0, -4.0                ; encoding: [0xf7,0x19,0x80,0xbe]
-
-0x7e,0x19,0x80,0xbe
-# GFX12: s_bcnt1_i32_b64 s0, exec                ; encoding: [0x7e,0x19,0x80,0xbe]
-
-0x66,0x19,0x80,0xbe
-# GFX12: s_bcnt1_i32_b64 s0, s[102:103]          ; encoding: [0x66,0x19,0x80,0xbe]
-
-0x02,0x19,0x80,0xbe
-# GFX12: s_bcnt1_i32_b64 s0, s[2:3]              ; encoding: [0x02,0x19,0x80,0xbe]
-
-0x6a,0x19,0x80,0xbe
-# GFX12: s_bcnt1_i32_b64 s0, vcc                 ; encoding: [0x6a,0x19,0x80,0xbe]
-
-0x66,0x19,0xe9,0xbe
-# GFX12: s_bcnt1_i32_b64 s105, s[102:103]        ; encoding: [0x66,0x19,0xe9,0xbe]
-
-0x02,0x19,0xe9,0xbe
-# GFX12: s_bcnt1_i32_b64 s105, s[2:3]            ; encoding: [0x02,0x19,0xe9,0xbe]
-
-0x02,0x19,0xeb,0xbe
-# GFX12: s_bcnt1_i32_b64 vcc_hi, s[2:3]          ; encoding: [0x02,0x19,0xeb,0xbe]
-
-0x02,0x19,0xea,0xbe
-# GFX12: s_bcnt1_i32_b64 vcc_lo, s[2:3]          ; encoding: [0x02,0x19,0xea,0xbe]
-
-0x02,0x14,0xfe,0xbe
-# GFX12: s_bitreplicate_b64_b32 exec, s2         ; encoding: [0x02,0x14,0xfe,0xbe]
-
-0xf0,0x14,0x80,0xbe
-# GFX12: s_bitreplicate_b64_b32 s[0:1], 0.5      ; encoding: [0xf0,0x14,0x80,0xbe]
-
-0x80,0x14,0x80,0xbe
-# GFX12: s_bitreplicate_b64_b32 s[0:1], 0        ; encoding: [0x80,0x14,0x80,0xbe]
-
-0xff,0x14,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_bitreplicate_b64_b32 s[0:1], 0x3f717273 ; encoding: [0xff,0x14,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x14,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_bitreplicate_b64_b32 s[0:1], 0xaf123456 ; encoding: [0xff,0x14,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x14,0x80,0xbe
-# GFX12: s_bitreplicate_b64_b32 s[0:1], -1       ; encoding: [0xc1,0x14,0x80,0xbe]
-
-0xf7,0x14,0x80,0xbe
-# GFX12: s_bitreplicate_b64_b32 s[0:1], -4.0     ; encoding: [0xf7,0x14,0x80,0xbe]
-
-0x7f,0x14,0x80,0xbe
-# GFX12: s_bitreplicate_b64_b32 s[0:1], exec_hi  ; encoding: [0x7f,0x14,0x80,0xbe]
-
-0x7e,0x14,0x80,0xbe
-# GFX12: s_bitreplicate_b64_b32 s[0:1], exec_lo  ; encoding: [0x7e,0x14,0x80,0xbe]
-
-0x7d,0x14,0x80,0xbe
-# GFX12: s_bitreplicate_b64_b32 s[0:1], m0       ; encoding: [0x7d,0x14,0x80,0xbe]
-
-0x66,0x14,0x80,0xbe
-# GFX12: s_bitreplicate_b64_b32 s[0:1], s102     ; encoding: [0x66,0x14,0x80,0xbe]
-
-0x02,0x14,0x80,0xbe
-# GFX12: s_bitreplicate_b64_b32 s[0:1], s2       ; encoding: [0x02,0x14,0x80,0xbe]
-
-0x6b,0x14,0x80,0xbe
-# GFX12: s_bitreplicate_b64_b32 s[0:1], vcc_hi   ; encoding: [0x6b,0x14,0x80,0xbe]
-
-0x6a,0x14,0x80,0xbe
-# GFX12: s_bitreplicate_b64_b32 s[0:1], vcc_lo   ; encoding: [0x6a,0x14,0x80,0xbe]
-
-0x66,0x14,0xe8,0xbe
-# GFX12: s_bitreplicate_b64_b32 s[104:105], s102 ; encoding: [0x66,0x14,0xe8,0xbe]
-
-0x02,0x14,0xe8,0xbe
-# GFX12: s_bitreplicate_b64_b32 s[104:105], s2   ; encoding: [0x02,0x14,0xe8,0xbe]
-
-0x02,0x14,0xea,0xbe
-# GFX12: s_bitreplicate_b64_b32 vcc, s2          ; encoding: [0x02,0x14,0xea,0xbe]
-
-0x01,0x10,0xff,0xbe
-# GFX12: s_bitset0_b32 exec_hi, s1               ; encoding: [0x01,0x10,0xff,0xbe]
-
-0x01,0x10,0xfe,0xbe
-# GFX12: s_bitset0_b32 exec_lo, s1               ; encoding: [0x01,0x10,0xfe,0xbe]
-
-0x01,0x10,0xfd,0xbe
-# GFX12: s_bitset0_b32 m0, s1                    ; encoding: [0x01,0x10,0xfd,0xbe]
-
-0xf0,0x10,0x80,0xbe
-# GFX12: s_bitset0_b32 s0, 0.5                   ; encoding: [0xf0,0x10,0x80,0xbe]
-
-0x80,0x10,0x80,0xbe
-# GFX12: s_bitset0_b32 s0, 0                     ; encoding: [0x80,0x10,0x80,0xbe]
-
-0xff,0x10,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_bitset0_b32 s0, 0x3f717273            ; encoding: [0xff,0x10,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x10,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_bitset0_b32 s0, 0xaf123456            ; encoding: [0xff,0x10,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x10,0x80,0xbe
-# GFX12: s_bitset0_b32 s0, -1                    ; encoding: [0xc1,0x10,0x80,0xbe]
-
-0xf7,0x10,0x80,0xbe
-# GFX12: s_bitset0_b32 s0, -4.0                  ; encoding: [0xf7,0x10,0x80,0xbe]
-
-0x7f,0x10,0x80,0xbe
-# GFX12: s_bitset0_b32 s0, exec_hi               ; encoding: [0x7f,0x10,0x80,0xbe]
-
-0x7e,0x10,0x80,0xbe
-# GFX12: s_bitset0_b32 s0, exec_lo               ; encoding: [0x7e,0x10,0x80,0xbe]
-
-0x7d,0x10,0x80,0xbe
-# GFX12: s_bitset0_b32 s0, m0                    ; encoding: [0x7d,0x10,0x80,0xbe]
-
-0x68,0x10,0x80,0xbe
-# GFX12: s_bitset0_b32 s0, s104                  ; encoding: [0x68,0x10,0x80,0xbe]
-
-0x01,0x10,0x80,0xbe
-# GFX12: s_bitset0_b32 s0, s1                    ; encoding: [0x01,0x10,0x80,0xbe]
-
-0x6b,0x10,0x80,0xbe
-# GFX12: s_bitset0_b32 s0, vcc_hi                ; encoding: [0x6b,0x10,0x80,0xbe]
-
-0x6a,0x10,0x80,0xbe
-# GFX12: s_bitset0_b32 s0, vcc_lo                ; encoding: [0x6a,0x10,0x80,0xbe]
-
-0x68,0x10,0xe9,0xbe
-# GFX12: s_bitset0_b32 s105, s104                ; encoding: [0x68,0x10,0xe9,0xbe]
-
-0x01,0x10,0xe9,0xbe
-# GFX12: s_bitset0_b32 s105, s1                  ; encoding: [0x01,0x10,0xe9,0xbe]
-
-0x01,0x10,0xeb,0xbe
-# GFX12: s_bitset0_b32 vcc_hi, s1                ; encoding: [0x01,0x10,0xeb,0xbe]
-
-0x01,0x10,0xea,0xbe
-# GFX12: s_bitset0_b32 vcc_lo, s1                ; encoding: [0x01,0x10,0xea,0xbe]
-
-0x02,0x11,0xfe,0xbe
-# GFX12: s_bitset0_b64 exec, s2                  ; encoding: [0x02,0x11,0xfe,0xbe]
-
-0xf0,0x11,0x80,0xbe
-# GFX12: s_bitset0_b64 s[0:1], 0.5               ; encoding: [0xf0,0x11,0x80,0xbe]
-
-0x80,0x11,0x80,0xbe
-# GFX12: s_bitset0_b64 s[0:1], 0                 ; encoding: [0x80,0x11,0x80,0xbe]
-
-0xff,0x11,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_bitset0_b64 s[0:1], 0x3f717273        ; encoding: [0xff,0x11,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x11,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_bitset0_b64 s[0:1], 0xaf123456        ; encoding: [0xff,0x11,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x11,0x80,0xbe
-# GFX12: s_bitset0_b64 s[0:1], -1                ; encoding: [0xc1,0x11,0x80,0xbe]
-
-0xf7,0x11,0x80,0xbe
-# GFX12: s_bitset0_b64 s[0:1], -4.0              ; encoding: [0xf7,0x11,0x80,0xbe]
-
-0x7f,0x11,0x80,0xbe
-# GFX12: s_bitset0_b64 s[0:1], exec_hi           ; encoding: [0x7f,0x11,0x80,0xbe]
-
-0x7e,0x11,0x80,0xbe
-# GFX12: s_bitset0_b64 s[0:1], exec_lo           ; encoding: [0x7e,0x11,0x80,0xbe]
-
-0x7d,0x11,0x80,0xbe
-# GFX12: s_bitset0_b64 s[0:1], m0                ; encoding: [0x7d,0x11,0x80,0xbe]
-
-0x66,0x11,0x80,0xbe
-# GFX12: s_bitset0_b64 s[0:1], s102              ; encoding: [0x66,0x11,0x80,0xbe]
-
-0x02,0x11,0x80,0xbe
-# GFX12: s_bitset0_b64 s[0:1], s2                ; encoding: [0x02,0x11,0x80,0xbe]
-
-0x6b,0x11,0x80,0xbe
-# GFX12: s_bitset0_b64 s[0:1], vcc_hi            ; encoding: [0x6b,0x11,0x80,0xbe]
-
-0x6a,0x11,0x80,0xbe
-# GFX12: s_bitset0_b64 s[0:1], vcc_lo            ; encoding: [0x6a,0x11,0x80,0xbe]
-
-0x66,0x11,0xe8,0xbe
-# GFX12: s_bitset0_b64 s[104:105], s102          ; encoding: [0x66,0x11,0xe8,0xbe]
-
-0x02,0x11,0xe8,0xbe
-# GFX12: s_bitset0_b64 s[104:105], s2            ; encoding: [0x02,0x11,0xe8,0xbe]
-
-0x02,0x11,0xea,0xbe
-# GFX12: s_bitset0_b64 vcc, s2                   ; encoding: [0x02,0x11,0xea,0xbe]
-
-0x01,0x12,0xff,0xbe
-# GFX12: s_bitset1_b32 exec_hi, s1               ; encoding: [0x01,0x12,0xff,0xbe]
-
-0x01,0x12,0xfe,0xbe
-# GFX12: s_bitset1_b32 exec_lo, s1               ; encoding: [0x01,0x12,0xfe,0xbe]
-
-0x01,0x12,0xfd,0xbe
-# GFX12: s_bitset1_b32 m0, s1                    ; encoding: [0x01,0x12,0xfd,0xbe]
-
-0xf0,0x12,0x80,0xbe
-# GFX12: s_bitset1_b32 s0, 0.5                   ; encoding: [0xf0,0x12,0x80,0xbe]
-
-0x80,0x12,0x80,0xbe
-# GFX12: s_bitset1_b32 s0, 0                     ; encoding: [0x80,0x12,0x80,0xbe]
-
-0xff,0x12,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_bitset1_b32 s0, 0x3f717273            ; encoding: [0xff,0x12,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x12,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_bitset1_b32 s0, 0xaf123456            ; encoding: [0xff,0x12,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x12,0x80,0xbe
-# GFX12: s_bitset1_b32 s0, -1                    ; encoding: [0xc1,0x12,0x80,0xbe]
-
-0xf7,0x12,0x80,0xbe
-# GFX12: s_bitset1_b32 s0, -4.0                  ; encoding: [0xf7,0x12,0x80,0xbe]
-
-0x7f,0x12,0x80,0xbe
-# GFX12: s_bitset1_b32 s0, exec_hi               ; encoding: [0x7f,0x12,0x80,0xbe]
-
-0x7e,0x12,0x80,0xbe
-# GFX12: s_bitset1_b32 s0, exec_lo               ; encoding: [0x7e,0x12,0x80,0xbe]
-
-0x7d,0x12,0x80,0xbe
-# GFX12: s_bitset1_b32 s0, m0                    ; encoding: [0x7d,0x12,0x80,0xbe]
-
-0x68,0x12,0x80,0xbe
-# GFX12: s_bitset1_b32 s0, s104                  ; encoding: [0x68,0x12,0x80,0xbe]
-
-0x01,0x12,0x80,0xbe
-# GFX12: s_bitset1_b32 s0, s1                    ; encoding: [0x01,0x12,0x80,0xbe]
-
-0x6b,0x12,0x80,0xbe
-# GFX12: s_bitset1_b32 s0, vcc_hi                ; encoding: [0x6b,0x12,0x80,0xbe]
-
-0x6a,0x12,0x80,0xbe
-# GFX12: s_bitset1_b32 s0, vcc_lo                ; encoding: [0x6a,0x12,0x80,0xbe]
-
-0x68,0x12,0xe9,0xbe
-# GFX12: s_bitset1_b32 s105, s104                ; encoding: [0x68,0x12,0xe9,0xbe]
-
-0x01,0x12,0xe9,0xbe
-# GFX12: s_bitset1_b32 s105, s1                  ; encoding: [0x01,0x12,0xe9,0xbe]
-
-0x01,0x12,0xeb,0xbe
-# GFX12: s_bitset1_b32 vcc_hi, s1                ; encoding: [0x01,0x12,0xeb,0xbe]
-
-0x01,0x12,0xea,0xbe
-# GFX12: s_bitset1_b32 vcc_lo, s1                ; encoding: [0x01,0x12,0xea,0xbe]
-
-0x02,0x13,0xfe,0xbe
-# GFX12: s_bitset1_b64 exec, s2                  ; encoding: [0x02,0x13,0xfe,0xbe]
-
-0xf0,0x13,0x80,0xbe
-# GFX12: s_bitset1_b64 s[0:1], 0.5               ; encoding: [0xf0,0x13,0x80,0xbe]
-
-0x80,0x13,0x80,0xbe
-# GFX12: s_bitset1_b64 s[0:1], 0                 ; encoding: [0x80,0x13,0x80,0xbe]
-
-0xff,0x13,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_bitset1_b64 s[0:1], 0x3f717273        ; encoding: [0xff,0x13,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x13,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_bitset1_b64 s[0:1], 0xaf123456        ; encoding: [0xff,0x13,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x13,0x80,0xbe
-# GFX12: s_bitset1_b64 s[0:1], -1                ; encoding: [0xc1,0x13,0x80,0xbe]
-
-0xf7,0x13,0x80,0xbe
-# GFX12: s_bitset1_b64 s[0:1], -4.0              ; encoding: [0xf7,0x13,0x80,0xbe]
-
-0x7f,0x13,0x80,0xbe
-# GFX12: s_bitset1_b64 s[0:1], exec_hi           ; encoding: [0x7f,0x13,0x80,0xbe]
-
-0x7e,0x13,0x80,0xbe
-# GFX12: s_bitset1_b64 s[0:1], exec_lo           ; encoding: [0x7e,0x13,0x80,0xbe]
-
-0x7d,0x13,0x80,0xbe
-# GFX12: s_bitset1_b64 s[0:1], m0                ; encoding: [0x7d,0x13,0x80,0xbe]
-
-0x66,0x13,0x80,0xbe
-# GFX12: s_bitset1_b64 s[0:1], s102              ; encoding: [0x66,0x13,0x80,0xbe]
-
-0x02,0x13,0x80,0xbe
-# GFX12: s_bitset1_b64 s[0:1], s2                ; encoding: [0x02,0x13,0x80,0xbe]
-
-0x6b,0x13,0x80,0xbe
-# GFX12: s_bitset1_b64 s[0:1], vcc_hi            ; encoding: [0x6b,0x13,0x80,0xbe]
-
-0x6a,0x13,0x80,0xbe
-# GFX12: s_bitset1_b64 s[0:1], vcc_lo            ; encoding: [0x6a,0x13,0x80,0xbe]
-
-0x66,0x13,0xe8,0xbe
-# GFX12: s_bitset1_b64 s[104:105], s102          ; encoding: [0x66,0x13,0xe8,0xbe]
-
-0x02,0x13,0xe8,0xbe
-# GFX12: s_bitset1_b64 s[104:105], s2            ; encoding: [0x02,0x13,0xe8,0xbe]
-
-0x02,0x13,0xea,0xbe
-# GFX12: s_bitset1_b64 vcc, s2                   ; encoding: [0x02,0x13,0xea,0xbe]
-
-0x01,0x04,0xff,0xbe
-# GFX12: s_brev_b32 exec_hi, s1                  ; encoding: [0x01,0x04,0xff,0xbe]
-
-0x01,0x04,0xfe,0xbe
-# GFX12: s_brev_b32 exec_lo, s1                  ; encoding: [0x01,0x04,0xfe,0xbe]
-
-0x01,0x04,0xfd,0xbe
-# GFX12: s_brev_b32 m0, s1                       ; encoding: [0x01,0x04,0xfd,0xbe]
-
-0xf0,0x04,0x80,0xbe
-# GFX12: s_brev_b32 s0, 0.5                      ; encoding: [0xf0,0x04,0x80,0xbe]
-
-0x80,0x04,0x80,0xbe
-# GFX12: s_brev_b32 s0, 0                        ; encoding: [0x80,0x04,0x80,0xbe]
-
-0xff,0x04,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_brev_b32 s0, 0x3f717273               ; encoding: [0xff,0x04,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x04,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_brev_b32 s0, 0xaf123456               ; encoding: [0xff,0x04,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x04,0x80,0xbe
-# GFX12: s_brev_b32 s0, -1                       ; encoding: [0xc1,0x04,0x80,0xbe]
-
-0xf7,0x04,0x80,0xbe
-# GFX12: s_brev_b32 s0, -4.0                     ; encoding: [0xf7,0x04,0x80,0xbe]
-
-0x7f,0x04,0x80,0xbe
-# GFX12: s_brev_b32 s0, exec_hi                  ; encoding: [0x7f,0x04,0x80,0xbe]
-
-0x7e,0x04,0x80,0xbe
-# GFX12: s_brev_b32 s0, exec_lo                  ; encoding: [0x7e,0x04,0x80,0xbe]
-
-0x7d,0x04,0x80,0xbe
-# GFX12: s_brev_b32 s0, m0                       ; encoding: [0x7d,0x04,0x80,0xbe]
-
-0x68,0x04,0x80,0xbe
-# GFX12: s_brev_b32 s0, s104                     ; encoding: [0x68,0x04,0x80,0xbe]
-
-0x01,0x04,0x80,0xbe
-# GFX12: s_brev_b32 s0, s1                       ; encoding: [0x01,0x04,0x80,0xbe]
-
-0x6b,0x04,0x80,0xbe
-# GFX12: s_brev_b32 s0, vcc_hi                   ; encoding: [0x6b,0x04,0x80,0xbe]
-
-0x6a,0x04,0x80,0xbe
-# GFX12: s_brev_b32 s0, vcc_lo                   ; encoding: [0x6a,0x04,0x80,0xbe]
-
-0x68,0x04,0xe9,0xbe
-# GFX12: s_brev_b32 s105, s104                   ; encoding: [0x68,0x04,0xe9,0xbe]
-
-0x01,0x04,0xe9,0xbe
-# GFX12: s_brev_b32 s105, s1                     ; encoding: [0x01,0x04,0xe9,0xbe]
-
-0x01,0x04,0xeb,0xbe
-# GFX12: s_brev_b32 vcc_hi, s1                   ; encoding: [0x01,0x04,0xeb,0xbe]
-
-0x01,0x04,0xea,0xbe
-# GFX12: s_brev_b32 vcc_lo, s1                   ; encoding: [0x01,0x04,0xea,0xbe]
-
-0x02,0x05,0xfe,0xbe
-# GFX12: s_brev_b64 exec, s[2:3]                 ; encoding: [0x02,0x05,0xfe,0xbe]
-
-0xf0,0x05,0x80,0xbe
-# GFX12: s_brev_b64 s[0:1], 0.5                  ; encoding: [0xf0,0x05,0x80,0xbe]
-
-0x80,0x05,0x80,0xbe
-# GFX12: s_brev_b64 s[0:1], 0                    ; encoding: [0x80,0x05,0x80,0xbe]
-
-0xff,0x05,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_brev_b64 s[0:1], 0x3f717273           ; encoding: [0xff,0x05,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x05,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_brev_b64 s[0:1], 0xaf123456           ; encoding: [0xff,0x05,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_brev_b64 s[0:1], 0xaf123456           ; encoding: [0xfe,0x05,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x05,0x80,0xbe
-# GFX12: s_brev_b64 s[0:1], -1                   ; encoding: [0xc1,0x05,0x80,0xbe]
-
-0xf7,0x05,0x80,0xbe
-# GFX12: s_brev_b64 s[0:1], -4.0                 ; encoding: [0xf7,0x05,0x80,0xbe]
-
-0x7e,0x05,0x80,0xbe
-# GFX12: s_brev_b64 s[0:1], exec                 ; encoding: [0x7e,0x05,0x80,0xbe]
-
-0x66,0x05,0x80,0xbe
-# GFX12: s_brev_b64 s[0:1], s[102:103]           ; encoding: [0x66,0x05,0x80,0xbe]
-
-0x02,0x05,0x80,0xbe
-# GFX12: s_brev_b64 s[0:1], s[2:3]               ; encoding: [0x02,0x05,0x80,0xbe]
-
-0x6a,0x05,0x80,0xbe
-# GFX12: s_brev_b64 s[0:1], vcc                  ; encoding: [0x6a,0x05,0x80,0xbe]
-
-0x66,0x05,0xe8,0xbe
-# GFX12: s_brev_b64 s[104:105], s[102:103]       ; encoding: [0x66,0x05,0xe8,0xbe]
-
-0x02,0x05,0xe8,0xbe
-# GFX12: s_brev_b64 s[104:105], s[2:3]           ; encoding: [0x02,0x05,0xe8,0xbe]
-
-0x02,0x05,0xea,0xbe
-# GFX12: s_brev_b64 vcc, s[2:3]                  ; encoding: [0x02,0x05,0xea,0xbe]
-
-0x01,0x0c,0xff,0xbe
-# GFX12: s_cls_i32 exec_hi, s1                   ; encoding: [0x01,0x0c,0xff,0xbe]
-
-0x01,0x0c,0xfe,0xbe
-# GFX12: s_cls_i32 exec_lo, s1                   ; encoding: [0x01,0x0c,0xfe,0xbe]
-
-0x02,0x0d,0xff,0xbe
-# GFX12: s_cls_i32_i64 exec_hi, s[2:3]           ; encoding: [0x02,0x0d,0xff,0xbe]
-
-0x02,0x0d,0xfe,0xbe
-# GFX12: s_cls_i32_i64 exec_lo, s[2:3]           ; encoding: [0x02,0x0d,0xfe,0xbe]
-
-0x02,0x0d,0xfd,0xbe
-# GFX12: s_cls_i32_i64 m0, s[2:3]                ; encoding: [0x02,0x0d,0xfd,0xbe]
-
-0xf0,0x0d,0x80,0xbe
-# GFX12: s_cls_i32_i64 s0, 0.5                   ; encoding: [0xf0,0x0d,0x80,0xbe]
-
-0x80,0x0d,0x80,0xbe
-# GFX12: s_cls_i32_i64 s0, 0                     ; encoding: [0x80,0x0d,0x80,0xbe]
-
-0xff,0x0d,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_cls_i32_i64 s0, 0x3f717273            ; encoding: [0xff,0x0d,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x0d,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_cls_i32_i64 s0, 0xaf123456            ; encoding: [0xff,0x0d,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_cls_i32_i64 s0, 0xaf123456            ; encoding: [0xfe,0x0d,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x0d,0x80,0xbe
-# GFX12: s_cls_i32_i64 s0, -1                    ; encoding: [0xc1,0x0d,0x80,0xbe]
-
-0xf7,0x0d,0x80,0xbe
-# GFX12: s_cls_i32_i64 s0, -4.0                  ; encoding: [0xf7,0x0d,0x80,0xbe]
-
-0x7e,0x0d,0x80,0xbe
-# GFX12: s_cls_i32_i64 s0, exec                  ; encoding: [0x7e,0x0d,0x80,0xbe]
-
-0x66,0x0d,0x80,0xbe
-# GFX12: s_cls_i32_i64 s0, s[102:103]            ; encoding: [0x66,0x0d,0x80,0xbe]
-
-0x02,0x0d,0x80,0xbe
-# GFX12: s_cls_i32_i64 s0, s[2:3]                ; encoding: [0x02,0x0d,0x80,0xbe]
-
-0x6a,0x0d,0x80,0xbe
-# GFX12: s_cls_i32_i64 s0, vcc                   ; encoding: [0x6a,0x0d,0x80,0xbe]
-
-0x66,0x0d,0xe9,0xbe
-# GFX12: s_cls_i32_i64 s105, s[102:103]          ; encoding: [0x66,0x0d,0xe9,0xbe]
-
-0x02,0x0d,0xe9,0xbe
-# GFX12: s_cls_i32_i64 s105, s[2:3]              ; encoding: [0x02,0x0d,0xe9,0xbe]
-
-0x02,0x0d,0xeb,0xbe
-# GFX12: s_cls_i32_i64 vcc_hi, s[2:3]            ; encoding: [0x02,0x0d,0xeb,0xbe]
-
-0x02,0x0d,0xea,0xbe
-# GFX12: s_cls_i32_i64 vcc_lo, s[2:3]            ; encoding: [0x02,0x0d,0xea,0xbe]
-
-0x01,0x0c,0xfd,0xbe
-# GFX12: s_cls_i32 m0, s1                        ; encoding: [0x01,0x0c,0xfd,0xbe]
-
-0xf0,0x0c,0x80,0xbe
-# GFX12: s_cls_i32 s0, 0.5                       ; encoding: [0xf0,0x0c,0x80,0xbe]
-
-0x80,0x0c,0x80,0xbe
-# GFX12: s_cls_i32 s0, 0                         ; encoding: [0x80,0x0c,0x80,0xbe]
-
-0xff,0x0c,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_cls_i32 s0, 0x3f717273                ; encoding: [0xff,0x0c,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x0c,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_cls_i32 s0, 0xaf123456                ; encoding: [0xff,0x0c,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x0c,0x80,0xbe
-# GFX12: s_cls_i32 s0, -1                        ; encoding: [0xc1,0x0c,0x80,0xbe]
-
-0xf7,0x0c,0x80,0xbe
-# GFX12: s_cls_i32 s0, -4.0                      ; encoding: [0xf7,0x0c,0x80,0xbe]
-
-0x7f,0x0c,0x80,0xbe
-# GFX12: s_cls_i32 s0, exec_hi                   ; encoding: [0x7f,0x0c,0x80,0xbe]
-
-0x7e,0x0c,0x80,0xbe
-# GFX12: s_cls_i32 s0, exec_lo                   ; encoding: [0x7e,0x0c,0x80,0xbe]
-
-0x7d,0x0c,0x80,0xbe
-# GFX12: s_cls_i32 s0, m0                        ; encoding: [0x7d,0x0c,0x80,0xbe]
-
-0x68,0x0c,0x80,0xbe
-# GFX12: s_cls_i32 s0, s104                      ; encoding: [0x68,0x0c,0x80,0xbe]
-
-0x01,0x0c,0x80,0xbe
-# GFX12: s_cls_i32 s0, s1                        ; encoding: [0x01,0x0c,0x80,0xbe]
-
-0x6b,0x0c,0x80,0xbe
-# GFX12: s_cls_i32 s0, vcc_hi                    ; encoding: [0x6b,0x0c,0x80,0xbe]
-
-0x6a,0x0c,0x80,0xbe
-# GFX12: s_cls_i32 s0, vcc_lo                    ; encoding: [0x6a,0x0c,0x80,0xbe]
-
-0x68,0x0c,0xe9,0xbe
-# GFX12: s_cls_i32 s105, s104                    ; encoding: [0x68,0x0c,0xe9,0xbe]
-
-0x01,0x0c,0xe9,0xbe
-# GFX12: s_cls_i32 s105, s1                      ; encoding: [0x01,0x0c,0xe9,0xbe]
-
-0x01,0x0c,0xeb,0xbe
-# GFX12: s_cls_i32 vcc_hi, s1                    ; encoding: [0x01,0x0c,0xeb,0xbe]
-
-0x01,0x0c,0xea,0xbe
-# GFX12: s_cls_i32 vcc_lo, s1                    ; encoding: [0x01,0x0c,0xea,0xbe]
-
-0x01,0x0a,0xff,0xbe
-# GFX12: s_clz_i32_u32 exec_hi, s1               ; encoding: [0x01,0x0a,0xff,0xbe]
-
-0x01,0x0a,0xfe,0xbe
-# GFX12: s_clz_i32_u32 exec_lo, s1               ; encoding: [0x01,0x0a,0xfe,0xbe]
-
-0x01,0x0a,0xfd,0xbe
-# GFX12: s_clz_i32_u32 m0, s1                    ; encoding: [0x01,0x0a,0xfd,0xbe]
-
-0xf0,0x0a,0x80,0xbe
-# GFX12: s_clz_i32_u32 s0, 0.5                   ; encoding: [0xf0,0x0a,0x80,0xbe]
-
-0x80,0x0a,0x80,0xbe
-# GFX12: s_clz_i32_u32 s0, 0                     ; encoding: [0x80,0x0a,0x80,0xbe]
-
-0xff,0x0a,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_clz_i32_u32 s0, 0x3f717273            ; encoding: [0xff,0x0a,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x0a,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_clz_i32_u32 s0, 0xaf123456            ; encoding: [0xff,0x0a,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x0a,0x80,0xbe
-# GFX12: s_clz_i32_u32 s0, -1                    ; encoding: [0xc1,0x0a,0x80,0xbe]
-
-0xf7,0x0a,0x80,0xbe
-# GFX12: s_clz_i32_u32 s0, -4.0                  ; encoding: [0xf7,0x0a,0x80,0xbe]
-
-0x7f,0x0a,0x80,0xbe
-# GFX12: s_clz_i32_u32 s0, exec_hi               ; encoding: [0x7f,0x0a,0x80,0xbe]
-
-0x7e,0x0a,0x80,0xbe
-# GFX12: s_clz_i32_u32 s0, exec_lo               ; encoding: [0x7e,0x0a,0x80,0xbe]
-
-0x7d,0x0a,0x80,0xbe
-# GFX12: s_clz_i32_u32 s0, m0                    ; encoding: [0x7d,0x0a,0x80,0xbe]
-
-0x68,0x0a,0x80,0xbe
-# GFX12: s_clz_i32_u32 s0, s104                  ; encoding: [0x68,0x0a,0x80,0xbe]
-
-0x01,0x0a,0x80,0xbe
-# GFX12: s_clz_i32_u32 s0, s1                    ; encoding: [0x01,0x0a,0x80,0xbe]
-
-0x6b,0x0a,0x80,0xbe
-# GFX12: s_clz_i32_u32 s0, vcc_hi                ; encoding: [0x6b,0x0a,0x80,0xbe]
-
-0x6a,0x0a,0x80,0xbe
-# GFX12: s_clz_i32_u32 s0, vcc_lo                ; encoding: [0x6a,0x0a,0x80,0xbe]
-
-0x68,0x0a,0xe9,0xbe
-# GFX12: s_clz_i32_u32 s105, s104                ; encoding: [0x68,0x0a,0xe9,0xbe]
-
-0x01,0x0a,0xe9,0xbe
-# GFX12: s_clz_i32_u32 s105, s1                  ; encoding: [0x01,0x0a,0xe9,0xbe]
-
-0x01,0x0a,0xeb,0xbe
-# GFX12: s_clz_i32_u32 vcc_hi, s1                ; encoding: [0x01,0x0a,0xeb,0xbe]
-
-0x01,0x0a,0xea,0xbe
-# GFX12: s_clz_i32_u32 vcc_lo, s1                ; encoding: [0x01,0x0a,0xea,0xbe]
-
-0x02,0x0b,0xff,0xbe
-# GFX12: s_clz_i32_u64 exec_hi, s[2:3]           ; encoding: [0x02,0x0b,0xff,0xbe]
-
-0x02,0x0b,0xfe,0xbe
-# GFX12: s_clz_i32_u64 exec_lo, s[2:3]           ; encoding: [0x02,0x0b,0xfe,0xbe]
-
-0x02,0x0b,0xfd,0xbe
-# GFX12: s_clz_i32_u64 m0, s[2:3]                ; encoding: [0x02,0x0b,0xfd,0xbe]
-
-0xf0,0x0b,0x80,0xbe
-# GFX12: s_clz_i32_u64 s0, 0.5                   ; encoding: [0xf0,0x0b,0x80,0xbe]
-
-0x80,0x0b,0x80,0xbe
-# GFX12: s_clz_i32_u64 s0, 0                     ; encoding: [0x80,0x0b,0x80,0xbe]
-
-0xff,0x0b,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_clz_i32_u64 s0, 0x3f717273            ; encoding: [0xff,0x0b,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x0b,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_clz_i32_u64 s0, 0xaf123456            ; encoding: [0xff,0x0b,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_clz_i32_u64 s0, 0xaf123456            ; encoding: [0xfe,0x0b,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x0b,0x80,0xbe
-# GFX12: s_clz_i32_u64 s0, -1                    ; encoding: [0xc1,0x0b,0x80,0xbe]
-
-0xf7,0x0b,0x80,0xbe
-# GFX12: s_clz_i32_u64 s0, -4.0                  ; encoding: [0xf7,0x0b,0x80,0xbe]
-
-0x7e,0x0b,0x80,0xbe
-# GFX12: s_clz_i32_u64 s0, exec                  ; encoding: [0x7e,0x0b,0x80,0xbe]
-
-0x66,0x0b,0x80,0xbe
-# GFX12: s_clz_i32_u64 s0, s[102:103]            ; encoding: [0x66,0x0b,0x80,0xbe]
-
-0x02,0x0b,0x80,0xbe
-# GFX12: s_clz_i32_u64 s0, s[2:3]                ; encoding: [0x02,0x0b,0x80,0xbe]
-
-0x6a,0x0b,0x80,0xbe
-# GFX12: s_clz_i32_u64 s0, vcc                   ; encoding: [0x6a,0x0b,0x80,0xbe]
-
-0x66,0x0b,0xe9,0xbe
-# GFX12: s_clz_i32_u64 s105, s[102:103]          ; encoding: [0x66,0x0b,0xe9,0xbe]
-
-0x02,0x0b,0xe9,0xbe
-# GFX12: s_clz_i32_u64 s105, s[2:3]              ; encoding: [0x02,0x0b,0xe9,0xbe]
-
-0x02,0x0b,0xeb,0xbe
-# GFX12: s_clz_i32_u64 vcc_hi, s[2:3]            ; encoding: [0x02,0x0b,0xeb,0xbe]
-
-0x02,0x0b,0xea,0xbe
-# GFX12: s_clz_i32_u64 vcc_lo, s[2:3]            ; encoding: [0x02,0x0b,0xea,0xbe]
-
-0x01,0x02,0xff,0xbe
-# GFX12: s_cmov_b32 exec_hi, s1                  ; encoding: [0x01,0x02,0xff,0xbe]
-
-0x01,0x02,0xfe,0xbe
-# GFX12: s_cmov_b32 exec_lo, s1                  ; encoding: [0x01,0x02,0xfe,0xbe]
-
-0x01,0x02,0xfd,0xbe
-# GFX12: s_cmov_b32 m0, s1                       ; encoding: [0x01,0x02,0xfd,0xbe]
-
-0xf0,0x02,0x80,0xbe
-# GFX12: s_cmov_b32 s0, 0.5                      ; encoding: [0xf0,0x02,0x80,0xbe]
-
-0x80,0x02,0x80,0xbe
-# GFX12: s_cmov_b32 s0, 0                        ; encoding: [0x80,0x02,0x80,0xbe]
-
-0xff,0x02,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_cmov_b32 s0, 0x3f717273               ; encoding: [0xff,0x02,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x02,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_cmov_b32 s0, 0xaf123456               ; encoding: [0xff,0x02,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x02,0x80,0xbe
-# GFX12: s_cmov_b32 s0, -1                       ; encoding: [0xc1,0x02,0x80,0xbe]
-
-0xf7,0x02,0x80,0xbe
-# GFX12: s_cmov_b32 s0, -4.0                     ; encoding: [0xf7,0x02,0x80,0xbe]
-
-0x7f,0x02,0x80,0xbe
-# GFX12: s_cmov_b32 s0, exec_hi                  ; encoding: [0x7f,0x02,0x80,0xbe]
-
-0x7e,0x02,0x80,0xbe
-# GFX12: s_cmov_b32 s0, exec_lo                  ; encoding: [0x7e,0x02,0x80,0xbe]
-
-0x7d,0x02,0x80,0xbe
-# GFX12: s_cmov_b32 s0, m0                       ; encoding: [0x7d,0x02,0x80,0xbe]
-
-0x68,0x02,0x80,0xbe
-# GFX12: s_cmov_b32 s0, s104                     ; encoding: [0x68,0x02,0x80,0xbe]
-
-0x01,0x02,0x80,0xbe
-# GFX12: s_cmov_b32 s0, s1                       ; encoding: [0x01,0x02,0x80,0xbe]
-
-0x6b,0x02,0x80,0xbe
-# GFX12: s_cmov_b32 s0, vcc_hi                   ; encoding: [0x6b,0x02,0x80,0xbe]
-
-0x6a,0x02,0x80,0xbe
-# GFX12: s_cmov_b32 s0, vcc_lo                   ; encoding: [0x6a,0x02,0x80,0xbe]
-
-0x68,0x02,0xe9,0xbe
-# GFX12: s_cmov_b32 s105, s104                   ; encoding: [0x68,0x02,0xe9,0xbe]
-
-0x01,0x02,0xe9,0xbe
-# GFX12: s_cmov_b32 s105, s1                     ; encoding: [0x01,0x02,0xe9,0xbe]
-
-0x01,0x02,0xeb,0xbe
-# GFX12: s_cmov_b32 vcc_hi, s1                   ; encoding: [0x01,0x02,0xeb,0xbe]
-
-0x01,0x02,0xea,0xbe
-# GFX12: s_cmov_b32 vcc_lo, s1                   ; encoding: [0x01,0x02,0xea,0xbe]
-
-0x02,0x03,0xfe,0xbe
-# GFX12: s_cmov_b64 exec, s[2:3]                 ; encoding: [0x02,0x03,0xfe,0xbe]
-
-0xf0,0x03,0x80,0xbe
-# GFX12: s_cmov_b64 s[0:1], 0.5                  ; encoding: [0xf0,0x03,0x80,0xbe]
-
-0x80,0x03,0x80,0xbe
-# GFX12: s_cmov_b64 s[0:1], 0                    ; encoding: [0x80,0x03,0x80,0xbe]
-
-0xff,0x03,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_cmov_b64 s[0:1], 0x3f717273           ; encoding: [0xff,0x03,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x03,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_cmov_b64 s[0:1], 0xaf123456           ; encoding: [0xff,0x03,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_cmov_b64 s[0:1], 0xaf123456           ; encoding: [0xfe,0x03,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x03,0x80,0xbe
-# GFX12: s_cmov_b64 s[0:1], -1                   ; encoding: [0xc1,0x03,0x80,0xbe]
-
-0xf7,0x03,0x80,0xbe
-# GFX12: s_cmov_b64 s[0:1], -4.0                 ; encoding: [0xf7,0x03,0x80,0xbe]
-
-0x7e,0x03,0x80,0xbe
-# GFX12: s_cmov_b64 s[0:1], exec                 ; encoding: [0x7e,0x03,0x80,0xbe]
-
-0x66,0x03,0x80,0xbe
-# GFX12: s_cmov_b64 s[0:1], s[102:103]           ; encoding: [0x66,0x03,0x80,0xbe]
-
-0x02,0x03,0x80,0xbe
-# GFX12: s_cmov_b64 s[0:1], s[2:3]               ; encoding: [0x02,0x03,0x80,0xbe]
-
-0x6a,0x03,0x80,0xbe
-# GFX12: s_cmov_b64 s[0:1], vcc                  ; encoding: [0x6a,0x03,0x80,0xbe]
-
-0x66,0x03,0xe8,0xbe
-# GFX12: s_cmov_b64 s[104:105], s[102:103]       ; encoding: [0x66,0x03,0xe8,0xbe]
-
-0x02,0x03,0xe8,0xbe
-# GFX12: s_cmov_b64 s[104:105], s[2:3]           ; encoding: [0x02,0x03,0xe8,0xbe]
-
-0x02,0x03,0xea,0xbe
-# GFX12: s_cmov_b64 vcc, s[2:3]                  ; encoding: [0x02,0x03,0xea,0xbe]
-
-0x01,0x08,0xff,0xbe
-# GFX12: s_ctz_i32_b32 exec_hi, s1               ; encoding: [0x01,0x08,0xff,0xbe]
-
-0x01,0x08,0xfe,0xbe
-# GFX12: s_ctz_i32_b32 exec_lo, s1               ; encoding: [0x01,0x08,0xfe,0xbe]
-
-0x01,0x08,0xfd,0xbe
-# GFX12: s_ctz_i32_b32 m0, s1                    ; encoding: [0x01,0x08,0xfd,0xbe]
-
-0xf0,0x08,0x80,0xbe
-# GFX12: s_ctz_i32_b32 s0, 0.5                   ; encoding: [0xf0,0x08,0x80,0xbe]
-
-0x80,0x08,0x80,0xbe
-# GFX12: s_ctz_i32_b32 s0, 0                     ; encoding: [0x80,0x08,0x80,0xbe]
-
-0xff,0x08,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_ctz_i32_b32 s0, 0x3f717273            ; encoding: [0xff,0x08,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x08,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_ctz_i32_b32 s0, 0xaf123456            ; encoding: [0xff,0x08,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x08,0x80,0xbe
-# GFX12: s_ctz_i32_b32 s0, -1                    ; encoding: [0xc1,0x08,0x80,0xbe]
-
-0xf7,0x08,0x80,0xbe
-# GFX12: s_ctz_i32_b32 s0, -4.0                  ; encoding: [0xf7,0x08,0x80,0xbe]
-
-0x7f,0x08,0x80,0xbe
-# GFX12: s_ctz_i32_b32 s0, exec_hi               ; encoding: [0x7f,0x08,0x80,0xbe]
-
-0x7e,0x08,0x80,0xbe
-# GFX12: s_ctz_i32_b32 s0, exec_lo               ; encoding: [0x7e,0x08,0x80,0xbe]
-
-0x7d,0x08,0x80,0xbe
-# GFX12: s_ctz_i32_b32 s0, m0                    ; encoding: [0x7d,0x08,0x80,0xbe]
-
-0x68,0x08,0x80,0xbe
-# GFX12: s_ctz_i32_b32 s0, s104                  ; encoding: [0x68,0x08,0x80,0xbe]
-
-0x01,0x08,0x80,0xbe
-# GFX12: s_ctz_i32_b32 s0, s1                    ; encoding: [0x01,0x08,0x80,0xbe]
-
-0x6b,0x08,0x80,0xbe
-# GFX12: s_ctz_i32_b32 s0, vcc_hi                ; encoding: [0x6b,0x08,0x80,0xbe]
-
-0x6a,0x08,0x80,0xbe
-# GFX12: s_ctz_i32_b32 s0, vcc_lo                ; encoding: [0x6a,0x08,0x80,0xbe]
-
-0x68,0x08,0xe9,0xbe
-# GFX12: s_ctz_i32_b32 s105, s104                ; encoding: [0x68,0x08,0xe9,0xbe]
-
-0x01,0x08,0xe9,0xbe
-# GFX12: s_ctz_i32_b32 s105, s1                  ; encoding: [0x01,0x08,0xe9,0xbe]
-
-0x01,0x08,0xeb,0xbe
-# GFX12: s_ctz_i32_b32 vcc_hi, s1                ; encoding: [0x01,0x08,0xeb,0xbe]
-
-0x01,0x08,0xea,0xbe
-# GFX12: s_ctz_i32_b32 vcc_lo, s1                ; encoding: [0x01,0x08,0xea,0xbe]
-
-0x02,0x09,0xff,0xbe
-# GFX12: s_ctz_i32_b64 exec_hi, s[2:3]           ; encoding: [0x02,0x09,0xff,0xbe]
-
-0x02,0x09,0xfe,0xbe
-# GFX12: s_ctz_i32_b64 exec_lo, s[2:3]           ; encoding: [0x02,0x09,0xfe,0xbe]
-
-0x02,0x09,0xfd,0xbe
-# GFX12: s_ctz_i32_b64 m0, s[2:3]                ; encoding: [0x02,0x09,0xfd,0xbe]
-
-0xf0,0x09,0x80,0xbe
-# GFX12: s_ctz_i32_b64 s0, 0.5                   ; encoding: [0xf0,0x09,0x80,0xbe]
-
-0x80,0x09,0x80,0xbe
-# GFX12: s_ctz_i32_b64 s0, 0                     ; encoding: [0x80,0x09,0x80,0xbe]
-
-0xff,0x09,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_ctz_i32_b64 s0, 0x3f717273            ; encoding: [0xff,0x09,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x09,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_ctz_i32_b64 s0, 0xaf123456            ; encoding: [0xff,0x09,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_ctz_i32_b64 s0, 0xaf123456            ; encoding: [0xfe,0x09,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x09,0x80,0xbe
-# GFX12: s_ctz_i32_b64 s0, -1                    ; encoding: [0xc1,0x09,0x80,0xbe]
-
-0xf7,0x09,0x80,0xbe
-# GFX12: s_ctz_i32_b64 s0, -4.0                  ; encoding: [0xf7,0x09,0x80,0xbe]
-
-0x7e,0x09,0x80,0xbe
-# GFX12: s_ctz_i32_b64 s0, exec                  ; encoding: [0x7e,0x09,0x80,0xbe]
-
-0x66,0x09,0x80,0xbe
-# GFX12: s_ctz_i32_b64 s0, s[102:103]            ; encoding: [0x66,0x09,0x80,0xbe]
-
-0x02,0x09,0x80,0xbe
-# GFX12: s_ctz_i32_b64 s0, s[2:3]                ; encoding: [0x02,0x09,0x80,0xbe]
-
-0x6a,0x09,0x80,0xbe
-# GFX12: s_ctz_i32_b64 s0, vcc                   ; encoding: [0x6a,0x09,0x80,0xbe]
-
-0x66,0x09,0xe9,0xbe
-# GFX12: s_ctz_i32_b64 s105, s[102:103]          ; encoding: [0x66,0x09,0xe9,0xbe]
-
-0x02,0x09,0xe9,0xbe
-# GFX12: s_ctz_i32_b64 s105, s[2:3]              ; encoding: [0x02,0x09,0xe9,0xbe]
-
-0x02,0x09,0xeb,0xbe
-# GFX12: s_ctz_i32_b64 vcc_hi, s[2:3]            ; encoding: [0x02,0x09,0xeb,0xbe]
-
-0x02,0x09,0xea,0xbe
-# GFX12: s_ctz_i32_b64 vcc_lo, s[2:3]            ; encoding: [0x02,0x09,0xea,0xbe]
-
-0x00,0x47,0xfe,0xbe
-# GFX1200: s_getpc_b64 exec                        ; encoding: [0x00,0x47,0xfe,0xbe]
-# GFX1250: s_get_pc_i64 exec                       ; encoding: [0x00,0x47,0xfe,0xbe]
-
-0x00,0x47,0x80,0xbe
-# GFX1200: s_getpc_b64 s[0:1]                      ; encoding: [0x00,0x47,0x80,0xbe]
-# GFX1250: s_get_pc_i64 s[0:1]                     ; encoding: [0x00,0x47,0x80,0xbe]
-
-0x00,0x47,0xe8,0xbe
-# GFX1200: s_getpc_b64 s[104:105]                  ; encoding: [0x00,0x47,0xe8,0xbe]
-# GFX1250: s_get_pc_i64 s[104:105]                 ; encoding: [0x00,0x47,0xe8,0xbe]
-
-0x00,0x47,0xea,0xbe
-# GFX1200: s_getpc_b64 vcc                         ; encoding: [0x00,0x47,0xea,0xbe]
-# GFX1250: s_get_pc_i64 vcc                        ; encoding: [0x00,0x47,0xea,0xbe]
-
-0x01,0x00,0xff,0xbe
-# GFX12: s_mov_b32 exec_hi, s1                   ; encoding: [0x01,0x00,0xff,0xbe]
-
-0x01,0x00,0xfe,0xbe
-# GFX12: s_mov_b32 exec_lo, s1                   ; encoding: [0x01,0x00,0xfe,0xbe]
-
-0x01,0x00,0xfd,0xbe
-# GFX12: s_mov_b32 m0, s1                        ; encoding: [0x01,0x00,0xfd,0xbe]
-
-0xf0,0x00,0x80,0xbe
-# GFX12: s_mov_b32 s0, 0.5                       ; encoding: [0xf0,0x00,0x80,0xbe]
-
-0x80,0x00,0x80,0xbe
-# GFX12: s_mov_b32 s0, 0                         ; encoding: [0x80,0x00,0x80,0xbe]
-
-0xff,0x00,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_mov_b32 s0, 0x3f717273                ; encoding: [0xff,0x00,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x00,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_mov_b32 s0, 0xaf123456                ; encoding: [0xff,0x00,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x00,0x80,0xbe
-# GFX12: s_mov_b32 s0, -1                        ; encoding: [0xc1,0x00,0x80,0xbe]
-
-0xf7,0x00,0x80,0xbe
-# GFX12: s_mov_b32 s0, -4.0                      ; encoding: [0xf7,0x00,0x80,0xbe]
-
-0x7f,0x00,0x80,0xbe
-# GFX12: s_mov_b32 s0, exec_hi                   ; encoding: [0x7f,0x00,0x80,0xbe]
-
-0x7e,0x00,0x80,0xbe
-# GFX12: s_mov_b32 s0, exec_lo                   ; encoding: [0x7e,0x00,0x80,0xbe]
-
-0x7d,0x00,0x80,0xbe
-# GFX12: s_mov_b32 s0, m0                        ; encoding: [0x7d,0x00,0x80,0xbe]
-
-0x68,0x00,0x80,0xbe
-# GFX12: s_mov_b32 s0, s104                      ; encoding: [0x68,0x00,0x80,0xbe]
-
-0x01,0x00,0x80,0xbe
-# GFX12: s_mov_b32 s0, s1                        ; encoding: [0x01,0x00,0x80,0xbe]
-
-0x6b,0x00,0x80,0xbe
-# GFX12: s_mov_b32 s0, vcc_hi                    ; encoding: [0x6b,0x00,0x80,0xbe]
-
-0x6a,0x00,0x80,0xbe
-# GFX12: s_mov_b32 s0, vcc_lo                    ; encoding: [0x6a,0x00,0x80,0xbe]
-
-0x68,0x00,0xe9,0xbe
-# GFX12: s_mov_b32 s105, s104                    ; encoding: [0x68,0x00,0xe9,0xbe]
-
-0x01,0x00,0xe9,0xbe
-# GFX12: s_mov_b32 s105, s1                      ; encoding: [0x01,0x00,0xe9,0xbe]
-
-0x01,0x00,0xeb,0xbe
-# GFX12: s_mov_b32 vcc_hi, s1                    ; encoding: [0x01,0x00,0xeb,0xbe]
-
-0x01,0x00,0xea,0xbe
-# GFX12: s_mov_b32 vcc_lo, s1                    ; encoding: [0x01,0x00,0xea,0xbe]
-
-0x7c,0x00,0x80,0xbe
-# GFX12: s_mov_b32 s0, null                      ; encoding: [0x7c,0x00,0x80,0xbe]
-
-0x01,0x00,0xfc,0xbe
-# GFX12: s_mov_b32 null, s1                      ; encoding: [0x01,0x00,0xfc,0xbe]
-
-0x02,0x01,0xfe,0xbe
-# GFX12: s_mov_b64 exec, s[2:3]                  ; encoding: [0x02,0x01,0xfe,0xbe]
-
-0xf0,0x01,0x80,0xbe
-# GFX12: s_mov_b64 s[0:1], 0.5                   ; encoding: [0xf0,0x01,0x80,0xbe]
-
-0x80,0x01,0x80,0xbe
-# GFX12: s_mov_b64 s[0:1], 0                     ; encoding: [0x80,0x01,0x80,0xbe]
-
-0xff,0x01,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_mov_b64 s[0:1], 0x3f717273            ; encoding: [0xff,0x01,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x01,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_mov_b64 s[0:1], 0xaf123456            ; encoding: [0xff,0x01,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_mov_b64 s[0:1], 0xaf123456            ; encoding: [0xfe,0x01,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x01,0x80,0xbe
-# GFX12: s_mov_b64 s[0:1], -1                    ; encoding: [0xc1,0x01,0x80,0xbe]
-
-0xf7,0x01,0x80,0xbe
-# GFX12: s_mov_b64 s[0:1], -4.0                  ; encoding: [0xf7,0x01,0x80,0xbe]
-
-0x7e,0x01,0x80,0xbe
-# GFX12: s_mov_b64 s[0:1], exec                  ; encoding: [0x7e,0x01,0x80,0xbe]
-
-0x66,0x01,0x80,0xbe
-# GFX12: s_mov_b64 s[0:1], s[102:103]            ; encoding: [0x66,0x01,0x80,0xbe]
-
-0x02,0x01,0x80,0xbe
-# GFX12: s_mov_b64 s[0:1], s[2:3]                ; encoding: [0x02,0x01,0x80,0xbe]
-
-0x6a,0x01,0x80,0xbe
-# GFX12: s_mov_b64 s[0:1], vcc                   ; encoding: [0x6a,0x01,0x80,0xbe]
-
-0x66,0x01,0xe8,0xbe
-# GFX12: s_mov_b64 s[104:105], s[102:103]        ; encoding: [0x66,0x01,0xe8,0xbe]
-
-0x02,0x01,0xe8,0xbe
-# GFX12: s_mov_b64 s[104:105], s[2:3]            ; encoding: [0x02,0x01,0xe8,0xbe]
-
-0x02,0x01,0xea,0xbe
-# GFX12: s_mov_b64 vcc, s[2:3]                   ; encoding: [0x02,0x01,0xea,0xbe]
-
-0x7c,0x01,0x80,0xbe
-# GFX12: s_mov_b64 s[0:1], null                  ; encoding: [0x7c,0x01,0x80,0xbe]
-
-0x02,0x01,0xfc,0xbe
-# GFX12: s_mov_b64 null, s[2:3]                  ; encoding: [0x02,0x01,0xfc,0xbe]
-
-0xf0,0x42,0x80,0xbe
-# GFX12: s_movreld_b32 s0, 0.5                   ; encoding: [0xf0,0x42,0x80,0xbe]
-
-0x80,0x42,0x80,0xbe
-# GFX12: s_movreld_b32 s0, 0                     ; encoding: [0x80,0x42,0x80,0xbe]
-
-0xff,0x42,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_movreld_b32 s0, 0x3f717273            ; encoding: [0xff,0x42,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x42,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_movreld_b32 s0, 0xaf123456            ; encoding: [0xff,0x42,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x42,0x80,0xbe
-# GFX12: s_movreld_b32 s0, -1                    ; encoding: [0xc1,0x42,0x80,0xbe]
-
-0xf7,0x42,0x80,0xbe
-# GFX12: s_movreld_b32 s0, -4.0                  ; encoding: [0xf7,0x42,0x80,0xbe]
-
-0x7f,0x42,0x80,0xbe
-# GFX12: s_movreld_b32 s0, exec_hi               ; encoding: [0x7f,0x42,0x80,0xbe]
-
-0x7e,0x42,0x80,0xbe
-# GFX12: s_movreld_b32 s0, exec_lo               ; encoding: [0x7e,0x42,0x80,0xbe]
-
-0x7d,0x42,0x80,0xbe
-# GFX12: s_movreld_b32 s0, m0                    ; encoding: [0x7d,0x42,0x80,0xbe]
-
-0x68,0x42,0x80,0xbe
-# GFX12: s_movreld_b32 s0, s104                  ; encoding: [0x68,0x42,0x80,0xbe]
-
-0x01,0x42,0x80,0xbe
-# GFX12: s_movreld_b32 s0, s1                    ; encoding: [0x01,0x42,0x80,0xbe]
-
-0x6b,0x42,0x80,0xbe
-# GFX12: s_movreld_b32 s0, vcc_hi                ; encoding: [0x6b,0x42,0x80,0xbe]
-
-0x6a,0x42,0x80,0xbe
-# GFX12: s_movreld_b32 s0, vcc_lo                ; encoding: [0x6a,0x42,0x80,0xbe]
-
-0x68,0x42,0xe9,0xbe
-# GFX12: s_movreld_b32 s105, s104                ; encoding: [0x68,0x42,0xe9,0xbe]
-
-0x01,0x42,0xe9,0xbe
-# GFX12: s_movreld_b32 s105, s1                  ; encoding: [0x01,0x42,0xe9,0xbe]
-
-0x01,0x42,0xeb,0xbe
-# GFX12: s_movreld_b32 vcc_hi, s1                ; encoding: [0x01,0x42,0xeb,0xbe]
-
-0x01,0x42,0xea,0xbe
-# GFX12: s_movreld_b32 vcc_lo, s1                ; encoding: [0x01,0x42,0xea,0xbe]
-
-0xf0,0x43,0x80,0xbe
-# GFX12: s_movreld_b64 s[0:1], 0.5               ; encoding: [0xf0,0x43,0x80,0xbe]
-
-0x80,0x43,0x80,0xbe
-# GFX12: s_movreld_b64 s[0:1], 0                 ; encoding: [0x80,0x43,0x80,0xbe]
-
-0xff,0x43,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_movreld_b64 s[0:1], 0x3f717273        ; encoding: [0xff,0x43,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x43,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_movreld_b64 s[0:1], 0xaf123456        ; encoding: [0xff,0x43,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_movreld_b64 s[0:1], 0xaf123456        ; encoding: [0xfe,0x43,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x43,0x80,0xbe
-# GFX12: s_movreld_b64 s[0:1], -1                ; encoding: [0xc1,0x43,0x80,0xbe]
-
-0xf7,0x43,0x80,0xbe
-# GFX12: s_movreld_b64 s[0:1], -4.0              ; encoding: [0xf7,0x43,0x80,0xbe]
-
-0x7e,0x43,0x80,0xbe
-# GFX12: s_movreld_b64 s[0:1], exec              ; encoding: [0x7e,0x43,0x80,0xbe]
-
-0x66,0x43,0x80,0xbe
-# GFX12: s_movreld_b64 s[0:1], s[102:103]        ; encoding: [0x66,0x43,0x80,0xbe]
-
-0x02,0x43,0x80,0xbe
-# GFX12: s_movreld_b64 s[0:1], s[2:3]            ; encoding: [0x02,0x43,0x80,0xbe]
-
-0x6a,0x43,0x80,0xbe
-# GFX12: s_movreld_b64 s[0:1], vcc               ; encoding: [0x6a,0x43,0x80,0xbe]
-
-0x66,0x43,0xe8,0xbe
-# GFX12: s_movreld_b64 s[104:105], s[102:103]    ; encoding: [0x66,0x43,0xe8,0xbe]
-
-0x02,0x43,0xe8,0xbe
-# GFX12: s_movreld_b64 s[104:105], s[2:3]        ; encoding: [0x02,0x43,0xe8,0xbe]
-
-0x02,0x43,0xea,0xbe
-# GFX12: s_movreld_b64 vcc, s[2:3]               ; encoding: [0x02,0x43,0xea,0xbe]
-
-0x01,0x40,0xff,0xbe
-# GFX12: s_movrels_b32 exec_hi, s1               ; encoding: [0x01,0x40,0xff,0xbe]
-
-0x01,0x40,0xfe,0xbe
-# GFX12: s_movrels_b32 exec_lo, s1               ; encoding: [0x01,0x40,0xfe,0xbe]
-
-0x01,0x40,0xfd,0xbe
-# GFX12: s_movrels_b32 m0, s1                    ; encoding: [0x01,0x40,0xfd,0xbe]
-
-0x68,0x40,0x80,0xbe
-# GFX12: s_movrels_b32 s0, s104                  ; encoding: [0x68,0x40,0x80,0xbe]
-
-0x01,0x40,0x80,0xbe
-# GFX12: s_movrels_b32 s0, s1                    ; encoding: [0x01,0x40,0x80,0xbe]
-
-0x6b,0x40,0x80,0xbe
-# GFX12: s_movrels_b32 s0, vcc_hi                ; encoding: [0x6b,0x40,0x80,0xbe]
-
-0x6a,0x40,0x80,0xbe
-# GFX12: s_movrels_b32 s0, vcc_lo                ; encoding: [0x6a,0x40,0x80,0xbe]
-
-0x68,0x40,0xe9,0xbe
-# GFX12: s_movrels_b32 s105, s104                ; encoding: [0x68,0x40,0xe9,0xbe]
-
-0x01,0x40,0xe9,0xbe
-# GFX12: s_movrels_b32 s105, s1                  ; encoding: [0x01,0x40,0xe9,0xbe]
-
-0x01,0x40,0xeb,0xbe
-# GFX12: s_movrels_b32 vcc_hi, s1                ; encoding: [0x01,0x40,0xeb,0xbe]
-
-0x01,0x40,0xea,0xbe
-# GFX12: s_movrels_b32 vcc_lo, s1                ; encoding: [0x01,0x40,0xea,0xbe]
-
-0x02,0x41,0xfe,0xbe
-# GFX12: s_movrels_b64 exec, s[2:3]              ; encoding: [0x02,0x41,0xfe,0xbe]
-
-0x66,0x41,0x80,0xbe
-# GFX12: s_movrels_b64 s[0:1], s[102:103]        ; encoding: [0x66,0x41,0x80,0xbe]
-
-0x02,0x41,0x80,0xbe
-# GFX12: s_movrels_b64 s[0:1], s[2:3]            ; encoding: [0x02,0x41,0x80,0xbe]
-
-0x6a,0x41,0x80,0xbe
-# GFX12: s_movrels_b64 s[0:1], vcc               ; encoding: [0x6a,0x41,0x80,0xbe]
-
-0x66,0x41,0xe8,0xbe
-# GFX12: s_movrels_b64 s[104:105], s[102:103]    ; encoding: [0x66,0x41,0xe8,0xbe]
-
-0x02,0x41,0xe8,0xbe
-# GFX12: s_movrels_b64 s[104:105], s[2:3]        ; encoding: [0x02,0x41,0xe8,0xbe]
-
-0x02,0x41,0xea,0xbe
-# GFX12: s_movrels_b64 vcc, s[2:3]               ; encoding: [0x02,0x41,0xea,0xbe]
-
-0x68,0x44,0x80,0xbe
-# GFX12: s_movrelsd_2_b32 s0, s104               ; encoding: [0x68,0x44,0x80,0xbe]
-
-0x01,0x44,0x80,0xbe
-# GFX12: s_movrelsd_2_b32 s0, s1                 ; encoding: [0x01,0x44,0x80,0xbe]
-
-0x6b,0x44,0x80,0xbe
-# GFX12: s_movrelsd_2_b32 s0, vcc_hi             ; encoding: [0x6b,0x44,0x80,0xbe]
-
-0x6a,0x44,0x80,0xbe
-# GFX12: s_movrelsd_2_b32 s0, vcc_lo             ; encoding: [0x6a,0x44,0x80,0xbe]
-
-0x68,0x44,0xe9,0xbe
-# GFX12: s_movrelsd_2_b32 s105, s104             ; encoding: [0x68,0x44,0xe9,0xbe]
-
-0x01,0x44,0xe9,0xbe
-# GFX12: s_movrelsd_2_b32 s105, s1               ; encoding: [0x01,0x44,0xe9,0xbe]
-
-0x01,0x44,0xeb,0xbe
-# GFX12: s_movrelsd_2_b32 vcc_hi, s1             ; encoding: [0x01,0x44,0xeb,0xbe]
-
-0x01,0x44,0xea,0xbe
-# GFX12: s_movrelsd_2_b32 vcc_lo, s1             ; encoding: [0x01,0x44,0xea,0xbe]
-
-0xf0,0x26,0x80,0xbe
-# GFX12: s_nand_saveexec_b32 s0, 0.5             ; encoding: [0xf0,0x26,0x80,0xbe]
-
-0x80,0x26,0x80,0xbe
-# GFX12: s_nand_saveexec_b32 s0, 0               ; encoding: [0x80,0x26,0x80,0xbe]
-
-0xff,0x26,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_nand_saveexec_b32 s0, 0x3f717273      ; encoding: [0xff,0x26,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x26,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_nand_saveexec_b32 s0, 0xaf123456      ; encoding: [0xff,0x26,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x26,0x80,0xbe
-# GFX12: s_nand_saveexec_b32 s0, -1              ; encoding: [0xc1,0x26,0x80,0xbe]
-
-0xf7,0x26,0x80,0xbe
-# GFX12: s_nand_saveexec_b32 s0, -4.0            ; encoding: [0xf7,0x26,0x80,0xbe]
-
-0x7f,0x26,0x80,0xbe
-# GFX12: s_nand_saveexec_b32 s0, exec_hi         ; encoding: [0x7f,0x26,0x80,0xbe]
-
-0x7e,0x26,0x80,0xbe
-# GFX12: s_nand_saveexec_b32 s0, exec_lo         ; encoding: [0x7e,0x26,0x80,0xbe]
-
-0x7d,0x26,0x80,0xbe
-# GFX12: s_nand_saveexec_b32 s0, m0              ; encoding: [0x7d,0x26,0x80,0xbe]
-
-0x68,0x26,0x80,0xbe
-# GFX12: s_nand_saveexec_b32 s0, s104            ; encoding: [0x68,0x26,0x80,0xbe]
-
-0x01,0x26,0x80,0xbe
-# GFX12: s_nand_saveexec_b32 s0, s1              ; encoding: [0x01,0x26,0x80,0xbe]
-
-0x6b,0x26,0x80,0xbe
-# GFX12: s_nand_saveexec_b32 s0, vcc_hi          ; encoding: [0x6b,0x26,0x80,0xbe]
-
-0x6a,0x26,0x80,0xbe
-# GFX12: s_nand_saveexec_b32 s0, vcc_lo          ; encoding: [0x6a,0x26,0x80,0xbe]
-
-0x68,0x26,0xe9,0xbe
-# GFX12: s_nand_saveexec_b32 s105, s104          ; encoding: [0x68,0x26,0xe9,0xbe]
-
-0x01,0x26,0xe9,0xbe
-# GFX12: s_nand_saveexec_b32 s105, s1            ; encoding: [0x01,0x26,0xe9,0xbe]
-
-0x01,0x26,0xeb,0xbe
-# GFX12: s_nand_saveexec_b32 vcc_hi, s1          ; encoding: [0x01,0x26,0xeb,0xbe]
-
-0x01,0x26,0xea,0xbe
-# GFX12: s_nand_saveexec_b32 vcc_lo, s1          ; encoding: [0x01,0x26,0xea,0xbe]
-
-0xf0,0x27,0x80,0xbe
-# GFX12: s_nand_saveexec_b64 s[0:1], 0.5         ; encoding: [0xf0,0x27,0x80,0xbe]
-
-0x80,0x27,0x80,0xbe
-# GFX12: s_nand_saveexec_b64 s[0:1], 0           ; encoding: [0x80,0x27,0x80,0xbe]
-
-0xff,0x27,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_nand_saveexec_b64 s[0:1], 0x3f717273  ; encoding: [0xff,0x27,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x27,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_nand_saveexec_b64 s[0:1], 0xaf123456  ; encoding: [0xff,0x27,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_nand_saveexec_b64 s[0:1], 0xaf123456  ; encoding: [0xfe,0x27,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x27,0x80,0xbe
-# GFX12: s_nand_saveexec_b64 s[0:1], -1          ; encoding: [0xc1,0x27,0x80,0xbe]
-
-0xf7,0x27,0x80,0xbe
-# GFX12: s_nand_saveexec_b64 s[0:1], -4.0        ; encoding: [0xf7,0x27,0x80,0xbe]
-
-0x7e,0x27,0x80,0xbe
-# GFX12: s_nand_saveexec_b64 s[0:1], exec        ; encoding: [0x7e,0x27,0x80,0xbe]
-
-0x66,0x27,0x80,0xbe
-# GFX12: s_nand_saveexec_b64 s[0:1], s[102:103]  ; encoding: [0x66,0x27,0x80,0xbe]
-
-0x02,0x27,0x80,0xbe
-# GFX12: s_nand_saveexec_b64 s[0:1], s[2:3]      ; encoding: [0x02,0x27,0x80,0xbe]
-
-0x6a,0x27,0x80,0xbe
-# GFX12: s_nand_saveexec_b64 s[0:1], vcc         ; encoding: [0x6a,0x27,0x80,0xbe]
-
-0x66,0x27,0xe8,0xbe
-# GFX12: s_nand_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x27,0xe8,0xbe]
-
-0x02,0x27,0xe8,0xbe
-# GFX12: s_nand_saveexec_b64 s[104:105], s[2:3]  ; encoding: [0x02,0x27,0xe8,0xbe]
-
-0x02,0x27,0xea,0xbe
-# GFX12: s_nand_saveexec_b64 vcc, s[2:3]         ; encoding: [0x02,0x27,0xea,0xbe]
-
-0xf0,0x28,0x80,0xbe
-# GFX12: s_nor_saveexec_b32 s0, 0.5              ; encoding: [0xf0,0x28,0x80,0xbe]
-
-0x80,0x28,0x80,0xbe
-# GFX12: s_nor_saveexec_b32 s0, 0                ; encoding: [0x80,0x28,0x80,0xbe]
-
-0xff,0x28,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_nor_saveexec_b32 s0, 0x3f717273       ; encoding: [0xff,0x28,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x28,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_nor_saveexec_b32 s0, 0xaf123456       ; encoding: [0xff,0x28,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x28,0x80,0xbe
-# GFX12: s_nor_saveexec_b32 s0, -1               ; encoding: [0xc1,0x28,0x80,0xbe]
-
-0xf7,0x28,0x80,0xbe
-# GFX12: s_nor_saveexec_b32 s0, -4.0             ; encoding: [0xf7,0x28,0x80,0xbe]
-
-0x7f,0x28,0x80,0xbe
-# GFX12: s_nor_saveexec_b32 s0, exec_hi          ; encoding: [0x7f,0x28,0x80,0xbe]
-
-0x7e,0x28,0x80,0xbe
-# GFX12: s_nor_saveexec_b32 s0, exec_lo          ; encoding: [0x7e,0x28,0x80,0xbe]
-
-0x7d,0x28,0x80,0xbe
-# GFX12: s_nor_saveexec_b32 s0, m0               ; encoding: [0x7d,0x28,0x80,0xbe]
-
-0x68,0x28,0x80,0xbe
-# GFX12: s_nor_saveexec_b32 s0, s104             ; encoding: [0x68,0x28,0x80,0xbe]
-
-0x01,0x28,0x80,0xbe
-# GFX12: s_nor_saveexec_b32 s0, s1               ; encoding: [0x01,0x28,0x80,0xbe]
-
-0x6b,0x28,0x80,0xbe
-# GFX12: s_nor_saveexec_b32 s0, vcc_hi           ; encoding: [0x6b,0x28,0x80,0xbe]
-
-0x6a,0x28,0x80,0xbe
-# GFX12: s_nor_saveexec_b32 s0, vcc_lo           ; encoding: [0x6a,0x28,0x80,0xbe]
-
-0x68,0x28,0xe9,0xbe
-# GFX12: s_nor_saveexec_b32 s105, s104           ; encoding: [0x68,0x28,0xe9,0xbe]
-
-0x01,0x28,0xe9,0xbe
-# GFX12: s_nor_saveexec_b32 s105, s1             ; encoding: [0x01,0x28,0xe9,0xbe]
-
-0x01,0x28,0xeb,0xbe
-# GFX12: s_nor_saveexec_b32 vcc_hi, s1           ; encoding: [0x01,0x28,0xeb,0xbe]
-
-0x01,0x28,0xea,0xbe
-# GFX12: s_nor_saveexec_b32 vcc_lo, s1           ; encoding: [0x01,0x28,0xea,0xbe]
-
-0xf0,0x29,0x80,0xbe
-# GFX12: s_nor_saveexec_b64 s[0:1], 0.5          ; encoding: [0xf0,0x29,0x80,0xbe]
-
-0x80,0x29,0x80,0xbe
-# GFX12: s_nor_saveexec_b64 s[0:1], 0            ; encoding: [0x80,0x29,0x80,0xbe]
-
-0xff,0x29,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_nor_saveexec_b64 s[0:1], 0x3f717273   ; encoding: [0xff,0x29,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x29,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_nor_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xff,0x29,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_nor_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xfe,0x29,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x29,0x80,0xbe
-# GFX12: s_nor_saveexec_b64 s[0:1], -1           ; encoding: [0xc1,0x29,0x80,0xbe]
-
-0xf7,0x29,0x80,0xbe
-# GFX12: s_nor_saveexec_b64 s[0:1], -4.0         ; encoding: [0xf7,0x29,0x80,0xbe]
-
-0x7e,0x29,0x80,0xbe
-# GFX12: s_nor_saveexec_b64 s[0:1], exec         ; encoding: [0x7e,0x29,0x80,0xbe]
-
-0x66,0x29,0x80,0xbe
-# GFX12: s_nor_saveexec_b64 s[0:1], s[102:103]   ; encoding: [0x66,0x29,0x80,0xbe]
-
-0x02,0x29,0x80,0xbe
-# GFX12: s_nor_saveexec_b64 s[0:1], s[2:3]       ; encoding: [0x02,0x29,0x80,0xbe]
-
-0x6a,0x29,0x80,0xbe
-# GFX12: s_nor_saveexec_b64 s[0:1], vcc          ; encoding: [0x6a,0x29,0x80,0xbe]
-
-0x66,0x29,0xe8,0xbe
-# GFX12: s_nor_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x29,0xe8,0xbe]
-
-0x02,0x29,0xe8,0xbe
-# GFX12: s_nor_saveexec_b64 s[104:105], s[2:3]   ; encoding: [0x02,0x29,0xe8,0xbe]
-
-0x02,0x29,0xea,0xbe
-# GFX12: s_nor_saveexec_b64 vcc, s[2:3]          ; encoding: [0x02,0x29,0xea,0xbe]
-
-0x01,0x1e,0xff,0xbe
-# GFX12: s_not_b32 exec_hi, s1                   ; encoding: [0x01,0x1e,0xff,0xbe]
-
-0x01,0x1e,0xfe,0xbe
-# GFX12: s_not_b32 exec_lo, s1                   ; encoding: [0x01,0x1e,0xfe,0xbe]
-
-0x01,0x1e,0xfd,0xbe
-# GFX12: s_not_b32 m0, s1                        ; encoding: [0x01,0x1e,0xfd,0xbe]
-
-0xf0,0x1e,0x80,0xbe
-# GFX12: s_not_b32 s0, 0.5                       ; encoding: [0xf0,0x1e,0x80,0xbe]
-
-0x80,0x1e,0x80,0xbe
-# GFX12: s_not_b32 s0, 0                         ; encoding: [0x80,0x1e,0x80,0xbe]
-
-0xff,0x1e,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_not_b32 s0, 0x3f717273                ; encoding: [0xff,0x1e,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x1e,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_not_b32 s0, 0xaf123456                ; encoding: [0xff,0x1e,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x1e,0x80,0xbe
-# GFX12: s_not_b32 s0, -1                        ; encoding: [0xc1,0x1e,0x80,0xbe]
-
-0xf7,0x1e,0x80,0xbe
-# GFX12: s_not_b32 s0, -4.0                      ; encoding: [0xf7,0x1e,0x80,0xbe]
-
-0x7f,0x1e,0x80,0xbe
-# GFX12: s_not_b32 s0, exec_hi                   ; encoding: [0x7f,0x1e,0x80,0xbe]
-
-0x7e,0x1e,0x80,0xbe
-# GFX12: s_not_b32 s0, exec_lo                   ; encoding: [0x7e,0x1e,0x80,0xbe]
-
-0x7d,0x1e,0x80,0xbe
-# GFX12: s_not_b32 s0, m0                        ; encoding: [0x7d,0x1e,0x80,0xbe]
-
-0x68,0x1e,0x80,0xbe
-# GFX12: s_not_b32 s0, s104                      ; encoding: [0x68,0x1e,0x80,0xbe]
-
-0x01,0x1e,0x80,0xbe
-# GFX12: s_not_b32 s0, s1                        ; encoding: [0x01,0x1e,0x80,0xbe]
-
-0x6b,0x1e,0x80,0xbe
-# GFX12: s_not_b32 s0, vcc_hi                    ; encoding: [0x6b,0x1e,0x80,0xbe]
-
-0x6a,0x1e,0x80,0xbe
-# GFX12: s_not_b32 s0, vcc_lo                    ; encoding: [0x6a,0x1e,0x80,0xbe]
-
-0x68,0x1e,0xe9,0xbe
-# GFX12: s_not_b32 s105, s104                    ; encoding: [0x68,0x1e,0xe9,0xbe]
-
-0x01,0x1e,0xe9,0xbe
-# GFX12: s_not_b32 s105, s1                      ; encoding: [0x01,0x1e,0xe9,0xbe]
-
-0x01,0x1e,0xeb,0xbe
-# GFX12: s_not_b32 vcc_hi, s1                    ; encoding: [0x01,0x1e,0xeb,0xbe]
-
-0x01,0x1e,0xea,0xbe
-# GFX12: s_not_b32 vcc_lo, s1                    ; encoding: [0x01,0x1e,0xea,0xbe]
-
-0x02,0x1f,0xfe,0xbe
-# GFX12: s_not_b64 exec, s[2:3]                  ; encoding: [0x02,0x1f,0xfe,0xbe]
-
-0xf0,0x1f,0x80,0xbe
-# GFX12: s_not_b64 s[0:1], 0.5                   ; encoding: [0xf0,0x1f,0x80,0xbe]
-
-0x80,0x1f,0x80,0xbe
-# GFX12: s_not_b64 s[0:1], 0                     ; encoding: [0x80,0x1f,0x80,0xbe]
-
-0xff,0x1f,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_not_b64 s[0:1], 0x3f717273            ; encoding: [0xff,0x1f,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x1f,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_not_b64 s[0:1], 0xaf123456            ; encoding: [0xff,0x1f,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_not_b64 s[0:1], 0xaf123456            ; encoding: [0xfe,0x1f,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x1f,0x80,0xbe
-# GFX12: s_not_b64 s[0:1], -1                    ; encoding: [0xc1,0x1f,0x80,0xbe]
-
-0xf7,0x1f,0x80,0xbe
-# GFX12: s_not_b64 s[0:1], -4.0                  ; encoding: [0xf7,0x1f,0x80,0xbe]
-
-0x7e,0x1f,0x80,0xbe
-# GFX12: s_not_b64 s[0:1], exec                  ; encoding: [0x7e,0x1f,0x80,0xbe]
-
-0x66,0x1f,0x80,0xbe
-# GFX12: s_not_b64 s[0:1], s[102:103]            ; encoding: [0x66,0x1f,0x80,0xbe]
-
-0x02,0x1f,0x80,0xbe
-# GFX12: s_not_b64 s[0:1], s[2:3]                ; encoding: [0x02,0x1f,0x80,0xbe]
-
-0x6a,0x1f,0x80,0xbe
-# GFX12: s_not_b64 s[0:1], vcc                   ; encoding: [0x6a,0x1f,0x80,0xbe]
-
-0x66,0x1f,0xe8,0xbe
-# GFX12: s_not_b64 s[104:105], s[102:103]        ; encoding: [0x66,0x1f,0xe8,0xbe]
-
-0x02,0x1f,0xe8,0xbe
-# GFX12: s_not_b64 s[104:105], s[2:3]            ; encoding: [0x02,0x1f,0xe8,0xbe]
-
-0x02,0x1f,0xea,0xbe
-# GFX12: s_not_b64 vcc, s[2:3]                   ; encoding: [0x02,0x1f,0xea,0xbe]
-
-0xf0,0x2e,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b32 s0, 0.5          ; encoding: [0xf0,0x2e,0x80,0xbe]
-
-0x80,0x2e,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b32 s0, 0            ; encoding: [0x80,0x2e,0x80,0xbe]
-
-0xff,0x2e,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_or_not0_saveexec_b32 s0, 0x3f717273   ; encoding: [0xff,0x2e,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x2e,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_or_not0_saveexec_b32 s0, 0xaf123456   ; encoding: [0xff,0x2e,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x2e,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b32 s0, -1           ; encoding: [0xc1,0x2e,0x80,0xbe]
-
-0xf7,0x2e,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b32 s0, -4.0         ; encoding: [0xf7,0x2e,0x80,0xbe]
-
-0x7f,0x2e,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b32 s0, exec_hi      ; encoding: [0x7f,0x2e,0x80,0xbe]
-
-0x7e,0x2e,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b32 s0, exec_lo      ; encoding: [0x7e,0x2e,0x80,0xbe]
-
-0x7d,0x2e,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b32 s0, m0           ; encoding: [0x7d,0x2e,0x80,0xbe]
-
-0x68,0x2e,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b32 s0, s104         ; encoding: [0x68,0x2e,0x80,0xbe]
-
-0x01,0x2e,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b32 s0, s1           ; encoding: [0x01,0x2e,0x80,0xbe]
-
-0x6b,0x2e,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b32 s0, vcc_hi       ; encoding: [0x6b,0x2e,0x80,0xbe]
-
-0x6a,0x2e,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b32 s0, vcc_lo       ; encoding: [0x6a,0x2e,0x80,0xbe]
-
-0x68,0x2e,0xe9,0xbe
-# GFX12: s_or_not0_saveexec_b32 s105, s104       ; encoding: [0x68,0x2e,0xe9,0xbe]
-
-0x01,0x2e,0xe9,0xbe
-# GFX12: s_or_not0_saveexec_b32 s105, s1         ; encoding: [0x01,0x2e,0xe9,0xbe]
-
-0x01,0x2e,0xeb,0xbe
-# GFX12: s_or_not0_saveexec_b32 vcc_hi, s1       ; encoding: [0x01,0x2e,0xeb,0xbe]
-
-0x01,0x2e,0xea,0xbe
-# GFX12: s_or_not0_saveexec_b32 vcc_lo, s1       ; encoding: [0x01,0x2e,0xea,0xbe]
-
-0xf0,0x2f,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b64 s[0:1], 0.5      ; encoding: [0xf0,0x2f,0x80,0xbe]
-
-0x80,0x2f,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b64 s[0:1], 0        ; encoding: [0x80,0x2f,0x80,0xbe]
-
-0xff,0x2f,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_or_not0_saveexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x2f,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x2f,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_or_not0_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x2f,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_or_not0_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xfe,0x2f,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x2f,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b64 s[0:1], -1       ; encoding: [0xc1,0x2f,0x80,0xbe]
-
-0xf7,0x2f,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b64 s[0:1], -4.0     ; encoding: [0xf7,0x2f,0x80,0xbe]
-
-0x7e,0x2f,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b64 s[0:1], exec     ; encoding: [0x7e,0x2f,0x80,0xbe]
-
-0x66,0x2f,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b64 s[0:1], s[102:103] ; encoding: [0x66,0x2f,0x80,0xbe]
-
-0x02,0x2f,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b64 s[0:1], s[2:3]   ; encoding: [0x02,0x2f,0x80,0xbe]
-
-0x6a,0x2f,0x80,0xbe
-# GFX12: s_or_not0_saveexec_b64 s[0:1], vcc      ; encoding: [0x6a,0x2f,0x80,0xbe]
-
-0x66,0x2f,0xe8,0xbe
-# GFX12: s_or_not0_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x2f,0xe8,0xbe]
-
-0x02,0x2f,0xe8,0xbe
-# GFX12: s_or_not0_saveexec_b64 s[104:105], s[2:3] ; encoding: [0x02,0x2f,0xe8,0xbe]
-
-0x02,0x2f,0xea,0xbe
-# GFX12: s_or_not0_saveexec_b64 vcc, s[2:3]      ; encoding: [0x02,0x2f,0xea,0xbe]
-
-0xf0,0x32,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b32 s0, 0.5          ; encoding: [0xf0,0x32,0x80,0xbe]
-
-0x80,0x32,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b32 s0, 0            ; encoding: [0x80,0x32,0x80,0xbe]
-
-0xff,0x32,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_or_not1_saveexec_b32 s0, 0x3f717273   ; encoding: [0xff,0x32,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x32,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_or_not1_saveexec_b32 s0, 0xaf123456   ; encoding: [0xff,0x32,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x32,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b32 s0, -1           ; encoding: [0xc1,0x32,0x80,0xbe]
-
-0xf7,0x32,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b32 s0, -4.0         ; encoding: [0xf7,0x32,0x80,0xbe]
-
-0x7f,0x32,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b32 s0, exec_hi      ; encoding: [0x7f,0x32,0x80,0xbe]
-
-0x7e,0x32,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b32 s0, exec_lo      ; encoding: [0x7e,0x32,0x80,0xbe]
-
-0x7d,0x32,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b32 s0, m0           ; encoding: [0x7d,0x32,0x80,0xbe]
-
-0x68,0x32,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b32 s0, s104         ; encoding: [0x68,0x32,0x80,0xbe]
-
-0x01,0x32,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b32 s0, s1           ; encoding: [0x01,0x32,0x80,0xbe]
-
-0x6b,0x32,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b32 s0, vcc_hi       ; encoding: [0x6b,0x32,0x80,0xbe]
-
-0x6a,0x32,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b32 s0, vcc_lo       ; encoding: [0x6a,0x32,0x80,0xbe]
-
-0x68,0x32,0xe9,0xbe
-# GFX12: s_or_not1_saveexec_b32 s105, s104       ; encoding: [0x68,0x32,0xe9,0xbe]
-
-0x01,0x32,0xe9,0xbe
-# GFX12: s_or_not1_saveexec_b32 s105, s1         ; encoding: [0x01,0x32,0xe9,0xbe]
-
-0x01,0x32,0xeb,0xbe
-# GFX12: s_or_not1_saveexec_b32 vcc_hi, s1       ; encoding: [0x01,0x32,0xeb,0xbe]
-
-0x01,0x32,0xea,0xbe
-# GFX12: s_or_not1_saveexec_b32 vcc_lo, s1       ; encoding: [0x01,0x32,0xea,0xbe]
-
-0xf0,0x33,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b64 s[0:1], 0.5      ; encoding: [0xf0,0x33,0x80,0xbe]
-
-0x80,0x33,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b64 s[0:1], 0        ; encoding: [0x80,0x33,0x80,0xbe]
-
-0xff,0x33,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_or_not1_saveexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x33,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x33,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_or_not1_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x33,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_or_not1_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xfe,0x33,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x33,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b64 s[0:1], -1       ; encoding: [0xc1,0x33,0x80,0xbe]
-
-0xf7,0x33,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b64 s[0:1], -4.0     ; encoding: [0xf7,0x33,0x80,0xbe]
-
-0x7e,0x33,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b64 s[0:1], exec     ; encoding: [0x7e,0x33,0x80,0xbe]
-
-0x66,0x33,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b64 s[0:1], s[102:103] ; encoding: [0x66,0x33,0x80,0xbe]
-
-0x02,0x33,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b64 s[0:1], s[2:3]   ; encoding: [0x02,0x33,0x80,0xbe]
-
-0x6a,0x33,0x80,0xbe
-# GFX12: s_or_not1_saveexec_b64 s[0:1], vcc      ; encoding: [0x6a,0x33,0x80,0xbe]
-
-0x66,0x33,0xe8,0xbe
-# GFX12: s_or_not1_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x33,0xe8,0xbe]
-
-0x02,0x33,0xe8,0xbe
-# GFX12: s_or_not1_saveexec_b64 s[104:105], s[2:3] ; encoding: [0x02,0x33,0xe8,0xbe]
-
-0x02,0x33,0xea,0xbe
-# GFX12: s_or_not1_saveexec_b64 vcc, s[2:3]      ; encoding: [0x02,0x33,0xea,0xbe]
-
-0xf0,0x22,0x80,0xbe
-# GFX12: s_or_saveexec_b32 s0, 0.5               ; encoding: [0xf0,0x22,0x80,0xbe]
-
-0x80,0x22,0x80,0xbe
-# GFX12: s_or_saveexec_b32 s0, 0                 ; encoding: [0x80,0x22,0x80,0xbe]
-
-0xff,0x22,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_or_saveexec_b32 s0, 0x3f717273        ; encoding: [0xff,0x22,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x22,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_or_saveexec_b32 s0, 0xaf123456        ; encoding: [0xff,0x22,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x22,0x80,0xbe
-# GFX12: s_or_saveexec_b32 s0, -1                ; encoding: [0xc1,0x22,0x80,0xbe]
-
-0xf7,0x22,0x80,0xbe
-# GFX12: s_or_saveexec_b32 s0, -4.0              ; encoding: [0xf7,0x22,0x80,0xbe]
-
-0x7f,0x22,0x80,0xbe
-# GFX12: s_or_saveexec_b32 s0, exec_hi           ; encoding: [0x7f,0x22,0x80,0xbe]
-
-0x7e,0x22,0x80,0xbe
-# GFX12: s_or_saveexec_b32 s0, exec_lo           ; encoding: [0x7e,0x22,0x80,0xbe]
-
-0x7d,0x22,0x80,0xbe
-# GFX12: s_or_saveexec_b32 s0, m0                ; encoding: [0x7d,0x22,0x80,0xbe]
-
-0x68,0x22,0x80,0xbe
-# GFX12: s_or_saveexec_b32 s0, s104              ; encoding: [0x68,0x22,0x80,0xbe]
-
-0x01,0x22,0x80,0xbe
-# GFX12: s_or_saveexec_b32 s0, s1                ; encoding: [0x01,0x22,0x80,0xbe]
-
-0x6b,0x22,0x80,0xbe
-# GFX12: s_or_saveexec_b32 s0, vcc_hi            ; encoding: [0x6b,0x22,0x80,0xbe]
-
-0x6a,0x22,0x80,0xbe
-# GFX12: s_or_saveexec_b32 s0, vcc_lo            ; encoding: [0x6a,0x22,0x80,0xbe]
-
-0x68,0x22,0xe9,0xbe
-# GFX12: s_or_saveexec_b32 s105, s104            ; encoding: [0x68,0x22,0xe9,0xbe]
-
-0x01,0x22,0xe9,0xbe
-# GFX12: s_or_saveexec_b32 s105, s1              ; encoding: [0x01,0x22,0xe9,0xbe]
-
-0x01,0x22,0xeb,0xbe
-# GFX12: s_or_saveexec_b32 vcc_hi, s1            ; encoding: [0x01,0x22,0xeb,0xbe]
-
-0x01,0x22,0xea,0xbe
-# GFX12: s_or_saveexec_b32 vcc_lo, s1            ; encoding: [0x01,0x22,0xea,0xbe]
-
-0xf0,0x23,0x80,0xbe
-# GFX12: s_or_saveexec_b64 s[0:1], 0.5           ; encoding: [0xf0,0x23,0x80,0xbe]
-
-0x80,0x23,0x80,0xbe
-# GFX12: s_or_saveexec_b64 s[0:1], 0             ; encoding: [0x80,0x23,0x80,0xbe]
-
-0xff,0x23,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_or_saveexec_b64 s[0:1], 0x3f717273    ; encoding: [0xff,0x23,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x23,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_or_saveexec_b64 s[0:1], 0xaf123456    ; encoding: [0xff,0x23,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_or_saveexec_b64 s[0:1], 0xaf123456    ; encoding: [0xfe,0x23,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x23,0x80,0xbe
-# GFX12: s_or_saveexec_b64 s[0:1], -1            ; encoding: [0xc1,0x23,0x80,0xbe]
-
-0xf7,0x23,0x80,0xbe
-# GFX12: s_or_saveexec_b64 s[0:1], -4.0          ; encoding: [0xf7,0x23,0x80,0xbe]
-
-0x7e,0x23,0x80,0xbe
-# GFX12: s_or_saveexec_b64 s[0:1], exec          ; encoding: [0x7e,0x23,0x80,0xbe]
-
-0x66,0x23,0x80,0xbe
-# GFX12: s_or_saveexec_b64 s[0:1], s[102:103]    ; encoding: [0x66,0x23,0x80,0xbe]
-
-0x02,0x23,0x80,0xbe
-# GFX12: s_or_saveexec_b64 s[0:1], s[2:3]        ; encoding: [0x02,0x23,0x80,0xbe]
-
-0x6a,0x23,0x80,0xbe
-# GFX12: s_or_saveexec_b64 s[0:1], vcc           ; encoding: [0x6a,0x23,0x80,0xbe]
-
-0x66,0x23,0xe8,0xbe
-# GFX12: s_or_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x23,0xe8,0xbe]
-
-0x02,0x23,0xe8,0xbe
-# GFX12: s_or_saveexec_b64 s[104:105], s[2:3]    ; encoding: [0x02,0x23,0xe8,0xbe]
-
-0x02,0x23,0xea,0xbe
-# GFX12: s_or_saveexec_b64 vcc, s[2:3]           ; encoding: [0x02,0x23,0xea,0xbe]
-
-0x01,0x1a,0xff,0xbe
-# GFX12: s_quadmask_b32 exec_hi, s1              ; encoding: [0x01,0x1a,0xff,0xbe]
-
-0x01,0x1a,0xfe,0xbe
-# GFX12: s_quadmask_b32 exec_lo, s1              ; encoding: [0x01,0x1a,0xfe,0xbe]
-
-0x01,0x1a,0xfd,0xbe
-# GFX12: s_quadmask_b32 m0, s1                   ; encoding: [0x01,0x1a,0xfd,0xbe]
-
-0xf0,0x1a,0x80,0xbe
-# GFX12: s_quadmask_b32 s0, 0.5                  ; encoding: [0xf0,0x1a,0x80,0xbe]
-
-0x80,0x1a,0x80,0xbe
-# GFX12: s_quadmask_b32 s0, 0                    ; encoding: [0x80,0x1a,0x80,0xbe]
-
-0xff,0x1a,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_quadmask_b32 s0, 0x3f717273           ; encoding: [0xff,0x1a,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x1a,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_quadmask_b32 s0, 0xaf123456           ; encoding: [0xff,0x1a,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x1a,0x80,0xbe
-# GFX12: s_quadmask_b32 s0, -1                   ; encoding: [0xc1,0x1a,0x80,0xbe]
-
-0xf7,0x1a,0x80,0xbe
-# GFX12: s_quadmask_b32 s0, -4.0                 ; encoding: [0xf7,0x1a,0x80,0xbe]
-
-0x7f,0x1a,0x80,0xbe
-# GFX12: s_quadmask_b32 s0, exec_hi              ; encoding: [0x7f,0x1a,0x80,0xbe]
-
-0x7e,0x1a,0x80,0xbe
-# GFX12: s_quadmask_b32 s0, exec_lo              ; encoding: [0x7e,0x1a,0x80,0xbe]
-
-0x7d,0x1a,0x80,0xbe
-# GFX12: s_quadmask_b32 s0, m0                   ; encoding: [0x7d,0x1a,0x80,0xbe]
-
-0x68,0x1a,0x80,0xbe
-# GFX12: s_quadmask_b32 s0, s104                 ; encoding: [0x68,0x1a,0x80,0xbe]
-
-0x01,0x1a,0x80,0xbe
-# GFX12: s_quadmask_b32 s0, s1                   ; encoding: [0x01,0x1a,0x80,0xbe]
-
-0x6b,0x1a,0x80,0xbe
-# GFX12: s_quadmask_b32 s0, vcc_hi               ; encoding: [0x6b,0x1a,0x80,0xbe]
-
-0x6a,0x1a,0x80,0xbe
-# GFX12: s_quadmask_b32 s0, vcc_lo               ; encoding: [0x6a,0x1a,0x80,0xbe]
-
-0x68,0x1a,0xe9,0xbe
-# GFX12: s_quadmask_b32 s105, s104               ; encoding: [0x68,0x1a,0xe9,0xbe]
-
-0x01,0x1a,0xe9,0xbe
-# GFX12: s_quadmask_b32 s105, s1                 ; encoding: [0x01,0x1a,0xe9,0xbe]
-
-0x01,0x1a,0xeb,0xbe
-# GFX12: s_quadmask_b32 vcc_hi, s1               ; encoding: [0x01,0x1a,0xeb,0xbe]
-
-0x01,0x1a,0xea,0xbe
-# GFX12: s_quadmask_b32 vcc_lo, s1               ; encoding: [0x01,0x1a,0xea,0xbe]
-
-0x02,0x1b,0xfe,0xbe
-# GFX12: s_quadmask_b64 exec, s[2:3]             ; encoding: [0x02,0x1b,0xfe,0xbe]
-
-0xf0,0x1b,0x80,0xbe
-# GFX12: s_quadmask_b64 s[0:1], 0.5              ; encoding: [0xf0,0x1b,0x80,0xbe]
-
-0x80,0x1b,0x80,0xbe
-# GFX12: s_quadmask_b64 s[0:1], 0                ; encoding: [0x80,0x1b,0x80,0xbe]
-
-0xff,0x1b,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_quadmask_b64 s[0:1], 0x3f717273       ; encoding: [0xff,0x1b,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x1b,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_quadmask_b64 s[0:1], 0xaf123456       ; encoding: [0xff,0x1b,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_quadmask_b64 s[0:1], 0xaf123456       ; encoding: [0xfe,0x1b,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x1b,0x80,0xbe
-# GFX12: s_quadmask_b64 s[0:1], -1               ; encoding: [0xc1,0x1b,0x80,0xbe]
-
-0xf7,0x1b,0x80,0xbe
-# GFX12: s_quadmask_b64 s[0:1], -4.0             ; encoding: [0xf7,0x1b,0x80,0xbe]
-
-0x7e,0x1b,0x80,0xbe
-# GFX12: s_quadmask_b64 s[0:1], exec             ; encoding: [0x7e,0x1b,0x80,0xbe]
-
-0x66,0x1b,0x80,0xbe
-# GFX12: s_quadmask_b64 s[0:1], s[102:103]       ; encoding: [0x66,0x1b,0x80,0xbe]
-
-0x02,0x1b,0x80,0xbe
-# GFX12: s_quadmask_b64 s[0:1], s[2:3]           ; encoding: [0x02,0x1b,0x80,0xbe]
-
-0x6a,0x1b,0x80,0xbe
-# GFX12: s_quadmask_b64 s[0:1], vcc              ; encoding: [0x6a,0x1b,0x80,0xbe]
-
-0x66,0x1b,0xe8,0xbe
-# GFX12: s_quadmask_b64 s[104:105], s[102:103]   ; encoding: [0x66,0x1b,0xe8,0xbe]
-
-0x02,0x1b,0xe8,0xbe
-# GFX12: s_quadmask_b64 s[104:105], s[2:3]       ; encoding: [0x02,0x1b,0xe8,0xbe]
-
-0x02,0x1b,0xea,0xbe
-# GFX12: s_quadmask_b64 vcc, s[2:3]              ; encoding: [0x02,0x1b,0xea,0xbe]
-
-0x00,0x4a,0x80,0xbe
-# GFX1200: s_rfe_b64 s[0:1]                        ; encoding: [0x00,0x4a,0x80,0xbe]
-# GFX1250: s_rfe_i64 s[0:1]                        ; encoding: [0x00,0x4a,0x80,0xbe]
-
-0x68,0x4a,0x80,0xbe
-# GFX1200: s_rfe_b64 s[104:105]                    ; encoding: [0x68,0x4a,0x80,0xbe]
-# GFX1250: s_rfe_i64 s[104:105]                    ; encoding: [0x68,0x4a,0x80,0xbe]
-
-0x6a,0x4a,0x80,0xbe
-# GFX1200: s_rfe_b64 vcc                           ; encoding: [0x6a,0x4a,0x80,0xbe]
-# GFX1250: s_rfe_i64 vcc                           ; encoding: [0x6a,0x4a,0x80,0xbe]
-
-0x00,0x4c,0x81,0xbe
-# GFX12: s_sendmsg_rtn_b32 s1, sendmsg(0, 0, 0)  ; encoding: [0x00,0x4c,0x81,0xbe]
-
-0x12,0x4c,0x82,0xbe
-# GFX12: s_sendmsg_rtn_b32 s2, sendmsg(18, 0, 0) ; encoding: [0x12,0x4c,0x82,0xbe]
-
-0xff,0x4c,0x83,0xbe
-# GFX12: s_sendmsg_rtn_b32 s3, sendmsg(255, 0, 0) ; encoding: [0xff,0x4c,0x83,0xbe]
-
-0x00,0x4d,0x80,0xbe
-# GFX12: s_sendmsg_rtn_b64 s[0:1], sendmsg(0, 0, 0) ; encoding: [0x00,0x4d,0x80,0xbe]
-
-0x12,0x4d,0x82,0xbe
-# GFX12: s_sendmsg_rtn_b64 s[2:3], sendmsg(18, 0, 0) ; encoding: [0x12,0x4d,0x82,0xbe]
-
-0xff,0x4d,0x84,0xbe
-# GFX12: s_sendmsg_rtn_b64 s[4:5], sendmsg(255, 0, 0) ; encoding: [0xff,0x4d,0x84,0xbe]
-
-0x80,0x4c,0x80,0xbe
-# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL) ; encoding: [0x80,0x4c,0x80,0xbe]
-
-0x81,0x4c,0x80,0xbe
-# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DDID) ; encoding: [0x81,0x4c,0x80,0xbe]
-
-0x82,0x4c,0x80,0xbe
-# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_TMA) ; encoding: [0x82,0x4c,0x80,0xbe]
-
-0x83,0x4c,0x80,0xbe
-# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_REALTIME) ; encoding: [0x83,0x4c,0x80,0xbe]
-
-0x84,0x4c,0x80,0xbe
-# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_SAVE_WAVE) ; encoding: [0x84,0x4c,0x80,0xbe]
-
-0x85,0x4c,0x80,0xbe
-# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_TBA) ; encoding: [0x85,0x4c,0x80,0xbe]
-
-0x86,0x4c,0x80,0xbe
-# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_TBA_TO_PC) ; encoding: [0x86,0x4c,0x80,0xbe]
-
-0x87,0x4c,0x80,0xbe
-# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_SE_AID_ID) ; encoding: [0x87,0x4c,0x80,0xbe]
-
-0x00,0x48,0x80,0xbe
-# GFX1200: s_setpc_b64 s[0:1]                      ; encoding: [0x00,0x48,0x80,0xbe]
-# GFX1250: s_set_pc_i64 s[0:1]                     ; encoding: [0x00,0x48,0x80,0xbe]
-
-0x68,0x48,0x80,0xbe
-# GFX1200: s_setpc_b64 s[104:105]                  ; encoding: [0x68,0x48,0x80,0xbe]
-# GFX1250: s_set_pc_i64 s[104:105]                 ; encoding: [0x68,0x48,0x80,0xbe]
-
-0x6a,0x48,0x80,0xbe
-# GFX1200: s_setpc_b64 vcc                         ; encoding: [0x6a,0x48,0x80,0xbe]
-# GFX1250: s_set_pc_i64 vcc                        ; encoding: [0x6a,0x48,0x80,0xbe]
-
-0xcb,0x48,0xf5,0xbe
-# GFX1200: s_setpc_b64 -11/*Invalid immediate*/    ; encoding: [0xf5,0x48,0x80,0xbe]
-# GFX1250: s_set_pc_i64 -11/*Invalid immediate*/   ; encoding: [0xf5,0x48,0x80,0xbe]
-
-0x01,0x0f,0xff,0xbe
-# GFX12: s_sext_i32_i16 exec_hi, s1              ; encoding: [0x01,0x0f,0xff,0xbe]
-
-0x01,0x0f,0xfe,0xbe
-# GFX12: s_sext_i32_i16 exec_lo, s1              ; encoding: [0x01,0x0f,0xfe,0xbe]
-
-0x01,0x0f,0xfd,0xbe
-# GFX12: s_sext_i32_i16 m0, s1                   ; encoding: [0x01,0x0f,0xfd,0xbe]
-
-0xf0,0x0f,0x80,0xbe
-# GFX12: s_sext_i32_i16 s0, 0.5                  ; encoding: [0xf0,0x0f,0x80,0xbe]
-
-0x80,0x0f,0x80,0xbe
-# GFX12: s_sext_i32_i16 s0, 0                    ; encoding: [0x80,0x0f,0x80,0xbe]
-
-0xff,0x0f,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_sext_i32_i16 s0, 0x3f717273           ; encoding: [0xff,0x0f,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x0f,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_sext_i32_i16 s0, 0xaf123456           ; encoding: [0xff,0x0f,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x0f,0x80,0xbe
-# GFX12: s_sext_i32_i16 s0, -1                   ; encoding: [0xc1,0x0f,0x80,0xbe]
-
-0xf7,0x0f,0x80,0xbe
-# GFX12: s_sext_i32_i16 s0, -4.0                 ; encoding: [0xf7,0x0f,0x80,0xbe]
-
-0x7f,0x0f,0x80,0xbe
-# GFX12: s_sext_i32_i16 s0, exec_hi              ; encoding: [0x7f,0x0f,0x80,0xbe]
-
-0x7e,0x0f,0x80,0xbe
-# GFX12: s_sext_i32_i16 s0, exec_lo              ; encoding: [0x7e,0x0f,0x80,0xbe]
-
-0x7d,0x0f,0x80,0xbe
-# GFX12: s_sext_i32_i16 s0, m0                   ; encoding: [0x7d,0x0f,0x80,0xbe]
-
-0x68,0x0f,0x80,0xbe
-# GFX12: s_sext_i32_i16 s0, s104                 ; encoding: [0x68,0x0f,0x80,0xbe]
-
-0x01,0x0f,0x80,0xbe
-# GFX12: s_sext_i32_i16 s0, s1                   ; encoding: [0x01,0x0f,0x80,0xbe]
-
-0x6b,0x0f,0x80,0xbe
-# GFX12: s_sext_i32_i16 s0, vcc_hi               ; encoding: [0x6b,0x0f,0x80,0xbe]
-
-0x6a,0x0f,0x80,0xbe
-# GFX12: s_sext_i32_i16 s0, vcc_lo               ; encoding: [0x6a,0x0f,0x80,0xbe]
-
-0x68,0x0f,0xe9,0xbe
-# GFX12: s_sext_i32_i16 s105, s104               ; encoding: [0x68,0x0f,0xe9,0xbe]
-
-0x01,0x0f,0xe9,0xbe
-# GFX12: s_sext_i32_i16 s105, s1                 ; encoding: [0x01,0x0f,0xe9,0xbe]
-
-0x01,0x0f,0xeb,0xbe
-# GFX12: s_sext_i32_i16 vcc_hi, s1               ; encoding: [0x01,0x0f,0xeb,0xbe]
-
-0x01,0x0f,0xea,0xbe
-# GFX12: s_sext_i32_i16 vcc_lo, s1               ; encoding: [0x01,0x0f,0xea,0xbe]
-
-0x01,0x0e,0xff,0xbe
-# GFX12: s_sext_i32_i8 exec_hi, s1               ; encoding: [0x01,0x0e,0xff,0xbe]
-
-0x01,0x0e,0xfe,0xbe
-# GFX12: s_sext_i32_i8 exec_lo, s1               ; encoding: [0x01,0x0e,0xfe,0xbe]
-
-0x01,0x0e,0xfd,0xbe
-# GFX12: s_sext_i32_i8 m0, s1                    ; encoding: [0x01,0x0e,0xfd,0xbe]
-
-0xf0,0x0e,0x80,0xbe
-# GFX12: s_sext_i32_i8 s0, 0.5                   ; encoding: [0xf0,0x0e,0x80,0xbe]
-
-0x80,0x0e,0x80,0xbe
-# GFX12: s_sext_i32_i8 s0, 0                     ; encoding: [0x80,0x0e,0x80,0xbe]
-
-0xff,0x0e,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_sext_i32_i8 s0, 0x3f717273            ; encoding: [0xff,0x0e,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x0e,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_sext_i32_i8 s0, 0xaf123456            ; encoding: [0xff,0x0e,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x0e,0x80,0xbe
-# GFX12: s_sext_i32_i8 s0, -1                    ; encoding: [0xc1,0x0e,0x80,0xbe]
-
-0xf7,0x0e,0x80,0xbe
-# GFX12: s_sext_i32_i8 s0, -4.0                  ; encoding: [0xf7,0x0e,0x80,0xbe]
-
-0x7f,0x0e,0x80,0xbe
-# GFX12: s_sext_i32_i8 s0, exec_hi               ; encoding: [0x7f,0x0e,0x80,0xbe]
-
-0x7e,0x0e,0x80,0xbe
-# GFX12: s_sext_i32_i8 s0, exec_lo               ; encoding: [0x7e,0x0e,0x80,0xbe]
-
-0x7d,0x0e,0x80,0xbe
-# GFX12: s_sext_i32_i8 s0, m0                    ; encoding: [0x7d,0x0e,0x80,0xbe]
-
-0x68,0x0e,0x80,0xbe
-# GFX12: s_sext_i32_i8 s0, s104                  ; encoding: [0x68,0x0e,0x80,0xbe]
-
-0x01,0x0e,0x80,0xbe
-# GFX12: s_sext_i32_i8 s0, s1                    ; encoding: [0x01,0x0e,0x80,0xbe]
-
-0x6b,0x0e,0x80,0xbe
-# GFX12: s_sext_i32_i8 s0, vcc_hi                ; encoding: [0x6b,0x0e,0x80,0xbe]
-
-0x6a,0x0e,0x80,0xbe
-# GFX12: s_sext_i32_i8 s0, vcc_lo                ; encoding: [0x6a,0x0e,0x80,0xbe]
-
-0x68,0x0e,0xe9,0xbe
-# GFX12: s_sext_i32_i8 s105, s104                ; encoding: [0x68,0x0e,0xe9,0xbe]
-
-0x01,0x0e,0xe9,0xbe
-# GFX12: s_sext_i32_i8 s105, s1                  ; encoding: [0x01,0x0e,0xe9,0xbe]
-
-0x01,0x0e,0xeb,0xbe
-# GFX12: s_sext_i32_i8 vcc_hi, s1                ; encoding: [0x01,0x0e,0xeb,0xbe]
-
-0x01,0x0e,0xea,0xbe
-# GFX12: s_sext_i32_i8 vcc_lo, s1                ; encoding: [0x01,0x0e,0xea,0xbe]
-
-0x66,0x49,0x80,0xbe
-# GFX1200: s_swappc_b64 s[0:1], s[102:103]         ; encoding: [0x66,0x49,0x80,0xbe]
-# GFX1250: s_swap_pc_i64 s[0:1], s[102:103]        ; encoding: [0x66,0x49,0x80,0xbe]
-
-0x02,0x49,0x80,0xbe
-# GFX1200: s_swappc_b64 s[0:1], s[2:3]             ; encoding: [0x02,0x49,0x80,0xbe]
-# GFX1250: s_swap_pc_i64 s[0:1], s[2:3]            ; encoding: [0x02,0x49,0x80,0xbe]
-
-0x6a,0x49,0x80,0xbe
-# GFX1200: s_swappc_b64 s[0:1], vcc                ; encoding: [0x6a,0x49,0x80,0xbe]
-# GFX1250: s_swap_pc_i64 s[0:1], vcc               ; encoding: [0x6a,0x49,0x80,0xbe]
-
-0x66,0x49,0xe8,0xbe
-# GFX1200: s_swappc_b64 s[104:105], s[102:103]     ; encoding: [0x66,0x49,0xe8,0xbe]
-# GFX1250: s_swap_pc_i64 s[104:105], s[102:103]    ; encoding: [0x66,0x49,0xe8,0xbe]
-
-0x02,0x49,0xe8,0xbe
-# GFX1200: s_swappc_b64 s[104:105], s[2:3]         ; encoding: [0x02,0x49,0xe8,0xbe]
-# GFX1250: s_swap_pc_i64 s[104:105], s[2:3]        ; encoding: [0x02,0x49,0xe8,0xbe]
-
-0x02,0x49,0xea,0xbe
-# GFX1200: s_swappc_b64 vcc, s[2:3]                ; encoding: [0x02,0x49,0xea,0xbe]
-# GFX1250: s_swap_pc_i64 vcc, s[2:3]               ; encoding: [0x02,0x49,0xea,0xbe]
-
-0x01,0x1c,0xff,0xbe
-# GFX12: s_wqm_b32 exec_hi, s1                   ; encoding: [0x01,0x1c,0xff,0xbe]
-
-0x01,0x1c,0xfe,0xbe
-# GFX12: s_wqm_b32 exec_lo, s1                   ; encoding: [0x01,0x1c,0xfe,0xbe]
-
-0x01,0x1c,0xfd,0xbe
-# GFX12: s_wqm_b32 m0, s1                        ; encoding: [0x01,0x1c,0xfd,0xbe]
-
-0xf0,0x1c,0x80,0xbe
-# GFX12: s_wqm_b32 s0, 0.5                       ; encoding: [0xf0,0x1c,0x80,0xbe]
-
-0x80,0x1c,0x80,0xbe
-# GFX12: s_wqm_b32 s0, 0                         ; encoding: [0x80,0x1c,0x80,0xbe]
-
-0xff,0x1c,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_wqm_b32 s0, 0x3f717273                ; encoding: [0xff,0x1c,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x1c,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_wqm_b32 s0, 0xaf123456                ; encoding: [0xff,0x1c,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x1c,0x80,0xbe
-# GFX12: s_wqm_b32 s0, -1                        ; encoding: [0xc1,0x1c,0x80,0xbe]
-
-0xf7,0x1c,0x80,0xbe
-# GFX12: s_wqm_b32 s0, -4.0                      ; encoding: [0xf7,0x1c,0x80,0xbe]
-
-0x7f,0x1c,0x80,0xbe
-# GFX12: s_wqm_b32 s0, exec_hi                   ; encoding: [0x7f,0x1c,0x80,0xbe]
-
-0x7e,0x1c,0x80,0xbe
-# GFX12: s_wqm_b32 s0, exec_lo                   ; encoding: [0x7e,0x1c,0x80,0xbe]
-
-0x7d,0x1c,0x80,0xbe
-# GFX12: s_wqm_b32 s0, m0                        ; encoding: [0x7d,0x1c,0x80,0xbe]
-
-0x68,0x1c,0x80,0xbe
-# GFX12: s_wqm_b32 s0, s104                      ; encoding: [0x68,0x1c,0x80,0xbe]
-
-0x01,0x1c,0x80,0xbe
-# GFX12: s_wqm_b32 s0, s1                        ; encoding: [0x01,0x1c,0x80,0xbe]
-
-0x6b,0x1c,0x80,0xbe
-# GFX12: s_wqm_b32 s0, vcc_hi                    ; encoding: [0x6b,0x1c,0x80,0xbe]
-
-0x6a,0x1c,0x80,0xbe
-# GFX12: s_wqm_b32 s0, vcc_lo                    ; encoding: [0x6a,0x1c,0x80,0xbe]
-
-0x68,0x1c,0xe9,0xbe
-# GFX12: s_wqm_b32 s105, s104                    ; encoding: [0x68,0x1c,0xe9,0xbe]
-
-0x01,0x1c,0xe9,0xbe
-# GFX12: s_wqm_b32 s105, s1                      ; encoding: [0x01,0x1c,0xe9,0xbe]
-
-0x01,0x1c,0xeb,0xbe
-# GFX12: s_wqm_b32 vcc_hi, s1                    ; encoding: [0x01,0x1c,0xeb,0xbe]
-
-0x01,0x1c,0xea,0xbe
-# GFX12: s_wqm_b32 vcc_lo, s1                    ; encoding: [0x01,0x1c,0xea,0xbe]
-
-0x02,0x1d,0xfe,0xbe
-# GFX12: s_wqm_b64 exec, s[2:3]                  ; encoding: [0x02,0x1d,0xfe,0xbe]
-
-0xf0,0x1d,0x80,0xbe
-# GFX12: s_wqm_b64 s[0:1], 0.5                   ; encoding: [0xf0,0x1d,0x80,0xbe]
-
-0x80,0x1d,0x80,0xbe
-# GFX12: s_wqm_b64 s[0:1], 0                     ; encoding: [0x80,0x1d,0x80,0xbe]
-
-0xff,0x1d,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_wqm_b64 s[0:1], 0x3f717273            ; encoding: [0xff,0x1d,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x1d,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_wqm_b64 s[0:1], 0xaf123456            ; encoding: [0xff,0x1d,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_wqm_b64 s[0:1], 0xaf123456            ; encoding: [0xfe,0x1d,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x1d,0x80,0xbe
-# GFX12: s_wqm_b64 s[0:1], -1                    ; encoding: [0xc1,0x1d,0x80,0xbe]
-
-0xf7,0x1d,0x80,0xbe
-# GFX12: s_wqm_b64 s[0:1], -4.0                  ; encoding: [0xf7,0x1d,0x80,0xbe]
-
-0x7e,0x1d,0x80,0xbe
-# GFX12: s_wqm_b64 s[0:1], exec                  ; encoding: [0x7e,0x1d,0x80,0xbe]
-
-0x66,0x1d,0x80,0xbe
-# GFX12: s_wqm_b64 s[0:1], s[102:103]            ; encoding: [0x66,0x1d,0x80,0xbe]
-
-0x02,0x1d,0x80,0xbe
-# GFX12: s_wqm_b64 s[0:1], s[2:3]                ; encoding: [0x02,0x1d,0x80,0xbe]
-
-0x6a,0x1d,0x80,0xbe
-# GFX12: s_wqm_b64 s[0:1], vcc                   ; encoding: [0x6a,0x1d,0x80,0xbe]
-
-0x66,0x1d,0xe8,0xbe
-# GFX12: s_wqm_b64 s[104:105], s[102:103]        ; encoding: [0x66,0x1d,0xe8,0xbe]
-
-0x02,0x1d,0xe8,0xbe
-# GFX12: s_wqm_b64 s[104:105], s[2:3]            ; encoding: [0x02,0x1d,0xe8,0xbe]
-
-0x02,0x1d,0xea,0xbe
-# GFX12: s_wqm_b64 vcc, s[2:3]                   ; encoding: [0x02,0x1d,0xea,0xbe]
-
-0xf0,0x2a,0x80,0xbe
-# GFX12: s_xnor_saveexec_b32 s0, 0.5             ; encoding: [0xf0,0x2a,0x80,0xbe]
-
-0x80,0x2a,0x80,0xbe
-# GFX12: s_xnor_saveexec_b32 s0, 0               ; encoding: [0x80,0x2a,0x80,0xbe]
-
-0xff,0x2a,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_xnor_saveexec_b32 s0, 0x3f717273      ; encoding: [0xff,0x2a,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x2a,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_xnor_saveexec_b32 s0, 0xaf123456      ; encoding: [0xff,0x2a,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x2a,0x80,0xbe
-# GFX12: s_xnor_saveexec_b32 s0, -1              ; encoding: [0xc1,0x2a,0x80,0xbe]
-
-0xf7,0x2a,0x80,0xbe
-# GFX12: s_xnor_saveexec_b32 s0, -4.0            ; encoding: [0xf7,0x2a,0x80,0xbe]
-
-0x7f,0x2a,0x80,0xbe
-# GFX12: s_xnor_saveexec_b32 s0, exec_hi         ; encoding: [0x7f,0x2a,0x80,0xbe]
-
-0x7e,0x2a,0x80,0xbe
-# GFX12: s_xnor_saveexec_b32 s0, exec_lo         ; encoding: [0x7e,0x2a,0x80,0xbe]
-
-0x7d,0x2a,0x80,0xbe
-# GFX12: s_xnor_saveexec_b32 s0, m0              ; encoding: [0x7d,0x2a,0x80,0xbe]
-
-0x68,0x2a,0x80,0xbe
-# GFX12: s_xnor_saveexec_b32 s0, s104            ; encoding: [0x68,0x2a,0x80,0xbe]
-
-0x01,0x2a,0x80,0xbe
-# GFX12: s_xnor_saveexec_b32 s0, s1              ; encoding: [0x01,0x2a,0x80,0xbe]
-
-0x6b,0x2a,0x80,0xbe
-# GFX12: s_xnor_saveexec_b32 s0, vcc_hi          ; encoding: [0x6b,0x2a,0x80,0xbe]
-
-0x6a,0x2a,0x80,0xbe
-# GFX12: s_xnor_saveexec_b32 s0, vcc_lo          ; encoding: [0x6a,0x2a,0x80,0xbe]
-
-0x68,0x2a,0xe9,0xbe
-# GFX12: s_xnor_saveexec_b32 s105, s104          ; encoding: [0x68,0x2a,0xe9,0xbe]
-
-0x01,0x2a,0xe9,0xbe
-# GFX12: s_xnor_saveexec_b32 s105, s1            ; encoding: [0x01,0x2a,0xe9,0xbe]
-
-0x01,0x2a,0xeb,0xbe
-# GFX12: s_xnor_saveexec_b32 vcc_hi, s1          ; encoding: [0x01,0x2a,0xeb,0xbe]
-
-0x01,0x2a,0xea,0xbe
-# GFX12: s_xnor_saveexec_b32 vcc_lo, s1          ; encoding: [0x01,0x2a,0xea,0xbe]
-
-0xf0,0x2b,0x80,0xbe
-# GFX12: s_xnor_saveexec_b64 s[0:1], 0.5         ; encoding: [0xf0,0x2b,0x80,0xbe]
-
-0x80,0x2b,0x80,0xbe
-# GFX12: s_xnor_saveexec_b64 s[0:1], 0           ; encoding: [0x80,0x2b,0x80,0xbe]
-
-0xff,0x2b,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_xnor_saveexec_b64 s[0:1], 0x3f717273  ; encoding: [0xff,0x2b,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x2b,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_xnor_saveexec_b64 s[0:1], 0xaf123456  ; encoding: [0xff,0x2b,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_xnor_saveexec_b64 s[0:1], 0xaf123456  ; encoding: [0xfe,0x2b,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x2b,0x80,0xbe
-# GFX12: s_xnor_saveexec_b64 s[0:1], -1          ; encoding: [0xc1,0x2b,0x80,0xbe]
-
-0xf7,0x2b,0x80,0xbe
-# GFX12: s_xnor_saveexec_b64 s[0:1], -4.0        ; encoding: [0xf7,0x2b,0x80,0xbe]
-
-0x7e,0x2b,0x80,0xbe
-# GFX12: s_xnor_saveexec_b64 s[0:1], exec        ; encoding: [0x7e,0x2b,0x80,0xbe]
-
-0x66,0x2b,0x80,0xbe
-# GFX12: s_xnor_saveexec_b64 s[0:1], s[102:103]  ; encoding: [0x66,0x2b,0x80,0xbe]
-
-0x02,0x2b,0x80,0xbe
-# GFX12: s_xnor_saveexec_b64 s[0:1], s[2:3]      ; encoding: [0x02,0x2b,0x80,0xbe]
-
-0x6a,0x2b,0x80,0xbe
-# GFX12: s_xnor_saveexec_b64 s[0:1], vcc         ; encoding: [0x6a,0x2b,0x80,0xbe]
-
-0x66,0x2b,0xe8,0xbe
-# GFX12: s_xnor_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x2b,0xe8,0xbe]
-
-0x02,0x2b,0xe8,0xbe
-# GFX12: s_xnor_saveexec_b64 s[104:105], s[2:3]  ; encoding: [0x02,0x2b,0xe8,0xbe]
-
-0x02,0x2b,0xea,0xbe
-# GFX12: s_xnor_saveexec_b64 vcc, s[2:3]         ; encoding: [0x02,0x2b,0xea,0xbe]
-
-0xf0,0x24,0x80,0xbe
-# GFX12: s_xor_saveexec_b32 s0, 0.5              ; encoding: [0xf0,0x24,0x80,0xbe]
-
-0x80,0x24,0x80,0xbe
-# GFX12: s_xor_saveexec_b32 s0, 0                ; encoding: [0x80,0x24,0x80,0xbe]
-
-0xff,0x24,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_xor_saveexec_b32 s0, 0x3f717273       ; encoding: [0xff,0x24,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x24,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX12: s_xor_saveexec_b32 s0, 0xaf123456       ; encoding: [0xff,0x24,0x80,0xbe,0x56,0x34,0x12,0xaf]
-
-0xc1,0x24,0x80,0xbe
-# GFX12: s_xor_saveexec_b32 s0, -1               ; encoding: [0xc1,0x24,0x80,0xbe]
-
-0xf7,0x24,0x80,0xbe
-# GFX12: s_xor_saveexec_b32 s0, -4.0             ; encoding: [0xf7,0x24,0x80,0xbe]
-
-0x7f,0x24,0x80,0xbe
-# GFX12: s_xor_saveexec_b32 s0, exec_hi          ; encoding: [0x7f,0x24,0x80,0xbe]
-
-0x7e,0x24,0x80,0xbe
-# GFX12: s_xor_saveexec_b32 s0, exec_lo          ; encoding: [0x7e,0x24,0x80,0xbe]
-
-0x7d,0x24,0x80,0xbe
-# GFX12: s_xor_saveexec_b32 s0, m0               ; encoding: [0x7d,0x24,0x80,0xbe]
-
-0x68,0x24,0x80,0xbe
-# GFX12: s_xor_saveexec_b32 s0, s104             ; encoding: [0x68,0x24,0x80,0xbe]
-
-0x01,0x24,0x80,0xbe
-# GFX12: s_xor_saveexec_b32 s0, s1               ; encoding: [0x01,0x24,0x80,0xbe]
-
-0x6b,0x24,0x80,0xbe
-# GFX12: s_xor_saveexec_b32 s0, vcc_hi           ; encoding: [0x6b,0x24,0x80,0xbe]
-
-0x6a,0x24,0x80,0xbe
-# GFX12: s_xor_saveexec_b32 s0, vcc_lo           ; encoding: [0x6a,0x24,0x80,0xbe]
-
-0x68,0x24,0xe9,0xbe
-# GFX12: s_xor_saveexec_b32 s105, s104           ; encoding: [0x68,0x24,0xe9,0xbe]
-
-0x01,0x24,0xe9,0xbe
-# GFX12: s_xor_saveexec_b32 s105, s1             ; encoding: [0x01,0x24,0xe9,0xbe]
-
-0x01,0x24,0xeb,0xbe
-# GFX12: s_xor_saveexec_b32 vcc_hi, s1           ; encoding: [0x01,0x24,0xeb,0xbe]
-
-0x01,0x24,0xea,0xbe
-# GFX12: s_xor_saveexec_b32 vcc_lo, s1           ; encoding: [0x01,0x24,0xea,0xbe]
-
-0xf0,0x25,0x80,0xbe
-# GFX12: s_xor_saveexec_b64 s[0:1], 0.5          ; encoding: [0xf0,0x25,0x80,0xbe]
-
-0x80,0x25,0x80,0xbe
-# GFX12: s_xor_saveexec_b64 s[0:1], 0            ; encoding: [0x80,0x25,0x80,0xbe]
-
-0xff,0x25,0x80,0xbe,0x73,0x72,0x71,0x3f
-# GFX12: s_xor_saveexec_b64 s[0:1], 0x3f717273   ; encoding: [0xff,0x25,0x80,0xbe,0x73,0x72,0x71,0x3f]
-
-0xff,0x25,0x80,0xbe,0x56,0x34,0x12,0xaf
-# GFX1200: s_xor_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xff,0x25,0x80,0xbe,0x56,0x34,0x12,0xaf]
-# GFX1250: s_xor_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xfe,0x25,0x80,0xbe,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-
-0xc1,0x25,0x80,0xbe
-# GFX12: s_xor_saveexec_b64 s[0:1], -1           ; encoding: [0xc1,0x25,0x80,0xbe]
-
-0xf7,0x25,0x80,0xbe
-# GFX12: s_xor_saveexec_b64 s[0:1], -4.0         ; encoding: [0xf7,0x25,0x80,0xbe]
-
-0x7e,0x25,0x80,0xbe
-# GFX12: s_xor_saveexec_b64 s[0:1], exec         ; encoding: [0x7e,0x25,0x80,0xbe]
-
-0x66,0x25,0x80,0xbe
-# GFX12: s_xor_saveexec_b64 s[0:1], s[102:103]   ; encoding: [0x66,0x25,0x80,0xbe]
-
-0x02,0x25,0x80,0xbe
-# GFX12: s_xor_saveexec_b64 s[0:1], s[2:3]       ; encoding: [0x02,0x25,0x80,0xbe]
-
-0x6a,0x25,0x80,0xbe
-# GFX12: s_xor_saveexec_b64 s[0:1], vcc          ; encoding: [0x6a,0x25,0x80,0xbe]
-
-0x66,0x25,0xe8,0xbe
-# GFX12: s_xor_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x25,0xe8,0xbe]
-
-0x02,0x25,0xe8,0xbe
-# GFX12: s_xor_saveexec_b64 s[104:105], s[2:3]   ; encoding: [0x02,0x25,0xe8,0xbe]
-
-0x02,0x25,0xea,0xbe
-# GFX12: s_xor_saveexec_b64 vcc, s[2:3]          ; encoding: [0x02,0x25,0xea,0xbe]

>From 3ac1daf9ad2a4a4ea07419f5be968c666cd8a502 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 18:18:14 +0530
Subject: [PATCH 35/55] Update gfx12_dasm_sop2.txt

---
 .../Disassembler/AMDGPU/gfx12_dasm_sop2.txt   | 90 +++++++------------
 1 file changed, 32 insertions(+), 58 deletions(-)

diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt
index 47b7408d07b8e..862a4f7e7f07d 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt
@@ -55,8 +55,7 @@
 # GFX12: s_add_nc_u64 s[0:1], 0x3f717273, s[2:3] ; encoding: [0xff,0x02,0x80,0xa9,0x73,0x72,0x71,0x3f]
 
 0xff,0x02,0x80,0xa9,0x56,0x34,0x12,0xaf
-# GFX1200: s_add_nc_u64 s[0:1], 0xaf123456, s[2:3] ; encoding: [0xff,0x02,0x80,0xa9,0x56,0x34,0x12,0xaf]
-# GFX1250: s_add_nc_u64 s[0:1], 0xaf123456, s[2:3] ; encoding: [0xfe,0x02,0x80,0xa9,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_add_nc_u64 s[0:1], 0xaf123456, s[2:3] ; encoding: [0xff,0x02,0x80,0xa9,0x56,0x34,0x12,0xaf]
 
 0x02,0x7e,0x80,0xa9
 # GFX12: s_add_nc_u64 s[0:1], s[2:3], exec       ; encoding: [0x02,0x7e,0x80,0xa9]
@@ -80,8 +79,7 @@
 # GFX12: s_add_nc_u64 s[0:1], s[2:3], 0x3f717273 ; encoding: [0x02,0xff,0x80,0xa9,0x73,0x72,0x71,0x3f]
 
 0x02,0xff,0x80,0xa9,0x56,0x34,0x12,0xaf
-# GFX1200: s_add_nc_u64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0xa9,0x56,0x34,0x12,0xaf]
-# GFX1250: s_add_nc_u64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xfe,0x80,0xa9,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_add_nc_u64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0xa9,0x56,0x34,0x12,0xaf]
 
 0x02,0x04,0x00,0xaa
 # GFX12: s_sub_nc_u64 s[0:1], s[2:3], s[4:5]     ; encoding: [0x02,0x04,0x00,0xaa]
@@ -135,8 +133,7 @@
 # GFX12: s_sub_nc_u64 s[0:1], 0x3f717273, s[2:3] ; encoding: [0xff,0x02,0x00,0xaa,0x73,0x72,0x71,0x3f]
 
 0xff,0x02,0x00,0xaa,0x56,0x34,0x12,0xaf
-# GFX1200: s_sub_nc_u64 s[0:1], 0xaf123456, s[2:3] ; encoding: [0xff,0x02,0x00,0xaa,0x56,0x34,0x12,0xaf]
-# GFX1250: s_sub_nc_u64 s[0:1], 0xaf123456, s[2:3] ; encoding: [0xfe,0x02,0x00,0xaa,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_sub_nc_u64 s[0:1], 0xaf123456, s[2:3] ; encoding: [0xff,0x02,0x00,0xaa,0x56,0x34,0x12,0xaf]
 
 0x02,0x7e,0x00,0xaa
 # GFX12: s_sub_nc_u64 s[0:1], s[2:3], exec       ; encoding: [0x02,0x7e,0x00,0xaa]
@@ -160,8 +157,7 @@
 # GFX12: s_sub_nc_u64 s[0:1], s[2:3], 0x3f717273 ; encoding: [0x02,0xff,0x00,0xaa,0x73,0x72,0x71,0x3f]
 
 0x02,0xff,0x00,0xaa,0x56,0x34,0x12,0xaf
-# GFX1200: s_sub_nc_u64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x00,0xaa,0x56,0x34,0x12,0xaf]
-# GFX1250: s_sub_nc_u64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xfe,0x00,0xaa,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_sub_nc_u64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x00,0xaa,0x56,0x34,0x12,0xaf]
 
 0x02,0x04,0x80,0xaa
 # GFX12: s_mul_u64 s[0:1], s[2:3], s[4:5]        ; encoding: [0x02,0x04,0x80,0xaa]
@@ -215,8 +211,7 @@
 # GFX12: s_mul_u64 s[0:1], 0x3f717273, s[2:3]    ; encoding: [0xff,0x02,0x80,0xaa,0x73,0x72,0x71,0x3f]
 
 0xff,0x02,0x80,0xaa,0x56,0x34,0x12,0xaf
-# GFX1200: s_mul_u64 s[0:1], 0xaf123456, s[2:3]    ; encoding: [0xff,0x02,0x80,0xaa,0x56,0x34,0x12,0xaf]
-# GFX1250: s_mul_u64 s[0:1], 0xaf123456, s[2:3]    ; encoding: [0xfe,0x02,0x80,0xaa,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_mul_u64 s[0:1], 0xaf123456, s[2:3]    ; encoding: [0xff,0x02,0x80,0xaa,0x56,0x34,0x12,0xaf]
 
 0x02,0x7e,0x80,0xaa
 # GFX12: s_mul_u64 s[0:1], s[2:3], exec          ; encoding: [0x02,0x7e,0x80,0xaa]
@@ -240,8 +235,7 @@
 # GFX12: s_mul_u64 s[0:1], s[2:3], 0x3f717273    ; encoding: [0x02,0xff,0x80,0xaa,0x73,0x72,0x71,0x3f]
 
 0x02,0xff,0x80,0xaa,0x56,0x34,0x12,0xaf
-# GFX1200: s_mul_u64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0xaa,0x56,0x34,0x12,0xaf]
-# GFX1250: s_mul_u64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xfe,0x80,0xaa,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_mul_u64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0xaa,0x56,0x34,0x12,0xaf]
 
 0x01,0x02,0x05,0xa0
 # GFX12: s_add_f32 s5, s1, s2                    ; encoding: [0x01,0x02,0x05,0xa0]
@@ -1696,8 +1690,7 @@
 # GFX12: s_and_b64 s[0:1], 0x3f717273, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8b,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x80,0x8b,0x56,0x34,0x12,0xaf
-# GFX1200: s_and_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8b,0x56,0x34,0x12,0xaf]
-# GFX1250: s_and_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xfe,0x04,0x80,0x8b,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_and_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8b,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x80,0x8b
 # GFX12: s_and_b64 s[0:1], -1, s[4:5]            ; encoding: [0xc1,0x04,0x80,0x8b]
@@ -1724,8 +1717,7 @@
 # GFX12: s_and_b64 s[0:1], s[2:3], 0x3f717273    ; encoding: [0x02,0xff,0x80,0x8b,0x73,0x72,0x71,0x3f]
 
 0x02,0xff,0x80,0x8b,0x56,0x34,0x12,0xaf
-# GFX1200: s_and_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0x8b,0x56,0x34,0x12,0xaf]
-# GFX1250: s_and_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xfe,0x80,0x8b,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_and_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0x8b,0x56,0x34,0x12,0xaf]
 
 0x02,0xc1,0x80,0x8b
 # GFX12: s_and_b64 s[0:1], s[2:3], -1            ; encoding: [0x02,0xc1,0x80,0x8b]
@@ -1881,8 +1873,7 @@
 # GFX12: s_and_not1_b64 s[0:1], 0x3f717273, s[4:5] ; encoding: [0xff,0x04,0x80,0x91,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x80,0x91,0x56,0x34,0x12,0xaf
-# GFX1200: s_and_not1_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xff,0x04,0x80,0x91,0x56,0x34,0x12,0xaf]
-# GFX1250: s_and_not1_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xfe,0x04,0x80,0x91,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_and_not1_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xff,0x04,0x80,0x91,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x80,0x91
 # GFX12: s_and_not1_b64 s[0:1], -1, s[4:5]       ; encoding: [0xc1,0x04,0x80,0x91]
@@ -1909,8 +1900,7 @@
 # GFX12: s_and_not1_b64 s[0:1], s[2:3], 0x3f717273 ; encoding: [0x02,0xff,0x80,0x91,0x73,0x72,0x71,0x3f]
 
 0x02,0xff,0x80,0x91,0x56,0x34,0x12,0xaf
-# GFX1200: s_and_not1_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0x91,0x56,0x34,0x12,0xaf]
-# GFX1250: s_and_not1_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xfe,0x80,0x91,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_and_not1_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0x91,0x56,0x34,0x12,0xaf]
 
 0x02,0xc1,0x80,0x91
 # GFX12: s_and_not1_b64 s[0:1], s[2:3], -1       ; encoding: [0x02,0xc1,0x80,0x91]
@@ -2066,8 +2056,7 @@
 # GFX12: s_ashr_i64 s[0:1], 0x3f717273, s4       ; encoding: [0xff,0x04,0x80,0x86,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x80,0x86,0x56,0x34,0x12,0xaf
-# GFX1200: s_ashr_i64 s[0:1], 0xaf123456, s4       ; encoding: [0xff,0x04,0x80,0x86,0x56,0x34,0x12,0xaf]
-# GFX1250: s_ashr_i64 s[0:1], 0xaf123456, s4       ; encoding: [0xfe,0x04,0x80,0x86,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_ashr_i64 s[0:1], 0xaf123456, s4       ; encoding: [0xff,0x04,0x80,0x86,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x80,0x86
 # GFX12: s_ashr_i64 s[0:1], -1, s4               ; encoding: [0xc1,0x04,0x80,0x86]
@@ -2250,8 +2239,7 @@
 # GFX12: s_bfe_i64 s[0:1], 0x3f717273, s4        ; encoding: [0xff,0x04,0x80,0x94,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x80,0x94,0x56,0x34,0x12,0xaf
-# GFX1200: s_bfe_i64 s[0:1], 0xaf123456, s4        ; encoding: [0xff,0x04,0x80,0x94,0x56,0x34,0x12,0xaf]
-# GFX1250: s_bfe_i64 s[0:1], 0xaf123456, s4        ; encoding: [0xfe,0x04,0x80,0x94,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_bfe_i64 s[0:1], 0xaf123456, s4        ; encoding: [0xff,0x04,0x80,0x94,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x80,0x94
 # GFX12: s_bfe_i64 s[0:1], -1, s4                ; encoding: [0xc1,0x04,0x80,0x94]
@@ -2434,8 +2422,7 @@
 # GFX12: s_bfe_u64 s[0:1], 0x3f717273, s4        ; encoding: [0xff,0x04,0x00,0x94,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x00,0x94,0x56,0x34,0x12,0xaf
-# GFX1200: s_bfe_u64 s[0:1], 0xaf123456, s4        ; encoding: [0xff,0x04,0x00,0x94,0x56,0x34,0x12,0xaf]
-# GFX1250: s_bfe_u64 s[0:1], 0xaf123456, s4        ; encoding: [0xfe,0x04,0x00,0x94,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_bfe_u64 s[0:1], 0xaf123456, s4        ; encoding: [0xff,0x04,0x00,0x94,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x00,0x94
 # GFX12: s_bfe_u64 s[0:1], -1, s4                ; encoding: [0xc1,0x04,0x00,0x94]
@@ -2819,8 +2806,7 @@
 # GFX12: s_cselect_b64 s[0:1], 0x3f717273, s[4:5] ; encoding: [0xff,0x04,0x80,0x98,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x80,0x98,0x56,0x34,0x12,0xaf
-# GFX1200: s_cselect_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xff,0x04,0x80,0x98,0x56,0x34,0x12,0xaf]
-# GFX1250: s_cselect_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xfe,0x04,0x80,0x98,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_cselect_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xff,0x04,0x80,0x98,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x80,0x98
 # GFX12: s_cselect_b64 s[0:1], -1, s[4:5]        ; encoding: [0xc1,0x04,0x80,0x98]
@@ -2847,8 +2833,7 @@
 # GFX12: s_cselect_b64 s[0:1], s[2:3], 0x3f717273 ; encoding: [0x02,0xff,0x80,0x98,0x73,0x72,0x71,0x3f]
 
 0x02,0xff,0x80,0x98,0x56,0x34,0x12,0xaf
-# GFX1200: s_cselect_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0x98,0x56,0x34,0x12,0xaf]
-# GFX1250: s_cselect_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xfe,0x80,0x98,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_cselect_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0x98,0x56,0x34,0x12,0xaf]
 
 0x02,0xc1,0x80,0x98
 # GFX12: s_cselect_b64 s[0:1], s[2:3], -1        ; encoding: [0x02,0xc1,0x80,0x98]
@@ -3424,8 +3409,7 @@
 # GFX12: s_lshl_b64 s[0:1], 0x3f717273, s4       ; encoding: [0xff,0x04,0x80,0x84,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x80,0x84,0x56,0x34,0x12,0xaf
-# GFX1200: s_lshl_b64 s[0:1], 0xaf123456, s4       ; encoding: [0xff,0x04,0x80,0x84,0x56,0x34,0x12,0xaf]
-# GFX1250: s_lshl_b64 s[0:1], 0xaf123456, s4       ; encoding: [0xfe,0x04,0x80,0x84,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_lshl_b64 s[0:1], 0xaf123456, s4       ; encoding: [0xff,0x04,0x80,0x84,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x80,0x84
 # GFX12: s_lshl_b64 s[0:1], -1, s4               ; encoding: [0xc1,0x04,0x80,0x84]
@@ -3608,8 +3592,7 @@
 # GFX12: s_lshr_b64 s[0:1], 0x3f717273, s4       ; encoding: [0xff,0x04,0x80,0x85,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x80,0x85,0x56,0x34,0x12,0xaf
-# GFX1200: s_lshr_b64 s[0:1], 0xaf123456, s4       ; encoding: [0xff,0x04,0x80,0x85,0x56,0x34,0x12,0xaf]
-# GFX1250: s_lshr_b64 s[0:1], 0xaf123456, s4       ; encoding: [0xfe,0x04,0x80,0x85,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_lshr_b64 s[0:1], 0xaf123456, s4       ; encoding: [0xff,0x04,0x80,0x85,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x80,0x85
 # GFX12: s_lshr_b64 s[0:1], -1, s4               ; encoding: [0xc1,0x04,0x80,0x85]
@@ -4527,8 +4510,7 @@
 # GFX12: s_nand_b64 s[0:1], 0x3f717273, s[4:5]   ; encoding: [0xff,0x04,0x80,0x8e,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x80,0x8e,0x56,0x34,0x12,0xaf
-# GFX1200: s_nand_b64 s[0:1], 0xaf123456, s[4:5]   ; encoding: [0xff,0x04,0x80,0x8e,0x56,0x34,0x12,0xaf]
-# GFX1250: s_nand_b64 s[0:1], 0xaf123456, s[4:5]   ; encoding: [0xfe,0x04,0x80,0x8e,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_nand_b64 s[0:1], 0xaf123456, s[4:5]   ; encoding: [0xff,0x04,0x80,0x8e,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x80,0x8e
 # GFX12: s_nand_b64 s[0:1], -1, s[4:5]           ; encoding: [0xc1,0x04,0x80,0x8e]
@@ -4555,8 +4537,7 @@
 # GFX12: s_nand_b64 s[0:1], s[2:3], 0x3f717273   ; encoding: [0x02,0xff,0x80,0x8e,0x73,0x72,0x71,0x3f]
 
 0x02,0xff,0x80,0x8e,0x56,0x34,0x12,0xaf
-# GFX1200: s_nand_b64 s[0:1], s[2:3], 0xaf123456   ; encoding: [0x02,0xff,0x80,0x8e,0x56,0x34,0x12,0xaf]
-# GFX1250: s_nand_b64 s[0:1], s[2:3], 0xaf123456   ; encoding: [0x02,0xfe,0x80,0x8e,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_nand_b64 s[0:1], s[2:3], 0xaf123456   ; encoding: [0x02,0xff,0x80,0x8e,0x56,0x34,0x12,0xaf]
 
 0x02,0xc1,0x80,0x8e
 # GFX12: s_nand_b64 s[0:1], s[2:3], -1           ; encoding: [0x02,0xc1,0x80,0x8e]
@@ -4712,8 +4693,7 @@
 # GFX12: s_nor_b64 s[0:1], 0x3f717273, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8f,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x80,0x8f,0x56,0x34,0x12,0xaf
-# GFX1200: s_nor_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8f,0x56,0x34,0x12,0xaf]
-# GFX1250: s_nor_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xfe,0x04,0x80,0x8f,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_nor_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8f,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x80,0x8f
 # GFX12: s_nor_b64 s[0:1], -1, s[4:5]            ; encoding: [0xc1,0x04,0x80,0x8f]
@@ -4740,8 +4720,7 @@
 # GFX12: s_nor_b64 s[0:1], s[2:3], 0x3f717273    ; encoding: [0x02,0xff,0x80,0x8f,0x73,0x72,0x71,0x3f]
 
 0x02,0xff,0x80,0x8f,0x56,0x34,0x12,0xaf
-# GFX1200: s_nor_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0x8f,0x56,0x34,0x12,0xaf]
-# GFX1250: s_nor_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xfe,0x80,0x8f,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_nor_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0x8f,0x56,0x34,0x12,0xaf]
 
 0x02,0xc1,0x80,0x8f
 # GFX12: s_nor_b64 s[0:1], s[2:3], -1            ; encoding: [0x02,0xc1,0x80,0x8f]
@@ -4897,8 +4876,7 @@
 # GFX12: s_or_b64 s[0:1], 0x3f717273, s[4:5]     ; encoding: [0xff,0x04,0x80,0x8c,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x80,0x8c,0x56,0x34,0x12,0xaf
-# GFX1200: s_or_b64 s[0:1], 0xaf123456, s[4:5]     ; encoding: [0xff,0x04,0x80,0x8c,0x56,0x34,0x12,0xaf]
-# GFX1250: s_or_b64 s[0:1], 0xaf123456, s[4:5]     ; encoding: [0xfe,0x04,0x80,0x8c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_or_b64 s[0:1], 0xaf123456, s[4:5]     ; encoding: [0xff,0x04,0x80,0x8c,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x80,0x8c
 # GFX12: s_or_b64 s[0:1], -1, s[4:5]             ; encoding: [0xc1,0x04,0x80,0x8c]
@@ -4925,8 +4903,7 @@
 # GFX12: s_or_b64 s[0:1], s[2:3], 0x3f717273     ; encoding: [0x02,0xff,0x80,0x8c,0x73,0x72,0x71,0x3f]
 
 0x02,0xff,0x80,0x8c,0x56,0x34,0x12,0xaf
-# GFX1200: s_or_b64 s[0:1], s[2:3], 0xaf123456     ; encoding: [0x02,0xff,0x80,0x8c,0x56,0x34,0x12,0xaf]
-# GFX1250: s_or_b64 s[0:1], s[2:3], 0xaf123456     ; encoding: [0x02,0xfe,0x80,0x8c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_or_b64 s[0:1], s[2:3], 0xaf123456     ; encoding: [0x02,0xff,0x80,0x8c,0x56,0x34,0x12,0xaf]
 
 0x02,0xc1,0x80,0x8c
 # GFX12: s_or_b64 s[0:1], s[2:3], -1             ; encoding: [0x02,0xc1,0x80,0x8c]
@@ -5082,8 +5059,7 @@
 # GFX12: s_or_not1_b64 s[0:1], 0x3f717273, s[4:5] ; encoding: [0xff,0x04,0x80,0x92,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x80,0x92,0x56,0x34,0x12,0xaf
-# GFX1200: s_or_not1_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xff,0x04,0x80,0x92,0x56,0x34,0x12,0xaf]
-# GFX1250: s_or_not1_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xfe,0x04,0x80,0x92,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_or_not1_b64 s[0:1], 0xaf123456, s[4:5] ; encoding: [0xff,0x04,0x80,0x92,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x80,0x92
 # GFX12: s_or_not1_b64 s[0:1], -1, s[4:5]        ; encoding: [0xc1,0x04,0x80,0x92]
@@ -5110,8 +5086,7 @@
 # GFX12: s_or_not1_b64 s[0:1], s[2:3], 0x3f717273 ; encoding: [0x02,0xff,0x80,0x92,0x73,0x72,0x71,0x3f]
 
 0x02,0xff,0x80,0x92,0x56,0x34,0x12,0xaf
-# GFX1200: s_or_not1_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0x92,0x56,0x34,0x12,0xaf]
-# GFX1250: s_or_not1_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xfe,0x80,0x92,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_or_not1_b64 s[0:1], s[2:3], 0xaf123456 ; encoding: [0x02,0xff,0x80,0x92,0x56,0x34,0x12,0xaf]
 
 0x02,0xc1,0x80,0x92
 # GFX12: s_or_not1_b64 s[0:1], s[2:3], -1        ; encoding: [0x02,0xc1,0x80,0x92]
@@ -5897,8 +5872,7 @@
 # GFX12: s_xnor_b64 s[0:1], 0x3f717273, s[4:5]   ; encoding: [0xff,0x04,0x80,0x90,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x80,0x90,0x56,0x34,0x12,0xaf
-# GFX1200: s_xnor_b64 s[0:1], 0xaf123456, s[4:5]   ; encoding: [0xff,0x04,0x80,0x90,0x56,0x34,0x12,0xaf]
-# GFX1250: s_xnor_b64 s[0:1], 0xaf123456, s[4:5]   ; encoding: [0xfe,0x04,0x80,0x90,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_xnor_b64 s[0:1], 0xaf123456, s[4:5]   ; encoding: [0xff,0x04,0x80,0x90,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x80,0x90
 # GFX12: s_xnor_b64 s[0:1], -1, s[4:5]           ; encoding: [0xc1,0x04,0x80,0x90]
@@ -5925,8 +5899,7 @@
 # GFX12: s_xnor_b64 s[0:1], s[2:3], 0x3f717273   ; encoding: [0x02,0xff,0x80,0x90,0x73,0x72,0x71,0x3f]
 
 0x02,0xff,0x80,0x90,0x56,0x34,0x12,0xaf
-# GFX1200: s_xnor_b64 s[0:1], s[2:3], 0xaf123456   ; encoding: [0x02,0xff,0x80,0x90,0x56,0x34,0x12,0xaf]
-# GFX1250: s_xnor_b64 s[0:1], s[2:3], 0xaf123456   ; encoding: [0x02,0xfe,0x80,0x90,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_xnor_b64 s[0:1], s[2:3], 0xaf123456   ; encoding: [0x02,0xff,0x80,0x90,0x56,0x34,0x12,0xaf]
 
 0x02,0xc1,0x80,0x90
 # GFX12: s_xnor_b64 s[0:1], s[2:3], -1           ; encoding: [0x02,0xc1,0x80,0x90]
@@ -6082,8 +6055,7 @@
 # GFX12: s_xor_b64 s[0:1], 0x3f717273, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8d,0x73,0x72,0x71,0x3f]
 
 0xff,0x04,0x80,0x8d,0x56,0x34,0x12,0xaf
-# GFX1200: s_xor_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8d,0x56,0x34,0x12,0xaf]
-# GFX1250: s_xor_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xfe,0x04,0x80,0x8d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_xor_b64 s[0:1], 0xaf123456, s[4:5]    ; encoding: [0xff,0x04,0x80,0x8d,0x56,0x34,0x12,0xaf]
 
 0xc1,0x04,0x80,0x8d
 # GFX12: s_xor_b64 s[0:1], -1, s[4:5]            ; encoding: [0xc1,0x04,0x80,0x8d]
@@ -6110,8 +6082,7 @@
 # GFX12: s_xor_b64 s[0:1], s[2:3], 0x3f717273    ; encoding: [0x02,0xff,0x80,0x8d,0x73,0x72,0x71,0x3f]
 
 0x02,0xff,0x80,0x8d,0x56,0x34,0x12,0xaf
-# GFX1200: s_xor_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0x8d,0x56,0x34,0x12,0xaf]
-# GFX1250: s_xor_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xfe,0x80,0x8d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_xor_b64 s[0:1], s[2:3], 0xaf123456    ; encoding: [0x02,0xff,0x80,0x8d,0x56,0x34,0x12,0xaf]
 
 0x02,0xc1,0x80,0x8d
 # GFX12: s_xor_b64 s[0:1], s[2:3], -1            ; encoding: [0x02,0xc1,0x80,0x8d]
@@ -6187,3 +6158,6 @@
 
 0xff,0x6b,0xfc,0x9a,0x56,0x34,0x12,0xaf
 # GFX12: s_pack_hl_b32_b16 null, 0xaf123456, vcc_hi ; encoding: [0xff,0x6b,0xfc,0x9a,0x56,0x34,0x12,0xaf]
+## NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+# GFX1200: {{.*}}
+# GFX1250: {{.*}}

>From 6766afef60cb51ba387ddaae1b628249071df3f3 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 18:18:55 +0530
Subject: [PATCH 36/55] Update gfx12_dasm_sopc.txt

---
 llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopc.txt | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopc.txt
index 93555829a88d6..418183e826e54 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopc.txt
@@ -1491,8 +1491,7 @@
 # GFX12: s_cmp_eq_u64 s[0:1], 0x3f717273         ; encoding: [0x00,0xff,0x10,0xbf,0x73,0x72,0x71,0x3f]
 
 0x00,0xff,0x10,0xbf,0x56,0x34,0x12,0xaf
-# GFX1200: s_cmp_eq_u64 s[0:1], 0xaf123456         ; encoding: [0x00,0xff,0x10,0xbf,0x56,0x34,0x12,0xaf]
-# GFX1250: s_cmp_eq_u64 s[0:1], 0xaf123456         ; encoding: [0x00,0xfe,0x10,0xbf,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_cmp_eq_u64 s[0:1], 0xaf123456         ; encoding: [0x00,0xff,0x10,0xbf,0x56,0x34,0x12,0xaf]
 
 0x00,0xc1,0x10,0xbf
 # GFX12: s_cmp_eq_u64 s[0:1], -1                 ; encoding: [0x00,0xc1,0x10,0xbf]
@@ -2014,8 +2013,7 @@
 # GFX12: s_cmp_lg_u64 s[0:1], 0x3f717273         ; encoding: [0x00,0xff,0x11,0xbf,0x73,0x72,0x71,0x3f]
 
 0x00,0xff,0x11,0xbf,0x56,0x34,0x12,0xaf
-# GFX1200: s_cmp_lg_u64 s[0:1], 0xaf123456         ; encoding: [0x00,0xff,0x11,0xbf,0x56,0x34,0x12,0xaf]
-# GFX1250: s_cmp_lg_u64 s[0:1], 0xaf123456         ; encoding: [0x00,0xfe,0x11,0xbf,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX12: s_cmp_lg_u64 s[0:1], 0xaf123456         ; encoding: [0x00,0xff,0x11,0xbf,0x56,0x34,0x12,0xaf]
 
 0x00,0xc1,0x11,0xbf
 # GFX12: s_cmp_lg_u64 s[0:1], -1                 ; encoding: [0x00,0xc1,0x11,0xbf]
@@ -2163,3 +2161,6 @@
 
 0x6a,0x01,0x0a,0xbf
 # GFX12: s_cmp_lt_u32 vcc_lo, s1                 ; encoding: [0x6a,0x01,0x0a,0xbf]
+## NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+# GFX1200: {{.*}}
+# GFX1250: {{.*}}

>From 710f0cd10a03046ac333b29ba0ce009033db6970 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 18:19:44 +0530
Subject: [PATCH 37/55] Update gfx12_dasm_vopc.txt

---
 .../Disassembler/AMDGPU/gfx12_dasm_vopc.txt   | 77 +++++++------------
 1 file changed, 29 insertions(+), 48 deletions(-)

diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
index 819742acfa5dc..816c82e75980f 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
@@ -671,10 +671,8 @@
 # W64: v_cmp_eq_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa4,0x7c]
 
 0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf
-# GFX12-W32: v_cmp_eq_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
-# GFX12-W64: v_cmp_eq_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
-# GFX13-W32: v_cmp_eq_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-# GFX13-W64: v_cmp_eq_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# W32: v_cmp_eq_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
+# W64: v_cmp_eq_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
 
 
 0x01,0x05,0x74,0x7c
@@ -896,10 +894,8 @@
 # W64: v_cmp_eq_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb4,0x7c]
 
 0xff,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf
-# GFX12-W32: v_cmp_eq_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf]
-# GFX12-W64: v_cmp_eq_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf]
-# GFX13-W32: v_cmp_eq_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-# GFX13-W64: v_cmp_eq_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# W32: v_cmp_eq_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf]
+# W64: v_cmp_eq_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7c,0x56,0x34,0x12,0xaf]
 
 
 0x01,0x05,0x0c,0x7c
@@ -1343,10 +1339,8 @@
 # W64: v_cmp_ge_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xac,0x7c]
 
 0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf
-# GFX12-W32: v_cmp_ge_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
-# GFX12-W64: v_cmp_ge_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
-# GFX13-W32: v_cmp_ge_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-# GFX13-W64: v_cmp_ge_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# W32: v_cmp_ge_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
+# W64: v_cmp_ge_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
 
 
 0x01,0x05,0x7c,0x7c
@@ -1568,10 +1562,8 @@
 # W64: v_cmp_ge_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xbc,0x7c]
 
 0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf
-# GFX12-W32: v_cmp_ge_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
-# GFX12-W64: v_cmp_ge_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
-# GFX13-W32: v_cmp_ge_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-# GFX13-W64: v_cmp_ge_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# W32: v_cmp_ge_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
+# W64: v_cmp_ge_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7c,0x56,0x34,0x12,0xaf]
 
 
 0x01,0x05,0x08,0x7c
@@ -2015,10 +2007,8 @@
 # W64: v_cmp_gt_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa8,0x7c]
 
 0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf
-# GFX12-W32: v_cmp_gt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
-# GFX12-W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
-# GFX13-W32: v_cmp_gt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-# GFX13-W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# W32: v_cmp_gt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
+# W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
 
 
 0x01,0x05,0x78,0x7c
@@ -2240,10 +2230,8 @@
 # W64: v_cmp_gt_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb8,0x7c]
 
 0xff,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf
-# GFX12-W32: v_cmp_gt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf]
-# GFX12-W64: v_cmp_gt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf]
-# GFX13-W32: v_cmp_gt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-# GFX13-W64: v_cmp_gt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# W32: v_cmp_gt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf]
+# W64: v_cmp_gt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7c,0x56,0x34,0x12,0xaf]
 
 
 0x01,0x05,0x06,0x7c
@@ -2687,10 +2675,8 @@
 # W64: v_cmp_le_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa6,0x7c]
 
 0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf
-# GFX12-W32: v_cmp_le_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
-# GFX12-W64: v_cmp_le_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
-# GFX13-W32: v_cmp_le_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-# GFX13-W64: v_cmp_le_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# W32: v_cmp_le_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
+# W64: v_cmp_le_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
 
 
 0x01,0x05,0x76,0x7c
@@ -2912,10 +2898,8 @@
 # W64: v_cmp_le_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb6,0x7c]
 
 0xff,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf
-# GFX12-W32: v_cmp_le_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf]
-# GFX12-W64: v_cmp_le_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf]
-# GFX13-W32: v_cmp_le_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-# GFX13-W64: v_cmp_le_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# W32: v_cmp_le_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf]
+# W64: v_cmp_le_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7c,0x56,0x34,0x12,0xaf]
 
 
 0x01,0x05,0x0a,0x7c
@@ -3581,10 +3565,8 @@
 # W64: v_cmp_lt_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xa2,0x7c]
 
 0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf
-# GFX12-W32: v_cmp_lt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
-# GFX12-W64: v_cmp_lt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
-# GFX13-W32: v_cmp_lt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-# GFX13-W64: v_cmp_lt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# W32: v_cmp_lt_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
+# W64: v_cmp_lt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
 
 
 0x01,0x05,0x72,0x7c
@@ -3806,10 +3788,8 @@
 # W64: v_cmp_lt_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xb2,0x7c]
 
 0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf
-# GFX12-W32: v_cmp_lt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
-# GFX12-W64: v_cmp_lt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
-# GFX13-W32: v_cmp_lt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-# GFX13-W64: v_cmp_lt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# W32: v_cmp_lt_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
+# W64: v_cmp_lt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
 
 
 0x01,0x05,0x6a,0x7c
@@ -4031,10 +4011,8 @@
 # W64: v_cmp_ne_i64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xaa,0x7c]
 
 0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf
-# GFX12-W32: v_cmp_ne_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
-# GFX12-W64: v_cmp_ne_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
-# GFX13-W32: v_cmp_ne_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-# GFX13-W64: v_cmp_ne_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# W32: v_cmp_ne_i64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
+# W64: v_cmp_ne_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
 
 
 0x01,0x05,0x7a,0x7c
@@ -4256,10 +4234,8 @@
 # W64: v_cmp_ne_u64_e32 vcc, src_scc, v[2:3]   ; encoding: [0xfd,0x04,0xba,0x7c]
 
 0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf
-# GFX12-W32: v_cmp_ne_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
-# GFX12-W64: v_cmp_ne_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
-# GFX13-W32: v_cmp_ne_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
-# GFX13-W64: v_cmp_ne_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# W32: v_cmp_ne_u64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
+# W64: v_cmp_ne_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7c,0x56,0x34,0x12,0xaf]
 
 
 0x01,0x05,0x1a,0x7c
@@ -6037,3 +6013,8 @@
 0xff,0xfc,0x51,0x7c,0x56,0x34,0x12,0xaf
 # W32: v_cmp_u_f64_e32 vcc_lo, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x51,0x7c,0x56,0x34,0x12,0xaf]
 # W64: v_cmp_u_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x51,0x7c,0x56,0x34,0x12,0xaf]
+## NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+# GFX12-W32: {{.*}}
+# GFX12-W64: {{.*}}
+# GFX13-W32: {{.*}}
+# GFX13-W64: {{.*}}

>From d3fa55f70f630769538c84ad3101641a9565f966 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 18:20:42 +0530
Subject: [PATCH 38/55] Update gfx12_dasm_vopcx.txt

---
 .../Disassembler/AMDGPU/gfx12_dasm_vopcx.txt  | 39 +++++++------------
 1 file changed, 15 insertions(+), 24 deletions(-)

diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
index 353a3e10b7026..cac502f789262 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
@@ -477,8 +477,7 @@
 # GFX: v_cmpx_eq_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xa4,0x7d]
 
 0xff,0xfc,0xa5,0x7d,0x56,0x34,0x12,0xaf
-# GFX12: v_cmpx_eq_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7d,0x56,0x34,0x12,0xaf]
-# GFX13: v_cmpx_eq_i64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa5,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX: v_cmpx_eq_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7d,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x74,0x7d
 # GFX12-FAKE16: v_cmpx_eq_u16_e32 v1, v2                ; encoding: [0x01,0x05,0x74,0x7d]
@@ -635,8 +634,7 @@
 # GFX: v_cmpx_eq_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xb4,0x7d]
 
 0xff,0xfc,0xb5,0x7d,0x56,0x34,0x12,0xaf
-# GFX12: v_cmpx_eq_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7d,0x56,0x34,0x12,0xaf]
-# GFX13: v_cmpx_eq_u64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb5,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX: v_cmpx_eq_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb5,0x7d,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x0c,0x7d
 # GFX12-FAKE16: v_cmpx_ge_f16_e32 v1, v2                ; encoding: [0x01,0x05,0x0c,0x7d]
@@ -950,8 +948,7 @@
 # GFX: v_cmpx_ge_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xac,0x7d]
 
 0xff,0xfc,0xad,0x7d,0x56,0x34,0x12,0xaf
-# GFX12: v_cmpx_ge_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7d,0x56,0x34,0x12,0xaf]
-# GFX13: v_cmpx_ge_i64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xad,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX: v_cmpx_ge_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7d,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x7c,0x7d
 # GFX12-FAKE16: v_cmpx_ge_u16_e32 v1, v2                ; encoding: [0x01,0x05,0x7c,0x7d]
@@ -1108,8 +1105,7 @@
 # GFX: v_cmpx_ge_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xbc,0x7d]
 
 0xff,0xfc,0xbd,0x7d,0x56,0x34,0x12,0xaf
-# GFX12: v_cmpx_ge_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7d,0x56,0x34,0x12,0xaf]
-# GFX13: v_cmpx_ge_u64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xbd,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX: v_cmpx_ge_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbd,0x7d,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x08,0x7d
 # GFX12-FAKE16: v_cmpx_gt_f16_e32 v1, v2                ; encoding: [0x01,0x05,0x08,0x7d]
@@ -1423,8 +1419,7 @@
 # GFX: v_cmpx_gt_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xa8,0x7d]
 
 0xff,0xfc,0xa9,0x7d,0x56,0x34,0x12,0xaf
-# GFX12: v_cmpx_gt_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7d,0x56,0x34,0x12,0xaf]
-# GFX13: v_cmpx_gt_i64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa9,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX: v_cmpx_gt_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7d,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x78,0x7d
 # GFX12-FAKE16: v_cmpx_gt_u16_e32 v1, v2                ; encoding: [0x01,0x05,0x78,0x7d]
@@ -1581,8 +1576,7 @@
 # GFX: v_cmpx_gt_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xb8,0x7d]
 
 0xff,0xfc,0xb9,0x7d,0x56,0x34,0x12,0xaf
-# GFX12: v_cmpx_gt_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7d,0x56,0x34,0x12,0xaf]
-# GFX13: v_cmpx_gt_u64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb9,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX: v_cmpx_gt_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb9,0x7d,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x06,0x7d
 # GFX12-FAKE16: v_cmpx_le_f16_e32 v1, v2                ; encoding: [0x01,0x05,0x06,0x7d]
@@ -1896,8 +1890,7 @@
 # GFX: v_cmpx_le_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xa6,0x7d]
 
 0xff,0xfc,0xa7,0x7d,0x56,0x34,0x12,0xaf
-# GFX12: v_cmpx_le_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7d,0x56,0x34,0x12,0xaf]
-# GFX13: v_cmpx_le_i64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa7,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX: v_cmpx_le_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7d,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x76,0x7d
 # GFX12-FAKE16: v_cmpx_le_u16_e32 v1, v2                ; encoding: [0x01,0x05,0x76,0x7d]
@@ -2054,8 +2047,7 @@
 # GFX: v_cmpx_le_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xb6,0x7d]
 
 0xff,0xfc,0xb7,0x7d,0x56,0x34,0x12,0xaf
-# GFX12: v_cmpx_le_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7d,0x56,0x34,0x12,0xaf]
-# GFX13: v_cmpx_le_u64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb7,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX: v_cmpx_le_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb7,0x7d,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x0a,0x7d
 # GFX12-FAKE16: v_cmpx_lg_f16_e32 v1, v2                ; encoding: [0x01,0x05,0x0a,0x7d]
@@ -2526,8 +2518,7 @@
 # GFX: v_cmpx_lt_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xa2,0x7d]
 
 0xff,0xfc,0xa3,0x7d,0x56,0x34,0x12,0xaf
-# GFX12: v_cmpx_lt_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7d,0x56,0x34,0x12,0xaf]
-# GFX13: v_cmpx_lt_i64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xa3,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX: v_cmpx_lt_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7d,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x72,0x7d
 # GFX12-FAKE16: v_cmpx_lt_u16_e32 v1, v2                ; encoding: [0x01,0x05,0x72,0x7d]
@@ -2684,8 +2675,7 @@
 # GFX: v_cmpx_lt_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xb2,0x7d]
 
 0xff,0xfc,0xb3,0x7d,0x56,0x34,0x12,0xaf
-# GFX12: v_cmpx_lt_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7d,0x56,0x34,0x12,0xaf]
-# GFX13: v_cmpx_lt_u64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xb3,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX: v_cmpx_lt_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7d,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x6a,0x7d
 # GFX12-FAKE16: v_cmpx_ne_i16_e32 v1, v2                ; encoding: [0x01,0x05,0x6a,0x7d]
@@ -2842,8 +2832,7 @@
 # GFX: v_cmpx_ne_i64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xaa,0x7d]
 
 0xff,0xfc,0xab,0x7d,0x56,0x34,0x12,0xaf
-# GFX12: v_cmpx_ne_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7d,0x56,0x34,0x12,0xaf]
-# GFX13: v_cmpx_ne_i64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xab,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX: v_cmpx_ne_i64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7d,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x7a,0x7d
 # GFX12-FAKE16: v_cmpx_ne_u16_e32 v1, v2                ; encoding: [0x01,0x05,0x7a,0x7d]
@@ -3000,8 +2989,7 @@
 # GFX: v_cmpx_ne_u64_e32 src_scc, v[2:3]       ; encoding: [0xfd,0x04,0xba,0x7d]
 
 0xff,0xfc,0xbb,0x7d,0x56,0x34,0x12,0xaf
-# GFX12: v_cmpx_ne_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7d,0x56,0x34,0x12,0xaf]
-# GFX13: v_cmpx_ne_u64_e32 0xaf123456, v[254:255] ; encoding: [0xfe,0xfc,0xbb,0x7d,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX: v_cmpx_ne_u64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xbb,0x7d,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x1a,0x7d
 # GFX12-FAKE16: v_cmpx_neq_f16_e32 v1, v2               ; encoding: [0x01,0x05,0x1a,0x7d]
@@ -4258,3 +4246,6 @@
 
 0xff,0xfc,0x51,0x7d,0x56,0x34,0x12,0xaf
 # GFX: v_cmpx_u_f64_e32 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x51,0x7d,0x56,0x34,0x12,0xaf]
+## NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+# GFX12: {{.*}}
+# GFX13: {{.*}}

>From 095b3c61c3816113ac7e9be67a905e11291e1aa0 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 18:21:32 +0530
Subject: [PATCH 39/55] Update gfx1250_dasm_vop1.txt

---
 llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
index b4533d5a4b8c9..ca8a9a4bb148d 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
@@ -3,7 +3,7 @@
 # RUN: llvm-mc -triple=amdgcn -mcpu=gfx1250 -mattr=-real-true16 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX1250,GFX1250-FAKE16 %s
 
 0xff,0x3a,0xfc,0x7f,0x56,0x34,0x12,0xaf
-# GFX1250: v_mov_b64_e32 v[254:255], 0xaf123456    ; encoding: [0xfe,0x3a,0xfc,0x7f,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX1250: v_mov_b64_e32 v[254:255], 0xaf123456    ; encoding: [0xff,0x3a,0xfc,0x7f,0x56,0x34,0x12,0xaf]
 
 0xc1,0x3a,0x08,0x7e
 # GFX1250: v_mov_b64_e32 v[4:5], -1                ; encoding: [0xc1,0x3a,0x08,0x7e]

>From cc94779d55d368c091926d89cb434c7610340fde Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 18:22:58 +0530
Subject: [PATCH 40/55] Update gfx1250_dasm_vop2.txt

---
 llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop2.txt | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop2.txt
index da1f47f27ec25..ca4504a1635e3 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop2.txt
@@ -146,7 +146,7 @@
 # GFX1250: v_add_nc_u64_e32 v[4:5], 0x3f717273, v[4:5] ; encoding: [0xff,0x08,0x08,0x50,0x73,0x72,0x71,0x3f]
 
 0xff,0x08,0x08,0x50,0x56,0x34,0x12,0xaf
-# GFX1250: v_add_nc_u64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xfe,0x08,0x08,0x50,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX1250: v_add_nc_u64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xff,0x08,0x08,0x50,0x56,0x34,0x12,0xaf]
 
 0x7e,0x08,0x08,0x50
 # GFX1250: v_add_nc_u64_e32 v[4:5], exec, v[4:5]   ; encoding: [0x7e,0x08,0x08,0x50]
@@ -233,7 +233,7 @@
 # GFX1250: v_sub_nc_u64_e32 v[4:5], 0x3f717273, v[4:5] ; encoding: [0xff,0x08,0x08,0x52,0x73,0x72,0x71,0x3f]
 
 0xff,0x08,0x08,0x52,0x56,0x34,0x12,0xaf
-# GFX1250: v_sub_nc_u64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xfe,0x08,0x08,0x52,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX1250: v_sub_nc_u64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xff,0x08,0x08,0x52,0x56,0x34,0x12,0xaf]
 
 0x7e,0x08,0x08,0x52
 # GFX1250: v_sub_nc_u64_e32 v[4:5], exec, v[4:5]   ; encoding: [0x7e,0x08,0x08,0x52]
@@ -320,7 +320,7 @@
 # GFX1250: v_mul_u64_e32 v[4:5], 0x3f717273, v[4:5] ; encoding: [0xff,0x08,0x08,0x54,0x73,0x72,0x71,0x3f]
 
 0xff,0x08,0x08,0x54,0x56,0x34,0x12,0xaf
-# GFX1250: v_mul_u64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xfe,0x08,0x08,0x54,0x56,0x34,0x12,0xaf,0x00,0x00,0x00,0x00]
+# GFX1250: v_mul_u64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xff,0x08,0x08,0x54,0x56,0x34,0x12,0xaf]
 
 0x7e,0x08,0x08,0x54
 # GFX1250: v_mul_u64_e32 v[4:5], exec, v[4:5]      ; encoding: [0x7e,0x08,0x08,0x54]

>From 6beae85158a15c2fe26e0778163ea706ec07de51 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 18:38:19 +0530
Subject: [PATCH 41/55] Update SIDefines.h

---
 llvm/lib/Target/AMDGPU/SIDefines.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h
index ebef7ce974f15..b836162ed9370 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -201,8 +201,8 @@ namespace AMDGPU {
 enum OperandType : unsigned {
   /// Operands with register, 32-bit, or 64-bit immediate
   OPERAND_REG_IMM_INT32 = MCOI::OPERAND_FIRST_TARGET,
-  OPERAND_REG_IMM_INT64, // Signed 64-bit integer operand (uses IsInt<32>)
-  OPERAND_REG_IMM_B64,   // Unsigned 64-bit integer operand (uses IsUInt<32>)
+  OPERAND_REG_IMM_INT64,  // Signed 64-bit integer operand (uses IsInt<32>)
+  OPERAND_REG_IMM_B64,    // Unsigned 64-bit integer operand (uses IsUInt<32>)
   OPERAND_REG_IMM_INT16,
   OPERAND_REG_IMM_FP32,
   OPERAND_REG_IMM_FP64,

>From b3cfba03cb646c22adb7bfc7a7ac5d46f65f2504 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 18:45:31 +0530
Subject: [PATCH 42/55] Update SIInstrInfo.cpp

---
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index d52890c795ab7..cb66575bc959d 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -6544,8 +6544,10 @@ bool SIInstrInfo::isOperandLegal(const MachineInstr &MI, unsigned OpIdx,
   if (MO->isImm()) {
     uint64_t Imm = MO->getImm();
     bool Is64BitFPOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_FP64;
-    bool Is64BitSignedOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_INT64;
-    bool Is64BitUnsignedOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_B64;
+    bool Is64BitSignedOp =
+        OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_INT64;
+    bool Is64BitUnsignedOp =
+        OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_B64;
     bool Is64BitOp = Is64BitFPOp || Is64BitSignedOp || Is64BitUnsignedOp ||
                      OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_V2INT32 ||
                      OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_V2FP32;

>From b0b5cfaae69543e1f8a7ed886994a5a5d5c8fbb0 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 18:48:52 +0530
Subject: [PATCH 43/55] Update gfx12_dasm_sop1.txt

---
 .../Disassembler/AMDGPU/gfx12_dasm_sop1.txt   | 2718 +++++++++++++++++
 1 file changed, 2718 insertions(+)

diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
index 107527b62560f..38fb227a50277 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
@@ -1017,3 +1017,2721 @@
 # GFX12: s_and_not1_saveexec_b32 s0, s104        ; encoding: [0x68,0x30,0x80,0xbe]
 
 0x01,0x30,0x80,0xbe
+# GFX12: s_and_not1_saveexec_b32 s0, s1          ; encoding: [0x01,0x30,0x80,0xbe]
+
+0x6b,0x30,0x80,0xbe
+# GFX12: s_and_not1_saveexec_b32 s0, vcc_hi      ; encoding: [0x6b,0x30,0x80,0xbe]
+
+0x6a,0x30,0x80,0xbe
+# GFX12: s_and_not1_saveexec_b32 s0, vcc_lo      ; encoding: [0x6a,0x30,0x80,0xbe]
+
+0x68,0x30,0xe9,0xbe
+# GFX12: s_and_not1_saveexec_b32 s105, s104      ; encoding: [0x68,0x30,0xe9,0xbe]
+
+0x01,0x30,0xe9,0xbe
+# GFX12: s_and_not1_saveexec_b32 s105, s1        ; encoding: [0x01,0x30,0xe9,0xbe]
+
+0x01,0x30,0xeb,0xbe
+# GFX12: s_and_not1_saveexec_b32 vcc_hi, s1      ; encoding: [0x01,0x30,0xeb,0xbe]
+
+0x01,0x30,0xea,0xbe
+# GFX12: s_and_not1_saveexec_b32 vcc_lo, s1      ; encoding: [0x01,0x30,0xea,0xbe]
+
+0xf0,0x31,0x80,0xbe
+# GFX12: s_and_not1_saveexec_b64 s[0:1], 0.5     ; encoding: [0xf0,0x31,0x80,0xbe]
+
+0x80,0x31,0x80,0xbe
+# GFX12: s_and_not1_saveexec_b64 s[0:1], 0       ; encoding: [0x80,0x31,0x80,0xbe]
+
+0xff,0x31,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_and_not1_saveexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x31,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x31,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_and_not1_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x31,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x31,0x80,0xbe
+# GFX12: s_and_not1_saveexec_b64 s[0:1], -1      ; encoding: [0xc1,0x31,0x80,0xbe]
+
+0xf7,0x31,0x80,0xbe
+# GFX12: s_and_not1_saveexec_b64 s[0:1], -4.0    ; encoding: [0xf7,0x31,0x80,0xbe]
+
+0x7e,0x31,0x80,0xbe
+# GFX12: s_and_not1_saveexec_b64 s[0:1], exec    ; encoding: [0x7e,0x31,0x80,0xbe]
+
+0x66,0x31,0x80,0xbe
+# GFX12: s_and_not1_saveexec_b64 s[0:1], s[102:103] ; encoding: [0x66,0x31,0x80,0xbe]
+
+0x02,0x31,0x80,0xbe
+# GFX12: s_and_not1_saveexec_b64 s[0:1], s[2:3]  ; encoding: [0x02,0x31,0x80,0xbe]
+
+0x6a,0x31,0x80,0xbe
+# GFX12: s_and_not1_saveexec_b64 s[0:1], vcc     ; encoding: [0x6a,0x31,0x80,0xbe]
+
+0x66,0x31,0xe8,0xbe
+# GFX12: s_and_not1_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x31,0xe8,0xbe]
+
+0x02,0x31,0xe8,0xbe
+# GFX12: s_and_not1_saveexec_b64 s[104:105], s[2:3] ; encoding: [0x02,0x31,0xe8,0xbe]
+
+0x02,0x31,0xea,0xbe
+# GFX12: s_and_not1_saveexec_b64 vcc, s[2:3]     ; encoding: [0x02,0x31,0xea,0xbe]
+
+0xf0,0x36,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b32 s0, 0.5           ; encoding: [0xf0,0x36,0x80,0xbe]
+
+0x80,0x36,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b32 s0, 0             ; encoding: [0x80,0x36,0x80,0xbe]
+
+0xff,0x36,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_and_not1_wrexec_b32 s0, 0x3f717273    ; encoding: [0xff,0x36,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x36,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_and_not1_wrexec_b32 s0, 0xaf123456    ; encoding: [0xff,0x36,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x36,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b32 s0, -1            ; encoding: [0xc1,0x36,0x80,0xbe]
+
+0xf7,0x36,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b32 s0, -4.0          ; encoding: [0xf7,0x36,0x80,0xbe]
+
+0x7f,0x36,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b32 s0, exec_hi       ; encoding: [0x7f,0x36,0x80,0xbe]
+
+0x7e,0x36,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b32 s0, exec_lo       ; encoding: [0x7e,0x36,0x80,0xbe]
+
+0x7d,0x36,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b32 s0, m0            ; encoding: [0x7d,0x36,0x80,0xbe]
+
+0x68,0x36,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b32 s0, s104          ; encoding: [0x68,0x36,0x80,0xbe]
+
+0x01,0x36,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b32 s0, s1            ; encoding: [0x01,0x36,0x80,0xbe]
+
+0x6b,0x36,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b32 s0, vcc_hi        ; encoding: [0x6b,0x36,0x80,0xbe]
+
+0x6a,0x36,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b32 s0, vcc_lo        ; encoding: [0x6a,0x36,0x80,0xbe]
+
+0x68,0x36,0xe9,0xbe
+# GFX12: s_and_not1_wrexec_b32 s105, s104        ; encoding: [0x68,0x36,0xe9,0xbe]
+
+0x01,0x36,0xe9,0xbe
+# GFX12: s_and_not1_wrexec_b32 s105, s1          ; encoding: [0x01,0x36,0xe9,0xbe]
+
+0x01,0x36,0xeb,0xbe
+# GFX12: s_and_not1_wrexec_b32 vcc_hi, s1        ; encoding: [0x01,0x36,0xeb,0xbe]
+
+0x01,0x36,0xea,0xbe
+# GFX12: s_and_not1_wrexec_b32 vcc_lo, s1        ; encoding: [0x01,0x36,0xea,0xbe]
+
+0xf0,0x37,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b64 s[0:1], 0.5       ; encoding: [0xf0,0x37,0x80,0xbe]
+
+0x80,0x37,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b64 s[0:1], 0         ; encoding: [0x80,0x37,0x80,0xbe]
+
+0xff,0x37,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_and_not1_wrexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x37,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x37,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_and_not1_wrexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x37,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x37,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b64 s[0:1], -1        ; encoding: [0xc1,0x37,0x80,0xbe]
+
+0xf7,0x37,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b64 s[0:1], -4.0      ; encoding: [0xf7,0x37,0x80,0xbe]
+
+0x7e,0x37,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b64 s[0:1], exec      ; encoding: [0x7e,0x37,0x80,0xbe]
+
+0x66,0x37,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b64 s[0:1], s[102:103] ; encoding: [0x66,0x37,0x80,0xbe]
+
+0x02,0x37,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b64 s[0:1], s[2:3]    ; encoding: [0x02,0x37,0x80,0xbe]
+
+0x6a,0x37,0x80,0xbe
+# GFX12: s_and_not1_wrexec_b64 s[0:1], vcc       ; encoding: [0x6a,0x37,0x80,0xbe]
+
+0x66,0x37,0xe8,0xbe
+# GFX12: s_and_not1_wrexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x37,0xe8,0xbe]
+
+0x02,0x37,0xe8,0xbe
+# GFX12: s_and_not1_wrexec_b64 s[104:105], s[2:3] ; encoding: [0x02,0x37,0xe8,0xbe]
+
+0x02,0x37,0xea,0xbe
+# GFX12: s_and_not1_wrexec_b64 vcc, s[2:3]       ; encoding: [0x02,0x37,0xea,0xbe]
+
+0xf0,0x20,0x80,0xbe
+# GFX12: s_and_saveexec_b32 s0, 0.5              ; encoding: [0xf0,0x20,0x80,0xbe]
+
+0x80,0x20,0x80,0xbe
+# GFX12: s_and_saveexec_b32 s0, 0                ; encoding: [0x80,0x20,0x80,0xbe]
+
+0xff,0x20,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_and_saveexec_b32 s0, 0x3f717273       ; encoding: [0xff,0x20,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x20,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_and_saveexec_b32 s0, 0xaf123456       ; encoding: [0xff,0x20,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x20,0x80,0xbe
+# GFX12: s_and_saveexec_b32 s0, -1               ; encoding: [0xc1,0x20,0x80,0xbe]
+
+0xf7,0x20,0x80,0xbe
+# GFX12: s_and_saveexec_b32 s0, -4.0             ; encoding: [0xf7,0x20,0x80,0xbe]
+
+0x7f,0x20,0x80,0xbe
+# GFX12: s_and_saveexec_b32 s0, exec_hi          ; encoding: [0x7f,0x20,0x80,0xbe]
+
+0x7e,0x20,0x80,0xbe
+# GFX12: s_and_saveexec_b32 s0, exec_lo          ; encoding: [0x7e,0x20,0x80,0xbe]
+
+0x7d,0x20,0x80,0xbe
+# GFX12: s_and_saveexec_b32 s0, m0               ; encoding: [0x7d,0x20,0x80,0xbe]
+
+0x68,0x20,0x80,0xbe
+# GFX12: s_and_saveexec_b32 s0, s104             ; encoding: [0x68,0x20,0x80,0xbe]
+
+0x01,0x20,0x80,0xbe
+# GFX12: s_and_saveexec_b32 s0, s1               ; encoding: [0x01,0x20,0x80,0xbe]
+
+0x6b,0x20,0x80,0xbe
+# GFX12: s_and_saveexec_b32 s0, vcc_hi           ; encoding: [0x6b,0x20,0x80,0xbe]
+
+0x6a,0x20,0x80,0xbe
+# GFX12: s_and_saveexec_b32 s0, vcc_lo           ; encoding: [0x6a,0x20,0x80,0xbe]
+
+0x68,0x20,0xe9,0xbe
+# GFX12: s_and_saveexec_b32 s105, s104           ; encoding: [0x68,0x20,0xe9,0xbe]
+
+0x01,0x20,0xe9,0xbe
+# GFX12: s_and_saveexec_b32 s105, s1             ; encoding: [0x01,0x20,0xe9,0xbe]
+
+0x01,0x20,0xeb,0xbe
+# GFX12: s_and_saveexec_b32 vcc_hi, s1           ; encoding: [0x01,0x20,0xeb,0xbe]
+
+0x01,0x20,0xea,0xbe
+# GFX12: s_and_saveexec_b32 vcc_lo, s1           ; encoding: [0x01,0x20,0xea,0xbe]
+
+0xf0,0x21,0x80,0xbe
+# GFX12: s_and_saveexec_b64 s[0:1], 0.5          ; encoding: [0xf0,0x21,0x80,0xbe]
+
+0x80,0x21,0x80,0xbe
+# GFX12: s_and_saveexec_b64 s[0:1], 0            ; encoding: [0x80,0x21,0x80,0xbe]
+
+0xff,0x21,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_and_saveexec_b64 s[0:1], 0x3f717273   ; encoding: [0xff,0x21,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x21,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_and_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xff,0x21,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x21,0x80,0xbe
+# GFX12: s_and_saveexec_b64 s[0:1], -1           ; encoding: [0xc1,0x21,0x80,0xbe]
+
+0xf7,0x21,0x80,0xbe
+# GFX12: s_and_saveexec_b64 s[0:1], -4.0         ; encoding: [0xf7,0x21,0x80,0xbe]
+
+0x7e,0x21,0x80,0xbe
+# GFX12: s_and_saveexec_b64 s[0:1], exec         ; encoding: [0x7e,0x21,0x80,0xbe]
+
+0x66,0x21,0x80,0xbe
+# GFX12: s_and_saveexec_b64 s[0:1], s[102:103]   ; encoding: [0x66,0x21,0x80,0xbe]
+
+0x02,0x21,0x80,0xbe
+# GFX12: s_and_saveexec_b64 s[0:1], s[2:3]       ; encoding: [0x02,0x21,0x80,0xbe]
+
+0x6a,0x21,0x80,0xbe
+# GFX12: s_and_saveexec_b64 s[0:1], vcc          ; encoding: [0x6a,0x21,0x80,0xbe]
+
+0x66,0x21,0xe8,0xbe
+# GFX12: s_and_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x21,0xe8,0xbe]
+
+0x02,0x21,0xe8,0xbe
+# GFX12: s_and_saveexec_b64 s[104:105], s[2:3]   ; encoding: [0x02,0x21,0xe8,0xbe]
+
+0x02,0x21,0xea,0xbe
+# GFX12: s_and_saveexec_b64 vcc, s[2:3]          ; encoding: [0x02,0x21,0xea,0xbe]
+
+0x01,0x16,0xff,0xbe
+# GFX12: s_bcnt0_i32_b32 exec_hi, s1             ; encoding: [0x01,0x16,0xff,0xbe]
+
+0x01,0x16,0xfe,0xbe
+# GFX12: s_bcnt0_i32_b32 exec_lo, s1             ; encoding: [0x01,0x16,0xfe,0xbe]
+
+0x01,0x16,0xfd,0xbe
+# GFX12: s_bcnt0_i32_b32 m0, s1                  ; encoding: [0x01,0x16,0xfd,0xbe]
+
+0xf0,0x16,0x80,0xbe
+# GFX12: s_bcnt0_i32_b32 s0, 0.5                 ; encoding: [0xf0,0x16,0x80,0xbe]
+
+0x80,0x16,0x80,0xbe
+# GFX12: s_bcnt0_i32_b32 s0, 0                   ; encoding: [0x80,0x16,0x80,0xbe]
+
+0xff,0x16,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_bcnt0_i32_b32 s0, 0x3f717273          ; encoding: [0xff,0x16,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x16,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_bcnt0_i32_b32 s0, 0xaf123456          ; encoding: [0xff,0x16,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x16,0x80,0xbe
+# GFX12: s_bcnt0_i32_b32 s0, -1                  ; encoding: [0xc1,0x16,0x80,0xbe]
+
+0xf7,0x16,0x80,0xbe
+# GFX12: s_bcnt0_i32_b32 s0, -4.0                ; encoding: [0xf7,0x16,0x80,0xbe]
+
+0x7f,0x16,0x80,0xbe
+# GFX12: s_bcnt0_i32_b32 s0, exec_hi             ; encoding: [0x7f,0x16,0x80,0xbe]
+
+0x7e,0x16,0x80,0xbe
+# GFX12: s_bcnt0_i32_b32 s0, exec_lo             ; encoding: [0x7e,0x16,0x80,0xbe]
+
+0x7d,0x16,0x80,0xbe
+# GFX12: s_bcnt0_i32_b32 s0, m0                  ; encoding: [0x7d,0x16,0x80,0xbe]
+
+0x68,0x16,0x80,0xbe
+# GFX12: s_bcnt0_i32_b32 s0, s104                ; encoding: [0x68,0x16,0x80,0xbe]
+
+0x01,0x16,0x80,0xbe
+# GFX12: s_bcnt0_i32_b32 s0, s1                  ; encoding: [0x01,0x16,0x80,0xbe]
+
+0x6b,0x16,0x80,0xbe
+# GFX12: s_bcnt0_i32_b32 s0, vcc_hi              ; encoding: [0x6b,0x16,0x80,0xbe]
+
+0x6a,0x16,0x80,0xbe
+# GFX12: s_bcnt0_i32_b32 s0, vcc_lo              ; encoding: [0x6a,0x16,0x80,0xbe]
+
+0x68,0x16,0xe9,0xbe
+# GFX12: s_bcnt0_i32_b32 s105, s104              ; encoding: [0x68,0x16,0xe9,0xbe]
+
+0x01,0x16,0xe9,0xbe
+# GFX12: s_bcnt0_i32_b32 s105, s1                ; encoding: [0x01,0x16,0xe9,0xbe]
+
+0x01,0x16,0xeb,0xbe
+# GFX12: s_bcnt0_i32_b32 vcc_hi, s1              ; encoding: [0x01,0x16,0xeb,0xbe]
+
+0x01,0x16,0xea,0xbe
+# GFX12: s_bcnt0_i32_b32 vcc_lo, s1              ; encoding: [0x01,0x16,0xea,0xbe]
+
+0x02,0x17,0xff,0xbe
+# GFX12: s_bcnt0_i32_b64 exec_hi, s[2:3]         ; encoding: [0x02,0x17,0xff,0xbe]
+
+0x02,0x17,0xfe,0xbe
+# GFX12: s_bcnt0_i32_b64 exec_lo, s[2:3]         ; encoding: [0x02,0x17,0xfe,0xbe]
+
+0x02,0x17,0xfd,0xbe
+# GFX12: s_bcnt0_i32_b64 m0, s[2:3]              ; encoding: [0x02,0x17,0xfd,0xbe]
+
+0xf0,0x17,0x80,0xbe
+# GFX12: s_bcnt0_i32_b64 s0, 0.5                 ; encoding: [0xf0,0x17,0x80,0xbe]
+
+0x80,0x17,0x80,0xbe
+# GFX12: s_bcnt0_i32_b64 s0, 0                   ; encoding: [0x80,0x17,0x80,0xbe]
+
+0xff,0x17,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_bcnt0_i32_b64 s0, 0x3f717273          ; encoding: [0xff,0x17,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x17,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_bcnt0_i32_b64 s0, 0xaf123456          ; encoding: [0xff,0x17,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x17,0x80,0xbe
+# GFX12: s_bcnt0_i32_b64 s0, -1                  ; encoding: [0xc1,0x17,0x80,0xbe]
+
+0xf7,0x17,0x80,0xbe
+# GFX12: s_bcnt0_i32_b64 s0, -4.0                ; encoding: [0xf7,0x17,0x80,0xbe]
+
+0x7e,0x17,0x80,0xbe
+# GFX12: s_bcnt0_i32_b64 s0, exec                ; encoding: [0x7e,0x17,0x80,0xbe]
+
+0x66,0x17,0x80,0xbe
+# GFX12: s_bcnt0_i32_b64 s0, s[102:103]          ; encoding: [0x66,0x17,0x80,0xbe]
+
+0x02,0x17,0x80,0xbe
+# GFX12: s_bcnt0_i32_b64 s0, s[2:3]              ; encoding: [0x02,0x17,0x80,0xbe]
+
+0x6a,0x17,0x80,0xbe
+# GFX12: s_bcnt0_i32_b64 s0, vcc                 ; encoding: [0x6a,0x17,0x80,0xbe]
+
+0x66,0x17,0xe9,0xbe
+# GFX12: s_bcnt0_i32_b64 s105, s[102:103]        ; encoding: [0x66,0x17,0xe9,0xbe]
+
+0x02,0x17,0xe9,0xbe
+# GFX12: s_bcnt0_i32_b64 s105, s[2:3]            ; encoding: [0x02,0x17,0xe9,0xbe]
+
+0x02,0x17,0xeb,0xbe
+# GFX12: s_bcnt0_i32_b64 vcc_hi, s[2:3]          ; encoding: [0x02,0x17,0xeb,0xbe]
+
+0x02,0x17,0xea,0xbe
+# GFX12: s_bcnt0_i32_b64 vcc_lo, s[2:3]          ; encoding: [0x02,0x17,0xea,0xbe]
+
+0x01,0x18,0xff,0xbe
+# GFX12: s_bcnt1_i32_b32 exec_hi, s1             ; encoding: [0x01,0x18,0xff,0xbe]
+
+0x01,0x18,0xfe,0xbe
+# GFX12: s_bcnt1_i32_b32 exec_lo, s1             ; encoding: [0x01,0x18,0xfe,0xbe]
+
+0x01,0x18,0xfd,0xbe
+# GFX12: s_bcnt1_i32_b32 m0, s1                  ; encoding: [0x01,0x18,0xfd,0xbe]
+
+0xf0,0x18,0x80,0xbe
+# GFX12: s_bcnt1_i32_b32 s0, 0.5                 ; encoding: [0xf0,0x18,0x80,0xbe]
+
+0x80,0x18,0x80,0xbe
+# GFX12: s_bcnt1_i32_b32 s0, 0                   ; encoding: [0x80,0x18,0x80,0xbe]
+
+0xff,0x18,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_bcnt1_i32_b32 s0, 0x3f717273          ; encoding: [0xff,0x18,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x18,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_bcnt1_i32_b32 s0, 0xaf123456          ; encoding: [0xff,0x18,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x18,0x80,0xbe
+# GFX12: s_bcnt1_i32_b32 s0, -1                  ; encoding: [0xc1,0x18,0x80,0xbe]
+
+0xf7,0x18,0x80,0xbe
+# GFX12: s_bcnt1_i32_b32 s0, -4.0                ; encoding: [0xf7,0x18,0x80,0xbe]
+
+0x7f,0x18,0x80,0xbe
+# GFX12: s_bcnt1_i32_b32 s0, exec_hi             ; encoding: [0x7f,0x18,0x80,0xbe]
+
+0x7e,0x18,0x80,0xbe
+# GFX12: s_bcnt1_i32_b32 s0, exec_lo             ; encoding: [0x7e,0x18,0x80,0xbe]
+
+0x7d,0x18,0x80,0xbe
+# GFX12: s_bcnt1_i32_b32 s0, m0                  ; encoding: [0x7d,0x18,0x80,0xbe]
+
+0x68,0x18,0x80,0xbe
+# GFX12: s_bcnt1_i32_b32 s0, s104                ; encoding: [0x68,0x18,0x80,0xbe]
+
+0x01,0x18,0x80,0xbe
+# GFX12: s_bcnt1_i32_b32 s0, s1                  ; encoding: [0x01,0x18,0x80,0xbe]
+
+0x6b,0x18,0x80,0xbe
+# GFX12: s_bcnt1_i32_b32 s0, vcc_hi              ; encoding: [0x6b,0x18,0x80,0xbe]
+
+0x6a,0x18,0x80,0xbe
+# GFX12: s_bcnt1_i32_b32 s0, vcc_lo              ; encoding: [0x6a,0x18,0x80,0xbe]
+
+0x68,0x18,0xe9,0xbe
+# GFX12: s_bcnt1_i32_b32 s105, s104              ; encoding: [0x68,0x18,0xe9,0xbe]
+
+0x01,0x18,0xe9,0xbe
+# GFX12: s_bcnt1_i32_b32 s105, s1                ; encoding: [0x01,0x18,0xe9,0xbe]
+
+0x01,0x18,0xeb,0xbe
+# GFX12: s_bcnt1_i32_b32 vcc_hi, s1              ; encoding: [0x01,0x18,0xeb,0xbe]
+
+0x01,0x18,0xea,0xbe
+# GFX12: s_bcnt1_i32_b32 vcc_lo, s1              ; encoding: [0x01,0x18,0xea,0xbe]
+
+0x02,0x19,0xff,0xbe
+# GFX12: s_bcnt1_i32_b64 exec_hi, s[2:3]         ; encoding: [0x02,0x19,0xff,0xbe]
+
+0x02,0x19,0xfe,0xbe
+# GFX12: s_bcnt1_i32_b64 exec_lo, s[2:3]         ; encoding: [0x02,0x19,0xfe,0xbe]
+
+0x02,0x19,0xfd,0xbe
+# GFX12: s_bcnt1_i32_b64 m0, s[2:3]              ; encoding: [0x02,0x19,0xfd,0xbe]
+
+0xf0,0x19,0x80,0xbe
+# GFX12: s_bcnt1_i32_b64 s0, 0.5                 ; encoding: [0xf0,0x19,0x80,0xbe]
+
+0x80,0x19,0x80,0xbe
+# GFX12: s_bcnt1_i32_b64 s0, 0                   ; encoding: [0x80,0x19,0x80,0xbe]
+
+0xff,0x19,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_bcnt1_i32_b64 s0, 0x3f717273          ; encoding: [0xff,0x19,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x19,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_bcnt1_i32_b64 s0, 0xaf123456          ; encoding: [0xff,0x19,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x19,0x80,0xbe
+# GFX12: s_bcnt1_i32_b64 s0, -1                  ; encoding: [0xc1,0x19,0x80,0xbe]
+
+0xf7,0x19,0x80,0xbe
+# GFX12: s_bcnt1_i32_b64 s0, -4.0                ; encoding: [0xf7,0x19,0x80,0xbe]
+
+0x7e,0x19,0x80,0xbe
+# GFX12: s_bcnt1_i32_b64 s0, exec                ; encoding: [0x7e,0x19,0x80,0xbe]
+
+0x66,0x19,0x80,0xbe
+# GFX12: s_bcnt1_i32_b64 s0, s[102:103]          ; encoding: [0x66,0x19,0x80,0xbe]
+
+0x02,0x19,0x80,0xbe
+# GFX12: s_bcnt1_i32_b64 s0, s[2:3]              ; encoding: [0x02,0x19,0x80,0xbe]
+
+0x6a,0x19,0x80,0xbe
+# GFX12: s_bcnt1_i32_b64 s0, vcc                 ; encoding: [0x6a,0x19,0x80,0xbe]
+
+0x66,0x19,0xe9,0xbe
+# GFX12: s_bcnt1_i32_b64 s105, s[102:103]        ; encoding: [0x66,0x19,0xe9,0xbe]
+
+0x02,0x19,0xe9,0xbe
+# GFX12: s_bcnt1_i32_b64 s105, s[2:3]            ; encoding: [0x02,0x19,0xe9,0xbe]
+
+0x02,0x19,0xeb,0xbe
+# GFX12: s_bcnt1_i32_b64 vcc_hi, s[2:3]          ; encoding: [0x02,0x19,0xeb,0xbe]
+
+0x02,0x19,0xea,0xbe
+# GFX12: s_bcnt1_i32_b64 vcc_lo, s[2:3]          ; encoding: [0x02,0x19,0xea,0xbe]
+
+0x02,0x14,0xfe,0xbe
+# GFX12: s_bitreplicate_b64_b32 exec, s2         ; encoding: [0x02,0x14,0xfe,0xbe]
+
+0xf0,0x14,0x80,0xbe
+# GFX12: s_bitreplicate_b64_b32 s[0:1], 0.5      ; encoding: [0xf0,0x14,0x80,0xbe]
+
+0x80,0x14,0x80,0xbe
+# GFX12: s_bitreplicate_b64_b32 s[0:1], 0        ; encoding: [0x80,0x14,0x80,0xbe]
+
+0xff,0x14,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_bitreplicate_b64_b32 s[0:1], 0x3f717273 ; encoding: [0xff,0x14,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x14,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_bitreplicate_b64_b32 s[0:1], 0xaf123456 ; encoding: [0xff,0x14,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x14,0x80,0xbe
+# GFX12: s_bitreplicate_b64_b32 s[0:1], -1       ; encoding: [0xc1,0x14,0x80,0xbe]
+
+0xf7,0x14,0x80,0xbe
+# GFX12: s_bitreplicate_b64_b32 s[0:1], -4.0     ; encoding: [0xf7,0x14,0x80,0xbe]
+
+0x7f,0x14,0x80,0xbe
+# GFX12: s_bitreplicate_b64_b32 s[0:1], exec_hi  ; encoding: [0x7f,0x14,0x80,0xbe]
+
+0x7e,0x14,0x80,0xbe
+# GFX12: s_bitreplicate_b64_b32 s[0:1], exec_lo  ; encoding: [0x7e,0x14,0x80,0xbe]
+
+0x7d,0x14,0x80,0xbe
+# GFX12: s_bitreplicate_b64_b32 s[0:1], m0       ; encoding: [0x7d,0x14,0x80,0xbe]
+
+0x66,0x14,0x80,0xbe
+# GFX12: s_bitreplicate_b64_b32 s[0:1], s102     ; encoding: [0x66,0x14,0x80,0xbe]
+
+0x02,0x14,0x80,0xbe
+# GFX12: s_bitreplicate_b64_b32 s[0:1], s2       ; encoding: [0x02,0x14,0x80,0xbe]
+
+0x6b,0x14,0x80,0xbe
+# GFX12: s_bitreplicate_b64_b32 s[0:1], vcc_hi   ; encoding: [0x6b,0x14,0x80,0xbe]
+
+0x6a,0x14,0x80,0xbe
+# GFX12: s_bitreplicate_b64_b32 s[0:1], vcc_lo   ; encoding: [0x6a,0x14,0x80,0xbe]
+
+0x66,0x14,0xe8,0xbe
+# GFX12: s_bitreplicate_b64_b32 s[104:105], s102 ; encoding: [0x66,0x14,0xe8,0xbe]
+
+0x02,0x14,0xe8,0xbe
+# GFX12: s_bitreplicate_b64_b32 s[104:105], s2   ; encoding: [0x02,0x14,0xe8,0xbe]
+
+0x02,0x14,0xea,0xbe
+# GFX12: s_bitreplicate_b64_b32 vcc, s2          ; encoding: [0x02,0x14,0xea,0xbe]
+
+0x01,0x10,0xff,0xbe
+# GFX12: s_bitset0_b32 exec_hi, s1               ; encoding: [0x01,0x10,0xff,0xbe]
+
+0x01,0x10,0xfe,0xbe
+# GFX12: s_bitset0_b32 exec_lo, s1               ; encoding: [0x01,0x10,0xfe,0xbe]
+
+0x01,0x10,0xfd,0xbe
+# GFX12: s_bitset0_b32 m0, s1                    ; encoding: [0x01,0x10,0xfd,0xbe]
+
+0xf0,0x10,0x80,0xbe
+# GFX12: s_bitset0_b32 s0, 0.5                   ; encoding: [0xf0,0x10,0x80,0xbe]
+
+0x80,0x10,0x80,0xbe
+# GFX12: s_bitset0_b32 s0, 0                     ; encoding: [0x80,0x10,0x80,0xbe]
+
+0xff,0x10,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_bitset0_b32 s0, 0x3f717273            ; encoding: [0xff,0x10,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x10,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_bitset0_b32 s0, 0xaf123456            ; encoding: [0xff,0x10,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x10,0x80,0xbe
+# GFX12: s_bitset0_b32 s0, -1                    ; encoding: [0xc1,0x10,0x80,0xbe]
+
+0xf7,0x10,0x80,0xbe
+# GFX12: s_bitset0_b32 s0, -4.0                  ; encoding: [0xf7,0x10,0x80,0xbe]
+
+0x7f,0x10,0x80,0xbe
+# GFX12: s_bitset0_b32 s0, exec_hi               ; encoding: [0x7f,0x10,0x80,0xbe]
+
+0x7e,0x10,0x80,0xbe
+# GFX12: s_bitset0_b32 s0, exec_lo               ; encoding: [0x7e,0x10,0x80,0xbe]
+
+0x7d,0x10,0x80,0xbe
+# GFX12: s_bitset0_b32 s0, m0                    ; encoding: [0x7d,0x10,0x80,0xbe]
+
+0x68,0x10,0x80,0xbe
+# GFX12: s_bitset0_b32 s0, s104                  ; encoding: [0x68,0x10,0x80,0xbe]
+
+0x01,0x10,0x80,0xbe
+# GFX12: s_bitset0_b32 s0, s1                    ; encoding: [0x01,0x10,0x80,0xbe]
+
+0x6b,0x10,0x80,0xbe
+# GFX12: s_bitset0_b32 s0, vcc_hi                ; encoding: [0x6b,0x10,0x80,0xbe]
+
+0x6a,0x10,0x80,0xbe
+# GFX12: s_bitset0_b32 s0, vcc_lo                ; encoding: [0x6a,0x10,0x80,0xbe]
+
+0x68,0x10,0xe9,0xbe
+# GFX12: s_bitset0_b32 s105, s104                ; encoding: [0x68,0x10,0xe9,0xbe]
+
+0x01,0x10,0xe9,0xbe
+# GFX12: s_bitset0_b32 s105, s1                  ; encoding: [0x01,0x10,0xe9,0xbe]
+
+0x01,0x10,0xeb,0xbe
+# GFX12: s_bitset0_b32 vcc_hi, s1                ; encoding: [0x01,0x10,0xeb,0xbe]
+
+0x01,0x10,0xea,0xbe
+# GFX12: s_bitset0_b32 vcc_lo, s1                ; encoding: [0x01,0x10,0xea,0xbe]
+
+0x02,0x11,0xfe,0xbe
+# GFX12: s_bitset0_b64 exec, s2                  ; encoding: [0x02,0x11,0xfe,0xbe]
+
+0xf0,0x11,0x80,0xbe
+# GFX12: s_bitset0_b64 s[0:1], 0.5               ; encoding: [0xf0,0x11,0x80,0xbe]
+
+0x80,0x11,0x80,0xbe
+# GFX12: s_bitset0_b64 s[0:1], 0                 ; encoding: [0x80,0x11,0x80,0xbe]
+
+0xff,0x11,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_bitset0_b64 s[0:1], 0x3f717273        ; encoding: [0xff,0x11,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x11,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_bitset0_b64 s[0:1], 0xaf123456        ; encoding: [0xff,0x11,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x11,0x80,0xbe
+# GFX12: s_bitset0_b64 s[0:1], -1                ; encoding: [0xc1,0x11,0x80,0xbe]
+
+0xf7,0x11,0x80,0xbe
+# GFX12: s_bitset0_b64 s[0:1], -4.0              ; encoding: [0xf7,0x11,0x80,0xbe]
+
+0x7f,0x11,0x80,0xbe
+# GFX12: s_bitset0_b64 s[0:1], exec_hi           ; encoding: [0x7f,0x11,0x80,0xbe]
+
+0x7e,0x11,0x80,0xbe
+# GFX12: s_bitset0_b64 s[0:1], exec_lo           ; encoding: [0x7e,0x11,0x80,0xbe]
+
+0x7d,0x11,0x80,0xbe
+# GFX12: s_bitset0_b64 s[0:1], m0                ; encoding: [0x7d,0x11,0x80,0xbe]
+
+0x66,0x11,0x80,0xbe
+# GFX12: s_bitset0_b64 s[0:1], s102              ; encoding: [0x66,0x11,0x80,0xbe]
+
+0x02,0x11,0x80,0xbe
+# GFX12: s_bitset0_b64 s[0:1], s2                ; encoding: [0x02,0x11,0x80,0xbe]
+
+0x6b,0x11,0x80,0xbe
+# GFX12: s_bitset0_b64 s[0:1], vcc_hi            ; encoding: [0x6b,0x11,0x80,0xbe]
+
+0x6a,0x11,0x80,0xbe
+# GFX12: s_bitset0_b64 s[0:1], vcc_lo            ; encoding: [0x6a,0x11,0x80,0xbe]
+
+0x66,0x11,0xe8,0xbe
+# GFX12: s_bitset0_b64 s[104:105], s102          ; encoding: [0x66,0x11,0xe8,0xbe]
+
+0x02,0x11,0xe8,0xbe
+# GFX12: s_bitset0_b64 s[104:105], s2            ; encoding: [0x02,0x11,0xe8,0xbe]
+
+0x02,0x11,0xea,0xbe
+# GFX12: s_bitset0_b64 vcc, s2                   ; encoding: [0x02,0x11,0xea,0xbe]
+
+0x01,0x12,0xff,0xbe
+# GFX12: s_bitset1_b32 exec_hi, s1               ; encoding: [0x01,0x12,0xff,0xbe]
+
+0x01,0x12,0xfe,0xbe
+# GFX12: s_bitset1_b32 exec_lo, s1               ; encoding: [0x01,0x12,0xfe,0xbe]
+
+0x01,0x12,0xfd,0xbe
+# GFX12: s_bitset1_b32 m0, s1                    ; encoding: [0x01,0x12,0xfd,0xbe]
+
+0xf0,0x12,0x80,0xbe
+# GFX12: s_bitset1_b32 s0, 0.5                   ; encoding: [0xf0,0x12,0x80,0xbe]
+
+0x80,0x12,0x80,0xbe
+# GFX12: s_bitset1_b32 s0, 0                     ; encoding: [0x80,0x12,0x80,0xbe]
+
+0xff,0x12,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_bitset1_b32 s0, 0x3f717273            ; encoding: [0xff,0x12,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x12,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_bitset1_b32 s0, 0xaf123456            ; encoding: [0xff,0x12,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x12,0x80,0xbe
+# GFX12: s_bitset1_b32 s0, -1                    ; encoding: [0xc1,0x12,0x80,0xbe]
+
+0xf7,0x12,0x80,0xbe
+# GFX12: s_bitset1_b32 s0, -4.0                  ; encoding: [0xf7,0x12,0x80,0xbe]
+
+0x7f,0x12,0x80,0xbe
+# GFX12: s_bitset1_b32 s0, exec_hi               ; encoding: [0x7f,0x12,0x80,0xbe]
+
+0x7e,0x12,0x80,0xbe
+# GFX12: s_bitset1_b32 s0, exec_lo               ; encoding: [0x7e,0x12,0x80,0xbe]
+
+0x7d,0x12,0x80,0xbe
+# GFX12: s_bitset1_b32 s0, m0                    ; encoding: [0x7d,0x12,0x80,0xbe]
+
+0x68,0x12,0x80,0xbe
+# GFX12: s_bitset1_b32 s0, s104                  ; encoding: [0x68,0x12,0x80,0xbe]
+
+0x01,0x12,0x80,0xbe
+# GFX12: s_bitset1_b32 s0, s1                    ; encoding: [0x01,0x12,0x80,0xbe]
+
+0x6b,0x12,0x80,0xbe
+# GFX12: s_bitset1_b32 s0, vcc_hi                ; encoding: [0x6b,0x12,0x80,0xbe]
+
+0x6a,0x12,0x80,0xbe
+# GFX12: s_bitset1_b32 s0, vcc_lo                ; encoding: [0x6a,0x12,0x80,0xbe]
+
+0x68,0x12,0xe9,0xbe
+# GFX12: s_bitset1_b32 s105, s104                ; encoding: [0x68,0x12,0xe9,0xbe]
+
+0x01,0x12,0xe9,0xbe
+# GFX12: s_bitset1_b32 s105, s1                  ; encoding: [0x01,0x12,0xe9,0xbe]
+
+0x01,0x12,0xeb,0xbe
+# GFX12: s_bitset1_b32 vcc_hi, s1                ; encoding: [0x01,0x12,0xeb,0xbe]
+
+0x01,0x12,0xea,0xbe
+# GFX12: s_bitset1_b32 vcc_lo, s1                ; encoding: [0x01,0x12,0xea,0xbe]
+
+0x02,0x13,0xfe,0xbe
+# GFX12: s_bitset1_b64 exec, s2                  ; encoding: [0x02,0x13,0xfe,0xbe]
+
+0xf0,0x13,0x80,0xbe
+# GFX12: s_bitset1_b64 s[0:1], 0.5               ; encoding: [0xf0,0x13,0x80,0xbe]
+
+0x80,0x13,0x80,0xbe
+# GFX12: s_bitset1_b64 s[0:1], 0                 ; encoding: [0x80,0x13,0x80,0xbe]
+
+0xff,0x13,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_bitset1_b64 s[0:1], 0x3f717273        ; encoding: [0xff,0x13,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x13,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_bitset1_b64 s[0:1], 0xaf123456        ; encoding: [0xff,0x13,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x13,0x80,0xbe
+# GFX12: s_bitset1_b64 s[0:1], -1                ; encoding: [0xc1,0x13,0x80,0xbe]
+
+0xf7,0x13,0x80,0xbe
+# GFX12: s_bitset1_b64 s[0:1], -4.0              ; encoding: [0xf7,0x13,0x80,0xbe]
+
+0x7f,0x13,0x80,0xbe
+# GFX12: s_bitset1_b64 s[0:1], exec_hi           ; encoding: [0x7f,0x13,0x80,0xbe]
+
+0x7e,0x13,0x80,0xbe
+# GFX12: s_bitset1_b64 s[0:1], exec_lo           ; encoding: [0x7e,0x13,0x80,0xbe]
+
+0x7d,0x13,0x80,0xbe
+# GFX12: s_bitset1_b64 s[0:1], m0                ; encoding: [0x7d,0x13,0x80,0xbe]
+
+0x66,0x13,0x80,0xbe
+# GFX12: s_bitset1_b64 s[0:1], s102              ; encoding: [0x66,0x13,0x80,0xbe]
+
+0x02,0x13,0x80,0xbe
+# GFX12: s_bitset1_b64 s[0:1], s2                ; encoding: [0x02,0x13,0x80,0xbe]
+
+0x6b,0x13,0x80,0xbe
+# GFX12: s_bitset1_b64 s[0:1], vcc_hi            ; encoding: [0x6b,0x13,0x80,0xbe]
+
+0x6a,0x13,0x80,0xbe
+# GFX12: s_bitset1_b64 s[0:1], vcc_lo            ; encoding: [0x6a,0x13,0x80,0xbe]
+
+0x66,0x13,0xe8,0xbe
+# GFX12: s_bitset1_b64 s[104:105], s102          ; encoding: [0x66,0x13,0xe8,0xbe]
+
+0x02,0x13,0xe8,0xbe
+# GFX12: s_bitset1_b64 s[104:105], s2            ; encoding: [0x02,0x13,0xe8,0xbe]
+
+0x02,0x13,0xea,0xbe
+# GFX12: s_bitset1_b64 vcc, s2                   ; encoding: [0x02,0x13,0xea,0xbe]
+
+0x01,0x04,0xff,0xbe
+# GFX12: s_brev_b32 exec_hi, s1                  ; encoding: [0x01,0x04,0xff,0xbe]
+
+0x01,0x04,0xfe,0xbe
+# GFX12: s_brev_b32 exec_lo, s1                  ; encoding: [0x01,0x04,0xfe,0xbe]
+
+0x01,0x04,0xfd,0xbe
+# GFX12: s_brev_b32 m0, s1                       ; encoding: [0x01,0x04,0xfd,0xbe]
+
+0xf0,0x04,0x80,0xbe
+# GFX12: s_brev_b32 s0, 0.5                      ; encoding: [0xf0,0x04,0x80,0xbe]
+
+0x80,0x04,0x80,0xbe
+# GFX12: s_brev_b32 s0, 0                        ; encoding: [0x80,0x04,0x80,0xbe]
+
+0xff,0x04,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_brev_b32 s0, 0x3f717273               ; encoding: [0xff,0x04,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x04,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_brev_b32 s0, 0xaf123456               ; encoding: [0xff,0x04,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x04,0x80,0xbe
+# GFX12: s_brev_b32 s0, -1                       ; encoding: [0xc1,0x04,0x80,0xbe]
+
+0xf7,0x04,0x80,0xbe
+# GFX12: s_brev_b32 s0, -4.0                     ; encoding: [0xf7,0x04,0x80,0xbe]
+
+0x7f,0x04,0x80,0xbe
+# GFX12: s_brev_b32 s0, exec_hi                  ; encoding: [0x7f,0x04,0x80,0xbe]
+
+0x7e,0x04,0x80,0xbe
+# GFX12: s_brev_b32 s0, exec_lo                  ; encoding: [0x7e,0x04,0x80,0xbe]
+
+0x7d,0x04,0x80,0xbe
+# GFX12: s_brev_b32 s0, m0                       ; encoding: [0x7d,0x04,0x80,0xbe]
+
+0x68,0x04,0x80,0xbe
+# GFX12: s_brev_b32 s0, s104                     ; encoding: [0x68,0x04,0x80,0xbe]
+
+0x01,0x04,0x80,0xbe
+# GFX12: s_brev_b32 s0, s1                       ; encoding: [0x01,0x04,0x80,0xbe]
+
+0x6b,0x04,0x80,0xbe
+# GFX12: s_brev_b32 s0, vcc_hi                   ; encoding: [0x6b,0x04,0x80,0xbe]
+
+0x6a,0x04,0x80,0xbe
+# GFX12: s_brev_b32 s0, vcc_lo                   ; encoding: [0x6a,0x04,0x80,0xbe]
+
+0x68,0x04,0xe9,0xbe
+# GFX12: s_brev_b32 s105, s104                   ; encoding: [0x68,0x04,0xe9,0xbe]
+
+0x01,0x04,0xe9,0xbe
+# GFX12: s_brev_b32 s105, s1                     ; encoding: [0x01,0x04,0xe9,0xbe]
+
+0x01,0x04,0xeb,0xbe
+# GFX12: s_brev_b32 vcc_hi, s1                   ; encoding: [0x01,0x04,0xeb,0xbe]
+
+0x01,0x04,0xea,0xbe
+# GFX12: s_brev_b32 vcc_lo, s1                   ; encoding: [0x01,0x04,0xea,0xbe]
+
+0x02,0x05,0xfe,0xbe
+# GFX12: s_brev_b64 exec, s[2:3]                 ; encoding: [0x02,0x05,0xfe,0xbe]
+
+0xf0,0x05,0x80,0xbe
+# GFX12: s_brev_b64 s[0:1], 0.5                  ; encoding: [0xf0,0x05,0x80,0xbe]
+
+0x80,0x05,0x80,0xbe
+# GFX12: s_brev_b64 s[0:1], 0                    ; encoding: [0x80,0x05,0x80,0xbe]
+
+0xff,0x05,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_brev_b64 s[0:1], 0x3f717273           ; encoding: [0xff,0x05,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x05,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_brev_b64 s[0:1], 0xaf123456           ; encoding: [0xff,0x05,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x05,0x80,0xbe
+# GFX12: s_brev_b64 s[0:1], -1                   ; encoding: [0xc1,0x05,0x80,0xbe]
+
+0xf7,0x05,0x80,0xbe
+# GFX12: s_brev_b64 s[0:1], -4.0                 ; encoding: [0xf7,0x05,0x80,0xbe]
+
+0x7e,0x05,0x80,0xbe
+# GFX12: s_brev_b64 s[0:1], exec                 ; encoding: [0x7e,0x05,0x80,0xbe]
+
+0x66,0x05,0x80,0xbe
+# GFX12: s_brev_b64 s[0:1], s[102:103]           ; encoding: [0x66,0x05,0x80,0xbe]
+
+0x02,0x05,0x80,0xbe
+# GFX12: s_brev_b64 s[0:1], s[2:3]               ; encoding: [0x02,0x05,0x80,0xbe]
+
+0x6a,0x05,0x80,0xbe
+# GFX12: s_brev_b64 s[0:1], vcc                  ; encoding: [0x6a,0x05,0x80,0xbe]
+
+0x66,0x05,0xe8,0xbe
+# GFX12: s_brev_b64 s[104:105], s[102:103]       ; encoding: [0x66,0x05,0xe8,0xbe]
+
+0x02,0x05,0xe8,0xbe
+# GFX12: s_brev_b64 s[104:105], s[2:3]           ; encoding: [0x02,0x05,0xe8,0xbe]
+
+0x02,0x05,0xea,0xbe
+# GFX12: s_brev_b64 vcc, s[2:3]                  ; encoding: [0x02,0x05,0xea,0xbe]
+
+0x01,0x0c,0xff,0xbe
+# GFX12: s_cls_i32 exec_hi, s1                   ; encoding: [0x01,0x0c,0xff,0xbe]
+
+0x01,0x0c,0xfe,0xbe
+# GFX12: s_cls_i32 exec_lo, s1                   ; encoding: [0x01,0x0c,0xfe,0xbe]
+
+0x02,0x0d,0xff,0xbe
+# GFX12: s_cls_i32_i64 exec_hi, s[2:3]           ; encoding: [0x02,0x0d,0xff,0xbe]
+
+0x02,0x0d,0xfe,0xbe
+# GFX12: s_cls_i32_i64 exec_lo, s[2:3]           ; encoding: [0x02,0x0d,0xfe,0xbe]
+
+0x02,0x0d,0xfd,0xbe
+# GFX12: s_cls_i32_i64 m0, s[2:3]                ; encoding: [0x02,0x0d,0xfd,0xbe]
+
+0xf0,0x0d,0x80,0xbe
+# GFX12: s_cls_i32_i64 s0, 0.5                   ; encoding: [0xf0,0x0d,0x80,0xbe]
+
+0x80,0x0d,0x80,0xbe
+# GFX12: s_cls_i32_i64 s0, 0                     ; encoding: [0x80,0x0d,0x80,0xbe]
+
+0xff,0x0d,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_cls_i32_i64 s0, 0x3f717273            ; encoding: [0xff,0x0d,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x0d,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_cls_i32_i64 s0, 0xaf123456            ; encoding: [0xff,0x0d,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x0d,0x80,0xbe
+# GFX12: s_cls_i32_i64 s0, -1                    ; encoding: [0xc1,0x0d,0x80,0xbe]
+
+0xf7,0x0d,0x80,0xbe
+# GFX12: s_cls_i32_i64 s0, -4.0                  ; encoding: [0xf7,0x0d,0x80,0xbe]
+
+0x7e,0x0d,0x80,0xbe
+# GFX12: s_cls_i32_i64 s0, exec                  ; encoding: [0x7e,0x0d,0x80,0xbe]
+
+0x66,0x0d,0x80,0xbe
+# GFX12: s_cls_i32_i64 s0, s[102:103]            ; encoding: [0x66,0x0d,0x80,0xbe]
+
+0x02,0x0d,0x80,0xbe
+# GFX12: s_cls_i32_i64 s0, s[2:3]                ; encoding: [0x02,0x0d,0x80,0xbe]
+
+0x6a,0x0d,0x80,0xbe
+# GFX12: s_cls_i32_i64 s0, vcc                   ; encoding: [0x6a,0x0d,0x80,0xbe]
+
+0x66,0x0d,0xe9,0xbe
+# GFX12: s_cls_i32_i64 s105, s[102:103]          ; encoding: [0x66,0x0d,0xe9,0xbe]
+
+0x02,0x0d,0xe9,0xbe
+# GFX12: s_cls_i32_i64 s105, s[2:3]              ; encoding: [0x02,0x0d,0xe9,0xbe]
+
+0x02,0x0d,0xeb,0xbe
+# GFX12: s_cls_i32_i64 vcc_hi, s[2:3]            ; encoding: [0x02,0x0d,0xeb,0xbe]
+
+0x02,0x0d,0xea,0xbe
+# GFX12: s_cls_i32_i64 vcc_lo, s[2:3]            ; encoding: [0x02,0x0d,0xea,0xbe]
+
+0x01,0x0c,0xfd,0xbe
+# GFX12: s_cls_i32 m0, s1                        ; encoding: [0x01,0x0c,0xfd,0xbe]
+
+0xf0,0x0c,0x80,0xbe
+# GFX12: s_cls_i32 s0, 0.5                       ; encoding: [0xf0,0x0c,0x80,0xbe]
+
+0x80,0x0c,0x80,0xbe
+# GFX12: s_cls_i32 s0, 0                         ; encoding: [0x80,0x0c,0x80,0xbe]
+
+0xff,0x0c,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_cls_i32 s0, 0x3f717273                ; encoding: [0xff,0x0c,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x0c,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_cls_i32 s0, 0xaf123456                ; encoding: [0xff,0x0c,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x0c,0x80,0xbe
+# GFX12: s_cls_i32 s0, -1                        ; encoding: [0xc1,0x0c,0x80,0xbe]
+
+0xf7,0x0c,0x80,0xbe
+# GFX12: s_cls_i32 s0, -4.0                      ; encoding: [0xf7,0x0c,0x80,0xbe]
+
+0x7f,0x0c,0x80,0xbe
+# GFX12: s_cls_i32 s0, exec_hi                   ; encoding: [0x7f,0x0c,0x80,0xbe]
+
+0x7e,0x0c,0x80,0xbe
+# GFX12: s_cls_i32 s0, exec_lo                   ; encoding: [0x7e,0x0c,0x80,0xbe]
+
+0x7d,0x0c,0x80,0xbe
+# GFX12: s_cls_i32 s0, m0                        ; encoding: [0x7d,0x0c,0x80,0xbe]
+
+0x68,0x0c,0x80,0xbe
+# GFX12: s_cls_i32 s0, s104                      ; encoding: [0x68,0x0c,0x80,0xbe]
+
+0x01,0x0c,0x80,0xbe
+# GFX12: s_cls_i32 s0, s1                        ; encoding: [0x01,0x0c,0x80,0xbe]
+
+0x6b,0x0c,0x80,0xbe
+# GFX12: s_cls_i32 s0, vcc_hi                    ; encoding: [0x6b,0x0c,0x80,0xbe]
+
+0x6a,0x0c,0x80,0xbe
+# GFX12: s_cls_i32 s0, vcc_lo                    ; encoding: [0x6a,0x0c,0x80,0xbe]
+
+0x68,0x0c,0xe9,0xbe
+# GFX12: s_cls_i32 s105, s104                    ; encoding: [0x68,0x0c,0xe9,0xbe]
+
+0x01,0x0c,0xe9,0xbe
+# GFX12: s_cls_i32 s105, s1                      ; encoding: [0x01,0x0c,0xe9,0xbe]
+
+0x01,0x0c,0xeb,0xbe
+# GFX12: s_cls_i32 vcc_hi, s1                    ; encoding: [0x01,0x0c,0xeb,0xbe]
+
+0x01,0x0c,0xea,0xbe
+# GFX12: s_cls_i32 vcc_lo, s1                    ; encoding: [0x01,0x0c,0xea,0xbe]
+
+0x01,0x0a,0xff,0xbe
+# GFX12: s_clz_i32_u32 exec_hi, s1               ; encoding: [0x01,0x0a,0xff,0xbe]
+
+0x01,0x0a,0xfe,0xbe
+# GFX12: s_clz_i32_u32 exec_lo, s1               ; encoding: [0x01,0x0a,0xfe,0xbe]
+
+0x01,0x0a,0xfd,0xbe
+# GFX12: s_clz_i32_u32 m0, s1                    ; encoding: [0x01,0x0a,0xfd,0xbe]
+
+0xf0,0x0a,0x80,0xbe
+# GFX12: s_clz_i32_u32 s0, 0.5                   ; encoding: [0xf0,0x0a,0x80,0xbe]
+
+0x80,0x0a,0x80,0xbe
+# GFX12: s_clz_i32_u32 s0, 0                     ; encoding: [0x80,0x0a,0x80,0xbe]
+
+0xff,0x0a,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_clz_i32_u32 s0, 0x3f717273            ; encoding: [0xff,0x0a,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x0a,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_clz_i32_u32 s0, 0xaf123456            ; encoding: [0xff,0x0a,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x0a,0x80,0xbe
+# GFX12: s_clz_i32_u32 s0, -1                    ; encoding: [0xc1,0x0a,0x80,0xbe]
+
+0xf7,0x0a,0x80,0xbe
+# GFX12: s_clz_i32_u32 s0, -4.0                  ; encoding: [0xf7,0x0a,0x80,0xbe]
+
+0x7f,0x0a,0x80,0xbe
+# GFX12: s_clz_i32_u32 s0, exec_hi               ; encoding: [0x7f,0x0a,0x80,0xbe]
+
+0x7e,0x0a,0x80,0xbe
+# GFX12: s_clz_i32_u32 s0, exec_lo               ; encoding: [0x7e,0x0a,0x80,0xbe]
+
+0x7d,0x0a,0x80,0xbe
+# GFX12: s_clz_i32_u32 s0, m0                    ; encoding: [0x7d,0x0a,0x80,0xbe]
+
+0x68,0x0a,0x80,0xbe
+# GFX12: s_clz_i32_u32 s0, s104                  ; encoding: [0x68,0x0a,0x80,0xbe]
+
+0x01,0x0a,0x80,0xbe
+# GFX12: s_clz_i32_u32 s0, s1                    ; encoding: [0x01,0x0a,0x80,0xbe]
+
+0x6b,0x0a,0x80,0xbe
+# GFX12: s_clz_i32_u32 s0, vcc_hi                ; encoding: [0x6b,0x0a,0x80,0xbe]
+
+0x6a,0x0a,0x80,0xbe
+# GFX12: s_clz_i32_u32 s0, vcc_lo                ; encoding: [0x6a,0x0a,0x80,0xbe]
+
+0x68,0x0a,0xe9,0xbe
+# GFX12: s_clz_i32_u32 s105, s104                ; encoding: [0x68,0x0a,0xe9,0xbe]
+
+0x01,0x0a,0xe9,0xbe
+# GFX12: s_clz_i32_u32 s105, s1                  ; encoding: [0x01,0x0a,0xe9,0xbe]
+
+0x01,0x0a,0xeb,0xbe
+# GFX12: s_clz_i32_u32 vcc_hi, s1                ; encoding: [0x01,0x0a,0xeb,0xbe]
+
+0x01,0x0a,0xea,0xbe
+# GFX12: s_clz_i32_u32 vcc_lo, s1                ; encoding: [0x01,0x0a,0xea,0xbe]
+
+0x02,0x0b,0xff,0xbe
+# GFX12: s_clz_i32_u64 exec_hi, s[2:3]           ; encoding: [0x02,0x0b,0xff,0xbe]
+
+0x02,0x0b,0xfe,0xbe
+# GFX12: s_clz_i32_u64 exec_lo, s[2:3]           ; encoding: [0x02,0x0b,0xfe,0xbe]
+
+0x02,0x0b,0xfd,0xbe
+# GFX12: s_clz_i32_u64 m0, s[2:3]                ; encoding: [0x02,0x0b,0xfd,0xbe]
+
+0xf0,0x0b,0x80,0xbe
+# GFX12: s_clz_i32_u64 s0, 0.5                   ; encoding: [0xf0,0x0b,0x80,0xbe]
+
+0x80,0x0b,0x80,0xbe
+# GFX12: s_clz_i32_u64 s0, 0                     ; encoding: [0x80,0x0b,0x80,0xbe]
+
+0xff,0x0b,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_clz_i32_u64 s0, 0x3f717273            ; encoding: [0xff,0x0b,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x0b,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_clz_i32_u64 s0, 0xaf123456            ; encoding: [0xff,0x0b,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x0b,0x80,0xbe
+# GFX12: s_clz_i32_u64 s0, -1                    ; encoding: [0xc1,0x0b,0x80,0xbe]
+
+0xf7,0x0b,0x80,0xbe
+# GFX12: s_clz_i32_u64 s0, -4.0                  ; encoding: [0xf7,0x0b,0x80,0xbe]
+
+0x7e,0x0b,0x80,0xbe
+# GFX12: s_clz_i32_u64 s0, exec                  ; encoding: [0x7e,0x0b,0x80,0xbe]
+
+0x66,0x0b,0x80,0xbe
+# GFX12: s_clz_i32_u64 s0, s[102:103]            ; encoding: [0x66,0x0b,0x80,0xbe]
+
+0x02,0x0b,0x80,0xbe
+# GFX12: s_clz_i32_u64 s0, s[2:3]                ; encoding: [0x02,0x0b,0x80,0xbe]
+
+0x6a,0x0b,0x80,0xbe
+# GFX12: s_clz_i32_u64 s0, vcc                   ; encoding: [0x6a,0x0b,0x80,0xbe]
+
+0x66,0x0b,0xe9,0xbe
+# GFX12: s_clz_i32_u64 s105, s[102:103]          ; encoding: [0x66,0x0b,0xe9,0xbe]
+
+0x02,0x0b,0xe9,0xbe
+# GFX12: s_clz_i32_u64 s105, s[2:3]              ; encoding: [0x02,0x0b,0xe9,0xbe]
+
+0x02,0x0b,0xeb,0xbe
+# GFX12: s_clz_i32_u64 vcc_hi, s[2:3]            ; encoding: [0x02,0x0b,0xeb,0xbe]
+
+0x02,0x0b,0xea,0xbe
+# GFX12: s_clz_i32_u64 vcc_lo, s[2:3]            ; encoding: [0x02,0x0b,0xea,0xbe]
+
+0x01,0x02,0xff,0xbe
+# GFX12: s_cmov_b32 exec_hi, s1                  ; encoding: [0x01,0x02,0xff,0xbe]
+
+0x01,0x02,0xfe,0xbe
+# GFX12: s_cmov_b32 exec_lo, s1                  ; encoding: [0x01,0x02,0xfe,0xbe]
+
+0x01,0x02,0xfd,0xbe
+# GFX12: s_cmov_b32 m0, s1                       ; encoding: [0x01,0x02,0xfd,0xbe]
+
+0xf0,0x02,0x80,0xbe
+# GFX12: s_cmov_b32 s0, 0.5                      ; encoding: [0xf0,0x02,0x80,0xbe]
+
+0x80,0x02,0x80,0xbe
+# GFX12: s_cmov_b32 s0, 0                        ; encoding: [0x80,0x02,0x80,0xbe]
+
+0xff,0x02,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_cmov_b32 s0, 0x3f717273               ; encoding: [0xff,0x02,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x02,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_cmov_b32 s0, 0xaf123456               ; encoding: [0xff,0x02,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x02,0x80,0xbe
+# GFX12: s_cmov_b32 s0, -1                       ; encoding: [0xc1,0x02,0x80,0xbe]
+
+0xf7,0x02,0x80,0xbe
+# GFX12: s_cmov_b32 s0, -4.0                     ; encoding: [0xf7,0x02,0x80,0xbe]
+
+0x7f,0x02,0x80,0xbe
+# GFX12: s_cmov_b32 s0, exec_hi                  ; encoding: [0x7f,0x02,0x80,0xbe]
+
+0x7e,0x02,0x80,0xbe
+# GFX12: s_cmov_b32 s0, exec_lo                  ; encoding: [0x7e,0x02,0x80,0xbe]
+
+0x7d,0x02,0x80,0xbe
+# GFX12: s_cmov_b32 s0, m0                       ; encoding: [0x7d,0x02,0x80,0xbe]
+
+0x68,0x02,0x80,0xbe
+# GFX12: s_cmov_b32 s0, s104                     ; encoding: [0x68,0x02,0x80,0xbe]
+
+0x01,0x02,0x80,0xbe
+# GFX12: s_cmov_b32 s0, s1                       ; encoding: [0x01,0x02,0x80,0xbe]
+
+0x6b,0x02,0x80,0xbe
+# GFX12: s_cmov_b32 s0, vcc_hi                   ; encoding: [0x6b,0x02,0x80,0xbe]
+
+0x6a,0x02,0x80,0xbe
+# GFX12: s_cmov_b32 s0, vcc_lo                   ; encoding: [0x6a,0x02,0x80,0xbe]
+
+0x68,0x02,0xe9,0xbe
+# GFX12: s_cmov_b32 s105, s104                   ; encoding: [0x68,0x02,0xe9,0xbe]
+
+0x01,0x02,0xe9,0xbe
+# GFX12: s_cmov_b32 s105, s1                     ; encoding: [0x01,0x02,0xe9,0xbe]
+
+0x01,0x02,0xeb,0xbe
+# GFX12: s_cmov_b32 vcc_hi, s1                   ; encoding: [0x01,0x02,0xeb,0xbe]
+
+0x01,0x02,0xea,0xbe
+# GFX12: s_cmov_b32 vcc_lo, s1                   ; encoding: [0x01,0x02,0xea,0xbe]
+
+0x02,0x03,0xfe,0xbe
+# GFX12: s_cmov_b64 exec, s[2:3]                 ; encoding: [0x02,0x03,0xfe,0xbe]
+
+0xf0,0x03,0x80,0xbe
+# GFX12: s_cmov_b64 s[0:1], 0.5                  ; encoding: [0xf0,0x03,0x80,0xbe]
+
+0x80,0x03,0x80,0xbe
+# GFX12: s_cmov_b64 s[0:1], 0                    ; encoding: [0x80,0x03,0x80,0xbe]
+
+0xff,0x03,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_cmov_b64 s[0:1], 0x3f717273           ; encoding: [0xff,0x03,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x03,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_cmov_b64 s[0:1], 0xaf123456           ; encoding: [0xff,0x03,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x03,0x80,0xbe
+# GFX12: s_cmov_b64 s[0:1], -1                   ; encoding: [0xc1,0x03,0x80,0xbe]
+
+0xf7,0x03,0x80,0xbe
+# GFX12: s_cmov_b64 s[0:1], -4.0                 ; encoding: [0xf7,0x03,0x80,0xbe]
+
+0x7e,0x03,0x80,0xbe
+# GFX12: s_cmov_b64 s[0:1], exec                 ; encoding: [0x7e,0x03,0x80,0xbe]
+
+0x66,0x03,0x80,0xbe
+# GFX12: s_cmov_b64 s[0:1], s[102:103]           ; encoding: [0x66,0x03,0x80,0xbe]
+
+0x02,0x03,0x80,0xbe
+# GFX12: s_cmov_b64 s[0:1], s[2:3]               ; encoding: [0x02,0x03,0x80,0xbe]
+
+0x6a,0x03,0x80,0xbe
+# GFX12: s_cmov_b64 s[0:1], vcc                  ; encoding: [0x6a,0x03,0x80,0xbe]
+
+0x66,0x03,0xe8,0xbe
+# GFX12: s_cmov_b64 s[104:105], s[102:103]       ; encoding: [0x66,0x03,0xe8,0xbe]
+
+0x02,0x03,0xe8,0xbe
+# GFX12: s_cmov_b64 s[104:105], s[2:3]           ; encoding: [0x02,0x03,0xe8,0xbe]
+
+0x02,0x03,0xea,0xbe
+# GFX12: s_cmov_b64 vcc, s[2:3]                  ; encoding: [0x02,0x03,0xea,0xbe]
+
+0x01,0x08,0xff,0xbe
+# GFX12: s_ctz_i32_b32 exec_hi, s1               ; encoding: [0x01,0x08,0xff,0xbe]
+
+0x01,0x08,0xfe,0xbe
+# GFX12: s_ctz_i32_b32 exec_lo, s1               ; encoding: [0x01,0x08,0xfe,0xbe]
+
+0x01,0x08,0xfd,0xbe
+# GFX12: s_ctz_i32_b32 m0, s1                    ; encoding: [0x01,0x08,0xfd,0xbe]
+
+0xf0,0x08,0x80,0xbe
+# GFX12: s_ctz_i32_b32 s0, 0.5                   ; encoding: [0xf0,0x08,0x80,0xbe]
+
+0x80,0x08,0x80,0xbe
+# GFX12: s_ctz_i32_b32 s0, 0                     ; encoding: [0x80,0x08,0x80,0xbe]
+
+0xff,0x08,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_ctz_i32_b32 s0, 0x3f717273            ; encoding: [0xff,0x08,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x08,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_ctz_i32_b32 s0, 0xaf123456            ; encoding: [0xff,0x08,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x08,0x80,0xbe
+# GFX12: s_ctz_i32_b32 s0, -1                    ; encoding: [0xc1,0x08,0x80,0xbe]
+
+0xf7,0x08,0x80,0xbe
+# GFX12: s_ctz_i32_b32 s0, -4.0                  ; encoding: [0xf7,0x08,0x80,0xbe]
+
+0x7f,0x08,0x80,0xbe
+# GFX12: s_ctz_i32_b32 s0, exec_hi               ; encoding: [0x7f,0x08,0x80,0xbe]
+
+0x7e,0x08,0x80,0xbe
+# GFX12: s_ctz_i32_b32 s0, exec_lo               ; encoding: [0x7e,0x08,0x80,0xbe]
+
+0x7d,0x08,0x80,0xbe
+# GFX12: s_ctz_i32_b32 s0, m0                    ; encoding: [0x7d,0x08,0x80,0xbe]
+
+0x68,0x08,0x80,0xbe
+# GFX12: s_ctz_i32_b32 s0, s104                  ; encoding: [0x68,0x08,0x80,0xbe]
+
+0x01,0x08,0x80,0xbe
+# GFX12: s_ctz_i32_b32 s0, s1                    ; encoding: [0x01,0x08,0x80,0xbe]
+
+0x6b,0x08,0x80,0xbe
+# GFX12: s_ctz_i32_b32 s0, vcc_hi                ; encoding: [0x6b,0x08,0x80,0xbe]
+
+0x6a,0x08,0x80,0xbe
+# GFX12: s_ctz_i32_b32 s0, vcc_lo                ; encoding: [0x6a,0x08,0x80,0xbe]
+
+0x68,0x08,0xe9,0xbe
+# GFX12: s_ctz_i32_b32 s105, s104                ; encoding: [0x68,0x08,0xe9,0xbe]
+
+0x01,0x08,0xe9,0xbe
+# GFX12: s_ctz_i32_b32 s105, s1                  ; encoding: [0x01,0x08,0xe9,0xbe]
+
+0x01,0x08,0xeb,0xbe
+# GFX12: s_ctz_i32_b32 vcc_hi, s1                ; encoding: [0x01,0x08,0xeb,0xbe]
+
+0x01,0x08,0xea,0xbe
+# GFX12: s_ctz_i32_b32 vcc_lo, s1                ; encoding: [0x01,0x08,0xea,0xbe]
+
+0x02,0x09,0xff,0xbe
+# GFX12: s_ctz_i32_b64 exec_hi, s[2:3]           ; encoding: [0x02,0x09,0xff,0xbe]
+
+0x02,0x09,0xfe,0xbe
+# GFX12: s_ctz_i32_b64 exec_lo, s[2:3]           ; encoding: [0x02,0x09,0xfe,0xbe]
+
+0x02,0x09,0xfd,0xbe
+# GFX12: s_ctz_i32_b64 m0, s[2:3]                ; encoding: [0x02,0x09,0xfd,0xbe]
+
+0xf0,0x09,0x80,0xbe
+# GFX12: s_ctz_i32_b64 s0, 0.5                   ; encoding: [0xf0,0x09,0x80,0xbe]
+
+0x80,0x09,0x80,0xbe
+# GFX12: s_ctz_i32_b64 s0, 0                     ; encoding: [0x80,0x09,0x80,0xbe]
+
+0xff,0x09,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_ctz_i32_b64 s0, 0x3f717273            ; encoding: [0xff,0x09,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x09,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_ctz_i32_b64 s0, 0xaf123456            ; encoding: [0xff,0x09,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x09,0x80,0xbe
+# GFX12: s_ctz_i32_b64 s0, -1                    ; encoding: [0xc1,0x09,0x80,0xbe]
+
+0xf7,0x09,0x80,0xbe
+# GFX12: s_ctz_i32_b64 s0, -4.0                  ; encoding: [0xf7,0x09,0x80,0xbe]
+
+0x7e,0x09,0x80,0xbe
+# GFX12: s_ctz_i32_b64 s0, exec                  ; encoding: [0x7e,0x09,0x80,0xbe]
+
+0x66,0x09,0x80,0xbe
+# GFX12: s_ctz_i32_b64 s0, s[102:103]            ; encoding: [0x66,0x09,0x80,0xbe]
+
+0x02,0x09,0x80,0xbe
+# GFX12: s_ctz_i32_b64 s0, s[2:3]                ; encoding: [0x02,0x09,0x80,0xbe]
+
+0x6a,0x09,0x80,0xbe
+# GFX12: s_ctz_i32_b64 s0, vcc                   ; encoding: [0x6a,0x09,0x80,0xbe]
+
+0x66,0x09,0xe9,0xbe
+# GFX12: s_ctz_i32_b64 s105, s[102:103]          ; encoding: [0x66,0x09,0xe9,0xbe]
+
+0x02,0x09,0xe9,0xbe
+# GFX12: s_ctz_i32_b64 s105, s[2:3]              ; encoding: [0x02,0x09,0xe9,0xbe]
+
+0x02,0x09,0xeb,0xbe
+# GFX12: s_ctz_i32_b64 vcc_hi, s[2:3]            ; encoding: [0x02,0x09,0xeb,0xbe]
+
+0x02,0x09,0xea,0xbe
+# GFX12: s_ctz_i32_b64 vcc_lo, s[2:3]            ; encoding: [0x02,0x09,0xea,0xbe]
+
+0x00,0x47,0xfe,0xbe
+# GFX1200: s_getpc_b64 exec                        ; encoding: [0x00,0x47,0xfe,0xbe]
+# GFX1250: s_get_pc_i64 exec                       ; encoding: [0x00,0x47,0xfe,0xbe]
+
+0x00,0x47,0x80,0xbe
+# GFX1200: s_getpc_b64 s[0:1]                      ; encoding: [0x00,0x47,0x80,0xbe]
+# GFX1250: s_get_pc_i64 s[0:1]                     ; encoding: [0x00,0x47,0x80,0xbe]
+
+0x00,0x47,0xe8,0xbe
+# GFX1200: s_getpc_b64 s[104:105]                  ; encoding: [0x00,0x47,0xe8,0xbe]
+# GFX1250: s_get_pc_i64 s[104:105]                 ; encoding: [0x00,0x47,0xe8,0xbe]
+
+0x00,0x47,0xea,0xbe
+# GFX1200: s_getpc_b64 vcc                         ; encoding: [0x00,0x47,0xea,0xbe]
+# GFX1250: s_get_pc_i64 vcc                        ; encoding: [0x00,0x47,0xea,0xbe]
+
+0x01,0x00,0xff,0xbe
+# GFX12: s_mov_b32 exec_hi, s1                   ; encoding: [0x01,0x00,0xff,0xbe]
+
+0x01,0x00,0xfe,0xbe
+# GFX12: s_mov_b32 exec_lo, s1                   ; encoding: [0x01,0x00,0xfe,0xbe]
+
+0x01,0x00,0xfd,0xbe
+# GFX12: s_mov_b32 m0, s1                        ; encoding: [0x01,0x00,0xfd,0xbe]
+
+0xf0,0x00,0x80,0xbe
+# GFX12: s_mov_b32 s0, 0.5                       ; encoding: [0xf0,0x00,0x80,0xbe]
+
+0x80,0x00,0x80,0xbe
+# GFX12: s_mov_b32 s0, 0                         ; encoding: [0x80,0x00,0x80,0xbe]
+
+0xff,0x00,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_mov_b32 s0, 0x3f717273                ; encoding: [0xff,0x00,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x00,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_mov_b32 s0, 0xaf123456                ; encoding: [0xff,0x00,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x00,0x80,0xbe
+# GFX12: s_mov_b32 s0, -1                        ; encoding: [0xc1,0x00,0x80,0xbe]
+
+0xf7,0x00,0x80,0xbe
+# GFX12: s_mov_b32 s0, -4.0                      ; encoding: [0xf7,0x00,0x80,0xbe]
+
+0x7f,0x00,0x80,0xbe
+# GFX12: s_mov_b32 s0, exec_hi                   ; encoding: [0x7f,0x00,0x80,0xbe]
+
+0x7e,0x00,0x80,0xbe
+# GFX12: s_mov_b32 s0, exec_lo                   ; encoding: [0x7e,0x00,0x80,0xbe]
+
+0x7d,0x00,0x80,0xbe
+# GFX12: s_mov_b32 s0, m0                        ; encoding: [0x7d,0x00,0x80,0xbe]
+
+0x68,0x00,0x80,0xbe
+# GFX12: s_mov_b32 s0, s104                      ; encoding: [0x68,0x00,0x80,0xbe]
+
+0x01,0x00,0x80,0xbe
+# GFX12: s_mov_b32 s0, s1                        ; encoding: [0x01,0x00,0x80,0xbe]
+
+0x6b,0x00,0x80,0xbe
+# GFX12: s_mov_b32 s0, vcc_hi                    ; encoding: [0x6b,0x00,0x80,0xbe]
+
+0x6a,0x00,0x80,0xbe
+# GFX12: s_mov_b32 s0, vcc_lo                    ; encoding: [0x6a,0x00,0x80,0xbe]
+
+0x68,0x00,0xe9,0xbe
+# GFX12: s_mov_b32 s105, s104                    ; encoding: [0x68,0x00,0xe9,0xbe]
+
+0x01,0x00,0xe9,0xbe
+# GFX12: s_mov_b32 s105, s1                      ; encoding: [0x01,0x00,0xe9,0xbe]
+
+0x01,0x00,0xeb,0xbe
+# GFX12: s_mov_b32 vcc_hi, s1                    ; encoding: [0x01,0x00,0xeb,0xbe]
+
+0x01,0x00,0xea,0xbe
+# GFX12: s_mov_b32 vcc_lo, s1                    ; encoding: [0x01,0x00,0xea,0xbe]
+
+0x7c,0x00,0x80,0xbe
+# GFX12: s_mov_b32 s0, null                      ; encoding: [0x7c,0x00,0x80,0xbe]
+
+0x01,0x00,0xfc,0xbe
+# GFX12: s_mov_b32 null, s1                      ; encoding: [0x01,0x00,0xfc,0xbe]
+
+0x02,0x01,0xfe,0xbe
+# GFX12: s_mov_b64 exec, s[2:3]                  ; encoding: [0x02,0x01,0xfe,0xbe]
+
+0xf0,0x01,0x80,0xbe
+# GFX12: s_mov_b64 s[0:1], 0.5                   ; encoding: [0xf0,0x01,0x80,0xbe]
+
+0x80,0x01,0x80,0xbe
+# GFX12: s_mov_b64 s[0:1], 0                     ; encoding: [0x80,0x01,0x80,0xbe]
+
+0xff,0x01,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_mov_b64 s[0:1], 0x3f717273            ; encoding: [0xff,0x01,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x01,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_mov_b64 s[0:1], 0xaf123456            ; encoding: [0xff,0x01,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x01,0x80,0xbe
+# GFX12: s_mov_b64 s[0:1], -1                    ; encoding: [0xc1,0x01,0x80,0xbe]
+
+0xf7,0x01,0x80,0xbe
+# GFX12: s_mov_b64 s[0:1], -4.0                  ; encoding: [0xf7,0x01,0x80,0xbe]
+
+0x7e,0x01,0x80,0xbe
+# GFX12: s_mov_b64 s[0:1], exec                  ; encoding: [0x7e,0x01,0x80,0xbe]
+
+0x66,0x01,0x80,0xbe
+# GFX12: s_mov_b64 s[0:1], s[102:103]            ; encoding: [0x66,0x01,0x80,0xbe]
+
+0x02,0x01,0x80,0xbe
+# GFX12: s_mov_b64 s[0:1], s[2:3]                ; encoding: [0x02,0x01,0x80,0xbe]
+
+0x6a,0x01,0x80,0xbe
+# GFX12: s_mov_b64 s[0:1], vcc                   ; encoding: [0x6a,0x01,0x80,0xbe]
+
+0x66,0x01,0xe8,0xbe
+# GFX12: s_mov_b64 s[104:105], s[102:103]        ; encoding: [0x66,0x01,0xe8,0xbe]
+
+0x02,0x01,0xe8,0xbe
+# GFX12: s_mov_b64 s[104:105], s[2:3]            ; encoding: [0x02,0x01,0xe8,0xbe]
+
+0x02,0x01,0xea,0xbe
+# GFX12: s_mov_b64 vcc, s[2:3]                   ; encoding: [0x02,0x01,0xea,0xbe]
+
+0x7c,0x01,0x80,0xbe
+# GFX12: s_mov_b64 s[0:1], null                  ; encoding: [0x7c,0x01,0x80,0xbe]
+
+0x02,0x01,0xfc,0xbe
+# GFX12: s_mov_b64 null, s[2:3]                  ; encoding: [0x02,0x01,0xfc,0xbe]
+
+0xf0,0x42,0x80,0xbe
+# GFX12: s_movreld_b32 s0, 0.5                   ; encoding: [0xf0,0x42,0x80,0xbe]
+
+0x80,0x42,0x80,0xbe
+# GFX12: s_movreld_b32 s0, 0                     ; encoding: [0x80,0x42,0x80,0xbe]
+
+0xff,0x42,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_movreld_b32 s0, 0x3f717273            ; encoding: [0xff,0x42,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x42,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_movreld_b32 s0, 0xaf123456            ; encoding: [0xff,0x42,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x42,0x80,0xbe
+# GFX12: s_movreld_b32 s0, -1                    ; encoding: [0xc1,0x42,0x80,0xbe]
+
+0xf7,0x42,0x80,0xbe
+# GFX12: s_movreld_b32 s0, -4.0                  ; encoding: [0xf7,0x42,0x80,0xbe]
+
+0x7f,0x42,0x80,0xbe
+# GFX12: s_movreld_b32 s0, exec_hi               ; encoding: [0x7f,0x42,0x80,0xbe]
+
+0x7e,0x42,0x80,0xbe
+# GFX12: s_movreld_b32 s0, exec_lo               ; encoding: [0x7e,0x42,0x80,0xbe]
+
+0x7d,0x42,0x80,0xbe
+# GFX12: s_movreld_b32 s0, m0                    ; encoding: [0x7d,0x42,0x80,0xbe]
+
+0x68,0x42,0x80,0xbe
+# GFX12: s_movreld_b32 s0, s104                  ; encoding: [0x68,0x42,0x80,0xbe]
+
+0x01,0x42,0x80,0xbe
+# GFX12: s_movreld_b32 s0, s1                    ; encoding: [0x01,0x42,0x80,0xbe]
+
+0x6b,0x42,0x80,0xbe
+# GFX12: s_movreld_b32 s0, vcc_hi                ; encoding: [0x6b,0x42,0x80,0xbe]
+
+0x6a,0x42,0x80,0xbe
+# GFX12: s_movreld_b32 s0, vcc_lo                ; encoding: [0x6a,0x42,0x80,0xbe]
+
+0x68,0x42,0xe9,0xbe
+# GFX12: s_movreld_b32 s105, s104                ; encoding: [0x68,0x42,0xe9,0xbe]
+
+0x01,0x42,0xe9,0xbe
+# GFX12: s_movreld_b32 s105, s1                  ; encoding: [0x01,0x42,0xe9,0xbe]
+
+0x01,0x42,0xeb,0xbe
+# GFX12: s_movreld_b32 vcc_hi, s1                ; encoding: [0x01,0x42,0xeb,0xbe]
+
+0x01,0x42,0xea,0xbe
+# GFX12: s_movreld_b32 vcc_lo, s1                ; encoding: [0x01,0x42,0xea,0xbe]
+
+0xf0,0x43,0x80,0xbe
+# GFX12: s_movreld_b64 s[0:1], 0.5               ; encoding: [0xf0,0x43,0x80,0xbe]
+
+0x80,0x43,0x80,0xbe
+# GFX12: s_movreld_b64 s[0:1], 0                 ; encoding: [0x80,0x43,0x80,0xbe]
+
+0xff,0x43,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_movreld_b64 s[0:1], 0x3f717273        ; encoding: [0xff,0x43,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x43,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_movreld_b64 s[0:1], 0xaf123456        ; encoding: [0xff,0x43,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x43,0x80,0xbe
+# GFX12: s_movreld_b64 s[0:1], -1                ; encoding: [0xc1,0x43,0x80,0xbe]
+
+0xf7,0x43,0x80,0xbe
+# GFX12: s_movreld_b64 s[0:1], -4.0              ; encoding: [0xf7,0x43,0x80,0xbe]
+
+0x7e,0x43,0x80,0xbe
+# GFX12: s_movreld_b64 s[0:1], exec              ; encoding: [0x7e,0x43,0x80,0xbe]
+
+0x66,0x43,0x80,0xbe
+# GFX12: s_movreld_b64 s[0:1], s[102:103]        ; encoding: [0x66,0x43,0x80,0xbe]
+
+0x02,0x43,0x80,0xbe
+# GFX12: s_movreld_b64 s[0:1], s[2:3]            ; encoding: [0x02,0x43,0x80,0xbe]
+
+0x6a,0x43,0x80,0xbe
+# GFX12: s_movreld_b64 s[0:1], vcc               ; encoding: [0x6a,0x43,0x80,0xbe]
+
+0x66,0x43,0xe8,0xbe
+# GFX12: s_movreld_b64 s[104:105], s[102:103]    ; encoding: [0x66,0x43,0xe8,0xbe]
+
+0x02,0x43,0xe8,0xbe
+# GFX12: s_movreld_b64 s[104:105], s[2:3]        ; encoding: [0x02,0x43,0xe8,0xbe]
+
+0x02,0x43,0xea,0xbe
+# GFX12: s_movreld_b64 vcc, s[2:3]               ; encoding: [0x02,0x43,0xea,0xbe]
+
+0x01,0x40,0xff,0xbe
+# GFX12: s_movrels_b32 exec_hi, s1               ; encoding: [0x01,0x40,0xff,0xbe]
+
+0x01,0x40,0xfe,0xbe
+# GFX12: s_movrels_b32 exec_lo, s1               ; encoding: [0x01,0x40,0xfe,0xbe]
+
+0x01,0x40,0xfd,0xbe
+# GFX12: s_movrels_b32 m0, s1                    ; encoding: [0x01,0x40,0xfd,0xbe]
+
+0x68,0x40,0x80,0xbe
+# GFX12: s_movrels_b32 s0, s104                  ; encoding: [0x68,0x40,0x80,0xbe]
+
+0x01,0x40,0x80,0xbe
+# GFX12: s_movrels_b32 s0, s1                    ; encoding: [0x01,0x40,0x80,0xbe]
+
+0x6b,0x40,0x80,0xbe
+# GFX12: s_movrels_b32 s0, vcc_hi                ; encoding: [0x6b,0x40,0x80,0xbe]
+
+0x6a,0x40,0x80,0xbe
+# GFX12: s_movrels_b32 s0, vcc_lo                ; encoding: [0x6a,0x40,0x80,0xbe]
+
+0x68,0x40,0xe9,0xbe
+# GFX12: s_movrels_b32 s105, s104                ; encoding: [0x68,0x40,0xe9,0xbe]
+
+0x01,0x40,0xe9,0xbe
+# GFX12: s_movrels_b32 s105, s1                  ; encoding: [0x01,0x40,0xe9,0xbe]
+
+0x01,0x40,0xeb,0xbe
+# GFX12: s_movrels_b32 vcc_hi, s1                ; encoding: [0x01,0x40,0xeb,0xbe]
+
+0x01,0x40,0xea,0xbe
+# GFX12: s_movrels_b32 vcc_lo, s1                ; encoding: [0x01,0x40,0xea,0xbe]
+
+0x02,0x41,0xfe,0xbe
+# GFX12: s_movrels_b64 exec, s[2:3]              ; encoding: [0x02,0x41,0xfe,0xbe]
+
+0x66,0x41,0x80,0xbe
+# GFX12: s_movrels_b64 s[0:1], s[102:103]        ; encoding: [0x66,0x41,0x80,0xbe]
+
+0x02,0x41,0x80,0xbe
+# GFX12: s_movrels_b64 s[0:1], s[2:3]            ; encoding: [0x02,0x41,0x80,0xbe]
+
+0x6a,0x41,0x80,0xbe
+# GFX12: s_movrels_b64 s[0:1], vcc               ; encoding: [0x6a,0x41,0x80,0xbe]
+
+0x66,0x41,0xe8,0xbe
+# GFX12: s_movrels_b64 s[104:105], s[102:103]    ; encoding: [0x66,0x41,0xe8,0xbe]
+
+0x02,0x41,0xe8,0xbe
+# GFX12: s_movrels_b64 s[104:105], s[2:3]        ; encoding: [0x02,0x41,0xe8,0xbe]
+
+0x02,0x41,0xea,0xbe
+# GFX12: s_movrels_b64 vcc, s[2:3]               ; encoding: [0x02,0x41,0xea,0xbe]
+
+0x68,0x44,0x80,0xbe
+# GFX12: s_movrelsd_2_b32 s0, s104               ; encoding: [0x68,0x44,0x80,0xbe]
+
+0x01,0x44,0x80,0xbe
+# GFX12: s_movrelsd_2_b32 s0, s1                 ; encoding: [0x01,0x44,0x80,0xbe]
+
+0x6b,0x44,0x80,0xbe
+# GFX12: s_movrelsd_2_b32 s0, vcc_hi             ; encoding: [0x6b,0x44,0x80,0xbe]
+
+0x6a,0x44,0x80,0xbe
+# GFX12: s_movrelsd_2_b32 s0, vcc_lo             ; encoding: [0x6a,0x44,0x80,0xbe]
+
+0x68,0x44,0xe9,0xbe
+# GFX12: s_movrelsd_2_b32 s105, s104             ; encoding: [0x68,0x44,0xe9,0xbe]
+
+0x01,0x44,0xe9,0xbe
+# GFX12: s_movrelsd_2_b32 s105, s1               ; encoding: [0x01,0x44,0xe9,0xbe]
+
+0x01,0x44,0xeb,0xbe
+# GFX12: s_movrelsd_2_b32 vcc_hi, s1             ; encoding: [0x01,0x44,0xeb,0xbe]
+
+0x01,0x44,0xea,0xbe
+# GFX12: s_movrelsd_2_b32 vcc_lo, s1             ; encoding: [0x01,0x44,0xea,0xbe]
+
+0xf0,0x26,0x80,0xbe
+# GFX12: s_nand_saveexec_b32 s0, 0.5             ; encoding: [0xf0,0x26,0x80,0xbe]
+
+0x80,0x26,0x80,0xbe
+# GFX12: s_nand_saveexec_b32 s0, 0               ; encoding: [0x80,0x26,0x80,0xbe]
+
+0xff,0x26,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_nand_saveexec_b32 s0, 0x3f717273      ; encoding: [0xff,0x26,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x26,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_nand_saveexec_b32 s0, 0xaf123456      ; encoding: [0xff,0x26,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x26,0x80,0xbe
+# GFX12: s_nand_saveexec_b32 s0, -1              ; encoding: [0xc1,0x26,0x80,0xbe]
+
+0xf7,0x26,0x80,0xbe
+# GFX12: s_nand_saveexec_b32 s0, -4.0            ; encoding: [0xf7,0x26,0x80,0xbe]
+
+0x7f,0x26,0x80,0xbe
+# GFX12: s_nand_saveexec_b32 s0, exec_hi         ; encoding: [0x7f,0x26,0x80,0xbe]
+
+0x7e,0x26,0x80,0xbe
+# GFX12: s_nand_saveexec_b32 s0, exec_lo         ; encoding: [0x7e,0x26,0x80,0xbe]
+
+0x7d,0x26,0x80,0xbe
+# GFX12: s_nand_saveexec_b32 s0, m0              ; encoding: [0x7d,0x26,0x80,0xbe]
+
+0x68,0x26,0x80,0xbe
+# GFX12: s_nand_saveexec_b32 s0, s104            ; encoding: [0x68,0x26,0x80,0xbe]
+
+0x01,0x26,0x80,0xbe
+# GFX12: s_nand_saveexec_b32 s0, s1              ; encoding: [0x01,0x26,0x80,0xbe]
+
+0x6b,0x26,0x80,0xbe
+# GFX12: s_nand_saveexec_b32 s0, vcc_hi          ; encoding: [0x6b,0x26,0x80,0xbe]
+
+0x6a,0x26,0x80,0xbe
+# GFX12: s_nand_saveexec_b32 s0, vcc_lo          ; encoding: [0x6a,0x26,0x80,0xbe]
+
+0x68,0x26,0xe9,0xbe
+# GFX12: s_nand_saveexec_b32 s105, s104          ; encoding: [0x68,0x26,0xe9,0xbe]
+
+0x01,0x26,0xe9,0xbe
+# GFX12: s_nand_saveexec_b32 s105, s1            ; encoding: [0x01,0x26,0xe9,0xbe]
+
+0x01,0x26,0xeb,0xbe
+# GFX12: s_nand_saveexec_b32 vcc_hi, s1          ; encoding: [0x01,0x26,0xeb,0xbe]
+
+0x01,0x26,0xea,0xbe
+# GFX12: s_nand_saveexec_b32 vcc_lo, s1          ; encoding: [0x01,0x26,0xea,0xbe]
+
+0xf0,0x27,0x80,0xbe
+# GFX12: s_nand_saveexec_b64 s[0:1], 0.5         ; encoding: [0xf0,0x27,0x80,0xbe]
+
+0x80,0x27,0x80,0xbe
+# GFX12: s_nand_saveexec_b64 s[0:1], 0           ; encoding: [0x80,0x27,0x80,0xbe]
+
+0xff,0x27,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_nand_saveexec_b64 s[0:1], 0x3f717273  ; encoding: [0xff,0x27,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x27,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_nand_saveexec_b64 s[0:1], 0xaf123456  ; encoding: [0xff,0x27,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x27,0x80,0xbe
+# GFX12: s_nand_saveexec_b64 s[0:1], -1          ; encoding: [0xc1,0x27,0x80,0xbe]
+
+0xf7,0x27,0x80,0xbe
+# GFX12: s_nand_saveexec_b64 s[0:1], -4.0        ; encoding: [0xf7,0x27,0x80,0xbe]
+
+0x7e,0x27,0x80,0xbe
+# GFX12: s_nand_saveexec_b64 s[0:1], exec        ; encoding: [0x7e,0x27,0x80,0xbe]
+
+0x66,0x27,0x80,0xbe
+# GFX12: s_nand_saveexec_b64 s[0:1], s[102:103]  ; encoding: [0x66,0x27,0x80,0xbe]
+
+0x02,0x27,0x80,0xbe
+# GFX12: s_nand_saveexec_b64 s[0:1], s[2:3]      ; encoding: [0x02,0x27,0x80,0xbe]
+
+0x6a,0x27,0x80,0xbe
+# GFX12: s_nand_saveexec_b64 s[0:1], vcc         ; encoding: [0x6a,0x27,0x80,0xbe]
+
+0x66,0x27,0xe8,0xbe
+# GFX12: s_nand_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x27,0xe8,0xbe]
+
+0x02,0x27,0xe8,0xbe
+# GFX12: s_nand_saveexec_b64 s[104:105], s[2:3]  ; encoding: [0x02,0x27,0xe8,0xbe]
+
+0x02,0x27,0xea,0xbe
+# GFX12: s_nand_saveexec_b64 vcc, s[2:3]         ; encoding: [0x02,0x27,0xea,0xbe]
+
+0xf0,0x28,0x80,0xbe
+# GFX12: s_nor_saveexec_b32 s0, 0.5              ; encoding: [0xf0,0x28,0x80,0xbe]
+
+0x80,0x28,0x80,0xbe
+# GFX12: s_nor_saveexec_b32 s0, 0                ; encoding: [0x80,0x28,0x80,0xbe]
+
+0xff,0x28,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_nor_saveexec_b32 s0, 0x3f717273       ; encoding: [0xff,0x28,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x28,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_nor_saveexec_b32 s0, 0xaf123456       ; encoding: [0xff,0x28,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x28,0x80,0xbe
+# GFX12: s_nor_saveexec_b32 s0, -1               ; encoding: [0xc1,0x28,0x80,0xbe]
+
+0xf7,0x28,0x80,0xbe
+# GFX12: s_nor_saveexec_b32 s0, -4.0             ; encoding: [0xf7,0x28,0x80,0xbe]
+
+0x7f,0x28,0x80,0xbe
+# GFX12: s_nor_saveexec_b32 s0, exec_hi          ; encoding: [0x7f,0x28,0x80,0xbe]
+
+0x7e,0x28,0x80,0xbe
+# GFX12: s_nor_saveexec_b32 s0, exec_lo          ; encoding: [0x7e,0x28,0x80,0xbe]
+
+0x7d,0x28,0x80,0xbe
+# GFX12: s_nor_saveexec_b32 s0, m0               ; encoding: [0x7d,0x28,0x80,0xbe]
+
+0x68,0x28,0x80,0xbe
+# GFX12: s_nor_saveexec_b32 s0, s104             ; encoding: [0x68,0x28,0x80,0xbe]
+
+0x01,0x28,0x80,0xbe
+# GFX12: s_nor_saveexec_b32 s0, s1               ; encoding: [0x01,0x28,0x80,0xbe]
+
+0x6b,0x28,0x80,0xbe
+# GFX12: s_nor_saveexec_b32 s0, vcc_hi           ; encoding: [0x6b,0x28,0x80,0xbe]
+
+0x6a,0x28,0x80,0xbe
+# GFX12: s_nor_saveexec_b32 s0, vcc_lo           ; encoding: [0x6a,0x28,0x80,0xbe]
+
+0x68,0x28,0xe9,0xbe
+# GFX12: s_nor_saveexec_b32 s105, s104           ; encoding: [0x68,0x28,0xe9,0xbe]
+
+0x01,0x28,0xe9,0xbe
+# GFX12: s_nor_saveexec_b32 s105, s1             ; encoding: [0x01,0x28,0xe9,0xbe]
+
+0x01,0x28,0xeb,0xbe
+# GFX12: s_nor_saveexec_b32 vcc_hi, s1           ; encoding: [0x01,0x28,0xeb,0xbe]
+
+0x01,0x28,0xea,0xbe
+# GFX12: s_nor_saveexec_b32 vcc_lo, s1           ; encoding: [0x01,0x28,0xea,0xbe]
+
+0xf0,0x29,0x80,0xbe
+# GFX12: s_nor_saveexec_b64 s[0:1], 0.5          ; encoding: [0xf0,0x29,0x80,0xbe]
+
+0x80,0x29,0x80,0xbe
+# GFX12: s_nor_saveexec_b64 s[0:1], 0            ; encoding: [0x80,0x29,0x80,0xbe]
+
+0xff,0x29,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_nor_saveexec_b64 s[0:1], 0x3f717273   ; encoding: [0xff,0x29,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x29,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_nor_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xff,0x29,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x29,0x80,0xbe
+# GFX12: s_nor_saveexec_b64 s[0:1], -1           ; encoding: [0xc1,0x29,0x80,0xbe]
+
+0xf7,0x29,0x80,0xbe
+# GFX12: s_nor_saveexec_b64 s[0:1], -4.0         ; encoding: [0xf7,0x29,0x80,0xbe]
+
+0x7e,0x29,0x80,0xbe
+# GFX12: s_nor_saveexec_b64 s[0:1], exec         ; encoding: [0x7e,0x29,0x80,0xbe]
+
+0x66,0x29,0x80,0xbe
+# GFX12: s_nor_saveexec_b64 s[0:1], s[102:103]   ; encoding: [0x66,0x29,0x80,0xbe]
+
+0x02,0x29,0x80,0xbe
+# GFX12: s_nor_saveexec_b64 s[0:1], s[2:3]       ; encoding: [0x02,0x29,0x80,0xbe]
+
+0x6a,0x29,0x80,0xbe
+# GFX12: s_nor_saveexec_b64 s[0:1], vcc          ; encoding: [0x6a,0x29,0x80,0xbe]
+
+0x66,0x29,0xe8,0xbe
+# GFX12: s_nor_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x29,0xe8,0xbe]
+
+0x02,0x29,0xe8,0xbe
+# GFX12: s_nor_saveexec_b64 s[104:105], s[2:3]   ; encoding: [0x02,0x29,0xe8,0xbe]
+
+0x02,0x29,0xea,0xbe
+# GFX12: s_nor_saveexec_b64 vcc, s[2:3]          ; encoding: [0x02,0x29,0xea,0xbe]
+
+0x01,0x1e,0xff,0xbe
+# GFX12: s_not_b32 exec_hi, s1                   ; encoding: [0x01,0x1e,0xff,0xbe]
+
+0x01,0x1e,0xfe,0xbe
+# GFX12: s_not_b32 exec_lo, s1                   ; encoding: [0x01,0x1e,0xfe,0xbe]
+
+0x01,0x1e,0xfd,0xbe
+# GFX12: s_not_b32 m0, s1                        ; encoding: [0x01,0x1e,0xfd,0xbe]
+
+0xf0,0x1e,0x80,0xbe
+# GFX12: s_not_b32 s0, 0.5                       ; encoding: [0xf0,0x1e,0x80,0xbe]
+
+0x80,0x1e,0x80,0xbe
+# GFX12: s_not_b32 s0, 0                         ; encoding: [0x80,0x1e,0x80,0xbe]
+
+0xff,0x1e,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_not_b32 s0, 0x3f717273                ; encoding: [0xff,0x1e,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x1e,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_not_b32 s0, 0xaf123456                ; encoding: [0xff,0x1e,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x1e,0x80,0xbe
+# GFX12: s_not_b32 s0, -1                        ; encoding: [0xc1,0x1e,0x80,0xbe]
+
+0xf7,0x1e,0x80,0xbe
+# GFX12: s_not_b32 s0, -4.0                      ; encoding: [0xf7,0x1e,0x80,0xbe]
+
+0x7f,0x1e,0x80,0xbe
+# GFX12: s_not_b32 s0, exec_hi                   ; encoding: [0x7f,0x1e,0x80,0xbe]
+
+0x7e,0x1e,0x80,0xbe
+# GFX12: s_not_b32 s0, exec_lo                   ; encoding: [0x7e,0x1e,0x80,0xbe]
+
+0x7d,0x1e,0x80,0xbe
+# GFX12: s_not_b32 s0, m0                        ; encoding: [0x7d,0x1e,0x80,0xbe]
+
+0x68,0x1e,0x80,0xbe
+# GFX12: s_not_b32 s0, s104                      ; encoding: [0x68,0x1e,0x80,0xbe]
+
+0x01,0x1e,0x80,0xbe
+# GFX12: s_not_b32 s0, s1                        ; encoding: [0x01,0x1e,0x80,0xbe]
+
+0x6b,0x1e,0x80,0xbe
+# GFX12: s_not_b32 s0, vcc_hi                    ; encoding: [0x6b,0x1e,0x80,0xbe]
+
+0x6a,0x1e,0x80,0xbe
+# GFX12: s_not_b32 s0, vcc_lo                    ; encoding: [0x6a,0x1e,0x80,0xbe]
+
+0x68,0x1e,0xe9,0xbe
+# GFX12: s_not_b32 s105, s104                    ; encoding: [0x68,0x1e,0xe9,0xbe]
+
+0x01,0x1e,0xe9,0xbe
+# GFX12: s_not_b32 s105, s1                      ; encoding: [0x01,0x1e,0xe9,0xbe]
+
+0x01,0x1e,0xeb,0xbe
+# GFX12: s_not_b32 vcc_hi, s1                    ; encoding: [0x01,0x1e,0xeb,0xbe]
+
+0x01,0x1e,0xea,0xbe
+# GFX12: s_not_b32 vcc_lo, s1                    ; encoding: [0x01,0x1e,0xea,0xbe]
+
+0x02,0x1f,0xfe,0xbe
+# GFX12: s_not_b64 exec, s[2:3]                  ; encoding: [0x02,0x1f,0xfe,0xbe]
+
+0xf0,0x1f,0x80,0xbe
+# GFX12: s_not_b64 s[0:1], 0.5                   ; encoding: [0xf0,0x1f,0x80,0xbe]
+
+0x80,0x1f,0x80,0xbe
+# GFX12: s_not_b64 s[0:1], 0                     ; encoding: [0x80,0x1f,0x80,0xbe]
+
+0xff,0x1f,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_not_b64 s[0:1], 0x3f717273            ; encoding: [0xff,0x1f,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x1f,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_not_b64 s[0:1], 0xaf123456            ; encoding: [0xff,0x1f,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x1f,0x80,0xbe
+# GFX12: s_not_b64 s[0:1], -1                    ; encoding: [0xc1,0x1f,0x80,0xbe]
+
+0xf7,0x1f,0x80,0xbe
+# GFX12: s_not_b64 s[0:1], -4.0                  ; encoding: [0xf7,0x1f,0x80,0xbe]
+
+0x7e,0x1f,0x80,0xbe
+# GFX12: s_not_b64 s[0:1], exec                  ; encoding: [0x7e,0x1f,0x80,0xbe]
+
+0x66,0x1f,0x80,0xbe
+# GFX12: s_not_b64 s[0:1], s[102:103]            ; encoding: [0x66,0x1f,0x80,0xbe]
+
+0x02,0x1f,0x80,0xbe
+# GFX12: s_not_b64 s[0:1], s[2:3]                ; encoding: [0x02,0x1f,0x80,0xbe]
+
+0x6a,0x1f,0x80,0xbe
+# GFX12: s_not_b64 s[0:1], vcc                   ; encoding: [0x6a,0x1f,0x80,0xbe]
+
+0x66,0x1f,0xe8,0xbe
+# GFX12: s_not_b64 s[104:105], s[102:103]        ; encoding: [0x66,0x1f,0xe8,0xbe]
+
+0x02,0x1f,0xe8,0xbe
+# GFX12: s_not_b64 s[104:105], s[2:3]            ; encoding: [0x02,0x1f,0xe8,0xbe]
+
+0x02,0x1f,0xea,0xbe
+# GFX12: s_not_b64 vcc, s[2:3]                   ; encoding: [0x02,0x1f,0xea,0xbe]
+
+0xf0,0x2e,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b32 s0, 0.5          ; encoding: [0xf0,0x2e,0x80,0xbe]
+
+0x80,0x2e,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b32 s0, 0            ; encoding: [0x80,0x2e,0x80,0xbe]
+
+0xff,0x2e,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_or_not0_saveexec_b32 s0, 0x3f717273   ; encoding: [0xff,0x2e,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x2e,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_or_not0_saveexec_b32 s0, 0xaf123456   ; encoding: [0xff,0x2e,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x2e,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b32 s0, -1           ; encoding: [0xc1,0x2e,0x80,0xbe]
+
+0xf7,0x2e,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b32 s0, -4.0         ; encoding: [0xf7,0x2e,0x80,0xbe]
+
+0x7f,0x2e,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b32 s0, exec_hi      ; encoding: [0x7f,0x2e,0x80,0xbe]
+
+0x7e,0x2e,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b32 s0, exec_lo      ; encoding: [0x7e,0x2e,0x80,0xbe]
+
+0x7d,0x2e,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b32 s0, m0           ; encoding: [0x7d,0x2e,0x80,0xbe]
+
+0x68,0x2e,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b32 s0, s104         ; encoding: [0x68,0x2e,0x80,0xbe]
+
+0x01,0x2e,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b32 s0, s1           ; encoding: [0x01,0x2e,0x80,0xbe]
+
+0x6b,0x2e,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b32 s0, vcc_hi       ; encoding: [0x6b,0x2e,0x80,0xbe]
+
+0x6a,0x2e,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b32 s0, vcc_lo       ; encoding: [0x6a,0x2e,0x80,0xbe]
+
+0x68,0x2e,0xe9,0xbe
+# GFX12: s_or_not0_saveexec_b32 s105, s104       ; encoding: [0x68,0x2e,0xe9,0xbe]
+
+0x01,0x2e,0xe9,0xbe
+# GFX12: s_or_not0_saveexec_b32 s105, s1         ; encoding: [0x01,0x2e,0xe9,0xbe]
+
+0x01,0x2e,0xeb,0xbe
+# GFX12: s_or_not0_saveexec_b32 vcc_hi, s1       ; encoding: [0x01,0x2e,0xeb,0xbe]
+
+0x01,0x2e,0xea,0xbe
+# GFX12: s_or_not0_saveexec_b32 vcc_lo, s1       ; encoding: [0x01,0x2e,0xea,0xbe]
+
+0xf0,0x2f,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b64 s[0:1], 0.5      ; encoding: [0xf0,0x2f,0x80,0xbe]
+
+0x80,0x2f,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b64 s[0:1], 0        ; encoding: [0x80,0x2f,0x80,0xbe]
+
+0xff,0x2f,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_or_not0_saveexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x2f,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x2f,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_or_not0_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x2f,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x2f,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b64 s[0:1], -1       ; encoding: [0xc1,0x2f,0x80,0xbe]
+
+0xf7,0x2f,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b64 s[0:1], -4.0     ; encoding: [0xf7,0x2f,0x80,0xbe]
+
+0x7e,0x2f,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b64 s[0:1], exec     ; encoding: [0x7e,0x2f,0x80,0xbe]
+
+0x66,0x2f,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b64 s[0:1], s[102:103] ; encoding: [0x66,0x2f,0x80,0xbe]
+
+0x02,0x2f,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b64 s[0:1], s[2:3]   ; encoding: [0x02,0x2f,0x80,0xbe]
+
+0x6a,0x2f,0x80,0xbe
+# GFX12: s_or_not0_saveexec_b64 s[0:1], vcc      ; encoding: [0x6a,0x2f,0x80,0xbe]
+
+0x66,0x2f,0xe8,0xbe
+# GFX12: s_or_not0_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x2f,0xe8,0xbe]
+
+0x02,0x2f,0xe8,0xbe
+# GFX12: s_or_not0_saveexec_b64 s[104:105], s[2:3] ; encoding: [0x02,0x2f,0xe8,0xbe]
+
+0x02,0x2f,0xea,0xbe
+# GFX12: s_or_not0_saveexec_b64 vcc, s[2:3]      ; encoding: [0x02,0x2f,0xea,0xbe]
+
+0xf0,0x32,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b32 s0, 0.5          ; encoding: [0xf0,0x32,0x80,0xbe]
+
+0x80,0x32,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b32 s0, 0            ; encoding: [0x80,0x32,0x80,0xbe]
+
+0xff,0x32,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_or_not1_saveexec_b32 s0, 0x3f717273   ; encoding: [0xff,0x32,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x32,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_or_not1_saveexec_b32 s0, 0xaf123456   ; encoding: [0xff,0x32,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x32,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b32 s0, -1           ; encoding: [0xc1,0x32,0x80,0xbe]
+
+0xf7,0x32,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b32 s0, -4.0         ; encoding: [0xf7,0x32,0x80,0xbe]
+
+0x7f,0x32,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b32 s0, exec_hi      ; encoding: [0x7f,0x32,0x80,0xbe]
+
+0x7e,0x32,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b32 s0, exec_lo      ; encoding: [0x7e,0x32,0x80,0xbe]
+
+0x7d,0x32,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b32 s0, m0           ; encoding: [0x7d,0x32,0x80,0xbe]
+
+0x68,0x32,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b32 s0, s104         ; encoding: [0x68,0x32,0x80,0xbe]
+
+0x01,0x32,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b32 s0, s1           ; encoding: [0x01,0x32,0x80,0xbe]
+
+0x6b,0x32,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b32 s0, vcc_hi       ; encoding: [0x6b,0x32,0x80,0xbe]
+
+0x6a,0x32,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b32 s0, vcc_lo       ; encoding: [0x6a,0x32,0x80,0xbe]
+
+0x68,0x32,0xe9,0xbe
+# GFX12: s_or_not1_saveexec_b32 s105, s104       ; encoding: [0x68,0x32,0xe9,0xbe]
+
+0x01,0x32,0xe9,0xbe
+# GFX12: s_or_not1_saveexec_b32 s105, s1         ; encoding: [0x01,0x32,0xe9,0xbe]
+
+0x01,0x32,0xeb,0xbe
+# GFX12: s_or_not1_saveexec_b32 vcc_hi, s1       ; encoding: [0x01,0x32,0xeb,0xbe]
+
+0x01,0x32,0xea,0xbe
+# GFX12: s_or_not1_saveexec_b32 vcc_lo, s1       ; encoding: [0x01,0x32,0xea,0xbe]
+
+0xf0,0x33,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b64 s[0:1], 0.5      ; encoding: [0xf0,0x33,0x80,0xbe]
+
+0x80,0x33,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b64 s[0:1], 0        ; encoding: [0x80,0x33,0x80,0xbe]
+
+0xff,0x33,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_or_not1_saveexec_b64 s[0:1], 0x3f717273 ; encoding: [0xff,0x33,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x33,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_or_not1_saveexec_b64 s[0:1], 0xaf123456 ; encoding: [0xff,0x33,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x33,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b64 s[0:1], -1       ; encoding: [0xc1,0x33,0x80,0xbe]
+
+0xf7,0x33,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b64 s[0:1], -4.0     ; encoding: [0xf7,0x33,0x80,0xbe]
+
+0x7e,0x33,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b64 s[0:1], exec     ; encoding: [0x7e,0x33,0x80,0xbe]
+
+0x66,0x33,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b64 s[0:1], s[102:103] ; encoding: [0x66,0x33,0x80,0xbe]
+
+0x02,0x33,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b64 s[0:1], s[2:3]   ; encoding: [0x02,0x33,0x80,0xbe]
+
+0x6a,0x33,0x80,0xbe
+# GFX12: s_or_not1_saveexec_b64 s[0:1], vcc      ; encoding: [0x6a,0x33,0x80,0xbe]
+
+0x66,0x33,0xe8,0xbe
+# GFX12: s_or_not1_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x33,0xe8,0xbe]
+
+0x02,0x33,0xe8,0xbe
+# GFX12: s_or_not1_saveexec_b64 s[104:105], s[2:3] ; encoding: [0x02,0x33,0xe8,0xbe]
+
+0x02,0x33,0xea,0xbe
+# GFX12: s_or_not1_saveexec_b64 vcc, s[2:3]      ; encoding: [0x02,0x33,0xea,0xbe]
+
+0xf0,0x22,0x80,0xbe
+# GFX12: s_or_saveexec_b32 s0, 0.5               ; encoding: [0xf0,0x22,0x80,0xbe]
+
+0x80,0x22,0x80,0xbe
+# GFX12: s_or_saveexec_b32 s0, 0                 ; encoding: [0x80,0x22,0x80,0xbe]
+
+0xff,0x22,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_or_saveexec_b32 s0, 0x3f717273        ; encoding: [0xff,0x22,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x22,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_or_saveexec_b32 s0, 0xaf123456        ; encoding: [0xff,0x22,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x22,0x80,0xbe
+# GFX12: s_or_saveexec_b32 s0, -1                ; encoding: [0xc1,0x22,0x80,0xbe]
+
+0xf7,0x22,0x80,0xbe
+# GFX12: s_or_saveexec_b32 s0, -4.0              ; encoding: [0xf7,0x22,0x80,0xbe]
+
+0x7f,0x22,0x80,0xbe
+# GFX12: s_or_saveexec_b32 s0, exec_hi           ; encoding: [0x7f,0x22,0x80,0xbe]
+
+0x7e,0x22,0x80,0xbe
+# GFX12: s_or_saveexec_b32 s0, exec_lo           ; encoding: [0x7e,0x22,0x80,0xbe]
+
+0x7d,0x22,0x80,0xbe
+# GFX12: s_or_saveexec_b32 s0, m0                ; encoding: [0x7d,0x22,0x80,0xbe]
+
+0x68,0x22,0x80,0xbe
+# GFX12: s_or_saveexec_b32 s0, s104              ; encoding: [0x68,0x22,0x80,0xbe]
+
+0x01,0x22,0x80,0xbe
+# GFX12: s_or_saveexec_b32 s0, s1                ; encoding: [0x01,0x22,0x80,0xbe]
+
+0x6b,0x22,0x80,0xbe
+# GFX12: s_or_saveexec_b32 s0, vcc_hi            ; encoding: [0x6b,0x22,0x80,0xbe]
+
+0x6a,0x22,0x80,0xbe
+# GFX12: s_or_saveexec_b32 s0, vcc_lo            ; encoding: [0x6a,0x22,0x80,0xbe]
+
+0x68,0x22,0xe9,0xbe
+# GFX12: s_or_saveexec_b32 s105, s104            ; encoding: [0x68,0x22,0xe9,0xbe]
+
+0x01,0x22,0xe9,0xbe
+# GFX12: s_or_saveexec_b32 s105, s1              ; encoding: [0x01,0x22,0xe9,0xbe]
+
+0x01,0x22,0xeb,0xbe
+# GFX12: s_or_saveexec_b32 vcc_hi, s1            ; encoding: [0x01,0x22,0xeb,0xbe]
+
+0x01,0x22,0xea,0xbe
+# GFX12: s_or_saveexec_b32 vcc_lo, s1            ; encoding: [0x01,0x22,0xea,0xbe]
+
+0xf0,0x23,0x80,0xbe
+# GFX12: s_or_saveexec_b64 s[0:1], 0.5           ; encoding: [0xf0,0x23,0x80,0xbe]
+
+0x80,0x23,0x80,0xbe
+# GFX12: s_or_saveexec_b64 s[0:1], 0             ; encoding: [0x80,0x23,0x80,0xbe]
+
+0xff,0x23,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_or_saveexec_b64 s[0:1], 0x3f717273    ; encoding: [0xff,0x23,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x23,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_or_saveexec_b64 s[0:1], 0xaf123456    ; encoding: [0xff,0x23,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x23,0x80,0xbe
+# GFX12: s_or_saveexec_b64 s[0:1], -1            ; encoding: [0xc1,0x23,0x80,0xbe]
+
+0xf7,0x23,0x80,0xbe
+# GFX12: s_or_saveexec_b64 s[0:1], -4.0          ; encoding: [0xf7,0x23,0x80,0xbe]
+
+0x7e,0x23,0x80,0xbe
+# GFX12: s_or_saveexec_b64 s[0:1], exec          ; encoding: [0x7e,0x23,0x80,0xbe]
+
+0x66,0x23,0x80,0xbe
+# GFX12: s_or_saveexec_b64 s[0:1], s[102:103]    ; encoding: [0x66,0x23,0x80,0xbe]
+
+0x02,0x23,0x80,0xbe
+# GFX12: s_or_saveexec_b64 s[0:1], s[2:3]        ; encoding: [0x02,0x23,0x80,0xbe]
+
+0x6a,0x23,0x80,0xbe
+# GFX12: s_or_saveexec_b64 s[0:1], vcc           ; encoding: [0x6a,0x23,0x80,0xbe]
+
+0x66,0x23,0xe8,0xbe
+# GFX12: s_or_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x23,0xe8,0xbe]
+
+0x02,0x23,0xe8,0xbe
+# GFX12: s_or_saveexec_b64 s[104:105], s[2:3]    ; encoding: [0x02,0x23,0xe8,0xbe]
+
+0x02,0x23,0xea,0xbe
+# GFX12: s_or_saveexec_b64 vcc, s[2:3]           ; encoding: [0x02,0x23,0xea,0xbe]
+
+0x01,0x1a,0xff,0xbe
+# GFX12: s_quadmask_b32 exec_hi, s1              ; encoding: [0x01,0x1a,0xff,0xbe]
+
+0x01,0x1a,0xfe,0xbe
+# GFX12: s_quadmask_b32 exec_lo, s1              ; encoding: [0x01,0x1a,0xfe,0xbe]
+
+0x01,0x1a,0xfd,0xbe
+# GFX12: s_quadmask_b32 m0, s1                   ; encoding: [0x01,0x1a,0xfd,0xbe]
+
+0xf0,0x1a,0x80,0xbe
+# GFX12: s_quadmask_b32 s0, 0.5                  ; encoding: [0xf0,0x1a,0x80,0xbe]
+
+0x80,0x1a,0x80,0xbe
+# GFX12: s_quadmask_b32 s0, 0                    ; encoding: [0x80,0x1a,0x80,0xbe]
+
+0xff,0x1a,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_quadmask_b32 s0, 0x3f717273           ; encoding: [0xff,0x1a,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x1a,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_quadmask_b32 s0, 0xaf123456           ; encoding: [0xff,0x1a,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x1a,0x80,0xbe
+# GFX12: s_quadmask_b32 s0, -1                   ; encoding: [0xc1,0x1a,0x80,0xbe]
+
+0xf7,0x1a,0x80,0xbe
+# GFX12: s_quadmask_b32 s0, -4.0                 ; encoding: [0xf7,0x1a,0x80,0xbe]
+
+0x7f,0x1a,0x80,0xbe
+# GFX12: s_quadmask_b32 s0, exec_hi              ; encoding: [0x7f,0x1a,0x80,0xbe]
+
+0x7e,0x1a,0x80,0xbe
+# GFX12: s_quadmask_b32 s0, exec_lo              ; encoding: [0x7e,0x1a,0x80,0xbe]
+
+0x7d,0x1a,0x80,0xbe
+# GFX12: s_quadmask_b32 s0, m0                   ; encoding: [0x7d,0x1a,0x80,0xbe]
+
+0x68,0x1a,0x80,0xbe
+# GFX12: s_quadmask_b32 s0, s104                 ; encoding: [0x68,0x1a,0x80,0xbe]
+
+0x01,0x1a,0x80,0xbe
+# GFX12: s_quadmask_b32 s0, s1                   ; encoding: [0x01,0x1a,0x80,0xbe]
+
+0x6b,0x1a,0x80,0xbe
+# GFX12: s_quadmask_b32 s0, vcc_hi               ; encoding: [0x6b,0x1a,0x80,0xbe]
+
+0x6a,0x1a,0x80,0xbe
+# GFX12: s_quadmask_b32 s0, vcc_lo               ; encoding: [0x6a,0x1a,0x80,0xbe]
+
+0x68,0x1a,0xe9,0xbe
+# GFX12: s_quadmask_b32 s105, s104               ; encoding: [0x68,0x1a,0xe9,0xbe]
+
+0x01,0x1a,0xe9,0xbe
+# GFX12: s_quadmask_b32 s105, s1                 ; encoding: [0x01,0x1a,0xe9,0xbe]
+
+0x01,0x1a,0xeb,0xbe
+# GFX12: s_quadmask_b32 vcc_hi, s1               ; encoding: [0x01,0x1a,0xeb,0xbe]
+
+0x01,0x1a,0xea,0xbe
+# GFX12: s_quadmask_b32 vcc_lo, s1               ; encoding: [0x01,0x1a,0xea,0xbe]
+
+0x02,0x1b,0xfe,0xbe
+# GFX12: s_quadmask_b64 exec, s[2:3]             ; encoding: [0x02,0x1b,0xfe,0xbe]
+
+0xf0,0x1b,0x80,0xbe
+# GFX12: s_quadmask_b64 s[0:1], 0.5              ; encoding: [0xf0,0x1b,0x80,0xbe]
+
+0x80,0x1b,0x80,0xbe
+# GFX12: s_quadmask_b64 s[0:1], 0                ; encoding: [0x80,0x1b,0x80,0xbe]
+
+0xff,0x1b,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_quadmask_b64 s[0:1], 0x3f717273       ; encoding: [0xff,0x1b,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x1b,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_quadmask_b64 s[0:1], 0xaf123456       ; encoding: [0xff,0x1b,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x1b,0x80,0xbe
+# GFX12: s_quadmask_b64 s[0:1], -1               ; encoding: [0xc1,0x1b,0x80,0xbe]
+
+0xf7,0x1b,0x80,0xbe
+# GFX12: s_quadmask_b64 s[0:1], -4.0             ; encoding: [0xf7,0x1b,0x80,0xbe]
+
+0x7e,0x1b,0x80,0xbe
+# GFX12: s_quadmask_b64 s[0:1], exec             ; encoding: [0x7e,0x1b,0x80,0xbe]
+
+0x66,0x1b,0x80,0xbe
+# GFX12: s_quadmask_b64 s[0:1], s[102:103]       ; encoding: [0x66,0x1b,0x80,0xbe]
+
+0x02,0x1b,0x80,0xbe
+# GFX12: s_quadmask_b64 s[0:1], s[2:3]           ; encoding: [0x02,0x1b,0x80,0xbe]
+
+0x6a,0x1b,0x80,0xbe
+# GFX12: s_quadmask_b64 s[0:1], vcc              ; encoding: [0x6a,0x1b,0x80,0xbe]
+
+0x66,0x1b,0xe8,0xbe
+# GFX12: s_quadmask_b64 s[104:105], s[102:103]   ; encoding: [0x66,0x1b,0xe8,0xbe]
+
+0x02,0x1b,0xe8,0xbe
+# GFX12: s_quadmask_b64 s[104:105], s[2:3]       ; encoding: [0x02,0x1b,0xe8,0xbe]
+
+0x02,0x1b,0xea,0xbe
+# GFX12: s_quadmask_b64 vcc, s[2:3]              ; encoding: [0x02,0x1b,0xea,0xbe]
+
+0x00,0x4a,0x80,0xbe
+# GFX1200: s_rfe_b64 s[0:1]                        ; encoding: [0x00,0x4a,0x80,0xbe]
+# GFX1250: s_rfe_i64 s[0:1]                        ; encoding: [0x00,0x4a,0x80,0xbe]
+
+0x68,0x4a,0x80,0xbe
+# GFX1200: s_rfe_b64 s[104:105]                    ; encoding: [0x68,0x4a,0x80,0xbe]
+# GFX1250: s_rfe_i64 s[104:105]                    ; encoding: [0x68,0x4a,0x80,0xbe]
+
+0x6a,0x4a,0x80,0xbe
+# GFX1200: s_rfe_b64 vcc                           ; encoding: [0x6a,0x4a,0x80,0xbe]
+# GFX1250: s_rfe_i64 vcc                           ; encoding: [0x6a,0x4a,0x80,0xbe]
+
+0x00,0x4c,0x81,0xbe
+# GFX12: s_sendmsg_rtn_b32 s1, sendmsg(0, 0, 0)  ; encoding: [0x00,0x4c,0x81,0xbe]
+
+0x12,0x4c,0x82,0xbe
+# GFX12: s_sendmsg_rtn_b32 s2, sendmsg(18, 0, 0) ; encoding: [0x12,0x4c,0x82,0xbe]
+
+0xff,0x4c,0x83,0xbe
+# GFX12: s_sendmsg_rtn_b32 s3, sendmsg(255, 0, 0) ; encoding: [0xff,0x4c,0x83,0xbe]
+
+0x00,0x4d,0x80,0xbe
+# GFX12: s_sendmsg_rtn_b64 s[0:1], sendmsg(0, 0, 0) ; encoding: [0x00,0x4d,0x80,0xbe]
+
+0x12,0x4d,0x82,0xbe
+# GFX12: s_sendmsg_rtn_b64 s[2:3], sendmsg(18, 0, 0) ; encoding: [0x12,0x4d,0x82,0xbe]
+
+0xff,0x4d,0x84,0xbe
+# GFX12: s_sendmsg_rtn_b64 s[4:5], sendmsg(255, 0, 0) ; encoding: [0xff,0x4d,0x84,0xbe]
+
+0x80,0x4c,0x80,0xbe
+# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL) ; encoding: [0x80,0x4c,0x80,0xbe]
+
+0x81,0x4c,0x80,0xbe
+# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DDID) ; encoding: [0x81,0x4c,0x80,0xbe]
+
+0x82,0x4c,0x80,0xbe
+# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_TMA) ; encoding: [0x82,0x4c,0x80,0xbe]
+
+0x83,0x4c,0x80,0xbe
+# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_REALTIME) ; encoding: [0x83,0x4c,0x80,0xbe]
+
+0x84,0x4c,0x80,0xbe
+# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_SAVE_WAVE) ; encoding: [0x84,0x4c,0x80,0xbe]
+
+0x85,0x4c,0x80,0xbe
+# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_TBA) ; encoding: [0x85,0x4c,0x80,0xbe]
+
+0x86,0x4c,0x80,0xbe
+# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_TBA_TO_PC) ; encoding: [0x86,0x4c,0x80,0xbe]
+
+0x87,0x4c,0x80,0xbe
+# GFX12: s_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_SE_AID_ID) ; encoding: [0x87,0x4c,0x80,0xbe]
+
+0x00,0x48,0x80,0xbe
+# GFX1200: s_setpc_b64 s[0:1]                      ; encoding: [0x00,0x48,0x80,0xbe]
+# GFX1250: s_set_pc_i64 s[0:1]                     ; encoding: [0x00,0x48,0x80,0xbe]
+
+0x68,0x48,0x80,0xbe
+# GFX1200: s_setpc_b64 s[104:105]                  ; encoding: [0x68,0x48,0x80,0xbe]
+# GFX1250: s_set_pc_i64 s[104:105]                 ; encoding: [0x68,0x48,0x80,0xbe]
+
+0x6a,0x48,0x80,0xbe
+# GFX1200: s_setpc_b64 vcc                         ; encoding: [0x6a,0x48,0x80,0xbe]
+# GFX1250: s_set_pc_i64 vcc                        ; encoding: [0x6a,0x48,0x80,0xbe]
+
+0xcb,0x48,0xf5,0xbe
+# GFX1200: s_setpc_b64 -11/*Invalid immediate*/    ; encoding: [0xf5,0x48,0x80,0xbe]
+# GFX1250: s_set_pc_i64 -11/*Invalid immediate*/   ; encoding: [0xf5,0x48,0x80,0xbe]
+
+0x01,0x0f,0xff,0xbe
+# GFX12: s_sext_i32_i16 exec_hi, s1              ; encoding: [0x01,0x0f,0xff,0xbe]
+
+0x01,0x0f,0xfe,0xbe
+# GFX12: s_sext_i32_i16 exec_lo, s1              ; encoding: [0x01,0x0f,0xfe,0xbe]
+
+0x01,0x0f,0xfd,0xbe
+# GFX12: s_sext_i32_i16 m0, s1                   ; encoding: [0x01,0x0f,0xfd,0xbe]
+
+0xf0,0x0f,0x80,0xbe
+# GFX12: s_sext_i32_i16 s0, 0.5                  ; encoding: [0xf0,0x0f,0x80,0xbe]
+
+0x80,0x0f,0x80,0xbe
+# GFX12: s_sext_i32_i16 s0, 0                    ; encoding: [0x80,0x0f,0x80,0xbe]
+
+0xff,0x0f,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_sext_i32_i16 s0, 0x3f717273           ; encoding: [0xff,0x0f,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x0f,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_sext_i32_i16 s0, 0xaf123456           ; encoding: [0xff,0x0f,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x0f,0x80,0xbe
+# GFX12: s_sext_i32_i16 s0, -1                   ; encoding: [0xc1,0x0f,0x80,0xbe]
+
+0xf7,0x0f,0x80,0xbe
+# GFX12: s_sext_i32_i16 s0, -4.0                 ; encoding: [0xf7,0x0f,0x80,0xbe]
+
+0x7f,0x0f,0x80,0xbe
+# GFX12: s_sext_i32_i16 s0, exec_hi              ; encoding: [0x7f,0x0f,0x80,0xbe]
+
+0x7e,0x0f,0x80,0xbe
+# GFX12: s_sext_i32_i16 s0, exec_lo              ; encoding: [0x7e,0x0f,0x80,0xbe]
+
+0x7d,0x0f,0x80,0xbe
+# GFX12: s_sext_i32_i16 s0, m0                   ; encoding: [0x7d,0x0f,0x80,0xbe]
+
+0x68,0x0f,0x80,0xbe
+# GFX12: s_sext_i32_i16 s0, s104                 ; encoding: [0x68,0x0f,0x80,0xbe]
+
+0x01,0x0f,0x80,0xbe
+# GFX12: s_sext_i32_i16 s0, s1                   ; encoding: [0x01,0x0f,0x80,0xbe]
+
+0x6b,0x0f,0x80,0xbe
+# GFX12: s_sext_i32_i16 s0, vcc_hi               ; encoding: [0x6b,0x0f,0x80,0xbe]
+
+0x6a,0x0f,0x80,0xbe
+# GFX12: s_sext_i32_i16 s0, vcc_lo               ; encoding: [0x6a,0x0f,0x80,0xbe]
+
+0x68,0x0f,0xe9,0xbe
+# GFX12: s_sext_i32_i16 s105, s104               ; encoding: [0x68,0x0f,0xe9,0xbe]
+
+0x01,0x0f,0xe9,0xbe
+# GFX12: s_sext_i32_i16 s105, s1                 ; encoding: [0x01,0x0f,0xe9,0xbe]
+
+0x01,0x0f,0xeb,0xbe
+# GFX12: s_sext_i32_i16 vcc_hi, s1               ; encoding: [0x01,0x0f,0xeb,0xbe]
+
+0x01,0x0f,0xea,0xbe
+# GFX12: s_sext_i32_i16 vcc_lo, s1               ; encoding: [0x01,0x0f,0xea,0xbe]
+
+0x01,0x0e,0xff,0xbe
+# GFX12: s_sext_i32_i8 exec_hi, s1               ; encoding: [0x01,0x0e,0xff,0xbe]
+
+0x01,0x0e,0xfe,0xbe
+# GFX12: s_sext_i32_i8 exec_lo, s1               ; encoding: [0x01,0x0e,0xfe,0xbe]
+
+0x01,0x0e,0xfd,0xbe
+# GFX12: s_sext_i32_i8 m0, s1                    ; encoding: [0x01,0x0e,0xfd,0xbe]
+
+0xf0,0x0e,0x80,0xbe
+# GFX12: s_sext_i32_i8 s0, 0.5                   ; encoding: [0xf0,0x0e,0x80,0xbe]
+
+0x80,0x0e,0x80,0xbe
+# GFX12: s_sext_i32_i8 s0, 0                     ; encoding: [0x80,0x0e,0x80,0xbe]
+
+0xff,0x0e,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_sext_i32_i8 s0, 0x3f717273            ; encoding: [0xff,0x0e,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x0e,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_sext_i32_i8 s0, 0xaf123456            ; encoding: [0xff,0x0e,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x0e,0x80,0xbe
+# GFX12: s_sext_i32_i8 s0, -1                    ; encoding: [0xc1,0x0e,0x80,0xbe]
+
+0xf7,0x0e,0x80,0xbe
+# GFX12: s_sext_i32_i8 s0, -4.0                  ; encoding: [0xf7,0x0e,0x80,0xbe]
+
+0x7f,0x0e,0x80,0xbe
+# GFX12: s_sext_i32_i8 s0, exec_hi               ; encoding: [0x7f,0x0e,0x80,0xbe]
+
+0x7e,0x0e,0x80,0xbe
+# GFX12: s_sext_i32_i8 s0, exec_lo               ; encoding: [0x7e,0x0e,0x80,0xbe]
+
+0x7d,0x0e,0x80,0xbe
+# GFX12: s_sext_i32_i8 s0, m0                    ; encoding: [0x7d,0x0e,0x80,0xbe]
+
+0x68,0x0e,0x80,0xbe
+# GFX12: s_sext_i32_i8 s0, s104                  ; encoding: [0x68,0x0e,0x80,0xbe]
+
+0x01,0x0e,0x80,0xbe
+# GFX12: s_sext_i32_i8 s0, s1                    ; encoding: [0x01,0x0e,0x80,0xbe]
+
+0x6b,0x0e,0x80,0xbe
+# GFX12: s_sext_i32_i8 s0, vcc_hi                ; encoding: [0x6b,0x0e,0x80,0xbe]
+
+0x6a,0x0e,0x80,0xbe
+# GFX12: s_sext_i32_i8 s0, vcc_lo                ; encoding: [0x6a,0x0e,0x80,0xbe]
+
+0x68,0x0e,0xe9,0xbe
+# GFX12: s_sext_i32_i8 s105, s104                ; encoding: [0x68,0x0e,0xe9,0xbe]
+
+0x01,0x0e,0xe9,0xbe
+# GFX12: s_sext_i32_i8 s105, s1                  ; encoding: [0x01,0x0e,0xe9,0xbe]
+
+0x01,0x0e,0xeb,0xbe
+# GFX12: s_sext_i32_i8 vcc_hi, s1                ; encoding: [0x01,0x0e,0xeb,0xbe]
+
+0x01,0x0e,0xea,0xbe
+# GFX12: s_sext_i32_i8 vcc_lo, s1                ; encoding: [0x01,0x0e,0xea,0xbe]
+
+0x66,0x49,0x80,0xbe
+# GFX1200: s_swappc_b64 s[0:1], s[102:103]         ; encoding: [0x66,0x49,0x80,0xbe]
+# GFX1250: s_swap_pc_i64 s[0:1], s[102:103]        ; encoding: [0x66,0x49,0x80,0xbe]
+
+0x02,0x49,0x80,0xbe
+# GFX1200: s_swappc_b64 s[0:1], s[2:3]             ; encoding: [0x02,0x49,0x80,0xbe]
+# GFX1250: s_swap_pc_i64 s[0:1], s[2:3]            ; encoding: [0x02,0x49,0x80,0xbe]
+
+0x6a,0x49,0x80,0xbe
+# GFX1200: s_swappc_b64 s[0:1], vcc                ; encoding: [0x6a,0x49,0x80,0xbe]
+# GFX1250: s_swap_pc_i64 s[0:1], vcc               ; encoding: [0x6a,0x49,0x80,0xbe]
+
+0x66,0x49,0xe8,0xbe
+# GFX1200: s_swappc_b64 s[104:105], s[102:103]     ; encoding: [0x66,0x49,0xe8,0xbe]
+# GFX1250: s_swap_pc_i64 s[104:105], s[102:103]    ; encoding: [0x66,0x49,0xe8,0xbe]
+
+0x02,0x49,0xe8,0xbe
+# GFX1200: s_swappc_b64 s[104:105], s[2:3]         ; encoding: [0x02,0x49,0xe8,0xbe]
+# GFX1250: s_swap_pc_i64 s[104:105], s[2:3]        ; encoding: [0x02,0x49,0xe8,0xbe]
+
+0x02,0x49,0xea,0xbe
+# GFX1200: s_swappc_b64 vcc, s[2:3]                ; encoding: [0x02,0x49,0xea,0xbe]
+# GFX1250: s_swap_pc_i64 vcc, s[2:3]               ; encoding: [0x02,0x49,0xea,0xbe]
+
+0x01,0x1c,0xff,0xbe
+# GFX12: s_wqm_b32 exec_hi, s1                   ; encoding: [0x01,0x1c,0xff,0xbe]
+
+0x01,0x1c,0xfe,0xbe
+# GFX12: s_wqm_b32 exec_lo, s1                   ; encoding: [0x01,0x1c,0xfe,0xbe]
+
+0x01,0x1c,0xfd,0xbe
+# GFX12: s_wqm_b32 m0, s1                        ; encoding: [0x01,0x1c,0xfd,0xbe]
+
+0xf0,0x1c,0x80,0xbe
+# GFX12: s_wqm_b32 s0, 0.5                       ; encoding: [0xf0,0x1c,0x80,0xbe]
+
+0x80,0x1c,0x80,0xbe
+# GFX12: s_wqm_b32 s0, 0                         ; encoding: [0x80,0x1c,0x80,0xbe]
+
+0xff,0x1c,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_wqm_b32 s0, 0x3f717273                ; encoding: [0xff,0x1c,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x1c,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_wqm_b32 s0, 0xaf123456                ; encoding: [0xff,0x1c,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x1c,0x80,0xbe
+# GFX12: s_wqm_b32 s0, -1                        ; encoding: [0xc1,0x1c,0x80,0xbe]
+
+0xf7,0x1c,0x80,0xbe
+# GFX12: s_wqm_b32 s0, -4.0                      ; encoding: [0xf7,0x1c,0x80,0xbe]
+
+0x7f,0x1c,0x80,0xbe
+# GFX12: s_wqm_b32 s0, exec_hi                   ; encoding: [0x7f,0x1c,0x80,0xbe]
+
+0x7e,0x1c,0x80,0xbe
+# GFX12: s_wqm_b32 s0, exec_lo                   ; encoding: [0x7e,0x1c,0x80,0xbe]
+
+0x7d,0x1c,0x80,0xbe
+# GFX12: s_wqm_b32 s0, m0                        ; encoding: [0x7d,0x1c,0x80,0xbe]
+
+0x68,0x1c,0x80,0xbe
+# GFX12: s_wqm_b32 s0, s104                      ; encoding: [0x68,0x1c,0x80,0xbe]
+
+0x01,0x1c,0x80,0xbe
+# GFX12: s_wqm_b32 s0, s1                        ; encoding: [0x01,0x1c,0x80,0xbe]
+
+0x6b,0x1c,0x80,0xbe
+# GFX12: s_wqm_b32 s0, vcc_hi                    ; encoding: [0x6b,0x1c,0x80,0xbe]
+
+0x6a,0x1c,0x80,0xbe
+# GFX12: s_wqm_b32 s0, vcc_lo                    ; encoding: [0x6a,0x1c,0x80,0xbe]
+
+0x68,0x1c,0xe9,0xbe
+# GFX12: s_wqm_b32 s105, s104                    ; encoding: [0x68,0x1c,0xe9,0xbe]
+
+0x01,0x1c,0xe9,0xbe
+# GFX12: s_wqm_b32 s105, s1                      ; encoding: [0x01,0x1c,0xe9,0xbe]
+
+0x01,0x1c,0xeb,0xbe
+# GFX12: s_wqm_b32 vcc_hi, s1                    ; encoding: [0x01,0x1c,0xeb,0xbe]
+
+0x01,0x1c,0xea,0xbe
+# GFX12: s_wqm_b32 vcc_lo, s1                    ; encoding: [0x01,0x1c,0xea,0xbe]
+
+0x02,0x1d,0xfe,0xbe
+# GFX12: s_wqm_b64 exec, s[2:3]                  ; encoding: [0x02,0x1d,0xfe,0xbe]
+
+0xf0,0x1d,0x80,0xbe
+# GFX12: s_wqm_b64 s[0:1], 0.5                   ; encoding: [0xf0,0x1d,0x80,0xbe]
+
+0x80,0x1d,0x80,0xbe
+# GFX12: s_wqm_b64 s[0:1], 0                     ; encoding: [0x80,0x1d,0x80,0xbe]
+
+0xff,0x1d,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_wqm_b64 s[0:1], 0x3f717273            ; encoding: [0xff,0x1d,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x1d,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_wqm_b64 s[0:1], 0xaf123456            ; encoding: [0xff,0x1d,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x1d,0x80,0xbe
+# GFX12: s_wqm_b64 s[0:1], -1                    ; encoding: [0xc1,0x1d,0x80,0xbe]
+
+0xf7,0x1d,0x80,0xbe
+# GFX12: s_wqm_b64 s[0:1], -4.0                  ; encoding: [0xf7,0x1d,0x80,0xbe]
+
+0x7e,0x1d,0x80,0xbe
+# GFX12: s_wqm_b64 s[0:1], exec                  ; encoding: [0x7e,0x1d,0x80,0xbe]
+
+0x66,0x1d,0x80,0xbe
+# GFX12: s_wqm_b64 s[0:1], s[102:103]            ; encoding: [0x66,0x1d,0x80,0xbe]
+
+0x02,0x1d,0x80,0xbe
+# GFX12: s_wqm_b64 s[0:1], s[2:3]                ; encoding: [0x02,0x1d,0x80,0xbe]
+
+0x6a,0x1d,0x80,0xbe
+# GFX12: s_wqm_b64 s[0:1], vcc                   ; encoding: [0x6a,0x1d,0x80,0xbe]
+
+0x66,0x1d,0xe8,0xbe
+# GFX12: s_wqm_b64 s[104:105], s[102:103]        ; encoding: [0x66,0x1d,0xe8,0xbe]
+
+0x02,0x1d,0xe8,0xbe
+# GFX12: s_wqm_b64 s[104:105], s[2:3]            ; encoding: [0x02,0x1d,0xe8,0xbe]
+
+0x02,0x1d,0xea,0xbe
+# GFX12: s_wqm_b64 vcc, s[2:3]                   ; encoding: [0x02,0x1d,0xea,0xbe]
+
+0xf0,0x2a,0x80,0xbe
+# GFX12: s_xnor_saveexec_b32 s0, 0.5             ; encoding: [0xf0,0x2a,0x80,0xbe]
+
+0x80,0x2a,0x80,0xbe
+# GFX12: s_xnor_saveexec_b32 s0, 0               ; encoding: [0x80,0x2a,0x80,0xbe]
+
+0xff,0x2a,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_xnor_saveexec_b32 s0, 0x3f717273      ; encoding: [0xff,0x2a,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x2a,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_xnor_saveexec_b32 s0, 0xaf123456      ; encoding: [0xff,0x2a,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x2a,0x80,0xbe
+# GFX12: s_xnor_saveexec_b32 s0, -1              ; encoding: [0xc1,0x2a,0x80,0xbe]
+
+0xf7,0x2a,0x80,0xbe
+# GFX12: s_xnor_saveexec_b32 s0, -4.0            ; encoding: [0xf7,0x2a,0x80,0xbe]
+
+0x7f,0x2a,0x80,0xbe
+# GFX12: s_xnor_saveexec_b32 s0, exec_hi         ; encoding: [0x7f,0x2a,0x80,0xbe]
+
+0x7e,0x2a,0x80,0xbe
+# GFX12: s_xnor_saveexec_b32 s0, exec_lo         ; encoding: [0x7e,0x2a,0x80,0xbe]
+
+0x7d,0x2a,0x80,0xbe
+# GFX12: s_xnor_saveexec_b32 s0, m0              ; encoding: [0x7d,0x2a,0x80,0xbe]
+
+0x68,0x2a,0x80,0xbe
+# GFX12: s_xnor_saveexec_b32 s0, s104            ; encoding: [0x68,0x2a,0x80,0xbe]
+
+0x01,0x2a,0x80,0xbe
+# GFX12: s_xnor_saveexec_b32 s0, s1              ; encoding: [0x01,0x2a,0x80,0xbe]
+
+0x6b,0x2a,0x80,0xbe
+# GFX12: s_xnor_saveexec_b32 s0, vcc_hi          ; encoding: [0x6b,0x2a,0x80,0xbe]
+
+0x6a,0x2a,0x80,0xbe
+# GFX12: s_xnor_saveexec_b32 s0, vcc_lo          ; encoding: [0x6a,0x2a,0x80,0xbe]
+
+0x68,0x2a,0xe9,0xbe
+# GFX12: s_xnor_saveexec_b32 s105, s104          ; encoding: [0x68,0x2a,0xe9,0xbe]
+
+0x01,0x2a,0xe9,0xbe
+# GFX12: s_xnor_saveexec_b32 s105, s1            ; encoding: [0x01,0x2a,0xe9,0xbe]
+
+0x01,0x2a,0xeb,0xbe
+# GFX12: s_xnor_saveexec_b32 vcc_hi, s1          ; encoding: [0x01,0x2a,0xeb,0xbe]
+
+0x01,0x2a,0xea,0xbe
+# GFX12: s_xnor_saveexec_b32 vcc_lo, s1          ; encoding: [0x01,0x2a,0xea,0xbe]
+
+0xf0,0x2b,0x80,0xbe
+# GFX12: s_xnor_saveexec_b64 s[0:1], 0.5         ; encoding: [0xf0,0x2b,0x80,0xbe]
+
+0x80,0x2b,0x80,0xbe
+# GFX12: s_xnor_saveexec_b64 s[0:1], 0           ; encoding: [0x80,0x2b,0x80,0xbe]
+
+0xff,0x2b,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_xnor_saveexec_b64 s[0:1], 0x3f717273  ; encoding: [0xff,0x2b,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x2b,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_xnor_saveexec_b64 s[0:1], 0xaf123456  ; encoding: [0xff,0x2b,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x2b,0x80,0xbe
+# GFX12: s_xnor_saveexec_b64 s[0:1], -1          ; encoding: [0xc1,0x2b,0x80,0xbe]
+
+0xf7,0x2b,0x80,0xbe
+# GFX12: s_xnor_saveexec_b64 s[0:1], -4.0        ; encoding: [0xf7,0x2b,0x80,0xbe]
+
+0x7e,0x2b,0x80,0xbe
+# GFX12: s_xnor_saveexec_b64 s[0:1], exec        ; encoding: [0x7e,0x2b,0x80,0xbe]
+
+0x66,0x2b,0x80,0xbe
+# GFX12: s_xnor_saveexec_b64 s[0:1], s[102:103]  ; encoding: [0x66,0x2b,0x80,0xbe]
+
+0x02,0x2b,0x80,0xbe
+# GFX12: s_xnor_saveexec_b64 s[0:1], s[2:3]      ; encoding: [0x02,0x2b,0x80,0xbe]
+
+0x6a,0x2b,0x80,0xbe
+# GFX12: s_xnor_saveexec_b64 s[0:1], vcc         ; encoding: [0x6a,0x2b,0x80,0xbe]
+
+0x66,0x2b,0xe8,0xbe
+# GFX12: s_xnor_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x2b,0xe8,0xbe]
+
+0x02,0x2b,0xe8,0xbe
+# GFX12: s_xnor_saveexec_b64 s[104:105], s[2:3]  ; encoding: [0x02,0x2b,0xe8,0xbe]
+
+0x02,0x2b,0xea,0xbe
+# GFX12: s_xnor_saveexec_b64 vcc, s[2:3]         ; encoding: [0x02,0x2b,0xea,0xbe]
+
+0xf0,0x24,0x80,0xbe
+# GFX12: s_xor_saveexec_b32 s0, 0.5              ; encoding: [0xf0,0x24,0x80,0xbe]
+
+0x80,0x24,0x80,0xbe
+# GFX12: s_xor_saveexec_b32 s0, 0                ; encoding: [0x80,0x24,0x80,0xbe]
+
+0xff,0x24,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_xor_saveexec_b32 s0, 0x3f717273       ; encoding: [0xff,0x24,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x24,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_xor_saveexec_b32 s0, 0xaf123456       ; encoding: [0xff,0x24,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x24,0x80,0xbe
+# GFX12: s_xor_saveexec_b32 s0, -1               ; encoding: [0xc1,0x24,0x80,0xbe]
+
+0xf7,0x24,0x80,0xbe
+# GFX12: s_xor_saveexec_b32 s0, -4.0             ; encoding: [0xf7,0x24,0x80,0xbe]
+
+0x7f,0x24,0x80,0xbe
+# GFX12: s_xor_saveexec_b32 s0, exec_hi          ; encoding: [0x7f,0x24,0x80,0xbe]
+
+0x7e,0x24,0x80,0xbe
+# GFX12: s_xor_saveexec_b32 s0, exec_lo          ; encoding: [0x7e,0x24,0x80,0xbe]
+
+0x7d,0x24,0x80,0xbe
+# GFX12: s_xor_saveexec_b32 s0, m0               ; encoding: [0x7d,0x24,0x80,0xbe]
+
+0x68,0x24,0x80,0xbe
+# GFX12: s_xor_saveexec_b32 s0, s104             ; encoding: [0x68,0x24,0x80,0xbe]
+
+0x01,0x24,0x80,0xbe
+# GFX12: s_xor_saveexec_b32 s0, s1               ; encoding: [0x01,0x24,0x80,0xbe]
+
+0x6b,0x24,0x80,0xbe
+# GFX12: s_xor_saveexec_b32 s0, vcc_hi           ; encoding: [0x6b,0x24,0x80,0xbe]
+
+0x6a,0x24,0x80,0xbe
+# GFX12: s_xor_saveexec_b32 s0, vcc_lo           ; encoding: [0x6a,0x24,0x80,0xbe]
+
+0x68,0x24,0xe9,0xbe
+# GFX12: s_xor_saveexec_b32 s105, s104           ; encoding: [0x68,0x24,0xe9,0xbe]
+
+0x01,0x24,0xe9,0xbe
+# GFX12: s_xor_saveexec_b32 s105, s1             ; encoding: [0x01,0x24,0xe9,0xbe]
+
+0x01,0x24,0xeb,0xbe
+# GFX12: s_xor_saveexec_b32 vcc_hi, s1           ; encoding: [0x01,0x24,0xeb,0xbe]
+
+0x01,0x24,0xea,0xbe
+# GFX12: s_xor_saveexec_b32 vcc_lo, s1           ; encoding: [0x01,0x24,0xea,0xbe]
+
+0xf0,0x25,0x80,0xbe
+# GFX12: s_xor_saveexec_b64 s[0:1], 0.5          ; encoding: [0xf0,0x25,0x80,0xbe]
+
+0x80,0x25,0x80,0xbe
+# GFX12: s_xor_saveexec_b64 s[0:1], 0            ; encoding: [0x80,0x25,0x80,0xbe]
+
+0xff,0x25,0x80,0xbe,0x73,0x72,0x71,0x3f
+# GFX12: s_xor_saveexec_b64 s[0:1], 0x3f717273   ; encoding: [0xff,0x25,0x80,0xbe,0x73,0x72,0x71,0x3f]
+
+0xff,0x25,0x80,0xbe,0x56,0x34,0x12,0xaf
+# GFX12: s_xor_saveexec_b64 s[0:1], 0xaf123456   ; encoding: [0xff,0x25,0x80,0xbe,0x56,0x34,0x12,0xaf]
+
+0xc1,0x25,0x80,0xbe
+# GFX12: s_xor_saveexec_b64 s[0:1], -1           ; encoding: [0xc1,0x25,0x80,0xbe]
+
+0xf7,0x25,0x80,0xbe
+# GFX12: s_xor_saveexec_b64 s[0:1], -4.0         ; encoding: [0xf7,0x25,0x80,0xbe]
+
+0x7e,0x25,0x80,0xbe
+# GFX12: s_xor_saveexec_b64 s[0:1], exec         ; encoding: [0x7e,0x25,0x80,0xbe]
+
+0x66,0x25,0x80,0xbe
+# GFX12: s_xor_saveexec_b64 s[0:1], s[102:103]   ; encoding: [0x66,0x25,0x80,0xbe]
+
+0x02,0x25,0x80,0xbe
+# GFX12: s_xor_saveexec_b64 s[0:1], s[2:3]       ; encoding: [0x02,0x25,0x80,0xbe]
+
+0x6a,0x25,0x80,0xbe
+# GFX12: s_xor_saveexec_b64 s[0:1], vcc          ; encoding: [0x6a,0x25,0x80,0xbe]
+
+0x66,0x25,0xe8,0xbe
+# GFX12: s_xor_saveexec_b64 s[104:105], s[102:103] ; encoding: [0x66,0x25,0xe8,0xbe]
+
+0x02,0x25,0xe8,0xbe
+# GFX12: s_xor_saveexec_b64 s[104:105], s[2:3]   ; encoding: [0x02,0x25,0xe8,0xbe]
+
+0x02,0x25,0xea,0xbe
+# GFX12: s_xor_saveexec_b64 vcc, s[2:3]          ; encoding: [0x02,0x25,0xea,0xbe]

>From 2f403f25b1a76fd6d39ac3bc13aeeda72bcd170c Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 18:54:44 +0530
Subject: [PATCH 44/55] Update SIDefines.h

---
 llvm/lib/Target/AMDGPU/SIDefines.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h
index b836162ed9370..ebef7ce974f15 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -201,8 +201,8 @@ namespace AMDGPU {
 enum OperandType : unsigned {
   /// Operands with register, 32-bit, or 64-bit immediate
   OPERAND_REG_IMM_INT32 = MCOI::OPERAND_FIRST_TARGET,
-  OPERAND_REG_IMM_INT64,  // Signed 64-bit integer operand (uses IsInt<32>)
-  OPERAND_REG_IMM_B64,    // Unsigned 64-bit integer operand (uses IsUInt<32>)
+  OPERAND_REG_IMM_INT64, // Signed 64-bit integer operand (uses IsInt<32>)
+  OPERAND_REG_IMM_B64,   // Unsigned 64-bit integer operand (uses IsUInt<32>)
   OPERAND_REG_IMM_INT16,
   OPERAND_REG_IMM_FP32,
   OPERAND_REG_IMM_FP64,

>From 51049f96d2e54f9a4c8ea898138ab1706ed6bb40 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sat, 14 Mar 2026 18:55:40 +0530
Subject: [PATCH 45/55] Update SIInstrInfo.cpp

---
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index cb66575bc959d..d52890c795ab7 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -6544,10 +6544,8 @@ bool SIInstrInfo::isOperandLegal(const MachineInstr &MI, unsigned OpIdx,
   if (MO->isImm()) {
     uint64_t Imm = MO->getImm();
     bool Is64BitFPOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_FP64;
-    bool Is64BitSignedOp =
-        OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_INT64;
-    bool Is64BitUnsignedOp =
-        OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_B64;
+    bool Is64BitSignedOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_INT64;
+    bool Is64BitUnsignedOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_B64;
     bool Is64BitOp = Is64BitFPOp || Is64BitSignedOp || Is64BitUnsignedOp ||
                      OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_V2INT32 ||
                      OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_V2FP32;

>From 9db12887193b553496f54e2c47cbec01c224c79d Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 15 Mar 2026 00:16:11 +0530
Subject: [PATCH 46/55] Update SIDefines.h

---
 llvm/lib/Target/AMDGPU/SIDefines.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h
index ebef7ce974f15..f1fab4b04941f 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -201,7 +201,8 @@ namespace AMDGPU {
 enum OperandType : unsigned {
   /// Operands with register, 32-bit, or 64-bit immediate
   OPERAND_REG_IMM_INT32 = MCOI::OPERAND_FIRST_TARGET,
-  OPERAND_REG_IMM_INT64, // Signed 64-bit integer operand (uses IsInt<32>)
+  OPERAND_REG_IMM_I64, // Signed 64-bit integer operand (uses isInt<32>)
+  OPERAND_REG_IMM_U64, // Unsigned 64-bit integer operand (uses isUInt<32>)
   OPERAND_REG_IMM_B64,   // Unsigned 64-bit integer operand (uses IsUInt<32>)
   OPERAND_REG_IMM_INT16,
   OPERAND_REG_IMM_FP32,

>From 3f1aafdc94ac1244ac5c9ca8c59cf6b821e11182 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 15 Mar 2026 00:43:35 +0530
Subject: [PATCH 47/55] Update SIInstrInfo.cpp

---
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 4364 +-----------------------
 1 file changed, 6 insertions(+), 4358 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index d52890c795ab7..b93e6ddaba4f0 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -4738,8 +4738,8 @@ bool SIInstrInfo::isInlineConstant(int64_t Imm, uint8_t OperandType) const {
     int32_t Trunc = static_cast<int32_t>(Imm);
     return AMDGPU::isInlinableLiteral32(Trunc, ST.hasInv2PiInlineImm());
   }
-  case AMDGPU::OPERAND_REG_IMM_INT64:
-  case AMDGPU::OPERAND_REG_IMM_B64:
+  case AMDGPU::OPERAND_REG_IMM_I64:
+  case AMDGPU::OPERAND_REG_IMM_U64:
   case AMDGPU::OPERAND_REG_IMM_FP64:
   case AMDGPU::OPERAND_REG_INLINE_C_INT64:
   case AMDGPU::OPERAND_REG_INLINE_C_FP64:
@@ -5225,8 +5225,8 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
       }
       break;
     case AMDGPU::OPERAND_REG_IMM_INT32:
-    case AMDGPU::OPERAND_REG_IMM_INT64:
-    case AMDGPU::OPERAND_REG_IMM_B64:
+    case AMDGPU::OPERAND_REG_IMM_I64:
+    case AMDGPU::OPERAND_REG_IMM_U64:
     case AMDGPU::OPERAND_REG_IMM_INT16:
     case AMDGPU::OPERAND_REG_IMM_FP32:
     case AMDGPU::OPERAND_REG_IMM_V2FP32:
@@ -6544,8 +6544,8 @@ bool SIInstrInfo::isOperandLegal(const MachineInstr &MI, unsigned OpIdx,
   if (MO->isImm()) {
     uint64_t Imm = MO->getImm();
     bool Is64BitFPOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_FP64;
-    bool Is64BitSignedOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_INT64;
-    bool Is64BitUnsignedOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_B64;
+    bool Is64BitSignedOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_I64;
+    bool Is64BitUnsignedOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_U64;
     bool Is64BitOp = Is64BitFPOp || Is64BitSignedOp || Is64BitUnsignedOp ||
                      OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_V2INT32 ||
                      OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_V2FP32;
@@ -6996,4355 +6996,3 @@ bool SIInstrInfo::moveFlatAddrToVGPR(MachineInstr &Inst) const {
       Inst.removeOperand(OldVAddrIdx);
 
       if (NewVDstIn != -1) {
-        int NewVDst = AMDGPU::getNamedOperandIdx(NewOpc, AMDGPU::OpName::vdst);
-        Inst.tieOperands(NewVDst, NewVDstIn);
-      }
-    }
-  }
-
-  if (VAddrDef && MRI.use_nodbg_empty(VAddrDef->getOperand(0).getReg()))
-    VAddrDef->eraseFromParent();
-
-  return true;
-}
-
-// FIXME: Remove this when SelectionDAG is obsoleted.
-void SIInstrInfo::legalizeOperandsFLAT(MachineRegisterInfo &MRI,
-                                       MachineInstr &MI) const {
-  if (!isSegmentSpecificFLAT(MI) && !ST.hasFlatGVSMode())
-    return;
-
-  // Fixup SGPR operands in VGPRs. We only select these when the DAG divergence
-  // thinks they are uniform, so a readfirstlane should be valid.
-  MachineOperand *SAddr = getNamedOperand(MI, AMDGPU::OpName::saddr);
-  if (!SAddr || RI.isSGPRClass(MRI.getRegClass(SAddr->getReg())))
-    return;
-
-  if (moveFlatAddrToVGPR(MI))
-    return;
-
-  const TargetRegisterClass *DeclaredRC =
-      getRegClass(MI.getDesc(), SAddr->getOperandNo());
-
-  Register ToSGPR = readlaneVGPRToSGPR(SAddr->getReg(), MI, MRI, DeclaredRC);
-  SAddr->setReg(ToSGPR);
-}
-
-void SIInstrInfo::legalizeGenericOperand(MachineBasicBlock &InsertMBB,
-                                         MachineBasicBlock::iterator I,
-                                         const TargetRegisterClass *DstRC,
-                                         MachineOperand &Op,
-                                         MachineRegisterInfo &MRI,
-                                         const DebugLoc &DL) const {
-  Register OpReg = Op.getReg();
-  unsigned OpSubReg = Op.getSubReg();
-
-  const TargetRegisterClass *OpRC = RI.getSubClassWithSubReg(
-      RI.getRegClassForReg(MRI, OpReg), OpSubReg);
-
-  // Check if operand is already the correct register class.
-  if (DstRC == OpRC)
-    return;
-
-  Register DstReg = MRI.createVirtualRegister(DstRC);
-  auto Copy =
-      BuildMI(InsertMBB, I, DL, get(AMDGPU::COPY), DstReg).addReg(OpReg);
-  Op.setReg(DstReg);
-
-  MachineInstr *Def = MRI.getVRegDef(OpReg);
-  if (!Def)
-    return;
-
-  // Try to eliminate the copy if it is copying an immediate value.
-  if (Def->isMoveImmediate() && DstRC != &AMDGPU::VReg_1RegClass)
-    foldImmediate(*Copy, *Def, OpReg, &MRI);
-
-  bool ImpDef = Def->isImplicitDef();
-  while (!ImpDef && Def && Def->isCopy()) {
-    if (Def->getOperand(1).getReg().isPhysical())
-      break;
-    Def = MRI.getUniqueVRegDef(Def->getOperand(1).getReg());
-    ImpDef = Def && Def->isImplicitDef();
-  }
-  if (!RI.isSGPRClass(DstRC) && !Copy->readsRegister(AMDGPU::EXEC, &RI) &&
-      !ImpDef)
-    Copy.addReg(AMDGPU::EXEC, RegState::Implicit);
-}
-
-// Emit the actual waterfall loop, executing the wrapped instruction for each
-// unique value of \p ScalarOps across all lanes. In the best case we execute 1
-// iteration, in the worst case we execute 64 (once per lane).
-static void
-emitLoadScalarOpsFromVGPRLoop(const SIInstrInfo &TII,
-                              MachineRegisterInfo &MRI,
-                              MachineBasicBlock &LoopBB,
-                              MachineBasicBlock &BodyBB,
-                              const DebugLoc &DL,
-                              ArrayRef<MachineOperand *> ScalarOps) {
-  MachineFunction &MF = *LoopBB.getParent();
-  const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
-  const SIRegisterInfo *TRI = ST.getRegisterInfo();
-  const AMDGPU::LaneMaskConstants &LMC = AMDGPU::LaneMaskConstants::get(ST);
-  const auto *BoolXExecRC = TRI->getWaveMaskRegClass();
-
-  MachineBasicBlock::iterator I = LoopBB.begin();
-  Register CondReg;
-
-  for (MachineOperand *ScalarOp : ScalarOps) {
-    unsigned RegSize = TRI->getRegSizeInBits(ScalarOp->getReg(), MRI);
-    unsigned NumSubRegs = RegSize / 32;
-    Register VScalarOp = ScalarOp->getReg();
-
-    if (NumSubRegs == 1) {
-      Register CurReg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);
-
-      BuildMI(LoopBB, I, DL, TII.get(AMDGPU::V_READFIRSTLANE_B32), CurReg)
-          .addReg(VScalarOp);
-
-      Register NewCondReg = MRI.createVirtualRegister(BoolXExecRC);
-
-      BuildMI(LoopBB, I, DL, TII.get(AMDGPU::V_CMP_EQ_U32_e64), NewCondReg)
-          .addReg(CurReg)
-          .addReg(VScalarOp);
-
-      // Combine the comparison results with AND.
-      if (!CondReg) // First.
-        CondReg = NewCondReg;
-      else { // If not the first, we create an AND.
-        Register AndReg = MRI.createVirtualRegister(BoolXExecRC);
-        BuildMI(LoopBB, I, DL, TII.get(LMC.AndOpc), AndReg)
-            .addReg(CondReg)
-            .addReg(NewCondReg);
-        CondReg = AndReg;
-      }
-
-      // Update ScalarOp operand to use the SGPR ScalarOp.
-      ScalarOp->setReg(CurReg);
-      ScalarOp->setIsKill();
-    } else {
-      SmallVector<Register, 8> ReadlanePieces;
-      RegState VScalarOpUndef = getUndefRegState(ScalarOp->isUndef());
-      assert(NumSubRegs % 2 == 0 && NumSubRegs <= 32 &&
-             "Unhandled register size");
-
-      for (unsigned Idx = 0; Idx < NumSubRegs; Idx += 2) {
-        Register CurRegLo =
-            MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);
-        Register CurRegHi =
-            MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);
-
-        // Read the next variant <- also loop target.
-        BuildMI(LoopBB, I, DL, TII.get(AMDGPU::V_READFIRSTLANE_B32), CurRegLo)
-            .addReg(VScalarOp, VScalarOpUndef, TRI->getSubRegFromChannel(Idx));
-
-        // Read the next variant <- also loop target.
-        BuildMI(LoopBB, I, DL, TII.get(AMDGPU::V_READFIRSTLANE_B32), CurRegHi)
-            .addReg(VScalarOp, VScalarOpUndef,
-                    TRI->getSubRegFromChannel(Idx + 1));
-
-        ReadlanePieces.push_back(CurRegLo);
-        ReadlanePieces.push_back(CurRegHi);
-
-        // Comparison is to be done as 64-bit.
-        Register CurReg = MRI.createVirtualRegister(&AMDGPU::SGPR_64RegClass);
-        BuildMI(LoopBB, I, DL, TII.get(AMDGPU::REG_SEQUENCE), CurReg)
-            .addReg(CurRegLo)
-            .addImm(AMDGPU::sub0)
-            .addReg(CurRegHi)
-            .addImm(AMDGPU::sub1);
-
-        Register NewCondReg = MRI.createVirtualRegister(BoolXExecRC);
-        auto Cmp = BuildMI(LoopBB, I, DL, TII.get(AMDGPU::V_CMP_EQ_U64_e64),
-                           NewCondReg)
-                       .addReg(CurReg);
-        if (NumSubRegs <= 2)
-          Cmp.addReg(VScalarOp);
-        else
-          Cmp.addReg(VScalarOp, VScalarOpUndef,
-                     TRI->getSubRegFromChannel(Idx, 2));
-
-        // Combine the comparison results with AND.
-        if (!CondReg) // First.
-          CondReg = NewCondReg;
-        else { // If not the first, we create an AND.
-          Register AndReg = MRI.createVirtualRegister(BoolXExecRC);
-          BuildMI(LoopBB, I, DL, TII.get(LMC.AndOpc), AndReg)
-              .addReg(CondReg)
-              .addReg(NewCondReg);
-          CondReg = AndReg;
-        }
-      } // End for loop.
-
-      const auto *SScalarOpRC =
-          TRI->getEquivalentSGPRClass(MRI.getRegClass(VScalarOp));
-      Register SScalarOp = MRI.createVirtualRegister(SScalarOpRC);
-
-      // Build scalar ScalarOp.
-      auto Merge =
-          BuildMI(LoopBB, I, DL, TII.get(AMDGPU::REG_SEQUENCE), SScalarOp);
-      unsigned Channel = 0;
-      for (Register Piece : ReadlanePieces) {
-        Merge.addReg(Piece).addImm(TRI->getSubRegFromChannel(Channel++));
-      }
-
-      // Update ScalarOp operand to use the SGPR ScalarOp.
-      ScalarOp->setReg(SScalarOp);
-      ScalarOp->setIsKill();
-    }
-  }
-
-  Register SaveExec = MRI.createVirtualRegister(BoolXExecRC);
-  MRI.setSimpleHint(SaveExec, CondReg);
-
-  // Update EXEC to matching lanes, saving original to SaveExec.
-  BuildMI(LoopBB, I, DL, TII.get(LMC.AndSaveExecOpc), SaveExec)
-      .addReg(CondReg, RegState::Kill);
-
-  // The original instruction is here; we insert the terminators after it.
-  I = BodyBB.end();
-
-  // Update EXEC, switch all done bits to 0 and all todo bits to 1.
-  BuildMI(BodyBB, I, DL, TII.get(LMC.XorTermOpc), LMC.ExecReg)
-      .addReg(LMC.ExecReg)
-      .addReg(SaveExec);
-
-  BuildMI(BodyBB, I, DL, TII.get(AMDGPU::SI_WATERFALL_LOOP)).addMBB(&LoopBB);
-}
-
-// Build a waterfall loop around \p MI, replacing the VGPR \p ScalarOp register
-// with SGPRs by iterating over all unique values across all lanes.
-// Returns the loop basic block that now contains \p MI.
-static MachineBasicBlock *
-loadScalarOperandsFromVGPR(const SIInstrInfo &TII, MachineInstr &MI,
-                           ArrayRef<MachineOperand *> ScalarOps,
-                           MachineDominatorTree *MDT,
-                           MachineBasicBlock::iterator Begin = nullptr,
-                           MachineBasicBlock::iterator End = nullptr) {
-  MachineBasicBlock &MBB = *MI.getParent();
-  MachineFunction &MF = *MBB.getParent();
-  const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
-  const SIRegisterInfo *TRI = ST.getRegisterInfo();
-  MachineRegisterInfo &MRI = MF.getRegInfo();
-  if (!Begin.isValid())
-    Begin = &MI;
-  if (!End.isValid()) {
-    End = &MI;
-    ++End;
-  }
-  const DebugLoc &DL = MI.getDebugLoc();
-  const AMDGPU::LaneMaskConstants &LMC = AMDGPU::LaneMaskConstants::get(ST);
-  const auto *BoolXExecRC = TRI->getWaveMaskRegClass();
-
-  // Save SCC. Waterfall Loop may overwrite SCC.
-  Register SaveSCCReg;
-
-  // FIXME: We should maintain SCC liveness while doing the FixSGPRCopies walk
-  // rather than unlimited scan everywhere
-  bool SCCNotDead =
-      MBB.computeRegisterLiveness(TRI, AMDGPU::SCC, MI,
-                                  std::numeric_limits<unsigned>::max()) !=
-      MachineBasicBlock::LQR_Dead;
-  if (SCCNotDead) {
-    SaveSCCReg = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
-    BuildMI(MBB, Begin, DL, TII.get(AMDGPU::S_CSELECT_B32), SaveSCCReg)
-        .addImm(1)
-        .addImm(0);
-  }
-
-  Register SaveExec = MRI.createVirtualRegister(BoolXExecRC);
-
-  // Save the EXEC mask
-  BuildMI(MBB, Begin, DL, TII.get(LMC.MovOpc), SaveExec).addReg(LMC.ExecReg);
-
-  // Killed uses in the instruction we are waterfalling around will be
-  // incorrect due to the added control-flow.
-  MachineBasicBlock::iterator AfterMI = MI;
-  ++AfterMI;
-  for (auto I = Begin; I != AfterMI; I++) {
-    for (auto &MO : I->all_uses())
-      MRI.clearKillFlags(MO.getReg());
-  }
-
-  // To insert the loop we need to split the block. Move everything after this
-  // point to a new block, and insert a new empty block between the two.
-  MachineBasicBlock *LoopBB = MF.CreateMachineBasicBlock();
-  MachineBasicBlock *BodyBB = MF.CreateMachineBasicBlock();
-  MachineBasicBlock *RemainderBB = MF.CreateMachineBasicBlock();
-  MachineFunction::iterator MBBI(MBB);
-  ++MBBI;
-
-  MF.insert(MBBI, LoopBB);
-  MF.insert(MBBI, BodyBB);
-  MF.insert(MBBI, RemainderBB);
-
-  LoopBB->addSuccessor(BodyBB);
-  BodyBB->addSuccessor(LoopBB);
-  BodyBB->addSuccessor(RemainderBB);
-
-  // Move Begin to MI to the BodyBB, and the remainder of the block to
-  // RemainderBB.
-  RemainderBB->transferSuccessorsAndUpdatePHIs(&MBB);
-  RemainderBB->splice(RemainderBB->begin(), &MBB, End, MBB.end());
-  BodyBB->splice(BodyBB->begin(), &MBB, Begin, MBB.end());
-
-  MBB.addSuccessor(LoopBB);
-
-  // Update dominators. We know that MBB immediately dominates LoopBB, that
-  // LoopBB immediately dominates BodyBB, and BodyBB immediately dominates
-  // RemainderBB. RemainderBB immediately dominates all of the successors
-  // transferred to it from MBB that MBB used to properly dominate.
-  if (MDT) {
-    MDT->addNewBlock(LoopBB, &MBB);
-    MDT->addNewBlock(BodyBB, LoopBB);
-    MDT->addNewBlock(RemainderBB, BodyBB);
-    for (auto &Succ : RemainderBB->successors()) {
-      if (MDT->properlyDominates(&MBB, Succ)) {
-        MDT->changeImmediateDominator(Succ, RemainderBB);
-      }
-    }
-  }
-
-  emitLoadScalarOpsFromVGPRLoop(TII, MRI, *LoopBB, *BodyBB, DL, ScalarOps);
-
-  MachineBasicBlock::iterator First = RemainderBB->begin();
-  // Restore SCC
-  if (SCCNotDead) {
-    BuildMI(*RemainderBB, First, DL, TII.get(AMDGPU::S_CMP_LG_U32))
-        .addReg(SaveSCCReg, RegState::Kill)
-        .addImm(0);
-  }
-
-  // Restore the EXEC mask
-  BuildMI(*RemainderBB, First, DL, TII.get(LMC.MovOpc), LMC.ExecReg)
-      .addReg(SaveExec);
-  return BodyBB;
-}
-
-// Extract pointer from Rsrc and return a zero-value Rsrc replacement.
-static std::tuple<unsigned, unsigned>
-extractRsrcPtr(const SIInstrInfo &TII, MachineInstr &MI, MachineOperand &Rsrc) {
-  MachineBasicBlock &MBB = *MI.getParent();
-  MachineFunction &MF = *MBB.getParent();
-  MachineRegisterInfo &MRI = MF.getRegInfo();
-
-  // Extract the ptr from the resource descriptor.
-  unsigned RsrcPtr =
-      TII.buildExtractSubReg(MI, MRI, Rsrc, &AMDGPU::VReg_128RegClass,
-                             AMDGPU::sub0_sub1, &AMDGPU::VReg_64RegClass);
-
-  // Create an empty resource descriptor
-  Register Zero64 = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);
-  Register SRsrcFormatLo = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);
-  Register SRsrcFormatHi = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);
-  Register NewSRsrc = MRI.createVirtualRegister(&AMDGPU::SGPR_128RegClass);
-  uint64_t RsrcDataFormat = TII.getDefaultRsrcDataFormat();
-
-  // Zero64 = 0
-  BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(AMDGPU::S_MOV_B64), Zero64)
-      .addImm(0);
-
-  // SRsrcFormatLo = RSRC_DATA_FORMAT{31-0}
-  BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(AMDGPU::S_MOV_B32), SRsrcFormatLo)
-      .addImm(Lo_32(RsrcDataFormat));
-
-  // SRsrcFormatHi = RSRC_DATA_FORMAT{63-32}
-  BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(AMDGPU::S_MOV_B32), SRsrcFormatHi)
-      .addImm(Hi_32(RsrcDataFormat));
-
-  // NewSRsrc = {Zero64, SRsrcFormat}
-  BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(AMDGPU::REG_SEQUENCE), NewSRsrc)
-      .addReg(Zero64)
-      .addImm(AMDGPU::sub0_sub1)
-      .addReg(SRsrcFormatLo)
-      .addImm(AMDGPU::sub2)
-      .addReg(SRsrcFormatHi)
-      .addImm(AMDGPU::sub3);
-
-  return std::tuple(RsrcPtr, NewSRsrc);
-}
-
-MachineBasicBlock *
-SIInstrInfo::legalizeOperands(MachineInstr &MI,
-                              MachineDominatorTree *MDT) const {
-  MachineFunction &MF = *MI.getMF();
-  MachineRegisterInfo &MRI = MF.getRegInfo();
-  MachineBasicBlock *CreatedBB = nullptr;
-
-  // Legalize VOP2
-  if (isVOP2(MI) || isVOPC(MI)) {
-    legalizeOperandsVOP2(MRI, MI);
-    return CreatedBB;
-  }
-
-  // Legalize VOP3
-  if (isVOP3(MI)) {
-    legalizeOperandsVOP3(MRI, MI);
-    return CreatedBB;
-  }
-
-  // Legalize SMRD
-  if (isSMRD(MI)) {
-    legalizeOperandsSMRD(MRI, MI);
-    return CreatedBB;
-  }
-
-  // Legalize FLAT
-  if (isFLAT(MI)) {
-    legalizeOperandsFLAT(MRI, MI);
-    return CreatedBB;
-  }
-
-  // Legalize PHI
-  // The register class of the operands must be the same type as the register
-  // class of the output.
-  if (MI.getOpcode() == AMDGPU::PHI) {
-    const TargetRegisterClass *VRC = getOpRegClass(MI, 0);
-    assert(!RI.isSGPRClass(VRC));
-
-    // Update all the operands so they have the same type.
-    for (unsigned I = 1, E = MI.getNumOperands(); I != E; I += 2) {
-      MachineOperand &Op = MI.getOperand(I);
-      if (!Op.isReg() || !Op.getReg().isVirtual())
-        continue;
-
-      // MI is a PHI instruction.
-      MachineBasicBlock *InsertBB = MI.getOperand(I + 1).getMBB();
-      MachineBasicBlock::iterator Insert = InsertBB->getFirstTerminator();
-
-      // Avoid creating no-op copies with the same src and dst reg class.  These
-      // confuse some of the machine passes.
-      legalizeGenericOperand(*InsertBB, Insert, VRC, Op, MRI, MI.getDebugLoc());
-    }
-  }
-
-  // REG_SEQUENCE doesn't really require operand legalization, but if one has a
-  // VGPR dest type and SGPR sources, insert copies so all operands are
-  // VGPRs. This seems to help operand folding / the register coalescer.
-  if (MI.getOpcode() == AMDGPU::REG_SEQUENCE) {
-    MachineBasicBlock *MBB = MI.getParent();
-    const TargetRegisterClass *DstRC = getOpRegClass(MI, 0);
-    if (RI.hasVGPRs(DstRC)) {
-      // Update all the operands so they are VGPR register classes. These may
-      // not be the same register class because REG_SEQUENCE supports mixing
-      // subregister index types e.g. sub0_sub1 + sub2 + sub3
-      for (unsigned I = 1, E = MI.getNumOperands(); I != E; I += 2) {
-        MachineOperand &Op = MI.getOperand(I);
-        if (!Op.isReg() || !Op.getReg().isVirtual())
-          continue;
-
-        const TargetRegisterClass *OpRC = MRI.getRegClass(Op.getReg());
-        const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(OpRC);
-        if (VRC == OpRC)
-          continue;
-
-        legalizeGenericOperand(*MBB, MI, VRC, Op, MRI, MI.getDebugLoc());
-        Op.setIsKill();
-      }
-    }
-
-    return CreatedBB;
-  }
-
-  // Legalize INSERT_SUBREG
-  // src0 must have the same register class as dst
-  if (MI.getOpcode() == AMDGPU::INSERT_SUBREG) {
-    Register Dst = MI.getOperand(0).getReg();
-    Register Src0 = MI.getOperand(1).getReg();
-    const TargetRegisterClass *DstRC = MRI.getRegClass(Dst);
-    const TargetRegisterClass *Src0RC = MRI.getRegClass(Src0);
-    if (DstRC != Src0RC) {
-      MachineBasicBlock *MBB = MI.getParent();
-      MachineOperand &Op = MI.getOperand(1);
-      legalizeGenericOperand(*MBB, MI, DstRC, Op, MRI, MI.getDebugLoc());
-    }
-    return CreatedBB;
-  }
-
-  // Legalize SI_INIT_M0
-  if (MI.getOpcode() == AMDGPU::SI_INIT_M0) {
-    MachineOperand &Src = MI.getOperand(0);
-    if (Src.isReg() && RI.hasVectorRegisters(MRI.getRegClass(Src.getReg())))
-      Src.setReg(readlaneVGPRToSGPR(Src.getReg(), MI, MRI));
-    return CreatedBB;
-  }
-
-  // Legalize S_BITREPLICATE, S_QUADMASK and S_WQM
-  if (MI.getOpcode() == AMDGPU::S_BITREPLICATE_B64_B32 ||
-      MI.getOpcode() == AMDGPU::S_QUADMASK_B32 ||
-      MI.getOpcode() == AMDGPU::S_QUADMASK_B64 ||
-      MI.getOpcode() == AMDGPU::S_WQM_B32 ||
-      MI.getOpcode() == AMDGPU::S_WQM_B64 ||
-      MI.getOpcode() == AMDGPU::S_INVERSE_BALLOT_U32 ||
-      MI.getOpcode() == AMDGPU::S_INVERSE_BALLOT_U64) {
-    MachineOperand &Src = MI.getOperand(1);
-    if (Src.isReg() && RI.hasVectorRegisters(MRI.getRegClass(Src.getReg())))
-      Src.setReg(readlaneVGPRToSGPR(Src.getReg(), MI, MRI));
-    return CreatedBB;
-  }
-
-  // Legalize MIMG/VIMAGE/VSAMPLE and MUBUF/MTBUF for shaders.
-  //
-  // Shaders only generate MUBUF/MTBUF instructions via intrinsics or via
-  // scratch memory access. In both cases, the legalization never involves
-  // conversion to the addr64 form.
-  if (isImage(MI) || (AMDGPU::isGraphics(MF.getFunction().getCallingConv()) &&
-                      (isMUBUF(MI) || isMTBUF(MI)))) {
-    AMDGPU::OpName RSrcOpName = (isVIMAGE(MI) || isVSAMPLE(MI))
-                                    ? AMDGPU::OpName::rsrc
-                                    : AMDGPU::OpName::srsrc;
-    MachineOperand *SRsrc = getNamedOperand(MI, RSrcOpName);
-    if (SRsrc && !RI.isSGPRClass(MRI.getRegClass(SRsrc->getReg())))
-      CreatedBB = loadScalarOperandsFromVGPR(*this, MI, {SRsrc}, MDT);
-
-    AMDGPU::OpName SampOpName =
-        isMIMG(MI) ? AMDGPU::OpName::ssamp : AMDGPU::OpName::samp;
-    MachineOperand *SSamp = getNamedOperand(MI, SampOpName);
-    if (SSamp && !RI.isSGPRClass(MRI.getRegClass(SSamp->getReg())))
-      CreatedBB = loadScalarOperandsFromVGPR(*this, MI, {SSamp}, MDT);
-
-    return CreatedBB;
-  }
-
-  // Legalize SI_CALL
-  if (MI.getOpcode() == AMDGPU::SI_CALL_ISEL) {
-    MachineOperand *Dest = &MI.getOperand(0);
-    if (!RI.isSGPRClass(MRI.getRegClass(Dest->getReg()))) {
-      // Move everything between ADJCALLSTACKUP and ADJCALLSTACKDOWN and
-      // following copies, we also need to move copies from and to physical
-      // registers into the loop block.
-      unsigned FrameSetupOpcode = getCallFrameSetupOpcode();
-      unsigned FrameDestroyOpcode = getCallFrameDestroyOpcode();
-
-      // Also move the copies to physical registers into the loop block
-      MachineBasicBlock &MBB = *MI.getParent();
-      MachineBasicBlock::iterator Start(&MI);
-      while (Start->getOpcode() != FrameSetupOpcode)
-        --Start;
-      MachineBasicBlock::iterator End(&MI);
-      while (End->getOpcode() != FrameDestroyOpcode)
-        ++End;
-      // Also include following copies of the return value
-      ++End;
-      while (End != MBB.end() && End->isCopy() && End->getOperand(1).isReg() &&
-             MI.definesRegister(End->getOperand(1).getReg(), /*TRI=*/nullptr))
-        ++End;
-      CreatedBB =
-          loadScalarOperandsFromVGPR(*this, MI, {Dest}, MDT, Start, End);
-    }
-  }
-
-  // Legalize s_sleep_var.
-  if (MI.getOpcode() == AMDGPU::S_SLEEP_VAR) {
-    const DebugLoc &DL = MI.getDebugLoc();
-    Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);
-    int Src0Idx =
-        AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0);
-    MachineOperand &Src0 = MI.getOperand(Src0Idx);
-    BuildMI(*MI.getParent(), MI, DL, get(AMDGPU::V_READFIRSTLANE_B32), Reg)
-        .add(Src0);
-    Src0.ChangeToRegister(Reg, false);
-    return nullptr;
-  }
-
-  // Legalize TENSOR_LOAD_TO_LDS_d2/_d4, TENSOR_STORE_FROM_LDS_d2/_d4. All their
-  // operands are scalar.
-  if (MI.getOpcode() == AMDGPU::TENSOR_LOAD_TO_LDS_d2 ||
-      MI.getOpcode() == AMDGPU::TENSOR_LOAD_TO_LDS_d4 ||
-      MI.getOpcode() == AMDGPU::TENSOR_STORE_FROM_LDS_d2 ||
-      MI.getOpcode() == AMDGPU::TENSOR_STORE_FROM_LDS_d4) {
-    for (MachineOperand &Src : MI.explicit_operands()) {
-      if (Src.isReg() && RI.hasVectorRegisters(MRI.getRegClass(Src.getReg())))
-        Src.setReg(readlaneVGPRToSGPR(Src.getReg(), MI, MRI));
-    }
-    return CreatedBB;
-  }
-
-  // Legalize MUBUF instructions.
-  bool isSoffsetLegal = true;
-  int SoffsetIdx =
-      AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::soffset);
-  if (SoffsetIdx != -1) {
-    MachineOperand *Soffset = &MI.getOperand(SoffsetIdx);
-    if (Soffset->isReg() && Soffset->getReg().isVirtual() &&
-        !RI.isSGPRClass(MRI.getRegClass(Soffset->getReg()))) {
-      isSoffsetLegal = false;
-    }
-  }
-
-  bool isRsrcLegal = true;
-  int RsrcIdx =
-      AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::srsrc);
-  if (RsrcIdx != -1) {
-    MachineOperand *Rsrc = &MI.getOperand(RsrcIdx);
-    if (Rsrc->isReg() && !RI.isSGPRReg(MRI, Rsrc->getReg()))
-      isRsrcLegal = false;
-  }
-
-  // The operands are legal.
-  if (isRsrcLegal && isSoffsetLegal)
-    return CreatedBB;
-
-  if (!isRsrcLegal) {
-    // Legalize a VGPR Rsrc
-    //
-    // If the instruction is _ADDR64, we can avoid a waterfall by extracting
-    // the base pointer from the VGPR Rsrc, adding it to the VAddr, then using
-    // a zero-value SRsrc.
-    //
-    // If the instruction is _OFFSET (both idxen and offen disabled), and we
-    // support ADDR64 instructions, we can convert to ADDR64 and do the same as
-    // above.
-    //
-    // Otherwise we are on non-ADDR64 hardware, and/or we have
-    // idxen/offen/bothen and we fall back to a waterfall loop.
-
-    MachineOperand *Rsrc = &MI.getOperand(RsrcIdx);
-    MachineBasicBlock &MBB = *MI.getParent();
-
-    MachineOperand *VAddr = getNamedOperand(MI, AMDGPU::OpName::vaddr);
-    if (VAddr && AMDGPU::getIfAddr64Inst(MI.getOpcode()) != -1) {
-      // This is already an ADDR64 instruction so we need to add the pointer
-      // extracted from the resource descriptor to the current value of VAddr.
-      Register NewVAddrLo = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-      Register NewVAddrHi = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-      Register NewVAddr = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);
-
-      const auto *BoolXExecRC = RI.getWaveMaskRegClass();
-      Register CondReg0 = MRI.createVirtualRegister(BoolXExecRC);
-      Register CondReg1 = MRI.createVirtualRegister(BoolXExecRC);
-
-      unsigned RsrcPtr, NewSRsrc;
-      std::tie(RsrcPtr, NewSRsrc) = extractRsrcPtr(*this, MI, *Rsrc);
-
-      // NewVaddrLo = RsrcPtr:sub0 + VAddr:sub0
-      const DebugLoc &DL = MI.getDebugLoc();
-      BuildMI(MBB, MI, DL, get(AMDGPU::V_ADD_CO_U32_e64), NewVAddrLo)
-          .addDef(CondReg0)
-          .addReg(RsrcPtr, {}, AMDGPU::sub0)
-          .addReg(VAddr->getReg(), {}, AMDGPU::sub0)
-          .addImm(0);
-
-      // NewVaddrHi = RsrcPtr:sub1 + VAddr:sub1
-      BuildMI(MBB, MI, DL, get(AMDGPU::V_ADDC_U32_e64), NewVAddrHi)
-          .addDef(CondReg1, RegState::Dead)
-          .addReg(RsrcPtr, {}, AMDGPU::sub1)
-          .addReg(VAddr->getReg(), {}, AMDGPU::sub1)
-          .addReg(CondReg0, RegState::Kill)
-          .addImm(0);
-
-      // NewVaddr = {NewVaddrHi, NewVaddrLo}
-      BuildMI(MBB, MI, MI.getDebugLoc(), get(AMDGPU::REG_SEQUENCE), NewVAddr)
-          .addReg(NewVAddrLo)
-          .addImm(AMDGPU::sub0)
-          .addReg(NewVAddrHi)
-          .addImm(AMDGPU::sub1);
-
-      VAddr->setReg(NewVAddr);
-      Rsrc->setReg(NewSRsrc);
-    } else if (!VAddr && ST.hasAddr64()) {
-      // This instructions is the _OFFSET variant, so we need to convert it to
-      // ADDR64.
-      assert(ST.getGeneration() < AMDGPUSubtarget::VOLCANIC_ISLANDS &&
-             "FIXME: Need to emit flat atomics here");
-
-      unsigned RsrcPtr, NewSRsrc;
-      std::tie(RsrcPtr, NewSRsrc) = extractRsrcPtr(*this, MI, *Rsrc);
-
-      Register NewVAddr = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);
-      MachineOperand *VData = getNamedOperand(MI, AMDGPU::OpName::vdata);
-      MachineOperand *Offset = getNamedOperand(MI, AMDGPU::OpName::offset);
-      MachineOperand *SOffset = getNamedOperand(MI, AMDGPU::OpName::soffset);
-      unsigned Addr64Opcode = AMDGPU::getAddr64Inst(MI.getOpcode());
-
-      // Atomics with return have an additional tied operand and are
-      // missing some of the special bits.
-      MachineOperand *VDataIn = getNamedOperand(MI, AMDGPU::OpName::vdata_in);
-      MachineInstr *Addr64;
-
-      if (!VDataIn) {
-        // Regular buffer load / store.
-        MachineInstrBuilder MIB =
-            BuildMI(MBB, MI, MI.getDebugLoc(), get(Addr64Opcode))
-                .add(*VData)
-                .addReg(NewVAddr)
-                .addReg(NewSRsrc)
-                .add(*SOffset)
-                .add(*Offset);
-
-        if (const MachineOperand *CPol =
-                getNamedOperand(MI, AMDGPU::OpName::cpol)) {
-          MIB.addImm(CPol->getImm());
-        }
-
-        if (const MachineOperand *TFE =
-                getNamedOperand(MI, AMDGPU::OpName::tfe)) {
-          MIB.addImm(TFE->getImm());
-        }
-
-        MIB.addImm(getNamedImmOperand(MI, AMDGPU::OpName::swz));
-
-        MIB.cloneMemRefs(MI);
-        Addr64 = MIB;
-      } else {
-        // Atomics with return.
-        Addr64 = BuildMI(MBB, MI, MI.getDebugLoc(), get(Addr64Opcode))
-                     .add(*VData)
-                     .add(*VDataIn)
-                     .addReg(NewVAddr)
-                     .addReg(NewSRsrc)
-                     .add(*SOffset)
-                     .add(*Offset)
-                     .addImm(getNamedImmOperand(MI, AMDGPU::OpName::cpol))
-                     .cloneMemRefs(MI);
-      }
-
-      MI.removeFromParent();
-
-      // NewVaddr = {NewVaddrHi, NewVaddrLo}
-      BuildMI(MBB, Addr64, Addr64->getDebugLoc(), get(AMDGPU::REG_SEQUENCE),
-              NewVAddr)
-          .addReg(RsrcPtr, {}, AMDGPU::sub0)
-          .addImm(AMDGPU::sub0)
-          .addReg(RsrcPtr, {}, AMDGPU::sub1)
-          .addImm(AMDGPU::sub1);
-    } else {
-      // Legalize a VGPR Rsrc and soffset together.
-      if (!isSoffsetLegal) {
-        MachineOperand *Soffset = getNamedOperand(MI, AMDGPU::OpName::soffset);
-        CreatedBB = loadScalarOperandsFromVGPR(*this, MI, {Rsrc, Soffset}, MDT);
-        return CreatedBB;
-      }
-      CreatedBB = loadScalarOperandsFromVGPR(*this, MI, {Rsrc}, MDT);
-      return CreatedBB;
-    }
-  }
-
-  // Legalize a VGPR soffset.
-  if (!isSoffsetLegal) {
-    MachineOperand *Soffset = getNamedOperand(MI, AMDGPU::OpName::soffset);
-    CreatedBB = loadScalarOperandsFromVGPR(*this, MI, {Soffset}, MDT);
-    return CreatedBB;
-  }
-  return CreatedBB;
-}
-
-void SIInstrWorklist::insert(MachineInstr *MI) {
-  InstrList.insert(MI);
-  // Add MBUF instructiosn to deferred list.
-  int RsrcIdx =
-      AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::srsrc);
-  if (RsrcIdx != -1) {
-    DeferredList.insert(MI);
-  }
-}
-
-bool SIInstrWorklist::isDeferred(MachineInstr *MI) {
-  return DeferredList.contains(MI);
-}
-
-// Legalize size mismatches between 16bit and 32bit registers in v2s copy
-// lowering (change sgpr to vgpr).
-// This is mainly caused by 16bit SALU and 16bit VALU using reg with different
-// size. Need to legalize the size of the operands during the vgpr lowering
-// chain. This can be removed after we have sgpr16 in place
-void SIInstrInfo::legalizeOperandsVALUt16(MachineInstr &MI, unsigned OpIdx,
-                                          MachineRegisterInfo &MRI) const {
-  if (!ST.useRealTrue16Insts())
-    return;
-
-  unsigned Opcode = MI.getOpcode();
-  MachineBasicBlock *MBB = MI.getParent();
-  // Legalize operands and check for size mismatch
-  if (!OpIdx || OpIdx >= MI.getNumExplicitOperands() ||
-      OpIdx >= get(Opcode).getNumOperands() ||
-      get(Opcode).operands()[OpIdx].RegClass == -1)
-    return;
-
-  MachineOperand &Op = MI.getOperand(OpIdx);
-  if (!Op.isReg() || !Op.getReg().isVirtual())
-    return;
-
-  const TargetRegisterClass *CurrRC = MRI.getRegClass(Op.getReg());
-  if (!RI.isVGPRClass(CurrRC))
-    return;
-
-  int16_t RCID = getOpRegClassID(get(Opcode).operands()[OpIdx]);
-  const TargetRegisterClass *ExpectedRC = RI.getRegClass(RCID);
-  if (RI.getMatchingSuperRegClass(CurrRC, ExpectedRC, AMDGPU::lo16)) {
-    Op.setSubReg(AMDGPU::lo16);
-  } else if (RI.getMatchingSuperRegClass(ExpectedRC, CurrRC, AMDGPU::lo16)) {
-    const DebugLoc &DL = MI.getDebugLoc();
-    Register NewDstReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-    Register Undef = MRI.createVirtualRegister(&AMDGPU::VGPR_16RegClass);
-    BuildMI(*MBB, MI, DL, get(AMDGPU::IMPLICIT_DEF), Undef);
-    BuildMI(*MBB, MI, DL, get(AMDGPU::REG_SEQUENCE), NewDstReg)
-        .addReg(Op.getReg())
-        .addImm(AMDGPU::lo16)
-        .addReg(Undef)
-        .addImm(AMDGPU::hi16);
-    Op.setReg(NewDstReg);
-  }
-}
-void SIInstrInfo::legalizeOperandsVALUt16(MachineInstr &MI,
-                                          MachineRegisterInfo &MRI) const {
-  for (unsigned OpIdx = 1; OpIdx < MI.getNumExplicitOperands(); OpIdx++)
-    legalizeOperandsVALUt16(MI, OpIdx, MRI);
-}
-
-void SIInstrInfo::moveToVALU(SIInstrWorklist &Worklist,
-                             MachineDominatorTree *MDT) const {
-
-  while (!Worklist.empty()) {
-    MachineInstr &Inst = *Worklist.top();
-    Worklist.erase_top();
-    // Skip MachineInstr in the deferred list.
-    if (Worklist.isDeferred(&Inst))
-      continue;
-    moveToVALUImpl(Worklist, MDT, Inst);
-  }
-
-  // Deferred list of instructions will be processed once
-  // all the MachineInstr in the worklist are done.
-  for (MachineInstr *Inst : Worklist.getDeferredList()) {
-    moveToVALUImpl(Worklist, MDT, *Inst);
-    assert(Worklist.empty() &&
-           "Deferred MachineInstr are not supposed to re-populate worklist");
-  }
-}
-
-void SIInstrInfo::moveToVALUImpl(SIInstrWorklist &Worklist,
-                                 MachineDominatorTree *MDT,
-                                 MachineInstr &Inst) const {
-
-  MachineBasicBlock *MBB = Inst.getParent();
-  if (!MBB)
-    return;
-  MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
-  unsigned Opcode = Inst.getOpcode();
-  unsigned NewOpcode = getVALUOp(Inst);
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  // Handle some special cases
-  switch (Opcode) {
-  default:
-    break;
-  case AMDGPU::S_ADD_I32:
-  case AMDGPU::S_SUB_I32: {
-    // FIXME: The u32 versions currently selected use the carry.
-    bool Changed;
-    MachineBasicBlock *CreatedBBTmp = nullptr;
-    std::tie(Changed, CreatedBBTmp) = moveScalarAddSub(Worklist, Inst, MDT);
-    if (Changed)
-      return;
-
-    // Default handling
-    break;
-  }
-
-  case AMDGPU::S_MUL_U64:
-    if (ST.hasVectorMulU64()) {
-      NewOpcode = AMDGPU::V_MUL_U64_e64;
-      break;
-    }
-    // Split s_mul_u64 in 32-bit vector multiplications.
-    splitScalarSMulU64(Worklist, Inst, MDT);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_MUL_U64_U32_PSEUDO:
-  case AMDGPU::S_MUL_I64_I32_PSEUDO:
-    // This is a special case of s_mul_u64 where all the operands are either
-    // zero extended or sign extended.
-    splitScalarSMulPseudo(Worklist, Inst, MDT);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_AND_B64:
-    splitScalar64BitBinaryOp(Worklist, Inst, AMDGPU::S_AND_B32, MDT);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_OR_B64:
-    splitScalar64BitBinaryOp(Worklist, Inst, AMDGPU::S_OR_B32, MDT);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_XOR_B64:
-    splitScalar64BitBinaryOp(Worklist, Inst, AMDGPU::S_XOR_B32, MDT);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_NAND_B64:
-    splitScalar64BitBinaryOp(Worklist, Inst, AMDGPU::S_NAND_B32, MDT);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_NOR_B64:
-    splitScalar64BitBinaryOp(Worklist, Inst, AMDGPU::S_NOR_B32, MDT);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_XNOR_B64:
-    if (ST.hasDLInsts())
-      splitScalar64BitBinaryOp(Worklist, Inst, AMDGPU::S_XNOR_B32, MDT);
-    else
-      splitScalar64BitXnor(Worklist, Inst, MDT);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_ANDN2_B64:
-    splitScalar64BitBinaryOp(Worklist, Inst, AMDGPU::S_ANDN2_B32, MDT);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_ORN2_B64:
-    splitScalar64BitBinaryOp(Worklist, Inst, AMDGPU::S_ORN2_B32, MDT);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_BREV_B64:
-    splitScalar64BitUnaryOp(Worklist, Inst, AMDGPU::S_BREV_B32, true);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_NOT_B64:
-    splitScalar64BitUnaryOp(Worklist, Inst, AMDGPU::S_NOT_B32);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_BCNT1_I32_B64:
-    splitScalar64BitBCNT(Worklist, Inst);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_BFE_I64:
-    splitScalar64BitBFE(Worklist, Inst);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_FLBIT_I32_B64:
-    splitScalar64BitCountOp(Worklist, Inst, AMDGPU::V_FFBH_U32_e32);
-    Inst.eraseFromParent();
-    return;
-  case AMDGPU::S_FF1_I32_B64:
-    splitScalar64BitCountOp(Worklist, Inst, AMDGPU::V_FFBL_B32_e32);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_LSHL_B32:
-    if (ST.hasOnlyRevVALUShifts()) {
-      NewOpcode = AMDGPU::V_LSHLREV_B32_e64;
-      swapOperands(Inst);
-    }
-    break;
-  case AMDGPU::S_ASHR_I32:
-    if (ST.hasOnlyRevVALUShifts()) {
-      NewOpcode = AMDGPU::V_ASHRREV_I32_e64;
-      swapOperands(Inst);
-    }
-    break;
-  case AMDGPU::S_LSHR_B32:
-    if (ST.hasOnlyRevVALUShifts()) {
-      NewOpcode = AMDGPU::V_LSHRREV_B32_e64;
-      swapOperands(Inst);
-    }
-    break;
-  case AMDGPU::S_LSHL_B64:
-    if (ST.hasOnlyRevVALUShifts()) {
-      NewOpcode = ST.getGeneration() >= AMDGPUSubtarget::GFX12
-                      ? AMDGPU::V_LSHLREV_B64_pseudo_e64
-                      : AMDGPU::V_LSHLREV_B64_e64;
-      swapOperands(Inst);
-    }
-    break;
-  case AMDGPU::S_ASHR_I64:
-    if (ST.hasOnlyRevVALUShifts()) {
-      NewOpcode = AMDGPU::V_ASHRREV_I64_e64;
-      swapOperands(Inst);
-    }
-    break;
-  case AMDGPU::S_LSHR_B64:
-    if (ST.hasOnlyRevVALUShifts()) {
-      NewOpcode = AMDGPU::V_LSHRREV_B64_e64;
-      swapOperands(Inst);
-    }
-    break;
-
-  case AMDGPU::S_ABS_I32:
-    lowerScalarAbs(Worklist, Inst);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_ABSDIFF_I32:
-    lowerScalarAbsDiff(Worklist, Inst);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_CBRANCH_SCC0:
-  case AMDGPU::S_CBRANCH_SCC1: {
-    // Clear unused bits of vcc
-    Register CondReg = Inst.getOperand(1).getReg();
-    bool IsSCC = CondReg == AMDGPU::SCC;
-    const AMDGPU::LaneMaskConstants &LMC = AMDGPU::LaneMaskConstants::get(ST);
-    BuildMI(*MBB, Inst, Inst.getDebugLoc(), get(LMC.AndOpc), LMC.VccReg)
-        .addReg(LMC.ExecReg)
-        .addReg(IsSCC ? LMC.VccReg : CondReg);
-    Inst.removeOperand(1);
-  } break;
-
-  case AMDGPU::S_BFE_U64:
-  case AMDGPU::S_BFM_B64:
-    llvm_unreachable("Moving this op to VALU not implemented");
-
-  case AMDGPU::S_PACK_LL_B32_B16:
-  case AMDGPU::S_PACK_LH_B32_B16:
-  case AMDGPU::S_PACK_HL_B32_B16:
-  case AMDGPU::S_PACK_HH_B32_B16:
-    movePackToVALU(Worklist, MRI, Inst);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_XNOR_B32:
-    lowerScalarXnor(Worklist, Inst);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_NAND_B32:
-    splitScalarNotBinop(Worklist, Inst, AMDGPU::S_AND_B32);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_NOR_B32:
-    splitScalarNotBinop(Worklist, Inst, AMDGPU::S_OR_B32);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_ANDN2_B32:
-    splitScalarBinOpN2(Worklist, Inst, AMDGPU::S_AND_B32);
-    Inst.eraseFromParent();
-    return;
-
-  case AMDGPU::S_ORN2_B32:
-    splitScalarBinOpN2(Worklist, Inst, AMDGPU::S_OR_B32);
-    Inst.eraseFromParent();
-    return;
-
-  // TODO: remove as soon as everything is ready
-  // to replace VGPR to SGPR copy with V_READFIRSTLANEs.
-  // S_ADD/SUB_CO_PSEUDO as well as S_UADDO/USUBO_PSEUDO
-  // can only be selected from the uniform SDNode.
-  case AMDGPU::S_ADD_CO_PSEUDO:
-  case AMDGPU::S_SUB_CO_PSEUDO: {
-    unsigned Opc = (Inst.getOpcode() == AMDGPU::S_ADD_CO_PSEUDO)
-                       ? AMDGPU::V_ADDC_U32_e64
-                       : AMDGPU::V_SUBB_U32_e64;
-    const auto *CarryRC = RI.getWaveMaskRegClass();
-
-    Register CarryInReg = Inst.getOperand(4).getReg();
-    if (!MRI.constrainRegClass(CarryInReg, CarryRC)) {
-      Register NewCarryReg = MRI.createVirtualRegister(CarryRC);
-      BuildMI(*MBB, Inst, Inst.getDebugLoc(), get(AMDGPU::COPY), NewCarryReg)
-          .addReg(CarryInReg);
-    }
-
-    Register CarryOutReg = Inst.getOperand(1).getReg();
-
-    Register DestReg = MRI.createVirtualRegister(RI.getEquivalentVGPRClass(
-        MRI.getRegClass(Inst.getOperand(0).getReg())));
-    MachineInstr *CarryOp =
-        BuildMI(*MBB, &Inst, Inst.getDebugLoc(), get(Opc), DestReg)
-            .addReg(CarryOutReg, RegState::Define)
-            .add(Inst.getOperand(2))
-            .add(Inst.getOperand(3))
-            .addReg(CarryInReg)
-            .addImm(0);
-    legalizeOperands(*CarryOp);
-    MRI.replaceRegWith(Inst.getOperand(0).getReg(), DestReg);
-    addUsersToMoveToVALUWorklist(DestReg, MRI, Worklist);
-    Inst.eraseFromParent();
-  }
-    return;
-  case AMDGPU::S_UADDO_PSEUDO:
-  case AMDGPU::S_USUBO_PSEUDO: {
-    MachineOperand &Dest0 = Inst.getOperand(0);
-    MachineOperand &Dest1 = Inst.getOperand(1);
-    MachineOperand &Src0 = Inst.getOperand(2);
-    MachineOperand &Src1 = Inst.getOperand(3);
-
-    unsigned Opc = (Inst.getOpcode() == AMDGPU::S_UADDO_PSEUDO)
-                       ? AMDGPU::V_ADD_CO_U32_e64
-                       : AMDGPU::V_SUB_CO_U32_e64;
-    const TargetRegisterClass *NewRC =
-        RI.getEquivalentVGPRClass(MRI.getRegClass(Dest0.getReg()));
-    Register DestReg = MRI.createVirtualRegister(NewRC);
-    MachineInstr *NewInstr = BuildMI(*MBB, &Inst, DL, get(Opc), DestReg)
-                                 .addReg(Dest1.getReg(), RegState::Define)
-                                 .add(Src0)
-                                 .add(Src1)
-                                 .addImm(0); // clamp bit
-
-    legalizeOperands(*NewInstr, MDT);
-    MRI.replaceRegWith(Dest0.getReg(), DestReg);
-    addUsersToMoveToVALUWorklist(DestReg, MRI, Worklist);
-    Inst.eraseFromParent();
-  }
-    return;
-  case AMDGPU::S_LSHL1_ADD_U32:
-  case AMDGPU::S_LSHL2_ADD_U32:
-  case AMDGPU::S_LSHL3_ADD_U32:
-  case AMDGPU::S_LSHL4_ADD_U32: {
-    MachineOperand &Dest = Inst.getOperand(0);
-    MachineOperand &Src0 = Inst.getOperand(1);
-    MachineOperand &Src1 = Inst.getOperand(2);
-    unsigned ShiftAmt = (Opcode == AMDGPU::S_LSHL1_ADD_U32   ? 1
-                         : Opcode == AMDGPU::S_LSHL2_ADD_U32 ? 2
-                         : Opcode == AMDGPU::S_LSHL3_ADD_U32 ? 3
-                                                             : 4);
-
-    const TargetRegisterClass *NewRC =
-        RI.getEquivalentVGPRClass(MRI.getRegClass(Dest.getReg()));
-    Register DestReg = MRI.createVirtualRegister(NewRC);
-    MachineInstr *NewInstr =
-        BuildMI(*MBB, &Inst, DL, get(AMDGPU::V_LSHL_ADD_U32_e64), DestReg)
-            .add(Src0)
-            .addImm(ShiftAmt)
-            .add(Src1);
-
-    legalizeOperands(*NewInstr, MDT);
-    MRI.replaceRegWith(Dest.getReg(), DestReg);
-    addUsersToMoveToVALUWorklist(DestReg, MRI, Worklist);
-    Inst.eraseFromParent();
-  }
-    return;
-  case AMDGPU::S_CSELECT_B32:
-  case AMDGPU::S_CSELECT_B64:
-    lowerSelect(Worklist, Inst, MDT);
-    Inst.eraseFromParent();
-    return;
-  case AMDGPU::S_CMP_EQ_I32:
-  case AMDGPU::S_CMP_LG_I32:
-  case AMDGPU::S_CMP_GT_I32:
-  case AMDGPU::S_CMP_GE_I32:
-  case AMDGPU::S_CMP_LT_I32:
-  case AMDGPU::S_CMP_LE_I32:
-  case AMDGPU::S_CMP_EQ_U32:
-  case AMDGPU::S_CMP_LG_U32:
-  case AMDGPU::S_CMP_GT_U32:
-  case AMDGPU::S_CMP_GE_U32:
-  case AMDGPU::S_CMP_LT_U32:
-  case AMDGPU::S_CMP_LE_U32:
-  case AMDGPU::S_CMP_EQ_U64:
-  case AMDGPU::S_CMP_LG_U64:
-  case AMDGPU::S_CMP_LT_F32:
-  case AMDGPU::S_CMP_EQ_F32:
-  case AMDGPU::S_CMP_LE_F32:
-  case AMDGPU::S_CMP_GT_F32:
-  case AMDGPU::S_CMP_LG_F32:
-  case AMDGPU::S_CMP_GE_F32:
-  case AMDGPU::S_CMP_O_F32:
-  case AMDGPU::S_CMP_U_F32:
-  case AMDGPU::S_CMP_NGE_F32:
-  case AMDGPU::S_CMP_NLG_F32:
-  case AMDGPU::S_CMP_NGT_F32:
-  case AMDGPU::S_CMP_NLE_F32:
-  case AMDGPU::S_CMP_NEQ_F32:
-  case AMDGPU::S_CMP_NLT_F32: {
-    Register CondReg = MRI.createVirtualRegister(RI.getWaveMaskRegClass());
-    auto NewInstr =
-        BuildMI(*MBB, Inst, Inst.getDebugLoc(), get(NewOpcode), CondReg)
-            .setMIFlags(Inst.getFlags());
-    if (AMDGPU::getNamedOperandIdx(NewOpcode, AMDGPU::OpName::src0_modifiers) >=
-        0) {
-      NewInstr
-          .addImm(0)               // src0_modifiers
-          .add(Inst.getOperand(0)) // src0
-          .addImm(0)               // src1_modifiers
-          .add(Inst.getOperand(1)) // src1
-          .addImm(0);              // clamp
-    } else {
-      NewInstr.add(Inst.getOperand(0)).add(Inst.getOperand(1));
-    }
-    legalizeOperands(*NewInstr, MDT);
-    int SCCIdx = Inst.findRegisterDefOperandIdx(AMDGPU::SCC, /*TRI=*/nullptr);
-    const MachineOperand &SCCOp = Inst.getOperand(SCCIdx);
-    addSCCDefUsersToVALUWorklist(SCCOp, Inst, Worklist, CondReg);
-    Inst.eraseFromParent();
-    return;
-  }
-  case AMDGPU::S_CMP_LT_F16:
-  case AMDGPU::S_CMP_EQ_F16:
-  case AMDGPU::S_CMP_LE_F16:
-  case AMDGPU::S_CMP_GT_F16:
-  case AMDGPU::S_CMP_LG_F16:
-  case AMDGPU::S_CMP_GE_F16:
-  case AMDGPU::S_CMP_O_F16:
-  case AMDGPU::S_CMP_U_F16:
-  case AMDGPU::S_CMP_NGE_F16:
-  case AMDGPU::S_CMP_NLG_F16:
-  case AMDGPU::S_CMP_NGT_F16:
-  case AMDGPU::S_CMP_NLE_F16:
-  case AMDGPU::S_CMP_NEQ_F16:
-  case AMDGPU::S_CMP_NLT_F16: {
-    Register CondReg = MRI.createVirtualRegister(RI.getWaveMaskRegClass());
-    auto NewInstr =
-        BuildMI(*MBB, Inst, Inst.getDebugLoc(), get(NewOpcode), CondReg)
-        .setMIFlags(Inst.getFlags());
-    if (AMDGPU::hasNamedOperand(NewOpcode, AMDGPU::OpName::src0_modifiers)) {
-      NewInstr
-          .addImm(0)               // src0_modifiers
-          .add(Inst.getOperand(0)) // src0
-          .addImm(0)               // src1_modifiers
-          .add(Inst.getOperand(1)) // src1
-          .addImm(0);              // clamp
-      if (AMDGPU::hasNamedOperand(NewOpcode, AMDGPU::OpName::op_sel))
-        NewInstr.addImm(0); // op_sel0
-    } else {
-      NewInstr
-          .add(Inst.getOperand(0))
-          .add(Inst.getOperand(1));
-    }
-    legalizeOperandsVALUt16(*NewInstr, MRI);
-    legalizeOperands(*NewInstr, MDT);
-    int SCCIdx = Inst.findRegisterDefOperandIdx(AMDGPU::SCC, /*TRI=*/nullptr);
-    const MachineOperand &SCCOp = Inst.getOperand(SCCIdx);
-    addSCCDefUsersToVALUWorklist(SCCOp, Inst, Worklist, CondReg);
-    Inst.eraseFromParent();
-    return;
-  }
-  case AMDGPU::S_CVT_HI_F32_F16: {
-    Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-    Register NewDst = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-    if (ST.useRealTrue16Insts()) {
-      BuildMI(*MBB, Inst, DL, get(AMDGPU::COPY), TmpReg)
-          .add(Inst.getOperand(1));
-      BuildMI(*MBB, Inst, DL, get(NewOpcode), NewDst)
-          .addImm(0) // src0_modifiers
-          .addReg(TmpReg, {}, AMDGPU::hi16)
-          .addImm(0)  // clamp
-          .addImm(0)  // omod
-          .addImm(0); // op_sel0
-    } else {
-      BuildMI(*MBB, Inst, DL, get(AMDGPU::V_LSHRREV_B32_e64), TmpReg)
-          .addImm(16)
-          .add(Inst.getOperand(1));
-      BuildMI(*MBB, Inst, DL, get(NewOpcode), NewDst)
-          .addImm(0) // src0_modifiers
-          .addReg(TmpReg)
-          .addImm(0)  // clamp
-          .addImm(0); // omod
-    }
-
-    MRI.replaceRegWith(Inst.getOperand(0).getReg(), NewDst);
-    addUsersToMoveToVALUWorklist(NewDst, MRI, Worklist);
-    Inst.eraseFromParent();
-    return;
-  }
-  case AMDGPU::S_MINIMUM_F32:
-  case AMDGPU::S_MAXIMUM_F32: {
-    Register NewDst = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-    MachineInstr *NewInstr = BuildMI(*MBB, Inst, DL, get(NewOpcode), NewDst)
-                                 .addImm(0) // src0_modifiers
-                                 .add(Inst.getOperand(1))
-                                 .addImm(0) // src1_modifiers
-                                 .add(Inst.getOperand(2))
-                                 .addImm(0)  // clamp
-                                 .addImm(0); // omod
-    MRI.replaceRegWith(Inst.getOperand(0).getReg(), NewDst);
-
-    legalizeOperands(*NewInstr, MDT);
-    addUsersToMoveToVALUWorklist(NewDst, MRI, Worklist);
-    Inst.eraseFromParent();
-    return;
-  }
-  case AMDGPU::S_MINIMUM_F16:
-  case AMDGPU::S_MAXIMUM_F16: {
-    Register NewDst = MRI.createVirtualRegister(ST.useRealTrue16Insts()
-                                                    ? &AMDGPU::VGPR_16RegClass
-                                                    : &AMDGPU::VGPR_32RegClass);
-    MachineInstr *NewInstr = BuildMI(*MBB, Inst, DL, get(NewOpcode), NewDst)
-                                 .addImm(0) // src0_modifiers
-                                 .add(Inst.getOperand(1))
-                                 .addImm(0) // src1_modifiers
-                                 .add(Inst.getOperand(2))
-                                 .addImm(0)  // clamp
-                                 .addImm(0)  // omod
-                                 .addImm(0); // opsel0
-    MRI.replaceRegWith(Inst.getOperand(0).getReg(), NewDst);
-    legalizeOperandsVALUt16(*NewInstr, MRI);
-    legalizeOperands(*NewInstr, MDT);
-    addUsersToMoveToVALUWorklist(NewDst, MRI, Worklist);
-    Inst.eraseFromParent();
-    return;
-  }
-  case AMDGPU::V_S_EXP_F16_e64:
-  case AMDGPU::V_S_LOG_F16_e64:
-  case AMDGPU::V_S_RCP_F16_e64:
-  case AMDGPU::V_S_RSQ_F16_e64:
-  case AMDGPU::V_S_SQRT_F16_e64: {
-    Register NewDst = MRI.createVirtualRegister(ST.useRealTrue16Insts()
-                                                    ? &AMDGPU::VGPR_16RegClass
-                                                    : &AMDGPU::VGPR_32RegClass);
-    auto NewInstr = BuildMI(*MBB, Inst, DL, get(NewOpcode), NewDst)
-                        .add(Inst.getOperand(1)) // src0_modifiers
-                        .add(Inst.getOperand(2))
-                        .add(Inst.getOperand(3)) // clamp
-                        .add(Inst.getOperand(4)) // omod
-                        .setMIFlags(Inst.getFlags());
-    if (AMDGPU::hasNamedOperand(NewOpcode, AMDGPU::OpName::op_sel))
-      NewInstr.addImm(0); // opsel0
-    MRI.replaceRegWith(Inst.getOperand(0).getReg(), NewDst);
-    legalizeOperandsVALUt16(*NewInstr, MRI);
-    legalizeOperands(*NewInstr, MDT);
-    addUsersToMoveToVALUWorklist(NewDst, MRI, Worklist);
-    Inst.eraseFromParent();
-    return;
-  }
-  }
-
-  if (NewOpcode == AMDGPU::INSTRUCTION_LIST_END) {
-    // We cannot move this instruction to the VALU, so we should try to
-    // legalize its operands instead.
-    legalizeOperands(Inst, MDT);
-    return;
-  }
-  // Handle converting generic instructions like COPY-to-SGPR into
-  // COPY-to-VGPR.
-  if (NewOpcode == Opcode) {
-    Register DstReg = Inst.getOperand(0).getReg();
-    const TargetRegisterClass *NewDstRC = getDestEquivalentVGPRClass(Inst);
-
-    // If it's a copy of a VGPR to a physical SGPR, insert a V_READFIRSTLANE and
-    // hope for the best.
-    if (Inst.isCopy() && DstReg.isPhysical() &&
-        RI.isVGPR(MRI, Inst.getOperand(1).getReg())) {
-      Register NewDst = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);
-      BuildMI(*Inst.getParent(), &Inst, Inst.getDebugLoc(),
-              get(AMDGPU::V_READFIRSTLANE_B32), NewDst)
-          .add(Inst.getOperand(1));
-      BuildMI(*Inst.getParent(), &Inst, Inst.getDebugLoc(), get(AMDGPU::COPY),
-              DstReg)
-          .addReg(NewDst);
-
-      Inst.eraseFromParent();
-      return;
-    }
-
-    if (Inst.isCopy() && Inst.getOperand(1).getReg().isVirtual()) {
-      Register NewDstReg = Inst.getOperand(1).getReg();
-      const TargetRegisterClass *SrcRC = RI.getRegClassForReg(MRI, NewDstReg);
-      if (const TargetRegisterClass *CommonRC =
-              RI.getCommonSubClass(NewDstRC, SrcRC)) {
-        // Instead of creating a copy where src and dst are the same register
-        // class, we just replace all uses of dst with src.  These kinds of
-        // copies interfere with the heuristics MachineSink uses to decide
-        // whether or not to split a critical edge.  Since the pass assumes
-        // that copies will end up as machine instructions and not be
-        // eliminated.
-        addUsersToMoveToVALUWorklist(DstReg, MRI, Worklist);
-        MRI.replaceRegWith(DstReg, NewDstReg);
-        MRI.clearKillFlags(NewDstReg);
-        Inst.getOperand(0).setReg(DstReg);
-
-        if (!MRI.constrainRegClass(NewDstReg, CommonRC))
-          llvm_unreachable("failed to constrain register");
-
-        Inst.eraseFromParent();
-
-        for (MachineOperand &UseMO :
-             make_early_inc_range(MRI.use_operands(NewDstReg))) {
-          MachineInstr &UseMI = *UseMO.getParent();
-
-          // Legalize t16 operands since replaceReg is called after
-          // addUsersToVALU.
-          legalizeOperandsVALUt16(UseMI, MRI);
-
-          unsigned OpIdx = UseMI.getOperandNo(&UseMO);
-          if (const TargetRegisterClass *OpRC =
-                  getRegClass(UseMI.getDesc(), OpIdx))
-            MRI.constrainRegClass(NewDstReg, OpRC);
-        }
-
-        return;
-      }
-    }
-
-    // If this is a v2s copy between 16bit and 32bit reg,
-    // replace vgpr copy to reg_sequence/extract_subreg
-    // This can be remove after we have sgpr16 in place
-    if (ST.useRealTrue16Insts() && Inst.isCopy() &&
-        Inst.getOperand(1).getReg().isVirtual() &&
-        RI.isVGPR(MRI, Inst.getOperand(1).getReg())) {
-      const TargetRegisterClass *SrcRegRC = getOpRegClass(Inst, 1);
-      if (RI.getMatchingSuperRegClass(NewDstRC, SrcRegRC, AMDGPU::lo16)) {
-        Register NewDstReg = MRI.createVirtualRegister(NewDstRC);
-        Register Undef = MRI.createVirtualRegister(&AMDGPU::VGPR_16RegClass);
-        BuildMI(*Inst.getParent(), &Inst, Inst.getDebugLoc(),
-                get(AMDGPU::IMPLICIT_DEF), Undef);
-        BuildMI(*Inst.getParent(), &Inst, Inst.getDebugLoc(),
-                get(AMDGPU::REG_SEQUENCE), NewDstReg)
-            .addReg(Inst.getOperand(1).getReg())
-            .addImm(AMDGPU::lo16)
-            .addReg(Undef)
-            .addImm(AMDGPU::hi16);
-        Inst.eraseFromParent();
-        MRI.replaceRegWith(DstReg, NewDstReg);
-        addUsersToMoveToVALUWorklist(NewDstReg, MRI, Worklist);
-        return;
-      } else if (RI.getMatchingSuperRegClass(SrcRegRC, NewDstRC,
-                                             AMDGPU::lo16)) {
-        Inst.getOperand(1).setSubReg(AMDGPU::lo16);
-        Register NewDstReg = MRI.createVirtualRegister(NewDstRC);
-        MRI.replaceRegWith(DstReg, NewDstReg);
-        addUsersToMoveToVALUWorklist(NewDstReg, MRI, Worklist);
-        return;
-      }
-    }
-
-    Register NewDstReg = MRI.createVirtualRegister(NewDstRC);
-    MRI.replaceRegWith(DstReg, NewDstReg);
-    legalizeOperands(Inst, MDT);
-    addUsersToMoveToVALUWorklist(NewDstReg, MRI, Worklist);
-    return;
-  }
-
-  // Use the new VALU Opcode.
-  auto NewInstr = BuildMI(*MBB, Inst, Inst.getDebugLoc(), get(NewOpcode))
-                      .setMIFlags(Inst.getFlags());
-  if (isVOP3(NewOpcode) && !isVOP3(Opcode)) {
-    // Intersperse VOP3 modifiers among the SALU operands.
-    NewInstr->addOperand(Inst.getOperand(0));
-    if (AMDGPU::getNamedOperandIdx(NewOpcode,
-                                   AMDGPU::OpName::src0_modifiers) >= 0)
-      NewInstr.addImm(0);
-    if (AMDGPU::hasNamedOperand(NewOpcode, AMDGPU::OpName::src0)) {
-      const MachineOperand &Src = Inst.getOperand(1);
-      NewInstr->addOperand(Src);
-    }
-
-    if (Opcode == AMDGPU::S_SEXT_I32_I8 || Opcode == AMDGPU::S_SEXT_I32_I16) {
-      // We are converting these to a BFE, so we need to add the missing
-      // operands for the size and offset.
-      unsigned Size = (Opcode == AMDGPU::S_SEXT_I32_I8) ? 8 : 16;
-      NewInstr.addImm(0);
-      NewInstr.addImm(Size);
-    } else if (Opcode == AMDGPU::S_BCNT1_I32_B32) {
-      // The VALU version adds the second operand to the result, so insert an
-      // extra 0 operand.
-      NewInstr.addImm(0);
-    } else if (Opcode == AMDGPU::S_BFE_I32 || Opcode == AMDGPU::S_BFE_U32) {
-      const MachineOperand &OffsetWidthOp = Inst.getOperand(2);
-      // If we need to move this to VGPRs, we need to unpack the second
-      // operand back into the 2 separate ones for bit offset and width.
-      assert(OffsetWidthOp.isImm() &&
-             "Scalar BFE is only implemented for constant width and offset");
-      uint32_t Imm = OffsetWidthOp.getImm();
-
-      uint32_t Offset = Imm & 0x3f;               // Extract bits [5:0].
-      uint32_t BitWidth = (Imm & 0x7f0000) >> 16; // Extract bits [22:16].
-      NewInstr.addImm(Offset);
-      NewInstr.addImm(BitWidth);
-    } else {
-      if (AMDGPU::getNamedOperandIdx(NewOpcode,
-                                     AMDGPU::OpName::src1_modifiers) >= 0)
-        NewInstr.addImm(0);
-      if (AMDGPU::getNamedOperandIdx(NewOpcode, AMDGPU::OpName::src1) >= 0)
-        NewInstr->addOperand(Inst.getOperand(2));
-      if (AMDGPU::getNamedOperandIdx(NewOpcode,
-                                     AMDGPU::OpName::src2_modifiers) >= 0)
-        NewInstr.addImm(0);
-      if (AMDGPU::getNamedOperandIdx(NewOpcode, AMDGPU::OpName::src2) >= 0)
-        NewInstr->addOperand(Inst.getOperand(3));
-      if (AMDGPU::getNamedOperandIdx(NewOpcode, AMDGPU::OpName::clamp) >= 0)
-        NewInstr.addImm(0);
-      if (AMDGPU::getNamedOperandIdx(NewOpcode, AMDGPU::OpName::omod) >= 0)
-        NewInstr.addImm(0);
-      if (AMDGPU::getNamedOperandIdx(NewOpcode, AMDGPU::OpName::op_sel) >= 0)
-        NewInstr.addImm(0);
-    }
-  } else {
-    // Just copy the SALU operands.
-    for (const MachineOperand &Op : Inst.explicit_operands())
-      NewInstr->addOperand(Op);
-  }
-
-  // Remove any references to SCC. Vector instructions can't read from it, and
-  // We're just about to add the implicit use / defs of VCC, and we don't want
-  // both.
-  for (MachineOperand &Op : Inst.implicit_operands()) {
-    if (Op.getReg() == AMDGPU::SCC) {
-      // Only propagate through live-def of SCC.
-      if (Op.isDef() && !Op.isDead())
-        addSCCDefUsersToVALUWorklist(Op, Inst, Worklist);
-      if (Op.isUse())
-        addSCCDefsToVALUWorklist(NewInstr, Worklist);
-    }
-  }
-  Inst.eraseFromParent();
-  Register NewDstReg;
-  if (NewInstr->getOperand(0).isReg() && NewInstr->getOperand(0).isDef()) {
-    Register DstReg = NewInstr->getOperand(0).getReg();
-    assert(DstReg.isVirtual());
-    // Update the destination register class.
-    const TargetRegisterClass *NewDstRC = getDestEquivalentVGPRClass(*NewInstr);
-    assert(NewDstRC);
-    NewDstReg = MRI.createVirtualRegister(NewDstRC);
-    MRI.replaceRegWith(DstReg, NewDstReg);
-  }
-  fixImplicitOperands(*NewInstr);
-
-  legalizeOperandsVALUt16(*NewInstr, MRI);
-
-  // Legalize the operands
-  legalizeOperands(*NewInstr, MDT);
-  if (NewDstReg)
-    addUsersToMoveToVALUWorklist(NewDstReg, MRI, Worklist);
-}
-
-// Add/sub require special handling to deal with carry outs.
-std::pair<bool, MachineBasicBlock *>
-SIInstrInfo::moveScalarAddSub(SIInstrWorklist &Worklist, MachineInstr &Inst,
-                              MachineDominatorTree *MDT) const {
-  if (ST.hasAddNoCarryInsts()) {
-    // Assume there is no user of scc since we don't select this in that case.
-    // Since scc isn't used, it doesn't really matter if the i32 or u32 variant
-    // is used.
-
-    MachineBasicBlock &MBB = *Inst.getParent();
-    MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-
-    Register OldDstReg = Inst.getOperand(0).getReg();
-    Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-
-    unsigned Opc = Inst.getOpcode();
-    assert(Opc == AMDGPU::S_ADD_I32 || Opc == AMDGPU::S_SUB_I32);
-
-    unsigned NewOpc = Opc == AMDGPU::S_ADD_I32 ?
-      AMDGPU::V_ADD_U32_e64 : AMDGPU::V_SUB_U32_e64;
-
-    assert(Inst.getOperand(3).getReg() == AMDGPU::SCC);
-    Inst.removeOperand(3);
-
-    Inst.setDesc(get(NewOpc));
-    Inst.addOperand(MachineOperand::CreateImm(0)); // clamp bit
-    Inst.addImplicitDefUseOperands(*MBB.getParent());
-    MRI.replaceRegWith(OldDstReg, ResultReg);
-    MachineBasicBlock *NewBB = legalizeOperands(Inst, MDT);
-
-    addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist);
-    return std::pair(true, NewBB);
-  }
-
-  return std::pair(false, nullptr);
-}
-
-void SIInstrInfo::lowerSelect(SIInstrWorklist &Worklist, MachineInstr &Inst,
-                              MachineDominatorTree *MDT) const {
-
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-  MachineBasicBlock::iterator MII = Inst;
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MachineOperand &Src0 = Inst.getOperand(1);
-  MachineOperand &Src1 = Inst.getOperand(2);
-  MachineOperand &Cond = Inst.getOperand(3);
-
-  Register CondReg = Cond.getReg();
-  bool IsSCC = (CondReg == AMDGPU::SCC);
-
-  // If this is a trivial select where the condition is effectively not SCC
-  // (CondReg is a source of copy to SCC), then the select is semantically
-  // equivalent to copying CondReg. Hence, there is no need to create
-  // V_CNDMASK, we can just use that and bail out.
-  if (!IsSCC && Src0.isImm() && (Src0.getImm() == -1) && Src1.isImm() &&
-      (Src1.getImm() == 0)) {
-    MRI.replaceRegWith(Dest.getReg(), CondReg);
-    return;
-  }
-
-  Register NewCondReg = CondReg;
-  if (IsSCC) {
-    const TargetRegisterClass *TC = RI.getWaveMaskRegClass();
-    NewCondReg = MRI.createVirtualRegister(TC);
-
-    // Now look for the closest SCC def if it is a copy
-    // replacing the CondReg with the COPY source register
-    bool CopyFound = false;
-    for (MachineInstr &CandI :
-         make_range(std::next(MachineBasicBlock::reverse_iterator(Inst)),
-                    Inst.getParent()->rend())) {
-      if (CandI.findRegisterDefOperandIdx(AMDGPU::SCC, &RI, false, false) !=
-          -1) {
-        if (CandI.isCopy() && CandI.getOperand(0).getReg() == AMDGPU::SCC) {
-          BuildMI(MBB, MII, DL, get(AMDGPU::COPY), NewCondReg)
-              .addReg(CandI.getOperand(1).getReg());
-          CopyFound = true;
-        }
-        break;
-      }
-    }
-    if (!CopyFound) {
-      // SCC def is not a copy
-      // Insert a trivial select instead of creating a copy, because a copy from
-      // SCC would semantically mean just copying a single bit, but we may need
-      // the result to be a vector condition mask that needs preserving.
-      unsigned Opcode =
-          ST.isWave64() ? AMDGPU::S_CSELECT_B64 : AMDGPU::S_CSELECT_B32;
-      auto NewSelect =
-          BuildMI(MBB, MII, DL, get(Opcode), NewCondReg).addImm(-1).addImm(0);
-      NewSelect->getOperand(3).setIsUndef(Cond.isUndef());
-    }
-  }
-
-  Register NewDestReg = MRI.createVirtualRegister(
-      RI.getEquivalentVGPRClass(MRI.getRegClass(Dest.getReg())));
-  MachineInstr *NewInst;
-  if (Inst.getOpcode() == AMDGPU::S_CSELECT_B32) {
-    NewInst = BuildMI(MBB, MII, DL, get(AMDGPU::V_CNDMASK_B32_e64), NewDestReg)
-                  .addImm(0)
-                  .add(Src1) // False
-                  .addImm(0)
-                  .add(Src0) // True
-                  .addReg(NewCondReg);
-  } else {
-    NewInst =
-        BuildMI(MBB, MII, DL, get(AMDGPU::V_CNDMASK_B64_PSEUDO), NewDestReg)
-            .add(Src1) // False
-            .add(Src0) // True
-            .addReg(NewCondReg);
-  }
-  MRI.replaceRegWith(Dest.getReg(), NewDestReg);
-  legalizeOperands(*NewInst, MDT);
-  addUsersToMoveToVALUWorklist(NewDestReg, MRI, Worklist);
-}
-
-void SIInstrInfo::lowerScalarAbs(SIInstrWorklist &Worklist,
-                                 MachineInstr &Inst) const {
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-  MachineBasicBlock::iterator MII = Inst;
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MachineOperand &Src = Inst.getOperand(1);
-  Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-
-  unsigned SubOp = ST.hasAddNoCarryInsts() ? AMDGPU::V_SUB_U32_e32
-                                           : AMDGPU::V_SUB_CO_U32_e32;
-
-  BuildMI(MBB, MII, DL, get(SubOp), TmpReg)
-    .addImm(0)
-    .addReg(Src.getReg());
-
-  BuildMI(MBB, MII, DL, get(AMDGPU::V_MAX_I32_e64), ResultReg)
-    .addReg(Src.getReg())
-    .addReg(TmpReg);
-
-  MRI.replaceRegWith(Dest.getReg(), ResultReg);
-  addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist);
-}
-
-void SIInstrInfo::lowerScalarAbsDiff(SIInstrWorklist &Worklist,
-                                     MachineInstr &Inst) const {
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-  MachineBasicBlock::iterator MII = Inst;
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MachineOperand &Src1 = Inst.getOperand(1);
-  MachineOperand &Src2 = Inst.getOperand(2);
-  Register SubResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-
-  unsigned SubOp = ST.hasAddNoCarryInsts() ? AMDGPU::V_SUB_U32_e32
-                                           : AMDGPU::V_SUB_CO_U32_e32;
-
-  BuildMI(MBB, MII, DL, get(SubOp), SubResultReg)
-      .addReg(Src1.getReg())
-      .addReg(Src2.getReg());
-
-  BuildMI(MBB, MII, DL, get(SubOp), TmpReg).addImm(0).addReg(SubResultReg);
-
-  BuildMI(MBB, MII, DL, get(AMDGPU::V_MAX_I32_e64), ResultReg)
-      .addReg(SubResultReg)
-      .addReg(TmpReg);
-
-  MRI.replaceRegWith(Dest.getReg(), ResultReg);
-  addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist);
-}
-
-void SIInstrInfo::lowerScalarXnor(SIInstrWorklist &Worklist,
-                                  MachineInstr &Inst) const {
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-  MachineBasicBlock::iterator MII = Inst;
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MachineOperand &Src0 = Inst.getOperand(1);
-  MachineOperand &Src1 = Inst.getOperand(2);
-
-  if (ST.hasDLInsts()) {
-    Register NewDest = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-    legalizeGenericOperand(MBB, MII, &AMDGPU::VGPR_32RegClass, Src0, MRI, DL);
-    legalizeGenericOperand(MBB, MII, &AMDGPU::VGPR_32RegClass, Src1, MRI, DL);
-
-    BuildMI(MBB, MII, DL, get(AMDGPU::V_XNOR_B32_e64), NewDest)
-      .add(Src0)
-      .add(Src1);
-
-    MRI.replaceRegWith(Dest.getReg(), NewDest);
-    addUsersToMoveToVALUWorklist(NewDest, MRI, Worklist);
-  } else {
-    // Using the identity !(x ^ y) == (!x ^ y) == (x ^ !y), we can
-    // invert either source and then perform the XOR. If either source is a
-    // scalar register, then we can leave the inversion on the scalar unit to
-    // achieve a better distribution of scalar and vector instructions.
-    bool Src0IsSGPR = Src0.isReg() &&
-                      RI.isSGPRClass(MRI.getRegClass(Src0.getReg()));
-    bool Src1IsSGPR = Src1.isReg() &&
-                      RI.isSGPRClass(MRI.getRegClass(Src1.getReg()));
-    MachineInstr *Xor;
-    Register Temp = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
-    Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
-
-    // Build a pair of scalar instructions and add them to the work list.
-    // The next iteration over the work list will lower these to the vector
-    // unit as necessary.
-    if (Src0IsSGPR) {
-      BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), Temp).add(Src0);
-      Xor = BuildMI(MBB, MII, DL, get(AMDGPU::S_XOR_B32), NewDest)
-      .addReg(Temp)
-      .add(Src1);
-    } else if (Src1IsSGPR) {
-      BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), Temp).add(Src1);
-      Xor = BuildMI(MBB, MII, DL, get(AMDGPU::S_XOR_B32), NewDest)
-      .add(Src0)
-      .addReg(Temp);
-    } else {
-      Xor = BuildMI(MBB, MII, DL, get(AMDGPU::S_XOR_B32), Temp)
-        .add(Src0)
-        .add(Src1);
-      MachineInstr *Not =
-          BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), NewDest).addReg(Temp);
-      Worklist.insert(Not);
-    }
-
-    MRI.replaceRegWith(Dest.getReg(), NewDest);
-
-    Worklist.insert(Xor);
-
-    addUsersToMoveToVALUWorklist(NewDest, MRI, Worklist);
-  }
-}
-
-void SIInstrInfo::splitScalarNotBinop(SIInstrWorklist &Worklist,
-                                      MachineInstr &Inst,
-                                      unsigned Opcode) const {
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-  MachineBasicBlock::iterator MII = Inst;
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MachineOperand &Src0 = Inst.getOperand(1);
-  MachineOperand &Src1 = Inst.getOperand(2);
-
-  Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
-  Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
-
-  MachineInstr &Op = *BuildMI(MBB, MII, DL, get(Opcode), Interm)
-    .add(Src0)
-    .add(Src1);
-
-  MachineInstr &Not = *BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), NewDest)
-    .addReg(Interm);
-
-  Worklist.insert(&Op);
-  Worklist.insert(&Not);
-
-  MRI.replaceRegWith(Dest.getReg(), NewDest);
-  addUsersToMoveToVALUWorklist(NewDest, MRI, Worklist);
-}
-
-void SIInstrInfo::splitScalarBinOpN2(SIInstrWorklist &Worklist,
-                                     MachineInstr &Inst,
-                                     unsigned Opcode) const {
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-  MachineBasicBlock::iterator MII = Inst;
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MachineOperand &Src0 = Inst.getOperand(1);
-  MachineOperand &Src1 = Inst.getOperand(2);
-
-  Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);
-  Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);
-
-  MachineInstr &Not = *BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), Interm)
-    .add(Src1);
-
-  MachineInstr &Op = *BuildMI(MBB, MII, DL, get(Opcode), NewDest)
-    .add(Src0)
-    .addReg(Interm);
-
-  Worklist.insert(&Not);
-  Worklist.insert(&Op);
-
-  MRI.replaceRegWith(Dest.getReg(), NewDest);
-  addUsersToMoveToVALUWorklist(NewDest, MRI, Worklist);
-}
-
-void SIInstrInfo::splitScalar64BitUnaryOp(SIInstrWorklist &Worklist,
-                                          MachineInstr &Inst, unsigned Opcode,
-                                          bool Swap) const {
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MachineOperand &Src0 = Inst.getOperand(1);
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  MachineBasicBlock::iterator MII = Inst;
-
-  const MCInstrDesc &InstDesc = get(Opcode);
-  const TargetRegisterClass *Src0RC = Src0.isReg() ?
-    MRI.getRegClass(Src0.getReg()) :
-    &AMDGPU::SGPR_32RegClass;
-
-  const TargetRegisterClass *Src0SubRC =
-      RI.getSubRegisterClass(Src0RC, AMDGPU::sub0);
-
-  MachineOperand SrcReg0Sub0 = buildExtractSubRegOrImm(MII, MRI, Src0, Src0RC,
-                                                       AMDGPU::sub0, Src0SubRC);
-
-  const TargetRegisterClass *DestRC = MRI.getRegClass(Dest.getReg());
-  const TargetRegisterClass *NewDestRC = RI.getEquivalentVGPRClass(DestRC);
-  const TargetRegisterClass *NewDestSubRC =
-      RI.getSubRegisterClass(NewDestRC, AMDGPU::sub0);
-
-  Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC);
-  MachineInstr &LoHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub0).add(SrcReg0Sub0);
-
-  MachineOperand SrcReg0Sub1 = buildExtractSubRegOrImm(MII, MRI, Src0, Src0RC,
-                                                       AMDGPU::sub1, Src0SubRC);
-
-  Register DestSub1 = MRI.createVirtualRegister(NewDestSubRC);
-  MachineInstr &HiHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub1).add(SrcReg0Sub1);
-
-  if (Swap)
-    std::swap(DestSub0, DestSub1);
-
-  Register FullDestReg = MRI.createVirtualRegister(NewDestRC);
-  BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg)
-    .addReg(DestSub0)
-    .addImm(AMDGPU::sub0)
-    .addReg(DestSub1)
-    .addImm(AMDGPU::sub1);
-
-  MRI.replaceRegWith(Dest.getReg(), FullDestReg);
-
-  Worklist.insert(&LoHalf);
-  Worklist.insert(&HiHalf);
-
-  // We don't need to legalizeOperands here because for a single operand, src0
-  // will support any kind of input.
-
-  // Move all users of this moved value.
-  addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist);
-}
-
-// There is not a vector equivalent of s_mul_u64. For this reason, we need to
-// split the s_mul_u64 in 32-bit vector multiplications.
-void SIInstrInfo::splitScalarSMulU64(SIInstrWorklist &Worklist,
-                                     MachineInstr &Inst,
-                                     MachineDominatorTree *MDT) const {
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-
-  Register FullDestReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);
-  Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  Register DestSub1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MachineOperand &Src0 = Inst.getOperand(1);
-  MachineOperand &Src1 = Inst.getOperand(2);
-  const DebugLoc &DL = Inst.getDebugLoc();
-  MachineBasicBlock::iterator MII = Inst;
-
-  const TargetRegisterClass *Src0RC = MRI.getRegClass(Src0.getReg());
-  const TargetRegisterClass *Src1RC = MRI.getRegClass(Src1.getReg());
-  const TargetRegisterClass *Src0SubRC =
-      RI.getSubRegisterClass(Src0RC, AMDGPU::sub0);
-  if (RI.isSGPRClass(Src0SubRC))
-    Src0SubRC = RI.getEquivalentVGPRClass(Src0SubRC);
-  const TargetRegisterClass *Src1SubRC =
-      RI.getSubRegisterClass(Src1RC, AMDGPU::sub0);
-  if (RI.isSGPRClass(Src1SubRC))
-    Src1SubRC = RI.getEquivalentVGPRClass(Src1SubRC);
-
-  // First, we extract the low 32-bit and high 32-bit values from each of the
-  // operands.
-  MachineOperand Op0L =
-      buildExtractSubRegOrImm(MII, MRI, Src0, Src0RC, AMDGPU::sub0, Src0SubRC);
-  MachineOperand Op1L =
-      buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC, AMDGPU::sub0, Src1SubRC);
-  MachineOperand Op0H =
-      buildExtractSubRegOrImm(MII, MRI, Src0, Src0RC, AMDGPU::sub1, Src0SubRC);
-  MachineOperand Op1H =
-      buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC, AMDGPU::sub1, Src1SubRC);
-
-  // The multilication is done as follows:
-  //
-  //                            Op1H  Op1L
-  //                          * Op0H  Op0L
-  //                       --------------------
-  //                       Op1H*Op0L  Op1L*Op0L
-  //          + Op1H*Op0H  Op1L*Op0H
-  // -----------------------------------------
-  // (Op1H*Op0L + Op1L*Op0H + carry)  Op1L*Op0L
-  //
-  //  We drop Op1H*Op0H because the result of the multiplication is a 64-bit
-  //  value and that would overflow.
-  //  The low 32-bit value is Op1L*Op0L.
-  //  The high 32-bit value is Op1H*Op0L + Op1L*Op0H + carry (from Op1L*Op0L).
-
-  Register Op1L_Op0H_Reg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  MachineInstr *Op1L_Op0H =
-      BuildMI(MBB, MII, DL, get(AMDGPU::V_MUL_LO_U32_e64), Op1L_Op0H_Reg)
-          .add(Op1L)
-          .add(Op0H);
-
-  Register Op1H_Op0L_Reg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  MachineInstr *Op1H_Op0L =
-      BuildMI(MBB, MII, DL, get(AMDGPU::V_MUL_LO_U32_e64), Op1H_Op0L_Reg)
-          .add(Op1H)
-          .add(Op0L);
-
-  Register CarryReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  MachineInstr *Carry =
-      BuildMI(MBB, MII, DL, get(AMDGPU::V_MUL_HI_U32_e64), CarryReg)
-          .add(Op1L)
-          .add(Op0L);
-
-  MachineInstr *LoHalf =
-      BuildMI(MBB, MII, DL, get(AMDGPU::V_MUL_LO_U32_e64), DestSub0)
-          .add(Op1L)
-          .add(Op0L);
-
-  Register AddReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  MachineInstr *Add = BuildMI(MBB, MII, DL, get(AMDGPU::V_ADD_U32_e32), AddReg)
-                          .addReg(Op1L_Op0H_Reg)
-                          .addReg(Op1H_Op0L_Reg);
-
-  MachineInstr *HiHalf =
-      BuildMI(MBB, MII, DL, get(AMDGPU::V_ADD_U32_e32), DestSub1)
-          .addReg(AddReg)
-          .addReg(CarryReg);
-
-  BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg)
-      .addReg(DestSub0)
-      .addImm(AMDGPU::sub0)
-      .addReg(DestSub1)
-      .addImm(AMDGPU::sub1);
-
-  MRI.replaceRegWith(Dest.getReg(), FullDestReg);
-
-  // Try to legalize the operands in case we need to swap the order to keep it
-  // valid.
-  legalizeOperands(*Op1L_Op0H, MDT);
-  legalizeOperands(*Op1H_Op0L, MDT);
-  legalizeOperands(*Carry, MDT);
-  legalizeOperands(*LoHalf, MDT);
-  legalizeOperands(*Add, MDT);
-  legalizeOperands(*HiHalf, MDT);
-
-  // Move all users of this moved value.
-  addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist);
-}
-
-// Lower S_MUL_U64_U32_PSEUDO/S_MUL_I64_I32_PSEUDO in two 32-bit vector
-// multiplications.
-void SIInstrInfo::splitScalarSMulPseudo(SIInstrWorklist &Worklist,
-                                        MachineInstr &Inst,
-                                        MachineDominatorTree *MDT) const {
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-
-  Register FullDestReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);
-  Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  Register DestSub1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MachineOperand &Src0 = Inst.getOperand(1);
-  MachineOperand &Src1 = Inst.getOperand(2);
-  const DebugLoc &DL = Inst.getDebugLoc();
-  MachineBasicBlock::iterator MII = Inst;
-
-  const TargetRegisterClass *Src0RC = MRI.getRegClass(Src0.getReg());
-  const TargetRegisterClass *Src1RC = MRI.getRegClass(Src1.getReg());
-  const TargetRegisterClass *Src0SubRC =
-      RI.getSubRegisterClass(Src0RC, AMDGPU::sub0);
-  if (RI.isSGPRClass(Src0SubRC))
-    Src0SubRC = RI.getEquivalentVGPRClass(Src0SubRC);
-  const TargetRegisterClass *Src1SubRC =
-      RI.getSubRegisterClass(Src1RC, AMDGPU::sub0);
-  if (RI.isSGPRClass(Src1SubRC))
-    Src1SubRC = RI.getEquivalentVGPRClass(Src1SubRC);
-
-  // First, we extract the low 32-bit and high 32-bit values from each of the
-  // operands.
-  MachineOperand Op0L =
-      buildExtractSubRegOrImm(MII, MRI, Src0, Src0RC, AMDGPU::sub0, Src0SubRC);
-  MachineOperand Op1L =
-      buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC, AMDGPU::sub0, Src1SubRC);
-
-  unsigned Opc = Inst.getOpcode();
-  unsigned NewOpc = Opc == AMDGPU::S_MUL_U64_U32_PSEUDO
-                        ? AMDGPU::V_MUL_HI_U32_e64
-                        : AMDGPU::V_MUL_HI_I32_e64;
-  MachineInstr *HiHalf =
-      BuildMI(MBB, MII, DL, get(NewOpc), DestSub1).add(Op1L).add(Op0L);
-
-  MachineInstr *LoHalf =
-      BuildMI(MBB, MII, DL, get(AMDGPU::V_MUL_LO_U32_e64), DestSub0)
-          .add(Op1L)
-          .add(Op0L);
-
-  BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg)
-      .addReg(DestSub0)
-      .addImm(AMDGPU::sub0)
-      .addReg(DestSub1)
-      .addImm(AMDGPU::sub1);
-
-  MRI.replaceRegWith(Dest.getReg(), FullDestReg);
-
-  // Try to legalize the operands in case we need to swap the order to keep it
-  // valid.
-  legalizeOperands(*HiHalf, MDT);
-  legalizeOperands(*LoHalf, MDT);
-
-  // Move all users of this moved value.
-  addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist);
-}
-
-void SIInstrInfo::splitScalar64BitBinaryOp(SIInstrWorklist &Worklist,
-                                           MachineInstr &Inst, unsigned Opcode,
-                                           MachineDominatorTree *MDT) const {
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MachineOperand &Src0 = Inst.getOperand(1);
-  MachineOperand &Src1 = Inst.getOperand(2);
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  MachineBasicBlock::iterator MII = Inst;
-
-  const MCInstrDesc &InstDesc = get(Opcode);
-  const TargetRegisterClass *Src0RC = Src0.isReg() ?
-    MRI.getRegClass(Src0.getReg()) :
-    &AMDGPU::SGPR_32RegClass;
-
-  const TargetRegisterClass *Src0SubRC =
-      RI.getSubRegisterClass(Src0RC, AMDGPU::sub0);
-  const TargetRegisterClass *Src1RC = Src1.isReg() ?
-    MRI.getRegClass(Src1.getReg()) :
-    &AMDGPU::SGPR_32RegClass;
-
-  const TargetRegisterClass *Src1SubRC =
-      RI.getSubRegisterClass(Src1RC, AMDGPU::sub0);
-
-  MachineOperand SrcReg0Sub0 = buildExtractSubRegOrImm(MII, MRI, Src0, Src0RC,
-                                                       AMDGPU::sub0, Src0SubRC);
-  MachineOperand SrcReg1Sub0 = buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC,
-                                                       AMDGPU::sub0, Src1SubRC);
-  MachineOperand SrcReg0Sub1 = buildExtractSubRegOrImm(MII, MRI, Src0, Src0RC,
-                                                       AMDGPU::sub1, Src0SubRC);
-  MachineOperand SrcReg1Sub1 = buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC,
-                                                       AMDGPU::sub1, Src1SubRC);
-
-  const TargetRegisterClass *DestRC = MRI.getRegClass(Dest.getReg());
-  const TargetRegisterClass *NewDestRC = RI.getEquivalentVGPRClass(DestRC);
-  const TargetRegisterClass *NewDestSubRC =
-      RI.getSubRegisterClass(NewDestRC, AMDGPU::sub0);
-
-  Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC);
-  MachineInstr &LoHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub0)
-                              .add(SrcReg0Sub0)
-                              .add(SrcReg1Sub0);
-
-  Register DestSub1 = MRI.createVirtualRegister(NewDestSubRC);
-  MachineInstr &HiHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub1)
-                              .add(SrcReg0Sub1)
-                              .add(SrcReg1Sub1);
-
-  Register FullDestReg = MRI.createVirtualRegister(NewDestRC);
-  BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg)
-    .addReg(DestSub0)
-    .addImm(AMDGPU::sub0)
-    .addReg(DestSub1)
-    .addImm(AMDGPU::sub1);
-
-  MRI.replaceRegWith(Dest.getReg(), FullDestReg);
-
-  Worklist.insert(&LoHalf);
-  Worklist.insert(&HiHalf);
-
-  // Move all users of this moved value.
-  addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist);
-}
-
-void SIInstrInfo::splitScalar64BitXnor(SIInstrWorklist &Worklist,
-                                       MachineInstr &Inst,
-                                       MachineDominatorTree *MDT) const {
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MachineOperand &Src0 = Inst.getOperand(1);
-  MachineOperand &Src1 = Inst.getOperand(2);
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  MachineBasicBlock::iterator MII = Inst;
-
-  const TargetRegisterClass *DestRC = MRI.getRegClass(Dest.getReg());
-
-  Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);
-
-  MachineOperand* Op0;
-  MachineOperand* Op1;
-
-  if (Src0.isReg() && RI.isSGPRReg(MRI, Src0.getReg())) {
-    Op0 = &Src0;
-    Op1 = &Src1;
-  } else {
-    Op0 = &Src1;
-    Op1 = &Src0;
-  }
-
-  BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B64), Interm)
-    .add(*Op0);
-
-  Register NewDest = MRI.createVirtualRegister(DestRC);
-
-  MachineInstr &Xor = *BuildMI(MBB, MII, DL, get(AMDGPU::S_XOR_B64), NewDest)
-    .addReg(Interm)
-    .add(*Op1);
-
-  MRI.replaceRegWith(Dest.getReg(), NewDest);
-
-  Worklist.insert(&Xor);
-}
-
-void SIInstrInfo::splitScalar64BitBCNT(SIInstrWorklist &Worklist,
-                                       MachineInstr &Inst) const {
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-
-  MachineBasicBlock::iterator MII = Inst;
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MachineOperand &Src = Inst.getOperand(1);
-
-  const MCInstrDesc &InstDesc = get(AMDGPU::V_BCNT_U32_B32_e64);
-  const TargetRegisterClass *SrcRC = Src.isReg() ?
-    MRI.getRegClass(Src.getReg()) :
-    &AMDGPU::SGPR_32RegClass;
-
-  Register MidReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-
-  const TargetRegisterClass *SrcSubRC =
-      RI.getSubRegisterClass(SrcRC, AMDGPU::sub0);
-
-  MachineOperand SrcRegSub0 = buildExtractSubRegOrImm(MII, MRI, Src, SrcRC,
-                                                      AMDGPU::sub0, SrcSubRC);
-  MachineOperand SrcRegSub1 = buildExtractSubRegOrImm(MII, MRI, Src, SrcRC,
-                                                      AMDGPU::sub1, SrcSubRC);
-
-  BuildMI(MBB, MII, DL, InstDesc, MidReg).add(SrcRegSub0).addImm(0);
-
-  BuildMI(MBB, MII, DL, InstDesc, ResultReg).add(SrcRegSub1).addReg(MidReg);
-
-  MRI.replaceRegWith(Dest.getReg(), ResultReg);
-
-  // We don't need to legalize operands here. src0 for either instruction can be
-  // an SGPR, and the second input is unused or determined here.
-  addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist);
-}
-
-void SIInstrInfo::splitScalar64BitBFE(SIInstrWorklist &Worklist,
-                                      MachineInstr &Inst) const {
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-  MachineBasicBlock::iterator MII = Inst;
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  uint32_t Imm = Inst.getOperand(2).getImm();
-  uint32_t Offset = Imm & 0x3f; // Extract bits [5:0].
-  uint32_t BitWidth = (Imm & 0x7f0000) >> 16; // Extract bits [22:16].
-
-  (void) Offset;
-
-  // Only sext_inreg cases handled.
-  assert(Inst.getOpcode() == AMDGPU::S_BFE_I64 && BitWidth <= 32 &&
-         Offset == 0 && "Not implemented");
-
-  if (BitWidth < 32) {
-    Register MidRegLo = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-    Register MidRegHi = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-    Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);
-
-    BuildMI(MBB, MII, DL, get(AMDGPU::V_BFE_I32_e64), MidRegLo)
-        .addReg(Inst.getOperand(1).getReg(), {}, AMDGPU::sub0)
-        .addImm(0)
-        .addImm(BitWidth);
-
-    BuildMI(MBB, MII, DL, get(AMDGPU::V_ASHRREV_I32_e32), MidRegHi)
-      .addImm(31)
-      .addReg(MidRegLo);
-
-    BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), ResultReg)
-      .addReg(MidRegLo)
-      .addImm(AMDGPU::sub0)
-      .addReg(MidRegHi)
-      .addImm(AMDGPU::sub1);
-
-    MRI.replaceRegWith(Dest.getReg(), ResultReg);
-    addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist);
-    return;
-  }
-
-  MachineOperand &Src = Inst.getOperand(1);
-  Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);
-
-  BuildMI(MBB, MII, DL, get(AMDGPU::V_ASHRREV_I32_e64), TmpReg)
-      .addImm(31)
-      .addReg(Src.getReg(), {}, AMDGPU::sub0);
-
-  BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), ResultReg)
-      .addReg(Src.getReg(), {}, AMDGPU::sub0)
-      .addImm(AMDGPU::sub0)
-      .addReg(TmpReg)
-      .addImm(AMDGPU::sub1);
-
-  MRI.replaceRegWith(Dest.getReg(), ResultReg);
-  addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist);
-}
-
-void SIInstrInfo::splitScalar64BitCountOp(SIInstrWorklist &Worklist,
-                                          MachineInstr &Inst, unsigned Opcode,
-                                          MachineDominatorTree *MDT) const {
-  //  (S_FLBIT_I32_B64 hi:lo) ->
-  // -> (umin (V_FFBH_U32_e32 hi), (uaddsat (V_FFBH_U32_e32 lo), 32))
-  //  (S_FF1_I32_B64 hi:lo) ->
-  // ->(umin (uaddsat (V_FFBL_B32_e32 hi), 32) (V_FFBL_B32_e32 lo))
-
-  MachineBasicBlock &MBB = *Inst.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-  MachineBasicBlock::iterator MII = Inst;
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MachineOperand &Src = Inst.getOperand(1);
-
-  const MCInstrDesc &InstDesc = get(Opcode);
-
-  bool IsCtlz = Opcode == AMDGPU::V_FFBH_U32_e32;
-  unsigned OpcodeAdd = ST.hasAddNoCarryInsts() ? AMDGPU::V_ADD_U32_e64
-                                               : AMDGPU::V_ADD_CO_U32_e32;
-
-  const TargetRegisterClass *SrcRC =
-      Src.isReg() ? MRI.getRegClass(Src.getReg()) : &AMDGPU::SGPR_32RegClass;
-  const TargetRegisterClass *SrcSubRC =
-      RI.getSubRegisterClass(SrcRC, AMDGPU::sub0);
-
-  MachineOperand SrcRegSub0 =
-      buildExtractSubRegOrImm(MII, MRI, Src, SrcRC, AMDGPU::sub0, SrcSubRC);
-  MachineOperand SrcRegSub1 =
-      buildExtractSubRegOrImm(MII, MRI, Src, SrcRC, AMDGPU::sub1, SrcSubRC);
-
-  Register MidReg1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  Register MidReg2 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  Register MidReg3 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  Register MidReg4 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-
-  BuildMI(MBB, MII, DL, InstDesc, MidReg1).add(SrcRegSub0);
-
-  BuildMI(MBB, MII, DL, InstDesc, MidReg2).add(SrcRegSub1);
-
-  BuildMI(MBB, MII, DL, get(OpcodeAdd), MidReg3)
-      .addReg(IsCtlz ? MidReg1 : MidReg2)
-      .addImm(32)
-      .addImm(1); // enable clamp
-
-  BuildMI(MBB, MII, DL, get(AMDGPU::V_MIN_U32_e64), MidReg4)
-      .addReg(MidReg3)
-      .addReg(IsCtlz ? MidReg2 : MidReg1);
-
-  MRI.replaceRegWith(Dest.getReg(), MidReg4);
-
-  addUsersToMoveToVALUWorklist(MidReg4, MRI, Worklist);
-}
-
-void SIInstrInfo::addUsersToMoveToVALUWorklist(
-    Register DstReg, MachineRegisterInfo &MRI,
-    SIInstrWorklist &Worklist) const {
-  for (MachineOperand &MO : make_early_inc_range(MRI.use_operands(DstReg))) {
-    MachineInstr &UseMI = *MO.getParent();
-
-    unsigned OpNo = 0;
-
-    switch (UseMI.getOpcode()) {
-    case AMDGPU::COPY:
-    case AMDGPU::WQM:
-    case AMDGPU::SOFT_WQM:
-    case AMDGPU::STRICT_WWM:
-    case AMDGPU::STRICT_WQM:
-    case AMDGPU::REG_SEQUENCE:
-    case AMDGPU::PHI:
-    case AMDGPU::INSERT_SUBREG:
-      break;
-    default:
-      OpNo = MO.getOperandNo();
-      break;
-    }
-
-    const TargetRegisterClass *OpRC = getOpRegClass(UseMI, OpNo);
-    MRI.constrainRegClass(DstReg, OpRC);
-
-    if (!RI.hasVectorRegisters(OpRC))
-      Worklist.insert(&UseMI);
-    else
-      // Legalization could change user list.
-      legalizeOperandsVALUt16(UseMI, OpNo, MRI);
-  }
-}
-
-void SIInstrInfo::movePackToVALU(SIInstrWorklist &Worklist,
-                                 MachineRegisterInfo &MRI,
-                                 MachineInstr &Inst) const {
-  Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-  MachineBasicBlock *MBB = Inst.getParent();
-  MachineOperand &Src0 = Inst.getOperand(1);
-  MachineOperand &Src1 = Inst.getOperand(2);
-  const DebugLoc &DL = Inst.getDebugLoc();
-
-  if (ST.useRealTrue16Insts()) {
-    Register SrcReg0, SrcReg1;
-    if (!Src0.isReg() || !RI.isVGPR(MRI, Src0.getReg())) {
-      SrcReg0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-      BuildMI(*MBB, Inst, DL,
-              get(Src0.isImm() ? AMDGPU::V_MOV_B32_e32 : AMDGPU::COPY), SrcReg0)
-          .add(Src0);
-    } else {
-      SrcReg0 = Src0.getReg();
-    }
-
-    if (!Src1.isReg() || !RI.isVGPR(MRI, Src1.getReg())) {
-      SrcReg1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-      BuildMI(*MBB, Inst, DL,
-              get(Src1.isImm() ? AMDGPU::V_MOV_B32_e32 : AMDGPU::COPY), SrcReg1)
-          .add(Src1);
-    } else {
-      SrcReg1 = Src1.getReg();
-    }
-
-    bool isSrc0Reg16 = MRI.constrainRegClass(SrcReg0, &AMDGPU::VGPR_16RegClass);
-    bool isSrc1Reg16 = MRI.constrainRegClass(SrcReg1, &AMDGPU::VGPR_16RegClass);
-
-    auto NewMI = BuildMI(*MBB, Inst, DL, get(AMDGPU::REG_SEQUENCE), ResultReg);
-    switch (Inst.getOpcode()) {
-    case AMDGPU::S_PACK_LL_B32_B16:
-      NewMI
-          .addReg(SrcReg0, {},
-                  isSrc0Reg16 ? AMDGPU::NoSubRegister : AMDGPU::lo16)
-          .addImm(AMDGPU::lo16)
-          .addReg(SrcReg1, {},
-                  isSrc1Reg16 ? AMDGPU::NoSubRegister : AMDGPU::lo16)
-          .addImm(AMDGPU::hi16);
-      break;
-    case AMDGPU::S_PACK_LH_B32_B16:
-      NewMI
-          .addReg(SrcReg0, {},
-                  isSrc0Reg16 ? AMDGPU::NoSubRegister : AMDGPU::lo16)
-          .addImm(AMDGPU::lo16)
-          .addReg(SrcReg1, {}, AMDGPU::hi16)
-          .addImm(AMDGPU::hi16);
-      break;
-    case AMDGPU::S_PACK_HL_B32_B16:
-      NewMI.addReg(SrcReg0, {}, AMDGPU::hi16)
-          .addImm(AMDGPU::lo16)
-          .addReg(SrcReg1, {},
-                  isSrc1Reg16 ? AMDGPU::NoSubRegister : AMDGPU::lo16)
-          .addImm(AMDGPU::hi16);
-      break;
-    case AMDGPU::S_PACK_HH_B32_B16:
-      NewMI.addReg(SrcReg0, {}, AMDGPU::hi16)
-          .addImm(AMDGPU::lo16)
-          .addReg(SrcReg1, {}, AMDGPU::hi16)
-          .addImm(AMDGPU::hi16);
-      break;
-    default:
-      llvm_unreachable("unhandled s_pack_* instruction");
-    }
-
-    MachineOperand &Dest = Inst.getOperand(0);
-    MRI.replaceRegWith(Dest.getReg(), ResultReg);
-    addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist);
-    return;
-  }
-
-  switch (Inst.getOpcode()) {
-  case AMDGPU::S_PACK_LL_B32_B16: {
-    Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-    Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-
-    // FIXME: Can do a lot better if we know the high bits of src0 or src1 are
-    // 0.
-    BuildMI(*MBB, Inst, DL, get(AMDGPU::V_MOV_B32_e32), ImmReg)
-      .addImm(0xffff);
-
-    BuildMI(*MBB, Inst, DL, get(AMDGPU::V_AND_B32_e64), TmpReg)
-      .addReg(ImmReg, RegState::Kill)
-      .add(Src0);
-
-    BuildMI(*MBB, Inst, DL, get(AMDGPU::V_LSHL_OR_B32_e64), ResultReg)
-      .add(Src1)
-      .addImm(16)
-      .addReg(TmpReg, RegState::Kill);
-    break;
-  }
-  case AMDGPU::S_PACK_LH_B32_B16: {
-    Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-    BuildMI(*MBB, Inst, DL, get(AMDGPU::V_MOV_B32_e32), ImmReg)
-      .addImm(0xffff);
-    BuildMI(*MBB, Inst, DL, get(AMDGPU::V_BFI_B32_e64), ResultReg)
-      .addReg(ImmReg, RegState::Kill)
-      .add(Src0)
-      .add(Src1);
-    break;
-  }
-  case AMDGPU::S_PACK_HL_B32_B16: {
-    Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-    BuildMI(*MBB, Inst, DL, get(AMDGPU::V_LSHRREV_B32_e64), TmpReg)
-        .addImm(16)
-        .add(Src0);
-    BuildMI(*MBB, Inst, DL, get(AMDGPU::V_LSHL_OR_B32_e64), ResultReg)
-        .add(Src1)
-        .addImm(16)
-        .addReg(TmpReg, RegState::Kill);
-    break;
-  }
-  case AMDGPU::S_PACK_HH_B32_B16: {
-    Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-    Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
-    BuildMI(*MBB, Inst, DL, get(AMDGPU::V_LSHRREV_B32_e64), TmpReg)
-      .addImm(16)
-      .add(Src0);
-    BuildMI(*MBB, Inst, DL, get(AMDGPU::V_MOV_B32_e32), ImmReg)
-      .addImm(0xffff0000);
-    BuildMI(*MBB, Inst, DL, get(AMDGPU::V_AND_OR_B32_e64), ResultReg)
-      .add(Src1)
-      .addReg(ImmReg, RegState::Kill)
-      .addReg(TmpReg, RegState::Kill);
-    break;
-  }
-  default:
-    llvm_unreachable("unhandled s_pack_* instruction");
-  }
-
-  MachineOperand &Dest = Inst.getOperand(0);
-  MRI.replaceRegWith(Dest.getReg(), ResultReg);
-  addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist);
-}
-
-void SIInstrInfo::addSCCDefUsersToVALUWorklist(const MachineOperand &Op,
-                                               MachineInstr &SCCDefInst,
-                                               SIInstrWorklist &Worklist,
-                                               Register NewCond) const {
-
-  // Ensure that def inst defines SCC, which is still live.
-  assert(Op.isReg() && Op.getReg() == AMDGPU::SCC && Op.isDef() &&
-         !Op.isDead() && Op.getParent() == &SCCDefInst);
-  SmallVector<MachineInstr *, 4> CopyToDelete;
-  // This assumes that all the users of SCC are in the same block
-  // as the SCC def.
-  for (MachineInstr &MI : // Skip the def inst itself.
-       make_range(std::next(MachineBasicBlock::iterator(SCCDefInst)),
-                  SCCDefInst.getParent()->end())) {
-    // Check if SCC is used first.
-    int SCCIdx = MI.findRegisterUseOperandIdx(AMDGPU::SCC, &RI, false);
-    if (SCCIdx != -1) {
-      if (MI.isCopy()) {
-        MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
-        Register DestReg = MI.getOperand(0).getReg();
-
-        MRI.replaceRegWith(DestReg, NewCond);
-        CopyToDelete.push_back(&MI);
-      } else {
-
-        if (NewCond.isValid())
-          MI.getOperand(SCCIdx).setReg(NewCond);
-
-        Worklist.insert(&MI);
-      }
-    }
-    // Exit if we find another SCC def.
-    if (MI.findRegisterDefOperandIdx(AMDGPU::SCC, &RI, false, false) != -1)
-      break;
-  }
-  for (auto &Copy : CopyToDelete)
-    Copy->eraseFromParent();
-}
-
-// Instructions that use SCC may be converted to VALU instructions. When that
-// happens, the SCC register is changed to VCC_LO. The instruction that defines
-// SCC must be changed to an instruction that defines VCC. This function makes
-// sure that the instruction that defines SCC is added to the moveToVALU
-// worklist.
-void SIInstrInfo::addSCCDefsToVALUWorklist(MachineInstr *SCCUseInst,
-                                           SIInstrWorklist &Worklist) const {
-  // Look for a preceding instruction that either defines VCC or SCC. If VCC
-  // then there is nothing to do because the defining instruction has been
-  // converted to a VALU already. If SCC then that instruction needs to be
-  // converted to a VALU.
-  for (MachineInstr &MI :
-       make_range(std::next(MachineBasicBlock::reverse_iterator(SCCUseInst)),
-                  SCCUseInst->getParent()->rend())) {
-    if (MI.modifiesRegister(AMDGPU::VCC, &RI))
-      break;
-    if (MI.definesRegister(AMDGPU::SCC, &RI)) {
-      Worklist.insert(&MI);
-      break;
-    }
-  }
-}
-
-const TargetRegisterClass *SIInstrInfo::getDestEquivalentVGPRClass(
-  const MachineInstr &Inst) const {
-  const TargetRegisterClass *NewDstRC = getOpRegClass(Inst, 0);
-
-  switch (Inst.getOpcode()) {
-  // For target instructions, getOpRegClass just returns the virtual register
-  // class associated with the operand, so we need to find an equivalent VGPR
-  // register class in order to move the instruction to the VALU.
-  case AMDGPU::COPY:
-  case AMDGPU::PHI:
-  case AMDGPU::REG_SEQUENCE:
-  case AMDGPU::INSERT_SUBREG:
-  case AMDGPU::WQM:
-  case AMDGPU::SOFT_WQM:
-  case AMDGPU::STRICT_WWM:
-  case AMDGPU::STRICT_WQM: {
-    const TargetRegisterClass *SrcRC = getOpRegClass(Inst, 1);
-    if (RI.isAGPRClass(SrcRC)) {
-      if (RI.isAGPRClass(NewDstRC))
-        return nullptr;
-
-      switch (Inst.getOpcode()) {
-      case AMDGPU::PHI:
-      case AMDGPU::REG_SEQUENCE:
-      case AMDGPU::INSERT_SUBREG:
-        NewDstRC = RI.getEquivalentAGPRClass(NewDstRC);
-        break;
-      default:
-        NewDstRC = RI.getEquivalentVGPRClass(NewDstRC);
-      }
-
-      if (!NewDstRC)
-        return nullptr;
-    } else {
-      if (RI.isVGPRClass(NewDstRC) || NewDstRC == &AMDGPU::VReg_1RegClass)
-        return nullptr;
-
-      NewDstRC = RI.getEquivalentVGPRClass(NewDstRC);
-      if (!NewDstRC)
-        return nullptr;
-    }
-
-    return NewDstRC;
-  }
-  default:
-    return NewDstRC;
-  }
-}
-
-// Find the one SGPR operand we are allowed to use.
-Register SIInstrInfo::findUsedSGPR(const MachineInstr &MI,
-                                   int OpIndices[3]) const {
-  const MCInstrDesc &Desc = MI.getDesc();
-
-  // Find the one SGPR operand we are allowed to use.
-  //
-  // First we need to consider the instruction's operand requirements before
-  // legalizing. Some operands are required to be SGPRs, such as implicit uses
-  // of VCC, but we are still bound by the constant bus requirement to only use
-  // one.
-  //
-  // If the operand's class is an SGPR, we can never move it.
-
-  Register SGPRReg = findImplicitSGPRRead(MI);
-  if (SGPRReg)
-    return SGPRReg;
-
-  Register UsedSGPRs[3] = {Register()};
-  const MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
-
-  for (unsigned i = 0; i < 3; ++i) {
-    int Idx = OpIndices[i];
-    if (Idx == -1)
-      break;
-
-    const MachineOperand &MO = MI.getOperand(Idx);
-    if (!MO.isReg())
-      continue;
-
-    // Is this operand statically required to be an SGPR based on the operand
-    // constraints?
-    const TargetRegisterClass *OpRC =
-        RI.getRegClass(getOpRegClassID(Desc.operands()[Idx]));
-    bool IsRequiredSGPR = RI.isSGPRClass(OpRC);
-    if (IsRequiredSGPR)
-      return MO.getReg();
-
-    // If this could be a VGPR or an SGPR, Check the dynamic register class.
-    Register Reg = MO.getReg();
-    const TargetRegisterClass *RegRC = MRI.getRegClass(Reg);
-    if (RI.isSGPRClass(RegRC))
-      UsedSGPRs[i] = Reg;
-  }
-
-  // We don't have a required SGPR operand, so we have a bit more freedom in
-  // selecting operands to move.
-
-  // Try to select the most used SGPR. If an SGPR is equal to one of the
-  // others, we choose that.
-  //
-  // e.g.
-  // V_FMA_F32 v0, s0, s0, s0 -> No moves
-  // V_FMA_F32 v0, s0, s1, s0 -> Move s1
-
-  // TODO: If some of the operands are 64-bit SGPRs and some 32, we should
-  // prefer those.
-
-  if (UsedSGPRs[0]) {
-    if (UsedSGPRs[0] == UsedSGPRs[1] || UsedSGPRs[0] == UsedSGPRs[2])
-      SGPRReg = UsedSGPRs[0];
-  }
-
-  if (!SGPRReg && UsedSGPRs[1]) {
-    if (UsedSGPRs[1] == UsedSGPRs[2])
-      SGPRReg = UsedSGPRs[1];
-  }
-
-  return SGPRReg;
-}
-
-MachineOperand *SIInstrInfo::getNamedOperand(MachineInstr &MI,
-                                             AMDGPU::OpName OperandName) const {
-  if (OperandName == AMDGPU::OpName::NUM_OPERAND_NAMES)
-    return nullptr;
-
-  int Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), OperandName);
-  if (Idx == -1)
-    return nullptr;
-
-  return &MI.getOperand(Idx);
-}
-
-uint64_t SIInstrInfo::getDefaultRsrcDataFormat() const {
-  if (ST.getGeneration() >= AMDGPUSubtarget::GFX10) {
-    int64_t Format = ST.getGeneration() >= AMDGPUSubtarget::GFX11
-                         ? (int64_t)AMDGPU::UfmtGFX11::UFMT_32_FLOAT
-                         : (int64_t)AMDGPU::UfmtGFX10::UFMT_32_FLOAT;
-    return (Format << 44) |
-           (1ULL << 56) | // RESOURCE_LEVEL = 1
-           (3ULL << 60); // OOB_SELECT = 3
-  }
-
-  uint64_t RsrcDataFormat = AMDGPU::RSRC_DATA_FORMAT;
-  if (ST.isAmdHsaOS()) {
-    // Set ATC = 1. GFX9 doesn't have this bit.
-    if (ST.getGeneration() <= AMDGPUSubtarget::VOLCANIC_ISLANDS)
-      RsrcDataFormat |= (1ULL << 56);
-
-    // Set MTYPE = 2 (MTYPE_UC = uncached). GFX9 doesn't have this.
-    // BTW, it disables TC L2 and therefore decreases performance.
-    if (ST.getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS)
-      RsrcDataFormat |= (2ULL << 59);
-  }
-
-  return RsrcDataFormat;
-}
-
-uint64_t SIInstrInfo::getScratchRsrcWords23() const {
-  uint64_t Rsrc23 = getDefaultRsrcDataFormat() |
-                    AMDGPU::RSRC_TID_ENABLE |
-                    0xffffffff; // Size;
-
-  // GFX9 doesn't have ELEMENT_SIZE.
-  if (ST.getGeneration() <= AMDGPUSubtarget::VOLCANIC_ISLANDS) {
-    uint64_t EltSizeValue = Log2_32(ST.getMaxPrivateElementSize(true)) - 1;
-    Rsrc23 |= EltSizeValue << AMDGPU::RSRC_ELEMENT_SIZE_SHIFT;
-  }
-
-  // IndexStride = 64 / 32.
-  uint64_t IndexStride = ST.isWave64() ? 3 : 2;
-  Rsrc23 |= IndexStride << AMDGPU::RSRC_INDEX_STRIDE_SHIFT;
-
-  // If TID_ENABLE is set, DATA_FORMAT specifies stride bits [14:17].
-  // Clear them unless we want a huge stride.
-  if (ST.getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS &&
-      ST.getGeneration() <= AMDGPUSubtarget::GFX9)
-    Rsrc23 &= ~AMDGPU::RSRC_DATA_FORMAT;
-
-  return Rsrc23;
-}
-
-bool SIInstrInfo::isLowLatencyInstruction(const MachineInstr &MI) const {
-  unsigned Opc = MI.getOpcode();
-
-  return isSMRD(Opc);
-}
-
-bool SIInstrInfo::isHighLatencyDef(int Opc) const {
-  return get(Opc).mayLoad() &&
-         (isMUBUF(Opc) || isMTBUF(Opc) || isMIMG(Opc) || isFLAT(Opc));
-}
-
-Register SIInstrInfo::isStackAccess(const MachineInstr &MI,
-                                    int &FrameIndex) const {
-  const MachineOperand *Addr = getNamedOperand(MI, AMDGPU::OpName::vaddr);
-  if (!Addr || !Addr->isFI())
-    return Register();
-
-  assert(!MI.memoperands_empty() &&
-         (*MI.memoperands_begin())->getAddrSpace() == AMDGPUAS::PRIVATE_ADDRESS);
-
-  FrameIndex = Addr->getIndex();
-  return getNamedOperand(MI, AMDGPU::OpName::vdata)->getReg();
-}
-
-Register SIInstrInfo::isSGPRStackAccess(const MachineInstr &MI,
-                                        int &FrameIndex) const {
-  const MachineOperand *Addr = getNamedOperand(MI, AMDGPU::OpName::addr);
-  assert(Addr && Addr->isFI());
-  FrameIndex = Addr->getIndex();
-  return getNamedOperand(MI, AMDGPU::OpName::data)->getReg();
-}
-
-Register SIInstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
-                                          int &FrameIndex) const {
-  if (!MI.mayLoad())
-    return Register();
-
-  if (isMUBUF(MI) || isVGPRSpill(MI))
-    return isStackAccess(MI, FrameIndex);
-
-  if (isSGPRSpill(MI))
-    return isSGPRStackAccess(MI, FrameIndex);
-
-  return Register();
-}
-
-Register SIInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
-                                         int &FrameIndex) const {
-  if (!MI.mayStore())
-    return Register();
-
-  if (isMUBUF(MI) || isVGPRSpill(MI))
-    return isStackAccess(MI, FrameIndex);
-
-  if (isSGPRSpill(MI))
-    return isSGPRStackAccess(MI, FrameIndex);
-
-  return Register();
-}
-
-unsigned SIInstrInfo::getInstBundleSize(const MachineInstr &MI) const {
-  unsigned Size = 0;
-  MachineBasicBlock::const_instr_iterator I = MI.getIterator();
-  MachineBasicBlock::const_instr_iterator E = MI.getParent()->instr_end();
-  while (++I != E && I->isInsideBundle()) {
-    assert(!I->isBundle() && "No nested bundle!");
-    Size += getInstSizeInBytes(*I);
-  }
-
-  return Size;
-}
-
-unsigned SIInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
-  unsigned Opc = MI.getOpcode();
-  const MCInstrDesc &Desc = getMCOpcodeFromPseudo(Opc);
-  unsigned DescSize = Desc.getSize();
-
-  // If we have a definitive size, we can use it. Otherwise we need to inspect
-  // the operands to know the size.
-  if (isFixedSize(MI)) {
-    unsigned Size = DescSize;
-
-    // If we hit the buggy offset, an extra nop will be inserted in MC so
-    // estimate the worst case.
-    if (MI.isBranch() && ST.hasOffset3fBug())
-      Size += 4;
-
-    return Size;
-  }
-
-  // Instructions may have a 32-bit literal encoded after them. Check
-  // operands that could ever be literals.
-  if (isVALU(MI) || isSALU(MI)) {
-    if (isDPP(MI))
-      return DescSize;
-    bool HasLiteral = false;
-    unsigned LiteralSize = 4;
-    for (int I = 0, E = MI.getNumExplicitOperands(); I != E; ++I) {
-      const MachineOperand &Op = MI.getOperand(I);
-      const MCOperandInfo &OpInfo = Desc.operands()[I];
-      if (!Op.isReg() && !isInlineConstant(Op, OpInfo)) {
-        HasLiteral = true;
-        if (ST.has64BitLiterals()) {
-          switch (OpInfo.OperandType) {
-          default:
-            break;
-          case AMDGPU::OPERAND_REG_IMM_FP64:
-            if (!AMDGPU::isValid32BitLiteral(Op.getImm(), true))
-              LiteralSize = 8;
-            break;
-          case AMDGPU::OPERAND_REG_IMM_INT64:
-            // Signed 64-bit operand: 32-bit literal is valid if the value
-            // fits in a signed 32-bit integer (sign-extended by HW).
-            if (!Op.isImm() || !isInt<32>(Op.getImm()))
-              LiteralSize = 8;
-            break;
-          case AMDGPU::OPERAND_REG_IMM_B64:
-            // Unsigned 64-bit operand: 32-bit literal is valid if the value
-            // fits in an unsigned 32-bit integer (zero-extended by HW).
-            if (!Op.isImm() || !isUInt<32>(Op.getImm()))
-              LiteralSize = 8;
-            break;
-          }
-        }
-        break;
-      }
-    }
-    return HasLiteral ? DescSize + LiteralSize : DescSize;
-  }
-
-  // Check whether we have extra NSA words.
-  if (isMIMG(MI)) {
-    int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0);
-    if (VAddr0Idx < 0)
-      return 8;
-
-    int RSrcIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::srsrc);
-    return 8 + 4 * ((RSrcIdx - VAddr0Idx + 2) / 4);
-  }
-
-  switch (Opc) {
-  case TargetOpcode::BUNDLE:
-    return getInstBundleSize(MI);
-  case TargetOpcode::INLINEASM:
-  case TargetOpcode::INLINEASM_BR: {
-    const MachineFunction *MF = MI.getMF();
-    const char *AsmStr = MI.getOperand(0).getSymbolName();
-    return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo(), &ST);
-  }
-  default:
-    if (MI.isMetaInstruction())
-      return 0;
-
-    // If D16 Pseudo inst, get correct MC code size
-    const auto *D16Info = AMDGPU::getT16D16Helper(Opc);
-    if (D16Info) {
-      // Assume d16_lo/hi inst are always in same size
-      unsigned LoInstOpcode = D16Info->LoOp;
-      const MCInstrDesc &Desc = getMCOpcodeFromPseudo(LoInstOpcode);
-      DescSize = Desc.getSize();
-    }
-
-    // If FMA Pseudo inst, get correct MC code size
-    if (Opc == AMDGPU::V_FMA_MIX_F16_t16 || Opc == AMDGPU::V_FMA_MIX_BF16_t16) {
-      // All potential lowerings are the same size; arbitrarily pick one.
-      const MCInstrDesc &Desc = getMCOpcodeFromPseudo(AMDGPU::V_FMA_MIXLO_F16);
-      DescSize = Desc.getSize();
-    }
-
-    return DescSize;
-  }
-}
-
-bool SIInstrInfo::mayAccessFlatAddressSpace(const MachineInstr &MI) const {
-  if (!isFLAT(MI))
-    return false;
-
-  if (MI.memoperands_empty())
-    return true;
-
-  for (const MachineMemOperand *MMO : MI.memoperands()) {
-    if (MMO->getAddrSpace() == AMDGPUAS::FLAT_ADDRESS)
-      return true;
-  }
-  return false;
-}
-
-ArrayRef<std::pair<int, const char *>>
-SIInstrInfo::getSerializableTargetIndices() const {
-  static const std::pair<int, const char *> TargetIndices[] = {
-      {AMDGPU::TI_CONSTDATA_START, "amdgpu-constdata-start"},
-      {AMDGPU::TI_SCRATCH_RSRC_DWORD0, "amdgpu-scratch-rsrc-dword0"},
-      {AMDGPU::TI_SCRATCH_RSRC_DWORD1, "amdgpu-scratch-rsrc-dword1"},
-      {AMDGPU::TI_SCRATCH_RSRC_DWORD2, "amdgpu-scratch-rsrc-dword2"},
-      {AMDGPU::TI_SCRATCH_RSRC_DWORD3, "amdgpu-scratch-rsrc-dword3"}};
-  return ArrayRef(TargetIndices);
-}
-
-/// This is used by the post-RA scheduler (SchedulePostRAList.cpp).  The
-/// post-RA version of misched uses CreateTargetMIHazardRecognizer.
-ScheduleHazardRecognizer *
-SIInstrInfo::CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II,
-                                            const ScheduleDAG *DAG) const {
-  return new GCNHazardRecognizer(DAG->MF);
-}
-
-/// This is the hazard recognizer used at -O0 by the PostRAHazardRecognizer
-/// pass.
-ScheduleHazardRecognizer *
-SIInstrInfo::CreateTargetPostRAHazardRecognizer(const MachineFunction &MF,
-                                                MachineLoopInfo *MLI) const {
-  return new GCNHazardRecognizer(MF, MLI);
-}
-
-// Called during:
-// - pre-RA scheduling and post-RA scheduling
-ScheduleHazardRecognizer *
-SIInstrInfo::CreateTargetMIHazardRecognizer(const InstrItineraryData *II,
-                                            const ScheduleDAGMI *DAG) const {
-  // Borrowed from Arm Target
-  // We would like to restrict this hazard recognizer to only
-  // post-RA scheduling; we can tell that we're post-RA because we don't
-  // track VRegLiveness.
-  if (!DAG->hasVRegLiveness())
-    return new GCNHazardRecognizer(DAG->MF);
-  return TargetInstrInfo::CreateTargetMIHazardRecognizer(II, DAG);
-}
-
-std::pair<unsigned, unsigned>
-SIInstrInfo::decomposeMachineOperandsTargetFlags(unsigned TF) const {
-  return std::pair(TF & MO_MASK, TF & ~MO_MASK);
-}
-
-ArrayRef<std::pair<unsigned, const char *>>
-SIInstrInfo::getSerializableDirectMachineOperandTargetFlags() const {
-  static const std::pair<unsigned, const char *> TargetFlags[] = {
-      {MO_GOTPCREL, "amdgpu-gotprel"},
-      {MO_GOTPCREL32_LO, "amdgpu-gotprel32-lo"},
-      {MO_GOTPCREL32_HI, "amdgpu-gotprel32-hi"},
-      {MO_GOTPCREL64, "amdgpu-gotprel64"},
-      {MO_REL32_LO, "amdgpu-rel32-lo"},
-      {MO_REL32_HI, "amdgpu-rel32-hi"},
-      {MO_REL64, "amdgpu-rel64"},
-      {MO_ABS32_LO, "amdgpu-abs32-lo"},
-      {MO_ABS32_HI, "amdgpu-abs32-hi"},
-      {MO_ABS64, "amdgpu-abs64"},
-  };
-
-  return ArrayRef(TargetFlags);
-}
-
-ArrayRef<std::pair<MachineMemOperand::Flags, const char *>>
-SIInstrInfo::getSerializableMachineMemOperandTargetFlags() const {
-  static const std::pair<MachineMemOperand::Flags, const char *> TargetFlags[] =
-      {
-          {MONoClobber, "amdgpu-noclobber"},
-          {MOLastUse, "amdgpu-last-use"},
-          {MOCooperative, "amdgpu-cooperative"},
-          {MOThreadPrivate, "amdgpu-thread-private"},
-      };
-
-  return ArrayRef(TargetFlags);
-}
-
-unsigned SIInstrInfo::getLiveRangeSplitOpcode(Register SrcReg,
-                                              const MachineFunction &MF) const {
-  const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
-  assert(SrcReg.isVirtual());
-  if (MFI->checkFlag(SrcReg, AMDGPU::VirtRegFlag::WWM_REG))
-    return AMDGPU::WWM_COPY;
-
-  return AMDGPU::COPY;
-}
-
-bool SIInstrInfo::canAddToBBProlog(const MachineInstr &MI) const {
-  uint32_t Opcode = MI.getOpcode();
-  // Check if it is SGPR spill or wwm-register spill Opcode.
-  if (isSGPRSpill(Opcode) || isWWMRegSpillOpcode(Opcode))
-    return true;
-
-  const MachineFunction *MF = MI.getMF();
-  const MachineRegisterInfo &MRI = MF->getRegInfo();
-  const SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>();
-
-  // See if this is Liverange split instruction inserted for SGPR or
-  // wwm-register. The implicit def inserted for wwm-registers should also be
-  // included as they can appear at the bb begin.
-  bool IsLRSplitInst = MI.getFlag(MachineInstr::LRSplit);
-  if (!IsLRSplitInst && Opcode != AMDGPU::IMPLICIT_DEF)
-    return false;
-
-  Register Reg = MI.getOperand(0).getReg();
-  if (RI.isSGPRClass(RI.getRegClassForReg(MRI, Reg)))
-    return IsLRSplitInst;
-
-  return MFI->isWWMReg(Reg);
-}
-
-bool SIInstrInfo::isBasicBlockPrologue(const MachineInstr &MI,
-                                       Register Reg) const {
-  // We need to handle instructions which may be inserted during register
-  // allocation to handle the prolog. The initial prolog instruction may have
-  // been separated from the start of the block by spills and copies inserted
-  // needed by the prolog. However, the insertions for scalar registers can
-  // always be placed at the BB top as they are independent of the exec mask
-  // value.
-  bool IsNullOrVectorRegister = true;
-  if (Reg) {
-    const MachineFunction *MF = MI.getMF();
-    const MachineRegisterInfo &MRI = MF->getRegInfo();
-    IsNullOrVectorRegister = !RI.isSGPRClass(RI.getRegClassForReg(MRI, Reg));
-  }
-
-  return IsNullOrVectorRegister &&
-         (canAddToBBProlog(MI) ||
-          (!MI.isTerminator() && MI.getOpcode() != AMDGPU::COPY &&
-           MI.modifiesRegister(AMDGPU::EXEC, &RI)));
-}
-
-MachineInstrBuilder
-SIInstrInfo::getAddNoCarry(MachineBasicBlock &MBB,
-                           MachineBasicBlock::iterator I,
-                           const DebugLoc &DL,
-                           Register DestReg) const {
-  if (ST.hasAddNoCarryInsts())
-    return BuildMI(MBB, I, DL, get(AMDGPU::V_ADD_U32_e64), DestReg);
-
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-  Register UnusedCarry = MRI.createVirtualRegister(RI.getBoolRC());
-  MRI.setRegAllocationHint(UnusedCarry, 0, RI.getVCC());
-
-  return BuildMI(MBB, I, DL, get(AMDGPU::V_ADD_CO_U32_e64), DestReg)
-           .addReg(UnusedCarry, RegState::Define | RegState::Dead);
-}
-
-MachineInstrBuilder SIInstrInfo::getAddNoCarry(MachineBasicBlock &MBB,
-                                               MachineBasicBlock::iterator I,
-                                               const DebugLoc &DL,
-                                               Register DestReg,
-                                               RegScavenger &RS) const {
-  if (ST.hasAddNoCarryInsts())
-    return BuildMI(MBB, I, DL, get(AMDGPU::V_ADD_U32_e32), DestReg);
-
-  // If available, prefer to use vcc.
-  Register UnusedCarry = !RS.isRegUsed(AMDGPU::VCC)
-                             ? Register(RI.getVCC())
-                             : RS.scavengeRegisterBackwards(
-                                   *RI.getBoolRC(), I, /* RestoreAfter */ false,
-                                   0, /* AllowSpill */ false);
-
-  // TODO: Users need to deal with this.
-  if (!UnusedCarry.isValid())
-    return MachineInstrBuilder();
-
-  return BuildMI(MBB, I, DL, get(AMDGPU::V_ADD_CO_U32_e64), DestReg)
-           .addReg(UnusedCarry, RegState::Define | RegState::Dead);
-}
-
-bool SIInstrInfo::isKillTerminator(unsigned Opcode) {
-  switch (Opcode) {
-  case AMDGPU::SI_KILL_F32_COND_IMM_TERMINATOR:
-  case AMDGPU::SI_KILL_I1_TERMINATOR:
-    return true;
-  default:
-    return false;
-  }
-}
-
-const MCInstrDesc &SIInstrInfo::getKillTerminatorFromPseudo(unsigned Opcode) const {
-  switch (Opcode) {
-  case AMDGPU::SI_KILL_F32_COND_IMM_PSEUDO:
-    return get(AMDGPU::SI_KILL_F32_COND_IMM_TERMINATOR);
-  case AMDGPU::SI_KILL_I1_PSEUDO:
-    return get(AMDGPU::SI_KILL_I1_TERMINATOR);
-  default:
-    llvm_unreachable("invalid opcode, expected SI_KILL_*_PSEUDO");
-  }
-}
-
-bool SIInstrInfo::isLegalMUBUFImmOffset(unsigned Imm) const {
-  return Imm <= getMaxMUBUFImmOffset(ST);
-}
-
-unsigned SIInstrInfo::getMaxMUBUFImmOffset(const GCNSubtarget &ST) {
-  // GFX12 field is non-negative 24-bit signed byte offset.
-  const unsigned OffsetBits =
-      ST.getGeneration() >= AMDGPUSubtarget::GFX12 ? 23 : 12;
-  return (1 << OffsetBits) - 1;
-}
-
-void SIInstrInfo::fixImplicitOperands(MachineInstr &MI) const {
-  if (!ST.isWave32())
-    return;
-
-  if (MI.isInlineAsm())
-    return;
-
-  if (MI.getNumOperands() < MI.getNumExplicitOperands())
-    return;
-
-  for (auto &Op : MI.implicit_operands()) {
-    if (Op.isReg() && Op.getReg() == AMDGPU::VCC)
-      Op.setReg(AMDGPU::VCC_LO);
-  }
-}
-
-bool SIInstrInfo::isBufferSMRD(const MachineInstr &MI) const {
-  if (!isSMRD(MI))
-    return false;
-
-  // Check that it is using a buffer resource.
-  int Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::sbase);
-  if (Idx == -1) // e.g. s_memtime
-    return false;
-
-  const int16_t RCID = getOpRegClassID(MI.getDesc().operands()[Idx]);
-  return RI.getRegClass(RCID)->hasSubClassEq(&AMDGPU::SGPR_128RegClass);
-}
-
-// Given Imm, split it into the values to put into the SOffset and ImmOffset
-// fields in an MUBUF instruction. Return false if it is not possible (due to a
-// hardware bug needing a workaround).
-//
-// The required alignment ensures that individual address components remain
-// aligned if they are aligned to begin with. It also ensures that additional
-// offsets within the given alignment can be added to the resulting ImmOffset.
-bool SIInstrInfo::splitMUBUFOffset(uint32_t Imm, uint32_t &SOffset,
-                                   uint32_t &ImmOffset, Align Alignment) const {
-  const uint32_t MaxOffset = SIInstrInfo::getMaxMUBUFImmOffset(ST);
-  const uint32_t MaxImm = alignDown(MaxOffset, Alignment.value());
-  uint32_t Overflow = 0;
-
-  if (Imm > MaxImm) {
-    if (Imm <= MaxImm + 64) {
-      // Use an SOffset inline constant for 4..64
-      Overflow = Imm - MaxImm;
-      Imm = MaxImm;
-    } else {
-      // Try to keep the same value in SOffset for adjacent loads, so that
-      // the corresponding register contents can be re-used.
-      //
-      // Load values with all low-bits (except for alignment bits) set into
-      // SOffset, so that a larger range of values can be covered using
-      // s_movk_i32.
-      //
-      // Atomic operations fail to work correctly when individual address
-      // components are unaligned, even if their sum is aligned.
-      uint32_t High = (Imm + Alignment.value()) & ~MaxOffset;
-      uint32_t Low = (Imm + Alignment.value()) & MaxOffset;
-      Imm = Low;
-      Overflow = High - Alignment.value();
-    }
-  }
-
-  if (Overflow > 0) {
-    // There is a hardware bug in SI and CI which prevents address clamping in
-    // MUBUF instructions from working correctly with SOffsets. The immediate
-    // offset is unaffected.
-    if (ST.getGeneration() <= AMDGPUSubtarget::SEA_ISLANDS)
-      return false;
-
-    // It is not possible to set immediate in SOffset field on some targets.
-    if (ST.hasRestrictedSOffset())
-      return false;
-  }
-
-  ImmOffset = Imm;
-  SOffset = Overflow;
-  return true;
-}
-
-// Depending on the used address space and instructions, some immediate offsets
-// are allowed and some are not.
-// Pre-GFX12, flat instruction offsets can only be non-negative, global and
-// scratch instruction offsets can also be negative. On GFX12, offsets can be
-// negative for all variants.
-//
-// There are several bugs related to these offsets:
-// On gfx10.1, flat instructions that go into the global address space cannot
-// use an offset.
-//
-// For scratch instructions, the address can be either an SGPR or a VGPR.
-// The following offsets can be used, depending on the architecture (x means
-// cannot be used):
-// +----------------------------+------+------+
-// | Address-Mode               | SGPR | VGPR |
-// +----------------------------+------+------+
-// | gfx9                       |      |      |
-// | negative, 4-aligned offset | x    | ok   |
-// | negative, unaligned offset | x    | ok   |
-// +----------------------------+------+------+
-// | gfx10                      |      |      |
-// | negative, 4-aligned offset | ok   | ok   |
-// | negative, unaligned offset | ok   | x    |
-// +----------------------------+------+------+
-// | gfx10.3                    |      |      |
-// | negative, 4-aligned offset | ok   | ok   |
-// | negative, unaligned offset | ok   | ok   |
-// +----------------------------+------+------+
-//
-// This function ignores the addressing mode, so if an offset cannot be used in
-// one addressing mode, it is considered illegal.
-bool SIInstrInfo::isLegalFLATOffset(int64_t Offset, unsigned AddrSpace,
-                                    uint64_t FlatVariant) const {
-  // TODO: Should 0 be special cased?
-  if (!ST.hasFlatInstOffsets())
-    return false;
-
-  if (ST.hasFlatSegmentOffsetBug() && FlatVariant == SIInstrFlags::FLAT &&
-      (AddrSpace == AMDGPUAS::FLAT_ADDRESS ||
-       AddrSpace == AMDGPUAS::GLOBAL_ADDRESS))
-    return false;
-
-  if (ST.hasNegativeUnalignedScratchOffsetBug() &&
-      FlatVariant == SIInstrFlags::FlatScratch && Offset < 0 &&
-      (Offset % 4) != 0) {
-    return false;
-  }
-
-  bool AllowNegative = allowNegativeFlatOffset(FlatVariant);
-  unsigned N = AMDGPU::getNumFlatOffsetBits(ST);
-  return isIntN(N, Offset) && (AllowNegative || Offset >= 0);
-}
-
-// See comment on SIInstrInfo::isLegalFLATOffset for what is legal and what not.
-std::pair<int64_t, int64_t>
-SIInstrInfo::splitFlatOffset(int64_t COffsetVal, unsigned AddrSpace,
-                             uint64_t FlatVariant) const {
-  int64_t RemainderOffset = COffsetVal;
-  int64_t ImmField = 0;
-
-  bool AllowNegative = allowNegativeFlatOffset(FlatVariant);
-  const unsigned NumBits = AMDGPU::getNumFlatOffsetBits(ST) - 1;
-
-  if (AllowNegative) {
-    // Use signed division by a power of two to truncate towards 0.
-    int64_t D = 1LL << NumBits;
-    RemainderOffset = (COffsetVal / D) * D;
-    ImmField = COffsetVal - RemainderOffset;
-
-    if (ST.hasNegativeUnalignedScratchOffsetBug() &&
-        FlatVariant == SIInstrFlags::FlatScratch && ImmField < 0 &&
-        (ImmField % 4) != 0) {
-      // Make ImmField a multiple of 4
-      RemainderOffset += ImmField % 4;
-      ImmField -= ImmField % 4;
-    }
-  } else if (COffsetVal >= 0) {
-    ImmField = COffsetVal & maskTrailingOnes<uint64_t>(NumBits);
-    RemainderOffset = COffsetVal - ImmField;
-  }
-
-  assert(isLegalFLATOffset(ImmField, AddrSpace, FlatVariant));
-  assert(RemainderOffset + ImmField == COffsetVal);
-  return {ImmField, RemainderOffset};
-}
-
-bool SIInstrInfo::allowNegativeFlatOffset(uint64_t FlatVariant) const {
-  if (ST.hasNegativeScratchOffsetBug() &&
-      FlatVariant == SIInstrFlags::FlatScratch)
-    return false;
-
-  return FlatVariant != SIInstrFlags::FLAT || AMDGPU::isGFX12Plus(ST);
-}
-
-static unsigned subtargetEncodingFamily(const GCNSubtarget &ST) {
-  switch (ST.getGeneration()) {
-  default:
-    break;
-  case AMDGPUSubtarget::SOUTHERN_ISLANDS:
-  case AMDGPUSubtarget::SEA_ISLANDS:
-    return SIEncodingFamily::SI;
-  case AMDGPUSubtarget::VOLCANIC_ISLANDS:
-  case AMDGPUSubtarget::GFX9:
-    return SIEncodingFamily::VI;
-  case AMDGPUSubtarget::GFX10:
-    return SIEncodingFamily::GFX10;
-  case AMDGPUSubtarget::GFX11:
-    return ST.hasGFX11_7Insts() ? SIEncodingFamily::GFX1170
-                                : SIEncodingFamily::GFX11;
-  case AMDGPUSubtarget::GFX12:
-    return ST.hasGFX1250Insts() ? SIEncodingFamily::GFX1250
-                                : SIEncodingFamily::GFX12;
-  case AMDGPUSubtarget::GFX13:
-    return SIEncodingFamily::GFX13;
-  }
-  llvm_unreachable("Unknown subtarget generation!");
-}
-
-bool SIInstrInfo::isAsmOnlyOpcode(int MCOp) const {
-  switch(MCOp) {
-  // These opcodes use indirect register addressing so
-  // they need special handling by codegen (currently missing).
-  // Therefore it is too risky to allow these opcodes
-  // to be selected by dpp combiner or sdwa peepholer.
-  case AMDGPU::V_MOVRELS_B32_dpp_gfx10:
-  case AMDGPU::V_MOVRELS_B32_sdwa_gfx10:
-  case AMDGPU::V_MOVRELD_B32_dpp_gfx10:
-  case AMDGPU::V_MOVRELD_B32_sdwa_gfx10:
-  case AMDGPU::V_MOVRELSD_B32_dpp_gfx10:
-  case AMDGPU::V_MOVRELSD_B32_sdwa_gfx10:
-  case AMDGPU::V_MOVRELSD_2_B32_dpp_gfx10:
-  case AMDGPU::V_MOVRELSD_2_B32_sdwa_gfx10:
-    return true;
-  default:
-    return false;
-  }
-}
-
-#define GENERATE_RENAMED_GFX9_CASES(OPCODE)                                    \
-  case OPCODE##_dpp:                                                           \
-  case OPCODE##_e32:                                                           \
-  case OPCODE##_e64:                                                           \
-  case OPCODE##_e64_dpp:                                                       \
-  case OPCODE##_sdwa:
-
-static bool isRenamedInGFX9(int Opcode) {
-  switch (Opcode) {
-    GENERATE_RENAMED_GFX9_CASES(AMDGPU::V_ADDC_U32)
-    GENERATE_RENAMED_GFX9_CASES(AMDGPU::V_ADD_CO_U32)
-    GENERATE_RENAMED_GFX9_CASES(AMDGPU::V_ADD_U32)
-    GENERATE_RENAMED_GFX9_CASES(AMDGPU::V_SUBBREV_U32)
-    GENERATE_RENAMED_GFX9_CASES(AMDGPU::V_SUBB_U32)
-    GENERATE_RENAMED_GFX9_CASES(AMDGPU::V_SUBREV_CO_U32)
-    GENERATE_RENAMED_GFX9_CASES(AMDGPU::V_SUBREV_U32)
-    GENERATE_RENAMED_GFX9_CASES(AMDGPU::V_SUB_CO_U32)
-    GENERATE_RENAMED_GFX9_CASES(AMDGPU::V_SUB_U32)
-  //
-  case AMDGPU::V_DIV_FIXUP_F16_gfx9_e64:
-  case AMDGPU::V_DIV_FIXUP_F16_gfx9_fake16_e64:
-  case AMDGPU::V_FMA_F16_gfx9_e64:
-  case AMDGPU::V_FMA_F16_gfx9_fake16_e64:
-  case AMDGPU::V_INTERP_P2_F16:
-  case AMDGPU::V_MAD_F16_e64:
-  case AMDGPU::V_MAD_U16_e64:
-  case AMDGPU::V_MAD_I16_e64:
-    return true;
-  default:
-    return false;
-  }
-}
-
-int SIInstrInfo::pseudoToMCOpcode(int Opcode) const {
-  assert(Opcode == (int)SIInstrInfo::getNonSoftWaitcntOpcode(Opcode) &&
-         "SIInsertWaitcnts should have promoted soft waitcnt instructions!");
-
-  unsigned Gen = subtargetEncodingFamily(ST);
-
-  if (ST.getGeneration() == AMDGPUSubtarget::GFX9 && isRenamedInGFX9(Opcode))
-    Gen = SIEncodingFamily::GFX9;
-
-  // Adjust the encoding family to GFX80 for D16 buffer instructions when the
-  // subtarget has UnpackedD16VMem feature.
-  // TODO: remove this when we discard GFX80 encoding.
-  if (ST.hasUnpackedD16VMem() && (get(Opcode).TSFlags & SIInstrFlags::D16Buf))
-    Gen = SIEncodingFamily::GFX80;
-
-  if (get(Opcode).TSFlags & SIInstrFlags::SDWA) {
-    switch (ST.getGeneration()) {
-    default:
-      Gen = SIEncodingFamily::SDWA;
-      break;
-    case AMDGPUSubtarget::GFX9:
-      Gen = SIEncodingFamily::SDWA9;
-      break;
-    case AMDGPUSubtarget::GFX10:
-      Gen = SIEncodingFamily::SDWA10;
-      break;
-    }
-  }
-
-  if (isMAI(Opcode)) {
-    int MFMAOp = AMDGPU::getMFMAEarlyClobberOp(Opcode);
-    if (MFMAOp != -1)
-      Opcode = MFMAOp;
-  }
-
-  int32_t MCOp = AMDGPU::getMCOpcode(Opcode, Gen);
-
-  if (MCOp == AMDGPU::INSTRUCTION_LIST_END && ST.hasGFX11_7Insts())
-    MCOp = AMDGPU::getMCOpcode(Opcode, SIEncodingFamily::GFX11);
-
-  if (MCOp == AMDGPU::INSTRUCTION_LIST_END && ST.hasGFX1250Insts())
-    MCOp = AMDGPU::getMCOpcode(Opcode, SIEncodingFamily::GFX12);
-
-  // -1 means that Opcode is already a native instruction.
-  if (MCOp == -1)
-    return Opcode;
-
-  if (ST.hasGFX90AInsts()) {
-    uint32_t NMCOp = AMDGPU::INSTRUCTION_LIST_END;
-    if (ST.hasGFX940Insts())
-      NMCOp = AMDGPU::getMCOpcode(Opcode, SIEncodingFamily::GFX940);
-    if (NMCOp == AMDGPU::INSTRUCTION_LIST_END)
-      NMCOp = AMDGPU::getMCOpcode(Opcode, SIEncodingFamily::GFX90A);
-    if (NMCOp == AMDGPU::INSTRUCTION_LIST_END)
-      NMCOp = AMDGPU::getMCOpcode(Opcode, SIEncodingFamily::GFX9);
-    if (NMCOp != AMDGPU::INSTRUCTION_LIST_END)
-      MCOp = NMCOp;
-  }
-
-  // INSTRUCTION_LIST_END means that Opcode is a pseudo instruction that has no
-  // encoding in the given subtarget generation.
-  if (MCOp == AMDGPU::INSTRUCTION_LIST_END)
-    return -1;
-
-  if (isAsmOnlyOpcode(MCOp))
-    return -1;
-
-  return MCOp;
-}
-
-static
-TargetInstrInfo::RegSubRegPair getRegOrUndef(const MachineOperand &RegOpnd) {
-  assert(RegOpnd.isReg());
-  return RegOpnd.isUndef() ? TargetInstrInfo::RegSubRegPair() :
-                             getRegSubRegPair(RegOpnd);
-}
-
-TargetInstrInfo::RegSubRegPair
-llvm::getRegSequenceSubReg(MachineInstr &MI, unsigned SubReg) {
-  assert(MI.isRegSequence());
-  for (unsigned I = 0, E = (MI.getNumOperands() - 1)/ 2; I < E; ++I)
-    if (MI.getOperand(1 + 2 * I + 1).getImm() == SubReg) {
-      auto &RegOp = MI.getOperand(1 + 2 * I);
-      return getRegOrUndef(RegOp);
-    }
-  return TargetInstrInfo::RegSubRegPair();
-}
-
-// Try to find the definition of reg:subreg in subreg-manipulation pseudos
-// Following a subreg of reg:subreg isn't supported
-static bool followSubRegDef(MachineInstr &MI,
-                            TargetInstrInfo::RegSubRegPair &RSR) {
-  if (!RSR.SubReg)
-    return false;
-  switch (MI.getOpcode()) {
-  default: break;
-  case AMDGPU::REG_SEQUENCE:
-    RSR = getRegSequenceSubReg(MI, RSR.SubReg);
-    return true;
-  // EXTRACT_SUBREG ins't supported as this would follow a subreg of subreg
-  case AMDGPU::INSERT_SUBREG:
-    if (RSR.SubReg == (unsigned)MI.getOperand(3).getImm())
-      // inserted the subreg we're looking for
-      RSR = getRegOrUndef(MI.getOperand(2));
-    else { // the subreg in the rest of the reg
-      auto R1 = getRegOrUndef(MI.getOperand(1));
-      if (R1.SubReg) // subreg of subreg isn't supported
-        return false;
-      RSR.Reg = R1.Reg;
-    }
-    return true;
-  }
-  return false;
-}
-
-MachineInstr *llvm::getVRegSubRegDef(const TargetInstrInfo::RegSubRegPair &P,
-                                     const MachineRegisterInfo &MRI) {
-  assert(MRI.isSSA());
-  if (!P.Reg.isVirtual())
-    return nullptr;
-
-  auto RSR = P;
-  auto *DefInst = MRI.getVRegDef(RSR.Reg);
-  while (auto *MI = DefInst) {
-    DefInst = nullptr;
-    switch (MI->getOpcode()) {
-    case AMDGPU::COPY:
-    case AMDGPU::V_MOV_B32_e32: {
-      auto &Op1 = MI->getOperand(1);
-      if (Op1.isReg() && Op1.getReg().isVirtual()) {
-        if (Op1.isUndef())
-          return nullptr;
-        RSR = getRegSubRegPair(Op1);
-        DefInst = MRI.getVRegDef(RSR.Reg);
-      }
-      break;
-    }
-    default:
-      if (followSubRegDef(*MI, RSR)) {
-        if (!RSR.Reg)
-          return nullptr;
-        DefInst = MRI.getVRegDef(RSR.Reg);
-      }
-    }
-    if (!DefInst)
-      return MI;
-  }
-  return nullptr;
-}
-
-bool llvm::execMayBeModifiedBeforeUse(const MachineRegisterInfo &MRI,
-                                      Register VReg,
-                                      const MachineInstr &DefMI,
-                                      const MachineInstr &UseMI) {
-  assert(MRI.isSSA() && "Must be run on SSA");
-
-  auto *TRI = MRI.getTargetRegisterInfo();
-  auto *DefBB = DefMI.getParent();
-
-  // Don't bother searching between blocks, although it is possible this block
-  // doesn't modify exec.
-  if (UseMI.getParent() != DefBB)
-    return true;
-
-  const int MaxInstScan = 20;
-  int NumInst = 0;
-
-  // Stop scan at the use.
-  auto E = UseMI.getIterator();
-  for (auto I = std::next(DefMI.getIterator()); I != E; ++I) {
-    if (I->isDebugInstr())
-      continue;
-
-    if (++NumInst > MaxInstScan)
-      return true;
-
-    if (I->modifiesRegister(AMDGPU::EXEC, TRI))
-      return true;
-  }
-
-  return false;
-}
-
-bool llvm::execMayBeModifiedBeforeAnyUse(const MachineRegisterInfo &MRI,
-                                         Register VReg,
-                                         const MachineInstr &DefMI) {
-  assert(MRI.isSSA() && "Must be run on SSA");
-
-  auto *TRI = MRI.getTargetRegisterInfo();
-  auto *DefBB = DefMI.getParent();
-
-  const int MaxUseScan = 10;
-  int NumUse = 0;
-
-  for (auto &Use : MRI.use_nodbg_operands(VReg)) {
-    auto &UseInst = *Use.getParent();
-    // Don't bother searching between blocks, although it is possible this block
-    // doesn't modify exec.
-    if (UseInst.getParent() != DefBB || UseInst.isPHI())
-      return true;
-
-    if (++NumUse > MaxUseScan)
-      return true;
-  }
-
-  if (NumUse == 0)
-    return false;
-
-  const int MaxInstScan = 20;
-  int NumInst = 0;
-
-  // Stop scan when we have seen all the uses.
-  for (auto I = std::next(DefMI.getIterator()); ; ++I) {
-    assert(I != DefBB->end());
-
-    if (I->isDebugInstr())
-      continue;
-
-    if (++NumInst > MaxInstScan)
-      return true;
-
-    for (const MachineOperand &Op : I->operands()) {
-      // We don't check reg masks here as they're used only on calls:
-      // 1. EXEC is only considered const within one BB
-      // 2. Call should be a terminator instruction if present in a BB
-
-      if (!Op.isReg())
-        continue;
-
-      Register Reg = Op.getReg();
-      if (Op.isUse()) {
-        if (Reg == VReg && --NumUse == 0)
-          return false;
-      } else if (TRI->regsOverlap(Reg, AMDGPU::EXEC))
-        return true;
-    }
-  }
-}
-
-MachineInstr *SIInstrInfo::createPHIDestinationCopy(
-    MachineBasicBlock &MBB, MachineBasicBlock::iterator LastPHIIt,
-    const DebugLoc &DL, Register Src, Register Dst) const {
-  auto Cur = MBB.begin();
-  if (Cur != MBB.end())
-    do {
-      if (!Cur->isPHI() && Cur->readsRegister(Dst, /*TRI=*/nullptr))
-        return BuildMI(MBB, Cur, DL, get(TargetOpcode::COPY), Dst).addReg(Src);
-      ++Cur;
-    } while (Cur != MBB.end() && Cur != LastPHIIt);
-
-  return TargetInstrInfo::createPHIDestinationCopy(MBB, LastPHIIt, DL, Src,
-                                                   Dst);
-}
-
-MachineInstr *SIInstrInfo::createPHISourceCopy(
-    MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt,
-    const DebugLoc &DL, Register Src, unsigned SrcSubReg, Register Dst) const {
-  if (InsPt != MBB.end() &&
-      (InsPt->getOpcode() == AMDGPU::SI_IF ||
-       InsPt->getOpcode() == AMDGPU::SI_ELSE ||
-       InsPt->getOpcode() == AMDGPU::SI_IF_BREAK) &&
-      InsPt->definesRegister(Src, /*TRI=*/nullptr)) {
-    InsPt++;
-    return BuildMI(MBB, InsPt, DL,
-                   get(AMDGPU::LaneMaskConstants::get(ST).MovTermOpc), Dst)
-        .addReg(Src, {}, SrcSubReg)
-        .addReg(AMDGPU::EXEC, RegState::Implicit);
-  }
-  return TargetInstrInfo::createPHISourceCopy(MBB, InsPt, DL, Src, SrcSubReg,
-                                              Dst);
-}
-
-bool llvm::SIInstrInfo::isWave32() const { return ST.isWave32(); }
-
-MachineInstr *SIInstrInfo::foldMemoryOperandImpl(
-    MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
-    MachineBasicBlock::iterator InsertPt, int FrameIndex, LiveIntervals *LIS,
-    VirtRegMap *VRM) const {
-  // This is a bit of a hack (copied from AArch64). Consider this instruction:
-  //
-  //   %0:sreg_32 = COPY $m0
-  //
-  // We explicitly chose SReg_32 for the virtual register so such a copy might
-  // be eliminated by RegisterCoalescer. However, that may not be possible, and
-  // %0 may even spill. We can't spill $m0 normally (it would require copying to
-  // a numbered SGPR anyway), and since it is in the SReg_32 register class,
-  // TargetInstrInfo::foldMemoryOperand() is going to try.
-  // A similar issue also exists with spilling and reloading $exec registers.
-  //
-  // To prevent that, constrain the %0 register class here.
-  if (isFullCopyInstr(MI)) {
-    Register DstReg = MI.getOperand(0).getReg();
-    Register SrcReg = MI.getOperand(1).getReg();
-    if ((DstReg.isVirtual() || SrcReg.isVirtual()) &&
-        (DstReg.isVirtual() != SrcReg.isVirtual())) {
-      MachineRegisterInfo &MRI = MF.getRegInfo();
-      Register VirtReg = DstReg.isVirtual() ? DstReg : SrcReg;
-      const TargetRegisterClass *RC = MRI.getRegClass(VirtReg);
-      if (RC->hasSuperClassEq(&AMDGPU::SReg_32RegClass)) {
-        MRI.constrainRegClass(VirtReg, &AMDGPU::SReg_32_XM0_XEXECRegClass);
-        return nullptr;
-      }
-      if (RC->hasSuperClassEq(&AMDGPU::SReg_64RegClass)) {
-        MRI.constrainRegClass(VirtReg, &AMDGPU::SReg_64_XEXECRegClass);
-        return nullptr;
-      }
-    }
-  }
-
-  return nullptr;
-}
-
-unsigned SIInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
-                                      const MachineInstr &MI,
-                                      unsigned *PredCost) const {
-  if (MI.isBundle()) {
-    MachineBasicBlock::const_instr_iterator I(MI.getIterator());
-    MachineBasicBlock::const_instr_iterator E(MI.getParent()->instr_end());
-    unsigned Lat = 0, Count = 0;
-    for (++I; I != E && I->isBundledWithPred(); ++I) {
-      ++Count;
-      Lat = std::max(Lat, SchedModel.computeInstrLatency(&*I));
-    }
-    return Lat + Count - 1;
-  }
-
-  return SchedModel.computeInstrLatency(&MI);
-}
-
-const MachineOperand &
-SIInstrInfo::getCalleeOperand(const MachineInstr &MI) const {
-  if (const MachineOperand *CallAddrOp =
-          getNamedOperand(MI, AMDGPU::OpName::src0))
-    return *CallAddrOp;
-  return TargetInstrInfo::getCalleeOperand(MI);
-}
-
-InstructionUniformity
-SIInstrInfo::getGenericInstructionUniformity(const MachineInstr &MI) const {
-  const MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
-  unsigned Opcode = MI.getOpcode();
-
-  auto HandleAddrSpaceCast = [this, &MRI](const MachineInstr &MI) {
-    Register Dst = MI.getOperand(0).getReg();
-    Register Src = isa<GIntrinsic>(MI) ? MI.getOperand(2).getReg()
-                                       : MI.getOperand(1).getReg();
-    LLT DstTy = MRI.getType(Dst);
-    LLT SrcTy = MRI.getType(Src);
-    unsigned DstAS = DstTy.getAddressSpace();
-    unsigned SrcAS = SrcTy.getAddressSpace();
-    return SrcAS == AMDGPUAS::PRIVATE_ADDRESS &&
-                   DstAS == AMDGPUAS::FLAT_ADDRESS &&
-                   ST.hasGloballyAddressableScratch()
-               ? InstructionUniformity::NeverUniform
-               : InstructionUniformity::Default;
-  };
-
-  // If the target supports globally addressable scratch, the mapping from
-  // scratch memory to the flat aperture changes therefore an address space cast
-  // is no longer uniform.
-  if (Opcode == TargetOpcode::G_ADDRSPACE_CAST)
-    return HandleAddrSpaceCast(MI);
-
-  if (auto *GI = dyn_cast<GIntrinsic>(&MI)) {
-    auto IID = GI->getIntrinsicID();
-    if (AMDGPU::isIntrinsicSourceOfDivergence(IID))
-      return InstructionUniformity::NeverUniform;
-    if (AMDGPU::isIntrinsicAlwaysUniform(IID))
-      return InstructionUniformity::AlwaysUniform;
-
-    switch (IID) {
-    case Intrinsic::amdgcn_addrspacecast_nonnull:
-      return HandleAddrSpaceCast(MI);
-    case Intrinsic::amdgcn_if:
-    case Intrinsic::amdgcn_else:
-      // FIXME: Uniform if second result
-      break;
-    }
-
-    return InstructionUniformity::Default;
-  }
-
-  // Loads from the private and flat address spaces are divergent, because
-  // threads can execute the load instruction with the same inputs and get
-  // different results.
-  //
-  // All other loads are not divergent, because if threads issue loads with the
-  // same arguments, they will always get the same result.
-  if (Opcode == AMDGPU::G_LOAD || Opcode == AMDGPU::G_ZEXTLOAD ||
-      Opcode == AMDGPU::G_SEXTLOAD) {
-    if (MI.memoperands_empty())
-      return InstructionUniformity::NeverUniform; // conservative assumption
-
-    if (llvm::any_of(MI.memoperands(), [](const MachineMemOperand *mmo) {
-          return mmo->getAddrSpace() == AMDGPUAS::PRIVATE_ADDRESS ||
-                 mmo->getAddrSpace() == AMDGPUAS::FLAT_ADDRESS;
-        })) {
-      // At least one MMO in a non-global address space.
-      return InstructionUniformity::NeverUniform;
-    }
-    return InstructionUniformity::Default;
-  }
-
-  if (SIInstrInfo::isGenericAtomicRMWOpcode(Opcode) ||
-      Opcode == AMDGPU::G_ATOMIC_CMPXCHG ||
-      Opcode == AMDGPU::G_ATOMIC_CMPXCHG_WITH_SUCCESS ||
-      AMDGPU::isGenericAtomic(Opcode)) {
-    return InstructionUniformity::NeverUniform;
-  }
-  return InstructionUniformity::Default;
-}
-
-const MIRFormatter *SIInstrInfo::getMIRFormatter() const {
-  if (!Formatter)
-    Formatter = std::make_unique<AMDGPUMIRFormatter>(ST);
-  return Formatter.get();
-}
-
-InstructionUniformity
-SIInstrInfo::getInstructionUniformity(const MachineInstr &MI) const {
-
-  if (isNeverUniform(MI))
-    return InstructionUniformity::NeverUniform;
-
-  unsigned opcode = MI.getOpcode();
-  if (opcode == AMDGPU::V_READLANE_B32 ||
-      opcode == AMDGPU::V_READFIRSTLANE_B32 ||
-      opcode == AMDGPU::SI_RESTORE_S32_FROM_VGPR)
-    return InstructionUniformity::AlwaysUniform;
-
-  if (isCopyInstr(MI)) {
-    const MachineOperand &srcOp = MI.getOperand(1);
-    if (srcOp.isReg() && srcOp.getReg().isPhysical()) {
-      const TargetRegisterClass *regClass =
-          RI.getPhysRegBaseClass(srcOp.getReg());
-      return RI.isSGPRClass(regClass) ? InstructionUniformity::AlwaysUniform
-                                      : InstructionUniformity::NeverUniform;
-    }
-    return InstructionUniformity::Default;
-  }
-
-  // GMIR handling
-  if (MI.isPreISelOpcode())
-    return SIInstrInfo::getGenericInstructionUniformity(MI);
-
-  // Atomics are divergent because they are executed sequentially: when an
-  // atomic operation refers to the same address in each thread, then each
-  // thread after the first sees the value written by the previous thread as
-  // original value.
-
-  if (isAtomic(MI))
-    return InstructionUniformity::NeverUniform;
-
-  // Loads from the private and flat address spaces are divergent, because
-  // threads can execute the load instruction with the same inputs and get
-  // different results.
-  if (isFLAT(MI) && MI.mayLoad()) {
-    if (MI.memoperands_empty())
-      return InstructionUniformity::NeverUniform; // conservative assumption
-
-    if (llvm::any_of(MI.memoperands(), [](const MachineMemOperand *mmo) {
-          return mmo->getAddrSpace() == AMDGPUAS::PRIVATE_ADDRESS ||
-                 mmo->getAddrSpace() == AMDGPUAS::FLAT_ADDRESS;
-        })) {
-      // At least one MMO in a non-global address space.
-      return InstructionUniformity::NeverUniform;
-    }
-
-    return InstructionUniformity::Default;
-  }
-
-  const MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
-  const AMDGPURegisterBankInfo *RBI = ST.getRegBankInfo();
-
-  // FIXME: It's conceptually broken to report this for an instruction, and not
-  // a specific def operand. For inline asm in particular, there could be mixed
-  // uniform and divergent results.
-  for (unsigned I = 0, E = MI.getNumOperands(); I != E; ++I) {
-    const MachineOperand &SrcOp = MI.getOperand(I);
-    if (!SrcOp.isReg())
-      continue;
-
-    Register Reg = SrcOp.getReg();
-    if (!Reg || !SrcOp.readsReg())
-      continue;
-
-    // If RegBank is null, this is unassigned or an unallocatable special
-    // register, which are all scalars.
-    const RegisterBank *RegBank = RBI->getRegBank(Reg, MRI, RI);
-    if (RegBank && RegBank->getID() != AMDGPU::SGPRRegBankID)
-      return InstructionUniformity::NeverUniform;
-  }
-
-  // TODO: Uniformity check condtions above can be rearranged for more
-  // redability
-
-  // TODO: amdgcn.{ballot, [if]cmp} should be AlwaysUniform, but they are
-  //       currently turned into no-op COPYs by SelectionDAG ISel and are
-  //       therefore no longer recognizable.
-
-  return InstructionUniformity::Default;
-}
-
-unsigned SIInstrInfo::getDSShaderTypeValue(const MachineFunction &MF) {
-  switch (MF.getFunction().getCallingConv()) {
-  case CallingConv::AMDGPU_PS:
-    return 1;
-  case CallingConv::AMDGPU_VS:
-    return 2;
-  case CallingConv::AMDGPU_GS:
-    return 3;
-  case CallingConv::AMDGPU_HS:
-  case CallingConv::AMDGPU_LS:
-  case CallingConv::AMDGPU_ES: {
-    const Function &F = MF.getFunction();
-    F.getContext().diagnose(DiagnosticInfoUnsupported(
-        F, "ds_ordered_count unsupported for this calling conv"));
-    [[fallthrough]];
-  }
-  case CallingConv::AMDGPU_CS:
-  case CallingConv::AMDGPU_KERNEL:
-  case CallingConv::C:
-  case CallingConv::Fast:
-  default:
-    // Assume other calling conventions are various compute callable functions
-    return 0;
-  }
-}
-
-bool SIInstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg,
-                                 Register &SrcReg2, int64_t &CmpMask,
-                                 int64_t &CmpValue) const {
-  if (!MI.getOperand(0).isReg() || MI.getOperand(0).getSubReg())
-    return false;
-
-  switch (MI.getOpcode()) {
-  default:
-    break;
-  case AMDGPU::S_CMP_EQ_U32:
-  case AMDGPU::S_CMP_EQ_I32:
-  case AMDGPU::S_CMP_LG_U32:
-  case AMDGPU::S_CMP_LG_I32:
-  case AMDGPU::S_CMP_LT_U32:
-  case AMDGPU::S_CMP_LT_I32:
-  case AMDGPU::S_CMP_GT_U32:
-  case AMDGPU::S_CMP_GT_I32:
-  case AMDGPU::S_CMP_LE_U32:
-  case AMDGPU::S_CMP_LE_I32:
-  case AMDGPU::S_CMP_GE_U32:
-  case AMDGPU::S_CMP_GE_I32:
-  case AMDGPU::S_CMP_EQ_U64:
-  case AMDGPU::S_CMP_LG_U64:
-    SrcReg = MI.getOperand(0).getReg();
-    if (MI.getOperand(1).isReg()) {
-      if (MI.getOperand(1).getSubReg())
-        return false;
-      SrcReg2 = MI.getOperand(1).getReg();
-      CmpValue = 0;
-    } else if (MI.getOperand(1).isImm()) {
-      SrcReg2 = Register();
-      CmpValue = MI.getOperand(1).getImm();
-    } else {
-      return false;
-    }
-    CmpMask = ~0;
-    return true;
-  case AMDGPU::S_CMPK_EQ_U32:
-  case AMDGPU::S_CMPK_EQ_I32:
-  case AMDGPU::S_CMPK_LG_U32:
-  case AMDGPU::S_CMPK_LG_I32:
-  case AMDGPU::S_CMPK_LT_U32:
-  case AMDGPU::S_CMPK_LT_I32:
-  case AMDGPU::S_CMPK_GT_U32:
-  case AMDGPU::S_CMPK_GT_I32:
-  case AMDGPU::S_CMPK_LE_U32:
-  case AMDGPU::S_CMPK_LE_I32:
-  case AMDGPU::S_CMPK_GE_U32:
-  case AMDGPU::S_CMPK_GE_I32:
-    SrcReg = MI.getOperand(0).getReg();
-    SrcReg2 = Register();
-    CmpValue = MI.getOperand(1).getImm();
-    CmpMask = ~0;
-    return true;
-  }
-
-  return false;
-}
-
-static bool isSCCDeadOnExit(MachineBasicBlock *MBB) {
-  for (MachineBasicBlock *S : MBB->successors()) {
-    if (S->isLiveIn(AMDGPU::SCC))
-      return false;
-  }
-  return true;
-}
-
-// Invert all uses of SCC following SCCDef because SCCDef may be deleted and
-// (incoming SCC) = !(SCC defined by SCCDef).
-// Return true if all uses can be re-written, false otherwise.
-bool SIInstrInfo::invertSCCUse(MachineInstr *SCCDef) const {
-  MachineBasicBlock *MBB = SCCDef->getParent();
-  SmallVector<MachineInstr *> InvertInstr;
-  bool SCCIsDead = false;
-
-  // Scan instructions for SCC uses that need to be inverted until SCC is dead.
-  constexpr unsigned ScanLimit = 12;
-  unsigned Count = 0;
-  for (MachineInstr &MI :
-       make_range(std::next(MachineBasicBlock::iterator(SCCDef)), MBB->end())) {
-    if (++Count > ScanLimit)
-      return false;
-    if (MI.readsRegister(AMDGPU::SCC, &RI)) {
-      if (MI.getOpcode() == AMDGPU::S_CSELECT_B32 ||
-          MI.getOpcode() == AMDGPU::S_CSELECT_B64 ||
-          MI.getOpcode() == AMDGPU::S_CBRANCH_SCC0 ||
-          MI.getOpcode() == AMDGPU::S_CBRANCH_SCC1)
-        InvertInstr.push_back(&MI);
-      else
-        return false;
-    }
-    if (MI.definesRegister(AMDGPU::SCC, &RI)) {
-      SCCIsDead = true;
-      break;
-    }
-  }
-  if (!SCCIsDead && isSCCDeadOnExit(MBB))
-    SCCIsDead = true;
-
-  // SCC may have more uses.  Can't invert all of them.
-  if (!SCCIsDead)
-    return false;
-
-  // Invert uses
-  for (MachineInstr *MI : InvertInstr) {
-    if (MI->getOpcode() == AMDGPU::S_CSELECT_B32 ||
-        MI->getOpcode() == AMDGPU::S_CSELECT_B64) {
-      swapOperands(*MI);
-    } else if (MI->getOpcode() == AMDGPU::S_CBRANCH_SCC0 ||
-               MI->getOpcode() == AMDGPU::S_CBRANCH_SCC1) {
-      MI->setDesc(get(MI->getOpcode() == AMDGPU::S_CBRANCH_SCC0
-                          ? AMDGPU::S_CBRANCH_SCC1
-                          : AMDGPU::S_CBRANCH_SCC0));
-    } else {
-      llvm_unreachable("SCC used but no inversion handling");
-    }
-  }
-  return true;
-}
-
-// SCC is already valid after SCCValid.
-// SCCRedefine will redefine SCC to the same value already available after
-// SCCValid. If there are no intervening SCC conflicts delete SCCRedefine and
-// update kill/dead flags if necessary.
-bool SIInstrInfo::optimizeSCC(MachineInstr *SCCValid, MachineInstr *SCCRedefine,
-                              bool NeedInversion) const {
-  MachineInstr *KillsSCC = nullptr;
-  if (SCCValid->getParent() != SCCRedefine->getParent())
-    return false;
-  for (MachineInstr &MI : make_range(std::next(SCCValid->getIterator()),
-                                     SCCRedefine->getIterator())) {
-    if (MI.modifiesRegister(AMDGPU::SCC, &RI))
-      return false;
-    if (MI.killsRegister(AMDGPU::SCC, &RI))
-      KillsSCC = &MI;
-  }
-  if (NeedInversion && !invertSCCUse(SCCRedefine))
-    return false;
-  if (MachineOperand *SccDef =
-          SCCValid->findRegisterDefOperand(AMDGPU::SCC, /*TRI=*/nullptr))
-    SccDef->setIsDead(false);
-  if (KillsSCC)
-    KillsSCC->clearRegisterKills(AMDGPU::SCC, /*TRI=*/nullptr);
-  SCCRedefine->eraseFromParent();
-  return true;
-}
-
-static bool foldableSelect(const MachineInstr &Def) {
-  if (Def.getOpcode() != AMDGPU::S_CSELECT_B32 &&
-      Def.getOpcode() != AMDGPU::S_CSELECT_B64)
-    return false;
-  bool Op1IsNonZeroImm =
-      Def.getOperand(1).isImm() && Def.getOperand(1).getImm() != 0;
-  bool Op2IsZeroImm =
-      Def.getOperand(2).isImm() && Def.getOperand(2).getImm() == 0;
-  if (!Op1IsNonZeroImm || !Op2IsZeroImm)
-    return false;
-  return true;
-}
-
-static bool setsSCCIfResultIsZero(const MachineInstr &Def, bool &NeedInversion,
-                                  unsigned &NewDefOpc) {
-  // S_ADD_U32 X, 1 sets SCC on carryout which can only happen if result==0.
-  // S_ADD_I32 X, 1 can be converted to S_ADD_U32 X, 1 if SCC is dead.
-  if (Def.getOpcode() != AMDGPU::S_ADD_I32 &&
-      Def.getOpcode() != AMDGPU::S_ADD_U32)
-    return false;
-  const MachineOperand &AddSrc1 = Def.getOperand(1);
-  const MachineOperand &AddSrc2 = Def.getOperand(2);
-  int64_t addend;
-
-  if ((!AddSrc1.isImm() || AddSrc1.getImm() != 1) &&
-      (!AddSrc2.isImm() || AddSrc2.getImm() != 1) &&
-      (!getFoldableImm(&AddSrc1, addend) || addend != 1) &&
-      (!getFoldableImm(&AddSrc2, addend) || addend != 1))
-    return false;
-
-  if (Def.getOpcode() == AMDGPU::S_ADD_I32) {
-    const MachineOperand *SccDef =
-        Def.findRegisterDefOperand(AMDGPU::SCC, /*TRI=*/nullptr);
-    if (!SccDef->isDead())
-      return false;
-    NewDefOpc = AMDGPU::S_ADD_U32;
-  }
-  NeedInversion = !NeedInversion;
-  return true;
-}
-
-bool SIInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
-                                       Register SrcReg2, int64_t CmpMask,
-                                       int64_t CmpValue,
-                                       const MachineRegisterInfo *MRI) const {
-  if (!SrcReg || SrcReg.isPhysical())
-    return false;
-
-  if (SrcReg2 && !getFoldableImm(SrcReg2, *MRI, CmpValue))
-    return false;
-
-  const auto optimizeCmpSelect = [&CmpInstr, SrcReg, CmpValue, MRI,
-                                  this](bool NeedInversion) -> bool {
-    if (CmpValue != 0)
-      return false;
-
-    MachineInstr *Def = MRI->getVRegDef(SrcReg);
-    if (!Def)
-      return false;
-
-    // For S_OP that set SCC = DST!=0, do the transformation
-    //
-    //   s_cmp_[lg|eq]_* (S_OP ...), 0 => (S_OP ...)
-    //
-    // For (S_OP ...) that set SCC = DST==0, invert NeedInversion and
-    // do the transformation:
-    //
-    //   s_cmp_[lg|eq]_* (S_OP ...), 0 => (S_OP ...)
-    //
-    // If foldableSelect, s_cmp_lg_* is redundant because the SCC input value
-    // for S_CSELECT* already has the same value that will be calculated by
-    // s_cmp_lg_*
-    //
-    //   s_cmp_[lg|eq]_* (S_CSELECT* (non-zero imm), 0), 0 => (S_CSELECT*
-    //   (non-zero imm), 0)
-
-    unsigned NewDefOpc = Def->getOpcode();
-    if (!setsSCCIfResultIsNonZero(*Def) &&
-        !setsSCCIfResultIsZero(*Def, NeedInversion, NewDefOpc) &&
-        !foldableSelect(*Def))
-      return false;
-
-    if (!optimizeSCC(Def, &CmpInstr, NeedInversion))
-      return false;
-
-    if (NewDefOpc != Def->getOpcode())
-      Def->setDesc(get(NewDefOpc));
-
-    // If s_or_b32 result, sY, is unused (i.e. it is effectively a 64-bit
-    // s_cmp_lg of a register pair) and the inputs are the hi and lo-halves of a
-    // 64-bit foldableSelect then delete s_or_b32 in the sequence:
-    //    sX = s_cselect_b64 (non-zero imm), 0
-    //    sLo = copy sX.sub0
-    //    sHi = copy sX.sub1
-    //    sY = s_or_b32 sLo, sHi
-    if (Def->getOpcode() == AMDGPU::S_OR_B32 &&
-        MRI->use_nodbg_empty(Def->getOperand(0).getReg())) {
-      const MachineOperand &OrOpnd1 = Def->getOperand(1);
-      const MachineOperand &OrOpnd2 = Def->getOperand(2);
-      if (OrOpnd1.isReg() && OrOpnd2.isReg()) {
-        MachineInstr *Def1 = MRI->getVRegDef(OrOpnd1.getReg());
-        MachineInstr *Def2 = MRI->getVRegDef(OrOpnd2.getReg());
-        if (Def1 && Def1->getOpcode() == AMDGPU::COPY && Def2 &&
-            Def2->getOpcode() == AMDGPU::COPY && Def1->getOperand(1).isReg() &&
-            Def2->getOperand(1).isReg() &&
-            Def1->getOperand(1).getSubReg() == AMDGPU::sub0 &&
-            Def2->getOperand(1).getSubReg() == AMDGPU::sub1 &&
-            Def1->getOperand(1).getReg() == Def2->getOperand(1).getReg()) {
-          MachineInstr *Select = MRI->getVRegDef(Def1->getOperand(1).getReg());
-          if (Select && foldableSelect(*Select))
-            optimizeSCC(Select, Def, /*NeedInversion=*/false);
-        }
-      }
-    }
-    return true;
-  };
-
-  const auto optimizeCmpAnd = [&CmpInstr, SrcReg, CmpValue, MRI,
-                               this](int64_t ExpectedValue, unsigned SrcSize,
-                                     bool IsReversible, bool IsSigned) -> bool {
-    // s_cmp_eq_u32 (s_and_b32 $src, 1 << n), 1 << n => s_and_b32 $src, 1 << n
-    // s_cmp_eq_i32 (s_and_b32 $src, 1 << n), 1 << n => s_and_b32 $src, 1 << n
-    // s_cmp_ge_u32 (s_and_b32 $src, 1 << n), 1 << n => s_and_b32 $src, 1 << n
-    // s_cmp_ge_i32 (s_and_b32 $src, 1 << n), 1 << n => s_and_b32 $src, 1 << n
-    // s_cmp_eq_u64 (s_and_b64 $src, 1 << n), 1 << n => s_and_b64 $src, 1 << n
-    // s_cmp_lg_u32 (s_and_b32 $src, 1 << n), 0 => s_and_b32 $src, 1 << n
-    // s_cmp_lg_i32 (s_and_b32 $src, 1 << n), 0 => s_and_b32 $src, 1 << n
-    // s_cmp_gt_u32 (s_and_b32 $src, 1 << n), 0 => s_and_b32 $src, 1 << n
-    // s_cmp_gt_i32 (s_and_b32 $src, 1 << n), 0 => s_and_b32 $src, 1 << n
-    // s_cmp_lg_u64 (s_and_b64 $src, 1 << n), 0 => s_and_b64 $src, 1 << n
-    //
-    // Signed ge/gt are not used for the sign bit.
-    //
-    // If result of the AND is unused except in the compare:
-    // s_and_b(32|64) $src, 1 << n => s_bitcmp1_b(32|64) $src, n
-    //
-    // s_cmp_eq_u32 (s_and_b32 $src, 1 << n), 0 => s_bitcmp0_b32 $src, n
-    // s_cmp_eq_i32 (s_and_b32 $src, 1 << n), 0 => s_bitcmp0_b32 $src, n
-    // s_cmp_eq_u64 (s_and_b64 $src, 1 << n), 0 => s_bitcmp0_b64 $src, n
-    // s_cmp_lg_u32 (s_and_b32 $src, 1 << n), 1 << n => s_bitcmp0_b32 $src, n
-    // s_cmp_lg_i32 (s_and_b32 $src, 1 << n), 1 << n => s_bitcmp0_b32 $src, n
-    // s_cmp_lg_u64 (s_and_b64 $src, 1 << n), 1 << n => s_bitcmp0_b64 $src, n
-
-    MachineInstr *Def = MRI->getVRegDef(SrcReg);
-    if (!Def)
-      return false;
-
-    if (Def->getOpcode() != AMDGPU::S_AND_B32 &&
-        Def->getOpcode() != AMDGPU::S_AND_B64)
-      return false;
-
-    int64_t Mask;
-    const auto isMask = [&Mask, SrcSize](const MachineOperand *MO) -> bool {
-      if (MO->isImm())
-        Mask = MO->getImm();
-      else if (!getFoldableImm(MO, Mask))
-        return false;
-      Mask &= maxUIntN(SrcSize);
-      return isPowerOf2_64(Mask);
-    };
-
-    MachineOperand *SrcOp = &Def->getOperand(1);
-    if (isMask(SrcOp))
-      SrcOp = &Def->getOperand(2);
-    else if (isMask(&Def->getOperand(2)))
-      SrcOp = &Def->getOperand(1);
-    else
-      return false;
-
-    // A valid Mask is required to have a single bit set, hence a non-zero and
-    // power-of-two value. This verifies that we will not do 64-bit shift below.
-    assert(llvm::has_single_bit<uint64_t>(Mask) && "Invalid mask.");
-    unsigned BitNo = llvm::countr_zero((uint64_t)Mask);
-    if (IsSigned && BitNo == SrcSize - 1)
-      return false;
-
-    ExpectedValue <<= BitNo;
-
-    bool IsReversedCC = false;
-    if (CmpValue != ExpectedValue) {
-      if (!IsReversible)
-        return false;
-      IsReversedCC = CmpValue == (ExpectedValue ^ Mask);
-      if (!IsReversedCC)
-        return false;
-    }
-
-    Register DefReg = Def->getOperand(0).getReg();
-    if (IsReversedCC && !MRI->hasOneNonDBGUse(DefReg))
-      return false;
-
-    if (!optimizeSCC(Def, &CmpInstr, /*NeedInversion=*/false))
-      return false;
-
-    if (!MRI->use_nodbg_empty(DefReg)) {
-      assert(!IsReversedCC);
-      return true;
-    }
-
-    // Replace AND with unused result with a S_BITCMP.
-    MachineBasicBlock *MBB = Def->getParent();
-
-    unsigned NewOpc = (SrcSize == 32) ? IsReversedCC ? AMDGPU::S_BITCMP0_B32
-                                                     : AMDGPU::S_BITCMP1_B32
-                                      : IsReversedCC ? AMDGPU::S_BITCMP0_B64
-                                                     : AMDGPU::S_BITCMP1_B64;
-
-    BuildMI(*MBB, Def, Def->getDebugLoc(), get(NewOpc))
-      .add(*SrcOp)
-      .addImm(BitNo);
-    Def->eraseFromParent();
-
-    return true;
-  };
-
-  switch (CmpInstr.getOpcode()) {
-  default:
-    break;
-  case AMDGPU::S_CMP_EQ_U32:
-  case AMDGPU::S_CMP_EQ_I32:
-  case AMDGPU::S_CMPK_EQ_U32:
-  case AMDGPU::S_CMPK_EQ_I32:
-    return optimizeCmpAnd(1, 32, true, false) ||
-           optimizeCmpSelect(/*NeedInversion=*/true);
-  case AMDGPU::S_CMP_GE_U32:
-  case AMDGPU::S_CMPK_GE_U32:
-    return optimizeCmpAnd(1, 32, false, false);
-  case AMDGPU::S_CMP_GE_I32:
-  case AMDGPU::S_CMPK_GE_I32:
-    return optimizeCmpAnd(1, 32, false, true);
-  case AMDGPU::S_CMP_EQ_U64:
-    return optimizeCmpAnd(1, 64, true, false);
-  case AMDGPU::S_CMP_LG_U32:
-  case AMDGPU::S_CMP_LG_I32:
-  case AMDGPU::S_CMPK_LG_U32:
-  case AMDGPU::S_CMPK_LG_I32:
-    return optimizeCmpAnd(0, 32, true, false) ||
-           optimizeCmpSelect(/*NeedInversion=*/false);
-  case AMDGPU::S_CMP_GT_U32:
-  case AMDGPU::S_CMPK_GT_U32:
-    return optimizeCmpAnd(0, 32, false, false);
-  case AMDGPU::S_CMP_GT_I32:
-  case AMDGPU::S_CMPK_GT_I32:
-    return optimizeCmpAnd(0, 32, false, true);
-  case AMDGPU::S_CMP_LG_U64:
-    return optimizeCmpAnd(0, 64, true, false) ||
-           optimizeCmpSelect(/*NeedInversion=*/false);
-  }
-
-  return false;
-}
-
-void SIInstrInfo::enforceOperandRCAlignment(MachineInstr &MI,
-                                            AMDGPU::OpName OpName) const {
-  if (!ST.needsAlignedVGPRs())
-    return;
-
-  int OpNo = AMDGPU::getNamedOperandIdx(MI.getOpcode(), OpName);
-  if (OpNo < 0)
-    return;
-  MachineOperand &Op = MI.getOperand(OpNo);
-  if (getOpSize(MI, OpNo) > 4)
-    return;
-
-  // Add implicit aligned super-reg to force alignment on the data operand.
-  const DebugLoc &DL = MI.getDebugLoc();
-  MachineBasicBlock *BB = MI.getParent();
-  MachineRegisterInfo &MRI = BB->getParent()->getRegInfo();
-  Register DataReg = Op.getReg();
-  bool IsAGPR = RI.isAGPR(MRI, DataReg);
-  Register Undef = MRI.createVirtualRegister(
-      IsAGPR ? &AMDGPU::AGPR_32RegClass : &AMDGPU::VGPR_32RegClass);
-  BuildMI(*BB, MI, DL, get(AMDGPU::IMPLICIT_DEF), Undef);
-  Register NewVR =
-      MRI.createVirtualRegister(IsAGPR ? &AMDGPU::AReg_64_Align2RegClass
-                                       : &AMDGPU::VReg_64_Align2RegClass);
-  BuildMI(*BB, MI, DL, get(AMDGPU::REG_SEQUENCE), NewVR)
-      .addReg(DataReg, {}, Op.getSubReg())
-      .addImm(AMDGPU::sub0)
-      .addReg(Undef)
-      .addImm(AMDGPU::sub1);
-  Op.setReg(NewVR);
-  Op.setSubReg(AMDGPU::sub0);
-  MI.addOperand(MachineOperand::CreateReg(NewVR, false, true));
-}
-
-bool SIInstrInfo::isGlobalMemoryObject(const MachineInstr *MI) const {
-  if (isIGLP(*MI))
-    return false;
-
-  return TargetInstrInfo::isGlobalMemoryObject(MI);
-}
-
-bool SIInstrInfo::isXDLWMMA(const MachineInstr &MI) const {
-  if (!isWMMA(MI) && !isSWMMAC(MI))
-    return false;
-
-  if (ST.hasGFX1250Insts())
-    return AMDGPU::getWMMAIsXDL(MI.getOpcode());
-
-  return true;
-}
-
-bool SIInstrInfo::isXDL(const MachineInstr &MI) const {
-  unsigned Opcode = MI.getOpcode();
-
-  if (AMDGPU::isGFX12Plus(ST))
-    return isDOT(MI) || isXDLWMMA(MI);
-
-  if (!isMAI(MI) || isDGEMM(Opcode) ||
-      Opcode == AMDGPU::V_ACCVGPR_WRITE_B32_e64 ||
-      Opcode == AMDGPU::V_ACCVGPR_READ_B32_e64)
-    return false;
-
-  if (!ST.hasGFX940Insts())
-    return true;
-
-  return AMDGPU::getMAIIsGFX940XDL(Opcode);
-}

>From 33bb5d385803d35e06404aa22b4407a994744c8d Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 15 Mar 2026 00:46:08 +0530
Subject: [PATCH 48/55] Update SIInstrInfo.h

---
 llvm/lib/Target/AMDGPU/SIInstrInfo.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index 87d51ffe83663..664db67c0550a 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -1290,7 +1290,7 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
       assert(Size == 8 || Size == 4);
 
       uint8_t OpType = (Size == 8) ?
-        AMDGPU::OPERAND_REG_IMM_INT64 : AMDGPU::OPERAND_REG_IMM_INT32;
+        AMDGPU::OPERAND_REG_IMM_I64 : AMDGPU::OPERAND_REG_IMM_INT32;
       return isInlineConstant(ImmVal, OpType);
     }
 
@@ -1841,7 +1841,7 @@ namespace KernelInputOffsets {
 enum Offsets {
   NGROUPS_X = 0,
   NGROUPS_Y = 4,
-  NGROUPS_Z = 8,
+  NGROUS_Z = 8,
   GLOBAL_SIZE_X = 12,
   GLOBAL_SIZE_Y = 16,
   GLOBAL_SIZE_Z = 20,

>From f20043a095d430b8ff8d729da4180498da43cf63 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 15 Mar 2026 00:47:38 +0530
Subject: [PATCH 49/55] Update SIRegisterInfo.td

---
 llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.td b/llvm/lib/Target/AMDGPU/SIRegisterInfo.td
index e3430c515e395..935a0b02315ac 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.td
@@ -1369,7 +1369,7 @@ def SSrc_bf16 : SrcRegOrImm9 <SReg_32, "OPERAND_REG_IMM_BF16">;
 def SSrc_f16  : SrcRegOrImm9 <SReg_32, "OPERAND_REG_IMM_FP16">;
 def SSrc_b32  : SrcRegOrImm9 <SReg_32, "OPERAND_REG_IMM_INT32">;
 def SSrc_f32  : SrcRegOrImm9 <SReg_32, "OPERAND_REG_IMM_FP32">;
-def SSrc_b64  : SrcRegOrImm9 <SReg_64_Encodable, "OPERAND_REG_IMM_B64">;
+def SSrc_b64  : SrcRegOrImm9 <SReg_64_Encodable, "OPERAND_REG_IMM_U64">;
 
 def SSrcOrLds_b32 : SrcRegOrImm9 <SRegOrLds_32, "OPERAND_REG_IMM_INT32">;
 
@@ -1412,7 +1412,7 @@ def VSrc_f32    : SrcRegOrImm9 <VS_32, "OPERAND_REG_IMM_FP32">;
 def VSrc_v2b16  : SrcRegOrImm9 <VS_32, "OPERAND_REG_IMM_V2INT16">;
 def VSrc_v2bf16 : SrcRegOrImm9 <VS_32, "OPERAND_REG_IMM_V2BF16">;
 def VSrc_v2f16  : SrcRegOrImm9 <VS_32, "OPERAND_REG_IMM_V2FP16">;
-def VSrc_b64    : SrcRegOrImm9 <VS_64_AlignTarget, "OPERAND_REG_IMM_B64">;
+def VSrc_b64    : SrcRegOrImm9 <VS_64_AlignTarget, "OPERAND_REG_IMM_U64">;
 def VSrc_f64    : SrcRegOrImm9 <VS_64_AlignTarget, "OPERAND_REG_IMM_FP64"> {
   let DecoderMethod = "decodeOperand_VSrc_f64";
 }

>From 0c148dde6dd76bd1439c1e4c849e98b755981b5b Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 15 Mar 2026 00:51:12 +0530
Subject: [PATCH 50/55] Update AMDGPUMCCodeEmitter.cpp


>From 7daaddd101d71a0ef61b641bf6fc8dead8afcac6 Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 15 Mar 2026 00:57:19 +0530
Subject: [PATCH 51/55] Update AMDGPUMCCodeEmitter.cpp

---
 .../MCTargetDesc/AMDGPUMCCodeEmitter.cpp      | 11114 +++++++++++++++-
 1 file changed, 10480 insertions(+), 634 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
index 04ca8291bb748..b420ffab41022 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
@@ -1,784 +1,10630 @@
-//===-- AMDGPUMCCodeEmitter.cpp - AMDGPU Code Emitter ---------------------===//
+//===- AMDGPUAsmParser.cpp - Parse SI asm to MCInst instructions ----------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
+
+#include "AMDKernelCodeT.h"
+#include "MCTargetDesc/AMDGPUInstPrinter.h"
+#include "MCTargetDesc/AMDGPUMCAsmInfo.h"
+#include "MCTargetDesc/AMDGPUMCExpr.h"
+#include "MCTargetDesc/AMDGPUMCKernelDescriptor.h"
+#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
+#include "MCTargetDesc/AMDGPUTargetStreamer.h"
+#include "SIDefines.h"
+#include "SIInstrInfo.h"
+#include "TargetInfo/AMDGPUTargetInfo.h"
+#include "Utils/AMDGPUAsmUtils.h"
+#include "Utils/AMDGPUBaseInfo.h"
+#include "Utils/AMDKernelCodeTUtils.h"
+#include "llvm/ADT/APFloat.h"
+#include "llvm/ADT/SmallBitVector.h"
+#include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/Twine.h"
+#include "llvm/BinaryFormat/ELF.h"
+#include "llvm/CodeGenTypes/MachineValueType.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCInstrDesc.h"
+#include "llvm/MC/MCParser/AsmLexer.h"
+#include "llvm/MC/MCParser/MCAsmParser.h"
+#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
+#include "llvm/MC/MCParser/MCTargetAsmParser.h"
+#include "llvm/MC/MCRegisterInfo.h"
+#include "llvm/MC/MCSymbol.h"
+#include "llvm/MC/TargetRegistry.h"
+#include "llvm/Support/AMDGPUMetadata.h"
+#include "llvm/Support/AMDHSAKernelDescriptor.h"
+#include "llvm/Support/Casting.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/Support/MathExtras.h"
+#include "llvm/TargetParser/TargetParser.h"
+#include <optional>
+
+using namespace llvm;
+using namespace llvm::AMDGPU;
+using namespace llvm::amdhsa;
+
+namespace {
+
+class AMDGPUAsmParser;
+
+enum RegisterKind { IS_UNKNOWN, IS_VGPR, IS_SGPR, IS_AGPR, IS_TTMP, IS_SPECIAL };
+
+//===----------------------------------------------------------------------===//
+// Operand
+//===----------------------------------------------------------------------===//
+
+class AMDGPUOperand : public MCParsedAsmOperand {
+  enum KindTy {
+    Token,
+    Immediate,
+    Register,
+    Expression
+  } Kind;
+
+  SMLoc StartLoc, EndLoc;
+  const AMDGPUAsmParser *AsmParser;
+
+public:
+  AMDGPUOperand(KindTy Kind_, const AMDGPUAsmParser *AsmParser_)
+      : Kind(Kind_), AsmParser(AsmParser_) {}
+
+  using Ptr = std::unique_ptr<AMDGPUOperand>;
+
+  struct Modifiers {
+    bool Abs = false;
+    bool Neg = false;
+    bool Sext = false;
+    LitModifier Lit = LitModifier::None;
+
+    bool hasFPModifiers() const { return Abs || Neg; }
+    bool hasIntModifiers() const { return Sext; }
+    bool hasModifiers() const { return hasFPModifiers() || hasIntModifiers(); }
+
+    int64_t getFPModifiersOperand() const {
+      int64_t Operand = 0;
+      Operand |= Abs ? SISrcMods::ABS : 0u;
+      Operand |= Neg ? SISrcMods::NEG : 0u;
+      return Operand;
+    }
+
+    int64_t getIntModifiersOperand() const {
+      int64_t Operand = 0;
+      Operand |= Sext ? SISrcMods::SEXT : 0u;
+      return Operand;
+    }
+
+    int64_t getModifiersOperand() const {
+      assert(!(hasFPModifiers() && hasIntModifiers())
+           && "fp and int modifiers should not be used simultaneously");
+      if (hasFPModifiers())
+        return getFPModifiersOperand();
+      if (hasIntModifiers())
+        return getIntModifiersOperand();
+      return 0;
+    }
+
+    friend raw_ostream &operator <<(raw_ostream &OS, AMDGPUOperand::Modifiers Mods);
+  };
+
+  enum ImmTy {
+    ImmTyNone,
+    ImmTyGDS,
+    ImmTyLDS,
+    ImmTyOffen,
+    ImmTyIdxen,
+    ImmTyAddr64,
+    ImmTyOffset,
+    ImmTyInstOffset,
+    ImmTyOffset0,
+    ImmTyOffset1,
+    ImmTySMEMOffsetMod,
+    ImmTyCPol,
+    ImmTyTFE,
+    ImmTyIsAsync,
+    ImmTyD16,
+    ImmTyClamp,
+    ImmTyOModSI,
+    ImmTySDWADstSel,
+    ImmTySDWASrc0Sel,
+    ImmTySDWASrc1Sel,
+    ImmTySDWADstUnused,
+    ImmTyDMask,
+    ImmTyDim,
+    ImmTyUNorm,
+    ImmTyDA,
+    ImmTyR128A16,
+    ImmTyA16,
+    ImmTyLWE,
+    ImmTyExpTgt,
+    ImmTyExpCompr,
+    ImmTyExpVM,
+    ImmTyDone,
+    ImmTyRowEn,
+    ImmTyFORMAT,
+    ImmTyHwreg,
+    ImmTyOff,
+    ImmTySendMsg,
+    ImmTyWaitEvent,
+    ImmTyInterpSlot,
+    ImmTyInterpAttr,
+    ImmTyInterpAttrChan,
+    ImmTyOpSel,
+    ImmTyOpSelHi,
+    ImmTyNegLo,
+    ImmTyNegHi,
+    ImmTyIndexKey8bit,
+    ImmTyIndexKey16bit,
+    ImmTyIndexKey32bit,
+    ImmTyDPP8,
+    ImmTyDppCtrl,
+    ImmTyDppRowMask,
+    ImmTyDppBankMask,
+    ImmTyDppBoundCtrl,
+    ImmTyDppFI,
+    ImmTySwizzle,
+    ImmTyGprIdxMode,
+    ImmTyHigh,
+    ImmTyBLGP,
+    ImmTyCBSZ,
+    ImmTyABID,
+    ImmTyEndpgm,
+    ImmTyWaitVDST,
+    ImmTyWaitEXP,
+    ImmTyWaitVAVDst,
+    ImmTyWaitVMVSrc,
+    ImmTyBitOp3,
+    ImmTyMatrixAFMT,
+    ImmTyMatrixBFMT,
+    ImmTyMatrixAScale,
+    ImmTyMatrixBScale,
+    ImmTyMatrixAScaleFmt,
+    ImmTyMatrixBScaleFmt,
+    ImmTyMatrixAReuse,
+    ImmTyMatrixBReuse,
+    ImmTyScaleSel,
+    ImmTyByteSel,
+  };
+
+private:
+  struct TokOp {
+    const char *Data;
+    unsigned Length;
+  };
+
+  struct ImmOp {
+    int64_t Val;
+    ImmTy Type;
+    bool IsFPImm;
+    Modifiers Mods;
+  };
+
+  struct RegOp {
+    MCRegister RegNo;
+    Modifiers Mods;
+  };
+
+  union {
+    TokOp Tok;
+    ImmOp Imm;
+    RegOp Reg;
+    const MCExpr *Expr;
+  };
+
+  // The index of the associated MCInst operand.
+  mutable int MCOpIdx = -1;
+
+public:
+  bool isToken() const override { return Kind == Token; }
+
+  bool isSymbolRefExpr() const {
+    return isExpr() && Expr && isa<MCSymbolRefExpr>(Expr);
+  }
+
+  bool isImm() const override {
+    return Kind == Immediate;
+  }
+
+  bool isInlinableImm(MVT type) const;
+  bool isLiteralImm(MVT type) const;
+
+  bool isRegKind() const {
+    return Kind == Register;
+  }
+
+  bool isReg() const override {
+    return isRegKind() && !hasModifiers();
+  }
+
+  bool isRegOrInline(unsigned RCID, MVT type) const {
+    return isRegClass(RCID) || isInlinableImm(type);
+  }
+
+  bool isRegOrImmWithInputMods(unsigned RCID, MVT type) const {
+    return isRegOrInline(RCID, type) || isLiteralImm(type);
+  }
+
+  bool isRegOrImmWithInt16InputMods() const {
+    return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::i16);
+  }
+
+  template <bool IsFake16> bool isRegOrImmWithIntT16InputMods() const {
+    return isRegOrImmWithInputMods(
+        IsFake16 ? AMDGPU::VS_32RegClassID : AMDGPU::VS_16RegClassID, MVT::i16);
+  }
+
+  bool isRegOrImmWithInt32InputMods() const {
+    return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::i32);
+  }
+
+  bool isRegOrInlineImmWithInt16InputMods() const {
+    return isRegOrInline(AMDGPU::VS_32RegClassID, MVT::i16);
+  }
+
+  template <bool IsFake16> bool isRegOrInlineImmWithIntT16InputMods() const {
+    return isRegOrInline(
+        IsFake16 ? AMDGPU::VS_32RegClassID : AMDGPU::VS_16RegClassID, MVT::i16);
+  }
+
+  bool isRegOrInlineImmWithInt32InputMods() const {
+    return isRegOrInline(AMDGPU::VS_32RegClassID, MVT::i32);
+  }
+
+  bool isRegOrImmWithInt64InputMods() const {
+    return isRegOrImmWithInputMods(AMDGPU::VS_64RegClassID, MVT::i64);
+  }
+
+  bool isRegOrImmWithFP16InputMods() const {
+    return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::f16);
+  }
+
+  template <bool IsFake16> bool isRegOrImmWithFPT16InputMods() const {
+    return isRegOrImmWithInputMods(
+        IsFake16 ? AMDGPU::VS_32RegClassID : AMDGPU::VS_16RegClassID, MVT::f16);
+  }
+
+  bool isRegOrImmWithFP32InputMods() const {
+    return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::f32);
+  }
+
+  bool isRegOrImmWithFP64InputMods() const {
+    return isRegOrImmWithInputMods(AMDGPU::VS_64RegClassID, MVT::f64);
+  }
+
+  template <bool IsFake16> bool isRegOrInlineImmWithFP16InputMods() const {
+    return isRegOrInline(
+        IsFake16 ? AMDGPU::VS_32RegClassID : AMDGPU::VS_16RegClassID, MVT::f16);
+  }
+
+  bool isRegOrInlineImmWithFP32InputMods() const {
+    return isRegOrInline(AMDGPU::VS_32RegClassID, MVT::f32);
+  }
+
+  bool isRegOrInlineImmWithFP64InputMods() const {
+    return isRegOrInline(AMDGPU::VS_64RegClassID, MVT::f64);
+  }
+
+  bool isVRegWithInputMods(unsigned RCID) const { return isRegClass(RCID); }
+
+  bool isVRegWithFP32InputMods() const {
+    return isVRegWithInputMods(AMDGPU::VGPR_32RegClassID);
+  }
+
+  bool isVRegWithFP64InputMods() const {
+    return isVRegWithInputMods(AMDGPU::VReg_64RegClassID);
+  }
+
+  bool isPackedFP16InputMods() const {
+    return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::v2f16);
+  }
+
+  bool isPackedVGPRFP32InputMods() const {
+    return isRegOrImmWithInputMods(AMDGPU::VReg_64RegClassID, MVT::v2f32);
+  }
+
+  bool isVReg() const {
+    return isRegClass(AMDGPU::VGPR_32RegClassID) ||
+           isRegClass(AMDGPU::VReg_64RegClassID) ||
+           isRegClass(AMDGPU::VReg_96RegClassID) ||
+           isRegClass(AMDGPU::VReg_128RegClassID) ||
+           isRegClass(AMDGPU::VReg_160RegClassID) ||
+           isRegClass(AMDGPU::VReg_192RegClassID) ||
+           isRegClass(AMDGPU::VReg_256RegClassID) ||
+           isRegClass(AMDGPU::VReg_512RegClassID) ||
+           isRegClass(AMDGPU::VReg_1024RegClassID);
+  }
+
+  bool isVReg32() const {
+    return isRegClass(AMDGPU::VGPR_32RegClassID);
+  }
+
+  bool isVReg32OrOff() const {
+    return isOff() || isVReg32();
+  }
+
+  bool isNull() const {
+    return isRegKind() && getReg() == AMDGPU::SGPR_NULL;
+  }
+
+  bool isAV_LdSt_32_Align2_RegOp() const {
+    return isRegClass(AMDGPU::VGPR_32RegClassID) ||
+           isRegClass(AMDGPU::AGPR_32RegClassID);
+  }
+
+  bool isVRegWithInputMods() const;
+  template <bool IsFake16> bool isT16_Lo128VRegWithInputMods() const;
+  template <bool IsFake16> bool isT16VRegWithInputMods() const;
+
+  bool isSDWAOperand(MVT type) const;
+  bool isSDWAFP16Operand() const;
+  bool isSDWAFP32Operand() const;
+  bool isSDWAInt16Operand() const;
+  bool isSDWAInt32Operand() const;
+
+  bool isImmTy(ImmTy ImmT) const {
+    return isImm() && Imm.Type == ImmT;
+  }
+
+  template <ImmTy Ty> bool isImmTy() const { return isImmTy(Ty); }
+
+  bool isImmLiteral() const { return isImmTy(ImmTyNone); }
+
+  bool isImmModifier() const {
+    return isImm() && Imm.Type != ImmTyNone;
+  }
+
+  bool isOModSI() const { return isImmTy(ImmTyOModSI); }
+  bool isDim() const { return isImmTy(ImmTyDim); }
+  bool isR128A16() const { return isImmTy(ImmTyR128A16); }
+  bool isOff() const { return isImmTy(ImmTyOff); }
+  bool isExpTgt() const { return isImmTy(ImmTyExpTgt); }
+  bool isOffen() const { return isImmTy(ImmTyOffen); }
+  bool isIdxen() const { return isImmTy(ImmTyIdxen); }
+  bool isAddr64() const { return isImmTy(ImmTyAddr64); }
+  bool isSMEMOffsetMod() const { return isImmTy(ImmTySMEMOffsetMod); }
+  bool isFlatOffset() const { return isImmTy(ImmTyOffset) || isImmTy(ImmTyInstOffset); }
+  bool isGDS() const { return isImmTy(ImmTyGDS); }
+  bool isLDS() const { return isImmTy(ImmTyLDS); }
+  bool isCPol() const { return isImmTy(ImmTyCPol); }
+  bool isIndexKey8bit() const { return isImmTy(ImmTyIndexKey8bit); }
+  bool isIndexKey16bit() const { return isImmTy(ImmTyIndexKey16bit); }
+  bool isIndexKey32bit() const { return isImmTy(ImmTyIndexKey32bit); }
+  bool isMatrixAFMT() const { return isImmTy(ImmTyMatrixAFMT); }
+  bool isMatrixBFMT() const { return isImmTy(ImmTyMatrixBFMT); }
+  bool isMatrixAScale() const { return isImmTy(ImmTyMatrixAScale); }
+  bool isMatrixBScale() const { return isImmTy(ImmTyMatrixBScale); }
+  bool isMatrixAScaleFmt() const { return isImmTy(ImmTyMatrixAScaleFmt); }
+  bool isMatrixBScaleFmt() const { return isImmTy(ImmTyMatrixBScaleFmt); }
+  bool isMatrixAReuse() const { return isImmTy(ImmTyMatrixAReuse); }
+  bool isMatrixBReuse() const { return isImmTy(ImmTyMatrixBReuse); }
+  bool isTFE() const { return isImmTy(ImmTyTFE); }
+  bool isFORMAT() const { return isImmTy(ImmTyFORMAT) && isUInt<7>(getImm()); }
+  bool isDppFI() const { return isImmTy(ImmTyDppFI); }
+  bool isSDWADstSel() const { return isImmTy(ImmTySDWADstSel); }
+  bool isSDWASrc0Sel() const { return isImmTy(ImmTySDWASrc0Sel); }
+  bool isSDWASrc1Sel() const { return isImmTy(ImmTySDWASrc1Sel); }
+  bool isSDWADstUnused() const { return isImmTy(ImmTySDWADstUnused); }
+  bool isInterpSlot() const { return isImmTy(ImmTyInterpSlot); }
+  bool isInterpAttr() const { return isImmTy(ImmTyInterpAttr); }
+  bool isInterpAttrChan() const { return isImmTy(ImmTyInterpAttrChan); }
+  bool isOpSel() const { return isImmTy(ImmTyOpSel); }
+  bool isOpSelHi() const { return isImmTy(ImmTyOpSelHi); }
+  bool isNegLo() const { return isImmTy(ImmTyNegLo); }
+  bool isNegHi() const { return isImmTy(ImmTyNegHi); }
+  bool isBitOp3() const { return isImmTy(ImmTyBitOp3) && isUInt<8>(getImm()); }
+  bool isDone() const { return isImmTy(ImmTyDone); }
+  bool isRowEn() const { return isImmTy(ImmTyRowEn); }
+
+  bool isRegOrImm() const {
+    return isReg() || isImm();
+  }
+
+  bool isRegClass(unsigned RCID) const;
+
+  bool isInlineValue() const;
+
+  bool isRegOrInlineNoMods(unsigned RCID, MVT type) const {
+    return isRegOrInline(RCID, type) && !hasModifiers();
+  }
+
+  bool isSCSrcB16() const {
+    return isRegOrInlineNoMods(AMDGPU::SReg_32RegClassID, MVT::i16);
+  }
+
+  bool isSCSrcV2B16() const {
+    return isSCSrcB16();
+  }
+
+  bool isSCSrc_b32() const {
+    return isRegOrInlineNoMods(AMDGPU::SReg_32RegClassID, MVT::i32);
+  }
+
+  bool isSCSrc_b64() const {
+    return isRegOrInlineNoMods(AMDGPU::SReg_64RegClassID, MVT::i64);
+  }
+
+  bool isBoolReg() const;
+
+  bool isSCSrcF16() const {
+    return isRegOrInlineNoMods(AMDGPU::SReg_32RegClassID, MVT::f16);
+  }
+
+  bool isSCSrcV2F16() const {
+    return isSCSrcF16();
+  }
+
+  bool isSCSrcF32() const {
+    return isRegOrInlineNoMods(AMDGPU::SReg_32RegClassID, MVT::f32);
+  }
+
+  bool isSCSrcF64() const {
+    return isRegOrInlineNoMods(AMDGPU::SReg_64RegClassID, MVT::f64);
+  }
+
+  bool isSSrc_b32() const {
+    return isSCSrc_b32() || isLiteralImm(MVT::i32) || isExpr();
+  }
+
+  bool isSSrc_b16() const { return isSCSrcB16() || isLiteralImm(MVT::i16); }
+
+  bool isSSrcV2B16() const {
+    llvm_unreachable("cannot happen");
+    return isSSrc_b16();
+  }
+
+  bool isSSrc_b64() const {
+    // TODO: Find out how SALU supports extension of 32-bit literals to 64 bits.
+    // See isVSrc64().
+    return isSCSrc_b64() || isLiteralImm(MVT::i64) ||
+           (((const MCTargetAsmParser *)AsmParser)
+                ->getAvailableFeatures()[AMDGPU::Feature64BitLiterals] &&
+            isExpr());
+  }
+
+  bool isSSrc_f32() const {
+    return isSCSrc_b32() || isLiteralImm(MVT::f32) || isExpr();
+  }
+
+  bool isSSrcF64() const { return isSCSrc_b64() || isLiteralImm(MVT::f64); }
+
+  bool isSSrc_bf16() const { return isSCSrcB16() || isLiteralImm(MVT::bf16); }
+
+  bool isSSrc_f16() const { return isSCSrcB16() || isLiteralImm(MVT::f16); }
+
+  bool isSSrcV2F16() const {
+    llvm_unreachable("cannot happen");
+    return isSSrc_f16();
+  }
+
+  bool isSSrcV2FP32() const {
+    llvm_unreachable("cannot happen");
+    return isSSrc_f32();
+  }
+
+  bool isSCSrcV2FP32() const {
+    llvm_unreachable("cannot happen");
+    return isSCSrcF32();
+  }
+
+  bool isSSrcV2INT32() const {
+    llvm_unreachable("cannot happen");
+    return isSSrc_b32();
+  }
+
+  bool isSCSrcV2INT32() const {
+    llvm_unreachable("cannot happen");
+    return isSCSrc_b32();
+  }
+
+  bool isSSrcOrLds_b32() const {
+    return isRegOrInlineNoMods(AMDGPU::SRegOrLds_32RegClassID, MVT::i32) ||
+           isLiteralImm(MVT::i32) || isExpr();
+  }
+
+  bool isVCSrc_b32() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_32RegClassID, MVT::i32);
+  }
+
+  bool isVCSrc_b32_Lo256() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_32_Lo256RegClassID, MVT::i32);
+  }
+
+  bool isVCSrc_b64_Lo256() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_64_Lo256RegClassID, MVT::i64);
+  }
+
+  bool isVCSrc_b64() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_64RegClassID, MVT::i64);
+  }
+
+  bool isVCSrcT_b16() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_16RegClassID, MVT::i16);
+  }
+
+  bool isVCSrcTB16_Lo128() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_16_Lo128RegClassID, MVT::i16);
+  }
+
+  bool isVCSrcFake16B16_Lo128() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_32_Lo128RegClassID, MVT::i16);
+  }
+
+  bool isVCSrc_b16() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_32RegClassID, MVT::i16);
+  }
+
+  bool isVCSrc_v2b16() const { return isVCSrc_b16(); }
+
+  bool isVCSrc_f32() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_32RegClassID, MVT::f32);
+  }
+
+  bool isVCSrc_f64() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_64RegClassID, MVT::f64);
+  }
+
+  bool isVCSrcTBF16() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_16RegClassID, MVT::bf16);
+  }
+
+  bool isVCSrcT_f16() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_16RegClassID, MVT::f16);
+  }
+
+  bool isVCSrcT_bf16() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_16RegClassID, MVT::f16);
+  }
+
+  bool isVCSrcTBF16_Lo128() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_16_Lo128RegClassID, MVT::bf16);
+  }
+
+  bool isVCSrcTF16_Lo128() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_16_Lo128RegClassID, MVT::f16);
+  }
+
+  bool isVCSrcFake16BF16_Lo128() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_32_Lo128RegClassID, MVT::bf16);
+  }
+
+  bool isVCSrcFake16F16_Lo128() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_32_Lo128RegClassID, MVT::f16);
+  }
+
+  bool isVCSrc_bf16() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_32RegClassID, MVT::bf16);
+  }
+
+  bool isVCSrc_f16() const {
+    return isRegOrInlineNoMods(AMDGPU::VS_32RegClassID, MVT::f16);
+  }
+
+  bool isVCSrc_v2bf16() const { return isVCSrc_bf16(); }
+
+  bool isVCSrc_v2f16() const { return isVCSrc_f16(); }
+
+  bool isVSrc_b32() const {
+    return isVCSrc_f32() || isLiteralImm(MVT::i32) || isExpr();
+  }
+
+  bool isVSrc_b64() const { return isVCSrc_f64() || isLiteralImm(MVT::i64); }
+
+  bool isVSrcT_b16() const { return isVCSrcT_b16() || isLiteralImm(MVT::i16); }
+
+  bool isVSrcT_b16_Lo128() const {
+    return isVCSrcTB16_Lo128() || isLiteralImm(MVT::i16);
+  }
+
+  bool isVSrcFake16_b16_Lo128() const {
+    return isVCSrcFake16B16_Lo128() || isLiteralImm(MVT::i16);
+  }
+
+  bool isVSrc_b16() const { return isVCSrc_b16() || isLiteralImm(MVT::i16); }
+
+  bool isVSrc_v2b16() const { return isVSrc_b16() || isLiteralImm(MVT::v2i16); }
+
+  bool isVCSrcV2FP32() const { return isVCSrc_f64(); }
+
+  bool isVSrc_v2f32() const { return isVSrc_f64() || isLiteralImm(MVT::v2f32); }
+
+  bool isVCSrc_v2b32() const { return isVCSrc_b64(); }
+
+  bool isVSrc_v2b32() const { return isVSrc_b64() || isLiteralImm(MVT::v2i32); }
+
+  bool isVSrc_f32() const {
+    return isVCSrc_f32() || isLiteralImm(MVT::f32) || isExpr();
+  }
+
+  bool isVSrc_f64() const { return isVCSrc_f64() || isLiteralImm(MVT::f64); }
+
+  bool isVSrcT_bf16() const { return isVCSrcTBF16() || isLiteralImm(MVT::bf16); }
+
+  bool isVSrcT_f16() const { return isVCSrcT_f16() || isLiteralImm(MVT::f16); }
+
+  bool isVSrcT_bf16_Lo128() const {
+    return isVCSrcTBF16_Lo128() || isLiteralImm(MVT::bf16);
+  }
+
+  bool isVSrcT_f16_Lo128() const {
+    return isVCSrcTF16_Lo128() || isLiteralImm(MVT::f16);
+  }
+
+  bool isVSrcFake16_bf16_Lo128() const {
+    return isVCSrcFake16BF16_Lo128() || isLiteralImm(MVT::bf16);
+  }
+
+  bool isVSrcFake16_f16_Lo128() const {
+    return isVCSrcFake16F16_Lo128() || isLiteralImm(MVT::f16);
+  }
+
+  bool isVSrc_bf16() const { return isVCSrc_bf16() || isLiteralImm(MVT::bf16); }
+
+  bool isVSrc_f16() const { return isVCSrc_f16() || isLiteralImm(MVT::f16); }
+
+  bool isVSrc_v2bf16() const {
+    return isVSrc_bf16() || isLiteralImm(MVT::v2bf16);
+  }
+
+  bool isVSrc_v2f16() const { return isVSrc_f16() || isLiteralImm(MVT::v2f16); }
+
+  bool isVSrc_v2f16_splat() const { return isVSrc_v2f16(); }
+
+  bool isVSrc_NoInline_v2f16() const { return isVSrc_v2f16(); }
+
+  bool isVISrcB32() const {
+    return isRegOrInlineNoMods(AMDGPU::VGPR_32RegClassID, MVT::i32);
+  }
+
+  bool isVISrcB16() const {
+    return isRegOrInlineNoMods(AMDGPU::VGPR_32RegClassID, MVT::i16);
+  }
+
+  bool isVISrcV2B16() const {
+    return isVISrcB16();
+  }
+
+  bool isVISrcF32() const {
+    return isRegOrInlineNoMods(AMDGPU::VGPR_32RegClassID, MVT::f32);
+  }
+
+  bool isVISrcF16() const {
+    return isRegOrInlineNoMods(AMDGPU::VGPR_32RegClassID, MVT::f16);
+  }
+
+  bool isVISrcV2F16() const {
+    return isVISrcF16() || isVISrcB32();
+  }
+
+  bool isVISrc_64_bf16() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::bf16);
+  }
+
+  bool isVISrc_64_f16() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::f16);
+  }
+
+  bool isVISrc_64_b32() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::i32);
+  }
+
+  bool isVISrc_64B64() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::i64);
+  }
+
+  bool isVISrc_64_f64() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::f64);
+  }
+
+  bool isVISrc_64V2FP32() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::f32);
+  }
+
+  bool isVISrc_64V2INT32() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::i32);
+  }
+
+  bool isVISrc_256_b32() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_256RegClassID, MVT::i32);
+  }
+
+  bool isVISrc_256_f32() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_256RegClassID, MVT::f32);
+  }
+
+  bool isVISrc_256B64() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_256RegClassID, MVT::i64);
+  }
+
+  bool isVISrc_256_f64() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_256RegClassID, MVT::f64);
+  }
+
+  bool isVISrc_512_f64() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_512RegClassID, MVT::f64);
+  }
+
+  bool isVISrc_128B16() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_128RegClassID, MVT::i16);
+  }
+
+  bool isVISrc_128V2B16() const {
+    return isVISrc_128B16();
+  }
+
+  bool isVISrc_128_b32() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_128RegClassID, MVT::i32);
+  }
+
+  bool isVISrc_128_f32() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_128RegClassID, MVT::f32);
+  }
+
+  bool isVISrc_256V2FP32() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_256RegClassID, MVT::f32);
+  }
+
+  bool isVISrc_256V2INT32() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_256RegClassID, MVT::i32);
+  }
+
+  bool isVISrc_512_b32() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_512RegClassID, MVT::i32);
+  }
+
+  bool isVISrc_512B16() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_512RegClassID, MVT::i16);
+  }
+
+  bool isVISrc_512V2B16() const {
+    return isVISrc_512B16();
+  }
+
+  bool isVISrc_512_f32() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_512RegClassID, MVT::f32);
+  }
+
+  bool isVISrc_512F16() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_512RegClassID, MVT::f16);
+  }
+
+  bool isVISrc_512V2F16() const {
+    return isVISrc_512F16() || isVISrc_512_b32();
+  }
+
+  bool isVISrc_1024_b32() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_1024RegClassID, MVT::i32);
+  }
+
+  bool isVISrc_1024B16() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_1024RegClassID, MVT::i16);
+  }
+
+  bool isVISrc_1024V2B16() const {
+    return isVISrc_1024B16();
+  }
+
+  bool isVISrc_1024_f32() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_1024RegClassID, MVT::f32);
+  }
+
+  bool isVISrc_1024F16() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_1024RegClassID, MVT::f16);
+  }
+
+  bool isVISrc_1024V2F16() const {
+    return isVISrc_1024F16() || isVISrc_1024_b32();
+  }
+
+  bool isAISrcB32() const {
+    return isRegOrInlineNoMods(AMDGPU::AGPR_32RegClassID, MVT::i32);
+  }
+
+  bool isAISrcB16() const {
+    return isRegOrInlineNoMods(AMDGPU::AGPR_32RegClassID, MVT::i16);
+  }
+
+  bool isAISrcV2B16() const {
+    return isAISrcB16();
+  }
+
+  bool isAISrcF32() const {
+    return isRegOrInlineNoMods(AMDGPU::AGPR_32RegClassID, MVT::f32);
+  }
+
+  bool isAISrcF16() const {
+    return isRegOrInlineNoMods(AMDGPU::AGPR_32RegClassID, MVT::f16);
+  }
+
+  bool isAISrcV2F16() const {
+    return isAISrcF16() || isAISrcB32();
+  }
+
+  bool isAISrc_64B64() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_64RegClassID, MVT::i64);
+  }
+
+  bool isAISrc_64_f64() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_64RegClassID, MVT::f64);
+  }
+
+  bool isAISrc_128_b32() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_128RegClassID, MVT::i32);
+  }
+
+  bool isAISrc_128B16() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_128RegClassID, MVT::i16);
+  }
+
+  bool isAISrc_128V2B16() const {
+    return isAISrc_128B16();
+  }
+
+  bool isAISrc_128_f32() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_128RegClassID, MVT::f32);
+  }
+
+  bool isAISrc_128F16() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_128RegClassID, MVT::f16);
+  }
+
+  bool isAISrc_128V2F16() const {
+    return isAISrc_128F16() || isAISrc_128_b32();
+  }
+
+  bool isVISrc_128_bf16() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_128RegClassID, MVT::bf16);
+  }
+
+  bool isVISrc_128_f16() const {
+    return isRegOrInlineNoMods(AMDGPU::VReg_128RegClassID, MVT::f16);
+  }
+
+  bool isVISrc_128V2F16() const {
+    return isVISrc_128_f16() || isVISrc_128_b32();
+  }
+
+  bool isAISrc_256B64() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_256RegClassID, MVT::i64);
+  }
+
+  bool isAISrc_256_f64() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_256RegClassID, MVT::f64);
+  }
+
+  bool isAISrc_512_b32() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_512RegClassID, MVT::i32);
+  }
+
+  bool isAISrc_512B16() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_512RegClassID, MVT::i16);
+  }
+
+  bool isAISrc_512V2B16() const {
+    return isAISrc_512B16();
+  }
+
+  bool isAISrc_512_f32() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_512RegClassID, MVT::f32);
+  }
+
+  bool isAISrc_512F16() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_512RegClassID, MVT::f16);
+  }
+
+  bool isAISrc_512V2F16() const {
+    return isAISrc_512F16() || isAISrc_512_b32();
+  }
+
+  bool isAISrc_1024_b32() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_1024RegClassID, MVT::i32);
+  }
+
+  bool isAISrc_1024B16() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_1024RegClassID, MVT::i16);
+  }
+
+  bool isAISrc_1024V2B16() const {
+    return isAISrc_1024B16();
+  }
+
+  bool isAISrc_1024_f32() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_1024RegClassID, MVT::f32);
+  }
+
+  bool isAISrc_1024F16() const {
+    return isRegOrInlineNoMods(AMDGPU::AReg_1024RegClassID, MVT::f16);
+  }
+
+  bool isAISrc_1024V2F16() const {
+    return isAISrc_1024F16() || isAISrc_1024_b32();
+  }
+
+  bool isKImmFP32() const {
+    return isLiteralImm(MVT::f32);
+  }
+
+  bool isKImmFP16() const {
+    return isLiteralImm(MVT::f16);
+  }
+
+  bool isKImmFP64() const { return isLiteralImm(MVT::f64); }
+
+  bool isMem() const override {
+    return false;
+  }
+
+  bool isExpr() const {
+    return Kind == Expression;
+  }
+
+  bool isSOPPBrTarget() const { return isExpr() || isImm(); }
+
+  bool isSWaitCnt() const;
+  bool isDepCtr() const;
+  bool isSDelayALU() const;
+  bool isHwreg() const;
+  bool isSendMsg() const;
+  bool isWaitEvent() const;
+  bool isSplitBarrier() const;
+  bool isSwizzle() const;
+  bool isSMRDOffset8() const;
+  bool isSMEMOffset() const;
+  bool isSMRDLiteralOffset() const;
+  bool isDPP8() const;
+  bool isDPPCtrl() const;
+  bool isBLGP() const;
+  bool isGPRIdxMode() const;
+  bool isS16Imm() const;
+  bool isU16Imm() const;
+  bool isEndpgm() const;
+
+  auto getPredicate(std::function<bool(const AMDGPUOperand &Op)> P) const {
+    return [this, P]() { return P(*this); };
+  }
+
+  StringRef getToken() const {
+    assert(isToken());
+    return StringRef(Tok.Data, Tok.Length);
+  }
+
+  int64_t getImm() const {
+    assert(isImm());
+    return Imm.Val;
+  }
+
+  void setImm(int64_t Val) {
+    assert(isImm());
+    Imm.Val = Val;
+  }
+
+  ImmTy getImmTy() const {
+    assert(isImm());
+    return Imm.Type;
+  }
+
+  MCRegister getReg() const override {
+    assert(isRegKind());
+    return Reg.RegNo;
+  }
+
+  SMLoc getStartLoc() const override {
+    return StartLoc;
+  }
+
+  SMLoc getEndLoc() const override {
+    return EndLoc;
+  }
+
+  SMRange getLocRange() const {
+    return SMRange(StartLoc, EndLoc);
+  }
+
+  int getMCOpIdx() const { return MCOpIdx; }
+
+  Modifiers getModifiers() const {
+    assert(isRegKind() || isImmTy(ImmTyNone));
+    return isRegKind() ? Reg.Mods : Imm.Mods;
+  }
+
+  void setModifiers(Modifiers Mods) {
+    assert(isRegKind() || isImmTy(ImmTyNone));
+    if (isRegKind())
+      Reg.Mods = Mods;
+    else
+      Imm.Mods = Mods;
+  }
+
+  bool hasModifiers() const {
+    return getModifiers().hasModifiers();
+  }
+
+  bool hasFPModifiers() const {
+    return getModifiers().hasFPModifiers();
+  }
+
+  bool hasIntModifiers() const {
+    return getModifiers().hasIntModifiers();
+  }
+
+  uint64_t applyInputFPModifiers(uint64_t Val, unsigned Size) const;
+
+  void addImmOperands(MCInst &Inst, unsigned N, bool ApplyModifiers = true) const;
+
+  void addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyModifiers) const;
+
+  void addRegOperands(MCInst &Inst, unsigned N) const;
+
+  void addRegOrImmOperands(MCInst &Inst, unsigned N) const {
+    if (isRegKind())
+      addRegOperands(Inst, N);
+    else
+      addImmOperands(Inst, N);
+  }
+
+  void addRegOrImmWithInputModsOperands(MCInst &Inst, unsigned N) const {
+    Modifiers Mods = getModifiers();
+    Inst.addOperand(MCOperand::createImm(Mods.getModifiersOperand()));
+    if (isRegKind()) {
+      addRegOperands(Inst, N);
+    } else {
+      addImmOperands(Inst, N, false);
+    }
+  }
+
+  void addRegOrImmWithFPInputModsOperands(MCInst &Inst, unsigned N) const {
+    assert(!hasIntModifiers());
+    addRegOrImmWithInputModsOperands(Inst, N);
+  }
+
+  void addRegOrImmWithIntInputModsOperands(MCInst &Inst, unsigned N) const {
+    assert(!hasFPModifiers());
+    addRegOrImmWithInputModsOperands(Inst, N);
+  }
+
+  void addRegWithInputModsOperands(MCInst &Inst, unsigned N) const {
+    Modifiers Mods = getModifiers();
+    Inst.addOperand(MCOperand::createImm(Mods.getModifiersOperand()));
+    assert(isRegKind());
+    addRegOperands(Inst, N);
+  }
+
+  void addRegWithFPInputModsOperands(MCInst &Inst, unsigned N) const {
+    assert(!hasIntModifiers());
+    addRegWithInputModsOperands(Inst, N);
+  }
+
+  void addRegWithIntInputModsOperands(MCInst &Inst, unsigned N) const {
+    assert(!hasFPModifiers());
+    addRegWithInputModsOperands(Inst, N);
+  }
+
+  static void printImmTy(raw_ostream& OS, ImmTy Type) {
+    // clang-format off
+    switch (Type) {
+    case ImmTyNone: OS << "None"; break;
+    case ImmTyGDS: OS << "GDS"; break;
+    case ImmTyLDS: OS << "LDS"; break;
+    case ImmTyOffen: OS << "Offen"; break;
+    case ImmTyIdxen: OS << "Idxen"; break;
+    case ImmTyAddr64: OS << "Addr64"; break;
+    case ImmTyOffset: OS << "Offset"; break;
+    case ImmTyInstOffset: OS << "InstOffset"; break;
+    case ImmTyOffset0: OS << "Offset0"; break;
+    case ImmTyOffset1: OS << "Offset1"; break;
+    case ImmTySMEMOffsetMod: OS << "SMEMOffsetMod"; break;
+    case ImmTyCPol: OS << "CPol"; break;
+    case ImmTyIndexKey8bit: OS << "index_key"; break;
+    case ImmTyIndexKey16bit: OS << "index_key"; break;
+    case ImmTyIndexKey32bit: OS << "index_key"; break;
+    case ImmTyTFE: OS << "TFE"; break;
+    case ImmTyIsAsync: OS << "IsAsync"; break;
+    case ImmTyD16: OS << "D16"; break;
+    case ImmTyFORMAT: OS << "FORMAT"; break;
+    case ImmTyClamp: OS << "Clamp"; break;
+    case ImmTyOModSI: OS << "OModSI"; break;
+    case ImmTyDPP8: OS << "DPP8"; break;
+    case ImmTyDppCtrl: OS << "DppCtrl"; break;
+    case ImmTyDppRowMask: OS << "DppRowMask"; break;
+    case ImmTyDppBankMask: OS << "DppBankMask"; break;
+    case ImmTyDppBoundCtrl: OS << "DppBoundCtrl"; break;
+    case ImmTyDppFI: OS << "DppFI"; break;
+    case ImmTySDWADstSel: OS << "SDWADstSel"; break;
+    case ImmTySDWASrc0Sel: OS << "SDWASrc0Sel"; break;
+    case ImmTySDWASrc1Sel: OS << "SDWASrc1Sel"; break;
+    case ImmTySDWADstUnused: OS << "SDWADstUnused"; break;
+    case ImmTyDMask: OS << "DMask"; break;
+    case ImmTyDim: OS << "Dim"; break;
+    case ImmTyUNorm: OS << "UNorm"; break;
+    case ImmTyDA: OS << "DA"; break;
+    case ImmTyR128A16: OS << "R128A16"; break;
+    case ImmTyA16: OS << "A16"; break;
+    case ImmTyLWE: OS << "LWE"; break;
+    case ImmTyOff: OS << "Off"; break;
+    case ImmTyExpTgt: OS << "ExpTgt"; break;
+    case ImmTyExpCompr: OS << "ExpCompr"; break;
+    case ImmTyExpVM: OS << "ExpVM"; break;
+    case ImmTyDone: OS << "Done"; break;
+    case ImmTyRowEn: OS << "RowEn"; break;
+    case ImmTyHwreg: OS << "Hwreg"; break;
+    case ImmTySendMsg: OS << "SendMsg"; break;
+    case ImmTyWaitEvent: OS << "WaitEvent"; break;
+    case ImmTyInterpSlot: OS << "InterpSlot"; break;
+    case ImmTyInterpAttr: OS << "InterpAttr"; break;
+    case ImmTyInterpAttrChan: OS << "InterpAttrChan"; break;
+    case ImmTyOpSel: OS << "OpSel"; break;
+    case ImmTyOpSelHi: OS << "OpSelHi"; break;
+    case ImmTyNegLo: OS << "NegLo"; break;
+    case ImmTyNegHi: OS << "NegHi"; break;
+    case ImmTySwizzle: OS << "Swizzle"; break;
+    case ImmTyGprIdxMode: OS << "GprIdxMode"; break;
+    case ImmTyHigh: OS << "High"; break;
+    case ImmTyBLGP: OS << "BLGP"; break;
+    case ImmTyCBSZ: OS << "CBSZ"; break;
+    case ImmTyABID: OS << "ABID"; break;
+    case ImmTyEndpgm: OS << "Endpgm"; break;
+    case ImmTyWaitVDST: OS << "WaitVDST"; break;
+    case ImmTyWaitEXP: OS << "WaitEXP"; break;
+    case ImmTyWaitVAVDst: OS << "WaitVAVDst"; break;
+    case ImmTyWaitVMVSrc: OS << "WaitVMVSrc"; break;
+    case ImmTyBitOp3: OS << "BitOp3"; break;
+    case ImmTyMatrixAFMT: OS << "ImmTyMatrixAFMT"; break;
+    case ImmTyMatrixBFMT: OS << "ImmTyMatrixBFMT"; break;
+    case ImmTyMatrixAScale: OS << "ImmTyMatrixAScale"; break;
+    case ImmTyMatrixBScale: OS << "ImmTyMatrixBScale"; break;
+    case ImmTyMatrixAScaleFmt: OS << "ImmTyMatrixAScaleFmt"; break;
+    case ImmTyMatrixBScaleFmt: OS << "ImmTyMatrixBScaleFmt"; break;
+    case ImmTyMatrixAReuse: OS << "ImmTyMatrixAReuse"; break;
+    case ImmTyMatrixBReuse: OS << "ImmTyMatrixBReuse"; break;
+    case ImmTyScaleSel: OS << "ScaleSel" ; break;
+    case ImmTyByteSel: OS << "ByteSel" ; break;
+    }
+    // clang-format on
+  }
+
+  void print(raw_ostream &OS, const MCAsmInfo &MAI) const override {
+    switch (Kind) {
+    case Register:
+      OS << "<register " << AMDGPUInstPrinter::getRegisterName(getReg())
+         << " mods: " << Reg.Mods << '>';
+      break;
+    case Immediate:
+      OS << '<' << getImm();
+      if (getImmTy() != ImmTyNone) {
+        OS << " type: "; printImmTy(OS, getImmTy());
+      }
+      OS << " mods: " << Imm.Mods << '>';
+      break;
+    case Token:
+      OS << '\'' << getToken() << '\'';
+      break;
+    case Expression:
+      OS << "<expr ";
+      MAI.printExpr(OS, *Expr);
+      OS << '>';
+      break;
+    }
+  }
+
+  static AMDGPUOperand::Ptr CreateImm(const AMDGPUAsmParser *AsmParser,
+                                      int64_t Val, SMLoc Loc,
+                                      ImmTy Type = ImmTyNone,
+                                      bool IsFPImm = false) {
+    auto Op = std::make_unique<AMDGPUOperand>(Immediate, AsmParser);
+    Op->Imm.Val = Val;
+    Op->Imm.IsFPImm = IsFPImm;
+    Op->Imm.Type = Type;
+    Op->Imm.Mods = Modifiers();
+    Op->StartLoc = Loc;
+    Op->EndLoc = Loc;
+    return Op;
+  }
+
+  static AMDGPUOperand::Ptr CreateToken(const AMDGPUAsmParser *AsmParser,
+                                        StringRef Str, SMLoc Loc,
+                                        bool HasExplicitEncodingSize = true) {
+    auto Res = std::make_unique<AMDGPUOperand>(Token, AsmParser);
+    Res->Tok.Data = Str.data();
+    Res->Tok.Length = Str.size();
+    Res->StartLoc = Loc;
+    Res->EndLoc = Loc;
+    return Res;
+  }
+
+  static AMDGPUOperand::Ptr CreateReg(const AMDGPUAsmParser *AsmParser,
+                                      MCRegister Reg, SMLoc S, SMLoc E) {
+    auto Op = std::make_unique<AMDGPUOperand>(Register, AsmParser);
+    Op->Reg.RegNo = Reg;
+    Op->Reg.Mods = Modifiers();
+    Op->StartLoc = S;
+    Op->EndLoc = E;
+    return Op;
+  }
+
+  static AMDGPUOperand::Ptr CreateExpr(const AMDGPUAsmParser *AsmParser,
+                                       const class MCExpr *Expr, SMLoc S) {
+    auto Op = std::make_unique<AMDGPUOperand>(Expression, AsmParser);
+    Op->Expr = Expr;
+    Op->StartLoc = S;
+    Op->EndLoc = S;
+    return Op;
+  }
+};
+
+raw_ostream &operator <<(raw_ostream &OS, AMDGPUOperand::Modifiers Mods) {
+  OS << "abs:" << Mods.Abs << " neg: " << Mods.Neg << " sext:" << Mods.Sext;
+  return OS;
+}
+
+//===----------------------------------------------------------------------===//
+// AsmParser
+//===----------------------------------------------------------------------===//
+
+// TODO: define GET_SUBTARGET_FEATURE_NAME
+#define GET_REGISTER_MATCHER
+#include "AMDGPUGenAsmMatcher.inc"
+#undef GET_REGISTER_MATCHER
+#undef GET_SUBTARGET_FEATURE_NAME
+
+// Holds info related to the current kernel, e.g. count of SGPRs used.
+// Kernel scope begins at .amdgpu_hsa_kernel directive, ends at next
+// .amdgpu_hsa_kernel or at EOF.
+class KernelScopeInfo {
+  int SgprIndexUnusedMin = -1;
+  int VgprIndexUnusedMin = -1;
+  int AgprIndexUnusedMin = -1;
+  MCContext *Ctx = nullptr;
+  MCSubtargetInfo const *MSTI = nullptr;
+
+  void usesSgprAt(int i) {
+    if (i >= SgprIndexUnusedMin) {
+      SgprIndexUnusedMin = ++i;
+      if (Ctx) {
+        MCSymbol* const Sym =
+          Ctx->getOrCreateSymbol(Twine(".kernel.sgpr_count"));
+        Sym->setVariableValue(MCConstantExpr::create(SgprIndexUnusedMin, *Ctx));
+      }
+    }
+  }
+
+  void usesVgprAt(int i) {
+    if (i >= VgprIndexUnusedMin) {
+      VgprIndexUnusedMin = ++i;
+      if (Ctx) {
+        MCSymbol* const Sym =
+          Ctx->getOrCreateSymbol(Twine(".kernel.vgpr_count"));
+        int totalVGPR = getTotalNumVGPRs(isGFX90A(*MSTI), AgprIndexUnusedMin,
+                                         VgprIndexUnusedMin);
+        Sym->setVariableValue(MCConstantExpr::create(totalVGPR, *Ctx));
+      }
+    }
+  }
+
+  void usesAgprAt(int i) {
+    // Instruction will error in AMDGPUAsmParser::matchAndEmitInstruction
+    if (!hasMAIInsts(*MSTI))
+      return;
+
+    if (i >= AgprIndexUnusedMin) {
+      AgprIndexUnusedMin = ++i;
+      if (Ctx) {
+        MCSymbol* const Sym =
+          Ctx->getOrCreateSymbol(Twine(".kernel.agpr_count"));
+        Sym->setVariableValue(MCConstantExpr::create(AgprIndexUnusedMin, *Ctx));
+
+        // Also update vgpr_count (dependent on agpr_count for gfx908/gfx90a)
+        MCSymbol* const vSym =
+          Ctx->getOrCreateSymbol(Twine(".kernel.vgpr_count"));
+        int totalVGPR = getTotalNumVGPRs(isGFX90A(*MSTI), AgprIndexUnusedMin,
+                                         VgprIndexUnusedMin);
+        vSym->setVariableValue(MCConstantExpr::create(totalVGPR, *Ctx));
+      }
+    }
+  }
+
+public:
+  KernelScopeInfo() = default;
+
+  void initialize(MCContext &Context) {
+    Ctx = &Context;
+    MSTI = Ctx->getSubtargetInfo();
+
+    usesSgprAt(SgprIndexUnusedMin = -1);
+    usesVgprAt(VgprIndexUnusedMin = -1);
+    if (hasMAIInsts(*MSTI)) {
+      usesAgprAt(AgprIndexUnusedMin = -1);
+    }
+  }
+
+  void usesRegister(RegisterKind RegKind, unsigned DwordRegIndex,
+                    unsigned RegWidth) {
+    switch (RegKind) {
+    case IS_SGPR:
+      usesSgprAt(DwordRegIndex + divideCeil(RegWidth, 32) - 1);
+      break;
+    case IS_AGPR:
+      usesAgprAt(DwordRegIndex + divideCeil(RegWidth, 32) - 1);
+      break;
+    case IS_VGPR:
+      usesVgprAt(DwordRegIndex + divideCeil(RegWidth, 32) - 1);
+      break;
+    default:
+      break;
+    }
+  }
+};
+
+class AMDGPUAsmParser : public MCTargetAsmParser {
+  MCAsmParser &Parser;
+
+  unsigned ForcedEncodingSize = 0;
+  bool ForcedDPP = false;
+  bool ForcedSDWA = false;
+  KernelScopeInfo KernelScope;
+  const unsigned HwMode;
+
+  /// @name Auto-generated Match Functions
+  /// {
+
+#define GET_ASSEMBLER_HEADER
+#include "AMDGPUGenAsmMatcher.inc"
+
+  /// }
+
+  /// Get size of register operand
+  unsigned getRegOperandSize(const MCInstrDesc &Desc, unsigned OpNo) const {
+    assert(OpNo < Desc.NumOperands);
+    int16_t RCID = MII.getOpRegClassID(Desc.operands()[OpNo], HwMode);
+    return getRegBitWidth(RCID) / 8;
+  }
+
+private:
+  void createConstantSymbol(StringRef Id, int64_t Val);
+
+  bool ParseAsAbsoluteExpression(uint32_t &Ret);
+  bool OutOfRangeError(SMRange Range);
+  /// Calculate VGPR/SGPR blocks required for given target, reserved
+  /// registers, and user-specified NextFreeXGPR values.
+  ///
+  /// \param Features [in] Target features, used for bug corrections.
+  /// \param VCCUsed [in] Whether VCC special SGPR is reserved.
+  /// \param FlatScrUsed [in] Whether FLAT_SCRATCH special SGPR is reserved.
+  /// \param XNACKUsed [in] Whether XNACK_MASK special SGPR is reserved.
+  /// \param EnableWavefrontSize32 [in] Value of ENABLE_WAVEFRONT_SIZE32 kernel
+  /// descriptor field, if valid.
+  /// \param NextFreeVGPR [in] Max VGPR number referenced, plus one.
+  /// \param VGPRRange [in] Token range, used for VGPR diagnostics.
+  /// \param NextFreeSGPR [in] Max SGPR number referenced, plus one.
+  /// \param SGPRRange [in] Token range, used for SGPR diagnostics.
+  /// \param VGPRBlocks [out] Result VGPR block count.
+  /// \param SGPRBlocks [out] Result SGPR block count.
+  bool calculateGPRBlocks(const FeatureBitset &Features, const MCExpr *VCCUsed,
+                          const MCExpr *FlatScrUsed, bool XNACKUsed,
+                          std::optional<bool> EnableWavefrontSize32,
+                          const MCExpr *NextFreeVGPR, SMRange VGPRRange,
+                          const MCExpr *NextFreeSGPR, SMRange SGPRRange,
+                          const MCExpr *&VGPRBlocks, const MCExpr *&SGPRBlocks);
+  bool ParseDirectiveAMDGCNTarget();
+  bool ParseDirectiveAMDHSACodeObjectVersion();
+  bool ParseDirectiveAMDHSAKernel();
+  bool ParseAMDKernelCodeTValue(StringRef ID, AMDGPUMCKernelCodeT &Header);
+  bool ParseDirectiveAMDKernelCodeT();
+  // TODO: Possibly make subtargetHasRegister const.
+  bool subtargetHasRegister(const MCRegisterInfo &MRI, MCRegister Reg);
+  bool ParseDirectiveAMDGPUHsaKernel();
+
+  bool ParseDirectiveISAVersion();
+  bool ParseDirectiveHSAMetadata();
+  bool ParseDirectivePALMetadataBegin();
+  bool ParseDirectivePALMetadata();
+  bool ParseDirectiveAMDGPULDS();
+
+  /// Common code to parse out a block of text (typically YAML) between start and
+  /// end directives.
+  bool ParseToEndDirective(const char *AssemblerDirectiveBegin,
+                           const char *AssemblerDirectiveEnd,
+                           std::string &CollectString);
+
+  bool AddNextRegisterToList(MCRegister &Reg, unsigned &RegWidth,
+                             RegisterKind RegKind, MCRegister Reg1, SMLoc Loc);
+  bool ParseAMDGPURegister(RegisterKind &RegKind, MCRegister &Reg,
+                           unsigned &RegNum, unsigned &RegWidth,
+                           bool RestoreOnFailure = false);
+  bool ParseAMDGPURegister(RegisterKind &RegKind, MCRegister &Reg,
+                           unsigned &RegNum, unsigned &RegWidth,
+                           SmallVectorImpl<AsmToken> &Tokens);
+  MCRegister ParseRegularReg(RegisterKind &RegKind, unsigned &RegNum,
+                             unsigned &RegWidth,
+                             SmallVectorImpl<AsmToken> &Tokens);
+  MCRegister ParseSpecialReg(RegisterKind &RegKind, unsigned &RegNum,
+                             unsigned &RegWidth,
+                             SmallVectorImpl<AsmToken> &Tokens);
+  MCRegister ParseRegList(RegisterKind &RegKind, unsigned &RegNum,
+                          unsigned &RegWidth,
+                          SmallVectorImpl<AsmToken> &Tokens);
+  bool ParseRegRange(unsigned &Num, unsigned &Width, unsigned &SubReg);
+  MCRegister getRegularReg(RegisterKind RegKind, unsigned RegNum,
+                           unsigned SubReg, unsigned RegWidth, SMLoc Loc);
+
+  bool isRegister();
+  bool isRegister(const AsmToken &Token, const AsmToken &NextToken) const;
+  std::optional<StringRef> getGprCountSymbolName(RegisterKind RegKind);
+  void initializeGprCountSymbol(RegisterKind RegKind);
+  bool updateGprCountSymbols(RegisterKind RegKind, unsigned DwordRegIndex,
+                             unsigned RegWidth);
+  void cvtMubufImpl(MCInst &Inst, const OperandVector &Operands,
+                    bool IsAtomic);
+
+public:
+  enum OperandMode {
+    OperandMode_Default,
+    OperandMode_NSA,
+  };
+
+  using OptionalImmIndexMap = std::map<AMDGPUOperand::ImmTy, unsigned>;
+
+  AMDGPUAsmParser(const MCSubtargetInfo &STI, MCAsmParser &_Parser,
+                  const MCInstrInfo &MII, const MCTargetOptions &Options)
+      : MCTargetAsmParser(Options, STI, MII), Parser(_Parser),
+        HwMode(STI.getHwMode(MCSubtargetInfo::HwMode_RegInfo)) {
+    MCAsmParserExtension::Initialize(Parser);
+
+    setAvailableFeatures(ComputeAvailableFeatures(getFeatureBits()));
+
+    AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU());
+    if (ISA.Major >= 6 && isHsaAbi(getSTI())) {
+      createConstantSymbol(".amdgcn.gfx_generation_number", ISA.Major);
+      createConstantSymbol(".amdgcn.gfx_generation_minor", ISA.Minor);
+      createConstantSymbol(".amdgcn.gfx_generation_stepping", ISA.Stepping);
+    } else {
+      createConstantSymbol(".option.machine_version_major", ISA.Major);
+      createConstantSymbol(".option.machine_version_minor", ISA.Minor);
+      createConstantSymbol(".option.machine_version_stepping", ISA.Stepping);
+    }
+    if (ISA.Major >= 6 && isHsaAbi(getSTI())) {
+      initializeGprCountSymbol(IS_VGPR);
+      initializeGprCountSymbol(IS_SGPR);
+    } else
+      KernelScope.initialize(getContext());
+
+    for (auto [Symbol, Code] : AMDGPU::UCVersion::getGFXVersions())
+      createConstantSymbol(Symbol, Code);
+
+    createConstantSymbol("UC_VERSION_W64_BIT", 0x2000);
+    createConstantSymbol("UC_VERSION_W32_BIT", 0x4000);
+    createConstantSymbol("UC_VERSION_MDP_BIT", 0x8000);
+  }
+
+  bool hasMIMG_R128() const {
+    return AMDGPU::hasMIMG_R128(getSTI());
+  }
+
+  bool hasPackedD16() const {
+    return AMDGPU::hasPackedD16(getSTI());
+  }
+
+  bool hasA16() const { return AMDGPU::hasA16(getSTI()); }
+
+  bool hasG16() const { return AMDGPU::hasG16(getSTI()); }
+
+  bool hasGDS() const { return AMDGPU::hasGDS(getSTI()); }
+
+  bool isSI() const {
+    return AMDGPU::isSI(getSTI());
+  }
+
+  bool isCI() const {
+    return AMDGPU::isCI(getSTI());
+  }
+
+  bool isVI() const {
+    return AMDGPU::isVI(getSTI());
+  }
+
+  bool isGFX9() const {
+    return AMDGPU::isGFX9(getSTI());
+  }
+
+  // TODO: isGFX90A is also true for GFX940. We need to clean it.
+  bool isGFX90A() const {
+    return AMDGPU::isGFX90A(getSTI());
+  }
+
+  bool isGFX940() const {
+    return AMDGPU::isGFX940(getSTI());
+  }
+
+  bool isGFX9Plus() const {
+    return AMDGPU::isGFX9Plus(getSTI());
+  }
+
+  bool isGFX10() const {
+    return AMDGPU::isGFX10(getSTI());
+  }
+
+  bool isGFX10Plus() const { return AMDGPU::isGFX10Plus(getSTI()); }
+
+  bool isGFX11() const {
+    return AMDGPU::isGFX11(getSTI());
+  }
+
+  bool isGFX11Plus() const {
+    return AMDGPU::isGFX11Plus(getSTI());
+  }
+
+  bool isGFX12() const { return AMDGPU::isGFX12(getSTI()); }
+
+  bool isGFX12Plus() const { return AMDGPU::isGFX12Plus(getSTI()); }
+
+  bool isGFX1250() const { return AMDGPU::isGFX1250(getSTI()); }
+
+  bool isGFX1250Plus() const { return AMDGPU::isGFX1250Plus(getSTI()); }
+
+  bool isGFX13() const { return AMDGPU::isGFX13(getSTI()); }
+
+  bool isGFX13Plus() const { return AMDGPU::isGFX13Plus(getSTI()); }
+
+  bool isGFX10_AEncoding() const { return AMDGPU::isGFX10_AEncoding(getSTI()); }
+
+  bool isGFX10_BEncoding() const {
+    return AMDGPU::isGFX10_BEncoding(getSTI());
+  }
+
+  bool isWave32() const { return getAvailableFeatures()[Feature_isWave32Bit]; }
+
+  bool isWave64() const { return getAvailableFeatures()[Feature_isWave64Bit]; }
+
+  bool hasInv2PiInlineImm() const {
+    return getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm];
+  }
+
+  bool has64BitLiterals() const {
+    return getFeatureBits()[AMDGPU::Feature64BitLiterals];
+  }
+
+  bool hasFlatOffsets() const {
+    return getFeatureBits()[AMDGPU::FeatureFlatInstOffsets];
+  }
+
+  bool hasTrue16Insts() const {
+    return getFeatureBits()[AMDGPU::FeatureTrue16BitInsts];
+  }
+
+  bool hasArchitectedFlatScratch() const {
+    return getFeatureBits()[AMDGPU::FeatureArchitectedFlatScratch];
+  }
+
+  bool hasSGPR102_SGPR103() const {
+    return !isVI() && !isGFX9();
+  }
+
+  bool hasSGPR104_SGPR105() const { return isGFX10Plus(); }
+
+  bool hasIntClamp() const {
+    return getFeatureBits()[AMDGPU::FeatureIntClamp];
+  }
+
+  bool hasPartialNSAEncoding() const {
+    return getFeatureBits()[AMDGPU::FeaturePartialNSAEncoding];
+  }
+
+  bool hasGloballyAddressableScratch() const {
+    return getFeatureBits()[AMDGPU::FeatureGloballyAddressableScratch];
+  }
+
+  unsigned getNSAMaxSize(bool HasSampler = false) const {
+    return AMDGPU::getNSAMaxSize(getSTI(), HasSampler);
+  }
+
+  unsigned getMaxNumUserSGPRs() const {
+    return AMDGPU::getMaxNumUserSGPRs(getSTI());
+  }
+
+  bool hasKernargPreload() const { return AMDGPU::hasKernargPreload(getSTI()); }
+
+  AMDGPUTargetStreamer &getTargetStreamer() {
+    MCTargetStreamer &TS = *getParser().getStreamer().getTargetStreamer();
+    return static_cast<AMDGPUTargetStreamer &>(TS);
+  }
+
+  MCContext &getContext() const {
+    // We need this const_cast because for some reason getContext() is not const
+    // in MCAsmParser.
+    return const_cast<AMDGPUAsmParser *>(this)->MCTargetAsmParser::getContext();
+  }
+
+  const MCRegisterInfo *getMRI() const {
+    return getContext().getRegisterInfo();
+  }
+
+  const MCInstrInfo *getMII() const {
+    return &MII;
+  }
+
+  // FIXME: This should not be used. Instead, should use queries derived from
+  // getAvailableFeatures().
+  const FeatureBitset &getFeatureBits() const {
+    return getSTI().getFeatureBits();
+  }
+
+  void setForcedEncodingSize(unsigned Size) { ForcedEncodingSize = Size; }
+  void setForcedDPP(bool ForceDPP_) { ForcedDPP = ForceDPP_; }
+  void setForcedSDWA(bool ForceSDWA_) { ForcedSDWA = ForceSDWA_; }
+
+  unsigned getForcedEncodingSize() const { return ForcedEncodingSize; }
+  bool isForcedVOP3() const { return ForcedEncodingSize == 64; }
+  bool isForcedDPP() const { return ForcedDPP; }
+  bool isForcedSDWA() const { return ForcedSDWA; }
+  ArrayRef<unsigned> getMatchedVariants() const;
+  StringRef getMatchedVariantName() const;
+
+  std::unique_ptr<AMDGPUOperand> parseRegister(bool RestoreOnFailure = false);
+  bool ParseRegister(MCRegister &RegNo, SMLoc &StartLoc, SMLoc &EndLoc,
+                     bool RestoreOnFailure);
+  bool parseRegister(MCRegister &Reg, SMLoc &StartLoc, SMLoc &EndLoc) override;
+  ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
+                               SMLoc &EndLoc) override;
+  unsigned checkTargetMatchPredicate(MCInst &Inst) override;
+  unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
+                                      unsigned Kind) override;
+  bool matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
+                               OperandVector &Operands, MCStreamer &Out,
+                               uint64_t &ErrorInfo,
+                               bool MatchingInlineAsm) override;
+  bool ParseDirective(AsmToken DirectiveID) override;
+  ParseStatus parseOperand(OperandVector &Operands, StringRef Mnemonic,
+                           OperandMode Mode = OperandMode_Default);
+  StringRef parseMnemonicSuffix(StringRef Name);
+  bool parseInstruction(ParseInstructionInfo &Info, StringRef Name,
+                        SMLoc NameLoc, OperandVector &Operands) override;
+  //bool ProcessInstruction(MCInst &Inst);
+
+  ParseStatus parseTokenOp(StringRef Name, OperandVector &Operands);
+
+  ParseStatus parseIntWithPrefix(const char *Prefix, int64_t &Int);
+
+  ParseStatus
+  parseIntWithPrefix(const char *Prefix, OperandVector &Operands,
+                     AMDGPUOperand::ImmTy ImmTy = AMDGPUOperand::ImmTyNone,
+                     std::function<bool(int64_t &)> ConvertResult = nullptr);
+
+  ParseStatus parseOperandArrayWithPrefix(
+      const char *Prefix, OperandVector &Operands,
+      AMDGPUOperand::ImmTy ImmTy = AMDGPUOperand::ImmTyNone,
+      bool (*ConvertResult)(int64_t &) = nullptr);
+
+  ParseStatus
+  parseNamedBit(StringRef Name, OperandVector &Operands,
+                AMDGPUOperand::ImmTy ImmTy = AMDGPUOperand::ImmTyNone,
+                bool IgnoreNegative = false);
+  unsigned getCPolKind(StringRef Id, StringRef Mnemo, bool &Disabling) const;
+  ParseStatus parseCPol(OperandVector &Operands);
+  ParseStatus parseScope(OperandVector &Operands, int64_t &Scope);
+  ParseStatus parseTH(OperandVector &Operands, int64_t &TH);
+  ParseStatus parseStringWithPrefix(StringRef Prefix, StringRef &Value,
+                                    SMLoc &StringLoc);
+  ParseStatus parseStringOrIntWithPrefix(OperandVector &Operands,
+                                         StringRef Name,
+                                         ArrayRef<const char *> Ids,
+                                         int64_t &IntVal);
+  ParseStatus parseStringOrIntWithPrefix(OperandVector &Operands,
+                                         StringRef Name,
+                                         ArrayRef<const char *> Ids,
+                                         AMDGPUOperand::ImmTy Type);
+
+  bool isModifier();
+  bool isOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const;
+  bool isRegOrOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const;
+  bool isNamedOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const;
+  bool isOpcodeModifierWithVal(const AsmToken &Token, const AsmToken &NextToken) const;
+  bool parseSP3NegModifier();
+  ParseStatus parseImm(OperandVector &Operands, bool HasSP3AbsModifier = false,
+                       LitModifier Lit = LitModifier::None);
+  ParseStatus parseReg(OperandVector &Operands);
+  ParseStatus parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false,
+                            LitModifier Lit = LitModifier::None);
+  ParseStatus parseRegOrImmWithFPInputMods(OperandVector &Operands,
+                                           bool AllowImm = true);
+  ParseStatus parseRegOrImmWithIntInputMods(OperandVector &Operands,
+                                            bool AllowImm = true);
+  ParseStatus parseRegWithFPInputMods(OperandVector &Operands);
+  ParseStatus parseRegWithIntInputMods(OperandVector &Operands);
+  ParseStatus parseVReg32OrOff(OperandVector &Operands);
+  ParseStatus tryParseIndexKey(OperandVector &Operands,
+                               AMDGPUOperand::ImmTy ImmTy);
+  ParseStatus parseIndexKey8bit(OperandVector &Operands);
+  ParseStatus parseIndexKey16bit(OperandVector &Operands);
+  ParseStatus parseIndexKey32bit(OperandVector &Operands);
+  ParseStatus tryParseMatrixFMT(OperandVector &Operands, StringRef Name,
+                                AMDGPUOperand::ImmTy Type);
+  ParseStatus parseMatrixAFMT(OperandVector &Operands);
+  ParseStatus parseMatrixBFMT(OperandVector &Operands);
+  ParseStatus tryParseMatrixScale(OperandVector &Operands, StringRef Name,
+                                  AMDGPUOperand::ImmTy Type);
+  ParseStatus parseMatrixAScale(OperandVector &Operands);
+  ParseStatus parseMatrixBScale(OperandVector &Operands);
+  ParseStatus tryParseMatrixScaleFmt(OperandVector &Operands, StringRef Name,
+                                     AMDGPUOperand::ImmTy Type);
+  ParseStatus parseMatrixAScaleFmt(OperandVector &Operands);
+  ParseStatus parseMatrixBScaleFmt(OperandVector &Operands);
+
+  ParseStatus parseDfmtNfmt(int64_t &Format);
+  ParseStatus parseUfmt(int64_t &Format);
+  ParseStatus parseSymbolicSplitFormat(StringRef FormatStr, SMLoc Loc,
+                                       int64_t &Format);
+  ParseStatus parseSymbolicUnifiedFormat(StringRef FormatStr, SMLoc Loc,
+                                         int64_t &Format);
+  ParseStatus parseFORMAT(OperandVector &Operands);
+  ParseStatus parseSymbolicOrNumericFormat(int64_t &Format);
+  ParseStatus parseNumericFormat(int64_t &Format);
+  ParseStatus parseFlatOffset(OperandVector &Operands);
+  ParseStatus parseR128A16(OperandVector &Operands);
+  ParseStatus parseBLGP(OperandVector &Operands);
+  bool tryParseFmt(const char *Pref, int64_t MaxVal, int64_t &Val);
+  bool matchDfmtNfmt(int64_t &Dfmt, int64_t &Nfmt, StringRef FormatStr, SMLoc Loc);
+
+  void cvtExp(MCInst &Inst, const OperandVector &Operands);
+
+  bool parseCnt(int64_t &IntVal);
+  ParseStatus parseSWaitCnt(OperandVector &Operands);
+
+  bool parseDepCtr(int64_t &IntVal, unsigned &Mask);
+  void depCtrError(SMLoc Loc, int ErrorId, StringRef DepCtrName);
+  ParseStatus parseDepCtr(OperandVector &Operands);
+
+  bool parseDelay(int64_t &Delay);
+  ParseStatus parseSDelayALU(OperandVector &Operands);
+
+  ParseStatus parseHwreg(OperandVector &Operands);
+
+private:
+  struct OperandInfoTy {
+    SMLoc Loc;
+    int64_t Val;
+    bool IsSymbolic = false;
+    bool IsDefined = false;
+
+    constexpr OperandInfoTy(int64_t Val) : Val(Val) {}
+  };
+
+  struct StructuredOpField : OperandInfoTy {
+    StringLiteral Id;
+    StringLiteral Desc;
+    unsigned Width;
+    bool IsDefined = false;
+
+    constexpr StructuredOpField(StringLiteral Id, StringLiteral Desc,
+                                unsigned Width, int64_t Default)
+        : OperandInfoTy(Default), Id(Id), Desc(Desc), Width(Width) {}
+    virtual ~StructuredOpField() = default;
+
+    bool Error(AMDGPUAsmParser &Parser, const Twine &Err) const {
+      Parser.Error(Loc, "invalid " + Desc + ": " + Err);
+      return false;
+    }
+
+    virtual bool validate(AMDGPUAsmParser &Parser) const {
+      if (IsSymbolic && Val == OPR_ID_UNSUPPORTED)
+        return Error(Parser, "not supported on this GPU");
+      if (!isUIntN(Width, Val))
+        return Error(Parser, "only " + Twine(Width) + "-bit values are legal");
+      return true;
+    }
+  };
+
+  ParseStatus parseStructuredOpFields(ArrayRef<StructuredOpField *> Fields);
+  bool validateStructuredOpFields(ArrayRef<const StructuredOpField *> Fields);
+
+  bool parseSendMsgBody(OperandInfoTy &Msg, OperandInfoTy &Op, OperandInfoTy &Stream);
+  bool validateSendMsg(const OperandInfoTy &Msg,
+                       const OperandInfoTy &Op,
+                       const OperandInfoTy &Stream);
+
+  ParseStatus parseHwregFunc(OperandInfoTy &HwReg, OperandInfoTy &Offset,
+                             OperandInfoTy &Width);
+
+  static SMLoc getLaterLoc(SMLoc a, SMLoc b);
+
+  SMLoc getFlatOffsetLoc(const OperandVector &Operands) const;
+  SMLoc getSMEMOffsetLoc(const OperandVector &Operands) const;
+  SMLoc getBLGPLoc(const OperandVector &Operands) const;
+
+  SMLoc getOperandLoc(const OperandVector &Operands, int MCOpIdx) const;
+  SMLoc getOperandLoc(std::function<bool(const AMDGPUOperand&)> Test,
+                      const OperandVector &Operands) const;
+  SMLoc getImmLoc(AMDGPUOperand::ImmTy Type,
+                  const OperandVector &Operands) const;
+  SMLoc getInstLoc(const OperandVector &Operands) const;
+
+  bool validateInstruction(const MCInst &Inst, SMLoc IDLoc,
+                           const OperandVector &Operands);
+  bool validateOffset(const MCInst &Inst, const OperandVector &Operands);
+  bool validateFlatOffset(const MCInst &Inst, const OperandVector &Operands);
+  bool validateSMEMOffset(const MCInst &Inst, const OperandVector &Operands);
+  bool validateSOPLiteral(const MCInst &Inst, const OperandVector &Operands);
+  bool validateConstantBusLimitations(const MCInst &Inst, const OperandVector &Operands);
+  std::optional<unsigned> checkVOPDRegBankConstraints(const MCInst &Inst,
+                                                      bool AsVOPD3);
+  bool validateVOPD(const MCInst &Inst, const OperandVector &Operands);
+  bool tryVOPD(const MCInst &Inst);
+  bool tryVOPD3(const MCInst &Inst);
+  bool tryAnotherVOPDEncoding(const MCInst &Inst);
+
+  bool validateIntClampSupported(const MCInst &Inst);
+  bool validateMIMGAtomicDMask(const MCInst &Inst);
+  bool validateMIMGGatherDMask(const MCInst &Inst);
+  bool validateMovrels(const MCInst &Inst, const OperandVector &Operands);
+  bool validateMIMGDataSize(const MCInst &Inst, SMLoc IDLoc);
+  bool validateMIMGAddrSize(const MCInst &Inst, SMLoc IDLoc);
+  bool validateMIMGD16(const MCInst &Inst);
+  bool validateMIMGDim(const MCInst &Inst, const OperandVector &Operands);
+  bool validateTensorR128(const MCInst &Inst);
+  bool validateMIMGMSAA(const MCInst &Inst);
+  bool validateOpSel(const MCInst &Inst);
+  bool validateTrue16OpSel(const MCInst &Inst);
+  bool validateNeg(const MCInst &Inst, AMDGPU::OpName OpName);
+  bool validateDPP(const MCInst &Inst, const OperandVector &Operands);
+  bool validateVccOperand(MCRegister Reg) const;
+  bool validateVOPLiteral(const MCInst &Inst, const OperandVector &Operands);
+  bool validateMAIAccWrite(const MCInst &Inst, const OperandVector &Operands);
+  bool validateMAISrc2(const MCInst &Inst, const OperandVector &Operands);
+  bool validateMFMA(const MCInst &Inst, const OperandVector &Operands);
+  bool validateAGPRLdSt(const MCInst &Inst) const;
+  bool validateVGPRAlign(const MCInst &Inst) const;
+  bool validateBLGP(const MCInst &Inst, const OperandVector &Operands);
+  bool validateDS(const MCInst &Inst, const OperandVector &Operands);
+  bool validateGWS(const MCInst &Inst, const OperandVector &Operands);
+  bool validateDivScale(const MCInst &Inst);
+  bool validateWaitCnt(const MCInst &Inst, const OperandVector &Operands);
+  bool validateCoherencyBits(const MCInst &Inst, const OperandVector &Operands,
+                             SMLoc IDLoc);
+  bool validateTHAndScopeBits(const MCInst &Inst, const OperandVector &Operands,
+                              const unsigned CPol);
+  bool validateTFE(const MCInst &Inst, const OperandVector &Operands);
+  bool validateLdsDirect(const MCInst &Inst, const OperandVector &Operands);
+  bool validateWMMA(const MCInst &Inst, const OperandVector &Operands);
+  unsigned getConstantBusLimit(unsigned Opcode) const;
+  bool usesConstantBus(const MCInst &Inst, unsigned OpIdx);
+  bool isInlineConstant(const MCInst &Inst, unsigned OpIdx) const;
+  MCRegister findImplicitSGPRReadInVOP(const MCInst &Inst) const;
+
+  bool isSupportedMnemo(StringRef Mnemo,
+                        const FeatureBitset &FBS);
+  bool isSupportedMnemo(StringRef Mnemo,
+                        const FeatureBitset &FBS,
+                        ArrayRef<unsigned> Variants);
+  bool checkUnsupportedInstruction(StringRef Name, SMLoc IDLoc);
+
+  bool isId(const StringRef Id) const;
+  bool isId(const AsmToken &Token, const StringRef Id) const;
+  bool isToken(const AsmToken::TokenKind Kind) const;
+  StringRef getId() const;
+  bool trySkipId(const StringRef Id);
+  bool trySkipId(const StringRef Pref, const StringRef Id);
+  bool trySkipId(const StringRef Id, const AsmToken::TokenKind Kind);
+  bool trySkipToken(const AsmToken::TokenKind Kind);
+  bool skipToken(const AsmToken::TokenKind Kind, const StringRef ErrMsg);
+  bool parseString(StringRef &Val, const StringRef ErrMsg = "expected a string");
+  bool parseId(StringRef &Val, const StringRef ErrMsg = "");
+
+  void peekTokens(MutableArrayRef<AsmToken> Tokens);
+  AsmToken::TokenKind getTokenKind() const;
+  bool parseExpr(int64_t &Imm, StringRef Expected = "");
+  bool parseExpr(OperandVector &Operands);
+  StringRef getTokenStr() const;
+  AsmToken peekToken(bool ShouldSkipSpace = true);
+  AsmToken getToken() const;
+  SMLoc getLoc() const;
+  void lex();
+
+public:
+  void onBeginOfFile() override;
+  bool parsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) override;
+
+  ParseStatus parseCustomOperand(OperandVector &Operands, unsigned MCK);
+
+  ParseStatus parseExpTgt(OperandVector &Operands);
+  ParseStatus parseSendMsg(OperandVector &Operands);
+  ParseStatus parseWaitEvent(OperandVector &Operands);
+  ParseStatus parseInterpSlot(OperandVector &Operands);
+  ParseStatus parseInterpAttr(OperandVector &Operands);
+  ParseStatus parseSOPPBrTarget(OperandVector &Operands);
+  ParseStatus parseBoolReg(OperandVector &Operands);
+
+  bool parseSwizzleOperand(int64_t &Op, const unsigned MinVal,
+                           const unsigned MaxVal, const Twine &ErrMsg,
+                           SMLoc &Loc);
+  bool parseSwizzleOperands(const unsigned OpNum, int64_t* Op,
+                            const unsigned MinVal,
+                            const unsigned MaxVal,
+                            const StringRef ErrMsg);
+  ParseStatus parseSwizzle(OperandVector &Operands);
+  bool parseSwizzleOffset(int64_t &Imm);
+  bool parseSwizzleMacro(int64_t &Imm);
+  bool parseSwizzleQuadPerm(int64_t &Imm);
+  bool parseSwizzleBitmaskPerm(int64_t &Imm);
+  bool parseSwizzleBroadcast(int64_t &Imm);
+  bool parseSwizzleSwap(int64_t &Imm);
+  bool parseSwizzleReverse(int64_t &Imm);
+  bool parseSwizzleFFT(int64_t &Imm);
+  bool parseSwizzleRotate(int64_t &Imm);
+
+  ParseStatus parseGPRIdxMode(OperandVector &Operands);
+  int64_t parseGPRIdxMacro();
+
+  void cvtMubuf(MCInst &Inst, const OperandVector &Operands) { cvtMubufImpl(Inst, Operands, false); }
+  void cvtMubufAtomic(MCInst &Inst, const OperandVector &Operands) { cvtMubufImpl(Inst, Operands, true); }
+
+  ParseStatus parseOModSI(OperandVector &Operands);
+
+  void cvtVOP3(MCInst &Inst, const OperandVector &Operands,
+               OptionalImmIndexMap &OptionalIdx);
+  void cvtScaledMFMA(MCInst &Inst, const OperandVector &Operands);
+  void cvtVOP3OpSel(MCInst &Inst, const OperandVector &Operands);
+  void cvtVOP3(MCInst &Inst, const OperandVector &Operands);
+  void cvtVOP3P(MCInst &Inst, const OperandVector &Operands);
+  void cvtSWMMAC(MCInst &Inst, const OperandVector &Operands);
+
+  void cvtVOPD(MCInst &Inst, const OperandVector &Operands);
+  void cvtVOP3OpSel(MCInst &Inst, const OperandVector &Operands,
+                    OptionalImmIndexMap &OptionalIdx);
+  void cvtVOP3P(MCInst &Inst, const OperandVector &Operands,
+                OptionalImmIndexMap &OptionalIdx);
+
+  void cvtVOP3Interp(MCInst &Inst, const OperandVector &Operands);
+  void cvtVINTERP(MCInst &Inst, const OperandVector &Operands);
+  void cvtOpSelHelper(MCInst &Inst, unsigned OpSel);
+
+  bool parseDimId(unsigned &Encoding);
+  ParseStatus parseDim(OperandVector &Operands);
+  bool convertDppBoundCtrl(int64_t &BoundCtrl);
+  ParseStatus parseDPP8(OperandVector &Operands);
+  ParseStatus parseDPPCtrl(OperandVector &Operands);
+  bool isSupportedDPPCtrl(StringRef Ctrl, const OperandVector &Operands);
+  int64_t parseDPPCtrlSel(StringRef Ctrl);
+  int64_t parseDPPCtrlPerm();
+  void cvtDPP(MCInst &Inst, const OperandVector &Operands, bool IsDPP8 = false);
+  void cvtDPP8(MCInst &Inst, const OperandVector &Operands) {
+    cvtDPP(Inst, Operands, true);
+  }
+  void cvtVOP3DPP(MCInst &Inst, const OperandVector &Operands,
+                  bool IsDPP8 = false);
+  void cvtVOP3DPP8(MCInst &Inst, const OperandVector &Operands) {
+    cvtVOP3DPP(Inst, Operands, true);
+  }
+
+  ParseStatus parseSDWASel(OperandVector &Operands, StringRef Prefix,
+                           AMDGPUOperand::ImmTy Type);
+  ParseStatus parseSDWADstUnused(OperandVector &Operands);
+  void cvtSdwaVOP1(MCInst &Inst, const OperandVector &Operands);
+  void cvtSdwaVOP2(MCInst &Inst, const OperandVector &Operands);
+  void cvtSdwaVOP2b(MCInst &Inst, const OperandVector &Operands);
+  void cvtSdwaVOP2e(MCInst &Inst, const OperandVector &Operands);
+  void cvtSdwaVOPC(MCInst &Inst, const OperandVector &Operands);
+  void cvtSDWA(MCInst &Inst, const OperandVector &Operands,
+               uint64_t BasicInstType,
+               bool SkipDstVcc = false,
+               bool SkipSrcVcc = false);
+
+  ParseStatus parseEndpgm(OperandVector &Operands);
+
+  ParseStatus parseVOPD(OperandVector &Operands);
+};
+
+} // end anonymous namespace
+
+// May be called with integer type with equivalent bitwidth.
+static const fltSemantics *getFltSemantics(unsigned Size) {
+  switch (Size) {
+  case 4:
+    return &APFloat::IEEEsingle();
+  case 8:
+    return &APFloat::IEEEdouble();
+  case 2:
+    return &APFloat::IEEEhalf();
+  default:
+    llvm_unreachable("unsupported fp type");
+  }
+}
+
+static const fltSemantics *getFltSemantics(MVT VT) {
+  return getFltSemantics(VT.getSizeInBits() / 8);
+}
+
+static const fltSemantics *getOpFltSemantics(uint8_t OperandType) {
+  switch (OperandType) {
+  // When floating-point immediate is used as operand of type i16, the 32-bit
+   // representation of the constant truncated to the 16 LSBs should be used.
+  case AMDGPU::OPERAND_REG_IMM_INT16:
+  case AMDGPU::OPERAND_REG_INLINE_C_INT16:
+  case AMDGPU::OPERAND_REG_IMM_INT32:
+  case AMDGPU::OPERAND_REG_IMM_FP32:
+  case AMDGPU::OPERAND_REG_INLINE_C_INT32:
+  case AMDGPU::OPERAND_REG_INLINE_C_FP32:
+  case AMDGPU::OPERAND_REG_INLINE_AC_INT32:
+  case AMDGPU::OPERAND_REG_INLINE_AC_FP32:
+  case AMDGPU::OPERAND_REG_IMM_V2FP32:
+  case AMDGPU::OPERAND_REG_IMM_V2INT32:
+  case AMDGPU::OPERAND_REG_IMM_V2INT16:
+  case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
+  case AMDGPU::OPERAND_KIMM32:
+  case AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32:
+    return &APFloat::IEEEsingle();
+  case AMDGPU::OPERAND_REG_IMM_I64:
+  case AMDGPU::OPERAND_REG_IMM_U64:
+  case AMDGPU::OPERAND_REG_IMM_FP64:
+  case AMDGPU::OPERAND_REG_INLINE_C_INT64:
+  case AMDGPU::OPERAND_REG_INLINE_C_FP64:
+  case AMDGPU::OPERAND_REG_INLINE_AC_FP64:
+  case AMDGPU::OPERAND_KIMM64:
+    return &APFloat::IEEEdouble();
+  case AMDGPU::OPERAND_REG_IMM_FP16:
+  case AMDGPU::OPERAND_REG_INLINE_C_FP16:
+  case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
+  case AMDGPU::OPERAND_REG_IMM_V2FP16:
+  case AMDGPU::OPERAND_REG_IMM_V2FP16_SPLAT:
+  case AMDGPU::OPERAND_REG_IMM_NOINLINE_V2FP16:
+  case AMDGPU::OPERAND_KIMM16:
+    return &APFloat::IEEEhalf();
+  case AMDGPU::OPERAND_REG_IMM_BF16:
+  case AMDGPU::OPERAND_REG_INLINE_C_BF16:
+  case AMDGPU::OPERAND_REG_INLINE_C_V2BF16:
+  case AMDGPU::OPERAND_REG_IMM_V2BF16:
+    return &APFloat::BFloat();
+  default:
+    llvm_unreachable("unsupported fp type");
+  }
+}
+
+//===----------------------------------------------------------------------===//
+// Operand
+//===----------------------------------------------------------------------===//
+
+static bool canLosslesslyConvertToFPType(APFloat &FPLiteral, MVT VT) {
+  bool Lost;
+
+  // Convert literal to single precision
+  APFloat::opStatus Status = FPLiteral.convert(*getFltSemantics(VT),
+                                               APFloat::rmNearestTiesToEven,
+                                               &Lost);
+  // We allow precision lost but not overflow or underflow
+  if (Status != APFloat::opOK &&
+      Lost &&
+      ((Status & APFloat::opOverflow)  != 0 ||
+       (Status & APFloat::opUnderflow) != 0)) {
+    return false;
+  }
+
+  return true;
+}
+
+static bool isSafeTruncation(int64_t Val, unsigned Size) {
+  return isUIntN(Size, Val) || isIntN(Size, Val);
+}
+
+static bool isInlineableLiteralOp16(int64_t Val, MVT VT, bool HasInv2Pi) {
+  if (VT.getScalarType() == MVT::i16)
+    return isInlinableLiteral32(Val, HasInv2Pi);
+
+  if (VT.getScalarType() == MVT::f16)
+    return AMDGPU::isInlinableLiteralFP16(Val, HasInv2Pi);
+
+  assert(VT.getScalarType() == MVT::bf16);
+
+  return AMDGPU::isInlinableLiteralBF16(Val, HasInv2Pi);
+}
+
+bool AMDGPUOperand::isInlinableImm(MVT type) const {
+
+  // This is a hack to enable named inline values like
+  // shared_base with both 32-bit and 64-bit operands.
+  // Note that these values are defined as
+  // 32-bit operands only.
+  if (isInlineValue()) {
+    return true;
+  }
+
+  if (!isImmTy(ImmTyNone)) {
+    // Only plain immediates are inlinable (e.g. "clamp" attribute is not)
+    return false;
+  }
+
+  if (getModifiers().Lit != LitModifier::None)
+    return false;
+
+  // TODO: We should avoid using host float here. It would be better to
+  // check the float bit values which is what a few other places do.
+  // We've had bot failures before due to weird NaN support on mips hosts.
+
+  APInt Literal(64, Imm.Val);
+
+  if (Imm.IsFPImm) { // We got fp literal token
+    if (type == MVT::f64 || type == MVT::i64) { // Expected 64-bit operand
+      return AMDGPU::isInlinableLiteral64(Imm.Val,
+                                          AsmParser->hasInv2PiInlineImm());
+    }
+
+    APFloat FPLiteral(APFloat::IEEEdouble(), APInt(64, Imm.Val));
+    if (!canLosslesslyConvertToFPType(FPLiteral, type))
+      return false;
+
+    if (type.getScalarSizeInBits() == 16) {
+      bool Lost = false;
+      switch (type.getScalarType().SimpleTy) {
+      default:
+        llvm_unreachable("unknown 16-bit type");
+      case MVT::bf16:
+        FPLiteral.convert(APFloatBase::BFloat(), APFloat::rmNearestTiesToEven,
+                          &Lost);
+        break;
+      case MVT::f16:
+        FPLiteral.convert(APFloatBase::IEEEhalf(), APFloat::rmNearestTiesToEven,
+                          &Lost);
+        break;
+      case MVT::i16:
+        FPLiteral.convert(APFloatBase::IEEEsingle(),
+                          APFloat::rmNearestTiesToEven, &Lost);
+        break;
+      }
+      // We need to use 32-bit representation here because when a floating-point
+      // inline constant is used as an i16 operand, its 32-bit representation
+      // representation will be used. We will need the 32-bit value to check if
+      // it is FP inline constant.
+      uint32_t ImmVal = FPLiteral.bitcastToAPInt().getZExtValue();
+      return isInlineableLiteralOp16(ImmVal, type,
+                                     AsmParser->hasInv2PiInlineImm());
+    }
+
+    // Check if single precision literal is inlinable
+    return AMDGPU::isInlinableLiteral32(
+      static_cast<int32_t>(FPLiteral.bitcastToAPInt().getZExtValue()),
+      AsmParser->hasInv2PiInlineImm());
+  }
+
+  // We got int literal token.
+  if (type == MVT::f64 || type == MVT::i64) { // Expected 64-bit operand
+    return AMDGPU::isInlinableLiteral64(Imm.Val,
+                                        AsmParser->hasInv2PiInlineImm());
+  }
+
+  if (!isSafeTruncation(Imm.Val, type.getScalarSizeInBits())) {
+    return false;
+  }
+
+  if (type.getScalarSizeInBits() == 16) {
+    return isInlineableLiteralOp16(
+      static_cast<int16_t>(Literal.getLoBits(16).getSExtValue()),
+      type, AsmParser->hasInv2PiInlineImm());
+  }
+
+  return AMDGPU::isInlinableLiteral32(
+    static_cast<int32_t>(Literal.getLoBits(32).getZExtValue()),
+    AsmParser->hasInv2PiInlineImm());
+}
+
+bool AMDGPUOperand::isLiteralImm(MVT type) const {
+  // Check that this immediate can be added as literal
+  if (!isImmTy(ImmTyNone)) {
+    return false;
+  }
+
+  bool Allow64Bit =
+      (type == MVT::i64 || type == MVT::f64) && AsmParser->has64BitLiterals();
+
+  if (!Imm.IsFPImm) {
+    // We got int literal token.
+
+    if (type == MVT::f64 && hasFPModifiers()) {
+      // Cannot apply fp modifiers to int literals preserving the same semantics
+      // for VOP1/2/C and VOP3 because of integer truncation. To avoid ambiguity,
+      // disable these cases.
+      return false;
+    }
+
+    unsigned Size = type.getSizeInBits();
+    if (Size == 64) {
+      if (Allow64Bit && !AMDGPU::isValid32BitLiteral(Imm.Val, false))
+        return true;
+      Size = 32;
+    }
+
+    // FIXME: 64-bit operands can zero extend, sign extend, or pad zeroes for FP
+    // types.
+    return isSafeTruncation(Imm.Val, Size);
+  }
+
+  // We got fp literal token
+  if (type == MVT::f64) { // Expected 64-bit fp operand
+    // We would set low 64-bits of literal to zeroes but we accept this literals
+    return true;
+  }
+
+  if (type == MVT::i64) { // Expected 64-bit int operand
+    // We don't allow fp literals in 64-bit integer instructions. It is
+    // unclear how we should encode them.
+    return false;
+  }
+
+  // We allow fp literals with f16x2 operands assuming that the specified
+  // literal goes into the lower half and the upper half is zero. We also
+  // require that the literal may be losslessly converted to f16.
+  //
+  // For i16x2 operands, we assume that the specified literal is encoded as a
+  // single-precision float. This is pretty odd, but it matches SP3 and what
+  // happens in hardware.
+  MVT ExpectedType = (type == MVT::v2f16)   ? MVT::f16
+                     : (type == MVT::v2i16) ? MVT::f32
+                     : (type == MVT::v2f32) ? MVT::f32
+                                            : type;
+
+  APFloat FPLiteral(APFloat::IEEEdouble(), APInt(64, Imm.Val));
+  return canLosslesslyConvertToFPType(FPLiteral, ExpectedType);
+}
+
+bool AMDGPUOperand::isRegClass(unsigned RCID) const {
+  return isRegKind() && AsmParser->getMRI()->getRegClass(RCID).contains(getReg());
+}
+
+bool AMDGPUOperand::isVRegWithInputMods() const {
+  return isRegClass(AMDGPU::VGPR_32RegClassID) ||
+         // GFX90A allows DPP on 64-bit operands.
+         (isRegClass(AMDGPU::VReg_64RegClassID) &&
+          AsmParser->getFeatureBits()[AMDGPU::FeatureDPALU_DPP]);
+}
+
+template <bool IsFake16>
+bool AMDGPUOperand::isT16_Lo128VRegWithInputMods() const {
+  return isRegClass(IsFake16 ? AMDGPU::VGPR_32_Lo128RegClassID
+                             : AMDGPU::VGPR_16_Lo128RegClassID);
+}
+
+template <bool IsFake16> bool AMDGPUOperand::isT16VRegWithInputMods() const {
+  return isRegClass(IsFake16 ? AMDGPU::VGPR_32RegClassID
+                             : AMDGPU::VGPR_16RegClassID);
+}
+
+bool AMDGPUOperand::isSDWAOperand(MVT type) const {
+  if (AsmParser->isVI())
+    return isVReg32();
+  if (AsmParser->isGFX9Plus())
+    return isRegClass(AMDGPU::VS_32RegClassID) || isInlinableImm(type);
+  return false;
+}
+
+bool AMDGPUOperand::isSDWAFP16Operand() const {
+  return isSDWAOperand(MVT::f16);
+}
+
+bool AMDGPUOperand::isSDWAFP32Operand() const {
+  return isSDWAOperand(MVT::f32);
+}
+
+bool AMDGPUOperand::isSDWAInt16Operand() const {
+  return isSDWAOperand(MVT::i16);
+}
+
+bool AMDGPUOperand::isSDWAInt32Operand() const {
+  return isSDWAOperand(MVT::i32);
+}
+
+bool AMDGPUOperand::isBoolReg() const {
+  return isReg() && ((AsmParser->isWave64() && isSCSrc_b64()) ||
+                     (AsmParser->isWave32() && isSCSrc_b32()));
+}
+
+uint64_t AMDGPUOperand::applyInputFPModifiers(uint64_t Val, unsigned Size) const
+{
+  assert(isImmTy(ImmTyNone) && Imm.Mods.hasFPModifiers());
+  assert(Size == 2 || Size == 4 || Size == 8);
+
+  const uint64_t FpSignMask = (1ULL << (Size * 8 - 1));
+
+  if (Imm.Mods.Abs) {
+    Val &= ~FpSignMask;
+  }
+  if (Imm.Mods.Neg) {
+    Val ^= FpSignMask;
+  }
+
+  return Val;
+}
+
+void AMDGPUOperand::addImmOperands(MCInst &Inst, unsigned N, bool ApplyModifiers) const {
+  MCOpIdx = Inst.getNumOperands();
+
+  if (isExpr()) {
+    Inst.addOperand(MCOperand::createExpr(Expr));
+    return;
+  }
+
+  if (AMDGPU::isSISrcOperand(AsmParser->getMII()->get(Inst.getOpcode()),
+                             Inst.getNumOperands())) {
+    addLiteralImmOperand(Inst, Imm.Val,
+                         ApplyModifiers &
+                         isImmTy(ImmTyNone) && Imm.Mods.hasFPModifiers());
+  } else {
+    assert(!isImmTy(ImmTyNone) || !hasModifiers());
+    Inst.addOperand(MCOperand::createImm(Imm.Val));
+  }
+}
+
+void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyModifiers) const {
+  const auto& InstDesc = AsmParser->getMII()->get(Inst.getOpcode());
+  auto OpNum = Inst.getNumOperands();
+  // Check that this operand accepts literals
+  assert(AMDGPU::isSISrcOperand(InstDesc, OpNum));
+
+  if (ApplyModifiers) {
+    assert(AMDGPU::isSISrcFPOperand(InstDesc, OpNum));
+    const unsigned Size = Imm.IsFPImm ? sizeof(double) : getOperandSize(InstDesc, OpNum);
+    Val = applyInputFPModifiers(Val, Size);
+  }
+
+  APInt Literal(64, Val);
+  uint8_t OpTy = InstDesc.operands()[OpNum].OperandType;
+
+  bool CanUse64BitLiterals =
+      AsmParser->has64BitLiterals() &&
+      !(InstDesc.TSFlags & (SIInstrFlags::VOP3 | SIInstrFlags::VOP3P));
+  LitModifier Lit = getModifiers().Lit;
+  MCContext &Ctx = AsmParser->getContext();
+
+  if (Imm.IsFPImm) { // We got fp literal token
+    switch (OpTy) {
+    case AMDGPU::OPERAND_REG_IMM_I64:
+    case AMDGPU::OPERAND_REG_IMM_U64:
+    case AMDGPU::OPERAND_REG_IMM_FP64:
+    case AMDGPU::OPERAND_REG_INLINE_C_INT64:
+    case AMDGPU::OPERAND_REG_INLINE_C_FP64:
+    case AMDGPU::OPERAND_REG_INLINE_AC_FP64:
+      if (Lit == LitModifier::None &&
+          AMDGPU::isInlinableLiteral64(Literal.getZExtValue(),
+                                       AsmParser->hasInv2PiInlineImm())) {
+        Inst.addOperand(MCOperand::createImm(Literal.getZExtValue()));
+        return;
+      }
+
+      // Non-inlineable
+      if (AMDGPU::isSISrcFPOperand(InstDesc,
+                                   OpNum)) { // Expected 64-bit fp operand
+        bool HasMandatoryLiteral =
+            AMDGPU::hasNamedOperand(Inst.getOpcode(), AMDGPU::OpName::imm);
+        // For fp operands we check if low 32 bits are zeros
+        if (Literal.getLoBits(32) != 0 &&
+            (InstDesc.getSize() != 4 || !AsmParser->has64BitLiterals()) &&
+            !HasMandatoryLiteral) {
+          const_cast<AMDGPUAsmParser *>(AsmParser)->Warning(
+              Inst.getLoc(),
+              "Can't encode literal as exact 64-bit floating-point operand. "
+              "Low 32-bits will be set to zero");
+          Val &= 0xffffffff00000000u;
+        }
+
+        if ((OpTy == AMDGPU::OPERAND_REG_IMM_FP64 ||
+             OpTy == AMDGPU::OPERAND_REG_INLINE_C_FP64 ||
+             OpTy == AMDGPU::OPERAND_REG_INLINE_AC_FP64)) {
+          if (CanUse64BitLiterals && Lit == LitModifier::None &&
+              (isInt<32>(Val) || isUInt<32>(Val))) {
+            // The floating-point operand will be verbalized as an
+            // integer one. If that integer happens to fit 32 bits, on
+            // re-assembling it will be intepreted as the high half of
+            // the actual value, so we have to wrap it into lit64().
+            Lit = LitModifier::Lit64;
+          } else if (Lit == LitModifier::Lit) {
+            // For FP64 operands lit() specifies the high half of the value.
+            Val = Hi_32(Val);
+          }
+        }
+        break;
+      }
+
+      // We don't allow fp literals in 64-bit integer instructions. It is
+      // unclear how we should encode them. This case should be checked earlier
+      // in predicate methods (isLiteralImm())
+      llvm_unreachable("fp literal in 64-bit integer instruction.");
+
+    case AMDGPU::OPERAND_KIMM64:
+      if (CanUse64BitLiterals && Lit == LitModifier::None &&
+          (isInt<32>(Val) || isUInt<32>(Val)))
+        Lit = LitModifier::Lit64;
+      break;
+
+    case AMDGPU::OPERAND_REG_IMM_BF16:
+    case AMDGPU::OPERAND_REG_INLINE_C_BF16:
+    case AMDGPU::OPERAND_REG_INLINE_C_V2BF16:
+    case AMDGPU::OPERAND_REG_IMM_V2BF16:
+      if (Lit == LitModifier::None && AsmParser->hasInv2PiInlineImm() &&
+          Literal == 0x3fc45f306725feed) {
+        // This is the 1/(2*pi) which is going to be truncated to bf16 with the
+        // loss of precision. The constant represents ideomatic fp32 value of
+        // 1/(2*pi) = 0.15915494 since bf16 is in fact fp32 with cleared low 16
+        // bits. Prevent rounding below.
+        Inst.addOperand(MCOperand::createImm(0x3e22));
+        return;
+      }
+      [[fallthrough]];
+
+    case AMDGPU::OPERAND_REG_IMM_INT32:
+    case AMDGPU::OPERAND_REG_IMM_FP32:
+    case AMDGPU::OPERAND_REG_INLINE_C_INT32:
+    case AMDGPU::OPERAND_REG_INLINE_C_FP32:
+    case AMDGPU::OPERAND_REG_INLINE_AC_INT32:
+    case AMDGPU::OPERAND_REG_INLINE_AC_FP32:
+    case AMDGPU::OPERAND_REG_IMM_INT16:
+    case AMDGPU::OPERAND_REG_IMM_FP16:
+    case AMDGPU::OPERAND_REG_INLINE_C_INT16:
+    case AMDGPU::OPERAND_REG_INLINE_C_FP16:
+    case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
+    case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
+    case AMDGPU::OPERAND_REG_IMM_V2INT16:
+    case AMDGPU::OPERAND_REG_IMM_V2FP16:
+    case AMDGPU::OPERAND_REG_IMM_V2FP16_SPLAT:
+    case AMDGPU::OPERAND_REG_IMM_NOINLINE_V2FP16:
+    case AMDGPU::OPERAND_REG_IMM_V2FP32:
+    case AMDGPU::OPERAND_REG_IMM_V2INT32:
+    case AMDGPU::OPERAND_KIMM32:
+    case AMDGPU::OPERAND_KIMM16:
+    case AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32: {
+      bool lost;
+      APFloat FPLiteral(APFloat::IEEEdouble(), Literal);
+      // Convert literal to single precision
+      FPLiteral.convert(*getOpFltSemantics(OpTy),
+                        APFloat::rmNearestTiesToEven, &lost);
+      // We allow precision lost but not overflow or underflow. This should be
+      // checked earlier in isLiteralImm()
+
+      Val = FPLiteral.bitcastToAPInt().getZExtValue();
+      break;
+    }
+    default:
+      llvm_unreachable("invalid operand size");
+    }
+
+    if (Lit != LitModifier::None) {
+      Inst.addOperand(
+          MCOperand::createExpr(AMDGPUMCExpr::createLit(Lit, Val, Ctx)));
+    } else {
+      Inst.addOperand(MCOperand::createImm(Val));
+    }
+    return;
+  }
+
+  // We got int literal token.
+  // Only sign extend inline immediates.
+  switch (OpTy) {
+  case AMDGPU::OPERAND_REG_IMM_INT32:
+  case AMDGPU::OPERAND_REG_IMM_FP32:
+  case AMDGPU::OPERAND_REG_INLINE_C_INT32:
+  case AMDGPU::OPERAND_REG_INLINE_C_FP32:
+  case AMDGPU::OPERAND_REG_INLINE_AC_INT32:
+  case AMDGPU::OPERAND_REG_INLINE_AC_FP32:
+  case AMDGPU::OPERAND_REG_IMM_V2INT16:
+  case AMDGPU::OPERAND_REG_IMM_V2BF16:
+  case AMDGPU::OPERAND_REG_IMM_V2FP16:
+  case AMDGPU::OPERAND_REG_IMM_V2FP16_SPLAT:
+  case AMDGPU::OPERAND_REG_IMM_V2FP32:
+  case AMDGPU::OPERAND_REG_IMM_V2INT32:
+  case AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32:
+  case AMDGPU::OPERAND_REG_IMM_NOINLINE_V2FP16:
+    break;
+
+  case AMDGPU::OPERAND_REG_IMM_I64:
+  case AMDGPU::OPERAND_REG_IMM_U64:
+  case AMDGPU::OPERAND_REG_INLINE_C_INT64:
+    if (Lit == LitModifier::None &&
+        AMDGPU::isInlinableLiteral64(Val, AsmParser->hasInv2PiInlineImm())) {
+      Inst.addOperand(MCOperand::createImm(Val));
+      return;
+    }
+
+    // When the 32 MSBs are not zero (effectively means it can't be safely
+    // truncated to uint32_t), if the target doesn't support 64-bit literals, or
+    // the lit modifier is explicitly used, we need to truncate it to the 32
+    // LSBs.
+    if (!AsmParser->has64BitLiterals() || Lit == LitModifier::Lit)
+      Val = Lo_32(Val);
+    break;
+
+  case AMDGPU::OPERAND_REG_IMM_FP64:
+  case AMDGPU::OPERAND_REG_INLINE_C_FP64:
+  case AMDGPU::OPERAND_REG_INLINE_AC_FP64:
+    if (Lit == LitModifier::None &&
+        AMDGPU::isInlinableLiteral64(Val, AsmParser->hasInv2PiInlineImm())) {
+      Inst.addOperand(MCOperand::createImm(Val));
+      return;
+    }
+
+    // If the target doesn't support 64-bit literals, we need to use the
+    // constant as the high 32 MSBs of a double-precision floating point value.
+    if (!AsmParser->has64BitLiterals()) {
+      Val = static_cast<uint64_t>(Val) << 32;
+    } else {
+      // Now the target does support 64-bit literals, there are two cases
+      // where we still want to use src_literal encoding:
+      // 1) explicitly forced by using lit modifier;
+      // 2) the value is a valid 32-bit representation (signed or unsigned),
+      // meanwhile not forced by lit64 modifier.
+      if (Lit == LitModifier::Lit ||
+          (Lit != LitModifier::Lit64 && (isInt<32>(Val) || isUInt<32>(Val))))
+        Val = static_cast<uint64_t>(Val) << 32;
+    }
+
+    // For FP64 operands lit() specifies the high half of the value.
+    if (Lit == LitModifier::Lit)
+      Val = Hi_32(Val);
+    break;
+
+  case AMDGPU::OPERAND_REG_IMM_INT16:
+  case AMDGPU::OPERAND_REG_INLINE_C_INT16:
+  case AMDGPU::OPERAND_REG_INLINE_C_FP16:
+  case AMDGPU::OPERAND_REG_IMM_FP16:
+  case AMDGPU::OPERAND_REG_IMM_BF16:
+  case AMDGPU::OPERAND_REG_INLINE_C_BF16:
+  case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
+  case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
+  case AMDGPU::OPERAND_REG_INLINE_C_V2BF16:
+  case AMDGPU::OPERAND_KIMM32:
+  case AMDGPU::OPERAND_KIMM16:
+    break;
+
+  case AMDGPU::OPERAND_KIMM64:
+    if ((isInt<32>(Val) || isUInt<32>(Val)) && Lit != LitModifier::Lit64)
+      Val <<= 32;
+    break;
+
+  default:
+    llvm_unreachable("invalid operand type");
+  }
+
+  if (Lit != LitModifier::None) {
+    Inst.addOperand(
+        MCOperand::createExpr(AMDGPUMCExpr::createLit(Lit, Val, Ctx)));
+  } else {
+    Inst.addOperand(MCOperand::createImm(Val));
+  }
+}
+
+void AMDGPUOperand::addRegOperands(MCInst &Inst, unsigned N) const {
+  MCOpIdx = Inst.getNumOperands();
+  Inst.addOperand(MCOperand::createReg(AMDGPU::getMCReg(getReg(), AsmParser->getSTI())));
+}
+
+bool AMDGPUOperand::isInlineValue() const {
+  return isRegKind() && ::isInlineValue(getReg());
+}
+
+//===----------------------------------------------------------------------===//
+// AsmParser
+//===----------------------------------------------------------------------===//
+
+void AMDGPUAsmParser::createConstantSymbol(StringRef Id, int64_t Val) {
+  // TODO: make those pre-defined variables read-only.
+  // Currently there is none suitable machinery in the core llvm-mc for this.
+  // MCSymbol::isRedefinable is intended for another purpose, and
+  // AsmParser::parseDirectiveSet() cannot be specialized for specific target.
+  MCContext &Ctx = getContext();
+  MCSymbol *Sym = Ctx.getOrCreateSymbol(Id);
+  Sym->setVariableValue(MCConstantExpr::create(Val, Ctx));
+}
+
+static int getRegClass(RegisterKind Is, unsigned RegWidth) {
+  if (Is == IS_VGPR) {
+    switch (RegWidth) {
+      default: return -1;
+      case 32:
+        return AMDGPU::VGPR_32RegClassID;
+      case 64:
+        return AMDGPU::VReg_64RegClassID;
+      case 96:
+        return AMDGPU::VReg_96RegClassID;
+      case 128:
+        return AMDGPU::VReg_128RegClassID;
+      case 160:
+        return AMDGPU::VReg_160RegClassID;
+      case 192:
+        return AMDGPU::VReg_192RegClassID;
+      case 224:
+        return AMDGPU::VReg_224RegClassID;
+      case 256:
+        return AMDGPU::VReg_256RegClassID;
+      case 288:
+        return AMDGPU::VReg_288RegClassID;
+      case 320:
+        return AMDGPU::VReg_320RegClassID;
+      case 352:
+        return AMDGPU::VReg_352RegClassID;
+      case 384:
+        return AMDGPU::VReg_384RegClassID;
+      case 512:
+        return AMDGPU::VReg_512RegClassID;
+      case 1024:
+        return AMDGPU::VReg_1024RegClassID;
+    }
+  } else if (Is == IS_TTMP) {
+    switch (RegWidth) {
+      default: return -1;
+      case 32:
+        return AMDGPU::TTMP_32RegClassID;
+      case 64:
+        return AMDGPU::TTMP_64RegClassID;
+      case 128:
+        return AMDGPU::TTMP_128RegClassID;
+      case 256:
+        return AMDGPU::TTMP_256RegClassID;
+      case 512:
+        return AMDGPU::TTMP_512RegClassID;
+    }
+  } else if (Is == IS_SGPR) {
+    switch (RegWidth) {
+      default: return -1;
+      case 32:
+        return AMDGPU::SGPR_32RegClassID;
+      case 64:
+        return AMDGPU::SGPR_64RegClassID;
+      case 96:
+        return AMDGPU::SGPR_96RegClassID;
+      case 128:
+        return AMDGPU::SGPR_128RegClassID;
+      case 160:
+        return AMDGPU::SGPR_160RegClassID;
+      case 192:
+        return AMDGPU::SGPR_192RegClassID;
+      case 224:
+        return AMDGPU::SGPR_224RegClassID;
+      case 256:
+        return AMDGPU::SGPR_256RegClassID;
+      case 288:
+        return AMDGPU::SGPR_288RegClassID;
+      case 320:
+        return AMDGPU::SGPR_320RegClassID;
+      case 352:
+        return AMDGPU::SGPR_352RegClassID;
+      case 384:
+        return AMDGPU::SGPR_384RegClassID;
+      case 512:
+        return AMDGPU::SGPR_512RegClassID;
+    }
+  } else if (Is == IS_AGPR) {
+    switch (RegWidth) {
+      default: return -1;
+      case 32:
+        return AMDGPU::AGPR_32RegClassID;
+      case 64:
+        return AMDGPU::AReg_64RegClassID;
+      case 96:
+        return AMDGPU::AReg_96RegClassID;
+      case 128:
+        return AMDGPU::AReg_128RegClassID;
+      case 160:
+        return AMDGPU::AReg_160RegClassID;
+      case 192:
+        return AMDGPU::AReg_192RegClassID;
+      case 224:
+        return AMDGPU::AReg_224RegClassID;
+      case 256:
+        return AMDGPU::AReg_256RegClassID;
+      case 288:
+        return AMDGPU::AReg_288RegClassID;
+      case 320:
+        return AMDGPU::AReg_320RegClassID;
+      case 352:
+        return AMDGPU::AReg_352RegClassID;
+      case 384:
+        return AMDGPU::AReg_384RegClassID;
+      case 512:
+        return AMDGPU::AReg_512RegClassID;
+      case 1024:
+        return AMDGPU::AReg_1024RegClassID;
+    }
+  }
+  return -1;
+}
+
+static MCRegister getSpecialRegForName(StringRef RegName) {
+  return StringSwitch<unsigned>(RegName)
+      .Case("exec", AMDGPU::EXEC)
+      .Case("vcc", AMDGPU::VCC)
+      .Case("flat_scratch", AMDGPU::FLAT_SCR)
+      .Case("xnack_mask", AMDGPU::XNACK_MASK)
+      .Case("shared_base", AMDGPU::SRC_SHARED_BASE)
+      .Case("src_shared_base", AMDGPU::SRC_SHARED_BASE)
+      .Case("shared_limit", AMDGPU::SRC_SHARED_LIMIT)
+      .Case("src_shared_limit", AMDGPU::SRC_SHARED_LIMIT)
+      .Case("private_base", AMDGPU::SRC_PRIVATE_BASE)
+      .Case("src_private_base", AMDGPU::SRC_PRIVATE_BASE)
+      .Case("private_limit", AMDGPU::SRC_PRIVATE_LIMIT)
+      .Case("src_private_limit", AMDGPU::SRC_PRIVATE_LIMIT)
+      .Case("src_flat_scratch_base_lo", AMDGPU::SRC_FLAT_SCRATCH_BASE_LO)
+      .Case("src_flat_scratch_base_hi", AMDGPU::SRC_FLAT_SCRATCH_BASE_HI)
+      .Case("pops_exiting_wave_id", AMDGPU::SRC_POPS_EXITING_WAVE_ID)
+      .Case("src_pops_exiting_wave_id", AMDGPU::SRC_POPS_EXITING_WAVE_ID)
+      .Case("lds_direct", AMDGPU::LDS_DIRECT)
+      .Case("src_lds_direct", AMDGPU::LDS_DIRECT)
+      .Case("m0", AMDGPU::M0)
+      .Case("vccz", AMDGPU::SRC_VCCZ)
+      .Case("src_vccz", AMDGPU::SRC_VCCZ)
+      .Case("execz", AMDGPU::SRC_EXECZ)
+      .Case("src_execz", AMDGPU::SRC_EXECZ)
+      .Case("scc", AMDGPU::SRC_SCC)
+      .Case("src_scc", AMDGPU::SRC_SCC)
+      .Case("tba", AMDGPU::TBA)
+      .Case("tma", AMDGPU::TMA)
+      .Case("flat_scratch_lo", AMDGPU::FLAT_SCR_LO)
+      .Case("flat_scratch_hi", AMDGPU::FLAT_SCR_HI)
+      .Case("xnack_mask_lo", AMDGPU::XNACK_MASK_LO)
+      .Case("xnack_mask_hi", AMDGPU::XNACK_MASK_HI)
+      .Case("vcc_lo", AMDGPU::VCC_LO)
+      .Case("vcc_hi", AMDGPU::VCC_HI)
+      .Case("exec_lo", AMDGPU::EXEC_LO)
+      .Case("exec_hi", AMDGPU::EXEC_HI)
+      .Case("tma_lo", AMDGPU::TMA_LO)
+      .Case("tma_hi", AMDGPU::TMA_HI)
+      .Case("tba_lo", AMDGPU::TBA_LO)
+      .Case("tba_hi", AMDGPU::TBA_HI)
+      .Case("pc", AMDGPU::PC_REG)
+      .Case("null", AMDGPU::SGPR_NULL)
+      .Default(AMDGPU::NoRegister);
+}
+
+bool AMDGPUAsmParser::ParseRegister(MCRegister &RegNo, SMLoc &StartLoc,
+                                    SMLoc &EndLoc, bool RestoreOnFailure) {
+  auto R = parseRegister();
+  if (!R) return true;
+  assert(R->isReg());
+  RegNo = R->getReg();
+  StartLoc = R->getStartLoc();
+  EndLoc = R->getEndLoc();
+  return false;
+}
+
+bool AMDGPUAsmParser::parseRegister(MCRegister &Reg, SMLoc &StartLoc,
+                                    SMLoc &EndLoc) {
+  return ParseRegister(Reg, StartLoc, EndLoc, /*RestoreOnFailure=*/false);
+}
+
+ParseStatus AMDGPUAsmParser::tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
+                                              SMLoc &EndLoc) {
+  bool Result = ParseRegister(Reg, StartLoc, EndLoc, /*RestoreOnFailure=*/true);
+  bool PendingErrors = getParser().hasPendingError();
+  getParser().clearPendingErrors();
+  if (PendingErrors)
+    return ParseStatus::Failure;
+  if (Result)
+    return ParseStatus::NoMatch;
+  return ParseStatus::Success;
+}
+
+bool AMDGPUAsmParser::AddNextRegisterToList(MCRegister &Reg, unsigned &RegWidth,
+                                            RegisterKind RegKind,
+                                            MCRegister Reg1, SMLoc Loc) {
+  switch (RegKind) {
+  case IS_SPECIAL:
+    if (Reg == AMDGPU::EXEC_LO && Reg1 == AMDGPU::EXEC_HI) {
+      Reg = AMDGPU::EXEC;
+      RegWidth = 64;
+      return true;
+    }
+    if (Reg == AMDGPU::FLAT_SCR_LO && Reg1 == AMDGPU::FLAT_SCR_HI) {
+      Reg = AMDGPU::FLAT_SCR;
+      RegWidth = 64;
+      return true;
+    }
+    if (Reg == AMDGPU::XNACK_MASK_LO && Reg1 == AMDGPU::XNACK_MASK_HI) {
+      Reg = AMDGPU::XNACK_MASK;
+      RegWidth = 64;
+      return true;
+    }
+    if (Reg == AMDGPU::VCC_LO && Reg1 == AMDGPU::VCC_HI) {
+      Reg = AMDGPU::VCC;
+      RegWidth = 64;
+      return true;
+    }
+    if (Reg == AMDGPU::TBA_LO && Reg1 == AMDGPU::TBA_HI) {
+      Reg = AMDGPU::TBA;
+      RegWidth = 64;
+      return true;
+    }
+    if (Reg == AMDGPU::TMA_LO && Reg1 == AMDGPU::TMA_HI) {
+      Reg = AMDGPU::TMA;
+      RegWidth = 64;
+      return true;
+    }
+    Error(Loc, "register does not fit in the list");
+    return false;
+  case IS_VGPR:
+  case IS_SGPR:
+  case IS_AGPR:
+  case IS_TTMP:
+    if (Reg1 != Reg + RegWidth / 32) {
+      Error(Loc, "registers in a list must have consecutive indices");
+      return false;
+    }
+    RegWidth += 32;
+    return true;
+  default:
+    llvm_unreachable("unexpected register kind");
+  }
+}
+
+struct RegInfo {
+  StringLiteral Name;
+  RegisterKind Kind;
+};
+
+static constexpr RegInfo RegularRegisters[] = {
+  {{"v"},    IS_VGPR},
+  {{"s"},    IS_SGPR},
+  {{"ttmp"}, IS_TTMP},
+  {{"acc"},  IS_AGPR},
+  {{"a"},    IS_AGPR},
+};
+
+static bool isRegularReg(RegisterKind Kind) {
+  return Kind == IS_VGPR ||
+         Kind == IS_SGPR ||
+         Kind == IS_TTMP ||
+         Kind == IS_AGPR;
+}
+
+static const RegInfo* getRegularRegInfo(StringRef Str) {
+  for (const RegInfo &Reg : RegularRegisters)
+    if (Str.starts_with(Reg.Name))
+      return &Reg;
+  return nullptr;
+}
+
+static bool getRegNum(StringRef Str, unsigned& Num) {
+  return !Str.getAsInteger(10, Num);
+}
+
+bool
+AMDGPUAsmParser::isRegister(const AsmToken &Token,
+                            const AsmToken &NextToken) const {
+
+  // A list of consecutive registers: [s0,s1,s2,s3]
+  if (Token.is(AsmToken::LBrac))
+    return true;
+
+  if (!Token.is(AsmToken::Identifier))
+    return false;
+
+  // A single register like s0 or a range of registers like s[0:1]
+
+  StringRef Str = Token.getString();
+  const RegInfo *Reg = getRegularRegInfo(Str);
+  if (Reg) {
+    StringRef RegName = Reg->Name;
+    StringRef RegSuffix = Str.substr(RegName.size());
+    if (!RegSuffix.empty()) {
+      RegSuffix.consume_back(".l");
+      RegSuffix.consume_back(".h");
+      unsigned Num;
+      // A single register with an index: rXX
+      if (getRegNum(RegSuffix, Num))
+        return true;
+    } else {
+      // A range of registers: r[XX:YY].
+      if (NextToken.is(AsmToken::LBrac))
+        return true;
+    }
+  }
+
+  return getSpecialRegForName(Str).isValid();
+}
+
+bool
+AMDGPUAsmParser::isRegister()
+{
+  return isRegister(getToken(), peekToken());
+}
+
+MCRegister AMDGPUAsmParser::getRegularReg(RegisterKind RegKind, unsigned RegNum,
+                                          unsigned SubReg, unsigned RegWidth,
+                                          SMLoc Loc) {
+  assert(isRegularReg(RegKind));
+
+  unsigned AlignSize = 1;
+  if (RegKind == IS_SGPR || RegKind == IS_TTMP) {
+    // SGPR and TTMP registers must be aligned.
+    // Max required alignment is 4 dwords.
+    AlignSize = std::min(llvm::bit_ceil(RegWidth / 32), 4u);
+  }
+
+  if (RegNum % AlignSize != 0) {
+    Error(Loc, "invalid register alignment");
+    return MCRegister();
+  }
+
+  unsigned RegIdx = RegNum / AlignSize;
+  int RCID = getRegClass(RegKind, RegWidth);
+  if (RCID == -1) {
+    Error(Loc, "invalid or unsupported register size");
+    return MCRegister();
+  }
+
+  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
+  const MCRegisterClass RC = TRI->getRegClass(RCID);
+  if (RegIdx >= RC.getNumRegs() || (RegKind == IS_VGPR && RegIdx > 255)) {
+    Error(Loc, "register index is out of range");
+    return AMDGPU::NoRegister;
+  }
+
+  if (RegKind == IS_VGPR && !isGFX1250Plus() && RegIdx + RegWidth / 32 > 256) {
+    Error(Loc, "register index is out of range");
+    return MCRegister();
+  }
+
+  MCRegister Reg = RC.getRegister(RegIdx);
+
+  if (SubReg) {
+    Reg = TRI->getSubReg(Reg, SubReg);
+
+    // Currently all regular registers have their .l and .h subregisters, so
+    // we should never need to generate an error here.
+    assert(Reg && "Invalid subregister!");
+  }
+
+  return Reg;
+}
+
+bool AMDGPUAsmParser::ParseRegRange(unsigned &Num, unsigned &RegWidth,
+                                    unsigned &SubReg) {
+  int64_t RegLo, RegHi;
+  if (!skipToken(AsmToken::LBrac, "missing register index"))
+    return false;
+
+  SMLoc FirstIdxLoc = getLoc();
+  SMLoc SecondIdxLoc;
+
+  if (!parseExpr(RegLo))
+    return false;
+
+  if (trySkipToken(AsmToken::Colon)) {
+    SecondIdxLoc = getLoc();
+    if (!parseExpr(RegHi))
+      return false;
+  } else {
+    RegHi = RegLo;
+  }
+
+  if (!skipToken(AsmToken::RBrac, "expected a closing square bracket"))
+    return false;
+
+  if (!isUInt<32>(RegLo)) {
+    Error(FirstIdxLoc, "invalid register index");
+    return false;
+  }
+
+  if (!isUInt<32>(RegHi)) {
+    Error(SecondIdxLoc, "invalid register index");
+    return false;
+  }
+
+  if (RegLo > RegHi) {
+    Error(FirstIdxLoc, "first register index should not exceed second index");
+    return false;
+  }
+
+  if (RegHi == RegLo) {
+    StringRef RegSuffix = getTokenStr();
+    if (RegSuffix == ".l") {
+      SubReg = AMDGPU::lo16;
+      lex();
+    } else if (RegSuffix == ".h") {
+      SubReg = AMDGPU::hi16;
+      lex();
+    }
+  }
+
+  Num = static_cast<unsigned>(RegLo);
+  RegWidth = 32 * ((RegHi - RegLo) + 1);
+
+  return true;
+}
+
+MCRegister AMDGPUAsmParser::ParseSpecialReg(RegisterKind &RegKind,
+                                            unsigned &RegNum,
+                                            unsigned &RegWidth,
+                                            SmallVectorImpl<AsmToken> &Tokens) {
+  assert(isToken(AsmToken::Identifier));
+  MCRegister Reg = getSpecialRegForName(getTokenStr());
+  if (Reg) {
+    RegNum = 0;
+    RegWidth = 32;
+    RegKind = IS_SPECIAL;
+    Tokens.push_back(getToken());
+    lex(); // skip register name
+  }
+  return Reg;
+}
+
+MCRegister AMDGPUAsmParser::ParseRegularReg(RegisterKind &RegKind,
+                                            unsigned &RegNum,
+                                            unsigned &RegWidth,
+                                            SmallVectorImpl<AsmToken> &Tokens) {
+  assert(isToken(AsmToken::Identifier));
+  StringRef RegName = getTokenStr();
+  auto Loc = getLoc();
+
+  const RegInfo *RI = getRegularRegInfo(RegName);
+  if (!RI) {
+    Error(Loc, "invalid register name");
+    return MCRegister();
+  }
+
+  Tokens.push_back(getToken());
+  lex(); // skip register name
+
+  RegKind = RI->Kind;
+  StringRef RegSuffix = RegName.substr(RI->Name.size());
+  unsigned SubReg = NoSubRegister;
+  if (!RegSuffix.empty()) {
+    if (RegSuffix.consume_back(".l"))
+      SubReg = AMDGPU::lo16;
+    else if (RegSuffix.consume_back(".h"))
+      SubReg = AMDGPU::hi16;
+
+    // Single 32-bit register: vXX.
+    if (!getRegNum(RegSuffix, RegNum)) {
+      Error(Loc, "invalid register index");
+      return MCRegister();
+    }
+    RegWidth = 32;
+  } else {
+    // Range of registers: v[XX:YY]. ":YY" is optional.
+    if (!ParseRegRange(RegNum, RegWidth, SubReg))
+      return MCRegister();
+  }
+
+  return getRegularReg(RegKind, RegNum, SubReg, RegWidth, Loc);
+}
+
+MCRegister AMDGPUAsmParser::ParseRegList(RegisterKind &RegKind,
+                                         unsigned &RegNum, unsigned &RegWidth,
+                                         SmallVectorImpl<AsmToken> &Tokens) {
+  MCRegister Reg;
+  auto ListLoc = getLoc();
+
+  if (!skipToken(AsmToken::LBrac,
+                 "expected a register or a list of registers")) {
+    return MCRegister();
+  }
+
+  // List of consecutive registers, e.g.: [s0,s1,s2,s3]
+
+  auto Loc = getLoc();
+  if (!ParseAMDGPURegister(RegKind, Reg, RegNum, RegWidth))
+    return MCRegister();
+  if (RegWidth != 32) {
+    Error(Loc, "expected a single 32-bit register");
+    return MCRegister();
+  }
+
+  for (; trySkipToken(AsmToken::Comma); ) {
+    RegisterKind NextRegKind;
+    MCRegister NextReg;
+    unsigned NextRegNum, NextRegWidth;
+    Loc = getLoc();
+
+    if (!ParseAMDGPURegister(NextRegKind, NextReg,
+                             NextRegNum, NextRegWidth,
+                             Tokens)) {
+      return MCRegister();
+    }
+    if (NextRegWidth != 32) {
+      Error(Loc, "expected a single 32-bit register");
+      return MCRegister();
+    }
+    if (NextRegKind != RegKind) {
+      Error(Loc, "registers in a list must be of the same kind");
+      return MCRegister();
+    }
+    if (!AddNextRegisterToList(Reg, RegWidth, RegKind, NextReg, Loc))
+      return MCRegister();
+  }
+
+  if (!skipToken(AsmToken::RBrac,
+                 "expected a comma or a closing square bracket")) {
+    return MCRegister();
+  }
+
+  if (isRegularReg(RegKind))
+    Reg = getRegularReg(RegKind, RegNum, NoSubRegister, RegWidth, ListLoc);
+
+  return Reg;
+}
+
+bool AMDGPUAsmParser::ParseAMDGPURegister(RegisterKind &RegKind,
+                                          MCRegister &Reg, unsigned &RegNum,
+                                          unsigned &RegWidth,
+                                          SmallVectorImpl<AsmToken> &Tokens) {
+  auto Loc = getLoc();
+  Reg = MCRegister();
+
+  if (isToken(AsmToken::Identifier)) {
+    Reg = ParseSpecialReg(RegKind, RegNum, RegWidth, Tokens);
+    if (!Reg)
+      Reg = ParseRegularReg(RegKind, RegNum, RegWidth, Tokens);
+  } else {
+    Reg = ParseRegList(RegKind, RegNum, RegWidth, Tokens);
+  }
+
+  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
+  if (!Reg) {
+    assert(Parser.hasPendingError());
+    return false;
+  }
+
+  if (!subtargetHasRegister(*TRI, Reg)) {
+    if (Reg == AMDGPU::SGPR_NULL) {
+      Error(Loc, "'null' operand is not supported on this GPU");
+    } else {
+      Error(Loc, Twine(AMDGPUInstPrinter::getRegisterName(Reg)) +
+                     " register not available on this GPU");
+    }
+    return false;
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::ParseAMDGPURegister(RegisterKind &RegKind,
+                                          MCRegister &Reg, unsigned &RegNum,
+                                          unsigned &RegWidth,
+                                          bool RestoreOnFailure /*=false*/) {
+  Reg = MCRegister();
+
+  SmallVector<AsmToken, 1> Tokens;
+  if (ParseAMDGPURegister(RegKind, Reg, RegNum, RegWidth, Tokens)) {
+    if (RestoreOnFailure) {
+      while (!Tokens.empty()) {
+        getLexer().UnLex(Tokens.pop_back_val());
+      }
+    }
+    return true;
+  }
+  return false;
+}
+
+std::optional<StringRef>
+AMDGPUAsmParser::getGprCountSymbolName(RegisterKind RegKind) {
+  switch (RegKind) {
+  case IS_VGPR:
+    return StringRef(".amdgcn.next_free_vgpr");
+  case IS_SGPR:
+    return StringRef(".amdgcn.next_free_sgpr");
+  default:
+    return std::nullopt;
+  }
+}
+
+void AMDGPUAsmParser::initializeGprCountSymbol(RegisterKind RegKind) {
+  auto SymbolName = getGprCountSymbolName(RegKind);
+  assert(SymbolName && "initializing invalid register kind");
+  MCSymbol *Sym = getContext().getOrCreateSymbol(*SymbolName);
+  Sym->setVariableValue(MCConstantExpr::create(0, getContext()));
+  Sym->setRedefinable(true);
+}
+
+bool AMDGPUAsmParser::updateGprCountSymbols(RegisterKind RegKind,
+                                            unsigned DwordRegIndex,
+                                            unsigned RegWidth) {
+  // Symbols are only defined for GCN targets
+  if (AMDGPU::getIsaVersion(getSTI().getCPU()).Major < 6)
+    return true;
+
+  auto SymbolName = getGprCountSymbolName(RegKind);
+  if (!SymbolName)
+    return true;
+  MCSymbol *Sym = getContext().getOrCreateSymbol(*SymbolName);
+
+  int64_t NewMax = DwordRegIndex + divideCeil(RegWidth, 32) - 1;
+  int64_t OldCount;
+
+  if (!Sym->isVariable())
+    return !Error(getLoc(),
+                  ".amdgcn.next_free_{v,s}gpr symbols must be variable");
+  if (!Sym->getVariableValue()->evaluateAsAbsolute(OldCount))
+    return !Error(
+        getLoc(),
+        ".amdgcn.next_free_{v,s}gpr symbols must be absolute expressions");
+
+  if (OldCount <= NewMax)
+    Sym->setVariableValue(MCConstantExpr::create(NewMax + 1, getContext()));
+
+  return true;
+}
+
+std::unique_ptr<AMDGPUOperand>
+AMDGPUAsmParser::parseRegister(bool RestoreOnFailure) {
+  const auto &Tok = getToken();
+  SMLoc StartLoc = Tok.getLoc();
+  SMLoc EndLoc = Tok.getEndLoc();
+  RegisterKind RegKind;
+  MCRegister Reg;
+  unsigned RegNum, RegWidth;
+
+  if (!ParseAMDGPURegister(RegKind, Reg, RegNum, RegWidth)) {
+    return nullptr;
+  }
+  if (isHsaAbi(getSTI())) {
+    if (!updateGprCountSymbols(RegKind, RegNum, RegWidth))
+      return nullptr;
+  } else
+    KernelScope.usesRegister(RegKind, RegNum, RegWidth);
+  return AMDGPUOperand::CreateReg(this, Reg, StartLoc, EndLoc);
+}
+
+ParseStatus AMDGPUAsmParser::parseImm(OperandVector &Operands,
+                                      bool HasSP3AbsModifier, LitModifier Lit) {
+  // TODO: add syntactic sugar for 1/(2*PI)
+
+  if (isRegister() || isModifier())
+    return ParseStatus::NoMatch;
+
+  if (Lit == LitModifier::None) {
+    if (trySkipId("lit"))
+      Lit = LitModifier::Lit;
+    else if (trySkipId("lit64"))
+      Lit = LitModifier::Lit64;
+
+    if (Lit != LitModifier::None) {
+      if (!skipToken(AsmToken::LParen, "expected left paren after lit"))
+        return ParseStatus::Failure;
+      ParseStatus S = parseImm(Operands, HasSP3AbsModifier, Lit);
+      if (S.isSuccess() &&
+          !skipToken(AsmToken::RParen, "expected closing parentheses"))
+        return ParseStatus::Failure;
+      return S;
+    }
+  }
+
+  const auto& Tok = getToken();
+  const auto& NextTok = peekToken();
+  bool IsReal = Tok.is(AsmToken::Real);
+  SMLoc S = getLoc();
+  bool Negate = false;
+
+  if (!IsReal && Tok.is(AsmToken::Minus) && NextTok.is(AsmToken::Real)) {
+    lex();
+    IsReal = true;
+    Negate = true;
+  }
+
+  AMDGPUOperand::Modifiers Mods;
+  Mods.Lit = Lit;
+
+  if (IsReal) {
+    // Floating-point expressions are not supported.
+    // Can only allow floating-point literals with an
+    // optional sign.
+
+    StringRef Num = getTokenStr();
+    lex();
+
+    APFloat RealVal(APFloat::IEEEdouble());
+    auto roundMode = APFloat::rmNearestTiesToEven;
+    if (errorToBool(RealVal.convertFromString(Num, roundMode).takeError()))
+      return ParseStatus::Failure;
+    if (Negate)
+      RealVal.changeSign();
+
+    Operands.push_back(
+      AMDGPUOperand::CreateImm(this, RealVal.bitcastToAPInt().getZExtValue(), S,
+                               AMDGPUOperand::ImmTyNone, true));
+    AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
+    Op.setModifiers(Mods);
+
+    return ParseStatus::Success;
+
+  } else {
+    int64_t IntVal;
+    const MCExpr *Expr;
+    SMLoc S = getLoc();
+
+    if (HasSP3AbsModifier) {
+      // This is a workaround for handling expressions
+      // as arguments of SP3 'abs' modifier, for example:
+      //     |1.0|
+      //     |-1|
+      //     |1+x|
+      // This syntax is not compatible with syntax of standard
+      // MC expressions (due to the trailing '|').
+      SMLoc EndLoc;
+      if (getParser().parsePrimaryExpr(Expr, EndLoc, nullptr))
+        return ParseStatus::Failure;
+    } else {
+      if (Parser.parseExpression(Expr))
+        return ParseStatus::Failure;
+    }
+
+    if (Expr->evaluateAsAbsolute(IntVal)) {
+      Operands.push_back(AMDGPUOperand::CreateImm(this, IntVal, S));
+      AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
+      Op.setModifiers(Mods);
+    } else {
+      if (Lit != LitModifier::None)
+        return ParseStatus::NoMatch;
+      Operands.push_back(AMDGPUOperand::CreateExpr(this, Expr, S));
+    }
+
+    return ParseStatus::Success;
+  }
+
+  return ParseStatus::NoMatch;
+}
+
+ParseStatus AMDGPUAsmParser::parseReg(OperandVector &Operands) {
+  if (!isRegister())
+    return ParseStatus::NoMatch;
+
+  if (auto R = parseRegister()) {
+    assert(R->isReg());
+    Operands.push_back(std::move(R));
+    return ParseStatus::Success;
+  }
+  return ParseStatus::Failure;
+}
+
+ParseStatus AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands,
+                                           bool HasSP3AbsMod, LitModifier Lit) {
+  ParseStatus Res = parseReg(Operands);
+  if (!Res.isNoMatch())
+    return Res;
+  if (isModifier())
+    return ParseStatus::NoMatch;
+  return parseImm(Operands, HasSP3AbsMod, Lit);
+}
+
+bool
+AMDGPUAsmParser::isNamedOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const {
+  if (Token.is(AsmToken::Identifier) && NextToken.is(AsmToken::LParen)) {
+    const auto &str = Token.getString();
+    return str == "abs" || str == "neg" || str == "sext";
+  }
+  return false;
+}
+
+bool
+AMDGPUAsmParser::isOpcodeModifierWithVal(const AsmToken &Token, const AsmToken &NextToken) const {
+  return Token.is(AsmToken::Identifier) && NextToken.is(AsmToken::Colon);
+}
+
+bool
+AMDGPUAsmParser::isOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const {
+  return isNamedOperandModifier(Token, NextToken) || Token.is(AsmToken::Pipe);
+}
+
+bool
+AMDGPUAsmParser::isRegOrOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const {
+  return isRegister(Token, NextToken) || isOperandModifier(Token, NextToken);
+}
+
+// Check if this is an operand modifier or an opcode modifier
+// which may look like an expression but it is not. We should
+// avoid parsing these modifiers as expressions. Currently
+// recognized sequences are:
+//   |...|
+//   abs(...)
+//   neg(...)
+//   sext(...)
+//   -reg
+//   -|...|
+//   -abs(...)
+//   name:...
+//
+bool
+AMDGPUAsmParser::isModifier() {
+
+  AsmToken Tok = getToken();
+  AsmToken NextToken[2];
+  peekTokens(NextToken);
+
+  return isOperandModifier(Tok, NextToken[0]) ||
+         (Tok.is(AsmToken::Minus) && isRegOrOperandModifier(NextToken[0], NextToken[1])) ||
+         isOpcodeModifierWithVal(Tok, NextToken[0]);
+}
+
+// Check if the current token is an SP3 'neg' modifier.
+// Currently this modifier is allowed in the following context:
+//
+// 1. Before a register, e.g. "-v0", "-v[...]" or "-[v0,v1]".
+// 2. Before an 'abs' modifier: -abs(...)
+// 3. Before an SP3 'abs' modifier: -|...|
+//
+// In all other cases "-" is handled as a part
+// of an expression that follows the sign.
 //
-/// \file
-/// The AMDGPU code emitter produces machine code that can be executed
-/// directly on the GPU device.
+// Note: When "-" is followed by an integer literal,
+// this is interpreted as integer negation rather
+// than a floating-point NEG modifier applied to N.
+// Beside being contr-intuitive, such use of floating-point
+// NEG modifier would have resulted in different meaning
+// of integer literals used with VOP1/2/C and VOP3,
+// for example:
+//    v_exp_f32_e32 v5, -1 // VOP1: src0 = 0xFFFFFFFF
+//    v_exp_f32_e64 v5, -1 // VOP3: src0 = 0x80000001
+// Negative fp literals with preceding "-" are
+// handled likewise for uniformity
 //
+bool
+AMDGPUAsmParser::parseSP3NegModifier() {
+
+  AsmToken NextToken[2];
+  peekTokens(NextToken);
+
+  if (isToken(AsmToken::Minus) &&
+      (isRegister(NextToken[0], NextToken[1]) ||
+       NextToken[0].is(AsmToken::Pipe) ||
+       isId(NextToken[0], "abs"))) {
+    lex();
+    return true;
+  }
+
+  return false;
+}
+
+ParseStatus
+AMDGPUAsmParser::parseRegOrImmWithFPInputMods(OperandVector &Operands,
+                                              bool AllowImm) {
+  bool Neg, SP3Neg;
+  bool Abs, SP3Abs;
+  SMLoc Loc;
+
+  // Disable ambiguous constructs like '--1' etc. Should use neg(-1) instead.
+  if (isToken(AsmToken::Minus) && peekToken().is(AsmToken::Minus))
+    return Error(getLoc(), "invalid syntax, expected 'neg' modifier");
+
+  SP3Neg = parseSP3NegModifier();
+
+  Loc = getLoc();
+  Neg = trySkipId("neg");
+  if (Neg && SP3Neg)
+    return Error(Loc, "expected register or immediate");
+  if (Neg && !skipToken(AsmToken::LParen, "expected left paren after neg"))
+    return ParseStatus::Failure;
+
+  Abs = trySkipId("abs");
+  if (Abs && !skipToken(AsmToken::LParen, "expected left paren after abs"))
+    return ParseStatus::Failure;
+
+  LitModifier Lit = LitModifier::None;
+  if (trySkipId("lit")) {
+    Lit = LitModifier::Lit;
+    if (!skipToken(AsmToken::LParen, "expected left paren after lit"))
+      return ParseStatus::Failure;
+  } else if (trySkipId("lit64")) {
+    Lit = LitModifier::Lit64;
+    if (!skipToken(AsmToken::LParen, "expected left paren after lit64"))
+      return ParseStatus::Failure;
+    if (!has64BitLiterals())
+      return Error(Loc, "lit64 is not supported on this GPU");
+  }
+
+  Loc = getLoc();
+  SP3Abs = trySkipToken(AsmToken::Pipe);
+  if (Abs && SP3Abs)
+    return Error(Loc, "expected register or immediate");
+
+  ParseStatus Res;
+  if (AllowImm) {
+    Res = parseRegOrImm(Operands, SP3Abs, Lit);
+  } else {
+    Res = parseReg(Operands);
+  }
+  if (!Res.isSuccess())
+    return (SP3Neg || Neg || SP3Abs || Abs || Lit != LitModifier::None)
+               ? ParseStatus::Failure
+               : Res;
+
+  if (Lit != LitModifier::None && !Operands.back()->isImm())
+    Error(Loc, "expected immediate with lit modifier");
+
+  if (SP3Abs && !skipToken(AsmToken::Pipe, "expected vertical bar"))
+    return ParseStatus::Failure;
+  if (Abs && !skipToken(AsmToken::RParen, "expected closing parentheses"))
+    return ParseStatus::Failure;
+  if (Neg && !skipToken(AsmToken::RParen, "expected closing parentheses"))
+    return ParseStatus::Failure;
+  if (Lit != LitModifier::None &&
+      !skipToken(AsmToken::RParen, "expected closing parentheses"))
+    return ParseStatus::Failure;
+
+  AMDGPUOperand::Modifiers Mods;
+  Mods.Abs = Abs || SP3Abs;
+  Mods.Neg = Neg || SP3Neg;
+  Mods.Lit = Lit;
+
+  if (Mods.hasFPModifiers() || Lit != LitModifier::None) {
+    AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
+    if (Op.isExpr())
+      return Error(Op.getStartLoc(), "expected an absolute expression");
+    Op.setModifiers(Mods);
+  }
+  return ParseStatus::Success;
+}
+
+ParseStatus
+AMDGPUAsmParser::parseRegOrImmWithIntInputMods(OperandVector &Operands,
+                                               bool AllowImm) {
+  bool Sext = trySkipId("sext");
+  if (Sext && !skipToken(AsmToken::LParen, "expected left paren after sext"))
+    return ParseStatus::Failure;
+
+  ParseStatus Res;
+  if (AllowImm) {
+    Res = parseRegOrImm(Operands);
+  } else {
+    Res = parseReg(Operands);
+  }
+  if (!Res.isSuccess())
+    return Sext ? ParseStatus::Failure : Res;
+
+  if (Sext && !skipToken(AsmToken::RParen, "expected closing parentheses"))
+    return ParseStatus::Failure;
+
+  AMDGPUOperand::Modifiers Mods;
+  Mods.Sext = Sext;
+
+  if (Mods.hasIntModifiers()) {
+    AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
+    if (Op.isExpr())
+      return Error(Op.getStartLoc(), "expected an absolute expression");
+    Op.setModifiers(Mods);
+  }
+
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseRegWithFPInputMods(OperandVector &Operands) {
+  return parseRegOrImmWithFPInputMods(Operands, false);
+}
+
+ParseStatus AMDGPUAsmParser::parseRegWithIntInputMods(OperandVector &Operands) {
+  return parseRegOrImmWithIntInputMods(Operands, false);
+}
+
+ParseStatus AMDGPUAsmParser::parseVReg32OrOff(OperandVector &Operands) {
+  auto Loc = getLoc();
+  if (trySkipId("off")) {
+    Operands.push_back(AMDGPUOperand::CreateImm(this, 0, Loc,
+                                                AMDGPUOperand::ImmTyOff, false));
+    return ParseStatus::Success;
+  }
+
+  if (!isRegister())
+    return ParseStatus::NoMatch;
+
+  std::unique_ptr<AMDGPUOperand> Reg = parseRegister();
+  if (Reg) {
+    Operands.push_back(std::move(Reg));
+    return ParseStatus::Success;
+  }
+
+  return ParseStatus::Failure;
+}
+
+unsigned AMDGPUAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
+  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
+
+  if ((getForcedEncodingSize() == 32 && (TSFlags & SIInstrFlags::VOP3)) ||
+      (getForcedEncodingSize() == 64 && !(TSFlags & SIInstrFlags::VOP3)) ||
+      (isForcedDPP() && !(TSFlags & SIInstrFlags::DPP)) ||
+      (isForcedSDWA() && !(TSFlags & SIInstrFlags::SDWA)) )
+    return Match_InvalidOperand;
+
+  if (Inst.getOpcode() == AMDGPU::V_MAC_F32_sdwa_vi ||
+      Inst.getOpcode() == AMDGPU::V_MAC_F16_sdwa_vi) {
+    // v_mac_f32/16 allow only dst_sel == DWORD;
+    auto OpNum =
+        AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::dst_sel);
+    const auto &Op = Inst.getOperand(OpNum);
+    if (!Op.isImm() || Op.getImm() != AMDGPU::SDWA::SdwaSel::DWORD) {
+      return Match_InvalidOperand;
+    }
+  }
+
+  // Asm can first try to match VOPD or VOPD3. By failing early here with
+  // Match_InvalidOperand, the parser will retry parsing as VOPD3 or VOPD.
+  // Checking later during validateInstruction does not give a chance to retry
+  // parsing as a different encoding.
+  if (tryAnotherVOPDEncoding(Inst))
+    return Match_InvalidOperand;
+
+  return Match_Success;
+}
+
+static ArrayRef<unsigned> getAllVariants() {
+  static const unsigned Variants[] = {
+    AMDGPUAsmVariants::DEFAULT, AMDGPUAsmVariants::VOP3,
+    AMDGPUAsmVariants::SDWA, AMDGPUAsmVariants::SDWA9,
+    AMDGPUAsmVariants::DPP, AMDGPUAsmVariants::VOP3_DPP
+  };
+
+  return ArrayRef(Variants);
+}
+
+// What asm variants we should check
+ArrayRef<unsigned> AMDGPUAsmParser::getMatchedVariants() const {
+  if (isForcedDPP() && isForcedVOP3()) {
+    static const unsigned Variants[] = {AMDGPUAsmVariants::VOP3_DPP};
+    return ArrayRef(Variants);
+  }
+  if (getForcedEncodingSize() == 32) {
+    static const unsigned Variants[] = {AMDGPUAsmVariants::DEFAULT};
+    return ArrayRef(Variants);
+  }
+
+  if (isForcedVOP3()) {
+    static const unsigned Variants[] = {AMDGPUAsmVariants::VOP3};
+    return ArrayRef(Variants);
+  }
+
+  if (isForcedSDWA()) {
+    static const unsigned Variants[] = {AMDGPUAsmVariants::SDWA,
+                                        AMDGPUAsmVariants::SDWA9};
+    return ArrayRef(Variants);
+  }
+
+  if (isForcedDPP()) {
+    static const unsigned Variants[] = {AMDGPUAsmVariants::DPP};
+    return ArrayRef(Variants);
+  }
+
+  return getAllVariants();
+}
+
+StringRef AMDGPUAsmParser::getMatchedVariantName() const {
+  if (isForcedDPP() && isForcedVOP3())
+    return "e64_dpp";
+
+  if (getForcedEncodingSize() == 32)
+    return "e32";
+
+  if (isForcedVOP3())
+    return "e64";
+
+  if (isForcedSDWA())
+    return "sdwa";
+
+  if (isForcedDPP())
+    return "dpp";
+
+  return "";
+}
+
+MCRegister
+AMDGPUAsmParser::findImplicitSGPRReadInVOP(const MCInst &Inst) const {
+  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
+  for (MCPhysReg Reg : Desc.implicit_uses()) {
+    switch (Reg) {
+    case AMDGPU::FLAT_SCR:
+    case AMDGPU::VCC:
+    case AMDGPU::VCC_LO:
+    case AMDGPU::VCC_HI:
+    case AMDGPU::M0:
+      return Reg;
+    default:
+      break;
+    }
+  }
+  return MCRegister();
+}
+
+// NB: This code is correct only when used to check constant
+// bus limitations because GFX7 support no f16 inline constants.
+// Note that there are no cases when a GFX7 opcode violates
+// constant bus limitations due to the use of an f16 constant.
+bool AMDGPUAsmParser::isInlineConstant(const MCInst &Inst,
+                                       unsigned OpIdx) const {
+  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
+
+  if (!AMDGPU::isSISrcOperand(Desc, OpIdx) ||
+      AMDGPU::isKImmOperand(Desc, OpIdx)) {
+    return false;
+  }
+
+  const MCOperand &MO = Inst.getOperand(OpIdx);
+
+  int64_t Val = MO.isImm() ? MO.getImm() : getLitValue(MO.getExpr());
+  auto OpSize = AMDGPU::getOperandSize(Desc, OpIdx);
+
+  switch (OpSize) { // expected operand size
+  case 8:
+    return AMDGPU::isInlinableLiteral64(Val, hasInv2PiInlineImm());
+  case 4:
+    return AMDGPU::isInlinableLiteral32(Val, hasInv2PiInlineImm());
+  case 2: {
+    const unsigned OperandType = Desc.operands()[OpIdx].OperandType;
+    if (OperandType == AMDGPU::OPERAND_REG_IMM_INT16 ||
+        OperandType == AMDGPU::OPERAND_REG_INLINE_C_INT16)
+      return AMDGPU::isInlinableLiteralI16(Val, hasInv2PiInlineImm());
+
+    if (OperandType == AMDGPU::OPERAND_REG_INLINE_C_V2INT16 ||
+        OperandType == AMDGPU::OPERAND_REG_IMM_V2INT16)
+      return AMDGPU::isInlinableLiteralV2I16(Val);
+
+    if (OperandType == AMDGPU::OPERAND_REG_INLINE_C_V2FP16 ||
+        OperandType == AMDGPU::OPERAND_REG_IMM_V2FP16)
+      return AMDGPU::isInlinableLiteralV2F16(Val);
+
+    if (OperandType == AMDGPU::OPERAND_REG_IMM_V2FP16_SPLAT)
+      return AMDGPU::isPKFMACF16InlineConstant(Val, isGFX11Plus());
+
+    if (OperandType == AMDGPU::OPERAND_REG_INLINE_C_V2BF16 ||
+        OperandType == AMDGPU::OPERAND_REG_IMM_V2BF16)
+      return AMDGPU::isInlinableLiteralV2BF16(Val);
+
+    if (OperandType == AMDGPU::OPERAND_REG_IMM_FP16 ||
+        OperandType == AMDGPU::OPERAND_REG_INLINE_C_FP16)
+      return AMDGPU::isInlinableLiteralFP16(Val, hasInv2PiInlineImm());
+
+    if (OperandType == AMDGPU::OPERAND_REG_IMM_BF16 ||
+        OperandType == AMDGPU::OPERAND_REG_INLINE_C_BF16)
+      return AMDGPU::isInlinableLiteralBF16(Val, hasInv2PiInlineImm());
+
+    if (OperandType == AMDGPU::OPERAND_REG_IMM_NOINLINE_V2FP16)
+      return false;
+
+    llvm_unreachable("invalid operand type");
+  }
+  default:
+    llvm_unreachable("invalid operand size");
+  }
+}
+
+unsigned AMDGPUAsmParser::getConstantBusLimit(unsigned Opcode) const {
+  if (!isGFX10Plus())
+    return 1;
+
+  switch (Opcode) {
+  // 64-bit shift instructions can use only one scalar value input
+  case AMDGPU::V_LSHLREV_B64_e64:
+  case AMDGPU::V_LSHLREV_B64_gfx10:
+  case AMDGPU::V_LSHLREV_B64_e64_gfx11:
+  case AMDGPU::V_LSHLREV_B64_e32_gfx12:
+  case AMDGPU::V_LSHLREV_B64_e64_gfx12:
+  case AMDGPU::V_LSHRREV_B64_e64:
+  case AMDGPU::V_LSHRREV_B64_gfx10:
+  case AMDGPU::V_LSHRREV_B64_e64_gfx11:
+  case AMDGPU::V_LSHRREV_B64_e64_gfx12:
+  case AMDGPU::V_ASHRREV_I64_e64:
+  case AMDGPU::V_ASHRREV_I64_gfx10:
+  case AMDGPU::V_ASHRREV_I64_e64_gfx11:
+  case AMDGPU::V_ASHRREV_I64_e64_gfx12:
+  case AMDGPU::V_LSHL_B64_e64:
+  case AMDGPU::V_LSHR_B64_e64:
+  case AMDGPU::V_ASHR_I64_e64:
+    return 1;
+  default:
+    return 2;
+  }
+}
+
+constexpr unsigned MAX_SRC_OPERANDS_NUM = 6;
+using OperandIndices = SmallVector<int16_t, MAX_SRC_OPERANDS_NUM>;
+
+// Get regular operand indices in the same order as specified
+// in the instruction (but append mandatory literals to the end).
+static OperandIndices getSrcOperandIndices(unsigned Opcode,
+                                           bool AddMandatoryLiterals = false) {
+
+  int16_t ImmIdx =
+      AddMandatoryLiterals ? getNamedOperandIdx(Opcode, OpName::imm) : -1;
+
+  if (isVOPD(Opcode)) {
+    int16_t ImmXIdx =
+        AddMandatoryLiterals ? getNamedOperandIdx(Opcode, OpName::immX) : -1;
+
+    return {getNamedOperandIdx(Opcode, OpName::src0X),
+            getNamedOperandIdx(Opcode, OpName::vsrc1X),
+            getNamedOperandIdx(Opcode, OpName::vsrc2X),
+            getNamedOperandIdx(Opcode, OpName::src0Y),
+            getNamedOperandIdx(Opcode, OpName::vsrc1Y),
+            getNamedOperandIdx(Opcode, OpName::vsrc2Y),
+            ImmXIdx,
+            ImmIdx};
+  }
+
+  return {getNamedOperandIdx(Opcode, OpName::src0),
+          getNamedOperandIdx(Opcode, OpName::src1),
+          getNamedOperandIdx(Opcode, OpName::src2), ImmIdx};
+}
+
+bool AMDGPUAsmParser::usesConstantBus(const MCInst &Inst, unsigned OpIdx) {
+  const MCOperand &MO = Inst.getOperand(OpIdx);
+  if (MO.isImm())
+    return !isInlineConstant(Inst, OpIdx);
+  if (MO.isReg()) {
+    auto Reg = MO.getReg();
+    if (!Reg)
+      return false;
+    const MCRegisterInfo *TRI = getContext().getRegisterInfo();
+    auto PReg = mc2PseudoReg(Reg);
+    return isSGPR(PReg, TRI) && PReg != SGPR_NULL;
+  }
+  return true;
+}
+
+// Based on the comment for `AMDGPUInstructionSelector::selectWritelane`:
+// Writelane is special in that it can use SGPR and M0 (which would normally
+// count as using the constant bus twice - but in this case it is allowed since
+// the lane selector doesn't count as a use of the constant bus). However, it is
+// still required to abide by the 1 SGPR rule.
+static bool checkWriteLane(const MCInst &Inst) {
+  const unsigned Opcode = Inst.getOpcode();
+  if (Opcode != V_WRITELANE_B32_gfx6_gfx7 && Opcode != V_WRITELANE_B32_vi)
+    return false;
+  const MCOperand &LaneSelOp = Inst.getOperand(2);
+  if (!LaneSelOp.isReg())
+    return false;
+  auto LaneSelReg = mc2PseudoReg(LaneSelOp.getReg());
+  return LaneSelReg == M0 || LaneSelReg == M0_gfxpre11;
+}
+
+bool AMDGPUAsmParser::validateConstantBusLimitations(
+    const MCInst &Inst, const OperandVector &Operands) {
+  const unsigned Opcode = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opcode);
+  MCRegister LastSGPR;
+  unsigned ConstantBusUseCount = 0;
+  unsigned NumLiterals = 0;
+  unsigned LiteralSize;
+
+  if (!(Desc.TSFlags &
+        (SIInstrFlags::VOPC | SIInstrFlags::VOP1 | SIInstrFlags::VOP2 |
+         SIInstrFlags::VOP3 | SIInstrFlags::VOP3P | SIInstrFlags::SDWA)) &&
+      !isVOPD(Opcode))
+    return true;
+
+  if (checkWriteLane(Inst))
+    return true;
+
+  // Check special imm operands (used by madmk, etc)
+  if (AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::imm)) {
+    ++NumLiterals;
+    LiteralSize = 4;
+  }
+
+  SmallDenseSet<MCRegister> SGPRsUsed;
+  MCRegister SGPRUsed = findImplicitSGPRReadInVOP(Inst);
+  if (SGPRUsed) {
+    SGPRsUsed.insert(SGPRUsed);
+    ++ConstantBusUseCount;
+  }
+
+  OperandIndices OpIndices = getSrcOperandIndices(Opcode);
+
+  unsigned ConstantBusLimit = getConstantBusLimit(Opcode);
+
+  for (int OpIdx : OpIndices) {
+    if (OpIdx == -1)
+      continue;
+
+    const MCOperand &MO = Inst.getOperand(OpIdx);
+    if (usesConstantBus(Inst, OpIdx)) {
+      if (MO.isReg()) {
+        LastSGPR = mc2PseudoReg(MO.getReg());
+        // Pairs of registers with a partial intersections like these
+        //   s0, s[0:1]
+        //   flat_scratch_lo, flat_scratch
+        //   flat_scratch_lo, flat_scratch_hi
+        // are theoretically valid but they are disabled anyway.
+        // Note that this code mimics SIInstrInfo::verifyInstruction
+        if (SGPRsUsed.insert(LastSGPR).second) {
+          ++ConstantBusUseCount;
+        }
+      } else { // Expression or a literal
+
+        if (Desc.operands()[OpIdx].OperandType == MCOI::OPERAND_IMMEDIATE)
+          continue; // special operand like VINTERP attr_chan
+
+        // An instruction may use only one literal.
+        // This has been validated on the previous step.
+        // See validateVOPLiteral.
+        // This literal may be used as more than one operand.
+        // If all these operands are of the same size,
+        // this literal counts as one scalar value.
+        // Otherwise it counts as 2 scalar values.
+        // See "GFX10 Shader Programming", section 3.6.2.3.
+
+        unsigned Size = AMDGPU::getOperandSize(Desc, OpIdx);
+        if (Size < 4)
+          Size = 4;
+
+        if (NumLiterals == 0) {
+          NumLiterals = 1;
+          LiteralSize = Size;
+        } else if (LiteralSize != Size) {
+          NumLiterals = 2;
+        }
+      }
+    }
+
+    if (ConstantBusUseCount + NumLiterals > ConstantBusLimit) {
+      Error(getOperandLoc(Operands, OpIdx),
+            "invalid operand (violates constant bus restrictions)");
+      return false;
+    }
+  }
+  return true;
+}
+
+std::optional<unsigned>
+AMDGPUAsmParser::checkVOPDRegBankConstraints(const MCInst &Inst, bool AsVOPD3) {
+
+  const unsigned Opcode = Inst.getOpcode();
+  if (!isVOPD(Opcode))
+    return {};
+
+  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
+
+  auto getVRegIdx = [&](unsigned, unsigned OperandIdx) {
+    const MCOperand &Opr = Inst.getOperand(OperandIdx);
+    return (Opr.isReg() && !isSGPR(mc2PseudoReg(Opr.getReg()), TRI))
+               ? Opr.getReg()
+               : MCRegister();
+  };
+
+  // On GFX1170+ if both OpX and OpY are V_MOV_B32 then OPY uses SRC2
+  // source-cache.
+  bool SkipSrc =
+      Opcode == AMDGPU::V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx1170 ||
+      Opcode == AMDGPU::V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx12 ||
+      Opcode == AMDGPU::V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx1250 ||
+      Opcode == AMDGPU::V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx13 ||
+      Opcode == AMDGPU::V_DUAL_MOV_B32_e32_X_MOV_B32_e32_e96_gfx1250 ||
+      Opcode == AMDGPU::V_DUAL_MOV_B32_e32_X_MOV_B32_e32_e96_gfx13;
+  bool AllowSameVGPR = isGFX1250Plus();
+
+  if (AsVOPD3) { // Literal constants are not allowed with VOPD3.
+    for (auto OpName : {OpName::src0X, OpName::src0Y}) {
+      int I = getNamedOperandIdx(Opcode, OpName);
+      const MCOperand &Op = Inst.getOperand(I);
+      if (!Op.isImm())
+        continue;
+      int64_t Imm = Op.getImm();
+      if (!AMDGPU::isInlinableLiteral32(Imm, hasInv2PiInlineImm()) &&
+          !AMDGPU::isInlinableLiteral64(Imm, hasInv2PiInlineImm()))
+        return (unsigned)I;
+    }
+
+    for (auto OpName : {OpName::vsrc1X, OpName::vsrc1Y, OpName::vsrc2X,
+                        OpName::vsrc2Y, OpName::imm}) {
+      int I = getNamedOperandIdx(Opcode, OpName);
+      if (I == -1)
+        continue;
+      const MCOperand &Op = Inst.getOperand(I);
+      if (Op.isImm())
+        return (unsigned)I;
+    }
+  }
+
+  const auto &InstInfo = getVOPDInstInfo(Opcode, &MII);
+  auto InvalidCompOprIdx = InstInfo.getInvalidCompOperandIndex(
+      getVRegIdx, *TRI, SkipSrc, AllowSameVGPR, AsVOPD3);
+
+  return InvalidCompOprIdx;
+}
+
+bool AMDGPUAsmParser::validateVOPD(const MCInst &Inst,
+                                   const OperandVector &Operands) {
+
+  unsigned Opcode = Inst.getOpcode();
+  bool AsVOPD3 = MII.get(Opcode).TSFlags & SIInstrFlags::VOPD3;
+
+  if (AsVOPD3) {
+    for (const std::unique_ptr<MCParsedAsmOperand> &Operand : Operands) {
+      AMDGPUOperand &Op = (AMDGPUOperand &)*Operand;
+      if ((Op.isRegKind() || Op.isImmTy(AMDGPUOperand::ImmTyNone)) &&
+          (Op.getModifiers().getFPModifiersOperand() & SISrcMods::ABS))
+        Error(Op.getStartLoc(), "ABS not allowed in VOPD3 instructions");
+    }
+  }
+
+  auto InvalidCompOprIdx = checkVOPDRegBankConstraints(Inst, AsVOPD3);
+  if (!InvalidCompOprIdx.has_value())
+    return true;
+
+  auto CompOprIdx = *InvalidCompOprIdx;
+  const auto &InstInfo = getVOPDInstInfo(Opcode, &MII);
+  auto ParsedIdx =
+      std::max(InstInfo[VOPD::X].getIndexInParsedOperands(CompOprIdx),
+               InstInfo[VOPD::Y].getIndexInParsedOperands(CompOprIdx));
+  assert(ParsedIdx > 0 && ParsedIdx < Operands.size());
+
+  auto Loc = ((AMDGPUOperand &)*Operands[ParsedIdx]).getStartLoc();
+  if (CompOprIdx == VOPD::Component::DST) {
+    if (AsVOPD3)
+      Error(Loc, "dst registers must be distinct");
+    else
+      Error(Loc, "one dst register must be even and the other odd");
+  } else {
+    auto CompSrcIdx = CompOprIdx - VOPD::Component::DST_NUM;
+    Error(Loc, Twine("src") + Twine(CompSrcIdx) +
+                   " operands must use different VGPR banks");
+  }
+
+  return false;
+}
+
+// \returns true if \p Inst does not satisfy VOPD constraints, but can be
+// potentially used as VOPD3 with the same operands.
+bool AMDGPUAsmParser::tryVOPD3(const MCInst &Inst) {
+  // First check if it fits VOPD
+  auto InvalidCompOprIdx = checkVOPDRegBankConstraints(Inst, false);
+  if (!InvalidCompOprIdx.has_value())
+    return false;
+
+  // Then if it fits VOPD3
+  InvalidCompOprIdx = checkVOPDRegBankConstraints(Inst, true);
+  if (InvalidCompOprIdx.has_value()) {
+    // If failed operand is dst it is better to show error about VOPD3
+    // instruction as it has more capabilities and error message will be
+    // more informative. If the dst is not legal for VOPD3, then it is not
+    // legal for VOPD either.
+    if (*InvalidCompOprIdx == VOPD::Component::DST)
+      return true;
+
+    // Otherwise prefer VOPD as we may find ourselves in an awkward situation
+    // with a conflict in tied implicit src2 of fmac and no asm operand to
+    // to point to.
+    return false;
+  }
+  return true;
+}
+
+// \returns true is a VOPD3 instruction can be also represented as a shorter
+// VOPD encoding.
+bool AMDGPUAsmParser::tryVOPD(const MCInst &Inst) {
+  const unsigned Opcode = Inst.getOpcode();
+  const auto &II = getVOPDInstInfo(Opcode, &MII);
+  unsigned EncodingFamily = AMDGPU::getVOPDEncodingFamily(getSTI());
+  if (!getCanBeVOPD(II[VOPD::X].getOpcode(), EncodingFamily, false).X ||
+      !getCanBeVOPD(II[VOPD::Y].getOpcode(), EncodingFamily, false).Y)
+    return false;
+
+  // This is an awkward exception, VOPD3 variant of V_DUAL_CNDMASK_B32 has
+  // explicit src2 even if it is vcc_lo. If it was parsed as VOPD3 it cannot
+  // be parsed as VOPD which does not accept src2.
+  if (II[VOPD::X].getOpcode() == AMDGPU::V_CNDMASK_B32_e32 ||
+      II[VOPD::Y].getOpcode() == AMDGPU::V_CNDMASK_B32_e32)
+    return false;
+
+  // If any modifiers are set this cannot be VOPD.
+  for (auto OpName : {OpName::src0X_modifiers, OpName::src0Y_modifiers,
+                      OpName::vsrc1X_modifiers, OpName::vsrc1Y_modifiers,
+                      OpName::vsrc2X_modifiers, OpName::vsrc2Y_modifiers}) {
+    int I = getNamedOperandIdx(Opcode, OpName);
+    if (I == -1)
+      continue;
+    if (Inst.getOperand(I).getImm())
+      return false;
+  }
+
+  return !tryVOPD3(Inst);
+}
+
+// VOPD3 has more relaxed register constraints than VOPD. We prefer shorter VOPD
+// form but switch to VOPD3 otherwise.
+bool AMDGPUAsmParser::tryAnotherVOPDEncoding(const MCInst &Inst) {
+  const unsigned Opcode = Inst.getOpcode();
+  if (!isGFX1250Plus() || !isVOPD(Opcode))
+    return false;
+
+  if (MII.get(Opcode).TSFlags & SIInstrFlags::VOPD3)
+    return tryVOPD(Inst);
+  return tryVOPD3(Inst);
+}
+
+bool AMDGPUAsmParser::validateIntClampSupported(const MCInst &Inst) {
+
+  const unsigned Opc = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opc);
+
+  if ((Desc.TSFlags & SIInstrFlags::IntClamp) != 0 && !hasIntClamp()) {
+    int ClampIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::clamp);
+    assert(ClampIdx != -1);
+    return Inst.getOperand(ClampIdx).getImm() == 0;
+  }
+
+  return true;
+}
+
+constexpr uint64_t MIMGFlags =
+    SIInstrFlags::MIMG | SIInstrFlags::VIMAGE | SIInstrFlags::VSAMPLE;
+
+bool AMDGPUAsmParser::validateMIMGDataSize(const MCInst &Inst, SMLoc IDLoc) {
+
+  const unsigned Opc = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opc);
+
+  if ((Desc.TSFlags & MIMGFlags) == 0)
+    return true;
+
+  int VDataIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdata);
+  int DMaskIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dmask);
+  int TFEIdx   = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::tfe);
+
+  if (VDataIdx == -1 && isGFX10Plus()) // no return image_sample
+    return true;
+
+  if ((DMaskIdx == -1 || TFEIdx == -1) && isGFX10_AEncoding()) // intersect_ray
+    return true;
+
+  unsigned VDataSize = getRegOperandSize(Desc, VDataIdx);
+  unsigned TFESize = (TFEIdx != -1 && Inst.getOperand(TFEIdx).getImm()) ? 1 : 0;
+  unsigned DMask = Inst.getOperand(DMaskIdx).getImm() & 0xf;
+  if (DMask == 0)
+    DMask = 1;
+
+  bool IsPackedD16 = false;
+  unsigned DataSize =
+      (Desc.TSFlags & SIInstrFlags::Gather4) ? 4 : llvm::popcount(DMask);
+  if (hasPackedD16()) {
+    int D16Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::d16);
+    IsPackedD16 = D16Idx >= 0;
+    if (IsPackedD16 && Inst.getOperand(D16Idx).getImm())
+      DataSize = (DataSize + 1) / 2;
+  }
+
+  if ((VDataSize / 4) == DataSize + TFESize)
+    return true;
+
+  StringRef Modifiers;
+  if (isGFX90A())
+    Modifiers = IsPackedD16 ? "dmask and d16" : "dmask";
+  else
+    Modifiers = IsPackedD16 ? "dmask, d16 and tfe" : "dmask and tfe";
+
+  Error(IDLoc, Twine("image data size does not match ") + Modifiers);
+  return false;
+}
+
+bool AMDGPUAsmParser::validateMIMGAddrSize(const MCInst &Inst, SMLoc IDLoc) {
+  const unsigned Opc = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opc);
+
+  if ((Desc.TSFlags & MIMGFlags) == 0 || !isGFX10Plus())
+    return true;
+
+  const AMDGPU::MIMGInfo *Info = AMDGPU::getMIMGInfo(Opc);
+
+  const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode =
+      AMDGPU::getMIMGBaseOpcodeInfo(Info->BaseOpcode);
+  int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0);
+  AMDGPU::OpName RSrcOpName = (Desc.TSFlags & SIInstrFlags::MIMG)
+                                  ? AMDGPU::OpName::srsrc
+                                  : AMDGPU::OpName::rsrc;
+  int SrsrcIdx = AMDGPU::getNamedOperandIdx(Opc, RSrcOpName);
+  int DimIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dim);
+  int A16Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::a16);
+
+  assert(VAddr0Idx != -1);
+  assert(SrsrcIdx != -1);
+  assert(SrsrcIdx > VAddr0Idx);
+
+  bool IsA16 = (A16Idx != -1 && Inst.getOperand(A16Idx).getImm());
+  if (BaseOpcode->BVH) {
+    if (IsA16 == BaseOpcode->A16)
+      return true;
+    Error(IDLoc, "image address size does not match a16");
+    return false;
+  }
+
+  unsigned Dim = Inst.getOperand(DimIdx).getImm();
+  const AMDGPU::MIMGDimInfo *DimInfo = AMDGPU::getMIMGDimInfoByEncoding(Dim);
+  bool IsNSA = SrsrcIdx - VAddr0Idx > 1;
+  unsigned ActualAddrSize =
+      IsNSA ? SrsrcIdx - VAddr0Idx : getRegOperandSize(Desc, VAddr0Idx) / 4;
+
+  unsigned ExpectedAddrSize =
+      AMDGPU::getAddrSizeMIMGOp(BaseOpcode, DimInfo, IsA16, hasG16());
+
+  if (IsNSA) {
+    if (hasPartialNSAEncoding() &&
+        ExpectedAddrSize >
+            getNSAMaxSize(Desc.TSFlags & SIInstrFlags::VSAMPLE)) {
+      int VAddrLastIdx = SrsrcIdx - 1;
+      unsigned VAddrLastSize = getRegOperandSize(Desc, VAddrLastIdx) / 4;
+
+      ActualAddrSize = VAddrLastIdx - VAddr0Idx + VAddrLastSize;
+    }
+  } else {
+    if (ExpectedAddrSize > 12)
+      ExpectedAddrSize = 16;
+
+    // Allow oversized 8 VGPR vaddr when only 5/6/7 VGPRs are required.
+    // This provides backward compatibility for assembly created
+    // before 160b/192b/224b types were directly supported.
+    if (ActualAddrSize == 8 && (ExpectedAddrSize >= 5 && ExpectedAddrSize <= 7))
+      return true;
+  }
+
+  if (ActualAddrSize == ExpectedAddrSize)
+    return true;
+
+  Error(IDLoc, "image address size does not match dim and a16");
+  return false;
+}
+
+bool AMDGPUAsmParser::validateMIMGAtomicDMask(const MCInst &Inst) {
+
+  const unsigned Opc = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opc);
+
+  if ((Desc.TSFlags & MIMGFlags) == 0)
+    return true;
+  if (!Desc.mayLoad() || !Desc.mayStore())
+    return true; // Not atomic
+
+  int DMaskIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dmask);
+  unsigned DMask = Inst.getOperand(DMaskIdx).getImm() & 0xf;
+
+  // This is an incomplete check because image_atomic_cmpswap
+  // may only use 0x3 and 0xf while other atomic operations
+  // may use 0x1 and 0x3. However these limitations are
+  // verified when we check that dmask matches dst size.
+  return DMask == 0x1 || DMask == 0x3 || DMask == 0xf;
+}
+
+bool AMDGPUAsmParser::validateMIMGGatherDMask(const MCInst &Inst) {
+
+  const unsigned Opc = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opc);
+
+  if ((Desc.TSFlags & SIInstrFlags::Gather4) == 0)
+    return true;
+
+  int DMaskIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dmask);
+  unsigned DMask = Inst.getOperand(DMaskIdx).getImm() & 0xf;
+
+  // GATHER4 instructions use dmask in a different fashion compared to
+  // other MIMG instructions. The only useful DMASK values are
+  // 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
+  // (red,red,red,red) etc.) The ISA document doesn't mention
+  // this.
+  return DMask == 0x1 || DMask == 0x2 || DMask == 0x4 || DMask == 0x8;
+}
+
+bool AMDGPUAsmParser::validateMIMGDim(const MCInst &Inst,
+                                      const OperandVector &Operands) {
+  if (!isGFX10Plus())
+    return true;
+
+  const unsigned Opc = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opc);
+
+  if ((Desc.TSFlags & MIMGFlags) == 0)
+    return true;
+
+  // image_bvh_intersect_ray instructions do not have dim
+  if (AMDGPU::getMIMGBaseOpcode(Opc)->BVH)
+    return true;
+
+  for (unsigned i = 1, e = Operands.size(); i != e; ++i) {
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
+    if (Op.isDim())
+      return true;
+  }
+  return false;
+}
+
+bool AMDGPUAsmParser::validateMIMGMSAA(const MCInst &Inst) {
+  const unsigned Opc = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opc);
+
+  if ((Desc.TSFlags & MIMGFlags) == 0)
+    return true;
+
+  const AMDGPU::MIMGInfo *Info = AMDGPU::getMIMGInfo(Opc);
+  const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode =
+      AMDGPU::getMIMGBaseOpcodeInfo(Info->BaseOpcode);
+
+  if (!BaseOpcode->MSAA)
+    return true;
+
+  int DimIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dim);
+  assert(DimIdx != -1);
+
+  unsigned Dim = Inst.getOperand(DimIdx).getImm();
+  const AMDGPU::MIMGDimInfo *DimInfo = AMDGPU::getMIMGDimInfoByEncoding(Dim);
+
+  return DimInfo->MSAA;
+}
+
+static bool IsMovrelsSDWAOpcode(const unsigned Opcode)
+{
+  switch (Opcode) {
+  case AMDGPU::V_MOVRELS_B32_sdwa_gfx10:
+  case AMDGPU::V_MOVRELSD_B32_sdwa_gfx10:
+  case AMDGPU::V_MOVRELSD_2_B32_sdwa_gfx10:
+    return true;
+  default:
+    return false;
+  }
+}
+
+// movrels* opcodes should only allow VGPRS as src0.
+// This is specified in .td description for vop1/vop3,
+// but sdwa is handled differently. See isSDWAOperand.
+bool AMDGPUAsmParser::validateMovrels(const MCInst &Inst,
+                                      const OperandVector &Operands) {
+
+  const unsigned Opc = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opc);
+
+  if ((Desc.TSFlags & SIInstrFlags::SDWA) == 0 || !IsMovrelsSDWAOpcode(Opc))
+    return true;
+
+  const int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
+  assert(Src0Idx != -1);
+
+  const MCOperand &Src0 = Inst.getOperand(Src0Idx);
+  if (Src0.isReg()) {
+    auto Reg = mc2PseudoReg(Src0.getReg());
+    const MCRegisterInfo *TRI = getContext().getRegisterInfo();
+    if (!isSGPR(Reg, TRI))
+      return true;
+  }
+
+  Error(getOperandLoc(Operands, Src0Idx), "source operand must be a VGPR");
+  return false;
+}
+
+bool AMDGPUAsmParser::validateMAIAccWrite(const MCInst &Inst,
+                                          const OperandVector &Operands) {
+
+  const unsigned Opc = Inst.getOpcode();
+
+  if (Opc != AMDGPU::V_ACCVGPR_WRITE_B32_vi)
+    return true;
+
+  const int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
+  assert(Src0Idx != -1);
+
+  const MCOperand &Src0 = Inst.getOperand(Src0Idx);
+  if (!Src0.isReg())
+    return true;
+
+  auto Reg = mc2PseudoReg(Src0.getReg());
+  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
+  if (!isGFX90A() && isSGPR(Reg, TRI)) {
+    Error(getOperandLoc(Operands, Src0Idx),
+          "source operand must be either a VGPR or an inline constant");
+    return false;
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::validateMAISrc2(const MCInst &Inst,
+                                      const OperandVector &Operands) {
+  unsigned Opcode = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opcode);
+
+  if (!(Desc.TSFlags & SIInstrFlags::IsMAI) ||
+      !getFeatureBits()[FeatureMFMAInlineLiteralBug])
+    return true;
+
+  const int Src2Idx = getNamedOperandIdx(Opcode, OpName::src2);
+  if (Src2Idx == -1)
+    return true;
+
+  if (Inst.getOperand(Src2Idx).isImm() && isInlineConstant(Inst, Src2Idx)) {
+    Error(getOperandLoc(Operands, Src2Idx),
+          "inline constants are not allowed for this operand");
+    return false;
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::validateMFMA(const MCInst &Inst,
+                                   const OperandVector &Operands) {
+  const unsigned Opc = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opc);
+
+  if ((Desc.TSFlags & SIInstrFlags::IsMAI) == 0)
+    return true;
+
+  int BlgpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::blgp);
+  if (BlgpIdx != -1) {
+    if (const MFMA_F8F6F4_Info *Info = AMDGPU::isMFMA_F8F6F4(Opc)) {
+      int CbszIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::cbsz);
+
+      unsigned CBSZ = Inst.getOperand(CbszIdx).getImm();
+      unsigned BLGP = Inst.getOperand(BlgpIdx).getImm();
+
+      // Validate the correct register size was used for the floating point
+      // format operands
+
+      bool Success = true;
+      if (Info->NumRegsSrcA != mfmaScaleF8F6F4FormatToNumRegs(CBSZ)) {
+        int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
+        Error(getOperandLoc(Operands, Src0Idx),
+              "wrong register tuple size for cbsz value " + Twine(CBSZ));
+        Success = false;
+      }
+
+      if (Info->NumRegsSrcB != mfmaScaleF8F6F4FormatToNumRegs(BLGP)) {
+        int Src1Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1);
+        Error(getOperandLoc(Operands, Src1Idx),
+              "wrong register tuple size for blgp value " + Twine(BLGP));
+        Success = false;
+      }
+
+      return Success;
+    }
+  }
+
+  const int Src2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2);
+  if (Src2Idx == -1)
+    return true;
+
+  const MCOperand &Src2 = Inst.getOperand(Src2Idx);
+  if (!Src2.isReg())
+    return true;
+
+  MCRegister Src2Reg = Src2.getReg();
+  MCRegister DstReg = Inst.getOperand(0).getReg();
+  if (Src2Reg == DstReg)
+    return true;
+
+  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
+  if (TRI->getRegClass(MII.getOpRegClassID(Desc.operands()[0], HwMode))
+          .getSizeInBits() <= 128)
+    return true;
+
+  if (TRI->regsOverlap(Src2Reg, DstReg)) {
+    Error(getOperandLoc(Operands, Src2Idx),
+          "source 2 operand must not partially overlap with dst");
+    return false;
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::validateDivScale(const MCInst &Inst) {
+  switch (Inst.getOpcode()) {
+  default:
+    return true;
+  case V_DIV_SCALE_F32_gfx6_gfx7:
+  case V_DIV_SCALE_F32_vi:
+  case V_DIV_SCALE_F32_gfx10:
+  case V_DIV_SCALE_F64_gfx6_gfx7:
+  case V_DIV_SCALE_F64_vi:
+  case V_DIV_SCALE_F64_gfx10:
+    break;
+  }
+
+  // TODO: Check that src0 = src1 or src2.
+
+  for (auto Name : {AMDGPU::OpName::src0_modifiers,
+                    AMDGPU::OpName::src2_modifiers,
+                    AMDGPU::OpName::src2_modifiers}) {
+    if (Inst.getOperand(AMDGPU::getNamedOperandIdx(Inst.getOpcode(), Name))
+            .getImm() &
+        SISrcMods::ABS) {
+      return false;
+    }
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::validateMIMGD16(const MCInst &Inst) {
+
+  const unsigned Opc = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opc);
+
+  if ((Desc.TSFlags & MIMGFlags) == 0)
+    return true;
+
+  int D16Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::d16);
+  if (D16Idx >= 0 && Inst.getOperand(D16Idx).getImm()) {
+    if (isCI() || isSI())
+      return false;
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::validateTensorR128(const MCInst &Inst) {
+  const unsigned Opc = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opc);
+
+  if ((Desc.TSFlags & SIInstrFlags::TENSOR_CNT) == 0)
+    return true;
+
+  int R128Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::r128);
+
+  return R128Idx < 0 || !Inst.getOperand(R128Idx).getImm();
+}
+
+static bool IsRevOpcode(const unsigned Opcode)
+{
+  switch (Opcode) {
+  case AMDGPU::V_SUBREV_F32_e32:
+  case AMDGPU::V_SUBREV_F32_e64:
+  case AMDGPU::V_SUBREV_F32_e32_gfx10:
+  case AMDGPU::V_SUBREV_F32_e32_gfx6_gfx7:
+  case AMDGPU::V_SUBREV_F32_e32_vi:
+  case AMDGPU::V_SUBREV_F32_e64_gfx10:
+  case AMDGPU::V_SUBREV_F32_e64_gfx6_gfx7:
+  case AMDGPU::V_SUBREV_F32_e64_vi:
+
+  case AMDGPU::V_SUBREV_CO_U32_e32:
+  case AMDGPU::V_SUBREV_CO_U32_e64:
+  case AMDGPU::V_SUBREV_I32_e32_gfx6_gfx7:
+  case AMDGPU::V_SUBREV_I32_e64_gfx6_gfx7:
+
+  case AMDGPU::V_SUBBREV_U32_e32:
+  case AMDGPU::V_SUBBREV_U32_e64:
+  case AMDGPU::V_SUBBREV_U32_e32_gfx6_gfx7:
+  case AMDGPU::V_SUBBREV_U32_e32_vi:
+  case AMDGPU::V_SUBBREV_U32_e64_gfx6_gfx7:
+  case AMDGPU::V_SUBBREV_U32_e64_vi:
+
+  case AMDGPU::V_SUBREV_U32_e32:
+  case AMDGPU::V_SUBREV_U32_e64:
+  case AMDGPU::V_SUBREV_U32_e32_gfx9:
+  case AMDGPU::V_SUBREV_U32_e32_vi:
+  case AMDGPU::V_SUBREV_U32_e64_gfx9:
+  case AMDGPU::V_SUBREV_U32_e64_vi:
+
+  case AMDGPU::V_SUBREV_F16_e32:
+  case AMDGPU::V_SUBREV_F16_e64:
+  case AMDGPU::V_SUBREV_F16_e32_gfx10:
+  case AMDGPU::V_SUBREV_F16_e32_vi:
+  case AMDGPU::V_SUBREV_F16_e64_gfx10:
+  case AMDGPU::V_SUBREV_F16_e64_vi:
+
+  case AMDGPU::V_SUBREV_U16_e32:
+  case AMDGPU::V_SUBREV_U16_e64:
+  case AMDGPU::V_SUBREV_U16_e32_vi:
+  case AMDGPU::V_SUBREV_U16_e64_vi:
+
+  case AMDGPU::V_SUBREV_CO_U32_e32_gfx9:
+  case AMDGPU::V_SUBREV_CO_U32_e64_gfx10:
+  case AMDGPU::V_SUBREV_CO_U32_e64_gfx9:
+
+  case AMDGPU::V_SUBBREV_CO_U32_e32_gfx9:
+  case AMDGPU::V_SUBBREV_CO_U32_e64_gfx9:
+
+  case AMDGPU::V_SUBREV_NC_U32_e32_gfx10:
+  case AMDGPU::V_SUBREV_NC_U32_e64_gfx10:
+
+  case AMDGPU::V_SUBREV_CO_CI_U32_e32_gfx10:
+  case AMDGPU::V_SUBREV_CO_CI_U32_e64_gfx10:
+
+  case AMDGPU::V_LSHRREV_B32_e32:
+  case AMDGPU::V_LSHRREV_B32_e64:
+  case AMDGPU::V_LSHRREV_B32_e32_gfx6_gfx7:
+  case AMDGPU::V_LSHRREV_B32_e64_gfx6_gfx7:
+  case AMDGPU::V_LSHRREV_B32_e32_vi:
+  case AMDGPU::V_LSHRREV_B32_e64_vi:
+  case AMDGPU::V_LSHRREV_B32_e32_gfx10:
+  case AMDGPU::V_LSHRREV_B32_e64_gfx10:
+
+  case AMDGPU::V_ASHRREV_I32_e32:
+  case AMDGPU::V_ASHRREV_I32_e64:
+  case AMDGPU::V_ASHRREV_I32_e32_gfx10:
+  case AMDGPU::V_ASHRREV_I32_e32_gfx6_gfx7:
+  case AMDGPU::V_ASHRREV_I32_e32_vi:
+  case AMDGPU::V_ASHRREV_I32_e64_gfx10:
+  case AMDGPU::V_ASHRREV_I32_e64_gfx6_gfx7:
+  case AMDGPU::V_ASHRREV_I32_e64_vi:
+
+  case AMDGPU::V_LSHLREV_B32_e32:
+  case AMDGPU::V_LSHLREV_B32_e64:
+  case AMDGPU::V_LSHLREV_B32_e32_gfx10:
+  case AMDGPU::V_LSHLREV_B32_e32_gfx6_gfx7:
+  case AMDGPU::V_LSHLREV_B32_e32_vi:
+  case AMDGPU::V_LSHLREV_B32_e64_gfx10:
+  case AMDGPU::V_LSHLREV_B32_e64_gfx6_gfx7:
+  case AMDGPU::V_LSHLREV_B32_e64_vi:
+
+  case AMDGPU::V_LSHLREV_B16_e32:
+  case AMDGPU::V_LSHLREV_B16_e64:
+  case AMDGPU::V_LSHLREV_B16_e32_vi:
+  case AMDGPU::V_LSHLREV_B16_e64_vi:
+  case AMDGPU::V_LSHLREV_B16_gfx10:
+
+  case AMDGPU::V_LSHRREV_B16_e32:
+  case AMDGPU::V_LSHRREV_B16_e64:
+  case AMDGPU::V_LSHRREV_B16_e32_vi:
+  case AMDGPU::V_LSHRREV_B16_e64_vi:
+  case AMDGPU::V_LSHRREV_B16_gfx10:
+
+  case AMDGPU::V_ASHRREV_I16_e32:
+  case AMDGPU::V_ASHRREV_I16_e64:
+  case AMDGPU::V_ASHRREV_I16_e32_vi:
+  case AMDGPU::V_ASHRREV_I16_e64_vi:
+  case AMDGPU::V_ASHRREV_I16_gfx10:
+
+  case AMDGPU::V_LSHLREV_B64_e64:
+  case AMDGPU::V_LSHLREV_B64_gfx10:
+  case AMDGPU::V_LSHLREV_B64_vi:
+
+  case AMDGPU::V_LSHRREV_B64_e64:
+  case AMDGPU::V_LSHRREV_B64_gfx10:
+  case AMDGPU::V_LSHRREV_B64_vi:
+
+  case AMDGPU::V_ASHRREV_I64_e64:
+  case AMDGPU::V_ASHRREV_I64_gfx10:
+  case AMDGPU::V_ASHRREV_I64_vi:
+
+  case AMDGPU::V_PK_LSHLREV_B16:
+  case AMDGPU::V_PK_LSHLREV_B16_gfx10:
+  case AMDGPU::V_PK_LSHLREV_B16_vi:
+
+  case AMDGPU::V_PK_LSHRREV_B16:
+  case AMDGPU::V_PK_LSHRREV_B16_gfx10:
+  case AMDGPU::V_PK_LSHRREV_B16_vi:
+  case AMDGPU::V_PK_ASHRREV_I16:
+  case AMDGPU::V_PK_ASHRREV_I16_gfx10:
+  case AMDGPU::V_PK_ASHRREV_I16_vi:
+    return true;
+  default:
+    return false;
+  }
+}
+
+bool AMDGPUAsmParser::validateLdsDirect(const MCInst &Inst,
+                                        const OperandVector &Operands) {
+  using namespace SIInstrFlags;
+  const unsigned Opcode = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opcode);
+
+  // lds_direct register is defined so that it can be used
+  // with 9-bit operands only. Ignore encodings which do not accept these.
+  const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA;
+  if ((Desc.TSFlags & Enc) == 0)
+    return true;
+
+  for (auto SrcName : {OpName::src0, OpName::src1, OpName::src2}) {
+    auto SrcIdx = getNamedOperandIdx(Opcode, SrcName);
+    if (SrcIdx == -1)
+      break;
+    const auto &Src = Inst.getOperand(SrcIdx);
+    if (Src.isReg() && Src.getReg() == LDS_DIRECT) {
+
+      if (isGFX90A() || isGFX11Plus()) {
+        Error(getOperandLoc(Operands, SrcIdx),
+              "lds_direct is not supported on this GPU");
+        return false;
+      }
+
+      if (IsRevOpcode(Opcode) || (Desc.TSFlags & SIInstrFlags::SDWA)) {
+        Error(getOperandLoc(Operands, SrcIdx),
+              "lds_direct cannot be used with this instruction");
+        return false;
+      }
+
+      if (SrcName != OpName::src0) {
+        Error(getOperandLoc(Operands, SrcIdx),
+              "lds_direct may be used as src0 only");
+        return false;
+      }
+    }
+  }
+
+  return true;
+}
+
+SMLoc AMDGPUAsmParser::getFlatOffsetLoc(const OperandVector &Operands) const {
+  for (unsigned i = 1, e = Operands.size(); i != e; ++i) {
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
+    if (Op.isFlatOffset())
+      return Op.getStartLoc();
+  }
+  return getLoc();
+}
+
+bool AMDGPUAsmParser::validateOffset(const MCInst &Inst,
+                                     const OperandVector &Operands) {
+  auto Opcode = Inst.getOpcode();
+  auto OpNum = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::offset);
+  if (OpNum == -1)
+    return true;
+
+  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
+  if ((TSFlags & SIInstrFlags::FLAT))
+    return validateFlatOffset(Inst, Operands);
+
+  if ((TSFlags & SIInstrFlags::SMRD))
+    return validateSMEMOffset(Inst, Operands);
+
+  const auto &Op = Inst.getOperand(OpNum);
+  // GFX12+ buffer ops: InstOffset is signed 24, but must not be a negative.
+  if (isGFX12Plus() &&
+      (TSFlags & (SIInstrFlags::MUBUF | SIInstrFlags::MTBUF))) {
+    const unsigned OffsetSize = 24;
+    if (!isUIntN(OffsetSize - 1, Op.getImm())) {
+      Error(getFlatOffsetLoc(Operands),
+            Twine("expected a ") + Twine(OffsetSize - 1) +
+                "-bit unsigned offset for buffer ops");
+      return false;
+    }
+  } else {
+    const unsigned OffsetSize = 16;
+    if (!isUIntN(OffsetSize, Op.getImm())) {
+      Error(getFlatOffsetLoc(Operands),
+            Twine("expected a ") + Twine(OffsetSize) + "-bit unsigned offset");
+      return false;
+    }
+  }
+  return true;
+}
+
+bool AMDGPUAsmParser::validateFlatOffset(const MCInst &Inst,
+                                         const OperandVector &Operands) {
+  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
+  if ((TSFlags & SIInstrFlags::FLAT) == 0)
+    return true;
+
+  auto Opcode = Inst.getOpcode();
+  auto OpNum = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::offset);
+  assert(OpNum != -1);
+
+  const auto &Op = Inst.getOperand(OpNum);
+  if (!hasFlatOffsets() && Op.getImm() != 0) {
+    Error(getFlatOffsetLoc(Operands),
+          "flat offset modifier is not supported on this GPU");
+    return false;
+  }
+
+  // For pre-GFX12 FLAT instructions the offset must be positive;
+  // MSB is ignored and forced to zero.
+  unsigned OffsetSize = AMDGPU::getNumFlatOffsetBits(getSTI());
+  bool AllowNegative =
+      (TSFlags & (SIInstrFlags::FlatGlobal | SIInstrFlags::FlatScratch)) ||
+      isGFX12Plus();
+  if (!isIntN(OffsetSize, Op.getImm()) || (!AllowNegative && Op.getImm() < 0)) {
+    Error(getFlatOffsetLoc(Operands),
+          Twine("expected a ") +
+              (AllowNegative ? Twine(OffsetSize) + "-bit signed offset"
+                             : Twine(OffsetSize - 1) + "-bit unsigned offset"));
+    return false;
+  }
+
+  return true;
+}
+
+SMLoc AMDGPUAsmParser::getSMEMOffsetLoc(const OperandVector &Operands) const {
+  // Start with second operand because SMEM Offset cannot be dst or src0.
+  for (unsigned i = 2, e = Operands.size(); i != e; ++i) {
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
+    if (Op.isSMEMOffset() || Op.isSMEMOffsetMod())
+      return Op.getStartLoc();
+  }
+  return getLoc();
+}
+
+bool AMDGPUAsmParser::validateSMEMOffset(const MCInst &Inst,
+                                         const OperandVector &Operands) {
+  if (isCI() || isSI())
+    return true;
+
+  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
+  if ((TSFlags & SIInstrFlags::SMRD) == 0)
+    return true;
+
+  auto Opcode = Inst.getOpcode();
+  auto OpNum = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::offset);
+  if (OpNum == -1)
+    return true;
+
+  const auto &Op = Inst.getOperand(OpNum);
+  if (!Op.isImm())
+    return true;
+
+  uint64_t Offset = Op.getImm();
+  bool IsBuffer = AMDGPU::getSMEMIsBuffer(Opcode);
+  if (AMDGPU::isLegalSMRDEncodedUnsignedOffset(getSTI(), Offset) ||
+      AMDGPU::isLegalSMRDEncodedSignedOffset(getSTI(), Offset, IsBuffer))
+    return true;
+
+  Error(getSMEMOffsetLoc(Operands),
+        isGFX12Plus() && IsBuffer
+            ? "expected a 23-bit unsigned offset for buffer ops"
+        : isGFX12Plus()        ? "expected a 24-bit signed offset"
+        : (isVI() || IsBuffer) ? "expected a 20-bit unsigned offset"
+                               : "expected a 21-bit signed offset");
+
+  return false;
+}
+
+bool AMDGPUAsmParser::validateSOPLiteral(const MCInst &Inst,
+                                         const OperandVector &Operands) {
+  unsigned Opcode = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opcode);
+  if (!(Desc.TSFlags & (SIInstrFlags::SOP2 | SIInstrFlags::SOPC)))
+    return true;
+
+  const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0);
+  const int Src1Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1);
+
+  const int OpIndices[] = { Src0Idx, Src1Idx };
+
+  unsigned NumExprs = 0;
+  unsigned NumLiterals = 0;
+  int64_t LiteralValue;
+
+  for (int OpIdx : OpIndices) {
+    if (OpIdx == -1) break;
+
+    const MCOperand &MO = Inst.getOperand(OpIdx);
+    // Exclude special imm operands (like that used by s_set_gpr_idx_on)
+    if (AMDGPU::isSISrcOperand(Desc, OpIdx)) {
+      bool IsLit = false;
+      std::optional<int64_t> Imm;
+      if (MO.isImm()) {
+        Imm = MO.getImm();
+      } else if (MO.isExpr()) {
+        if (isLitExpr(MO.getExpr())) {
+          IsLit = true;
+          Imm = getLitValue(MO.getExpr());
+        }
+      } else {
+        continue;
+      }
+
+      if (!Imm.has_value()) {
+        ++NumExprs;
+      } else if (!isInlineConstant(Inst, OpIdx)) {
+        auto OpType = static_cast<AMDGPU::OperandType>(
+            Desc.operands()[OpIdx].OperandType);
+        int64_t Value = encode32BitLiteral(*Imm, OpType, IsLit);
+        if (NumLiterals == 0 || LiteralValue != Value) {
+          LiteralValue = Value;
+          ++NumLiterals;
+        }
+      }
+    }
+  }
+
+  if (NumLiterals + NumExprs <= 1)
+    return true;
+
+  Error(getOperandLoc(Operands, Src1Idx),
+        "only one unique literal operand is allowed");
+  return false;
+}
+
+bool AMDGPUAsmParser::validateOpSel(const MCInst &Inst) {
+  const unsigned Opc = Inst.getOpcode();
+  if (isPermlane16(Opc)) {
+    int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
+    unsigned OpSel = Inst.getOperand(OpSelIdx).getImm();
+
+    if (OpSel & ~3)
+      return false;
+  }
+
+  uint64_t TSFlags = MII.get(Opc).TSFlags;
+
+  if (isGFX940() && (TSFlags & SIInstrFlags::IsDOT)) {
+    int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
+    if (OpSelIdx != -1) {
+      if (Inst.getOperand(OpSelIdx).getImm() != 0)
+        return false;
+    }
+    int OpSelHiIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel_hi);
+    if (OpSelHiIdx != -1) {
+      if (Inst.getOperand(OpSelHiIdx).getImm() != -1)
+        return false;
+    }
+  }
+
+  // op_sel[0:1] must be 0 for v_dot2_bf16_bf16 and v_dot2_f16_f16 (VOP3 Dot).
+  if (isGFX11Plus() && (TSFlags & SIInstrFlags::IsDOT) &&
+      (TSFlags & SIInstrFlags::VOP3) && !(TSFlags & SIInstrFlags::VOP3P)) {
+    int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
+    unsigned OpSel = Inst.getOperand(OpSelIdx).getImm();
+    if (OpSel & 3)
+      return false;
+  }
+
+  // Packed math FP32 instructions typically accept SGPRs or VGPRs as source
+  // operands. On gfx12+, if a source operand uses SGPRs, the HW can only read
+  // the first SGPR and use it for both the low and high operations.
+  if (isPackedFP32Inst(Opc) && isGFX12Plus()) {
+    int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
+    int Src1Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1);
+    int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
+    int OpSelHiIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel_hi);
+
+    const MCOperand &Src0 = Inst.getOperand(Src0Idx);
+    const MCOperand &Src1 = Inst.getOperand(Src1Idx);
+    unsigned OpSel = Inst.getOperand(OpSelIdx).getImm();
+    unsigned OpSelHi = Inst.getOperand(OpSelHiIdx).getImm();
+
+    const MCRegisterInfo *TRI = getContext().getRegisterInfo();
+
+    auto VerifyOneSGPR = [OpSel, OpSelHi](unsigned Index) -> bool {
+      unsigned Mask = 1U << Index;
+      return ((OpSel & Mask) == 0) && ((OpSelHi & Mask) == 0);
+    };
+
+    if (Src0.isReg() && isSGPR(Src0.getReg(), TRI) &&
+        !VerifyOneSGPR(/*Index=*/0))
+      return false;
+    if (Src1.isReg() && isSGPR(Src1.getReg(), TRI) &&
+        !VerifyOneSGPR(/*Index=*/1))
+      return false;
+
+    int Src2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2);
+    if (Src2Idx != -1) {
+      const MCOperand &Src2 = Inst.getOperand(Src2Idx);
+      if (Src2.isReg() && isSGPR(Src2.getReg(), TRI) &&
+          !VerifyOneSGPR(/*Index=*/2))
+        return false;
+    }
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::validateTrue16OpSel(const MCInst &Inst) {
+  if (!hasTrue16Insts())
+    return true;
+  const MCRegisterInfo *MRI = getMRI();
+  const unsigned Opc = Inst.getOpcode();
+  int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
+  if (OpSelIdx == -1)
+    return true;
+  unsigned OpSelOpValue = Inst.getOperand(OpSelIdx).getImm();
+  // If the value is 0 we could have a default OpSel Operand, so conservatively
+  // allow it.
+  if (OpSelOpValue == 0)
+    return true;
+  unsigned OpCount = 0;
+  for (AMDGPU::OpName OpName : {AMDGPU::OpName::src0, AMDGPU::OpName::src1,
+                                AMDGPU::OpName::src2, AMDGPU::OpName::vdst}) {
+    int OpIdx = AMDGPU::getNamedOperandIdx(Inst.getOpcode(), OpName);
+    if (OpIdx == -1)
+      continue;
+    const MCOperand &Op = Inst.getOperand(OpIdx);
+    if (Op.isReg() &&
+        MRI->getRegClass(AMDGPU::VGPR_16RegClassID).contains(Op.getReg())) {
+      bool VGPRSuffixIsHi = AMDGPU::isHi16Reg(Op.getReg(), *MRI);
+      bool OpSelOpIsHi = ((OpSelOpValue & (1 << OpCount)) != 0);
+      if (OpSelOpIsHi != VGPRSuffixIsHi)
+        return false;
+    }
+    ++OpCount;
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::validateNeg(const MCInst &Inst, AMDGPU::OpName OpName) {
+  assert(OpName == AMDGPU::OpName::neg_lo || OpName == AMDGPU::OpName::neg_hi);
+
+  const unsigned Opc = Inst.getOpcode();
+  uint64_t TSFlags = MII.get(Opc).TSFlags;
+
+  // v_dot4 fp8/bf8 neg_lo/neg_hi not allowed on src0 and src1 (allowed on src2)
+  // v_wmma iu4/iu8 neg_lo not allowed on src2 (allowed on src0, src1)
+  // v_swmmac f16/bf16 neg_lo/neg_hi not allowed on src2 (allowed on src0, src1)
+  // other wmma/swmmac instructions don't have neg_lo/neg_hi operand.
+  if (!(TSFlags & SIInstrFlags::IsDOT) && !(TSFlags & SIInstrFlags::IsWMMA) &&
+      !(TSFlags & SIInstrFlags::IsSWMMAC))
+    return true;
+
+  int NegIdx = AMDGPU::getNamedOperandIdx(Opc, OpName);
+  if (NegIdx == -1)
+    return true;
+
+  unsigned Neg = Inst.getOperand(NegIdx).getImm();
+
+  // Instructions that have neg_lo or neg_hi operand but neg modifier is allowed
+  // on some src operands but not allowed on other.
+  // It is convenient that such instructions don't have src_modifiers operand
+  // for src operands that don't allow neg because they also don't allow opsel.
+
+  const AMDGPU::OpName SrcMods[3] = {AMDGPU::OpName::src0_modifiers,
+                                     AMDGPU::OpName::src1_modifiers,
+                                     AMDGPU::OpName::src2_modifiers};
+
+  for (unsigned i = 0; i < 3; ++i) {
+    if (!AMDGPU::hasNamedOperand(Opc, SrcMods[i])) {
+      if (Neg & (1 << i))
+        return false;
+    }
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::validateDPP(const MCInst &Inst,
+                                  const OperandVector &Operands) {
+  const unsigned Opc = Inst.getOpcode();
+  int DppCtrlIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dpp_ctrl);
+  if (DppCtrlIdx >= 0) {
+    unsigned DppCtrl = Inst.getOperand(DppCtrlIdx).getImm();
+
+    if (!AMDGPU::isLegalDPALU_DPPControl(getSTI(), DppCtrl) &&
+        AMDGPU::isDPALU_DPP(MII.get(Opc), MII, getSTI())) {
+      // DP ALU DPP is supported for row_newbcast only on GFX9* and row_share
+      // only on GFX12.
+      SMLoc S = getImmLoc(AMDGPUOperand::ImmTyDppCtrl, Operands);
+      Error(S, isGFX12() ? "DP ALU dpp only supports row_share"
+                         : "DP ALU dpp only supports row_newbcast");
+      return false;
+    }
+  }
+
+  int Dpp8Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dpp8);
+  bool IsDPP = DppCtrlIdx >= 0 || Dpp8Idx >= 0;
+
+  if (IsDPP && !hasDPPSrc1SGPR(getSTI())) {
+    int Src1Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1);
+    if (Src1Idx >= 0) {
+      const MCOperand &Src1 = Inst.getOperand(Src1Idx);
+      const MCRegisterInfo *TRI = getContext().getRegisterInfo();
+      if (Src1.isReg() && isSGPR(mc2PseudoReg(Src1.getReg()), TRI)) {
+        Error(getOperandLoc(Operands, Src1Idx),
+              "invalid operand for instruction");
+        return false;
+      }
+      if (Src1.isImm()) {
+        Error(getInstLoc(Operands),
+              "src1 immediate operand invalid for instruction");
+        return false;
+      }
+    }
+  }
+
+  return true;
+}
+
+// Check if VCC register matches wavefront size
+bool AMDGPUAsmParser::validateVccOperand(MCRegister Reg) const {
+  return (Reg == AMDGPU::VCC && isWave64()) ||
+         (Reg == AMDGPU::VCC_LO && isWave32());
+}
+
+// One unique literal can be used. VOP3 literal is only allowed in GFX10+
+bool AMDGPUAsmParser::validateVOPLiteral(const MCInst &Inst,
+                                         const OperandVector &Operands) {
+  unsigned Opcode = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opcode);
+  bool HasMandatoryLiteral = getNamedOperandIdx(Opcode, OpName::imm) != -1;
+  if (!(Desc.TSFlags & (SIInstrFlags::VOP3 | SIInstrFlags::VOP3P)) &&
+      !HasMandatoryLiteral && !isVOPD(Opcode))
+    return true;
+
+  OperandIndices OpIndices = getSrcOperandIndices(Opcode, HasMandatoryLiteral);
+
+  std::optional<unsigned> LiteralOpIdx;
+  std::optional<uint64_t> LiteralValue;
+
+  for (int OpIdx : OpIndices) {
+    if (OpIdx == -1)
+      continue;
+
+    const MCOperand &MO = Inst.getOperand(OpIdx);
+    if (!MO.isImm() && !MO.isExpr())
+      continue;
+    if (!isSISrcOperand(Desc, OpIdx))
+      continue;
+
+    std::optional<int64_t> Imm;
+    if (MO.isImm())
+      Imm = MO.getImm();
+    else if (MO.isExpr() && isLitExpr(MO.getExpr()))
+      Imm = getLitValue(MO.getExpr());
+
+    bool IsAnotherLiteral = false;
+    if (!Imm.has_value()) {
+      // Literal value not known, so we conservately assume it's different.
+      IsAnotherLiteral = true;
+    } else if (!isInlineConstant(Inst, OpIdx)) {
+      uint64_t Value = *Imm;
+      bool IsForcedFP64 =
+          Desc.operands()[OpIdx].OperandType == AMDGPU::OPERAND_KIMM64 ||
+          (Desc.operands()[OpIdx].OperandType == AMDGPU::OPERAND_REG_IMM_FP64 &&
+           HasMandatoryLiteral);
+      bool IsFP64 = (IsForcedFP64 || AMDGPU::isSISrcFPOperand(Desc, OpIdx)) &&
+                    AMDGPU::getOperandSize(Desc.operands()[OpIdx]) == 8;
+      bool IsValid32Op = AMDGPU::isValid32BitLiteral(Value, IsFP64);
+
+      if (!IsValid32Op && !isInt<32>(Value) && !isUInt<32>(Value) &&
+          !IsForcedFP64 && (!has64BitLiterals() || Desc.getSize() != 4)) {
+        Error(getOperandLoc(Operands, OpIdx),
+              "invalid operand for instruction");
+        return false;
+      }
+
+      if (IsFP64 && IsValid32Op && !IsForcedFP64)
+        Value = Hi_32(Value);
+
+      IsAnotherLiteral = !LiteralValue || *LiteralValue != Value;
+      LiteralValue = Value;
+    }
+
+    if (IsAnotherLiteral && !HasMandatoryLiteral &&
+        !getFeatureBits()[FeatureVOP3Literal]) {
+      Error(getOperandLoc(Operands, OpIdx),
+            "literal operands are not supported");
+      return false;
+    }
+
+    if (LiteralOpIdx && IsAnotherLiteral) {
+      Error(getLaterLoc(getOperandLoc(Operands, OpIdx),
+                        getOperandLoc(Operands, *LiteralOpIdx)),
+            "only one unique literal operand is allowed");
+      return false;
+    }
+
+    if (IsAnotherLiteral)
+      LiteralOpIdx = OpIdx;
+  }
+
+  return true;
+}
+
+// Returns -1 if not a register, 0 if VGPR and 1 if AGPR.
+static int IsAGPROperand(const MCInst &Inst, AMDGPU::OpName Name,
+                         const MCRegisterInfo *MRI) {
+  int OpIdx = AMDGPU::getNamedOperandIdx(Inst.getOpcode(), Name);
+  if (OpIdx < 0)
+    return -1;
+
+  const MCOperand &Op = Inst.getOperand(OpIdx);
+  if (!Op.isReg())
+    return -1;
+
+  MCRegister Sub = MRI->getSubReg(Op.getReg(), AMDGPU::sub0);
+  auto Reg = Sub ? Sub : Op.getReg();
+  const MCRegisterClass &AGPR32 = MRI->getRegClass(AMDGPU::AGPR_32RegClassID);
+  return AGPR32.contains(Reg) ? 1 : 0;
+}
+
+bool AMDGPUAsmParser::validateAGPRLdSt(const MCInst &Inst) const {
+  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
+  if ((TSFlags & (SIInstrFlags::FLAT | SIInstrFlags::MUBUF |
+                  SIInstrFlags::MTBUF | SIInstrFlags::MIMG |
+                  SIInstrFlags::DS)) == 0)
+    return true;
+
+  AMDGPU::OpName DataName = (TSFlags & SIInstrFlags::DS)
+                                ? AMDGPU::OpName::data0
+                                : AMDGPU::OpName::vdata;
+
+  const MCRegisterInfo *MRI = getMRI();
+  int DstAreg = IsAGPROperand(Inst, AMDGPU::OpName::vdst, MRI);
+  int DataAreg = IsAGPROperand(Inst, DataName, MRI);
+
+  if ((TSFlags & SIInstrFlags::DS) && DataAreg >= 0) {
+    int Data2Areg = IsAGPROperand(Inst, AMDGPU::OpName::data1, MRI);
+    if (Data2Areg >= 0 && Data2Areg != DataAreg)
+      return false;
+  }
+
+  auto FB = getFeatureBits();
+  if (FB[AMDGPU::FeatureGFX90AInsts]) {
+    if (DataAreg < 0 || DstAreg < 0)
+      return true;
+    return DstAreg == DataAreg;
+  }
+
+  return DstAreg < 1 && DataAreg < 1;
+}
+
+bool AMDGPUAsmParser::validateVGPRAlign(const MCInst &Inst) const {
+  auto FB = getFeatureBits();
+  if (!FB[AMDGPU::FeatureRequiresAlignedVGPRs])
+    return true;
+
+  unsigned Opc = Inst.getOpcode();
+  const MCRegisterInfo *MRI = getMRI();
+  // DS_READ_B96_TR_B6 is the only DS instruction in GFX950, that allows
+  // unaligned VGPR. All others only allow even aligned VGPRs.
+  if (FB[AMDGPU::FeatureGFX90AInsts] && Opc == AMDGPU::DS_READ_B96_TR_B6_vi)
+    return true;
+
+  if (FB[AMDGPU::FeatureGFX1250Insts]) {
+    switch (Opc) {
+    default:
+      break;
+    case AMDGPU::DS_LOAD_TR6_B96:
+    case AMDGPU::DS_LOAD_TR6_B96_gfx12:
+      // DS_LOAD_TR6_B96 is the only DS instruction in GFX1250, that
+      // allows unaligned VGPR. All others only allow even aligned VGPRs.
+      return true;
+    case AMDGPU::GLOBAL_LOAD_TR6_B96:
+    case AMDGPU::GLOBAL_LOAD_TR6_B96_gfx1250: {
+      // GLOBAL_LOAD_TR6_B96 is the only GLOBAL instruction in GFX1250, that
+      // allows unaligned VGPR for vdst, but other operands still only allow
+      // even aligned VGPRs.
+      int VAddrIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr);
+      if (VAddrIdx != -1) {
+        const MCOperand &Op = Inst.getOperand(VAddrIdx);
+        MCRegister Sub = MRI->getSubReg(Op.getReg(), AMDGPU::sub0);
+        if ((Sub - AMDGPU::VGPR0) & 1)
+          return false;
+      }
+      return true;
+    }
+    case AMDGPU::GLOBAL_LOAD_TR6_B96_SADDR:
+    case AMDGPU::GLOBAL_LOAD_TR6_B96_SADDR_gfx1250:
+      return true;
+    }
+  }
+
+  const MCRegisterClass &VGPR32 = MRI->getRegClass(AMDGPU::VGPR_32RegClassID);
+  const MCRegisterClass &AGPR32 = MRI->getRegClass(AMDGPU::AGPR_32RegClassID);
+  for (unsigned I = 0, E = Inst.getNumOperands(); I != E; ++I) {
+    const MCOperand &Op = Inst.getOperand(I);
+    if (!Op.isReg())
+      continue;
+
+    MCRegister Sub = MRI->getSubReg(Op.getReg(), AMDGPU::sub0);
+    if (!Sub)
+      continue;
+
+    if (VGPR32.contains(Sub) && ((Sub - AMDGPU::VGPR0) & 1))
+      return false;
+    if (AGPR32.contains(Sub) && ((Sub - AMDGPU::AGPR0) & 1))
+      return false;
+  }
+
+  return true;
+}
+
+SMLoc AMDGPUAsmParser::getBLGPLoc(const OperandVector &Operands) const {
+  for (unsigned i = 1, e = Operands.size(); i != e; ++i) {
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
+    if (Op.isBLGP())
+      return Op.getStartLoc();
+  }
+  return SMLoc();
+}
+
+bool AMDGPUAsmParser::validateBLGP(const MCInst &Inst,
+                                   const OperandVector &Operands) {
+  unsigned Opc = Inst.getOpcode();
+  int BlgpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::blgp);
+  if (BlgpIdx == -1)
+    return true;
+  SMLoc BLGPLoc = getBLGPLoc(Operands);
+  if (!BLGPLoc.isValid())
+    return true;
+  bool IsNeg = StringRef(BLGPLoc.getPointer()).starts_with("neg:");
+  auto FB = getFeatureBits();
+  bool UsesNeg = false;
+  if (FB[AMDGPU::FeatureGFX940Insts]) {
+    switch (Opc) {
+    case AMDGPU::V_MFMA_F64_16X16X4F64_gfx940_acd:
+    case AMDGPU::V_MFMA_F64_16X16X4F64_gfx940_vcd:
+    case AMDGPU::V_MFMA_F64_4X4X4F64_gfx940_acd:
+    case AMDGPU::V_MFMA_F64_4X4X4F64_gfx940_vcd:
+      UsesNeg = true;
+    }
+  }
+
+  if (IsNeg == UsesNeg)
+    return true;
+
+  Error(BLGPLoc,
+        UsesNeg ? "invalid modifier: blgp is not supported"
+                : "invalid modifier: neg is not supported");
+
+  return false;
+}
+
+bool AMDGPUAsmParser::validateWaitCnt(const MCInst &Inst,
+                                      const OperandVector &Operands) {
+  if (!isGFX11Plus())
+    return true;
+
+  unsigned Opc = Inst.getOpcode();
+  if (Opc != AMDGPU::S_WAITCNT_EXPCNT_gfx11 &&
+      Opc != AMDGPU::S_WAITCNT_LGKMCNT_gfx11 &&
+      Opc != AMDGPU::S_WAITCNT_VMCNT_gfx11 &&
+      Opc != AMDGPU::S_WAITCNT_VSCNT_gfx11)
+    return true;
+
+  int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::sdst);
+  assert(Src0Idx >= 0 && Inst.getOperand(Src0Idx).isReg());
+  auto Reg = mc2PseudoReg(Inst.getOperand(Src0Idx).getReg());
+  if (Reg == AMDGPU::SGPR_NULL)
+    return true;
+
+  Error(getOperandLoc(Operands, Src0Idx), "src0 must be null");
+  return false;
+}
+
+bool AMDGPUAsmParser::validateDS(const MCInst &Inst,
+                                 const OperandVector &Operands) {
+  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
+  if ((TSFlags & SIInstrFlags::DS) == 0)
+    return true;
+  if (TSFlags & SIInstrFlags::GWS)
+    return validateGWS(Inst, Operands);
+  // Only validate GDS for non-GWS instructions.
+  if (hasGDS())
+    return true;
+  int GDSIdx =
+      AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::gds);
+  if (GDSIdx < 0)
+    return true;
+  unsigned GDS = Inst.getOperand(GDSIdx).getImm();
+  if (GDS) {
+    SMLoc S = getImmLoc(AMDGPUOperand::ImmTyGDS, Operands);
+    Error(S, "gds modifier is not supported on this GPU");
+    return false;
+  }
+  return true;
+}
+
+// gfx90a has an undocumented limitation:
+// DS_GWS opcodes must use even aligned registers.
+bool AMDGPUAsmParser::validateGWS(const MCInst &Inst,
+                                  const OperandVector &Operands) {
+  if (!getFeatureBits()[AMDGPU::FeatureGFX90AInsts])
+    return true;
+
+  int Opc = Inst.getOpcode();
+  if (Opc != AMDGPU::DS_GWS_INIT_vi && Opc != AMDGPU::DS_GWS_BARRIER_vi &&
+      Opc != AMDGPU::DS_GWS_SEMA_BR_vi)
+    return true;
+
+  const MCRegisterInfo *MRI = getMRI();
+  const MCRegisterClass &VGPR32 = MRI->getRegClass(AMDGPU::VGPR_32RegClassID);
+  int Data0Pos =
+      AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::data0);
+  assert(Data0Pos != -1);
+  auto Reg = Inst.getOperand(Data0Pos).getReg();
+  auto RegIdx = Reg - (VGPR32.contains(Reg) ? AMDGPU::VGPR0 : AMDGPU::AGPR0);
+  if (RegIdx & 1) {
+    Error(getOperandLoc(Operands, Data0Pos), "vgpr must be even aligned");
+    return false;
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::validateCoherencyBits(const MCInst &Inst,
+                                            const OperandVector &Operands,
+                                            SMLoc IDLoc) {
+  int CPolPos = AMDGPU::getNamedOperandIdx(Inst.getOpcode(),
+                                           AMDGPU::OpName::cpol);
+  if (CPolPos == -1)
+    return true;
+
+  unsigned CPol = Inst.getOperand(CPolPos).getImm();
+
+  if (!isGFX1250Plus()) {
+    if (CPol & CPol::SCAL) {
+      SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
+      StringRef CStr(S.getPointer());
+      S = SMLoc::getFromPointer(&CStr.data()[CStr.find("scale_offset")]);
+      Error(S, "scale_offset is not supported on this GPU");
+    }
+    if (CPol & CPol::NV) {
+      SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
+      StringRef CStr(S.getPointer());
+      S = SMLoc::getFromPointer(&CStr.data()[CStr.find("nv")]);
+      Error(S, "nv is not supported on this GPU");
+    }
+  }
+
+  if ((CPol & CPol::SCAL) && !supportsScaleOffset(MII, Inst.getOpcode())) {
+    SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
+    StringRef CStr(S.getPointer());
+    S = SMLoc::getFromPointer(&CStr.data()[CStr.find("scale_offset")]);
+    Error(S, "scale_offset is not supported for this instruction");
+  }
+
+  if (isGFX12Plus())
+    return validateTHAndScopeBits(Inst, Operands, CPol);
+
+  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
+  if (TSFlags & SIInstrFlags::SMRD) {
+    if (CPol && (isSI() || isCI())) {
+      SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
+      Error(S, "cache policy is not supported for SMRD instructions");
+      return false;
+    }
+    if (CPol & ~(AMDGPU::CPol::GLC | AMDGPU::CPol::DLC)) {
+      Error(IDLoc, "invalid cache policy for SMEM instruction");
+      return false;
+    }
+  }
+
+  if (isGFX90A() && !isGFX940() && (CPol & CPol::SCC)) {
+    const uint64_t AllowSCCModifier = SIInstrFlags::MUBUF |
+                                      SIInstrFlags::MTBUF | SIInstrFlags::MIMG |
+                                      SIInstrFlags::FLAT;
+    if (!(TSFlags & AllowSCCModifier)) {
+      SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
+      StringRef CStr(S.getPointer());
+      S = SMLoc::getFromPointer(&CStr.data()[CStr.find("scc")]);
+      Error(S,
+            "scc modifier is not supported for this instruction on this GPU");
+      return false;
+    }
+  }
+
+  if (!(TSFlags & (SIInstrFlags::IsAtomicNoRet | SIInstrFlags::IsAtomicRet)))
+    return true;
+
+  if (TSFlags & SIInstrFlags::IsAtomicRet) {
+    if (!(TSFlags & SIInstrFlags::MIMG) && !(CPol & CPol::GLC)) {
+      Error(IDLoc, isGFX940() ? "instruction must use sc0"
+                              : "instruction must use glc");
+      return false;
+    }
+  } else {
+    if (CPol & CPol::GLC) {
+      SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
+      StringRef CStr(S.getPointer());
+      S = SMLoc::getFromPointer(
+          &CStr.data()[CStr.find(isGFX940() ? "sc0" : "glc")]);
+      Error(S, isGFX940() ? "instruction must not use sc0"
+                          : "instruction must not use glc");
+      return false;
+    }
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::validateTHAndScopeBits(const MCInst &Inst,
+                                             const OperandVector &Operands,
+                                             const unsigned CPol) {
+  const unsigned TH = CPol & AMDGPU::CPol::TH;
+  const unsigned Scope = CPol & AMDGPU::CPol::SCOPE;
+
+  const unsigned Opcode = Inst.getOpcode();
+  const MCInstrDesc &TID = MII.get(Opcode);
+
+  auto PrintError = [&](StringRef Msg) {
+    SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
+    Error(S, Msg);
+    return false;
+  };
+
+  if ((TH & AMDGPU::CPol::TH_ATOMIC_RETURN) &&
+      (TID.TSFlags & SIInstrFlags::IsAtomicNoRet))
+    return PrintError("th:TH_ATOMIC_RETURN requires a destination operand");
+
+  if ((TID.TSFlags & SIInstrFlags::IsAtomicRet) &&
+      (TID.TSFlags & (SIInstrFlags::FLAT | SIInstrFlags::MUBUF)) &&
+      (!(TH & AMDGPU::CPol::TH_ATOMIC_RETURN)))
+    return PrintError("instruction must use th:TH_ATOMIC_RETURN");
+
+  if (TH == 0)
+    return true;
+
+  if ((TID.TSFlags & SIInstrFlags::SMRD) &&
+      ((TH == AMDGPU::CPol::TH_NT_RT) || (TH == AMDGPU::CPol::TH_RT_NT) ||
+       (TH == AMDGPU::CPol::TH_NT_HT)))
+    return PrintError("invalid th value for SMEM instruction");
+
+  if (TH == AMDGPU::CPol::TH_BYPASS) {
+    if ((Scope != AMDGPU::CPol::SCOPE_SYS &&
+         CPol & AMDGPU::CPol::TH_REAL_BYPASS) ||
+        (Scope == AMDGPU::CPol::SCOPE_SYS &&
+         !(CPol & AMDGPU::CPol::TH_REAL_BYPASS)))
+      return PrintError("scope and th combination is not valid");
+  }
+
+  unsigned THType = AMDGPU::getTemporalHintType(TID);
+  if (THType == AMDGPU::CPol::TH_TYPE_ATOMIC) {
+    if (!(CPol & AMDGPU::CPol::TH_TYPE_ATOMIC))
+      return PrintError("invalid th value for atomic instructions");
+  } else if (THType == AMDGPU::CPol::TH_TYPE_STORE) {
+    if (!(CPol & AMDGPU::CPol::TH_TYPE_STORE))
+      return PrintError("invalid th value for store instructions");
+  } else {
+    if (!(CPol & AMDGPU::CPol::TH_TYPE_LOAD))
+      return PrintError("invalid th value for load instructions");
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::validateTFE(const MCInst &Inst,
+                                  const OperandVector &Operands) {
+  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
+  if (Desc.mayStore() &&
+      (Desc.TSFlags & (SIInstrFlags::MUBUF | SIInstrFlags::MTBUF))) {
+    SMLoc Loc = getImmLoc(AMDGPUOperand::ImmTyTFE, Operands);
+    if (Loc != getInstLoc(Operands)) {
+      Error(Loc, "TFE modifier has no meaning for store instructions");
+      return false;
+    }
+  }
+
+  return true;
+}
+
+bool AMDGPUAsmParser::validateWMMA(const MCInst &Inst,
+                                   const OperandVector &Operands) {
+  unsigned Opc = Inst.getOpcode();
+  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
+  const MCInstrDesc &Desc = MII.get(Opc);
+
+  auto validateFmt = [&](AMDGPU::OpName FmtOp, AMDGPU::OpName SrcOp) -> bool {
+    int FmtIdx = AMDGPU::getNamedOperandIdx(Opc, FmtOp);
+    if (FmtIdx == -1)
+      return true;
+    unsigned Fmt = Inst.getOperand(FmtIdx).getImm();
+    int SrcIdx = AMDGPU::getNamedOperandIdx(Opc, SrcOp);
+    unsigned RegSize =
+        TRI->getRegClass(MII.getOpRegClassID(Desc.operands()[SrcIdx], HwMode))
+            .getSizeInBits();
+
+    if (RegSize == AMDGPU::wmmaScaleF8F6F4FormatToNumRegs(Fmt) * 32)
+      return true;
+
+    Error(getOperandLoc(Operands, SrcIdx),
+          "wrong register tuple size for " +
+              Twine(WMMAMods::ModMatrixFmt[Fmt]));
+    return false;
+  };
+
+  return validateFmt(AMDGPU::OpName::matrix_a_fmt, AMDGPU::OpName::src0) &&
+         validateFmt(AMDGPU::OpName::matrix_b_fmt, AMDGPU::OpName::src1);
+}
+
+bool AMDGPUAsmParser::validateInstruction(const MCInst &Inst, SMLoc IDLoc,
+                                          const OperandVector &Operands) {
+  if (!validateLdsDirect(Inst, Operands))
+    return false;
+  if (!validateTrue16OpSel(Inst)) {
+    Error(getImmLoc(AMDGPUOperand::ImmTyOpSel, Operands),
+          "op_sel operand conflicts with 16-bit operand suffix");
+    return false;
+  }
+  if (!validateSOPLiteral(Inst, Operands))
+    return false;
+  if (!validateVOPLiteral(Inst, Operands)) {
+    return false;
+  }
+  if (!validateConstantBusLimitations(Inst, Operands)) {
+    return false;
+  }
+  if (!validateVOPD(Inst, Operands)) {
+    return false;
+  }
+  if (!validateIntClampSupported(Inst)) {
+    Error(getImmLoc(AMDGPUOperand::ImmTyClamp, Operands),
+          "integer clamping is not supported on this GPU");
+    return false;
+  }
+  if (!validateOpSel(Inst)) {
+    Error(getImmLoc(AMDGPUOperand::ImmTyOpSel, Operands),
+      "invalid op_sel operand");
+    return false;
+  }
+  if (!validateNeg(Inst, AMDGPU::OpName::neg_lo)) {
+    Error(getImmLoc(AMDGPUOperand::ImmTyNegLo, Operands),
+          "invalid neg_lo operand");
+    return false;
+  }
+  if (!validateNeg(Inst, AMDGPU::OpName::neg_hi)) {
+    Error(getImmLoc(AMDGPUOperand::ImmTyNegHi, Operands),
+          "invalid neg_hi operand");
+    return false;
+  }
+  if (!validateDPP(Inst, Operands)) {
+    return false;
+  }
+  // For MUBUF/MTBUF d16 is a part of opcode, so there is nothing to validate.
+  if (!validateMIMGD16(Inst)) {
+    Error(getImmLoc(AMDGPUOperand::ImmTyD16, Operands),
+      "d16 modifier is not supported on this GPU");
+    return false;
+  }
+  if (!validateMIMGDim(Inst, Operands)) {
+    Error(IDLoc, "missing dim operand");
+    return false;
+  }
+  if (!validateTensorR128(Inst)) {
+    Error(getImmLoc(AMDGPUOperand::ImmTyD16, Operands),
+          "instruction must set modifier r128=0");
+    return false;
+  }
+  if (!validateMIMGMSAA(Inst)) {
+    Error(getImmLoc(AMDGPUOperand::ImmTyDim, Operands),
+          "invalid dim; must be MSAA type");
+    return false;
+  }
+  if (!validateMIMGDataSize(Inst, IDLoc)) {
+    return false;
+  }
+  if (!validateMIMGAddrSize(Inst, IDLoc))
+    return false;
+  if (!validateMIMGAtomicDMask(Inst)) {
+    Error(getImmLoc(AMDGPUOperand::ImmTyDMask, Operands),
+      "invalid atomic image dmask");
+    return false;
+  }
+  if (!validateMIMGGatherDMask(Inst)) {
+    Error(getImmLoc(AMDGPUOperand::ImmTyDMask, Operands),
+      "invalid image_gather dmask: only one bit must be set");
+    return false;
+  }
+  if (!validateMovrels(Inst, Operands)) {
+    return false;
+  }
+  if (!validateOffset(Inst, Operands)) {
+    return false;
+  }
+  if (!validateMAIAccWrite(Inst, Operands)) {
+    return false;
+  }
+  if (!validateMAISrc2(Inst, Operands)) {
+    return false;
+  }
+  if (!validateMFMA(Inst, Operands)) {
+    return false;
+  }
+  if (!validateCoherencyBits(Inst, Operands, IDLoc)) {
+    return false;
+  }
+
+  if (!validateAGPRLdSt(Inst)) {
+    Error(IDLoc, getFeatureBits()[AMDGPU::FeatureGFX90AInsts]
+    ? "invalid register class: data and dst should be all VGPR or AGPR"
+    : "invalid register class: agpr loads and stores not supported on this GPU"
+    );
+    return false;
+  }
+  if (!validateVGPRAlign(Inst)) {
+    Error(IDLoc,
+      "invalid register class: vgpr tuples must be 64 bit aligned");
+    return false;
+  }
+  if (!validateDS(Inst, Operands)) {
+    return false;
+  }
+
+  if (!validateBLGP(Inst, Operands)) {
+    return false;
+  }
+
+  if (!validateDivScale(Inst)) {
+    Error(IDLoc, "ABS not allowed in VOP3B instructions");
+    return false;
+  }
+  if (!validateWaitCnt(Inst, Operands)) {
+    return false;
+  }
+  if (!validateTFE(Inst, Operands)) {
+    return false;
+  }
+  if (!validateWMMA(Inst, Operands)) {
+    return false;
+  }
+
+  return true;
+}
+
+static std::string AMDGPUMnemonicSpellCheck(StringRef S,
+                                            const FeatureBitset &FBS,
+                                            unsigned VariantID = 0);
+
+static bool AMDGPUCheckMnemonic(StringRef Mnemonic,
+                                const FeatureBitset &AvailableFeatures,
+                                unsigned VariantID);
+
+bool AMDGPUAsmParser::isSupportedMnemo(StringRef Mnemo,
+                                       const FeatureBitset &FBS) {
+  return isSupportedMnemo(Mnemo, FBS, getAllVariants());
+}
+
+bool AMDGPUAsmParser::isSupportedMnemo(StringRef Mnemo,
+                                       const FeatureBitset &FBS,
+                                       ArrayRef<unsigned> Variants) {
+  for (auto Variant : Variants) {
+    if (AMDGPUCheckMnemonic(Mnemo, FBS, Variant))
+      return true;
+  }
+
+  return false;
+}
+
+bool AMDGPUAsmParser::checkUnsupportedInstruction(StringRef Mnemo,
+                                                  SMLoc IDLoc) {
+  FeatureBitset FBS = ComputeAvailableFeatures(getFeatureBits());
+
+  // Check if requested instruction variant is supported.
+  if (isSupportedMnemo(Mnemo, FBS, getMatchedVariants()))
+    return false;
+
+  // This instruction is not supported.
+  // Clear any other pending errors because they are no longer relevant.
+  getParser().clearPendingErrors();
+
+  // Requested instruction variant is not supported.
+  // Check if any other variants are supported.
+  StringRef VariantName = getMatchedVariantName();
+  if (!VariantName.empty() && isSupportedMnemo(Mnemo, FBS)) {
+    return Error(IDLoc,
+                 Twine(VariantName,
+                       " variant of this instruction is not supported"));
+  }
+
+  // Check if this instruction may be used with a different wavesize.
+  if (isGFX10Plus() && getFeatureBits()[AMDGPU::FeatureWavefrontSize64] &&
+      !getFeatureBits()[AMDGPU::FeatureWavefrontSize32]) {
+    // FIXME: Use getAvailableFeatures, and do not manually recompute
+    FeatureBitset FeaturesWS32 = getFeatureBits();
+    FeaturesWS32.flip(AMDGPU::FeatureWavefrontSize64)
+        .flip(AMDGPU::FeatureWavefrontSize32);
+    FeatureBitset AvailableFeaturesWS32 =
+        ComputeAvailableFeatures(FeaturesWS32);
+
+    if (isSupportedMnemo(Mnemo, AvailableFeaturesWS32, getMatchedVariants()))
+      return Error(IDLoc, "instruction requires wavesize=32");
+  }
+
+  // Finally check if this instruction is supported on any other GPU.
+  if (isSupportedMnemo(Mnemo, FeatureBitset().set())) {
+    return Error(IDLoc, "instruction not supported on this GPU");
+  }
+
+  // Instruction not supported on any GPU. Probably a typo.
+  std::string Suggestion = AMDGPUMnemonicSpellCheck(Mnemo, FBS);
+  return Error(IDLoc, "invalid instruction" + Suggestion);
+}
+
+static bool isInvalidVOPDY(const OperandVector &Operands,
+                           uint64_t InvalidOprIdx) {
+  assert(InvalidOprIdx < Operands.size());
+  const auto &Op = ((AMDGPUOperand &)*Operands[InvalidOprIdx]);
+  if (Op.isToken() && InvalidOprIdx > 1) {
+    const auto &PrevOp = ((AMDGPUOperand &)*Operands[InvalidOprIdx - 1]);
+    return PrevOp.isToken() && PrevOp.getToken() == "::";
+  }
+  return false;
+}
+
+bool AMDGPUAsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
+                                              OperandVector &Operands,
+                                              MCStreamer &Out,
+                                              uint64_t &ErrorInfo,
+                                              bool MatchingInlineAsm) {
+  MCInst Inst;
+  Inst.setLoc(IDLoc);
+  unsigned Result = Match_Success;
+  for (auto Variant : getMatchedVariants()) {
+    uint64_t EI;
+    auto R = MatchInstructionImpl(Operands, Inst, EI, MatchingInlineAsm,
+                                  Variant);
+    // We order match statuses from least to most specific. We use most specific
+    // status as resulting
+    // Match_MnemonicFail < Match_InvalidOperand < Match_MissingFeature
+    if (R == Match_Success || R == Match_MissingFeature ||
+        (R == Match_InvalidOperand && Result != Match_MissingFeature) ||
+        (R == Match_MnemonicFail && Result != Match_InvalidOperand &&
+         Result != Match_MissingFeature)) {
+      Result = R;
+      ErrorInfo = EI;
+    }
+    if (R == Match_Success)
+      break;
+  }
+
+  if (Result == Match_Success) {
+    if (!validateInstruction(Inst, IDLoc, Operands)) {
+      return true;
+    }
+    Out.emitInstruction(Inst, getSTI());
+    return false;
+  }
+
+  StringRef Mnemo = ((AMDGPUOperand &)*Operands[0]).getToken();
+  if (checkUnsupportedInstruction(Mnemo, IDLoc)) {
+    return true;
+  }
+
+  switch (Result) {
+  default: break;
+  case Match_MissingFeature:
+    // It has been verified that the specified instruction
+    // mnemonic is valid. A match was found but it requires
+    // features which are not supported on this GPU.
+    return Error(IDLoc, "operands are not valid for this GPU or mode");
+
+  case Match_InvalidOperand: {
+    SMLoc ErrorLoc = IDLoc;
+    if (ErrorInfo != ~0ULL) {
+      if (ErrorInfo >= Operands.size()) {
+        return Error(IDLoc, "too few operands for instruction");
+      }
+      ErrorLoc = ((AMDGPUOperand &)*Operands[ErrorInfo]).getStartLoc();
+      if (ErrorLoc == SMLoc())
+        ErrorLoc = IDLoc;
+
+      if (isInvalidVOPDY(Operands, ErrorInfo))
+        return Error(ErrorLoc, "invalid VOPDY instruction");
+    }
+    return Error(ErrorLoc, "invalid operand for instruction");
+  }
+
+  case Match_MnemonicFail:
+    llvm_unreachable("Invalid instructions should have been handled already");
+  }
+  llvm_unreachable("Implement any new match types added!");
+}
+
+bool AMDGPUAsmParser::ParseAsAbsoluteExpression(uint32_t &Ret) {
+  int64_t Tmp = -1;
+  if (!isToken(AsmToken::Integer) && !isToken(AsmToken::Identifier)) {
+    return true;
+  }
+  if (getParser().parseAbsoluteExpression(Tmp)) {
+    return true;
+  }
+  Ret = static_cast<uint32_t>(Tmp);
+  return false;
+}
+
+bool AMDGPUAsmParser::ParseDirectiveAMDGCNTarget() {
+  if (!getSTI().getTargetTriple().isAMDGCN())
+    return TokError("directive only supported for amdgcn architecture");
+
+  std::string TargetIDDirective;
+  SMLoc TargetStart = getTok().getLoc();
+  if (getParser().parseEscapedString(TargetIDDirective))
+    return true;
+
+  SMRange TargetRange = SMRange(TargetStart, getTok().getLoc());
+  if (getTargetStreamer().getTargetID()->toString() != TargetIDDirective)
+    return getParser().Error(TargetRange.Start,
+        (Twine(".amdgcn_target directive's target id ") +
+         Twine(TargetIDDirective) +
+         Twine(" does not match the specified target id ") +
+         Twine(getTargetStreamer().getTargetID()->toString())).str());
+
+  return false;
+}
+
+bool AMDGPUAsmParser::OutOfRangeError(SMRange Range) {
+  return Error(Range.Start, "value out of range", Range);
+}
+
+bool AMDGPUAsmParser::calculateGPRBlocks(
+    const FeatureBitset &Features, const MCExpr *VCCUsed,
+    const MCExpr *FlatScrUsed, bool XNACKUsed,
+    std::optional<bool> EnableWavefrontSize32, const MCExpr *NextFreeVGPR,
+    SMRange VGPRRange, const MCExpr *NextFreeSGPR, SMRange SGPRRange,
+    const MCExpr *&VGPRBlocks, const MCExpr *&SGPRBlocks) {
+  // TODO(scott.linder): These calculations are duplicated from
+  // AMDGPUAsmPrinter::getSIProgramInfo and could be unified.
+  IsaVersion Version = getIsaVersion(getSTI().getCPU());
+  MCContext &Ctx = getContext();
+
+  const MCExpr *NumSGPRs = NextFreeSGPR;
+  int64_t EvaluatedSGPRs;
+
+  if (Version.Major >= 10)
+    NumSGPRs = MCConstantExpr::create(0, Ctx);
+  else {
+    unsigned MaxAddressableNumSGPRs =
+        IsaInfo::getAddressableNumSGPRs(&getSTI());
+
+    if (NumSGPRs->evaluateAsAbsolute(EvaluatedSGPRs) && Version.Major >= 8 &&
+        !Features.test(FeatureSGPRInitBug) &&
+        static_cast<uint64_t>(EvaluatedSGPRs) > MaxAddressableNumSGPRs)
+      return OutOfRangeError(SGPRRange);
+
+    const MCExpr *ExtraSGPRs =
+        AMDGPUMCExpr::createExtraSGPRs(VCCUsed, FlatScrUsed, XNACKUsed, Ctx);
+    NumSGPRs = MCBinaryExpr::createAdd(NumSGPRs, ExtraSGPRs, Ctx);
+
+    if (NumSGPRs->evaluateAsAbsolute(EvaluatedSGPRs) &&
+        (Version.Major <= 7 || Features.test(FeatureSGPRInitBug)) &&
+        static_cast<uint64_t>(EvaluatedSGPRs) > MaxAddressableNumSGPRs)
+      return OutOfRangeError(SGPRRange);
+
+    if (Features.test(FeatureSGPRInitBug))
+      NumSGPRs =
+          MCConstantExpr::create(IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG, Ctx);
+  }
+
+  // The MCExpr equivalent of getNumSGPRBlocks/getNumVGPRBlocks:
+  // (alignTo(max(1u, NumGPR), GPREncodingGranule) / GPREncodingGranule) - 1
+  auto GetNumGPRBlocks = [&Ctx](const MCExpr *NumGPR,
+                                unsigned Granule) -> const MCExpr * {
+    const MCExpr *OneConst = MCConstantExpr::create(1ul, Ctx);
+    const MCExpr *GranuleConst = MCConstantExpr::create(Granule, Ctx);
+    const MCExpr *MaxNumGPR = AMDGPUMCExpr::createMax({NumGPR, OneConst}, Ctx);
+    const MCExpr *AlignToGPR =
+        AMDGPUMCExpr::createAlignTo(MaxNumGPR, GranuleConst, Ctx);
+    const MCExpr *DivGPR =
+        MCBinaryExpr::createDiv(AlignToGPR, GranuleConst, Ctx);
+    const MCExpr *SubGPR = MCBinaryExpr::createSub(DivGPR, OneConst, Ctx);
+    return SubGPR;
+  };
+
+  VGPRBlocks = GetNumGPRBlocks(
+      NextFreeVGPR,
+      IsaInfo::getVGPREncodingGranule(&getSTI(), EnableWavefrontSize32));
+  SGPRBlocks =
+      GetNumGPRBlocks(NumSGPRs, IsaInfo::getSGPREncodingGranule(&getSTI()));
+
+  return false;
+}
+
+bool AMDGPUAsmParser::ParseDirectiveAMDHSAKernel() {
+  if (!getSTI().getTargetTriple().isAMDGCN())
+    return TokError("directive only supported for amdgcn architecture");
+
+  if (!isHsaAbi(getSTI()))
+    return TokError("directive only supported for amdhsa OS");
+
+  StringRef KernelName;
+  if (getParser().parseIdentifier(KernelName))
+    return true;
+
+  AMDGPU::MCKernelDescriptor KD =
+      AMDGPU::MCKernelDescriptor::getDefaultAmdhsaKernelDescriptor(
+          &getSTI(), getContext());
+
+  StringSet<> Seen;
+
+  IsaVersion IVersion = getIsaVersion(getSTI().getCPU());
+
+  const MCExpr *ZeroExpr = MCConstantExpr::create(0, getContext());
+  const MCExpr *OneExpr = MCConstantExpr::create(1, getContext());
+
+  SMRange VGPRRange;
+  const MCExpr *NextFreeVGPR = ZeroExpr;
+  const MCExpr *AccumOffset = MCConstantExpr::create(0, getContext());
+  const MCExpr *NamedBarCnt = ZeroExpr;
+  uint64_t SharedVGPRCount = 0;
+  uint64_t PreloadLength = 0;
+  uint64_t PreloadOffset = 0;
+  SMRange SGPRRange;
+  const MCExpr *NextFreeSGPR = ZeroExpr;
+
+  // Count the number of user SGPRs implied from the enabled feature bits.
+  unsigned ImpliedUserSGPRCount = 0;
+
+  // Track if the asm explicitly contains the directive for the user SGPR
+  // count.
+  std::optional<unsigned> ExplicitUserSGPRCount;
+  const MCExpr *ReserveVCC = OneExpr;
+  const MCExpr *ReserveFlatScr = OneExpr;
+  std::optional<bool> EnableWavefrontSize32;
+
+  while (true) {
+    while (trySkipToken(AsmToken::EndOfStatement));
+
+    StringRef ID;
+    SMRange IDRange = getTok().getLocRange();
+    if (!parseId(ID, "expected .amdhsa_ directive or .end_amdhsa_kernel"))
+      return true;
+
+    if (ID == ".end_amdhsa_kernel")
+      break;
+
+    if (!Seen.insert(ID).second)
+      return TokError(".amdhsa_ directives cannot be repeated");
+
+    SMLoc ValStart = getLoc();
+    const MCExpr *ExprVal;
+    if (getParser().parseExpression(ExprVal))
+      return true;
+    SMLoc ValEnd = getLoc();
+    SMRange ValRange = SMRange(ValStart, ValEnd);
+
+    int64_t IVal = 0;
+    uint64_t Val = IVal;
+    bool EvaluatableExpr;
+    if ((EvaluatableExpr = ExprVal->evaluateAsAbsolute(IVal))) {
+      if (IVal < 0)
+        return OutOfRangeError(ValRange);
+      Val = IVal;
+    }
+
+#define PARSE_BITS_ENTRY(FIELD, ENTRY, VALUE, RANGE)                           \
+  if (!isUInt<ENTRY##_WIDTH>(Val))                                             \
+    return OutOfRangeError(RANGE);                                             \
+  AMDGPU::MCKernelDescriptor::bits_set(FIELD, VALUE, ENTRY##_SHIFT, ENTRY,     \
+                                       getContext());
+
+// Some fields use the parsed value immediately which requires the expression to
+// be solvable.
+#define EXPR_RESOLVE_OR_ERROR(RESOLVED)                                        \
+  if (!(RESOLVED))                                                             \
+    return Error(IDRange.Start, "directive should have resolvable expression", \
+                 IDRange);
+
+    if (ID == ".amdhsa_group_segment_fixed_size") {
+      if (!isUInt<sizeof(kernel_descriptor_t::group_segment_fixed_size) *
+                  CHAR_BIT>(Val))
+        return OutOfRangeError(ValRange);
+      KD.group_segment_fixed_size = ExprVal;
+    } else if (ID == ".amdhsa_private_segment_fixed_size") {
+      if (!isUInt<sizeof(kernel_descriptor_t::private_segment_fixed_size) *
+                  CHAR_BIT>(Val))
+        return OutOfRangeError(ValRange);
+      KD.private_segment_fixed_size = ExprVal;
+    } else if (ID == ".amdhsa_kernarg_size") {
+      if (!isUInt<sizeof(kernel_descriptor_t::kernarg_size) * CHAR_BIT>(Val))
+        return OutOfRangeError(ValRange);
+      KD.kernarg_size = ExprVal;
+    } else if (ID == ".amdhsa_user_sgpr_count") {
+      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
+      ExplicitUserSGPRCount = Val;
+    } else if (ID == ".amdhsa_user_sgpr_private_segment_buffer") {
+      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
+      if (hasArchitectedFlatScratch())
+        return Error(IDRange.Start,
+                     "directive is not supported with architected flat scratch",
+                     IDRange);
+      PARSE_BITS_ENTRY(KD.kernel_code_properties,
+                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER,
+                       ExprVal, ValRange);
+      if (Val)
+        ImpliedUserSGPRCount += 4;
+    } else if (ID == ".amdhsa_user_sgpr_kernarg_preload_length") {
+      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
+      if (!hasKernargPreload())
+        return Error(IDRange.Start, "directive requires gfx90a+", IDRange);
+
+      if (Val > getMaxNumUserSGPRs())
+        return OutOfRangeError(ValRange);
+      PARSE_BITS_ENTRY(KD.kernarg_preload, KERNARG_PRELOAD_SPEC_LENGTH, ExprVal,
+                       ValRange);
+      if (Val) {
+        ImpliedUserSGPRCount += Val;
+        PreloadLength = Val;
+      }
+    } else if (ID == ".amdhsa_user_sgpr_kernarg_preload_offset") {
+      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
+      if (!hasKernargPreload())
+        return Error(IDRange.Start, "directive requires gfx90a+", IDRange);
+
+      if (Val >= 1024)
+        return OutOfRangeError(ValRange);
+      PARSE_BITS_ENTRY(KD.kernarg_preload, KERNARG_PRELOAD_SPEC_OFFSET, ExprVal,
+                       ValRange);
+      if (Val)
+        PreloadOffset = Val;
+    } else if (ID == ".amdhsa_user_sgpr_dispatch_ptr") {
+      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
+      PARSE_BITS_ENTRY(KD.kernel_code_properties,
+                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR, ExprVal,
+                       ValRange);
+      if (Val)
+        ImpliedUserSGPRCount += 2;
+    } else if (ID == ".amdhsa_user_sgpr_queue_ptr") {
+      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
+      PARSE_BITS_ENTRY(KD.kernel_code_properties,
+                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR, ExprVal,
+                       ValRange);
+      if (Val)
+        ImpliedUserSGPRCount += 2;
+    } else if (ID == ".amdhsa_user_sgpr_kernarg_segment_ptr") {
+      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
+      PARSE_BITS_ENTRY(KD.kernel_code_properties,
+                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR,
+                       ExprVal, ValRange);
+      if (Val)
+        ImpliedUserSGPRCount += 2;
+    } else if (ID == ".amdhsa_user_sgpr_dispatch_id") {
+      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
+      PARSE_BITS_ENTRY(KD.kernel_code_properties,
+                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID, ExprVal,
+                       ValRange);
+      if (Val)
+        ImpliedUserSGPRCount += 2;
+    } else if (ID == ".amdhsa_user_sgpr_flat_scratch_init") {
+      if (hasArchitectedFlatScratch())
+        return Error(IDRange.Start,
+                     "directive is not supported with architected flat scratch",
+                     IDRange);
+      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
+      PARSE_BITS_ENTRY(KD.kernel_code_properties,
+                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT,
+                       ExprVal, ValRange);
+      if (Val)
+        ImpliedUserSGPRCount += 2;
+    } else if (ID == ".amdhsa_user_sgpr_private_segment_size") {
+      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
+      PARSE_BITS_ENTRY(KD.kernel_code_properties,
+                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE,
+                       ExprVal, ValRange);
+      if (Val)
+        ImpliedUserSGPRCount += 1;
+    } else if (ID == ".amdhsa_wavefront_size32") {
+      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
+      if (IVersion.Major < 10)
+        return Error(IDRange.Start, "directive requires gfx10+", IDRange);
+      EnableWavefrontSize32 = Val;
+      PARSE_BITS_ENTRY(KD.kernel_code_properties,
+                       KERNEL_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_uses_dynamic_stack") {
+      PARSE_BITS_ENTRY(KD.kernel_code_properties,
+                       KERNEL_CODE_PROPERTY_USES_DYNAMIC_STACK, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_system_sgpr_private_segment_wavefront_offset") {
+      if (hasArchitectedFlatScratch())
+        return Error(IDRange.Start,
+                     "directive is not supported with architected flat scratch",
+                     IDRange);
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
+                       COMPUTE_PGM_RSRC2_ENABLE_PRIVATE_SEGMENT, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_enable_private_segment") {
+      if (!hasArchitectedFlatScratch())
+        return Error(
+            IDRange.Start,
+            "directive is not supported without architected flat scratch",
+            IDRange);
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
+                       COMPUTE_PGM_RSRC2_ENABLE_PRIVATE_SEGMENT, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_system_sgpr_workgroup_id_x") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
+                       COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_X, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_system_sgpr_workgroup_id_y") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
+                       COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_Y, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_system_sgpr_workgroup_id_z") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
+                       COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_Z, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_system_sgpr_workgroup_info") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
+                       COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_INFO, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_system_vgpr_workitem_id") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
+                       COMPUTE_PGM_RSRC2_ENABLE_VGPR_WORKITEM_ID, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_next_free_vgpr") {
+      VGPRRange = ValRange;
+      NextFreeVGPR = ExprVal;
+    } else if (ID == ".amdhsa_next_free_sgpr") {
+      SGPRRange = ValRange;
+      NextFreeSGPR = ExprVal;
+    } else if (ID == ".amdhsa_accum_offset") {
+      if (!isGFX90A())
+        return Error(IDRange.Start, "directive requires gfx90a+", IDRange);
+      AccumOffset = ExprVal;
+    } else if (ID == ".amdhsa_named_barrier_count") {
+      if (!isGFX1250Plus())
+        return Error(IDRange.Start, "directive requires gfx1250+", IDRange);
+      NamedBarCnt = ExprVal;
+    } else if (ID == ".amdhsa_reserve_vcc") {
+      if (EvaluatableExpr && !isUInt<1>(Val))
+        return OutOfRangeError(ValRange);
+      ReserveVCC = ExprVal;
+    } else if (ID == ".amdhsa_reserve_flat_scratch") {
+      if (IVersion.Major < 7)
+        return Error(IDRange.Start, "directive requires gfx7+", IDRange);
+      if (hasArchitectedFlatScratch())
+        return Error(IDRange.Start,
+                     "directive is not supported with architected flat scratch",
+                     IDRange);
+      if (EvaluatableExpr && !isUInt<1>(Val))
+        return OutOfRangeError(ValRange);
+      ReserveFlatScr = ExprVal;
+    } else if (ID == ".amdhsa_reserve_xnack_mask") {
+      if (IVersion.Major < 8)
+        return Error(IDRange.Start, "directive requires gfx8+", IDRange);
+      if (!isUInt<1>(Val))
+        return OutOfRangeError(ValRange);
+      if (Val != getTargetStreamer().getTargetID()->isXnackOnOrAny())
+        return getParser().Error(IDRange.Start, ".amdhsa_reserve_xnack_mask does not match target id",
+                                 IDRange);
+    } else if (ID == ".amdhsa_float_round_mode_32") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
+                       COMPUTE_PGM_RSRC1_FLOAT_ROUND_MODE_32, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_float_round_mode_16_64") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
+                       COMPUTE_PGM_RSRC1_FLOAT_ROUND_MODE_16_64, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_float_denorm_mode_32") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
+                       COMPUTE_PGM_RSRC1_FLOAT_DENORM_MODE_32, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_float_denorm_mode_16_64") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
+                       COMPUTE_PGM_RSRC1_FLOAT_DENORM_MODE_16_64, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_dx10_clamp") {
+      if (!getSTI().hasFeature(AMDGPU::FeatureDX10ClampAndIEEEMode))
+        return Error(IDRange.Start, "directive unsupported on gfx1170+",
+                     IDRange);
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
+                       COMPUTE_PGM_RSRC1_GFX6_GFX11_ENABLE_DX10_CLAMP, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_ieee_mode") {
+      if (!getSTI().hasFeature(AMDGPU::FeatureDX10ClampAndIEEEMode))
+        return Error(IDRange.Start, "directive unsupported on gfx1170+",
+                     IDRange);
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
+                       COMPUTE_PGM_RSRC1_GFX6_GFX11_ENABLE_IEEE_MODE, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_fp16_overflow") {
+      if (IVersion.Major < 9)
+        return Error(IDRange.Start, "directive requires gfx9+", IDRange);
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
+                       COMPUTE_PGM_RSRC1_GFX9_PLUS_FP16_OVFL, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_tg_split") {
+      if (!isGFX90A())
+        return Error(IDRange.Start, "directive requires gfx90a+", IDRange);
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc3, COMPUTE_PGM_RSRC3_GFX90A_TG_SPLIT,
+                       ExprVal, ValRange);
+    } else if (ID == ".amdhsa_workgroup_processor_mode") {
+      if (!supportsWGP(getSTI()))
+        return Error(IDRange.Start,
+                     "directive unsupported on " + getSTI().getCPU(), IDRange);
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
+                       COMPUTE_PGM_RSRC1_GFX10_PLUS_WGP_MODE, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_memory_ordered") {
+      if (IVersion.Major < 10)
+        return Error(IDRange.Start, "directive requires gfx10+", IDRange);
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
+                       COMPUTE_PGM_RSRC1_GFX10_PLUS_MEM_ORDERED, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_forward_progress") {
+      if (IVersion.Major < 10)
+        return Error(IDRange.Start, "directive requires gfx10+", IDRange);
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
+                       COMPUTE_PGM_RSRC1_GFX10_PLUS_FWD_PROGRESS, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_shared_vgpr_count") {
+      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
+      if (IVersion.Major < 10 || IVersion.Major >= 12)
+        return Error(IDRange.Start, "directive requires gfx10 or gfx11",
+                     IDRange);
+      SharedVGPRCount = Val;
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc3,
+                       COMPUTE_PGM_RSRC3_GFX10_GFX11_SHARED_VGPR_COUNT, ExprVal,
+                       ValRange);
+    } else if (ID == ".amdhsa_inst_pref_size") {
+      if (IVersion.Major < 11)
+        return Error(IDRange.Start, "directive requires gfx11+", IDRange);
+      if (IVersion.Major == 11) {
+        PARSE_BITS_ENTRY(KD.compute_pgm_rsrc3,
+                         COMPUTE_PGM_RSRC3_GFX11_INST_PREF_SIZE, ExprVal,
+                         ValRange);
+      } else {
+        PARSE_BITS_ENTRY(KD.compute_pgm_rsrc3,
+                         COMPUTE_PGM_RSRC3_GFX12_PLUS_INST_PREF_SIZE, ExprVal,
+                         ValRange);
+      }
+    } else if (ID == ".amdhsa_exception_fp_ieee_invalid_op") {
+      PARSE_BITS_ENTRY(
+          KD.compute_pgm_rsrc2,
+          COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_INVALID_OPERATION,
+          ExprVal, ValRange);
+    } else if (ID == ".amdhsa_exception_fp_denorm_src") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
+                       COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_FP_DENORMAL_SOURCE,
+                       ExprVal, ValRange);
+    } else if (ID == ".amdhsa_exception_fp_ieee_div_zero") {
+      PARSE_BITS_ENTRY(
+          KD.compute_pgm_rsrc2,
+          COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_DIVISION_BY_ZERO,
+          ExprVal, ValRange);
+    } else if (ID == ".amdhsa_exception_fp_ieee_overflow") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
+                       COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_OVERFLOW,
+                       ExprVal, ValRange);
+    } else if (ID == ".amdhsa_exception_fp_ieee_underflow") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
+                       COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_UNDERFLOW,
+                       ExprVal, ValRange);
+    } else if (ID == ".amdhsa_exception_fp_ieee_inexact") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
+                       COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_INEXACT,
+                       ExprVal, ValRange);
+    } else if (ID == ".amdhsa_exception_int_div_zero") {
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
+                       COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_INT_DIVIDE_BY_ZERO,
+                       ExprVal, ValRange);
+    } else if (ID == ".amdhsa_round_robin_scheduling") {
+      if (IVersion.Major < 12)
+        return Error(IDRange.Start, "directive requires gfx12+", IDRange);
+      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
+                       COMPUTE_PGM_RSRC1_GFX12_PLUS_ENABLE_WG_RR_EN, ExprVal,
+                       ValRange);
+    } else {
+      return Error(IDRange.Start, "unknown .amdhsa_kernel directive", IDRange);
+    }
+
+#undef PARSE_BITS_ENTRY
+  }
+
+  if (!Seen.contains(".amdhsa_next_free_vgpr"))
+    return TokError(".amdhsa_next_free_vgpr directive is required");
+
+  if (!Seen.contains(".amdhsa_next_free_sgpr"))
+    return TokError(".amdhsa_next_free_sgpr directive is required");
+
+  unsigned UserSGPRCount = ExplicitUserSGPRCount.value_or(ImpliedUserSGPRCount);
+
+  // Consider the case where the total number of UserSGPRs with trailing
+  // allocated preload SGPRs, is greater than the number of explicitly
+  // referenced SGPRs.
+  if (PreloadLength) {
+    MCContext &Ctx = getContext();
+    NextFreeSGPR = AMDGPUMCExpr::createMax(
+        {NextFreeSGPR, MCConstantExpr::create(UserSGPRCount, Ctx)}, Ctx);
+  }
+
+  const MCExpr *VGPRBlocks;
+  const MCExpr *SGPRBlocks;
+  if (calculateGPRBlocks(getFeatureBits(), ReserveVCC, ReserveFlatScr,
+                         getTargetStreamer().getTargetID()->isXnackOnOrAny(),
+                         EnableWavefrontSize32, NextFreeVGPR,
+                         VGPRRange, NextFreeSGPR, SGPRRange, VGPRBlocks,
+                         SGPRBlocks))
+    return true;
+
+  int64_t EvaluatedVGPRBlocks;
+  bool VGPRBlocksEvaluatable =
+      VGPRBlocks->evaluateAsAbsolute(EvaluatedVGPRBlocks);
+  if (VGPRBlocksEvaluatable &&
+      !isUInt<COMPUTE_PGM_RSRC1_GRANULATED_WORKITEM_VGPR_COUNT_WIDTH>(
+          static_cast<uint64_t>(EvaluatedVGPRBlocks))) {
+    return OutOfRangeError(VGPRRange);
+  }
+  AMDGPU::MCKernelDescriptor::bits_set(
+      KD.compute_pgm_rsrc1, VGPRBlocks,
+      COMPUTE_PGM_RSRC1_GRANULATED_WORKITEM_VGPR_COUNT_SHIFT,
+      COMPUTE_PGM_RSRC1_GRANULATED_WORKITEM_VGPR_COUNT, getContext());
+
+  int64_t EvaluatedSGPRBlocks;
+  if (SGPRBlocks->evaluateAsAbsolute(EvaluatedSGPRBlocks) &&
+      !isUInt<COMPUTE_PGM_RSRC1_GRANULATED_WAVEFRONT_SGPR_COUNT_WIDTH>(
+          static_cast<uint64_t>(EvaluatedSGPRBlocks)))
+    return OutOfRangeError(SGPRRange);
+  AMDGPU::MCKernelDescriptor::bits_set(
+      KD.compute_pgm_rsrc1, SGPRBlocks,
+      COMPUTE_PGM_RSRC1_GRANULATED_WAVEFRONT_SGPR_COUNT_SHIFT,
+      COMPUTE_PGM_RSRC1_GRANULATED_WAVEFRONT_SGPR_COUNT, getContext());
+
+  if (ExplicitUserSGPRCount && ImpliedUserSGPRCount > *ExplicitUserSGPRCount)
+    return TokError("amdgpu_user_sgpr_count smaller than than implied by "
+                    "enabled user SGPRs");
+
+  if (isGFX1250Plus()) {
+    if (!isUInt<COMPUTE_PGM_RSRC2_GFX125_USER_SGPR_COUNT_WIDTH>(UserSGPRCount))
+      return TokError("too many user SGPRs enabled");
+    AMDGPU::MCKernelDescriptor::bits_set(
+        KD.compute_pgm_rsrc2,
+        MCConstantExpr::create(UserSGPRCount, getContext()),
+        COMPUTE_PGM_RSRC2_GFX125_USER_SGPR_COUNT_SHIFT,
+        COMPUTE_PGM_RSRC2_GFX125_USER_SGPR_COUNT, getContext());
+  } else {
+    if (!isUInt<COMPUTE_PGM_RSRC2_GFX6_GFX120_USER_SGPR_COUNT_WIDTH>(
+            UserSGPRCount))
+      return TokError("too many user SGPRs enabled");
+    AMDGPU::MCKernelDescriptor::bits_set(
+        KD.compute_pgm_rsrc2,
+        MCConstantExpr::create(UserSGPRCount, getContext()),
+        COMPUTE_PGM_RSRC2_GFX6_GFX120_USER_SGPR_COUNT_SHIFT,
+        COMPUTE_PGM_RSRC2_GFX6_GFX120_USER_SGPR_COUNT, getContext());
+  }
+
+  int64_t IVal = 0;
+  if (!KD.kernarg_size->evaluateAsAbsolute(IVal))
+    return TokError("Kernarg size should be resolvable");
+  uint64_t kernarg_size = IVal;
+  if (PreloadLength && kernarg_size &&
+      (PreloadLength * 4 + PreloadOffset * 4 > kernarg_size))
+    return TokError("Kernarg preload length + offset is larger than the "
+                    "kernarg segment size");
+
+  if (isGFX90A()) {
+    if (!Seen.contains(".amdhsa_accum_offset"))
+      return TokError(".amdhsa_accum_offset directive is required");
+    int64_t EvaluatedAccum;
+    bool AccumEvaluatable = AccumOffset->evaluateAsAbsolute(EvaluatedAccum);
+    uint64_t UEvaluatedAccum = EvaluatedAccum;
+    if (AccumEvaluatable &&
+        (UEvaluatedAccum < 4 || UEvaluatedAccum > 256 || (UEvaluatedAccum & 3)))
+      return TokError("accum_offset should be in range [4..256] in "
+                      "increments of 4");
+
+    int64_t EvaluatedNumVGPR;
+    if (NextFreeVGPR->evaluateAsAbsolute(EvaluatedNumVGPR) &&
+        AccumEvaluatable &&
+        UEvaluatedAccum >
+            alignTo(std::max((uint64_t)1, (uint64_t)EvaluatedNumVGPR), 4))
+      return TokError("accum_offset exceeds total VGPR allocation");
+    const MCExpr *AdjustedAccum = MCBinaryExpr::createSub(
+        MCBinaryExpr::createDiv(
+            AccumOffset, MCConstantExpr::create(4, getContext()), getContext()),
+        MCConstantExpr::create(1, getContext()), getContext());
+    MCKernelDescriptor::bits_set(KD.compute_pgm_rsrc3, AdjustedAccum,
+                                 COMPUTE_PGM_RSRC3_GFX90A_ACCUM_OFFSET_SHIFT,
+                                 COMPUTE_PGM_RSRC3_GFX90A_ACCUM_OFFSET,
+                                 getContext());
+  }
+
+  if (isGFX1250Plus())
+    MCKernelDescriptor::bits_set(KD.compute_pgm_rsrc3, NamedBarCnt,
+                                 COMPUTE_PGM_RSRC3_GFX125_NAMED_BAR_CNT_SHIFT,
+                                 COMPUTE_PGM_RSRC3_GFX125_NAMED_BAR_CNT,
+                                 getContext());
+
+  if (IVersion.Major >= 10 && IVersion.Major < 12) {
+    // SharedVGPRCount < 16 checked by PARSE_ENTRY_BITS
+    if (SharedVGPRCount && EnableWavefrontSize32 && *EnableWavefrontSize32) {
+      return TokError("shared_vgpr_count directive not valid on "
+                      "wavefront size 32");
+    }
+
+    if (VGPRBlocksEvaluatable &&
+        (SharedVGPRCount * 2 + static_cast<uint64_t>(EvaluatedVGPRBlocks) >
+         63)) {
+      return TokError("shared_vgpr_count*2 + "
+                      "compute_pgm_rsrc1.GRANULATED_WORKITEM_VGPR_COUNT cannot "
+                      "exceed 63\n");
+    }
+  }
+
+  getTargetStreamer().EmitAmdhsaKernelDescriptor(getSTI(), KernelName, KD,
+                                                 NextFreeVGPR, NextFreeSGPR,
+                                                 ReserveVCC, ReserveFlatScr);
+  return false;
+}
+
+bool AMDGPUAsmParser::ParseDirectiveAMDHSACodeObjectVersion() {
+  uint32_t Version;
+  if (ParseAsAbsoluteExpression(Version))
+    return true;
+
+  getTargetStreamer().EmitDirectiveAMDHSACodeObjectVersion(Version);
+  return false;
+}
+
+bool AMDGPUAsmParser::ParseAMDKernelCodeTValue(StringRef ID,
+                                               AMDGPUMCKernelCodeT &C) {
+  // max_scratch_backing_memory_byte_size is deprecated. Ignore it while parsing
+  // assembly for backwards compatibility.
+  if (ID == "max_scratch_backing_memory_byte_size") {
+    Parser.eatToEndOfStatement();
+    return false;
+  }
+
+  SmallString<40> ErrStr;
+  raw_svector_ostream Err(ErrStr);
+  if (!C.ParseKernelCodeT(ID, getParser(), Err)) {
+    return TokError(Err.str());
+  }
+  Lex();
+
+  if (ID == "enable_wavefront_size32") {
+    if (C.code_properties & AMD_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32) {
+      if (!isGFX10Plus())
+        return TokError("enable_wavefront_size32=1 is only allowed on GFX10+");
+      if (!isWave32())
+        return TokError("enable_wavefront_size32=1 requires +WavefrontSize32");
+    } else {
+      if (!isWave64())
+        return TokError("enable_wavefront_size32=0 requires +WavefrontSize64");
+    }
+  }
+
+  if (ID == "wavefront_size") {
+    if (C.wavefront_size == 5) {
+      if (!isGFX10Plus())
+        return TokError("wavefront_size=5 is only allowed on GFX10+");
+      if (!isWave32())
+        return TokError("wavefront_size=5 requires +WavefrontSize32");
+    } else if (C.wavefront_size == 6) {
+      if (!isWave64())
+        return TokError("wavefront_size=6 requires +WavefrontSize64");
+    }
+  }
+
+  return false;
+}
+
+bool AMDGPUAsmParser::ParseDirectiveAMDKernelCodeT() {
+  AMDGPUMCKernelCodeT KernelCode;
+  KernelCode.initDefault(&getSTI(), getContext());
+
+  while (true) {
+    // Lex EndOfStatement.  This is in a while loop, because lexing a comment
+    // will set the current token to EndOfStatement.
+    while(trySkipToken(AsmToken::EndOfStatement));
+
+    StringRef ID;
+    if (!parseId(ID, "expected value identifier or .end_amd_kernel_code_t"))
+      return true;
+
+    if (ID == ".end_amd_kernel_code_t")
+      break;
+
+    if (ParseAMDKernelCodeTValue(ID, KernelCode))
+      return true;
+  }
+
+  KernelCode.validate(&getSTI(), getContext());
+  getTargetStreamer().EmitAMDKernelCodeT(KernelCode);
+
+  return false;
+}
+
+bool AMDGPUAsmParser::ParseDirectiveAMDGPUHsaKernel() {
+  StringRef KernelName;
+  if (!parseId(KernelName, "expected symbol name"))
+    return true;
+
+  getTargetStreamer().EmitAMDGPUSymbolType(KernelName,
+                                           ELF::STT_AMDGPU_HSA_KERNEL);
+
+  KernelScope.initialize(getContext());
+  return false;
+}
+
+bool AMDGPUAsmParser::ParseDirectiveISAVersion() {
+  if (!getSTI().getTargetTriple().isAMDGCN()) {
+    return Error(getLoc(),
+                 ".amd_amdgpu_isa directive is not available on non-amdgcn "
+                 "architectures");
+  }
+
+  auto TargetIDDirective = getLexer().getTok().getStringContents();
+  if (getTargetStreamer().getTargetID()->toString() != TargetIDDirective)
+    return Error(getParser().getTok().getLoc(), "target id must match options");
+
+  getTargetStreamer().EmitISAVersion();
+  Lex();
+
+  return false;
+}
+
+bool AMDGPUAsmParser::ParseDirectiveHSAMetadata() {
+  assert(isHsaAbi(getSTI()));
+
+  std::string HSAMetadataString;
+  if (ParseToEndDirective(HSAMD::V3::AssemblerDirectiveBegin,
+                          HSAMD::V3::AssemblerDirectiveEnd, HSAMetadataString))
+    return true;
+
+  if (!getTargetStreamer().EmitHSAMetadataV3(HSAMetadataString))
+    return Error(getLoc(), "invalid HSA metadata");
+
+  return false;
+}
+
+/// Common code to parse out a block of text (typically YAML) between start and
+/// end directives.
+bool AMDGPUAsmParser::ParseToEndDirective(const char *AssemblerDirectiveBegin,
+                                          const char *AssemblerDirectiveEnd,
+                                          std::string &CollectString) {
+
+  raw_string_ostream CollectStream(CollectString);
+
+  getLexer().setSkipSpace(false);
+
+  bool FoundEnd = false;
+  while (!isToken(AsmToken::Eof)) {
+    while (isToken(AsmToken::Space)) {
+      CollectStream << getTokenStr();
+      Lex();
+    }
+
+    if (trySkipId(AssemblerDirectiveEnd)) {
+      FoundEnd = true;
+      break;
+    }
+
+    CollectStream << Parser.parseStringToEndOfStatement()
+                  << getContext().getAsmInfo()->getSeparatorString();
+
+    Parser.eatToEndOfStatement();
+  }
+
+  getLexer().setSkipSpace(true);
+
+  if (isToken(AsmToken::Eof) && !FoundEnd) {
+    return TokError(Twine("expected directive ") +
+                    Twine(AssemblerDirectiveEnd) + Twine(" not found"));
+  }
+
+  return false;
+}
+
+/// Parse the assembler directive for new MsgPack-format PAL metadata.
+bool AMDGPUAsmParser::ParseDirectivePALMetadataBegin() {
+  std::string String;
+  if (ParseToEndDirective(AMDGPU::PALMD::AssemblerDirectiveBegin,
+                          AMDGPU::PALMD::AssemblerDirectiveEnd, String))
+    return true;
+
+  auto *PALMetadata = getTargetStreamer().getPALMetadata();
+  if (!PALMetadata->setFromString(String))
+    return Error(getLoc(), "invalid PAL metadata");
+  return false;
+}
+
+/// Parse the assembler directive for old linear-format PAL metadata.
+bool AMDGPUAsmParser::ParseDirectivePALMetadata() {
+  if (getSTI().getTargetTriple().getOS() != Triple::AMDPAL) {
+    return Error(getLoc(),
+                 (Twine(PALMD::AssemblerDirective) + Twine(" directive is "
+                 "not available on non-amdpal OSes")).str());
+  }
+
+  auto *PALMetadata = getTargetStreamer().getPALMetadata();
+  PALMetadata->setLegacy();
+  for (;;) {
+    uint32_t Key, Value;
+    if (ParseAsAbsoluteExpression(Key)) {
+      return TokError(Twine("invalid value in ") +
+                      Twine(PALMD::AssemblerDirective));
+    }
+    if (!trySkipToken(AsmToken::Comma)) {
+      return TokError(Twine("expected an even number of values in ") +
+                      Twine(PALMD::AssemblerDirective));
+    }
+    if (ParseAsAbsoluteExpression(Value)) {
+      return TokError(Twine("invalid value in ") +
+                      Twine(PALMD::AssemblerDirective));
+    }
+    PALMetadata->setRegister(Key, Value);
+    if (!trySkipToken(AsmToken::Comma))
+      break;
+  }
+  return false;
+}
+
+/// ParseDirectiveAMDGPULDS
+///  ::= .amdgpu_lds identifier ',' size_expression [',' align_expression]
+bool AMDGPUAsmParser::ParseDirectiveAMDGPULDS() {
+  if (getParser().checkForValidSection())
+    return true;
+
+  StringRef Name;
+  SMLoc NameLoc = getLoc();
+  if (getParser().parseIdentifier(Name))
+    return TokError("expected identifier in directive");
+
+  MCSymbol *Symbol = getContext().getOrCreateSymbol(Name);
+  if (getParser().parseComma())
+    return true;
+
+  unsigned LocalMemorySize = AMDGPU::IsaInfo::getLocalMemorySize(&getSTI());
+
+  int64_t Size;
+  SMLoc SizeLoc = getLoc();
+  if (getParser().parseAbsoluteExpression(Size))
+    return true;
+  if (Size < 0)
+    return Error(SizeLoc, "size must be non-negative");
+  if (Size > LocalMemorySize)
+    return Error(SizeLoc, "size is too large");
+
+  int64_t Alignment = 4;
+  if (trySkipToken(AsmToken::Comma)) {
+    SMLoc AlignLoc = getLoc();
+    if (getParser().parseAbsoluteExpression(Alignment))
+      return true;
+    if (Alignment < 0 || !isPowerOf2_64(Alignment))
+      return Error(AlignLoc, "alignment must be a power of two");
+
+    // Alignment larger than the size of LDS is possible in theory, as long
+    // as the linker manages to place to symbol at address 0, but we do want
+    // to make sure the alignment fits nicely into a 32-bit integer.
+    if (Alignment >= 1u << 31)
+      return Error(AlignLoc, "alignment is too large");
+  }
+
+  if (parseEOL())
+    return true;
+
+  Symbol->redefineIfPossible();
+  if (!Symbol->isUndefined())
+    return Error(NameLoc, "invalid symbol redefinition");
+
+  getTargetStreamer().emitAMDGPULDS(Symbol, Size, Align(Alignment));
+  return false;
+}
+
+bool AMDGPUAsmParser::ParseDirective(AsmToken DirectiveID) {
+  StringRef IDVal = DirectiveID.getString();
+
+  if (isHsaAbi(getSTI())) {
+    if (IDVal == ".amdhsa_kernel")
+     return ParseDirectiveAMDHSAKernel();
+
+    if (IDVal == ".amdhsa_code_object_version")
+      return ParseDirectiveAMDHSACodeObjectVersion();
+
+    // TODO: Restructure/combine with PAL metadata directive.
+    if (IDVal == AMDGPU::HSAMD::V3::AssemblerDirectiveBegin)
+      return ParseDirectiveHSAMetadata();
+  } else {
+    if (IDVal == ".amd_kernel_code_t")
+      return ParseDirectiveAMDKernelCodeT();
+
+    if (IDVal == ".amdgpu_hsa_kernel")
+      return ParseDirectiveAMDGPUHsaKernel();
+
+    if (IDVal == ".amd_amdgpu_isa")
+      return ParseDirectiveISAVersion();
+
+    if (IDVal == AMDGPU::HSAMD::AssemblerDirectiveBegin) {
+      return Error(getLoc(), (Twine(HSAMD::AssemblerDirectiveBegin) +
+                              Twine(" directive is "
+                                    "not available on non-amdhsa OSes"))
+                                 .str());
+    }
+  }
+
+  if (IDVal == ".amdgcn_target")
+    return ParseDirectiveAMDGCNTarget();
+
+  if (IDVal == ".amdgpu_lds")
+    return ParseDirectiveAMDGPULDS();
+
+  if (IDVal == PALMD::AssemblerDirectiveBegin)
+    return ParseDirectivePALMetadataBegin();
+
+  if (IDVal == PALMD::AssemblerDirective)
+    return ParseDirectivePALMetadata();
+
+  return true;
+}
+
+bool AMDGPUAsmParser::subtargetHasRegister(const MCRegisterInfo &MRI,
+                                           MCRegister Reg) {
+  if (MRI.regsOverlap(TTMP12_TTMP13_TTMP14_TTMP15, Reg))
+    return isGFX9Plus();
+
+  // GFX10+ has 2 more SGPRs 104 and 105.
+  if (MRI.regsOverlap(SGPR104_SGPR105, Reg))
+    return hasSGPR104_SGPR105();
+
+  switch (Reg.id()) {
+  case SRC_SHARED_BASE_LO:
+  case SRC_SHARED_BASE:
+  case SRC_SHARED_LIMIT_LO:
+  case SRC_SHARED_LIMIT:
+  case SRC_PRIVATE_BASE_LO:
+  case SRC_PRIVATE_BASE:
+  case SRC_PRIVATE_LIMIT_LO:
+  case SRC_PRIVATE_LIMIT:
+    return isGFX9Plus();
+  case SRC_FLAT_SCRATCH_BASE_LO:
+  case SRC_FLAT_SCRATCH_BASE_HI:
+    return hasGloballyAddressableScratch();
+  case SRC_POPS_EXITING_WAVE_ID:
+    return isGFX9Plus() && !isGFX11Plus();
+  case TBA:
+  case TBA_LO:
+  case TBA_HI:
+  case TMA:
+  case TMA_LO:
+  case TMA_HI:
+    return !isGFX9Plus();
+  case XNACK_MASK:
+  case XNACK_MASK_LO:
+  case XNACK_MASK_HI:
+    return (isVI() || isGFX9()) && getTargetStreamer().getTargetID()->isXnackSupported();
+  case SGPR_NULL:
+    return isGFX10Plus();
+  case SRC_EXECZ:
+  case SRC_VCCZ:
+    return !isGFX11Plus();
+  default:
+    break;
+  }
+
+  if (isCI())
+    return true;
+
+  if (isSI() || isGFX10Plus()) {
+    // No flat_scr on SI.
+    // On GFX10Plus flat scratch is not a valid register operand and can only be
+    // accessed with s_setreg/s_getreg.
+    switch (Reg.id()) {
+    case FLAT_SCR:
+    case FLAT_SCR_LO:
+    case FLAT_SCR_HI:
+      return false;
+    default:
+      return true;
+    }
+  }
+
+  // VI only has 102 SGPRs, so make sure we aren't trying to use the 2 more that
+  // SI/CI have.
+  if (MRI.regsOverlap(SGPR102_SGPR103, Reg))
+    return hasSGPR102_SGPR103();
+
+  return true;
+}
+
+ParseStatus AMDGPUAsmParser::parseOperand(OperandVector &Operands,
+                                          StringRef Mnemonic,
+                                          OperandMode Mode) {
+  ParseStatus Res = parseVOPD(Operands);
+  if (Res.isSuccess() || Res.isFailure() || isToken(AsmToken::EndOfStatement))
+    return Res;
+
+  // Try to parse with a custom parser
+  Res = MatchOperandParserImpl(Operands, Mnemonic);
+
+  // If we successfully parsed the operand or if there as an error parsing,
+  // we are done.
+  //
+  // If we are parsing after we reach EndOfStatement then this means we
+  // are appending default values to the Operands list.  This is only done
+  // by custom parser, so we shouldn't continue on to the generic parsing.
+  if (Res.isSuccess() || Res.isFailure() || isToken(AsmToken::EndOfStatement))
+    return Res;
+
+  SMLoc RBraceLoc;
+  SMLoc LBraceLoc = getLoc();
+  if (Mode == OperandMode_NSA && trySkipToken(AsmToken::LBrac)) {
+    unsigned Prefix = Operands.size();
+
+    for (;;) {
+      auto Loc = getLoc();
+      Res = parseReg(Operands);
+      if (Res.isNoMatch())
+        Error(Loc, "expected a register");
+      if (!Res.isSuccess())
+        return ParseStatus::Failure;
+
+      RBraceLoc = getLoc();
+      if (trySkipToken(AsmToken::RBrac))
+        break;
+
+      if (!skipToken(AsmToken::Comma,
+                     "expected a comma or a closing square bracket"))
+        return ParseStatus::Failure;
+    }
+
+    if (Operands.size() - Prefix > 1) {
+      Operands.insert(Operands.begin() + Prefix,
+                      AMDGPUOperand::CreateToken(this, "[", LBraceLoc));
+      Operands.push_back(AMDGPUOperand::CreateToken(this, "]", RBraceLoc));
+    }
+
+    return ParseStatus::Success;
+  }
+
+  return parseRegOrImm(Operands);
+}
+
+StringRef AMDGPUAsmParser::parseMnemonicSuffix(StringRef Name) {
+  // Clear any forced encodings from the previous instruction.
+  setForcedEncodingSize(0);
+  setForcedDPP(false);
+  setForcedSDWA(false);
+
+  if (Name.consume_back("_e64_dpp")) {
+    setForcedDPP(true);
+    setForcedEncodingSize(64);
+    return Name;
+  }
+  if (Name.consume_back("_e64")) {
+    setForcedEncodingSize(64);
+    return Name;
+  }
+  if (Name.consume_back("_e32")) {
+    setForcedEncodingSize(32);
+    return Name;
+  }
+  if (Name.consume_back("_dpp")) {
+    setForcedDPP(true);
+    return Name;
+  }
+  if (Name.consume_back("_sdwa")) {
+    setForcedSDWA(true);
+    return Name;
+  }
+  return Name;
+}
+
+static void applyMnemonicAliases(StringRef &Mnemonic,
+                                 const FeatureBitset &Features,
+                                 unsigned VariantID);
+
+bool AMDGPUAsmParser::parseInstruction(ParseInstructionInfo &Info,
+                                       StringRef Name, SMLoc NameLoc,
+                                       OperandVector &Operands) {
+  // Add the instruction mnemonic
+  Name = parseMnemonicSuffix(Name);
+
+  // If the target architecture uses MnemonicAlias, call it here to parse
+  // operands correctly.
+  applyMnemonicAliases(Name, getAvailableFeatures(), 0);
+
+  Operands.push_back(AMDGPUOperand::CreateToken(this, Name, NameLoc));
+
+  bool IsMIMG = Name.starts_with("image_");
+
+  while (!trySkipToken(AsmToken::EndOfStatement)) {
+    OperandMode Mode = OperandMode_Default;
+    if (IsMIMG && isGFX10Plus() && Operands.size() == 2)
+      Mode = OperandMode_NSA;
+    ParseStatus Res = parseOperand(Operands, Name, Mode);
+
+    if (!Res.isSuccess()) {
+      checkUnsupportedInstruction(Name, NameLoc);
+      if (!Parser.hasPendingError()) {
+        // FIXME: use real operand location rather than the current location.
+        StringRef Msg = Res.isFailure() ? "failed parsing operand."
+                                        : "not a valid operand.";
+        Error(getLoc(), Msg);
+      }
+      while (!trySkipToken(AsmToken::EndOfStatement)) {
+        lex();
+      }
+      return true;
+    }
+
+    // Eat the comma or space if there is one.
+    trySkipToken(AsmToken::Comma);
+  }
+
+  return false;
+}
+
+//===----------------------------------------------------------------------===//
+// Utility functions
+//===----------------------------------------------------------------------===//
+
+ParseStatus AMDGPUAsmParser::parseTokenOp(StringRef Name,
+                                          OperandVector &Operands) {
+  SMLoc S = getLoc();
+  if (!trySkipId(Name))
+    return ParseStatus::NoMatch;
+
+  Operands.push_back(AMDGPUOperand::CreateToken(this, Name, S));
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseIntWithPrefix(const char *Prefix,
+                                                int64_t &IntVal) {
+
+  if (!trySkipId(Prefix, AsmToken::Colon))
+    return ParseStatus::NoMatch;
+
+  return parseExpr(IntVal) ? ParseStatus::Success : ParseStatus::Failure;
+}
+
+ParseStatus AMDGPUAsmParser::parseIntWithPrefix(
+    const char *Prefix, OperandVector &Operands, AMDGPUOperand::ImmTy ImmTy,
+    std::function<bool(int64_t &)> ConvertResult) {
+  SMLoc S = getLoc();
+  int64_t Value = 0;
+
+  ParseStatus Res = parseIntWithPrefix(Prefix, Value);
+  if (!Res.isSuccess())
+    return Res;
+
+  if (ConvertResult && !ConvertResult(Value)) {
+    Error(S, "invalid " + StringRef(Prefix) + " value.");
+  }
+
+  Operands.push_back(AMDGPUOperand::CreateImm(this, Value, S, ImmTy));
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseOperandArrayWithPrefix(
+    const char *Prefix, OperandVector &Operands, AMDGPUOperand::ImmTy ImmTy,
+    bool (*ConvertResult)(int64_t &)) {
+  SMLoc S = getLoc();
+  if (!trySkipId(Prefix, AsmToken::Colon))
+    return ParseStatus::NoMatch;
+
+  if (!skipToken(AsmToken::LBrac, "expected a left square bracket"))
+    return ParseStatus::Failure;
+
+  unsigned Val = 0;
+  const unsigned MaxSize = 4;
+
+  // FIXME: How to verify the number of elements matches the number of src
+  // operands?
+  for (int I = 0; ; ++I) {
+    int64_t Op;
+    SMLoc Loc = getLoc();
+    if (!parseExpr(Op))
+      return ParseStatus::Failure;
+
+    if (Op != 0 && Op != 1)
+      return Error(Loc, "invalid " + StringRef(Prefix) + " value.");
+
+    Val |= (Op << I);
+
+    if (trySkipToken(AsmToken::RBrac))
+      break;
+
+    if (I + 1 == MaxSize)
+      return Error(getLoc(), "expected a closing square bracket");
+
+    if (!skipToken(AsmToken::Comma, "expected a comma"))
+      return ParseStatus::Failure;
+  }
+
+  Operands.push_back(AMDGPUOperand::CreateImm(this, Val, S, ImmTy));
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseNamedBit(StringRef Name,
+                                           OperandVector &Operands,
+                                           AMDGPUOperand::ImmTy ImmTy,
+                                           bool IgnoreNegative) {
+  int64_t Bit;
+  SMLoc S = getLoc();
+
+  if (trySkipId(Name)) {
+    Bit = 1;
+  } else if (trySkipId("no", Name)) {
+    if (IgnoreNegative)
+      return ParseStatus::Success;
+    Bit = 0;
+  } else {
+    return ParseStatus::NoMatch;
+  }
+
+  if (Name == "r128" && !hasMIMG_R128())
+    return Error(S, "r128 modifier is not supported on this GPU");
+  if (Name == "a16" && !hasA16())
+    return Error(S, "a16 modifier is not supported on this GPU");
+
+  if (Bit == 0 && Name == "gds") {
+    StringRef Mnemo = ((AMDGPUOperand &)*Operands[0]).getToken();
+    if (Mnemo.starts_with("ds_gws"))
+      return Error(S, "nogds is not allowed");
+  }
+
+  if (isGFX9() && ImmTy == AMDGPUOperand::ImmTyA16)
+    ImmTy = AMDGPUOperand::ImmTyR128A16;
+
+  Operands.push_back(AMDGPUOperand::CreateImm(this, Bit, S, ImmTy));
+  return ParseStatus::Success;
+}
+
+unsigned AMDGPUAsmParser::getCPolKind(StringRef Id, StringRef Mnemo,
+                                      bool &Disabling) const {
+  Disabling = Id.consume_front("no");
+
+  if (isGFX940() && !Mnemo.starts_with("s_")) {
+    return StringSwitch<unsigned>(Id)
+        .Case("nt", AMDGPU::CPol::NT)
+        .Case("sc0", AMDGPU::CPol::SC0)
+        .Case("sc1", AMDGPU::CPol::SC1)
+        .Default(0);
+  }
+
+  return StringSwitch<unsigned>(Id)
+      .Case("dlc", AMDGPU::CPol::DLC)
+      .Case("glc", AMDGPU::CPol::GLC)
+      .Case("scc", AMDGPU::CPol::SCC)
+      .Case("slc", AMDGPU::CPol::SLC)
+      .Default(0);
+}
+
+ParseStatus AMDGPUAsmParser::parseCPol(OperandVector &Operands) {
+  if (isGFX12Plus()) {
+    SMLoc StringLoc = getLoc();
+
+    int64_t CPolVal = 0;
+    ParseStatus ResTH = ParseStatus::NoMatch;
+    ParseStatus ResScope = ParseStatus::NoMatch;
+    ParseStatus ResNV = ParseStatus::NoMatch;
+    ParseStatus ResScal = ParseStatus::NoMatch;
+
+    for (;;) {
+      if (ResTH.isNoMatch()) {
+        int64_t TH;
+        ResTH = parseTH(Operands, TH);
+        if (ResTH.isFailure())
+          return ResTH;
+        if (ResTH.isSuccess()) {
+          CPolVal |= TH;
+          continue;
+        }
+      }
+
+      if (ResScope.isNoMatch()) {
+        int64_t Scope;
+        ResScope = parseScope(Operands, Scope);
+        if (ResScope.isFailure())
+          return ResScope;
+        if (ResScope.isSuccess()) {
+          CPolVal |= Scope;
+          continue;
+        }
+      }
+
+      // NV bit exists on GFX12+, but does something starting from GFX1250.
+      // Allow parsing on all GFX12 and fail on validation for better
+      // diagnostics.
+      if (ResNV.isNoMatch()) {
+        if (trySkipId("nv")) {
+          ResNV = ParseStatus::Success;
+          CPolVal |= CPol::NV;
+          continue;
+        } else if (trySkipId("no", "nv")) {
+          ResNV = ParseStatus::Success;
+          continue;
+        }
+      }
+
+      if (ResScal.isNoMatch()) {
+        if (trySkipId("scale_offset")) {
+          ResScal = ParseStatus::Success;
+          CPolVal |= CPol::SCAL;
+          continue;
+        } else if (trySkipId("no", "scale_offset")) {
+          ResScal = ParseStatus::Success;
+          continue;
+        }
+      }
+
+      break;
+    }
+
+    if (ResTH.isNoMatch() && ResScope.isNoMatch() && ResNV.isNoMatch() &&
+        ResScal.isNoMatch())
+      return ParseStatus::NoMatch;
+
+    Operands.push_back(AMDGPUOperand::CreateImm(this, CPolVal, StringLoc,
+                                                AMDGPUOperand::ImmTyCPol));
+    return ParseStatus::Success;
+  }
+
+  StringRef Mnemo = ((AMDGPUOperand &)*Operands[0]).getToken();
+  SMLoc OpLoc = getLoc();
+  unsigned Enabled = 0, Seen = 0;
+  for (;;) {
+    SMLoc S = getLoc();
+    bool Disabling;
+    unsigned CPol = getCPolKind(getId(), Mnemo, Disabling);
+    if (!CPol)
+      break;
+
+    lex();
+
+    if (!isGFX10Plus() && CPol == AMDGPU::CPol::DLC)
+      return Error(S, "dlc modifier is not supported on this GPU");
+
+    if (!isGFX90A() && CPol == AMDGPU::CPol::SCC)
+      return Error(S, "scc modifier is not supported on this GPU");
+
+    if (Seen & CPol)
+      return Error(S, "duplicate cache policy modifier");
+
+    if (!Disabling)
+      Enabled |= CPol;
+
+    Seen |= CPol;
+  }
+
+  if (!Seen)
+    return ParseStatus::NoMatch;
+
+  Operands.push_back(
+      AMDGPUOperand::CreateImm(this, Enabled, OpLoc, AMDGPUOperand::ImmTyCPol));
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseScope(OperandVector &Operands,
+                                        int64_t &Scope) {
+  static const unsigned Scopes[] = {CPol::SCOPE_CU, CPol::SCOPE_SE,
+                                    CPol::SCOPE_DEV, CPol::SCOPE_SYS};
+
+  ParseStatus Res = parseStringOrIntWithPrefix(
+      Operands, "scope", {"SCOPE_CU", "SCOPE_SE", "SCOPE_DEV", "SCOPE_SYS"},
+      Scope);
+
+  if (Res.isSuccess())
+    Scope = Scopes[Scope];
+
+  return Res;
+}
+
+ParseStatus AMDGPUAsmParser::parseTH(OperandVector &Operands, int64_t &TH) {
+  TH = AMDGPU::CPol::TH_RT; // default
+
+  StringRef Value;
+  SMLoc StringLoc;
+  ParseStatus Res = parseStringWithPrefix("th", Value, StringLoc);
+  if (!Res.isSuccess())
+    return Res;
+
+  if (Value == "TH_DEFAULT")
+    TH = AMDGPU::CPol::TH_RT;
+  else if (Value == "TH_STORE_LU" || Value == "TH_LOAD_WB" ||
+           Value == "TH_LOAD_NT_WB") {
+    return Error(StringLoc, "invalid th value");
+  } else if (Value.consume_front("TH_ATOMIC_")) {
+    TH = AMDGPU::CPol::TH_TYPE_ATOMIC;
+  } else if (Value.consume_front("TH_LOAD_")) {
+    TH = AMDGPU::CPol::TH_TYPE_LOAD;
+  } else if (Value.consume_front("TH_STORE_")) {
+    TH = AMDGPU::CPol::TH_TYPE_STORE;
+  } else {
+    return Error(StringLoc, "invalid th value");
+  }
+
+  if (Value == "BYPASS")
+    TH |= AMDGPU::CPol::TH_REAL_BYPASS;
+
+  if (TH != 0) {
+    if (TH & AMDGPU::CPol::TH_TYPE_ATOMIC)
+      TH |= StringSwitch<int64_t>(Value)
+                .Case("RETURN", AMDGPU::CPol::TH_ATOMIC_RETURN)
+                .Case("RT", AMDGPU::CPol::TH_RT)
+                .Case("RT_RETURN", AMDGPU::CPol::TH_ATOMIC_RETURN)
+                .Case("NT", AMDGPU::CPol::TH_ATOMIC_NT)
+                .Case("NT_RETURN", AMDGPU::CPol::TH_ATOMIC_NT |
+                                       AMDGPU::CPol::TH_ATOMIC_RETURN)
+                .Case("CASCADE_RT", AMDGPU::CPol::TH_ATOMIC_CASCADE)
+                .Case("CASCADE_NT", AMDGPU::CPol::TH_ATOMIC_CASCADE |
+                                        AMDGPU::CPol::TH_ATOMIC_NT)
+                .Default(0xffffffff);
+    else
+      TH |= StringSwitch<int64_t>(Value)
+                .Case("RT", AMDGPU::CPol::TH_RT)
+                .Case("NT", AMDGPU::CPol::TH_NT)
+                .Case("HT", AMDGPU::CPol::TH_HT)
+                .Case("LU", AMDGPU::CPol::TH_LU)
+                .Case("WB", AMDGPU::CPol::TH_WB)
+                .Case("NT_RT", AMDGPU::CPol::TH_NT_RT)
+                .Case("RT_NT", AMDGPU::CPol::TH_RT_NT)
+                .Case("NT_HT", AMDGPU::CPol::TH_NT_HT)
+                .Case("NT_WB", AMDGPU::CPol::TH_NT_WB)
+                .Case("BYPASS", AMDGPU::CPol::TH_BYPASS)
+                .Default(0xffffffff);
+  }
+
+  if (TH == 0xffffffff)
+    return Error(StringLoc, "invalid th value");
+
+  return ParseStatus::Success;
+}
+
+static void
+addOptionalImmOperand(MCInst &Inst, const OperandVector &Operands,
+                      AMDGPUAsmParser::OptionalImmIndexMap &OptionalIdx,
+                      AMDGPUOperand::ImmTy ImmT, int64_t Default = 0,
+                      std::optional<unsigned> InsertAt = std::nullopt) {
+  auto i = OptionalIdx.find(ImmT);
+  if (i != OptionalIdx.end()) {
+    unsigned Idx = i->second;
+    const AMDGPUOperand &Op =
+        static_cast<const AMDGPUOperand &>(*Operands[Idx]);
+    if (InsertAt)
+      Inst.insert(Inst.begin() + *InsertAt, MCOperand::createImm(Op.getImm()));
+    else
+      Op.addImmOperands(Inst, 1);
+  } else {
+    if (InsertAt.has_value())
+      Inst.insert(Inst.begin() + *InsertAt, MCOperand::createImm(Default));
+    else
+      Inst.addOperand(MCOperand::createImm(Default));
+  }
+}
+
+ParseStatus AMDGPUAsmParser::parseStringWithPrefix(StringRef Prefix,
+                                                   StringRef &Value,
+                                                   SMLoc &StringLoc) {
+  if (!trySkipId(Prefix, AsmToken::Colon))
+    return ParseStatus::NoMatch;
+
+  StringLoc = getLoc();
+  return parseId(Value, "expected an identifier") ? ParseStatus::Success
+                                                  : ParseStatus::Failure;
+}
+
+ParseStatus AMDGPUAsmParser::parseStringOrIntWithPrefix(
+    OperandVector &Operands, StringRef Name, ArrayRef<const char *> Ids,
+    int64_t &IntVal) {
+  if (!trySkipId(Name, AsmToken::Colon))
+    return ParseStatus::NoMatch;
+
+  SMLoc StringLoc = getLoc();
+
+  StringRef Value;
+  if (isToken(AsmToken::Identifier)) {
+    Value = getTokenStr();
+    lex();
+
+    for (IntVal = 0; IntVal < (int64_t)Ids.size(); ++IntVal)
+      if (Value == Ids[IntVal])
+        break;
+  } else if (!parseExpr(IntVal))
+    return ParseStatus::Failure;
+
+  if (IntVal < 0 || IntVal >= (int64_t)Ids.size())
+    return Error(StringLoc, "invalid " + Twine(Name) + " value");
+
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseStringOrIntWithPrefix(
+    OperandVector &Operands, StringRef Name, ArrayRef<const char *> Ids,
+    AMDGPUOperand::ImmTy Type) {
+  SMLoc S = getLoc();
+  int64_t IntVal;
+
+  ParseStatus Res = parseStringOrIntWithPrefix(Operands, Name, Ids, IntVal);
+  if (Res.isSuccess())
+    Operands.push_back(AMDGPUOperand::CreateImm(this, IntVal, S, Type));
+
+  return Res;
+}
+
+//===----------------------------------------------------------------------===//
+// MTBUF format
+//===----------------------------------------------------------------------===//
+
+bool AMDGPUAsmParser::tryParseFmt(const char *Pref,
+                                  int64_t MaxVal,
+                                  int64_t &Fmt) {
+  int64_t Val;
+  SMLoc Loc = getLoc();
+
+  auto Res = parseIntWithPrefix(Pref, Val);
+  if (Res.isFailure())
+    return false;
+  if (Res.isNoMatch())
+    return true;
+
+  if (Val < 0 || Val > MaxVal) {
+    Error(Loc, Twine("out of range ", StringRef(Pref)));
+    return false;
+  }
+
+  Fmt = Val;
+  return true;
+}
+
+ParseStatus AMDGPUAsmParser::tryParseIndexKey(OperandVector &Operands,
+                                              AMDGPUOperand::ImmTy ImmTy) {
+  const char *Pref = "index_key";
+  int64_t ImmVal = 0;
+  SMLoc Loc = getLoc();
+  auto Res = parseIntWithPrefix(Pref, ImmVal);
+  if (!Res.isSuccess())
+    return Res;
+
+  if ((ImmTy == AMDGPUOperand::ImmTyIndexKey16bit ||
+       ImmTy == AMDGPUOperand::ImmTyIndexKey32bit) &&
+      (ImmVal < 0 || ImmVal > 1))
+    return Error(Loc, Twine("out of range ", StringRef(Pref)));
+
+  if (ImmTy == AMDGPUOperand::ImmTyIndexKey8bit && (ImmVal < 0 || ImmVal > 3))
+    return Error(Loc, Twine("out of range ", StringRef(Pref)));
+
+  Operands.push_back(AMDGPUOperand::CreateImm(this, ImmVal, Loc, ImmTy));
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseIndexKey8bit(OperandVector &Operands) {
+  return tryParseIndexKey(Operands, AMDGPUOperand::ImmTyIndexKey8bit);
+}
+
+ParseStatus AMDGPUAsmParser::parseIndexKey16bit(OperandVector &Operands) {
+  return tryParseIndexKey(Operands, AMDGPUOperand::ImmTyIndexKey16bit);
+}
+
+ParseStatus AMDGPUAsmParser::parseIndexKey32bit(OperandVector &Operands) {
+  return tryParseIndexKey(Operands, AMDGPUOperand::ImmTyIndexKey32bit);
+}
+
+ParseStatus AMDGPUAsmParser::tryParseMatrixFMT(OperandVector &Operands,
+                                               StringRef Name,
+                                               AMDGPUOperand::ImmTy Type) {
+  return parseStringOrIntWithPrefix(Operands, Name, WMMAMods::ModMatrixFmt,
+                                    Type);
+}
+
+ParseStatus AMDGPUAsmParser::parseMatrixAFMT(OperandVector &Operands) {
+  return tryParseMatrixFMT(Operands, "matrix_a_fmt",
+                           AMDGPUOperand::ImmTyMatrixAFMT);
+}
+
+ParseStatus AMDGPUAsmParser::parseMatrixBFMT(OperandVector &Operands) {
+  return tryParseMatrixFMT(Operands, "matrix_b_fmt",
+                           AMDGPUOperand::ImmTyMatrixBFMT);
+}
+
+ParseStatus AMDGPUAsmParser::tryParseMatrixScale(OperandVector &Operands,
+                                                 StringRef Name,
+                                                 AMDGPUOperand::ImmTy Type) {
+  return parseStringOrIntWithPrefix(Operands, Name, WMMAMods::ModMatrixScale,
+                                    Type);
+}
+
+ParseStatus AMDGPUAsmParser::parseMatrixAScale(OperandVector &Operands) {
+  return tryParseMatrixScale(Operands, "matrix_a_scale",
+                             AMDGPUOperand::ImmTyMatrixAScale);
+}
+
+ParseStatus AMDGPUAsmParser::parseMatrixBScale(OperandVector &Operands) {
+  return tryParseMatrixScale(Operands, "matrix_b_scale",
+                             AMDGPUOperand::ImmTyMatrixBScale);
+}
+
+ParseStatus AMDGPUAsmParser::tryParseMatrixScaleFmt(OperandVector &Operands,
+                                                    StringRef Name,
+                                                    AMDGPUOperand::ImmTy Type) {
+  return parseStringOrIntWithPrefix(Operands, Name, WMMAMods::ModMatrixScaleFmt,
+                                    Type);
+}
+
+ParseStatus AMDGPUAsmParser::parseMatrixAScaleFmt(OperandVector &Operands) {
+  return tryParseMatrixScaleFmt(Operands, "matrix_a_scale_fmt",
+                                AMDGPUOperand::ImmTyMatrixAScaleFmt);
+}
+
+ParseStatus AMDGPUAsmParser::parseMatrixBScaleFmt(OperandVector &Operands) {
+  return tryParseMatrixScaleFmt(Operands, "matrix_b_scale_fmt",
+                                AMDGPUOperand::ImmTyMatrixBScaleFmt);
+}
+
+// dfmt and nfmt (in a tbuffer instruction) are parsed as one to allow their
+// values to live in a joint format operand in the MCInst encoding.
+ParseStatus AMDGPUAsmParser::parseDfmtNfmt(int64_t &Format) {
+  using namespace llvm::AMDGPU::MTBUFFormat;
+
+  int64_t Dfmt = DFMT_UNDEF;
+  int64_t Nfmt = NFMT_UNDEF;
+
+  // dfmt and nfmt can appear in either order, and each is optional.
+  for (int I = 0; I < 2; ++I) {
+    if (Dfmt == DFMT_UNDEF && !tryParseFmt("dfmt", DFMT_MAX, Dfmt))
+      return ParseStatus::Failure;
+
+    if (Nfmt == NFMT_UNDEF && !tryParseFmt("nfmt", NFMT_MAX, Nfmt))
+      return ParseStatus::Failure;
+
+    // Skip optional comma between dfmt/nfmt
+    // but guard against 2 commas following each other.
+    if ((Dfmt == DFMT_UNDEF) != (Nfmt == NFMT_UNDEF) &&
+        !peekToken().is(AsmToken::Comma)) {
+      trySkipToken(AsmToken::Comma);
+    }
+  }
+
+  if (Dfmt == DFMT_UNDEF && Nfmt == NFMT_UNDEF)
+    return ParseStatus::NoMatch;
+
+  Dfmt = (Dfmt == DFMT_UNDEF) ? DFMT_DEFAULT : Dfmt;
+  Nfmt = (Nfmt == NFMT_UNDEF) ? NFMT_DEFAULT : Nfmt;
+
+  Format = encodeDfmtNfmt(Dfmt, Nfmt);
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseUfmt(int64_t &Format) {
+  using namespace llvm::AMDGPU::MTBUFFormat;
+
+  int64_t Fmt = UFMT_UNDEF;
+
+  if (!tryParseFmt("format", UFMT_MAX, Fmt))
+    return ParseStatus::Failure;
+
+  if (Fmt == UFMT_UNDEF)
+    return ParseStatus::NoMatch;
+
+  Format = Fmt;
+  return ParseStatus::Success;
+}
+
+bool AMDGPUAsmParser::matchDfmtNfmt(int64_t &Dfmt,
+                                    int64_t &Nfmt,
+                                    StringRef FormatStr,
+                                    SMLoc Loc) {
+  using namespace llvm::AMDGPU::MTBUFFormat;
+  int64_t Format;
+
+  Format = getDfmt(FormatStr);
+  if (Format != DFMT_UNDEF) {
+    Dfmt = Format;
+    return true;
+  }
+
+  Format = getNfmt(FormatStr, getSTI());
+  if (Format != NFMT_UNDEF) {
+    Nfmt = Format;
+    return true;
+  }
+
+  Error(Loc, "unsupported format");
+  return false;
+}
+
+ParseStatus AMDGPUAsmParser::parseSymbolicSplitFormat(StringRef FormatStr,
+                                                      SMLoc FormatLoc,
+                                                      int64_t &Format) {
+  using namespace llvm::AMDGPU::MTBUFFormat;
+
+  int64_t Dfmt = DFMT_UNDEF;
+  int64_t Nfmt = NFMT_UNDEF;
+  if (!matchDfmtNfmt(Dfmt, Nfmt, FormatStr, FormatLoc))
+    return ParseStatus::Failure;
+
+  if (trySkipToken(AsmToken::Comma)) {
+    StringRef Str;
+    SMLoc Loc = getLoc();
+    if (!parseId(Str, "expected a format string") ||
+        !matchDfmtNfmt(Dfmt, Nfmt, Str, Loc))
+      return ParseStatus::Failure;
+    if (Dfmt == DFMT_UNDEF)
+      return Error(Loc, "duplicate numeric format");
+    if (Nfmt == NFMT_UNDEF)
+      return Error(Loc, "duplicate data format");
+  }
+
+  Dfmt = (Dfmt == DFMT_UNDEF) ? DFMT_DEFAULT : Dfmt;
+  Nfmt = (Nfmt == NFMT_UNDEF) ? NFMT_DEFAULT : Nfmt;
+
+  if (isGFX10Plus()) {
+    auto Ufmt = convertDfmtNfmt2Ufmt(Dfmt, Nfmt, getSTI());
+    if (Ufmt == UFMT_UNDEF)
+      return Error(FormatLoc, "unsupported format");
+    Format = Ufmt;
+  } else {
+    Format = encodeDfmtNfmt(Dfmt, Nfmt);
+  }
+
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseSymbolicUnifiedFormat(StringRef FormatStr,
+                                                        SMLoc Loc,
+                                                        int64_t &Format) {
+  using namespace llvm::AMDGPU::MTBUFFormat;
+
+  auto Id = getUnifiedFormat(FormatStr, getSTI());
+  if (Id == UFMT_UNDEF)
+    return ParseStatus::NoMatch;
+
+  if (!isGFX10Plus())
+    return Error(Loc, "unified format is not supported on this GPU");
+
+  Format = Id;
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseNumericFormat(int64_t &Format) {
+  using namespace llvm::AMDGPU::MTBUFFormat;
+  SMLoc Loc = getLoc();
+
+  if (!parseExpr(Format))
+    return ParseStatus::Failure;
+  if (!isValidFormatEncoding(Format, getSTI()))
+    return Error(Loc, "out of range format");
+
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseSymbolicOrNumericFormat(int64_t &Format) {
+  using namespace llvm::AMDGPU::MTBUFFormat;
+
+  if (!trySkipId("format", AsmToken::Colon))
+    return ParseStatus::NoMatch;
+
+  if (trySkipToken(AsmToken::LBrac)) {
+    StringRef FormatStr;
+    SMLoc Loc = getLoc();
+    if (!parseId(FormatStr, "expected a format string"))
+      return ParseStatus::Failure;
+
+    auto Res = parseSymbolicUnifiedFormat(FormatStr, Loc, Format);
+    if (Res.isNoMatch())
+      Res = parseSymbolicSplitFormat(FormatStr, Loc, Format);
+    if (!Res.isSuccess())
+      return Res;
+
+    if (!skipToken(AsmToken::RBrac, "expected a closing square bracket"))
+      return ParseStatus::Failure;
+
+    return ParseStatus::Success;
+  }
+
+  return parseNumericFormat(Format);
+}
+
+ParseStatus AMDGPUAsmParser::parseFORMAT(OperandVector &Operands) {
+  using namespace llvm::AMDGPU::MTBUFFormat;
+
+  int64_t Format = getDefaultFormatEncoding(getSTI());
+  ParseStatus Res;
+  SMLoc Loc = getLoc();
+
+  // Parse legacy format syntax.
+  Res = isGFX10Plus() ? parseUfmt(Format) : parseDfmtNfmt(Format);
+  if (Res.isFailure())
+    return Res;
+
+  bool FormatFound = Res.isSuccess();
+
+  Operands.push_back(
+    AMDGPUOperand::CreateImm(this, Format, Loc, AMDGPUOperand::ImmTyFORMAT));
+
+  if (FormatFound)
+    trySkipToken(AsmToken::Comma);
+
+  if (isToken(AsmToken::EndOfStatement)) {
+    // We are expecting an soffset operand,
+    // but let matcher handle the error.
+    return ParseStatus::Success;
+  }
+
+  // Parse soffset.
+  Res = parseRegOrImm(Operands);
+  if (!Res.isSuccess())
+    return Res;
+
+  trySkipToken(AsmToken::Comma);
+
+  if (!FormatFound) {
+    Res = parseSymbolicOrNumericFormat(Format);
+    if (Res.isFailure())
+      return Res;
+    if (Res.isSuccess()) {
+      auto Size = Operands.size();
+      AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands[Size - 2]);
+      assert(Op.isImm() && Op.getImmTy() == AMDGPUOperand::ImmTyFORMAT);
+      Op.setImm(Format);
+    }
+    return ParseStatus::Success;
+  }
+
+  if (isId("format") && peekToken().is(AsmToken::Colon))
+    return Error(getLoc(), "duplicate format");
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseFlatOffset(OperandVector &Operands) {
+  ParseStatus Res =
+      parseIntWithPrefix("offset", Operands, AMDGPUOperand::ImmTyOffset);
+  if (Res.isNoMatch()) {
+    Res = parseIntWithPrefix("inst_offset", Operands,
+                             AMDGPUOperand::ImmTyInstOffset);
+  }
+  return Res;
+}
+
+ParseStatus AMDGPUAsmParser::parseR128A16(OperandVector &Operands) {
+  ParseStatus Res =
+      parseNamedBit("r128", Operands, AMDGPUOperand::ImmTyR128A16);
+  if (Res.isNoMatch())
+    Res = parseNamedBit("a16", Operands, AMDGPUOperand::ImmTyA16);
+  return Res;
+}
+
+ParseStatus AMDGPUAsmParser::parseBLGP(OperandVector &Operands) {
+  ParseStatus Res =
+      parseIntWithPrefix("blgp", Operands, AMDGPUOperand::ImmTyBLGP);
+  if (Res.isNoMatch()) {
+    Res =
+        parseOperandArrayWithPrefix("neg", Operands, AMDGPUOperand::ImmTyBLGP);
+  }
+  return Res;
+}
+
+//===----------------------------------------------------------------------===//
+// Exp
+//===----------------------------------------------------------------------===//
+
+void AMDGPUAsmParser::cvtExp(MCInst &Inst, const OperandVector &Operands) {
+  OptionalImmIndexMap OptionalIdx;
+
+  unsigned OperandIdx[4];
+  unsigned EnMask = 0;
+  int SrcIdx = 0;
+
+  for (unsigned i = 1, e = Operands.size(); i != e; ++i) {
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
+
+    // Add the register arguments
+    if (Op.isReg()) {
+      assert(SrcIdx < 4);
+      OperandIdx[SrcIdx] = Inst.size();
+      Op.addRegOperands(Inst, 1);
+      ++SrcIdx;
+      continue;
+    }
+
+    if (Op.isOff()) {
+      assert(SrcIdx < 4);
+      OperandIdx[SrcIdx] = Inst.size();
+      Inst.addOperand(MCOperand::createReg(MCRegister()));
+      ++SrcIdx;
+      continue;
+    }
+
+    if (Op.isImm() && Op.getImmTy() == AMDGPUOperand::ImmTyExpTgt) {
+      Op.addImmOperands(Inst, 1);
+      continue;
+    }
+
+    if (Op.isToken() && (Op.getToken() == "done" || Op.getToken() == "row_en"))
+      continue;
+
+    // Handle optional arguments
+    OptionalIdx[Op.getImmTy()] = i;
+  }
+
+  assert(SrcIdx == 4);
+
+  bool Compr = false;
+  if (OptionalIdx.find(AMDGPUOperand::ImmTyExpCompr) != OptionalIdx.end()) {
+    Compr = true;
+    Inst.getOperand(OperandIdx[1]) = Inst.getOperand(OperandIdx[2]);
+    Inst.getOperand(OperandIdx[2]).setReg(MCRegister());
+    Inst.getOperand(OperandIdx[3]).setReg(MCRegister());
+  }
+
+  for (auto i = 0; i < SrcIdx; ++i) {
+    if (Inst.getOperand(OperandIdx[i]).getReg()) {
+      EnMask |= Compr? (0x3 << i * 2) : (0x1 << i);
+    }
+  }
+
+  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyExpVM);
+  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyExpCompr);
+
+  Inst.addOperand(MCOperand::createImm(EnMask));
+}
+
+//===----------------------------------------------------------------------===//
+// s_waitcnt
+//===----------------------------------------------------------------------===//
+
+static bool
+encodeCnt(
+  const AMDGPU::IsaVersion ISA,
+  int64_t &IntVal,
+  int64_t CntVal,
+  bool Saturate,
+  unsigned (*encode)(const IsaVersion &Version, unsigned, unsigned),
+  unsigned (*decode)(const IsaVersion &Version, unsigned))
+{
+  bool Failed = false;
+
+  IntVal = encode(ISA, IntVal, CntVal);
+  if (CntVal != decode(ISA, IntVal)) {
+    if (Saturate) {
+      IntVal = encode(ISA, IntVal, -1);
+    } else {
+      Failed = true;
+    }
+  }
+  return Failed;
+}
+
+bool AMDGPUAsmParser::parseCnt(int64_t &IntVal) {
+
+  SMLoc CntLoc = getLoc();
+  StringRef CntName = getTokenStr();
+
+  if (!skipToken(AsmToken::Identifier, "expected a counter name") ||
+      !skipToken(AsmToken::LParen, "expected a left parenthesis"))
+    return false;
+
+  int64_t CntVal;
+  SMLoc ValLoc = getLoc();
+  if (!parseExpr(CntVal))
+    return false;
+
+  AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU());
+
+  bool Failed = true;
+  bool Sat = CntName.ends_with("_sat");
+
+  if (CntName == "vmcnt" || CntName == "vmcnt_sat") {
+    Failed = encodeCnt(ISA, IntVal, CntVal, Sat, encodeVmcnt, decodeVmcnt);
+  } else if (CntName == "expcnt" || CntName == "expcnt_sat") {
+    Failed = encodeCnt(ISA, IntVal, CntVal, Sat, encodeExpcnt, decodeExpcnt);
+  } else if (CntName == "lgkmcnt" || CntName == "lgkmcnt_sat") {
+    Failed = encodeCnt(ISA, IntVal, CntVal, Sat, encodeLgkmcnt, decodeLgkmcnt);
+  } else {
+    Error(CntLoc, "invalid counter name " + CntName);
+    return false;
+  }
+
+  if (Failed) {
+    Error(ValLoc, "too large value for " + CntName);
+    return false;
+  }
+
+  if (!skipToken(AsmToken::RParen, "expected a closing parenthesis"))
+    return false;
+
+  if (trySkipToken(AsmToken::Amp) || trySkipToken(AsmToken::Comma)) {
+    if (isToken(AsmToken::EndOfStatement)) {
+      Error(getLoc(), "expected a counter name");
+      return false;
+    }
+  }
+
+  return true;
+}
+
+ParseStatus AMDGPUAsmParser::parseSWaitCnt(OperandVector &Operands) {
+  AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU());
+  int64_t Waitcnt = getWaitcntBitMask(ISA);
+  SMLoc S = getLoc();
+
+  if (isToken(AsmToken::Identifier) && peekToken().is(AsmToken::LParen)) {
+    while (!isToken(AsmToken::EndOfStatement)) {
+      if (!parseCnt(Waitcnt))
+        return ParseStatus::Failure;
+    }
+  } else {
+    if (!parseExpr(Waitcnt))
+      return ParseStatus::Failure;
+  }
+
+  Operands.push_back(AMDGPUOperand::CreateImm(this, Waitcnt, S));
+  return ParseStatus::Success;
+}
+
+bool AMDGPUAsmParser::parseDelay(int64_t &Delay) {
+  SMLoc FieldLoc = getLoc();
+  StringRef FieldName = getTokenStr();
+  if (!skipToken(AsmToken::Identifier, "expected a field name") ||
+      !skipToken(AsmToken::LParen, "expected a left parenthesis"))
+    return false;
+
+  SMLoc ValueLoc = getLoc();
+  StringRef ValueName = getTokenStr();
+  if (!skipToken(AsmToken::Identifier, "expected a value name") ||
+      !skipToken(AsmToken::RParen, "expected a right parenthesis"))
+    return false;
+
+  unsigned Shift;
+  if (FieldName == "instid0") {
+    Shift = 0;
+  } else if (FieldName == "instskip") {
+    Shift = 4;
+  } else if (FieldName == "instid1") {
+    Shift = 7;
+  } else {
+    Error(FieldLoc, "invalid field name " + FieldName);
+    return false;
+  }
+
+  int Value;
+  if (Shift == 4) {
+    // Parse values for instskip.
+    Value = StringSwitch<int>(ValueName)
+                .Case("SAME", 0)
+                .Case("NEXT", 1)
+                .Case("SKIP_1", 2)
+                .Case("SKIP_2", 3)
+                .Case("SKIP_3", 4)
+                .Case("SKIP_4", 5)
+                .Default(-1);
+  } else {
+    // Parse values for instid0 and instid1.
+    Value = StringSwitch<int>(ValueName)
+                .Case("NO_DEP", 0)
+                .Case("VALU_DEP_1", 1)
+                .Case("VALU_DEP_2", 2)
+                .Case("VALU_DEP_3", 3)
+                .Case("VALU_DEP_4", 4)
+                .Case("TRANS32_DEP_1", 5)
+                .Case("TRANS32_DEP_2", 6)
+                .Case("TRANS32_DEP_3", 7)
+                .Case("FMA_ACCUM_CYCLE_1", 8)
+                .Case("SALU_CYCLE_1", 9)
+                .Case("SALU_CYCLE_2", 10)
+                .Case("SALU_CYCLE_3", 11)
+                .Default(-1);
+  }
+  if (Value < 0) {
+    Error(ValueLoc, "invalid value name " + ValueName);
+    return false;
+  }
+
+  Delay |= Value << Shift;
+  return true;
+}
+
+ParseStatus AMDGPUAsmParser::parseSDelayALU(OperandVector &Operands) {
+  int64_t Delay = 0;
+  SMLoc S = getLoc();
+
+  if (isToken(AsmToken::Identifier) && peekToken().is(AsmToken::LParen)) {
+    do {
+      if (!parseDelay(Delay))
+        return ParseStatus::Failure;
+    } while (trySkipToken(AsmToken::Pipe));
+  } else {
+    if (!parseExpr(Delay))
+      return ParseStatus::Failure;
+  }
+
+  Operands.push_back(AMDGPUOperand::CreateImm(this, Delay, S));
+  return ParseStatus::Success;
+}
+
+bool
+AMDGPUOperand::isSWaitCnt() const {
+  return isImm();
+}
+
+bool AMDGPUOperand::isSDelayALU() const { return isImm(); }
+
+//===----------------------------------------------------------------------===//
+// DepCtr
+//===----------------------------------------------------------------------===//
+
+void AMDGPUAsmParser::depCtrError(SMLoc Loc, int ErrorId,
+                                  StringRef DepCtrName) {
+  switch (ErrorId) {
+  case OPR_ID_UNKNOWN:
+    Error(Loc, Twine("invalid counter name ", DepCtrName));
+    return;
+  case OPR_ID_UNSUPPORTED:
+    Error(Loc, Twine(DepCtrName, " is not supported on this GPU"));
+    return;
+  case OPR_ID_DUPLICATE:
+    Error(Loc, Twine("duplicate counter name ", DepCtrName));
+    return;
+  case OPR_VAL_INVALID:
+    Error(Loc, Twine("invalid value for ", DepCtrName));
+    return;
+  default:
+    assert(false);
+  }
+}
+
+bool AMDGPUAsmParser::parseDepCtr(int64_t &DepCtr, unsigned &UsedOprMask) {
+
+  using namespace llvm::AMDGPU::DepCtr;
+
+  SMLoc DepCtrLoc = getLoc();
+  StringRef DepCtrName = getTokenStr();
+
+  if (!skipToken(AsmToken::Identifier, "expected a counter name") ||
+      !skipToken(AsmToken::LParen, "expected a left parenthesis"))
+    return false;
+
+  int64_t ExprVal;
+  if (!parseExpr(ExprVal))
+    return false;
+
+  unsigned PrevOprMask = UsedOprMask;
+  int CntVal = encodeDepCtr(DepCtrName, ExprVal, UsedOprMask, getSTI());
+
+  if (CntVal < 0) {
+    depCtrError(DepCtrLoc, CntVal, DepCtrName);
+    return false;
+  }
+
+  if (!skipToken(AsmToken::RParen, "expected a closing parenthesis"))
+    return false;
+
+  if (trySkipToken(AsmToken::Amp) || trySkipToken(AsmToken::Comma)) {
+    if (isToken(AsmToken::EndOfStatement)) {
+      Error(getLoc(), "expected a counter name");
+      return false;
+    }
+  }
+
+  unsigned CntValMask = PrevOprMask ^ UsedOprMask;
+  DepCtr = (DepCtr & ~CntValMask) | CntVal;
+  return true;
+}
+
+ParseStatus AMDGPUAsmParser::parseDepCtr(OperandVector &Operands) {
+  using namespace llvm::AMDGPU::DepCtr;
+
+  int64_t DepCtr = getDefaultDepCtrEncoding(getSTI());
+  SMLoc Loc = getLoc();
+
+  if (isToken(AsmToken::Identifier) && peekToken().is(AsmToken::LParen)) {
+    unsigned UsedOprMask = 0;
+    while (!isToken(AsmToken::EndOfStatement)) {
+      if (!parseDepCtr(DepCtr, UsedOprMask))
+        return ParseStatus::Failure;
+    }
+  } else {
+    if (!parseExpr(DepCtr))
+      return ParseStatus::Failure;
+  }
+
+  Operands.push_back(AMDGPUOperand::CreateImm(this, DepCtr, Loc));
+  return ParseStatus::Success;
+}
+
+bool AMDGPUOperand::isDepCtr() const { return isS16Imm(); }
+
+//===----------------------------------------------------------------------===//
+// hwreg
+//===----------------------------------------------------------------------===//
+
+ParseStatus AMDGPUAsmParser::parseHwregFunc(OperandInfoTy &HwReg,
+                                            OperandInfoTy &Offset,
+                                            OperandInfoTy &Width) {
+  using namespace llvm::AMDGPU::Hwreg;
+
+  if (!trySkipId("hwreg", AsmToken::LParen))
+    return ParseStatus::NoMatch;
+
+  // The register may be specified by name or using a numeric code
+  HwReg.Loc = getLoc();
+  if (isToken(AsmToken::Identifier) &&
+      (HwReg.Val = getHwregId(getTokenStr(), getSTI())) != OPR_ID_UNKNOWN) {
+    HwReg.IsSymbolic = true;
+    lex(); // skip register name
+  } else if (!parseExpr(HwReg.Val, "a register name")) {
+    return ParseStatus::Failure;
+  }
+
+  if (trySkipToken(AsmToken::RParen))
+    return ParseStatus::Success;
+
+  // parse optional params
+  if (!skipToken(AsmToken::Comma, "expected a comma or a closing parenthesis"))
+    return ParseStatus::Failure;
+
+  Offset.Loc = getLoc();
+  if (!parseExpr(Offset.Val))
+    return ParseStatus::Failure;
+
+  if (!skipToken(AsmToken::Comma, "expected a comma"))
+    return ParseStatus::Failure;
+
+  Width.Loc = getLoc();
+  if (!parseExpr(Width.Val) ||
+      !skipToken(AsmToken::RParen, "expected a closing parenthesis"))
+    return ParseStatus::Failure;
+
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseHwreg(OperandVector &Operands) {
+  using namespace llvm::AMDGPU::Hwreg;
+
+  int64_t ImmVal = 0;
+  SMLoc Loc = getLoc();
+
+  StructuredOpField HwReg("id", "hardware register", HwregId::Width,
+                          HwregId::Default);
+  StructuredOpField Offset("offset", "bit offset", HwregOffset::Width,
+                           HwregOffset::Default);
+  struct : StructuredOpField {
+    using StructuredOpField::StructuredOpField;
+    bool validate(AMDGPUAsmParser &Parser) const override {
+      if (!isUIntN(Width, Val - 1))
+        return Error(Parser, "only values from 1 to 32 are legal");
+      return true;
+    }
+  } Width("size", "bitfield width", HwregSize::Width, HwregSize::Default);
+  ParseStatus Res = parseStructuredOpFields({&HwReg, &Offset, &Width});
+
+  if (Res.isNoMatch())
+    Res = parseHwregFunc(HwReg, Offset, Width);
+
+  if (Res.isSuccess()) {
+    if (!validateStructuredOpFields({&HwReg, &Offset, &Width}))
+      return ParseStatus::Failure;
+    ImmVal = HwregEncoding::encode(HwReg.Val, Offset.Val, Width.Val);
+  }
+
+  if (Res.isNoMatch() &&
+      parseExpr(ImmVal, "a hwreg macro, structured immediate"))
+    Res = ParseStatus::Success;
+
+  if (!Res.isSuccess())
+    return ParseStatus::Failure;
+
+  if (!isUInt<16>(ImmVal))
+    return Error(Loc, "invalid immediate: only 16-bit values are legal");
+  Operands.push_back(
+      AMDGPUOperand::CreateImm(this, ImmVal, Loc, AMDGPUOperand::ImmTyHwreg));
+  return ParseStatus::Success;
+}
+
+bool AMDGPUOperand::isHwreg() const {
+  return isImmTy(ImmTyHwreg);
+}
+
+//===----------------------------------------------------------------------===//
+// sendmsg
+//===----------------------------------------------------------------------===//
+
+bool
+AMDGPUAsmParser::parseSendMsgBody(OperandInfoTy &Msg,
+                                  OperandInfoTy &Op,
+                                  OperandInfoTy &Stream) {
+  using namespace llvm::AMDGPU::SendMsg;
+
+  Msg.Loc = getLoc();
+  if (isToken(AsmToken::Identifier) &&
+      (Msg.Val = getMsgId(getTokenStr(), getSTI())) != OPR_ID_UNKNOWN) {
+    Msg.IsSymbolic = true;
+    lex(); // skip message name
+  } else if (!parseExpr(Msg.Val, "a message name")) {
+    return false;
+  }
+
+  if (trySkipToken(AsmToken::Comma)) {
+    Op.IsDefined = true;
+    Op.Loc = getLoc();
+    if (isToken(AsmToken::Identifier) &&
+        (Op.Val = getMsgOpId(Msg.Val, getTokenStr(), getSTI())) !=
+            OPR_ID_UNKNOWN) {
+      lex(); // skip operation name
+    } else if (!parseExpr(Op.Val, "an operation name")) {
+      return false;
+    }
+
+    if (trySkipToken(AsmToken::Comma)) {
+      Stream.IsDefined = true;
+      Stream.Loc = getLoc();
+      if (!parseExpr(Stream.Val))
+        return false;
+    }
+  }
+
+  return skipToken(AsmToken::RParen, "expected a closing parenthesis");
+}
+
+bool
+AMDGPUAsmParser::validateSendMsg(const OperandInfoTy &Msg,
+                                 const OperandInfoTy &Op,
+                                 const OperandInfoTy &Stream) {
+  using namespace llvm::AMDGPU::SendMsg;
+
+  // Validation strictness depends on whether message is specified
+  // in a symbolic or in a numeric form. In the latter case
+  // only encoding possibility is checked.
+  bool Strict = Msg.IsSymbolic;
+
+  if (Strict) {
+    if (Msg.Val == OPR_ID_UNSUPPORTED) {
+      Error(Msg.Loc, "specified message id is not supported on this GPU");
+      return false;
+    }
+  } else {
+    if (!isValidMsgId(Msg.Val, getSTI())) {
+      Error(Msg.Loc, "invalid message id");
+      return false;
+    }
+  }
+  if (Strict && (msgRequiresOp(Msg.Val, getSTI()) != Op.IsDefined)) {
+    if (Op.IsDefined) {
+      Error(Op.Loc, "message does not support operations");
+    } else {
+      Error(Msg.Loc, "missing message operation");
+    }
+    return false;
+  }
+  if (!isValidMsgOp(Msg.Val, Op.Val, getSTI(), Strict)) {
+    if (Op.Val == OPR_ID_UNSUPPORTED)
+      Error(Op.Loc, "specified operation id is not supported on this GPU");
+    else
+      Error(Op.Loc, "invalid operation id");
+    return false;
+  }
+  if (Strict && !msgSupportsStream(Msg.Val, Op.Val, getSTI()) &&
+      Stream.IsDefined) {
+    Error(Stream.Loc, "message operation does not support streams");
+    return false;
+  }
+  if (!isValidMsgStream(Msg.Val, Op.Val, Stream.Val, getSTI(), Strict)) {
+    Error(Stream.Loc, "invalid message stream id");
+    return false;
+  }
+  return true;
+}
+
+ParseStatus AMDGPUAsmParser::parseSendMsg(OperandVector &Operands) {
+  using namespace llvm::AMDGPU::SendMsg;
+
+  int64_t ImmVal = 0;
+  SMLoc Loc = getLoc();
+
+  if (trySkipId("sendmsg", AsmToken::LParen)) {
+    OperandInfoTy Msg(OPR_ID_UNKNOWN);
+    OperandInfoTy Op(OP_NONE_);
+    OperandInfoTy Stream(STREAM_ID_NONE_);
+    if (parseSendMsgBody(Msg, Op, Stream) &&
+        validateSendMsg(Msg, Op, Stream)) {
+      ImmVal = encodeMsg(Msg.Val, Op.Val, Stream.Val);
+    } else {
+      return ParseStatus::Failure;
+    }
+  } else if (parseExpr(ImmVal, "a sendmsg macro")) {
+    if (ImmVal < 0 || !isUInt<16>(ImmVal))
+      return Error(Loc, "invalid immediate: only 16-bit values are legal");
+  } else {
+    return ParseStatus::Failure;
+  }
+
+  Operands.push_back(AMDGPUOperand::CreateImm(this, ImmVal, Loc, AMDGPUOperand::ImmTySendMsg));
+  return ParseStatus::Success;
+}
+
+bool AMDGPUOperand::isSendMsg() const {
+  return isImmTy(ImmTySendMsg);
+}
+
+ParseStatus AMDGPUAsmParser::parseWaitEvent(OperandVector &Operands) {
+  using namespace llvm::AMDGPU::WaitEvent;
+
+  SMLoc Loc = getLoc();
+  int64_t ImmVal = 0;
+
+  StructuredOpField DontWaitExportReady("dont_wait_export_ready", "bit value",
+                                        1, 0);
+  StructuredOpField ExportReady("export_ready", "bit value", 1, 0);
+
+  StructuredOpField *TargetBitfield =
+      isGFX11() ? &DontWaitExportReady : &ExportReady;
+
+  ParseStatus Res = parseStructuredOpFields({TargetBitfield});
+  if (Res.isNoMatch() && parseExpr(ImmVal, "structured immediate"))
+    Res = ParseStatus::Success;
+  else if (Res.isSuccess()) {
+    if (!validateStructuredOpFields({TargetBitfield}))
+      return ParseStatus::Failure;
+    ImmVal = TargetBitfield->Val;
+  }
+
+  if (!Res.isSuccess())
+    return ParseStatus::Failure;
+
+  if (!isUInt<16>(ImmVal))
+    return Error(Loc, "invalid immediate: only 16-bit values are legal");
+
+  Operands.push_back(AMDGPUOperand::CreateImm(this, ImmVal, Loc,
+                                              AMDGPUOperand::ImmTyWaitEvent));
+  return ParseStatus::Success;
+}
+
+bool AMDGPUOperand::isWaitEvent() const { return isImmTy(ImmTyWaitEvent); }
+
+//===----------------------------------------------------------------------===//
+// v_interp
+//===----------------------------------------------------------------------===//
+
+ParseStatus AMDGPUAsmParser::parseInterpSlot(OperandVector &Operands) {
+  StringRef Str;
+  SMLoc S = getLoc();
+
+  if (!parseId(Str))
+    return ParseStatus::NoMatch;
+
+  int Slot = StringSwitch<int>(Str)
+    .Case("p10", 0)
+    .Case("p20", 1)
+    .Case("p0", 2)
+    .Default(-1);
+
+  if (Slot == -1)
+    return Error(S, "invalid interpolation slot");
+
+  Operands.push_back(AMDGPUOperand::CreateImm(this, Slot, S,
+                                              AMDGPUOperand::ImmTyInterpSlot));
+  return ParseStatus::Success;
+}
+
+ParseStatus AMDGPUAsmParser::parseInterpAttr(OperandVector &Operands) {
+  StringRef Str;
+  SMLoc S = getLoc();
+
+  if (!parseId(Str))
+    return ParseStatus::NoMatch;
+
+  if (!Str.starts_with("attr"))
+    return Error(S, "invalid interpolation attribute");
+
+  StringRef Chan = Str.take_back(2);
+  int AttrChan = StringSwitch<int>(Chan)
+    .Case(".x", 0)
+    .Case(".y", 1)
+    .Case(".z", 2)
+    .Case(".w", 3)
+    .Default(-1);
+  if (AttrChan == -1)
+    return Error(S, "invalid or missing interpolation attribute channel");
+
+  Str = Str.drop_back(2).drop_front(4);
+
+  uint8_t Attr;
+  if (Str.getAsInteger(10, Attr))
+    return Error(S, "invalid or missing interpolation attribute number");
+
+  if (Attr > 32)
+    return Error(S, "out of bounds interpolation attribute number");
+
+  SMLoc SChan = SMLoc::getFromPointer(Chan.data());
+
+  Operands.push_back(AMDGPUOperand::CreateImm(this, Attr, S,
+                                              AMDGPUOperand::ImmTyInterpAttr));
+  Operands.push_back(AMDGPUOperand::CreateImm(
+      this, AttrChan, SChan, AMDGPUOperand::ImmTyInterpAttrChan));
+  return ParseStatus::Success;
+}
+
+//===----------------------------------------------------------------------===//
+// exp
+//===----------------------------------------------------------------------===//
+
+ParseStatus AMDGPUAsmParser::parseExpTgt(OperandVector &Operands) {
+  using namespace llvm::AMDGPU::Exp;
+
+  StringRef Str;
+  SMLoc S = getLoc();
+
+  if (!parseId(Str))
+    return ParseStatus::NoMatch;
+
+  unsigned Id = getTgtId(Str);
+  if (Id == ET_INVALID || !isSupportedTgtId(Id, getSTI()))
+    return Error(S, (Id == ET_INVALID)
+                        ? "invalid exp target"
+                        : "exp target is not supported on this GPU");
+
+  Operands.push_back(AMDGPUOperand::CreateImm(this, Id, S,
+                                              AMDGPUOperand::ImmTyExpTgt));
+  return ParseStatus::Success;
+}
+
+//===----------------------------------------------------------------------===//
+// parser helpers
+//===----------------------------------------------------------------------===//
+
+bool
+AMDGPUAsmParser::isId(const AsmToken &Token, const StringRef Id) const {
+  return Token.is(AsmToken::Identifier) && Token.getString() == Id;
+}
+
+bool
+AMDGPUAsmParser::isId(const StringRef Id) const {
+  return isId(getToken(), Id);
+}
+
+bool
+AMDGPUAsmParser::isToken(const AsmToken::TokenKind Kind) const {
+  return getTokenKind() == Kind;
+}
+
+StringRef AMDGPUAsmParser::getId() const {
+  return isToken(AsmToken::Identifier) ? getTokenStr() : StringRef();
+}
+
+bool
+AMDGPUAsmParser::trySkipId(const StringRef Id) {
+  if (isId(Id)) {
+    lex();
+    return true;
+  }
+  return false;
+}
+
+bool
+AMDGPUAsmParser::trySkipId(const StringRef Pref, const StringRef Id) {
+  if (isToken(AsmToken::Identifier)) {
+    StringRef Tok = getTokenStr();
+    if (Tok.starts_with(Pref) && Tok.drop_front(Pref.size()) == Id) {
+      lex();
+      return true;
+    }
+  }
+  return false;
+}
+
+bool
+AMDGPUAsmParser::trySkipId(const StringRef Id, const AsmToken::TokenKind Kind) {
+  if (isId(Id) && peekToken().is(Kind)) {
+    lex();
+    lex();
+    return true;
+  }
+  return false;
+}
+
+bool
+AMDGPUAsmParser::trySkipToken(const AsmToken::TokenKind Kind) {
+  if (isToken(Kind)) {
+    lex();
+    return true;
+  }
+  return false;
+}
+
+bool
+AMDGPUAsmParser::skipToken(const AsmToken::TokenKind Kind,
+                           const StringRef ErrMsg) {
+  if (!trySkipToken(Kind)) {
+    Error(getLoc(), ErrMsg);
+    return false;
+  }
+  return true;
+}
+
+bool
+AMDGPUAsmParser::parseExpr(int64_t &Imm, StringRef Expected) {
+  SMLoc S = getLoc();
+
+  const MCExpr *Expr;
+  if (Parser.parseExpression(Expr))
+    return false;
+
+  if (Expr->evaluateAsAbsolute(Imm))
+    return true;
+
+  if (Expected.empty()) {
+    Error(S, "expected absolute expression");
+  } else {
+    Error(S, Twine("expected ", Expected) +
+             Twine(" or an absolute expression"));
+  }
+  return false;
+}
+
+bool
+AMDGPUAsmParser::parseExpr(OperandVector &Operands) {
+  SMLoc S = getLoc();
+
+  const MCExpr *Expr;
+  if (Parser.parseExpression(Expr))
+    return false;
+
+  int64_t IntVal;
+  if (Expr->evaluateAsAbsolute(IntVal)) {
+    Operands.push_back(AMDGPUOperand::CreateImm(this, IntVal, S));
+  } else {
+    Operands.push_back(AMDGPUOperand::CreateExpr(this, Expr, S));
+  }
+  return true;
+}
+
+bool
+AMDGPUAsmParser::parseString(StringRef &Val, const StringRef ErrMsg) {
+  if (isToken(AsmToken::String)) {
+    Val = getToken().getStringContents();
+    lex();
+    return true;
+  }
+  Error(getLoc(), ErrMsg);
+  return false;
+}
+
+bool
+AMDGPUAsmParser::parseId(StringRef &Val, const StringRef ErrMsg) {
+  if (isToken(AsmToken::Identifier)) {
+    Val = getTokenStr();
+    lex();
+    return true;
+  }
+  if (!ErrMsg.empty())
+    Error(getLoc(), ErrMsg);
+  return false;
+}
+
+AsmToken
+AMDGPUAsmParser::getToken() const {
+  return Parser.getTok();
+}
+
+AsmToken AMDGPUAsmParser::peekToken(bool ShouldSkipSpace) {
+  return isToken(AsmToken::EndOfStatement)
+             ? getToken()
+             : getLexer().peekTok(ShouldSkipSpace);
+}
+
+void
+AMDGPUAsmParser::peekTokens(MutableArrayRef<AsmToken> Tokens) {
+  auto TokCount = getLexer().peekTokens(Tokens);
+
+  for (auto Idx = TokCount; Idx < Tokens.size(); ++Idx)
+    Tokens[Idx] = AsmToken(AsmToken::Error, "");
+}
+
+AsmToken::TokenKind
+AMDGPUAsmParser::getTokenKind() const {
+  return getLexer().getKind();
+}
+
+SMLoc
+AMDGPUAsmParser::getLoc() const {
+  return getToken().getLoc();
+}
+
+StringRef
+AMDGPUAsmParser::getTokenStr() const {
+  return getToken().getString();
+}
+
+void
+AMDGPUAsmParser::lex() {
+  Parser.Lex();
+}
+
+SMLoc AMDGPUAsmParser::getInstLoc(const OperandVector &Operands) const {
+  return ((AMDGPUOperand &)*Operands[0]).getStartLoc();
+}
+
+// Returns one of the given locations that comes later in the source.
+SMLoc AMDGPUAsmParser::getLaterLoc(SMLoc a, SMLoc b) {
+  return a.getPointer() < b.getPointer() ? b : a;
+}
+
+SMLoc AMDGPUAsmParser::getOperandLoc(const OperandVector &Operands,
+                                     int MCOpIdx) const {
+  for (const auto &Op : Operands) {
+    const auto TargetOp = static_cast<AMDGPUOperand &>(*Op);
+    if (TargetOp.getMCOpIdx() == MCOpIdx)
+      return TargetOp.getStartLoc();
+  }
+  llvm_unreachable("No such MC operand!");
+}
+
+SMLoc
+AMDGPUAsmParser::getOperandLoc(std::function<bool(const AMDGPUOperand&)> Test,
+                               const OperandVector &Operands) const {
+  for (unsigned i = Operands.size() - 1; i > 0; --i) {
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
+    if (Test(Op))
+      return Op.getStartLoc();
+  }
+  return getInstLoc(Operands);
+}
+
+SMLoc
+AMDGPUAsmParser::getImmLoc(AMDGPUOperand::ImmTy Type,
+                           const OperandVector &Operands) const {
+  auto Test = [=](const AMDGPUOperand& Op) { return Op.isImmTy(Type); };
+  return getOperandLoc(Test, Operands);
+}
+
+ParseStatus
+AMDGPUAsmParser::parseStructuredOpFields(ArrayRef<StructuredOpField *> Fields) {
+  if (!trySkipToken(AsmToken::LCurly))
+    return ParseStatus::NoMatch;
+
+  bool First = true;
+  while (!trySkipToken(AsmToken::RCurly)) {
+    if (!First &&
+        !skipToken(AsmToken::Comma, "comma or closing brace expected"))
+      return ParseStatus::Failure;
+
+    StringRef Id = getTokenStr();
+    SMLoc IdLoc = getLoc();
+    if (!skipToken(AsmToken::Identifier, "field name expected") ||
+        !skipToken(AsmToken::Colon, "colon expected"))
+      return ParseStatus::Failure;
+
+    const auto *I =
+        find_if(Fields, [Id](StructuredOpField *F) { return F->Id == Id; });
+    if (I == Fields.end())
+      return Error(IdLoc, "unknown field");
+    if ((*I)->IsDefined)
+      return Error(IdLoc, "duplicate field");
+
+    // TODO: Support symbolic values.
+    (*I)->Loc = getLoc();
+    if (!parseExpr((*I)->Val))
+      return ParseStatus::Failure;
+    (*I)->IsDefined = true;
+
+    First = false;
+  }
+  return ParseStatus::Success;
+}
+
+bool AMDGPUAsmParser::validateStructuredOpFields(
+    ArrayRef<const StructuredOpField *> Fields) {
+  return all_of(Fields, [this](const StructuredOpField *F) {
+    return F->validate(*this);
+  });
+}
+
+//===----------------------------------------------------------------------===//
+// swizzle
+//===----------------------------------------------------------------------===//
+
+LLVM_READNONE
+static unsigned
+encodeBitmaskPerm(const unsigned AndMask,
+                  const unsigned OrMask,
+                  const unsigned XorMask) {
+  using namespace llvm::AMDGPU::Swizzle;
+
+  return BITMASK_PERM_ENC |
+         (AndMask << BITMASK_AND_SHIFT) |
+         (OrMask  << BITMASK_OR_SHIFT)  |
+         (XorMask << BITMASK_XOR_SHIFT);
+}
+
+bool AMDGPUAsmParser::parseSwizzleOperand(int64_t &Op, const unsigned MinVal,
+                                          const unsigned MaxVal,
+                                          const Twine &ErrMsg, SMLoc &Loc) {
+  if (!skipToken(AsmToken::Comma, "expected a comma")) {
+    return false;
+  }
+  Loc = getLoc();
+  if (!parseExpr(Op)) {
+    return false;
+  }
+  if (Op < MinVal || Op > MaxVal) {
+    Error(Loc, ErrMsg);
+    return false;
+  }
+
+  return true;
+}
+
+bool
+AMDGPUAsmParser::parseSwizzleOperands(const unsigned OpNum, int64_t* Op,
+                                      const unsigned MinVal,
+                                      const unsigned MaxVal,
+                                      const StringRef ErrMsg) {
+  SMLoc Loc;
+  for (unsigned i = 0; i < OpNum; ++i) {
+    if (!parseSwizzleOperand(Op[i], MinVal, MaxVal, ErrMsg, Loc))
+      return false;
+  }
+
+  return true;
+}
+
+bool
+AMDGPUAsmParser::parseSwizzleQuadPerm(int64_t &Imm) {
+  using namespace llvm::AMDGPU::Swizzle;
+
+  int64_t Lane[LANE_NUM];
+  if (parseSwizzleOperands(LANE_NUM, Lane, 0, LANE_MAX,
+                           "expected a 2-bit lane id")) {
+    Imm = QUAD_PERM_ENC;
+    for (unsigned I = 0; I < LANE_NUM; ++I) {
+      Imm |= Lane[I] << (LANE_SHIFT * I);
+    }
+    return true;
+  }
+  return false;
+}
+
+bool
+AMDGPUAsmParser::parseSwizzleBroadcast(int64_t &Imm) {
+  using namespace llvm::AMDGPU::Swizzle;
+
+  SMLoc Loc;
+  int64_t GroupSize;
+  int64_t LaneIdx;
+
+  if (!parseSwizzleOperand(GroupSize,
+                           2, 32,
+                           "group size must be in the interval [2,32]",
+                           Loc)) {
+    return false;
+  }
+  if (!isPowerOf2_64(GroupSize)) {
+    Error(Loc, "group size must be a power of two");
+    return false;
+  }
+  if (parseSwizzleOperand(LaneIdx,
+                          0, GroupSize - 1,
+                          "lane id must be in the interval [0,group size - 1]",
+                          Loc)) {
+    Imm = encodeBitmaskPerm(BITMASK_MAX - GroupSize + 1, LaneIdx, 0);
+    return true;
+  }
+  return false;
+}
+
+bool
+AMDGPUAsmParser::parseSwizzleReverse(int64_t &Imm) {
+  using namespace llvm::AMDGPU::Swizzle;
+
+  SMLoc Loc;
+  int64_t GroupSize;
+
+  if (!parseSwizzleOperand(GroupSize,
+                           2, 32,
+                           "group size must be in the interval [2,32]",
+                           Loc)) {
+    return false;
+  }
+  if (!isPowerOf2_64(GroupSize)) {
+    Error(Loc, "group size must be a power of two");
+    return false;
+  }
+
+  Imm = encodeBitmaskPerm(BITMASK_MAX, 0, GroupSize - 1);
+  return true;
+}
+
+bool
+AMDGPUAsmParser::parseSwizzleSwap(int64_t &Imm) {
+  using namespace llvm::AMDGPU::Swizzle;
+
+  SMLoc Loc;
+  int64_t GroupSize;
+
+  if (!parseSwizzleOperand(GroupSize,
+                           1, 16,
+                           "group size must be in the interval [1,16]",
+                           Loc)) {
+    return false;
+  }
+  if (!isPowerOf2_64(GroupSize)) {
+    Error(Loc, "group size must be a power of two");
+    return false;
+  }
+
+  Imm = encodeBitmaskPerm(BITMASK_MAX, 0, GroupSize);
+  return true;
+}
+
+bool
+AMDGPUAsmParser::parseSwizzleBitmaskPerm(int64_t &Imm) {
+  using namespace llvm::AMDGPU::Swizzle;
+
+  if (!skipToken(AsmToken::Comma, "expected a comma")) {
+    return false;
+  }
+
+  StringRef Ctl;
+  SMLoc StrLoc = getLoc();
+  if (!parseString(Ctl)) {
+    return false;
+  }
+  if (Ctl.size() != BITMASK_WIDTH) {
+    Error(StrLoc, "expected a 5-character mask");
+    return false;
+  }
+
+  unsigned AndMask = 0;
+  unsigned OrMask = 0;
+  unsigned XorMask = 0;
+
+  for (size_t i = 0; i < Ctl.size(); ++i) {
+    unsigned Mask = 1 << (BITMASK_WIDTH - 1 - i);
+    switch(Ctl[i]) {
+    default:
+      Error(StrLoc, "invalid mask");
+      return false;
+    case '0':
+      break;
+    case '1':
+      OrMask |= Mask;
+      break;
+    case 'p':
+      AndMask |= Mask;
+      break;
+    case 'i':
+      AndMask |= Mask;
+      XorMask |= Mask;
+      break;
+    }
+  }
+
+  Imm = encodeBitmaskPerm(AndMask, OrMask, XorMask);
+  return true;
+}
+
+bool AMDGPUAsmParser::parseSwizzleFFT(int64_t &Imm) {
+  using namespace llvm::AMDGPU::Swizzle;
+
+  if (!AMDGPU::isGFX9Plus(getSTI())) {
+    Error(getLoc(), "FFT mode swizzle not supported on this GPU");
+    return false;
+  }
+
+  int64_t Swizzle;
+  SMLoc Loc;
+  if (!parseSwizzleOperand(Swizzle, 0, FFT_SWIZZLE_MAX,
+                           "FFT swizzle must be in the interval [0," +
+                               Twine(FFT_SWIZZLE_MAX) + Twine(']'),
+                           Loc))
+    return false;
+
+  Imm = FFT_MODE_ENC | Swizzle;
+  return true;
+}
+
+bool AMDGPUAsmParser::parseSwizzleRotate(int64_t &Imm) {
+  using namespace llvm::AMDGPU::Swizzle;
+
+  if (!AMDGPU::isGFX9Plus(getSTI())) {
+    Error(getLoc(), "Rotate mode swizzle not supported on this GPU");
+    return false;
+  }
+
+  SMLoc Loc;
+  int64_t Direction;
+
+  if (!parseSwizzleOperand(Direction, 0, 1,
+                           "direction must be 0 (left) or 1 (right)", Loc))
+    return false;
+
+  int64_t RotateSize;
+  if (!parseSwizzleOperand(
+          RotateSize, 0, ROTATE_MAX_SIZE,
+          "number of threads to rotate must be in the interval [0," +
+              Twine(ROTATE_MAX_SIZE) + Twine(']'),
+          Loc))
+    return false;
+
+  Imm = ROTATE_MODE_ENC | (Direction << ROTATE_DIR_SHIFT) |
+        (RotateSize << ROTATE_SIZE_SHIFT);
+  return true;
+}
+
+bool
+AMDGPUAsmParser::parseSwizzleOffset(int64_t &Imm) {
+
+  SMLoc OffsetLoc = getLoc();
+
+  if (!parseExpr(Imm, "a swizzle macro")) {
+    return false;
+  }
+  if (!isUInt<16>(Imm)) {
+    Error(OffsetLoc, "expected a 16-bit offset");
+    return false;
+  }
+  return true;
+}
+
+bool
+AMDGPUAsmParser::parseSwizzleMacro(int64_t &Imm) {
+  using namespace llvm::AMDGPU::Swizzle;
+
+  if (skipToken(AsmToken::LParen, "expected a left parentheses")) {
+
+    SMLoc ModeLoc = getLoc();
+    bool Ok = false;
+
+    if (trySkipId(IdSymbolic[ID_QUAD_PERM])) {
+      Ok = parseSwizzleQuadPerm(Imm);
+    } else if (trySkipId(IdSymbolic[ID_BITMASK_PERM])) {
+      Ok = parseSwizzleBitmaskPerm(Imm);
+    } else if (trySkipId(IdSymbolic[ID_BROADCAST])) {
+      Ok = parseSwizzleBroadcast(Imm);
+    } else if (trySkipId(IdSymbolic[ID_SWAP])) {
+      Ok = parseSwizzleSwap(Imm);
+    } else if (trySkipId(IdSymbolic[ID_REVERSE])) {
+      Ok = parseSwizzleReverse(Imm);
+    } else if (trySkipId(IdSymbolic[ID_FFT])) {
+      Ok = parseSwizzleFFT(Imm);
+    } else if (trySkipId(IdSymbolic[ID_ROTATE])) {
+      Ok = parseSwizzleRotate(Imm);
+    } else {
+      Error(ModeLoc, "expected a swizzle mode");
+    }
+
+    return Ok && skipToken(AsmToken::RParen, "expected a closing parentheses");
+  }
+
+  return false;
+}
+
+ParseStatus AMDGPUAsmParser::parseSwizzle(OperandVector &Operands) {
+  SMLoc S = getLoc();
+  int64_t Imm = 0;
+
+  if (trySkipId("offset")) {
+
+    bool Ok = false;
+    if (skipToken(AsmToken::Colon, "expected a colon")) {
+      if (trySkipId("swizzle")) {
+        Ok = parseSwizzleMacro(Imm);
+      } else {
+        Ok = parseSwizzleOffset(Imm);
+      }
+    }
+
+    Operands.push_back(AMDGPUOperand::CreateImm(this, Imm, S, AMDGPUOperand::ImmTySwizzle));
+
+    return Ok ? ParseStatus::Success : ParseStatus::Failure;
+  }
+  return ParseStatus::NoMatch;
+}
+
+bool
+AMDGPUOperand::isSwizzle() const {
+  return isImmTy(ImmTySwizzle);
+}
+
+//===----------------------------------------------------------------------===//
+// VGPR Index Mode
+//===----------------------------------------------------------------------===//
+
+int64_t AMDGPUAsmParser::parseGPRIdxMacro() {
+
+  using namespace llvm::AMDGPU::VGPRIndexMode;
+
+  if (trySkipToken(AsmToken::RParen)) {
+    return OFF;
+  }
+
+  int64_t Imm = 0;
+
+  while (true) {
+    unsigned Mode = 0;
+    SMLoc S = getLoc();
+
+    for (unsigned ModeId = ID_MIN; ModeId <= ID_MAX; ++ModeId) {
+      if (trySkipId(IdSymbolic[ModeId])) {
+        Mode = 1 << ModeId;
+        break;
+      }
+    }
+
+    if (Mode == 0) {
+      Error(S, (Imm == 0)?
+               "expected a VGPR index mode or a closing parenthesis" :
+               "expected a VGPR index mode");
+      return UNDEF;
+    }
+
+    if (Imm & Mode) {
+      Error(S, "duplicate VGPR index mode");
+      return UNDEF;
+    }
+    Imm |= Mode;
+
+    if (trySkipToken(AsmToken::RParen))
+      break;
+    if (!skipToken(AsmToken::Comma,
+                   "expected a comma or a closing parenthesis"))
+      return UNDEF;
+  }
+
+  return Imm;
+}
+
+ParseStatus AMDGPUAsmParser::parseGPRIdxMode(OperandVector &Operands) {
+
+  using namespace llvm::AMDGPU::VGPRIndexMode;
+
+  int64_t Imm = 0;
+  SMLoc S = getLoc();
+
+  if (trySkipId("gpr_idx", AsmToken::LParen)) {
+    Imm = parseGPRIdxMacro();
+    if (Imm == UNDEF)
+      return ParseStatus::Failure;
+  } else {
+    if (getParser().parseAbsoluteExpression(Imm))
+      return ParseStatus::Failure;
+    if (Imm < 0 || !isUInt<4>(Imm))
+      return Error(S, "invalid immediate: only 4-bit values are legal");
+  }
+
+  Operands.push_back(
+      AMDGPUOperand::CreateImm(this, Imm, S, AMDGPUOperand::ImmTyGprIdxMode));
+  return ParseStatus::Success;
+}
+
+bool AMDGPUOperand::isGPRIdxMode() const {
+  return isImmTy(ImmTyGprIdxMode);
+}
+
+//===----------------------------------------------------------------------===//
+// sopp branch targets
+//===----------------------------------------------------------------------===//
+
+ParseStatus AMDGPUAsmParser::parseSOPPBrTarget(OperandVector &Operands) {
+
+  // Make sure we are not parsing something
+  // that looks like a label or an expression but is not.
+  // This will improve error messages.
+  if (isRegister() || isModifier())
+    return ParseStatus::NoMatch;
+
+  if (!parseExpr(Operands))
+    return ParseStatus::Failure;
+
+  AMDGPUOperand &Opr = ((AMDGPUOperand &)*Operands[Operands.size() - 1]);
+  assert(Opr.isImm() || Opr.isExpr());
+  SMLoc Loc = Opr.getStartLoc();
+
+  // Currently we do not support arbitrary expressions as branch targets.
+  // Only labels and absolute expressions are accepted.
+  if (Opr.isExpr() && !Opr.isSymbolRefExpr()) {
+    Error(Loc, "expected an absolute expression or a label");
+  } else if (Opr.isImm() && !Opr.isS16Imm()) {
+    Error(Loc, "expected a 16-bit signed jump offset");
+  }
+
+  return ParseStatus::Success;
+}
+
+//===----------------------------------------------------------------------===//
+// Boolean holding registers
+//===----------------------------------------------------------------------===//
+
+ParseStatus AMDGPUAsmParser::parseBoolReg(OperandVector &Operands) {
+  return parseReg(Operands);
+}
+
+//===----------------------------------------------------------------------===//
+// mubuf
+//===----------------------------------------------------------------------===//
+
+void AMDGPUAsmParser::cvtMubufImpl(MCInst &Inst,
+                                   const OperandVector &Operands,
+                                   bool IsAtomic) {
+  OptionalImmIndexMap OptionalIdx;
+  unsigned FirstOperandIdx = 1;
+  bool IsAtomicReturn = false;
+
+  if (IsAtomic) {
+    IsAtomicReturn =  MII.get(Inst.getOpcode()).TSFlags &
+                      SIInstrFlags::IsAtomicRet;
+  }
+
+  for (unsigned i = FirstOperandIdx, e = Operands.size(); i != e; ++i) {
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
+
+    // Add the register arguments
+    if (Op.isReg()) {
+      Op.addRegOperands(Inst, 1);
+      // Insert a tied src for atomic return dst.
+      // This cannot be postponed as subsequent calls to
+      // addImmOperands rely on correct number of MC operands.
+      if (IsAtomicReturn && i == FirstOperandIdx)
+        Op.addRegOperands(Inst, 1);
+      continue;
+    }
+
+    // Handle the case where soffset is an immediate
+    if (Op.isImm() && Op.getImmTy() == AMDGPUOperand::ImmTyNone) {
+      Op.addImmOperands(Inst, 1);
+      continue;
+    }
+
+    // Handle tokens like 'offen' which are sometimes hard-coded into the
+    // asm string.  There are no MCInst operands for these.
+    if (Op.isToken()) {
+      continue;
+    }
+    assert(Op.isImm());
+
+    // Handle optional arguments
+    OptionalIdx[Op.getImmTy()] = i;
+  }
+
+  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOffset);
+  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyCPol, 0);
+  // Parse a dummy operand as a placeholder for the SWZ operand. This enforces
+  // agreement between MCInstrDesc.getNumOperands and MCInst.getNumOperands.
+  Inst.addOperand(MCOperand::createImm(0));
+}
+
+//===----------------------------------------------------------------------===//
+// smrd
+//===----------------------------------------------------------------------===//
+
+bool AMDGPUOperand::isSMRDOffset8() const {
+  return isImmLiteral() && isUInt<8>(getImm());
+}
+
+bool AMDGPUOperand::isSMEMOffset() const {
+  // Offset range is checked later by validator.
+  return isImmLiteral();
+}
+
+bool AMDGPUOperand::isSMRDLiteralOffset() const {
+  // 32-bit literals are only supported on CI and we only want to use them
+  // when the offset is > 8-bits.
+  return isImmLiteral() && !isUInt<8>(getImm()) && isUInt<32>(getImm());
+}
+
+//===----------------------------------------------------------------------===//
+// vop3
 //===----------------------------------------------------------------------===//
 
-#include "MCTargetDesc/AMDGPUFixupKinds.h"
-#include "MCTargetDesc/AMDGPUMCExpr.h"
-#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
-#include "SIDefines.h"
-#include "Utils/AMDGPUBaseInfo.h"
-#include "llvm/ADT/APInt.h"
-#include "llvm/MC/MCCodeEmitter.h"
-#include "llvm/MC/MCContext.h"
-#include "llvm/MC/MCExpr.h"
-#include "llvm/MC/MCInstrInfo.h"
-#include "llvm/MC/MCRegisterInfo.h"
-#include "llvm/MC/MCSubtargetInfo.h"
-#include "llvm/Support/Casting.h"
-#include "llvm/Support/EndianStream.h"
-#include <optional>
+static bool ConvertOmodMul(int64_t &Mul) {
+  if (Mul != 1 && Mul != 2 && Mul != 4)
+    return false;
+
+  Mul >>= 1;
+  return true;
+}
+
+static bool ConvertOmodDiv(int64_t &Div) {
+  if (Div == 1) {
+    Div = 0;
+    return true;
+  }
+
+  if (Div == 2) {
+    Div = 3;
+    return true;
+  }
+
+  return false;
+}
+
+// For pre-gfx11 targets, both bound_ctrl:0 and bound_ctrl:1 are encoded as 1.
+// This is intentional and ensures compatibility with sp3.
+// See bug 35397 for details.
+bool AMDGPUAsmParser::convertDppBoundCtrl(int64_t &BoundCtrl) {
+  if (BoundCtrl == 0 || BoundCtrl == 1) {
+    if (!isGFX11Plus())
+      BoundCtrl = 1;
+    return true;
+  }
+  return false;
+}
+
+void AMDGPUAsmParser::onBeginOfFile() {
+  if (!getParser().getStreamer().getTargetStreamer() ||
+      getSTI().getTargetTriple().getArch() == Triple::r600)
+    return;
+
+  if (!getTargetStreamer().getTargetID())
+    getTargetStreamer().initializeTargetID(getSTI(),
+                                           getSTI().getFeatureString());
+
+  if (isHsaAbi(getSTI()))
+    getTargetStreamer().EmitDirectiveAMDGCNTarget();
+}
+
+/// Parse AMDGPU specific expressions.
+///
+///  expr ::= or(expr, ...) |
+///           max(expr, ...)
+///
+bool AMDGPUAsmParser::parsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) {
+  using AGVK = AMDGPUMCExpr::VariantKind;
+
+  if (isToken(AsmToken::Identifier)) {
+    StringRef TokenId = getTokenStr();
+    AGVK VK = StringSwitch<AGVK>(TokenId)
+                  .Case("max", AGVK::AGVK_Max)
+                  .Case("or", AGVK::AGVK_Or)
+                  .Case("extrasgprs", AGVK::AGVK_ExtraSGPRs)
+                  .Case("totalnumvgprs", AGVK::AGVK_TotalNumVGPRs)
+                  .Case("alignto", AGVK::AGVK_AlignTo)
+                  .Case("occupancy", AGVK::AGVK_Occupancy)
+                  .Default(AGVK::AGVK_None);
+
+    if (VK != AGVK::AGVK_None && peekToken().is(AsmToken::LParen)) {
+      SmallVector<const MCExpr *, 4> Exprs;
+      uint64_t CommaCount = 0;
+      lex(); // Eat Arg ('or', 'max', 'occupancy', etc.)
+      lex(); // Eat '('
+      while (true) {
+        if (trySkipToken(AsmToken::RParen)) {
+          if (Exprs.empty()) {
+            Error(getToken().getLoc(),
+                  "empty " + Twine(TokenId) + " expression");
+            return true;
+          }
+          if (CommaCount + 1 != Exprs.size()) {
+            Error(getToken().getLoc(),
+                  "mismatch of commas in " + Twine(TokenId) + " expression");
+            return true;
+          }
+          Res = AMDGPUMCExpr::create(VK, Exprs, getContext());
+          return false;
+        }
+        const MCExpr *Expr;
+        if (getParser().parseExpression(Expr, EndLoc))
+          return true;
+        Exprs.push_back(Expr);
+        bool LastTokenWasComma = trySkipToken(AsmToken::Comma);
+        if (LastTokenWasComma)
+          CommaCount++;
+        if (!LastTokenWasComma && !isToken(AsmToken::RParen)) {
+          Error(getToken().getLoc(),
+                "unexpected token in " + Twine(TokenId) + " expression");
+          return true;
+        }
+      }
+    }
+  }
+  return getParser().parsePrimaryExpr(Res, EndLoc, nullptr);
+}
+
+ParseStatus AMDGPUAsmParser::parseOModSI(OperandVector &Operands) {
+  StringRef Name = getTokenStr();
+  if (Name == "mul") {
+    return parseIntWithPrefix("mul", Operands,
+                              AMDGPUOperand::ImmTyOModSI, ConvertOmodMul);
+  }
+
+  if (Name == "div") {
+    return parseIntWithPrefix("div", Operands,
+                              AMDGPUOperand::ImmTyOModSI, ConvertOmodDiv);
+  }
+
+  return ParseStatus::NoMatch;
+}
+
+// Determines which bit DST_OP_SEL occupies in the op_sel operand according to
+// the number of src operands present, then copies that bit into src0_modifiers.
+static void cvtVOP3DstOpSelOnly(MCInst &Inst, const MCRegisterInfo &MRI) {
+  int Opc = Inst.getOpcode();
+  int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
+  if (OpSelIdx == -1)
+    return;
+
+  int SrcNum;
+  const AMDGPU::OpName Ops[] = {AMDGPU::OpName::src0, AMDGPU::OpName::src1,
+                                AMDGPU::OpName::src2};
+  for (SrcNum = 0; SrcNum < 3 && AMDGPU::hasNamedOperand(Opc, Ops[SrcNum]);
+       ++SrcNum)
+    ;
+  assert(SrcNum > 0);
+
+  unsigned OpSel = Inst.getOperand(OpSelIdx).getImm();
+
+  int DstIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst);
+  if (DstIdx == -1)
+    return;
+
+  const MCOperand &DstOp = Inst.getOperand(DstIdx);
+  int ModIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0_modifiers);
+  uint32_t ModVal = Inst.getOperand(ModIdx).getImm();
+  if (DstOp.isReg() &&
+      MRI.getRegClass(AMDGPU::VGPR_16RegClassID).contains(DstOp.getReg())) {
+    if (AMDGPU::isHi16Reg(DstOp.getReg(), MRI))
+      ModVal |= SISrcMods::DST_OP_SEL;
+  } else {
+    if ((OpSel & (1 << SrcNum)) != 0)
+      ModVal |= SISrcMods::DST_OP_SEL;
+  }
+  Inst.getOperand(ModIdx).setImm(ModVal);
+}
+
+void AMDGPUAsmParser::cvtVOP3OpSel(MCInst &Inst,
+                                   const OperandVector &Operands) {
+  cvtVOP3P(Inst, Operands);
+  cvtVOP3DstOpSelOnly(Inst, *getMRI());
+}
+
+void AMDGPUAsmParser::cvtVOP3OpSel(MCInst &Inst, const OperandVector &Operands,
+                                   OptionalImmIndexMap &OptionalIdx) {
+  cvtVOP3P(Inst, Operands, OptionalIdx);
+  cvtVOP3DstOpSelOnly(Inst, *getMRI());
+}
+
+static bool isRegOrImmWithInputMods(const MCInstrDesc &Desc, unsigned OpNum) {
+  return
+      // 1. This operand is input modifiers
+      Desc.operands()[OpNum].OperandType == AMDGPU::OPERAND_INPUT_MODS
+      // 2. This is not last operand
+      && Desc.NumOperands > (OpNum + 1)
+      // 3. Next operand is register class
+      && Desc.operands()[OpNum + 1].RegClass != -1
+      // 4. Next register is not tied to any other operand
+      && Desc.getOperandConstraint(OpNum + 1,
+                                   MCOI::OperandConstraint::TIED_TO) == -1;
+}
+
+void AMDGPUAsmParser::cvtOpSelHelper(MCInst &Inst, unsigned OpSel) {
+  unsigned Opc = Inst.getOpcode();
+  constexpr AMDGPU::OpName Ops[] = {AMDGPU::OpName::src0, AMDGPU::OpName::src1,
+                                    AMDGPU::OpName::src2};
+  constexpr AMDGPU::OpName ModOps[] = {AMDGPU::OpName::src0_modifiers,
+                                       AMDGPU::OpName::src1_modifiers,
+                                       AMDGPU::OpName::src2_modifiers};
+  for (int J = 0; J < 3; ++J) {
+    int OpIdx = AMDGPU::getNamedOperandIdx(Opc, Ops[J]);
+    if (OpIdx == -1)
+      // Some instructions, e.g. v_interp_p2_f16 in GFX9, have src0, src2, but
+      // no src1. So continue instead of break.
+      continue;
+
+    int ModIdx = AMDGPU::getNamedOperandIdx(Opc, ModOps[J]);
+    uint32_t ModVal = Inst.getOperand(ModIdx).getImm();
+
+    if ((OpSel & (1 << J)) != 0)
+      ModVal |= SISrcMods::OP_SEL_0;
+    // op_sel[3] is encoded in src0_modifiers.
+    if (ModOps[J] == AMDGPU::OpName::src0_modifiers && (OpSel & (1 << 3)) != 0)
+      ModVal |= SISrcMods::DST_OP_SEL;
+
+    Inst.getOperand(ModIdx).setImm(ModVal);
+  }
+}
+
+void AMDGPUAsmParser::cvtVOP3Interp(MCInst &Inst, const OperandVector &Operands)
+{
+  OptionalImmIndexMap OptionalIdx;
+  unsigned Opc = Inst.getOpcode();
+
+  unsigned I = 1;
+  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
+  for (unsigned J = 0; J < Desc.getNumDefs(); ++J) {
+    ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
+  }
+
+  for (unsigned E = Operands.size(); I != E; ++I) {
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]);
+    if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
+      Op.addRegOrImmWithFPInputModsOperands(Inst, 2);
+    } else if (Op.isInterpSlot() || Op.isInterpAttr() ||
+               Op.isInterpAttrChan()) {
+      Inst.addOperand(MCOperand::createImm(Op.getImm()));
+    } else if (Op.isImmModifier()) {
+      OptionalIdx[Op.getImmTy()] = I;
+    } else {
+      llvm_unreachable("unhandled operand type");
+    }
+  }
+
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::high))
+    addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                          AMDGPUOperand::ImmTyHigh);
+
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::clamp))
+    addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                          AMDGPUOperand::ImmTyClamp);
+
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::omod))
+    addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                          AMDGPUOperand::ImmTyOModSI);
+
+  // Some v_interp instructions use op_sel[3] for dst.
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::op_sel)) {
+    addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                          AMDGPUOperand::ImmTyOpSel);
+    int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
+    unsigned OpSel = Inst.getOperand(OpSelIdx).getImm();
+
+    cvtOpSelHelper(Inst, OpSel);
+  }
+}
+
+void AMDGPUAsmParser::cvtVINTERP(MCInst &Inst, const OperandVector &Operands)
+{
+  OptionalImmIndexMap OptionalIdx;
+  unsigned Opc = Inst.getOpcode();
+
+  unsigned I = 1;
+  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
+  for (unsigned J = 0; J < Desc.getNumDefs(); ++J) {
+    ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
+  }
+
+  for (unsigned E = Operands.size(); I != E; ++I) {
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]);
+    if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
+      Op.addRegOrImmWithFPInputModsOperands(Inst, 2);
+    } else if (Op.isImmModifier()) {
+      OptionalIdx[Op.getImmTy()] = I;
+    } else {
+      llvm_unreachable("unhandled operand type");
+    }
+  }
+
+  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyClamp);
+
+  int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
+  if (OpSelIdx != -1)
+    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOpSel);
+
+  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyWaitEXP);
+
+  if (OpSelIdx == -1)
+    return;
+
+  unsigned OpSel = Inst.getOperand(OpSelIdx).getImm();
+  cvtOpSelHelper(Inst, OpSel);
+}
+
+void AMDGPUAsmParser::cvtScaledMFMA(MCInst &Inst,
+                                    const OperandVector &Operands) {
+  OptionalImmIndexMap OptionalIdx;
+  unsigned Opc = Inst.getOpcode();
+  unsigned I = 1;
+  int CbszOpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::cbsz);
+
+  const MCInstrDesc &Desc = MII.get(Opc);
+
+  for (unsigned J = 0; J < Desc.getNumDefs(); ++J)
+    static_cast<AMDGPUOperand &>(*Operands[I++]).addRegOperands(Inst, 1);
+
+  for (unsigned E = Operands.size(); I != E; ++I) {
+    AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands[I]);
+    int NumOperands = Inst.getNumOperands();
+    // The order of operands in MCInst and parsed operands are different.
+    // Adding dummy cbsz and blgp operands at corresponding MCInst operand
+    // indices for parsing scale values correctly.
+    if (NumOperands == CbszOpIdx) {
+      Inst.addOperand(MCOperand::createImm(0));
+      Inst.addOperand(MCOperand::createImm(0));
+    }
+    if (isRegOrImmWithInputMods(Desc, NumOperands)) {
+      Op.addRegOrImmWithFPInputModsOperands(Inst, 2);
+    } else if (Op.isImmModifier()) {
+      OptionalIdx[Op.getImmTy()] = I;
+    } else {
+      Op.addRegOrImmOperands(Inst, 1);
+    }
+  }
+
+  // Insert CBSZ and BLGP operands for F8F6F4 variants
+  auto CbszIdx = OptionalIdx.find(AMDGPUOperand::ImmTyCBSZ);
+  if (CbszIdx != OptionalIdx.end()) {
+    int CbszVal = ((AMDGPUOperand &)*Operands[CbszIdx->second]).getImm();
+    Inst.getOperand(CbszOpIdx).setImm(CbszVal);
+  }
+
+  int BlgpOpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::blgp);
+  auto BlgpIdx = OptionalIdx.find(AMDGPUOperand::ImmTyBLGP);
+  if (BlgpIdx != OptionalIdx.end()) {
+    int BlgpVal = ((AMDGPUOperand &)*Operands[BlgpIdx->second]).getImm();
+    Inst.getOperand(BlgpOpIdx).setImm(BlgpVal);
+  }
+
+  // Add dummy src_modifiers
+  Inst.addOperand(MCOperand::createImm(0));
+  Inst.addOperand(MCOperand::createImm(0));
+
+  // Handle op_sel fields
+
+  unsigned OpSel = 0;
+  auto OpselIdx = OptionalIdx.find(AMDGPUOperand::ImmTyOpSel);
+  if (OpselIdx != OptionalIdx.end()) {
+    OpSel = static_cast<const AMDGPUOperand &>(*Operands[OpselIdx->second])
+                .getImm();
+  }
+
+  unsigned OpSelHi = 0;
+  auto OpselHiIdx = OptionalIdx.find(AMDGPUOperand::ImmTyOpSelHi);
+  if (OpselHiIdx != OptionalIdx.end()) {
+    OpSelHi = static_cast<const AMDGPUOperand &>(*Operands[OpselHiIdx->second])
+                  .getImm();
+  }
+  const AMDGPU::OpName ModOps[] = {AMDGPU::OpName::src0_modifiers,
+                                   AMDGPU::OpName::src1_modifiers};
+
+  for (unsigned J = 0; J < 2; ++J) {
+    unsigned ModVal = 0;
+    if (OpSel & (1 << J))
+      ModVal |= SISrcMods::OP_SEL_0;
+    if (OpSelHi & (1 << J))
+      ModVal |= SISrcMods::OP_SEL_1;
+
+    const int ModIdx = AMDGPU::getNamedOperandIdx(Opc, ModOps[J]);
+    Inst.getOperand(ModIdx).setImm(ModVal);
+  }
+}
+
+void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands,
+                              OptionalImmIndexMap &OptionalIdx) {
+  unsigned Opc = Inst.getOpcode();
+
+  unsigned I = 1;
+  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
+  for (unsigned J = 0; J < Desc.getNumDefs(); ++J) {
+    ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
+  }
+
+  for (unsigned E = Operands.size(); I != E; ++I) {
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]);
+    if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
+      Op.addRegOrImmWithFPInputModsOperands(Inst, 2);
+    } else if (Op.isImmModifier()) {
+      OptionalIdx[Op.getImmTy()] = I;
+    } else {
+      Op.addRegOrImmOperands(Inst, 1);
+    }
+  }
+
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::scale_sel))
+    addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                          AMDGPUOperand::ImmTyScaleSel);
 
-using namespace llvm;
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::clamp))
+    addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                          AMDGPUOperand::ImmTyClamp);
 
-namespace {
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::byte_sel)) {
+    if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::vdst_in))
+      Inst.addOperand(Inst.getOperand(0));
+    addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                          AMDGPUOperand::ImmTyByteSel);
+  }
 
-class AMDGPUMCCodeEmitter : public MCCodeEmitter {
-  const MCRegisterInfo &MRI;
-  const MCInstrInfo &MCII;
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::omod))
+    addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                          AMDGPUOperand::ImmTyOModSI);
 
-public:
-  AMDGPUMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI)
-      : MRI(MRI), MCII(MCII) {}
+  // Special case v_mac_{f16, f32} and v_fmac_{f16, f32} (gfx906/gfx10+):
+  // it has src2 register operand that is tied to dst operand
+  // we don't allow modifiers for this operand in assembler so src2_modifiers
+  // should be 0.
+  if (isMAC(Opc)) {
+    auto *it = Inst.begin();
+    std::advance(it, AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2_modifiers));
+    it = Inst.insert(it, MCOperand::createImm(0)); // no modifiers for src2
+    ++it;
+    // Copy the operand to ensure it's not invalidated when Inst grows.
+    Inst.insert(it, MCOperand(Inst.getOperand(0))); // src2 = dst
+  }
+}
 
-  /// Encode the instruction and write it to the OS.
-  void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
-                         SmallVectorImpl<MCFixup> &Fixups,
-                         const MCSubtargetInfo &STI) const override;
+void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands) {
+  OptionalImmIndexMap OptionalIdx;
+  cvtVOP3(Inst, Operands, OptionalIdx);
+}
 
-  void getMachineOpValue(const MCInst &MI, const MCOperand &MO, APInt &Op,
-                         SmallVectorImpl<MCFixup> &Fixups,
-                         const MCSubtargetInfo &STI) const;
+void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst, const OperandVector &Operands,
+                               OptionalImmIndexMap &OptIdx) {
+  const int Opc = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opc);
 
-  void getMachineOpValueT16(const MCInst &MI, unsigned OpNo, APInt &Op,
-                            SmallVectorImpl<MCFixup> &Fixups,
-                            const MCSubtargetInfo &STI) const;
+  const bool IsPacked = (Desc.TSFlags & SIInstrFlags::IsPacked) != 0;
 
-  void getMachineOpValueT16Lo128(const MCInst &MI, unsigned OpNo, APInt &Op,
-                                 SmallVectorImpl<MCFixup> &Fixups,
-                                 const MCSubtargetInfo &STI) const;
+  if (Opc == AMDGPU::V_CVT_SCALEF32_PK_FP4_F16_vi ||
+      Opc == AMDGPU::V_CVT_SCALEF32_PK_FP4_BF16_vi ||
+      Opc == AMDGPU::V_CVT_SR_BF8_F32_vi ||
+      Opc == AMDGPU::V_CVT_SR_FP8_F32_vi ||
+      Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_gfx11 ||
+      Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_gfx11 ||
+      Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_gfx12 ||
+      Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_gfx12) {
+    Inst.addOperand(MCOperand::createImm(0)); // Placeholder for src2_mods
+    Inst.addOperand(Inst.getOperand(0));
+  }
 
-  /// Use a fixup to encode the simm16 field for SOPP branch
-  ///        instructions.
-  void getSOPPBrEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
-                         SmallVectorImpl<MCFixup> &Fixups,
-                         const MCSubtargetInfo &STI) const;
+  // Adding vdst_in operand is already covered for these DPP instructions in
+  // cvtVOP3DPP.
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::vdst_in) &&
+      !(Opc == AMDGPU::V_CVT_PK_BF8_F32_t16_e64_dpp_gfx11 ||
+        Opc == AMDGPU::V_CVT_PK_FP8_F32_t16_e64_dpp_gfx11 ||
+        Opc == AMDGPU::V_CVT_PK_BF8_F32_t16_e64_dpp8_gfx11 ||
+        Opc == AMDGPU::V_CVT_PK_FP8_F32_t16_e64_dpp8_gfx11 ||
+        Opc == AMDGPU::V_CVT_PK_BF8_F32_fake16_e64_dpp_gfx11 ||
+        Opc == AMDGPU::V_CVT_PK_FP8_F32_fake16_e64_dpp_gfx11 ||
+        Opc == AMDGPU::V_CVT_PK_BF8_F32_fake16_e64_dpp8_gfx11 ||
+        Opc == AMDGPU::V_CVT_PK_FP8_F32_fake16_e64_dpp8_gfx11 ||
+        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_dpp_gfx11 ||
+        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_dpp8_gfx11 ||
+        Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_dpp_gfx11 ||
+        Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_dpp8_gfx11 ||
+        Opc == AMDGPU::V_CVT_PK_BF8_F32_t16_e64_dpp_gfx12 ||
+        Opc == AMDGPU::V_CVT_PK_FP8_F32_t16_e64_dpp_gfx12 ||
+        Opc == AMDGPU::V_CVT_PK_BF8_F32_t16_e64_dpp8_gfx12 ||
+        Opc == AMDGPU::V_CVT_PK_FP8_F32_t16_e64_dpp8_gfx12 ||
+        Opc == AMDGPU::V_CVT_PK_BF8_F32_fake16_e64_dpp_gfx12 ||
+        Opc == AMDGPU::V_CVT_PK_FP8_F32_fake16_e64_dpp_gfx12 ||
+        Opc == AMDGPU::V_CVT_PK_BF8_F32_fake16_e64_dpp8_gfx12 ||
+        Opc == AMDGPU::V_CVT_PK_FP8_F32_fake16_e64_dpp8_gfx12 ||
+        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_dpp_gfx12 ||
+        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_dpp8_gfx12 ||
+        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx1250_e64_dpp_gfx1250 ||
+        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx1250_e64_dpp8_gfx1250 ||
+        Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_dpp_gfx12 ||
+        Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_dpp8_gfx12 ||
+        Opc == AMDGPU::V_CVT_SR_FP8_F16_t16_e64_dpp_gfx1250 ||
+        Opc == AMDGPU::V_CVT_SR_FP8_F16_fake16_e64_dpp_gfx1250 ||
+        Opc == AMDGPU::V_CVT_SR_FP8_F16_t16_e64_dpp8_gfx1250 ||
+        Opc == AMDGPU::V_CVT_SR_FP8_F16_fake16_e64_dpp8_gfx1250 ||
+        Opc == AMDGPU::V_CVT_SR_FP8_F16_t16_e64_gfx1250 ||
+        Opc == AMDGPU::V_CVT_SR_FP8_F16_fake16_e64_gfx1250 ||
+        Opc == AMDGPU::V_CVT_SR_BF8_F16_t16_e64_dpp_gfx1250 ||
+        Opc == AMDGPU::V_CVT_SR_BF8_F16_fake16_e64_dpp_gfx1250 ||
+        Opc == AMDGPU::V_CVT_SR_BF8_F16_t16_e64_dpp8_gfx1250 ||
+        Opc == AMDGPU::V_CVT_SR_BF8_F16_fake16_e64_dpp8_gfx1250 ||
+        Opc == AMDGPU::V_CVT_SR_BF8_F16_t16_e64_gfx1250 ||
+        Opc == AMDGPU::V_CVT_SR_BF8_F16_fake16_e64_gfx1250)) {
+    Inst.addOperand(Inst.getOperand(0));
+  }
 
-  void getSMEMOffsetEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
-                             SmallVectorImpl<MCFixup> &Fixups,
-                             const MCSubtargetInfo &STI) const;
+  int BitOp3Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::bitop3);
+  if (BitOp3Idx != -1) {
+    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyBitOp3);
+  }
 
-  void getSDWASrcEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
-                          SmallVectorImpl<MCFixup> &Fixups,
-                          const MCSubtargetInfo &STI) const;
+  // FIXME: This is messy. Parse the modifiers as if it was a normal VOP3
+  // instruction, and then figure out where to actually put the modifiers
 
-  void getSDWAVopcDstEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
-                              SmallVectorImpl<MCFixup> &Fixups,
-                              const MCSubtargetInfo &STI) const;
+  int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
+  if (OpSelIdx != -1) {
+    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyOpSel);
+  }
 
-  void getAVOperandEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
-                            SmallVectorImpl<MCFixup> &Fixups,
-                            const MCSubtargetInfo &STI) const;
+  int OpSelHiIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel_hi);
+  if (OpSelHiIdx != -1) {
+    int DefaultVal = IsPacked ? -1 : 0;
+    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyOpSelHi,
+                          DefaultVal);
+  }
 
-private:
-  uint64_t getImplicitOpSelHiEncoding(int Opcode) const;
-  void getMachineOpValueCommon(const MCInst &MI, const MCOperand &MO,
-                               unsigned OpNo, APInt &Op,
-                               SmallVectorImpl<MCFixup> &Fixups,
-                               const MCSubtargetInfo &STI) const;
-
-  /// Encode an fp or int literal.
-  std::optional<uint64_t>
-  getLitEncoding(const MCInstrDesc &Desc, const MCOperand &MO, unsigned OpNo,
-                 const MCSubtargetInfo &STI,
-                 bool HasMandatoryLiteral = false) const;
-
-  void getBinaryCodeForInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
-                             APInt &Inst, APInt &Scratch,
-                             const MCSubtargetInfo &STI) const;
-
-  template <bool HasSrc0, bool HasSrc1, bool HasSrc2>
-  APInt postEncodeVOP3(const MCInst &MI, APInt EncodedValue,
-                       const MCSubtargetInfo &STI) const;
-
-  APInt postEncodeVOPCX(const MCInst &MI, APInt EncodedValue,
-                        const MCSubtargetInfo &STI) const;
-};
+  int MatrixAFMTIdx =
+      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::matrix_a_fmt);
+  if (MatrixAFMTIdx != -1) {
+    addOptionalImmOperand(Inst, Operands, OptIdx,
+                          AMDGPUOperand::ImmTyMatrixAFMT, 0);
+  }
 
-} // end anonymous namespace
+  int MatrixBFMTIdx =
+      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::matrix_b_fmt);
+  if (MatrixBFMTIdx != -1) {
+    addOptionalImmOperand(Inst, Operands, OptIdx,
+                          AMDGPUOperand::ImmTyMatrixBFMT, 0);
+  }
 
-MCCodeEmitter *llvm::createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII,
-                                               MCContext &Ctx) {
-  return new AMDGPUMCCodeEmitter(MCII, *Ctx.getRegisterInfo());
-}
+  int MatrixAScaleIdx =
+      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::matrix_a_scale);
+  if (MatrixAScaleIdx != -1) {
+    addOptionalImmOperand(Inst, Operands, OptIdx,
+                          AMDGPUOperand::ImmTyMatrixAScale, 0);
+  }
 
-static void addFixup(SmallVectorImpl<MCFixup> &Fixups, uint32_t Offset,
-                     const MCExpr *Value, uint16_t Kind, bool PCRel = false) {
-  Fixups.push_back(MCFixup::create(Offset, Value, Kind, PCRel));
-}
+  int MatrixBScaleIdx =
+      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::matrix_b_scale);
+  if (MatrixBScaleIdx != -1) {
+    addOptionalImmOperand(Inst, Operands, OptIdx,
+                          AMDGPUOperand::ImmTyMatrixBScale, 0);
+  }
 
-// Returns the encoding value to use if the given integer is an integer inline
-// immediate value, or 0 if it is not.
-template <typename IntTy>
-static uint32_t getIntInlineImmEncoding(IntTy Imm) {
-  if (Imm >= 0 && Imm <= 64)
-    return 128 + Imm;
+  int MatrixAScaleFmtIdx =
+      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::matrix_a_scale_fmt);
+  if (MatrixAScaleFmtIdx != -1) {
+    addOptionalImmOperand(Inst, Operands, OptIdx,
+                          AMDGPUOperand::ImmTyMatrixAScaleFmt, 0);
+  }
 
-  if (Imm >= -16 && Imm <= -1)
-    return 192 + std::abs(Imm);
+  int MatrixBScaleFmtIdx =
+      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::matrix_b_scale_fmt);
+  if (MatrixBScaleFmtIdx != -1) {
+    addOptionalImmOperand(Inst, Operands, OptIdx,
+                          AMDGPUOperand::ImmTyMatrixBScaleFmt, 0);
+  }
 
-  return 0;
-}
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::matrix_a_reuse))
+    addOptionalImmOperand(Inst, Operands, OptIdx,
+                          AMDGPUOperand::ImmTyMatrixAReuse, 0);
 
-static uint32_t getLit16Encoding(uint16_t Val, const MCSubtargetInfo &STI) {
-  uint16_t IntImm = getIntInlineImmEncoding(static_cast<int16_t>(Val));
-  if (IntImm != 0)
-    return IntImm;
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::matrix_b_reuse))
+    addOptionalImmOperand(Inst, Operands, OptIdx,
+                          AMDGPUOperand::ImmTyMatrixBReuse, 0);
 
-  if (Val == 0x3800) // 0.5
-    return 240;
+  int NegLoIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::neg_lo);
+  if (NegLoIdx != -1)
+    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyNegLo);
 
-  if (Val == 0xB800) // -0.5
-    return 241;
+  int NegHiIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::neg_hi);
+  if (NegHiIdx != -1)
+    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyNegHi);
 
-  if (Val == 0x3C00) // 1.0
-    return 242;
+  const AMDGPU::OpName Ops[] = {AMDGPU::OpName::src0, AMDGPU::OpName::src1,
+                                AMDGPU::OpName::src2};
+  const AMDGPU::OpName ModOps[] = {AMDGPU::OpName::src0_modifiers,
+                                   AMDGPU::OpName::src1_modifiers,
+                                   AMDGPU::OpName::src2_modifiers};
 
-  if (Val == 0xBC00) // -1.0
-    return 243;
+  unsigned OpSel = 0;
+  unsigned OpSelHi = 0;
+  unsigned NegLo = 0;
+  unsigned NegHi = 0;
 
-  if (Val == 0x4000) // 2.0
-    return 244;
+  if (OpSelIdx != -1)
+    OpSel = Inst.getOperand(OpSelIdx).getImm();
 
-  if (Val == 0xC000) // -2.0
-    return 245;
+  if (OpSelHiIdx != -1)
+    OpSelHi = Inst.getOperand(OpSelHiIdx).getImm();
 
-  if (Val == 0x4400) // 4.0
-    return 246;
+  if (NegLoIdx != -1)
+    NegLo = Inst.getOperand(NegLoIdx).getImm();
 
-  if (Val == 0xC400) // -4.0
-    return 247;
+  if (NegHiIdx != -1)
+    NegHi = Inst.getOperand(NegHiIdx).getImm();
 
-  if (Val == 0x3118 && // 1.0 / (2.0 * pi)
-      STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm))
-    return 248;
+  for (int J = 0; J < 3; ++J) {
+    int OpIdx = AMDGPU::getNamedOperandIdx(Opc, Ops[J]);
+    if (OpIdx == -1)
+      break;
 
-  return 255;
-}
+    int ModIdx = AMDGPU::getNamedOperandIdx(Opc, ModOps[J]);
+
+    if (ModIdx == -1)
+      continue;
+
+    uint32_t ModVal = 0;
 
-static uint32_t getLitBF16Encoding(uint16_t Val) {
-  uint16_t IntImm = getIntInlineImmEncoding(static_cast<int16_t>(Val));
-  if (IntImm != 0)
-    return IntImm;
+    const MCOperand &SrcOp = Inst.getOperand(OpIdx);
+    if (SrcOp.isReg() && getMRI()
+                             ->getRegClass(AMDGPU::VGPR_16RegClassID)
+                             .contains(SrcOp.getReg())) {
+      bool VGPRSuffixIsHi = AMDGPU::isHi16Reg(SrcOp.getReg(), *getMRI());
+      if (VGPRSuffixIsHi)
+        ModVal |= SISrcMods::OP_SEL_0;
+    } else {
+      if ((OpSel & (1 << J)) != 0)
+        ModVal |= SISrcMods::OP_SEL_0;
+    }
+
+    if ((OpSelHi & (1 << J)) != 0)
+      ModVal |= SISrcMods::OP_SEL_1;
+
+    if ((NegLo & (1 << J)) != 0)
+      ModVal |= SISrcMods::NEG;
 
-  // clang-format off
-  switch (Val) {
-  case 0x3F00: return 240; // 0.5
-  case 0xBF00: return 241; // -0.5
-  case 0x3F80: return 242; // 1.0
-  case 0xBF80: return 243; // -1.0
-  case 0x4000: return 244; // 2.0
-  case 0xC000: return 245; // -2.0
-  case 0x4080: return 246; // 4.0
-  case 0xC080: return 247; // -4.0
-  case 0x3E22: return 248; // 1.0 / (2.0 * pi)
-  default:     return 255;
+    if ((NegHi & (1 << J)) != 0)
+      ModVal |= SISrcMods::NEG_HI;
+
+    Inst.getOperand(ModIdx).setImm(Inst.getOperand(ModIdx).getImm() | ModVal);
   }
-  // clang-format on
 }
 
-static uint32_t getLit32Encoding(uint32_t Val, const MCSubtargetInfo &STI) {
-  uint32_t IntImm = getIntInlineImmEncoding(static_cast<int32_t>(Val));
-  if (IntImm != 0)
-    return IntImm;
-
-  if (Val == llvm::bit_cast<uint32_t>(0.5f))
-    return 240;
+void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst, const OperandVector &Operands) {
+  OptionalImmIndexMap OptIdx;
+  cvtVOP3(Inst, Operands, OptIdx);
+  cvtVOP3P(Inst, Operands, OptIdx);
+}
 
-  if (Val == llvm::bit_cast<uint32_t>(-0.5f))
-    return 241;
+static void addSrcModifiersAndSrc(MCInst &Inst, const OperandVector &Operands,
+                                  unsigned i, unsigned Opc,
+                                  AMDGPU::OpName OpName) {
+  if (AMDGPU::getNamedOperandIdx(Opc, OpName) != -1)
+    ((AMDGPUOperand &)*Operands[i]).addRegOrImmWithFPInputModsOperands(Inst, 2);
+  else
+    ((AMDGPUOperand &)*Operands[i]).addRegOperands(Inst, 1);
+}
 
-  if (Val == llvm::bit_cast<uint32_t>(1.0f))
-    return 242;
+void AMDGPUAsmParser::cvtSWMMAC(MCInst &Inst, const OperandVector &Operands) {
+  unsigned Opc = Inst.getOpcode();
 
-  if (Val == llvm::bit_cast<uint32_t>(-1.0f))
-    return 243;
+  ((AMDGPUOperand &)*Operands[1]).addRegOperands(Inst, 1);
+  addSrcModifiersAndSrc(Inst, Operands, 2, Opc, AMDGPU::OpName::src0_modifiers);
+  addSrcModifiersAndSrc(Inst, Operands, 3, Opc, AMDGPU::OpName::src1_modifiers);
+  ((AMDGPUOperand &)*Operands[1]).addRegOperands(Inst, 1); // srcTiedDef
+  ((AMDGPUOperand &)*Operands[4]).addRegOperands(Inst, 1); // src2
 
-  if (Val == llvm::bit_cast<uint32_t>(2.0f))
-    return 244;
+  OptionalImmIndexMap OptIdx;
+  for (unsigned i = 5; i < Operands.size(); ++i) {
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
+    OptIdx[Op.getImmTy()] = i;
+  }
 
-  if (Val == llvm::bit_cast<uint32_t>(-2.0f))
-    return 245;
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::index_key_8bit))
+    addOptionalImmOperand(Inst, Operands, OptIdx,
+                          AMDGPUOperand::ImmTyIndexKey8bit);
 
-  if (Val == llvm::bit_cast<uint32_t>(4.0f))
-    return 246;
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::index_key_16bit))
+    addOptionalImmOperand(Inst, Operands, OptIdx,
+                          AMDGPUOperand::ImmTyIndexKey16bit);
 
-  if (Val == llvm::bit_cast<uint32_t>(-4.0f))
-    return 247;
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::index_key_32bit))
+    addOptionalImmOperand(Inst, Operands, OptIdx,
+                          AMDGPUOperand::ImmTyIndexKey32bit);
 
-  if (Val == 0x3e22f983 && // 1.0 / (2.0 * pi)
-      STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm))
-    return 248;
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::clamp))
+    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyClamp);
 
-  return 255;
+  cvtVOP3P(Inst, Operands, OptIdx);
 }
 
-static uint32_t getLit16IntEncoding(uint32_t Val, const MCSubtargetInfo &STI) {
-  return getLit32Encoding(Val, STI);
+//===----------------------------------------------------------------------===//
+// VOPD
+//===----------------------------------------------------------------------===//
+
+ParseStatus AMDGPUAsmParser::parseVOPD(OperandVector &Operands) {
+  if (!hasVOPD(getSTI()))
+    return ParseStatus::NoMatch;
+
+  if (isToken(AsmToken::Colon) && peekToken(false).is(AsmToken::Colon)) {
+    SMLoc S = getLoc();
+    lex();
+    lex();
+    Operands.push_back(AMDGPUOperand::CreateToken(this, "::", S));
+    SMLoc OpYLoc = getLoc();
+    StringRef OpYName;
+    if (isToken(AsmToken::Identifier) && !Parser.parseIdentifier(OpYName)) {
+      Operands.push_back(AMDGPUOperand::CreateToken(this, OpYName, OpYLoc));
+      return ParseStatus::Success;
+    }
+    return Error(OpYLoc, "expected a VOPDY instruction after ::");
+  }
+  return ParseStatus::NoMatch;
 }
 
-/// Get the encoding for a 64-bit literal value.
-/// \param IsFP - True if this is a floating-point operand.
-/// \param IsSigned - True if this is a signed integer operand (uses IsInt<32>
-///                   to determine if 32-bit literal is valid). Only relevant
-///                   when IsFP is false.
-static uint32_t getLit64Encoding(const MCInstrDesc &Desc, uint64_t Val,
-                                 const MCSubtargetInfo &STI, bool IsFP,
-                                 bool IsSigned = false) {
-  uint32_t IntImm = getIntInlineImmEncoding(static_cast<int64_t>(Val));
-  if (IntImm != 0)
-    return IntImm;
+// Create VOPD MCInst operands using parsed assembler operands.
+void AMDGPUAsmParser::cvtVOPD(MCInst &Inst, const OperandVector &Operands) {
+  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
 
-  if (Val == llvm::bit_cast<uint64_t>(0.5))
-    return 240;
+  auto addOp = [&](uint16_t ParsedOprIdx) { // NOLINT:function pointer
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[ParsedOprIdx]);
+    if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
+      Op.addRegOrImmWithFPInputModsOperands(Inst, 2);
+      return;
+    }
+    if (Op.isReg()) {
+      Op.addRegOperands(Inst, 1);
+      return;
+    }
+    if (Op.isImm()) {
+      Op.addImmOperands(Inst, 1);
+      return;
+    }
+    llvm_unreachable("Unhandled operand type in cvtVOPD");
+  };
 
-  if (Val == llvm::bit_cast<uint64_t>(-0.5))
-    return 241;
+  const auto &InstInfo = getVOPDInstInfo(Inst.getOpcode(), &MII);
 
-  if (Val == llvm::bit_cast<uint64_t>(1.0))
-    return 242;
+  // MCInst operands are ordered as follows:
+  //   dstX, dstY, src0X [, other OpX operands], src0Y [, other OpY operands]
 
-  if (Val == llvm::bit_cast<uint64_t>(-1.0))
-    return 243;
+  for (auto CompIdx : VOPD::COMPONENTS) {
+    addOp(InstInfo[CompIdx].getIndexOfDstInParsedOperands());
+  }
 
-  if (Val == llvm::bit_cast<uint64_t>(2.0))
-    return 244;
+  for (auto CompIdx : VOPD::COMPONENTS) {
+    const auto &CInfo = InstInfo[CompIdx];
+    auto CompSrcOperandsNum = InstInfo[CompIdx].getCompParsedSrcOperandsNum();
+    for (unsigned CompSrcIdx = 0; CompSrcIdx < CompSrcOperandsNum; ++CompSrcIdx)
+      addOp(CInfo.getIndexOfSrcInParsedOperands(CompSrcIdx));
+    if (CInfo.hasSrc2Acc())
+      addOp(CInfo.getIndexOfDstInParsedOperands());
+  }
 
-  if (Val == llvm::bit_cast<uint64_t>(-2.0))
-    return 245;
+  int BitOp3Idx =
+      AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::bitop3);
+  if (BitOp3Idx != -1) {
+    OptionalImmIndexMap OptIdx;
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands.back());
+    if (Op.isImm())
+      OptIdx[Op.getImmTy()] = Operands.size() - 1;
 
-  if (Val == llvm::bit_cast<uint64_t>(4.0))
-    return 246;
+    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyBitOp3);
+  }
+}
 
-  if (Val == llvm::bit_cast<uint64_t>(-4.0))
-    return 247;
+//===----------------------------------------------------------------------===//
+// dpp
+//===----------------------------------------------------------------------===//
 
-  if (Val == 0x3fc45f306dc9c882 && // 1.0 / (2.0 * pi)
-      STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm))
-    return 248;
+bool AMDGPUOperand::isDPP8() const {
+  return isImmTy(ImmTyDPP8);
+}
 
-  // The rest part needs to align with AMDGPUInstPrinter::printLiteral64.
+bool AMDGPUOperand::isDPPCtrl() const {
+  using namespace AMDGPU::DPP;
 
-  bool CanUse64BitLiterals =
-      STI.hasFeature(AMDGPU::Feature64BitLiterals) &&
-      !(Desc.TSFlags & (SIInstrFlags::VOP3 | SIInstrFlags::VOP3P));
-  if (IsFP) {
-    return CanUse64BitLiterals && Lo_32(Val) ? 254 : 255;
+  bool result = isImm() && getImmTy() == ImmTyDppCtrl && isUInt<9>(getImm());
+  if (result) {
+    int64_t Imm = getImm();
+    return (Imm >= DppCtrl::QUAD_PERM_FIRST && Imm <= DppCtrl::QUAD_PERM_LAST) ||
+           (Imm >= DppCtrl::ROW_SHL_FIRST && Imm <= DppCtrl::ROW_SHL_LAST) ||
+           (Imm >= DppCtrl::ROW_SHR_FIRST && Imm <= DppCtrl::ROW_SHR_LAST) ||
+           (Imm >= DppCtrl::ROW_ROR_FIRST && Imm <= DppCtrl::ROW_ROR_LAST) ||
+           (Imm == DppCtrl::WAVE_SHL1) ||
+           (Imm == DppCtrl::WAVE_ROL1) ||
+           (Imm == DppCtrl::WAVE_SHR1) ||
+           (Imm == DppCtrl::WAVE_ROR1) ||
+           (Imm == DppCtrl::ROW_MIRROR) ||
+           (Imm == DppCtrl::ROW_HALF_MIRROR) ||
+           (Imm == DppCtrl::BCAST15) ||
+           (Imm == DppCtrl::BCAST31) ||
+           (Imm >= DppCtrl::ROW_SHARE_FIRST && Imm <= DppCtrl::ROW_SHARE_LAST) ||
+           (Imm >= DppCtrl::ROW_XMASK_FIRST && Imm <= DppCtrl::ROW_XMASK_LAST);
   }
+  return false;
+}
+
+//===----------------------------------------------------------------------===//
+// mAI
+//===----------------------------------------------------------------------===//
 
-  // For integer operands, determine if we need 64-bit literal encoding based
-  // on whether the value fits in a sign-extended or zero-extended 32-bit
-  // literal. Signed operands use IsInt<32>, unsigned operands use IsUInt<32>.
-  bool Needs64BitLiteral =
-      IsSigned ? !isInt<32>(static_cast<int64_t>(Val)) : !isUInt<32>(Val);
-  return CanUse64BitLiterals && Needs64BitLiteral ? 254 : 255;
+bool AMDGPUOperand::isBLGP() const {
+  return isImm() && getImmTy() == ImmTyBLGP && isUInt<3>(getImm());
 }
 
-std::optional<uint64_t> AMDGPUMCCodeEmitter::getLitEncoding(
-    const MCInstrDesc &Desc, const MCOperand &MO, unsigned OpNo,
-    const MCSubtargetInfo &STI, bool HasMandatoryLiteral) const {
-  const MCOperandInfo &OpInfo = Desc.operands()[OpNo];
-  int64_t Imm = 0;
-  if (MO.isExpr()) {
-    if (!MO.getExpr()->evaluateAsAbsolute(Imm) ||
-        AMDGPU::isLitExpr(MO.getExpr())) {
-      if (OpInfo.OperandType == AMDGPU::OPERAND_KIMM16 ||
-          OpInfo.OperandType == AMDGPU::OPERAND_KIMM32 ||
-          OpInfo.OperandType == AMDGPU::OPERAND_KIMM64)
-        return Imm;
-      if (STI.hasFeature(AMDGPU::Feature64BitLiterals) &&
-          AMDGPU::getOperandSize(OpInfo) == 8)
-        return 254;
-      return 255;
-    }
-  } else {
-    assert(!MO.isDFPImm());
+bool AMDGPUOperand::isS16Imm() const {
+  return isImmLiteral() && (isInt<16>(getImm()) || isUInt<16>(getImm()));
+}
+
+bool AMDGPUOperand::isU16Imm() const {
+  return isImmLiteral() && isUInt<16>(getImm());
+}
 
-    if (!MO.isImm())
-      return {};
+//===----------------------------------------------------------------------===//
+// dim
+//===----------------------------------------------------------------------===//
 
-    Imm = MO.getImm();
+bool AMDGPUAsmParser::parseDimId(unsigned &Encoding) {
+  // We want to allow "dim:1D" etc.,
+  // but the initial 1 is tokenized as an integer.
+  std::string Token;
+  if (isToken(AsmToken::Integer)) {
+    SMLoc Loc = getToken().getEndLoc();
+    Token = std::string(getTokenStr());
+    lex();
+    if (getLoc() != Loc)
+      return false;
   }
 
-  switch (OpInfo.OperandType) {
-  case AMDGPU::OPERAND_REG_IMM_INT32:
-  case AMDGPU::OPERAND_REG_IMM_FP32:
-  case AMDGPU::OPERAND_REG_INLINE_C_INT32:
-  case AMDGPU::OPERAND_REG_INLINE_C_FP32:
-  case AMDGPU::OPERAND_REG_INLINE_AC_INT32:
-  case AMDGPU::OPERAND_REG_INLINE_AC_FP32:
-  case AMDGPU::OPERAND_REG_IMM_V2INT32:
-  case AMDGPU::OPERAND_REG_IMM_V2FP32:
-  case AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32:
-    return getLit32Encoding(static_cast<uint32_t>(Imm), STI);
+  StringRef Suffix;
+  if (!parseId(Suffix))
+    return false;
+  Token += Suffix;
 
-  case AMDGPU::OPERAND_REG_IMM_INT64:
-  case AMDGPU::OPERAND_REG_INLINE_C_INT64:
-    // Signed 64-bit integer operand - use IsInt<32> for 32-bit literal check
-    return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, false,
-                            /*IsSigned=*/true);
+  StringRef DimId = Token;
+  DimId.consume_front("SQ_RSRC_IMG_");
 
-  case AMDGPU::OPERAND_REG_IMM_B64:
-    // Unsigned 64-bit integer operand - use IsUInt<32> for 32-bit literal check
-    return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, false,
-                            /*IsSigned=*/false);
+  const AMDGPU::MIMGDimInfo *DimInfo = AMDGPU::getMIMGDimInfoByAsmSuffix(DimId);
+  if (!DimInfo)
+    return false;
 
-  case AMDGPU::OPERAND_REG_INLINE_C_FP64:
-  case AMDGPU::OPERAND_REG_INLINE_AC_FP64:
-    return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, true);
+  Encoding = DimInfo->Encoding;
+  return true;
+}
 
-  case AMDGPU::OPERAND_REG_IMM_FP64: {
-    auto Enc = getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, true);
-    return (HasMandatoryLiteral && Enc == 255) ? 254 : Enc;
-  }
+ParseStatus AMDGPUAsmParser::parseDim(OperandVector &Operands) {
+  if (!isGFX10Plus())
+    return ParseStatus::NoMatch;
 
-  case AMDGPU::OPERAND_REG_IMM_INT16:
-  case AMDGPU::OPERAND_REG_INLINE_C_INT16:
-    return getLit16IntEncoding(static_cast<uint32_t>(Imm), STI);
+  SMLoc S = getLoc();
 
-  case AMDGPU::OPERAND_REG_IMM_FP16:
-  case AMDGPU::OPERAND_REG_INLINE_C_FP16:
-    // FIXME Is this correct? What do inline immediates do on SI for f16 src
-    // which does not have f16 support?
-    return getLit16Encoding(static_cast<uint16_t>(Imm), STI);
+  if (!trySkipId("dim", AsmToken::Colon))
+    return ParseStatus::NoMatch;
 
-  case AMDGPU::OPERAND_REG_IMM_BF16:
-  case AMDGPU::OPERAND_REG_INLINE_C_BF16:
-    // We don't actually need to check Inv2Pi here because BF16 instructions can
-    // only be emitted for targets that already support the feature.
-    return getLitBF16Encoding(static_cast<uint16_t>(Imm));
+  unsigned Encoding;
+  SMLoc Loc = getLoc();
+  if (!parseDimId(Encoding))
+    return Error(Loc, "invalid dim value");
 
-  case AMDGPU::OPERAND_REG_IMM_V2INT16:
-  case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
-    return AMDGPU::getInlineEncodingV2I16(static_cast<uint32_t>(Imm))
-        .value_or(255);
+  Operands.push_back(AMDGPUOperand::CreateImm(this, Encoding, S,
+                                              AMDGPUOperand::ImmTyDim));
+  return ParseStatus::Success;
+}
 
-  case AMDGPU::OPERAND_REG_IMM_V2FP16:
-  case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
-    return AMDGPU::getInlineEncodingV2F16(static_cast<uint32_t>(Imm))
-        .value_or(255);
+//===----------------------------------------------------------------------===//
+// dpp
+//===----------------------------------------------------------------------===//
 
-  case AMDGPU::OPERAND_REG_IMM_V2FP16_SPLAT:
-    // V_PK_FMAC_F16 has different inline constant behavior on pre-GFX11 vs
-    // GFX11+: pre-GFX11 produces (f16, 0), GFX11+ duplicates f16 to both
-    // halves.
-    return AMDGPU::getPKFMACF16InlineEncoding(static_cast<uint32_t>(Imm),
-                                              AMDGPU::isGFX11Plus(STI))
-        .value_or(255);
+ParseStatus AMDGPUAsmParser::parseDPP8(OperandVector &Operands) {
+  SMLoc S = getLoc();
 
-  case AMDGPU::OPERAND_REG_IMM_V2BF16:
-  case AMDGPU::OPERAND_REG_INLINE_C_V2BF16:
-    return AMDGPU::getInlineEncodingV2BF16(static_cast<uint32_t>(Imm))
-        .value_or(255);
+  if (!isGFX10Plus() || !trySkipId("dpp8", AsmToken::Colon))
+    return ParseStatus::NoMatch;
 
-  case AMDGPU::OPERAND_REG_IMM_NOINLINE_V2FP16:
-    return 255;
+  // dpp8:[%d,%d,%d,%d,%d,%d,%d,%d]
 
-  case AMDGPU::OPERAND_KIMM32:
-  case AMDGPU::OPERAND_KIMM16:
-  case AMDGPU::OPERAND_KIMM64:
-    return Imm;
-  default:
-    llvm_unreachable("invalid operand size");
+  int64_t Sels[8];
+
+  if (!skipToken(AsmToken::LBrac, "expected an opening square bracket"))
+    return ParseStatus::Failure;
+
+  for (size_t i = 0; i < 8; ++i) {
+    if (i > 0 && !skipToken(AsmToken::Comma, "expected a comma"))
+      return ParseStatus::Failure;
+
+    SMLoc Loc = getLoc();
+    if (getParser().parseAbsoluteExpression(Sels[i]))
+      return ParseStatus::Failure;
+    if (0 > Sels[i] || 7 < Sels[i])
+      return Error(Loc, "expected a 3-bit value");
   }
+
+  if (!skipToken(AsmToken::RBrac, "expected a closing square bracket"))
+    return ParseStatus::Failure;
+
+  unsigned DPP8 = 0;
+  for (size_t i = 0; i < 8; ++i)
+    DPP8 |= (Sels[i] << (i * 3));
+
+  Operands.push_back(AMDGPUOperand::CreateImm(this, DPP8, S, AMDGPUOperand::ImmTyDPP8));
+  return ParseStatus::Success;
 }
 
-uint64_t AMDGPUMCCodeEmitter::getImplicitOpSelHiEncoding(int Opcode) const {
-  using namespace AMDGPU::VOP3PEncoding;
+bool
+AMDGPUAsmParser::isSupportedDPPCtrl(StringRef Ctrl,
+                                    const OperandVector &Operands) {
+  if (Ctrl == "row_newbcast")
+    return isGFX90A();
 
-  if (AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::op_sel_hi)) {
-    if (AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::src2))
-      return 0;
-    if (AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::src1))
-      return OP_SEL_HI_2;
-    if (AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::src0))
-      return OP_SEL_HI_1 | OP_SEL_HI_2;
-  }
-  return OP_SEL_HI_0 | OP_SEL_HI_1 | OP_SEL_HI_2;
-}
-
-void AMDGPUMCCodeEmitter::encodeInstruction(const MCInst &MI,
-                                            SmallVectorImpl<char> &CB,
-                                            SmallVectorImpl<MCFixup> &Fixups,
-                                            const MCSubtargetInfo &STI) const {
-  int Opcode = MI.getOpcode();
-  APInt Encoding, Scratch;
-  getBinaryCodeForInstr(MI, Fixups, Encoding, Scratch,  STI);
-  const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
-  unsigned bytes = Desc.getSize();
-
-  // Set unused op_sel_hi bits to 1 for VOP3P and MAI instructions.
-  // Note that accvgpr_read/write are MAI, have src0, but do not use op_sel.
-  if (((Desc.TSFlags & SIInstrFlags::VOP3P) ||
-       Opcode == AMDGPU::V_ACCVGPR_READ_B32_vi ||
-       Opcode == AMDGPU::V_ACCVGPR_WRITE_B32_vi) &&
-      // Matrix B format operand reuses op_sel_hi.
-      !AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::matrix_b_fmt) &&
-      // Matrix B scale operand reuses op_sel_hi.
-      !AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::matrix_b_scale) &&
-      // Matrix B reuse operand reuses op_sel_hi.
-      !AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::matrix_b_reuse)) {
-    Encoding |= getImplicitOpSelHiEncoding(Opcode);
-  }
-
-  for (unsigned i = 0; i < bytes; i++) {
-    CB.push_back((uint8_t)Encoding.extractBitsAsZExtValue(8, 8 * i));
-  }
-
-  // NSA encoding.
-  if (AMDGPU::isGFX10Plus(STI) && Desc.TSFlags & SIInstrFlags::MIMG) {
-    int vaddr0 = AMDGPU::getNamedOperandIdx(MI.getOpcode(),
-                                            AMDGPU::OpName::vaddr0);
-    int srsrc = AMDGPU::getNamedOperandIdx(MI.getOpcode(),
-                                           AMDGPU::OpName::srsrc);
-    assert(vaddr0 >= 0 && srsrc > vaddr0);
-    unsigned NumExtraAddrs = srsrc - vaddr0 - 1;
-    unsigned NumPadding = (-NumExtraAddrs) & 3;
-
-    for (unsigned i = 0; i < NumExtraAddrs; ++i) {
-      getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), Encoding, Fixups,
-                        STI);
-      CB.push_back((uint8_t)Encoding.getLimitedValue());
-    }
-    CB.append(NumPadding, 0);
-  }
-
-  if ((bytes > 8 && STI.hasFeature(AMDGPU::FeatureVOP3Literal)) ||
-      (bytes > 4 && !STI.hasFeature(AMDGPU::FeatureVOP3Literal)))
-    return;
+  if (Ctrl == "row_share" ||
+      Ctrl == "row_xmask")
+    return isGFX10Plus();
 
-  // Do not print literals from SISrc Operands for insts with mandatory literals
-  if (AMDGPU::hasNamedOperand(MI.getOpcode(), AMDGPU::OpName::imm))
-    return;
+  if (Ctrl == "wave_shl" ||
+      Ctrl == "wave_shr" ||
+      Ctrl == "wave_rol" ||
+      Ctrl == "wave_ror" ||
+      Ctrl == "row_bcast")
+    return isVI() || isGFX9();
 
-  // Check for additional literals
-  for (unsigned i = 0, e = Desc.getNumOperands(); i < e; ++i) {
+  return Ctrl == "row_mirror" ||
+         Ctrl == "row_half_mirror" ||
+         Ctrl == "quad_perm" ||
+         Ctrl == "row_shl" ||
+         Ctrl == "row_shr" ||
+         Ctrl == "row_ror";
+}
 
-    // Check if this operand should be encoded as [SV]Src
-    if (!AMDGPU::isSISrcOperand(Desc, i))
-      continue;
+int64_t
+AMDGPUAsmParser::parseDPPCtrlPerm() {
+  // quad_perm:[%d,%d,%d,%d]
 
-    // Is this operand a literal immediate?
-    const MCOperand &Op = MI.getOperand(i);
-    auto Enc = getLitEncoding(Desc, Op, i, STI);
-    if (!Enc || (*Enc != 255 && *Enc != 254))
-      continue;
+  if (!skipToken(AsmToken::LBrac, "expected an opening square bracket"))
+    return -1;
 
-    // Yes! Encode it
-    int64_t Imm = 0;
+  int64_t Val = 0;
+  for (int i = 0; i < 4; ++i) {
+    if (i > 0 && !skipToken(AsmToken::Comma, "expected a comma"))
+      return -1;
 
-    bool IsLit = false;
-    if (Op.isImm())
-      Imm = Op.getImm();
-    else if (Op.isExpr()) {
-      if (const auto *C = dyn_cast<MCConstantExpr>(Op.getExpr())) {
-        Imm = C->getValue();
-      } else if (AMDGPU::isLitExpr(Op.getExpr())) {
-        IsLit = true;
-        Imm = AMDGPU::getLitValue(Op.getExpr());
-      }
-    } else // Exprs will be replaced with a fixup value.
-      llvm_unreachable("Must be immediate or expr");
-
-    if (*Enc == 254) {
-      assert(STI.hasFeature(AMDGPU::Feature64BitLiterals));
-      support::endian::write<uint64_t>(CB, Imm, llvm::endianness::little);
-    } else {
-      auto OpType =
-          static_cast<AMDGPU::OperandType>(Desc.operands()[i].OperandType);
-      Imm = AMDGPU::encode32BitLiteral(Imm, OpType, IsLit);
-      support::endian::write<uint32_t>(CB, Imm, llvm::endianness::little);
+    int64_t Temp;
+    SMLoc Loc = getLoc();
+    if (getParser().parseAbsoluteExpression(Temp))
+      return -1;
+    if (Temp < 0 || Temp > 3) {
+      Error(Loc, "expected a 2-bit value");
+      return -1;
     }
 
-    // Only one literal value allowed
-    break;
+    Val += (Temp << i * 2);
   }
+
+  if (!skipToken(AsmToken::RBrac, "expected a closing square bracket"))
+    return -1;
+
+  return Val;
 }
 
-void AMDGPUMCCodeEmitter::getSOPPBrEncoding(const MCInst &MI, unsigned OpNo,
-                                            APInt &Op,
-                                            SmallVectorImpl<MCFixup> &Fixups,
-                                            const MCSubtargetInfo &STI) const {
-  const MCOperand &MO = MI.getOperand(OpNo);
+int64_t
+AMDGPUAsmParser::parseDPPCtrlSel(StringRef Ctrl) {
+  using namespace AMDGPU::DPP;
+
+  // sel:%d
+
+  int64_t Val;
+  SMLoc Loc = getLoc();
+
+  if (getParser().parseAbsoluteExpression(Val))
+    return -1;
+
+  struct DppCtrlCheck {
+    int64_t Ctrl;
+    int Lo;
+    int Hi;
+  };
+
+  DppCtrlCheck Check = StringSwitch<DppCtrlCheck>(Ctrl)
+    .Case("wave_shl",  {DppCtrl::WAVE_SHL1,       1,  1})
+    .Case("wave_rol",  {DppCtrl::WAVE_ROL1,       1,  1})
+    .Case("wave_shr",  {DppCtrl::WAVE_SHR1,       1,  1})
+    .Case("wave_ror",  {DppCtrl::WAVE_ROR1,       1,  1})
+    .Case("row_shl",   {DppCtrl::ROW_SHL0,        1, 15})
+    .Case("row_shr",   {DppCtrl::ROW_SHR0,        1, 15})
+    .Case("row_ror",   {DppCtrl::ROW_ROR0,        1, 15})
+    .Case("row_share", {DppCtrl::ROW_SHARE_FIRST, 0, 15})
+    .Case("row_xmask", {DppCtrl::ROW_XMASK_FIRST, 0, 15})
+    .Case("row_newbcast", {DppCtrl::ROW_NEWBCAST_FIRST, 0, 15})
+    .Default({-1, 0, 0});
 
-  if (MO.isExpr()) {
-    const MCExpr *Expr = MO.getExpr();
-    addFixup(Fixups, 0, Expr, AMDGPU::fixup_si_sopp_br, true);
-    Op = APInt::getZero(96);
+  bool Valid;
+  if (Check.Ctrl == -1) {
+    Valid = (Ctrl == "row_bcast" && (Val == 15 || Val == 31));
+    Val = (Val == 15)? DppCtrl::BCAST15 : DppCtrl::BCAST31;
   } else {
-    getMachineOpValue(MI, MO, Op, Fixups, STI);
+    Valid = Check.Lo <= Val && Val <= Check.Hi;
+    Val = (Check.Lo == Check.Hi) ? Check.Ctrl : (Check.Ctrl | Val);
   }
+
+  if (!Valid) {
+    Error(Loc, Twine("invalid ", Ctrl) + Twine(" value"));
+    return -1;
+  }
+
+  return Val;
 }
 
-void AMDGPUMCCodeEmitter::getSMEMOffsetEncoding(
-    const MCInst &MI, unsigned OpNo, APInt &Op,
-    SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
-  auto Offset = MI.getOperand(OpNo).getImm();
-  // VI only supports 20-bit unsigned offsets.
-  assert(!AMDGPU::isVI(STI) || isUInt<20>(Offset));
-  Op = Offset;
+ParseStatus AMDGPUAsmParser::parseDPPCtrl(OperandVector &Operands) {
+  using namespace AMDGPU::DPP;
+
+  if (!isToken(AsmToken::Identifier) ||
+      !isSupportedDPPCtrl(getTokenStr(), Operands))
+    return ParseStatus::NoMatch;
+
+  SMLoc S = getLoc();
+  int64_t Val = -1;
+  StringRef Ctrl;
+
+  parseId(Ctrl);
+
+  if (Ctrl == "row_mirror") {
+    Val = DppCtrl::ROW_MIRROR;
+  } else if (Ctrl == "row_half_mirror") {
+    Val = DppCtrl::ROW_HALF_MIRROR;
+  } else {
+    if (skipToken(AsmToken::Colon, "expected a colon")) {
+      if (Ctrl == "quad_perm") {
+        Val = parseDPPCtrlPerm();
+      } else {
+        Val = parseDPPCtrlSel(Ctrl);
+      }
+    }
+  }
+
+  if (Val == -1)
+    return ParseStatus::Failure;
+
+  Operands.push_back(
+    AMDGPUOperand::CreateImm(this, Val, S, AMDGPUOperand::ImmTyDppCtrl));
+  return ParseStatus::Success;
 }
 
-void AMDGPUMCCodeEmitter::getSDWASrcEncoding(const MCInst &MI, unsigned OpNo,
-                                             APInt &Op,
-                                             SmallVectorImpl<MCFixup> &Fixups,
-                                             const MCSubtargetInfo &STI) const {
-  using namespace AMDGPU::SDWA;
+void AMDGPUAsmParser::cvtVOP3DPP(MCInst &Inst, const OperandVector &Operands,
+                                 bool IsDPP8) {
+  OptionalImmIndexMap OptionalIdx;
+  unsigned Opc = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
+
+  // MAC instructions are special because they have 'old'
+  // operand which is not tied to dst (but assumed to be).
+  // They also have dummy unused src2_modifiers.
+  int OldIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::old);
+  int Src2ModIdx =
+      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2_modifiers);
+  bool IsMAC = OldIdx != -1 && Src2ModIdx != -1 &&
+               Desc.getOperandConstraint(OldIdx, MCOI::TIED_TO) == -1;
 
-  uint64_t RegEnc = 0;
+  unsigned I = 1;
+  for (unsigned J = 0; J < Desc.getNumDefs(); ++J) {
+    ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
+  }
 
-  const MCOperand &MO = MI.getOperand(OpNo);
+  int Fi = 0;
+  int VdstInIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst_in);
+  bool IsVOP3CvtSrDpp = Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_dpp8_gfx12 ||
+                        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_dpp8_gfx12 ||
+                        Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_dpp_gfx12 ||
+                        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_dpp_gfx12;
 
-  if (MO.isReg()) {
-    MCRegister Reg = MO.getReg();
-    RegEnc |= MRI.getEncodingValue(Reg);
-    RegEnc &= SDWA9EncValues::SRC_VGPR_MASK;
-    if (AMDGPU::isSGPR(AMDGPU::mc2PseudoReg(Reg), &MRI)) {
-      RegEnc |= SDWA9EncValues::SRC_SGPR_MASK;
+  for (unsigned E = Operands.size(); I != E; ++I) {
+
+    if (IsMAC) {
+      int NumOperands = Inst.getNumOperands();
+      if (OldIdx == NumOperands) {
+        // Handle old operand
+        constexpr int DST_IDX = 0;
+        Inst.addOperand(Inst.getOperand(DST_IDX));
+      } else if (Src2ModIdx == NumOperands) {
+        // Add unused dummy src2_modifiers
+        Inst.addOperand(MCOperand::createImm(0));
+      }
     }
-    Op = RegEnc;
-    return;
-  } else {
-    const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
-    auto Enc = getLitEncoding(Desc, MO, OpNo, STI);
-    if (Enc && *Enc != 255) {
-      Op = *Enc | SDWA9EncValues::SRC_SGPR_MASK;
-      return;
+
+    if (VdstInIdx == static_cast<int>(Inst.getNumOperands())) {
+      Inst.addOperand(Inst.getOperand(0));
+    }
+
+    if (IsVOP3CvtSrDpp) {
+      if (Src2ModIdx == static_cast<int>(Inst.getNumOperands())) {
+        Inst.addOperand(MCOperand::createImm(0));
+        Inst.addOperand(MCOperand::createReg(MCRegister()));
+      }
+    }
+
+    auto TiedTo = Desc.getOperandConstraint(Inst.getNumOperands(),
+                                            MCOI::TIED_TO);
+    if (TiedTo != -1) {
+      assert((unsigned)TiedTo < Inst.getNumOperands());
+      // handle tied old or src2 for MAC instructions
+      Inst.addOperand(Inst.getOperand(TiedTo));
+    }
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]);
+    // Add the register arguments
+    if (IsDPP8 && Op.isDppFI()) {
+      Fi = Op.getImm();
+    } else if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
+      Op.addRegOrImmWithFPInputModsOperands(Inst, 2);
+    } else if (Op.isReg()) {
+      Op.addRegOperands(Inst, 1);
+    } else if (Op.isImm() &&
+               Desc.operands()[Inst.getNumOperands()].RegClass != -1) {
+      Op.addImmOperands(Inst, 1);
+    } else if (Op.isImm()) {
+      OptionalIdx[Op.getImmTy()] = I;
+    } else {
+      llvm_unreachable("unhandled operand type");
     }
   }
 
-  llvm_unreachable("Unsupported operand kind");
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::clamp) && !IsVOP3CvtSrDpp)
+    addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                          AMDGPUOperand::ImmTyClamp);
+
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::byte_sel)) {
+    if (VdstInIdx == static_cast<int>(Inst.getNumOperands()))
+      Inst.addOperand(Inst.getOperand(0));
+    addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                          AMDGPUOperand::ImmTyByteSel);
+  }
+
+  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::omod))
+    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOModSI);
+
+  if (Desc.TSFlags & SIInstrFlags::VOP3P)
+    cvtVOP3P(Inst, Operands, OptionalIdx);
+  else if (Desc.TSFlags & SIInstrFlags::VOP3)
+    cvtVOP3OpSel(Inst, Operands, OptionalIdx);
+  else if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::op_sel)) {
+    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOpSel);
+  }
+
+  if (IsDPP8) {
+    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDPP8);
+    using namespace llvm::AMDGPU::DPP;
+    Inst.addOperand(MCOperand::createImm(Fi? DPP8_FI_1 : DPP8_FI_0));
+  } else {
+    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppCtrl, 0xe4);
+    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppRowMask, 0xf);
+    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppBankMask, 0xf);
+    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppBoundCtrl);
+
+    if (AMDGPU::hasNamedOperand(Inst.getOpcode(), AMDGPU::OpName::fi))
+      addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                            AMDGPUOperand::ImmTyDppFI);
+  }
 }
 
-void AMDGPUMCCodeEmitter::getSDWAVopcDstEncoding(
-    const MCInst &MI, unsigned OpNo, APInt &Op,
-    SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
-  using namespace AMDGPU::SDWA;
+void AMDGPUAsmParser::cvtDPP(MCInst &Inst, const OperandVector &Operands, bool IsDPP8) {
+  OptionalImmIndexMap OptionalIdx;
+
+  unsigned I = 1;
+  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
+  for (unsigned J = 0; J < Desc.getNumDefs(); ++J) {
+    ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
+  }
 
-  uint64_t RegEnc = 0;
+  int Fi = 0;
+  for (unsigned E = Operands.size(); I != E; ++I) {
+    auto TiedTo = Desc.getOperandConstraint(Inst.getNumOperands(),
+                                            MCOI::TIED_TO);
+    if (TiedTo != -1) {
+      assert((unsigned)TiedTo < Inst.getNumOperands());
+      // handle tied old or src2 for MAC instructions
+      Inst.addOperand(Inst.getOperand(TiedTo));
+    }
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]);
+    // Add the register arguments
+    if (Op.isReg() && validateVccOperand(Op.getReg())) {
+      // VOP2b (v_add_u32, v_sub_u32 ...) dpp use "vcc" token.
+      // Skip it.
+      continue;
+    }
 
-  const MCOperand &MO = MI.getOperand(OpNo);
+    if (IsDPP8) {
+      if (Op.isDPP8()) {
+        Op.addImmOperands(Inst, 1);
+      } else if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
+        Op.addRegWithFPInputModsOperands(Inst, 2);
+      } else if (Op.isDppFI()) {
+        Fi = Op.getImm();
+      } else if (Op.isReg()) {
+        Op.addRegOperands(Inst, 1);
+      } else {
+        llvm_unreachable("Invalid operand type");
+      }
+    } else {
+      if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
+        Op.addRegWithFPInputModsOperands(Inst, 2);
+      } else if (Op.isReg()) {
+        Op.addRegOperands(Inst, 1);
+      } else if (Op.isDPPCtrl()) {
+        Op.addImmOperands(Inst, 1);
+      } else if (Op.isImm()) {
+        // Handle optional arguments
+        OptionalIdx[Op.getImmTy()] = I;
+      } else {
+        llvm_unreachable("Invalid operand type");
+      }
+    }
+  }
 
-  MCRegister Reg = MO.getReg();
-  if (Reg != AMDGPU::VCC && Reg != AMDGPU::VCC_LO) {
-    RegEnc |= MRI.getEncodingValue(Reg);
-    RegEnc &= SDWA9EncValues::VOPC_DST_SGPR_MASK;
-    RegEnc |= SDWA9EncValues::VOPC_DST_VCC_MASK;
+  if (IsDPP8) {
+    using namespace llvm::AMDGPU::DPP;
+    Inst.addOperand(MCOperand::createImm(Fi? DPP8_FI_1 : DPP8_FI_0));
+  } else {
+    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppRowMask, 0xf);
+    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppBankMask, 0xf);
+    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppBoundCtrl);
+    if (AMDGPU::hasNamedOperand(Inst.getOpcode(), AMDGPU::OpName::fi)) {
+      addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                            AMDGPUOperand::ImmTyDppFI);
+    }
   }
-  Op = RegEnc;
 }
 
-void AMDGPUMCCodeEmitter::getAVOperandEncoding(
-    const MCInst &MI, unsigned OpNo, APInt &Op,
-    SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
-  MCRegister Reg = MI.getOperand(OpNo).getReg();
-  unsigned Enc = MRI.getEncodingValue(Reg);
-  unsigned Idx = Enc & AMDGPU::HWEncoding::LO256_REG_IDX_MASK;
-  bool IsVGPROrAGPR =
-      Enc & (AMDGPU::HWEncoding::IS_VGPR | AMDGPU::HWEncoding::IS_AGPR);
+//===----------------------------------------------------------------------===//
+// sdwa
+//===----------------------------------------------------------------------===//
+
+ParseStatus AMDGPUAsmParser::parseSDWASel(OperandVector &Operands,
+                                          StringRef Prefix,
+                                          AMDGPUOperand::ImmTy Type) {
+  return parseStringOrIntWithPrefix(
+      Operands, Prefix,
+      {"BYTE_0", "BYTE_1", "BYTE_2", "BYTE_3", "WORD_0", "WORD_1", "DWORD"},
+      Type);
+}
+
+ParseStatus AMDGPUAsmParser::parseSDWADstUnused(OperandVector &Operands) {
+  return parseStringOrIntWithPrefix(
+      Operands, "dst_unused", {"UNUSED_PAD", "UNUSED_SEXT", "UNUSED_PRESERVE"},
+      AMDGPUOperand::ImmTySDWADstUnused);
+}
+
+void AMDGPUAsmParser::cvtSdwaVOP1(MCInst &Inst, const OperandVector &Operands) {
+  cvtSDWA(Inst, Operands, SIInstrFlags::VOP1);
+}
+
+void AMDGPUAsmParser::cvtSdwaVOP2(MCInst &Inst, const OperandVector &Operands) {
+  cvtSDWA(Inst, Operands, SIInstrFlags::VOP2);
+}
+
+void AMDGPUAsmParser::cvtSdwaVOP2b(MCInst &Inst, const OperandVector &Operands) {
+  cvtSDWA(Inst, Operands, SIInstrFlags::VOP2, true, true);
+}
 
-  // VGPR and AGPR have the same encoding, but SrcA and SrcB operands of mfma
-  // instructions use acc[0:1] modifier bits to distinguish. These bits are
-  // encoded as a virtual 9th bit of the register for these operands.
-  bool IsAGPR = Enc & AMDGPU::HWEncoding::IS_AGPR;
+void AMDGPUAsmParser::cvtSdwaVOP2e(MCInst &Inst, const OperandVector &Operands) {
+  cvtSDWA(Inst, Operands, SIInstrFlags::VOP2, false, true);
+}
 
-  Op = Idx | (IsVGPROrAGPR << 8) | (IsAGPR << 9);
+void AMDGPUAsmParser::cvtSdwaVOPC(MCInst &Inst, const OperandVector &Operands) {
+  cvtSDWA(Inst, Operands, SIInstrFlags::VOPC, isVI());
 }
 
-static bool needsPCRel(const MCExpr *Expr) {
-  switch (Expr->getKind()) {
-  case MCExpr::SymbolRef: {
-    auto *SE = cast<MCSymbolRefExpr>(Expr);
-    auto Spec = AMDGPU::getSpecifier(SE);
-    return Spec != AMDGPUMCExpr::S_ABS32_LO &&
-           Spec != AMDGPUMCExpr::S_ABS32_HI && Spec != AMDGPUMCExpr::S_ABS64;
+void AMDGPUAsmParser::cvtSDWA(MCInst &Inst, const OperandVector &Operands,
+                              uint64_t BasicInstType,
+                              bool SkipDstVcc,
+                              bool SkipSrcVcc) {
+  using namespace llvm::AMDGPU::SDWA;
+
+  OptionalImmIndexMap OptionalIdx;
+  bool SkipVcc = SkipDstVcc || SkipSrcVcc;
+  bool SkippedVcc = false;
+
+  unsigned I = 1;
+  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
+  for (unsigned J = 0; J < Desc.getNumDefs(); ++J) {
+    ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
   }
-  case MCExpr::Binary: {
-    auto *BE = cast<MCBinaryExpr>(Expr);
-    if (BE->getOpcode() == MCBinaryExpr::Sub)
-      return false;
-    return needsPCRel(BE->getLHS()) || needsPCRel(BE->getRHS());
+
+  for (unsigned E = Operands.size(); I != E; ++I) {
+    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]);
+    if (SkipVcc && !SkippedVcc && Op.isReg() &&
+        (Op.getReg() == AMDGPU::VCC || Op.getReg() == AMDGPU::VCC_LO)) {
+      // VOP2b (v_add_u32, v_sub_u32 ...) sdwa use "vcc" token as dst.
+      // Skip it if it's 2nd (e.g. v_add_i32_sdwa v1, vcc, v2, v3)
+      // or 4th (v_addc_u32_sdwa v1, vcc, v2, v3, vcc) operand.
+      // Skip VCC only if we didn't skip it on previous iteration.
+      // Note that src0 and src1 occupy 2 slots each because of modifiers.
+      if (BasicInstType == SIInstrFlags::VOP2 &&
+          ((SkipDstVcc && Inst.getNumOperands() == 1) ||
+           (SkipSrcVcc && Inst.getNumOperands() == 5))) {
+        SkippedVcc = true;
+        continue;
+      }
+      if (BasicInstType == SIInstrFlags::VOPC && Inst.getNumOperands() == 0) {
+        SkippedVcc = true;
+        continue;
+      }
+    }
+    if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
+      Op.addRegOrImmWithInputModsOperands(Inst, 2);
+    } else if (Op.isImm()) {
+      // Handle optional arguments
+      OptionalIdx[Op.getImmTy()] = I;
+    } else {
+      llvm_unreachable("Invalid operand type");
+    }
+    SkippedVcc = false;
   }
-  case MCExpr::Unary:
-    return needsPCRel(cast<MCUnaryExpr>(Expr)->getSubExpr());
-  case MCExpr::Specifier:
-  case MCExpr::Target:
-  case MCExpr::Constant:
-    return false;
+
+  const unsigned Opc = Inst.getOpcode();
+  if (Opc != AMDGPU::V_NOP_sdwa_gfx10 && Opc != AMDGPU::V_NOP_sdwa_gfx9 &&
+      Opc != AMDGPU::V_NOP_sdwa_vi) {
+    // v_nop_sdwa_sdwa_vi/gfx9 has no optional sdwa arguments
+    switch (BasicInstType) {
+    case SIInstrFlags::VOP1:
+      if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::clamp))
+        addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                              AMDGPUOperand::ImmTyClamp, 0);
+
+      if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::omod))
+        addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                              AMDGPUOperand::ImmTyOModSI, 0);
+
+      if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::dst_sel))
+        addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                              AMDGPUOperand::ImmTySDWADstSel, SdwaSel::DWORD);
+
+      if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::dst_unused))
+        addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                              AMDGPUOperand::ImmTySDWADstUnused,
+                              DstUnused::UNUSED_PRESERVE);
+
+      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWASrc0Sel, SdwaSel::DWORD);
+      break;
+
+    case SIInstrFlags::VOP2:
+      addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                            AMDGPUOperand::ImmTyClamp, 0);
+
+      if (AMDGPU::hasNamedOperand(Inst.getOpcode(), AMDGPU::OpName::omod))
+        addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOModSI, 0);
+
+      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWADstSel, SdwaSel::DWORD);
+      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWADstUnused, DstUnused::UNUSED_PRESERVE);
+      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWASrc0Sel, SdwaSel::DWORD);
+      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWASrc1Sel, SdwaSel::DWORD);
+      break;
+
+    case SIInstrFlags::VOPC:
+      if (AMDGPU::hasNamedOperand(Inst.getOpcode(), AMDGPU::OpName::clamp))
+        addOptionalImmOperand(Inst, Operands, OptionalIdx,
+                              AMDGPUOperand::ImmTyClamp, 0);
+      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWASrc0Sel, SdwaSel::DWORD);
+      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWASrc1Sel, SdwaSel::DWORD);
+      break;
+
+    default:
+      llvm_unreachable("Invalid instruction type. Only VOP1, VOP2 and VOPC allowed");
+    }
   }
-  llvm_unreachable("invalid kind");
-}
 
-void AMDGPUMCCodeEmitter::getMachineOpValue(const MCInst &MI,
-                                            const MCOperand &MO, APInt &Op,
-                                            SmallVectorImpl<MCFixup> &Fixups,
-                                            const MCSubtargetInfo &STI) const {
-  if (MO.isReg()){
-    unsigned Enc = MRI.getEncodingValue(MO.getReg());
-    unsigned Idx = Enc & AMDGPU::HWEncoding::LO256_REG_IDX_MASK;
-    bool IsVGPROrAGPR =
-        Enc & (AMDGPU::HWEncoding::IS_VGPR | AMDGPU::HWEncoding::IS_AGPR);
-    Op = Idx | (IsVGPROrAGPR << 8);
-    return;
+  // special case v_mac_{f16, f32}:
+  // it has src2 register operand that is tied to dst operand
+  if (Inst.getOpcode() == AMDGPU::V_MAC_F32_sdwa_vi ||
+      Inst.getOpcode() == AMDGPU::V_MAC_F16_sdwa_vi)  {
+    auto *it = Inst.begin();
+    std::advance(
+      it, AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::src2));
+    Inst.insert(it, Inst.getOperand(0)); // src2 = dst
   }
-  unsigned OpNo = &MO - MI.begin();
-  getMachineOpValueCommon(MI, MO, OpNo, Op, Fixups, STI);
 }
 
-void AMDGPUMCCodeEmitter::getMachineOpValueT16(
-    const MCInst &MI, unsigned OpNo, APInt &Op,
-    SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
-  const MCOperand &MO = MI.getOperand(OpNo);
-  if (MO.isReg()) {
-    unsigned Enc = MRI.getEncodingValue(MO.getReg());
-    unsigned Idx = Enc & AMDGPU::HWEncoding::REG_IDX_MASK;
-    bool IsVGPR = Enc & AMDGPU::HWEncoding::IS_VGPR;
-    Op = Idx | (IsVGPR << 8);
-    return;
-  }
-  getMachineOpValueCommon(MI, MO, OpNo, Op, Fixups, STI);
-  // VGPRs include the suffix/op_sel bit in the register encoding, but
-  // immediates and SGPRs include it in src_modifiers. Therefore, copy the
-  // op_sel bit from the src operands into src_modifier operands if Op is
-  // src_modifiers and the corresponding src is a VGPR
-  int SrcMOIdx = -1;
-  assert(OpNo < INT_MAX);
-  if ((int)OpNo == AMDGPU::getNamedOperandIdx(MI.getOpcode(),
-                                              AMDGPU::OpName::src0_modifiers)) {
-    SrcMOIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0);
-    int VDstMOIdx =
-        AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vdst);
-    if (VDstMOIdx != -1) {
-      auto DstReg = MI.getOperand(VDstMOIdx).getReg();
-      if (AMDGPU::isHi16Reg(DstReg, MRI))
-        Op |= SISrcMods::DST_OP_SEL;
-    }
-  } else if ((int)OpNo == AMDGPU::getNamedOperandIdx(
-                              MI.getOpcode(), AMDGPU::OpName::src1_modifiers))
-    SrcMOIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src1);
-  else if ((int)OpNo == AMDGPU::getNamedOperandIdx(
-                            MI.getOpcode(), AMDGPU::OpName::src2_modifiers))
-    SrcMOIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src2);
-  if (SrcMOIdx == -1)
-    return;
+/// Force static initialization.
+extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void
+LLVMInitializeAMDGPUAsmParser() {
+  RegisterMCAsmParser<AMDGPUAsmParser> A(getTheR600Target());
+  RegisterMCAsmParser<AMDGPUAsmParser> B(getTheGCNTarget());
+}
 
-  const MCOperand &SrcMO = MI.getOperand(SrcMOIdx);
-  if (!SrcMO.isReg())
-    return;
-  auto SrcReg = SrcMO.getReg();
-  if (AMDGPU::isSGPR(SrcReg, &MRI))
-    return;
-  if (AMDGPU::isHi16Reg(SrcReg, MRI))
-    Op |= SISrcMods::OP_SEL_0;
+#define GET_MATCHER_IMPLEMENTATION
+#define GET_MNEMONIC_SPELL_CHECKER
+#define GET_MNEMONIC_CHECKER
+#include "AMDGPUGenAsmMatcher.inc"
+
+ParseStatus AMDGPUAsmParser::parseCustomOperand(OperandVector &Operands,
+                                                unsigned MCK) {
+  switch (MCK) {
+  case MCK_addr64:
+    return parseTokenOp("addr64", Operands);
+  case MCK_done:
+    return parseNamedBit("done", Operands, AMDGPUOperand::ImmTyDone, true);
+  case MCK_idxen:
+    return parseTokenOp("idxen", Operands);
+  case MCK_lds:
+    return parseTokenOp("lds", Operands);
+  case MCK_offen:
+    return parseTokenOp("offen", Operands);
+  case MCK_off:
+    return parseTokenOp("off", Operands);
+  case MCK_row_95_en:
+    return parseNamedBit("row_en", Operands, AMDGPUOperand::ImmTyRowEn, true);
+  case MCK_gds:
+    return parseNamedBit("gds", Operands, AMDGPUOperand::ImmTyGDS);
+  case MCK_tfe:
+    return parseNamedBit("tfe", Operands, AMDGPUOperand::ImmTyTFE);
+  }
+  return tryCustomParseOperand(Operands, MCK);
 }
 
-void AMDGPUMCCodeEmitter::getMachineOpValueT16Lo128(
-    const MCInst &MI, unsigned OpNo, APInt &Op,
-    SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
-  const MCOperand &MO = MI.getOperand(OpNo);
-  if (MO.isReg()) {
-    uint16_t Encoding = MRI.getEncodingValue(MO.getReg());
-    unsigned RegIdx = Encoding & AMDGPU::HWEncoding::LO256_REG_IDX_MASK;
-    bool IsHi = Encoding & AMDGPU::HWEncoding::IS_HI16;
-    bool IsVGPR = Encoding & AMDGPU::HWEncoding::IS_VGPR;
-    assert((!IsVGPR || isUInt<7>(RegIdx)) && "VGPR0-VGPR127 expected!");
-    Op = (IsVGPR ? 0x100 : 0) | (IsHi ? 0x80 : 0) | RegIdx;
-    return;
+// This function should be defined after auto-generated include so that we have
+// MatchClassKind enum defined
+unsigned AMDGPUAsmParser::validateTargetOperandClass(MCParsedAsmOperand &Op,
+                                                     unsigned Kind) {
+  // Tokens like "glc" would be parsed as immediate operands in ParseOperand().
+  // But MatchInstructionImpl() expects to meet token and fails to validate
+  // operand. This method checks if we are given immediate operand but expect to
+  // get corresponding token.
+  AMDGPUOperand &Operand = (AMDGPUOperand&)Op;
+  switch (Kind) {
+  case MCK_addr64:
+    return Operand.isAddr64() ? Match_Success : Match_InvalidOperand;
+  case MCK_gds:
+    return Operand.isGDS() ? Match_Success : Match_InvalidOperand;
+  case MCK_lds:
+    return Operand.isLDS() ? Match_Success : Match_InvalidOperand;
+  case MCK_idxen:
+    return Operand.isIdxen() ? Match_Success : Match_InvalidOperand;
+  case MCK_offen:
+    return Operand.isOffen() ? Match_Success : Match_InvalidOperand;
+  case MCK_tfe:
+    return Operand.isTFE() ? Match_Success : Match_InvalidOperand;
+  case MCK_done:
+    return Operand.isDone() ? Match_Success : Match_InvalidOperand;
+  case MCK_row_95_en:
+    return Operand.isRowEn() ? Match_Success : Match_InvalidOperand;
+  case MCK_SSrc_b32:
+    // When operands have expression values, they will return true for isToken,
+    // because it is not possible to distinguish between a token and an
+    // expression at parse time. MatchInstructionImpl() will always try to
+    // match an operand as a token, when isToken returns true, and when the
+    // name of the expression is not a valid token, the match will fail,
+    // so we need to handle it here.
+    return Operand.isSSrc_b32() ? Match_Success : Match_InvalidOperand;
+  case MCK_SSrc_f32:
+    return Operand.isSSrc_f32() ? Match_Success : Match_InvalidOperand;
+  case MCK_SOPPBrTarget:
+    return Operand.isSOPPBrTarget() ? Match_Success : Match_InvalidOperand;
+  case MCK_VReg32OrOff:
+    return Operand.isVReg32OrOff() ? Match_Success : Match_InvalidOperand;
+  case MCK_InterpSlot:
+    return Operand.isInterpSlot() ? Match_Success : Match_InvalidOperand;
+  case MCK_InterpAttr:
+    return Operand.isInterpAttr() ? Match_Success : Match_InvalidOperand;
+  case MCK_InterpAttrChan:
+    return Operand.isInterpAttrChan() ? Match_Success : Match_InvalidOperand;
+  case MCK_SReg_64:
+  case MCK_SReg_64_XEXEC:
+    // Null is defined as a 32-bit register but
+    // it should also be enabled with 64-bit operands or larger.
+    // The following code enables it for SReg_64 and larger operands
+    // used as source and destination. Remaining source
+    // operands are handled in isInlinableImm.
+  case MCK_SReg_96:
+  case MCK_SReg_128:
+  case MCK_SReg_256:
+  case MCK_SReg_512:
+    return Operand.isNull() ? Match_Success : Match_InvalidOperand;
+  default:
+    return Match_InvalidOperand;
   }
-  getMachineOpValueCommon(MI, MO, OpNo, Op, Fixups, STI);
 }
 
-void AMDGPUMCCodeEmitter::getMachineOpValueCommon(
-    const MCInst &MI, const MCOperand &MO, unsigned OpNo, APInt &Op,
-    SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
-  bool isLikeImm = false;
-  int64_t Val;
+//===----------------------------------------------------------------------===//
+// endpgm
+//===----------------------------------------------------------------------===//
 
-  if (MO.isImm()) {
-    Val = MO.getImm();
-    isLikeImm = true;
-  } else if (MO.isExpr() && MO.getExpr()->evaluateAsAbsolute(Val)) {
-    isLikeImm = true;
-  } else if (MO.isExpr()) {
-    // FIXME: If this is expression is PCRel or not should not depend on what
-    // the expression looks like. Given that this is just a general expression,
-    // it should probably be FK_Data_4 and whatever is producing
-    //
-    //    s_add_u32 s2, s2, (extern_const_addrspace+16
-    //
-    // And expecting a PCRel should instead produce
-    //
-    // .Ltmp1:
-    //   s_add_u32 s2, s2, (extern_const_addrspace+16)-.Ltmp1
-    bool PCRel = needsPCRel(MO.getExpr());
-    const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
-    uint32_t Offset = Desc.getSize();
-    assert(Offset == 4 || Offset == 8);
-    unsigned Size = AMDGPU::getOperandSize(Desc, OpNo);
-    MCFixupKind Kind = MCFixup::getDataKindForSize(Size);
-    addFixup(Fixups, Offset, MO.getExpr(), Kind, PCRel);
-  }
-
-  const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
-  if (AMDGPU::isSISrcOperand(Desc, OpNo)) {
-    bool HasMandatoryLiteral =
-        AMDGPU::hasNamedOperand(MI.getOpcode(), AMDGPU::OpName::imm);
-    if (auto Enc = getLitEncoding(Desc, MO, OpNo, STI, HasMandatoryLiteral)) {
-      Op = *Enc;
-      return;
-    }
+ParseStatus AMDGPUAsmParser::parseEndpgm(OperandVector &Operands) {
+  SMLoc S = getLoc();
+  int64_t Imm = 0;
 
-    llvm_unreachable("Operand not supported for SISrc");
+  if (!parseExpr(Imm)) {
+    // The operand is optional, if not present default to 0
+    Imm = 0;
   }
 
-  if (isLikeImm) {
-    Op = Val;
-    return;
-  }
+  if (!isUInt<16>(Imm))
+    return Error(S, "expected a 16-bit value");
+
+  Operands.push_back(
+      AMDGPUOperand::CreateImm(this, Imm, S, AMDGPUOperand::ImmTyEndpgm));
+  return ParseStatus::Success;
+}
+
+bool AMDGPUOperand::isEndpgm() const { return isImmTy(ImmTyEndpgm); }
+
+//===----------------------------------------------------------------------===//
+// Split Barrier
+//===----------------------------------------------------------------------===//
 
-  llvm_unreachable("Encoding of this operand type is not supported yet.");
-}
-
-template <bool HasSrc0, bool HasSrc1, bool HasSrc2>
-APInt AMDGPUMCCodeEmitter::postEncodeVOP3(const MCInst &MI, APInt EncodedValue,
-                                          const MCSubtargetInfo &STI) const {
-  if (!AMDGPU::isGFX10Plus(STI))
-    return EncodedValue;
-  // Set unused source fields in VOP3 encodings to inline immediate 0 to avoid
-  // hardware conservatively assuming the instruction reads SGPRs.
-  constexpr uint64_t InlineImmediate0 = 0x80;
-  if (!HasSrc0)
-    EncodedValue |= InlineImmediate0 << 32;
-  if (!HasSrc1)
-    EncodedValue |= InlineImmediate0 << 41;
-  if (!HasSrc2)
-    EncodedValue |= InlineImmediate0 << 50;
-  return EncodedValue;
-}
-
-APInt AMDGPUMCCodeEmitter::postEncodeVOPCX(const MCInst &MI, APInt EncodedValue,
-                                           const MCSubtargetInfo &STI) const {
-  // GFX10+ v_cmpx opcodes promoted to VOP3 have implied dst=EXEC.
-  // Documentation requires dst to be encoded as EXEC (0x7E),
-  // but it looks like the actual value encoded for dst operand
-  // is ignored by HW. It was decided to define dst as "do not care"
-  // in td files to allow disassembler accept any dst value.
-  // However, dst is encoded as EXEC for compatibility with SP3.
-  [[maybe_unused]] const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
-  assert((Desc.TSFlags & SIInstrFlags::VOP3) &&
-         Desc.hasImplicitDefOfPhysReg(AMDGPU::EXEC));
-  EncodedValue |= MRI.getEncodingValue(AMDGPU::EXEC_LO) &
-                  AMDGPU::HWEncoding::LO256_REG_IDX_MASK;
-  return postEncodeVOP3<true, true, false>(MI, EncodedValue, STI);
-}
-
-#include "AMDGPUGenMCCodeEmitter.inc"
+bool AMDGPUOperand::isSplitBarrier() const { return isInlinableImm(MVT::i32); }

>From 56973728963ac35fb961a9db36f610950fd4946f Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 15 Mar 2026 01:02:09 +0530
Subject: [PATCH 52/55] Update AMDGPUAsmParser.cpp

---
 llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 66ba5f2eb73df..b420ffab41022 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -2054,8 +2054,8 @@ static const fltSemantics *getOpFltSemantics(uint8_t OperandType) {
   case AMDGPU::OPERAND_KIMM32:
   case AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32:
     return &APFloat::IEEEsingle();
-  case AMDGPU::OPERAND_REG_IMM_INT64:
-  case AMDGPU::OPERAND_REG_IMM_B64:
+  case AMDGPU::OPERAND_REG_IMM_I64:
+  case AMDGPU::OPERAND_REG_IMM_U64:
   case AMDGPU::OPERAND_REG_IMM_FP64:
   case AMDGPU::OPERAND_REG_INLINE_C_INT64:
   case AMDGPU::OPERAND_REG_INLINE_C_FP64:
@@ -2375,8 +2375,8 @@ void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyMo
 
   if (Imm.IsFPImm) { // We got fp literal token
     switch (OpTy) {
-    case AMDGPU::OPERAND_REG_IMM_INT64:
-    case AMDGPU::OPERAND_REG_IMM_B64:
+    case AMDGPU::OPERAND_REG_IMM_I64:
+    case AMDGPU::OPERAND_REG_IMM_U64:
     case AMDGPU::OPERAND_REG_IMM_FP64:
     case AMDGPU::OPERAND_REG_INLINE_C_INT64:
     case AMDGPU::OPERAND_REG_INLINE_C_FP64:
@@ -2512,8 +2512,8 @@ void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyMo
   case AMDGPU::OPERAND_REG_IMM_NOINLINE_V2FP16:
     break;
 
-  case AMDGPU::OPERAND_REG_IMM_INT64:
-  case AMDGPU::OPERAND_REG_IMM_B64:
+  case AMDGPU::OPERAND_REG_IMM_I64:
+  case AMDGPU::OPERAND_REG_IMM_U64:
   case AMDGPU::OPERAND_REG_INLINE_C_INT64:
     if (Lit == LitModifier::None &&
         AMDGPU::isInlinableLiteral64(Val, AsmParser->hasInv2PiInlineImm())) {

>From 790f1940aa523a3edf02732e8c02ec9fb3ff62bf Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 15 Mar 2026 01:04:11 +0530
Subject: [PATCH 53/55] Update AMDGPUDisassembler.cpp

---
 .../lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
index 569cf759364f0..f8266b1c4185e 100644
--- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -549,8 +549,8 @@ void AMDGPUDisassembler::decodeImmOperands(MCInst &MI,
         break;
       }
       case AMDGPU::OPERAND_REG_IMM_FP64:
-      case AMDGPU::OPERAND_REG_IMM_INT64:
-      case AMDGPU::OPERAND_REG_IMM_B64:
+      case AMDGPU::OPERAND_REG_IMM_I64:
+      case AMDGPU::OPERAND_REG_IMM_U64:
       case AMDGPU::OPERAND_REG_INLINE_AC_FP64:
       case AMDGPU::OPERAND_REG_INLINE_C_FP64:
       case AMDGPU::OPERAND_REG_INLINE_C_INT64:
@@ -1683,8 +1683,8 @@ AMDGPUDisassembler::decodeLiteralConstant(const MCInstrDesc &Desc,
   case AMDGPU::OPERAND_REG_INLINE_AC_FP64:
     Val <<= 32;
     break;
-  case AMDGPU::OPERAND_REG_IMM_INT64:
-  case AMDGPU::OPERAND_REG_IMM_B64:
+  case AMDGPU::OPERAND_REG_IMM_I64:
+  case AMDGPU::OPERAND_REG_IMM_U64:
   case AMDGPU::OPERAND_REG_INLINE_C_INT64:
     UseLit = AMDGPU::isInlinableLiteral64(Val, HasInv2Pi);
     break;

>From cd3e2bb380b091f7b2ad438954f3a755c7382e8a Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 15 Mar 2026 01:05:26 +0530
Subject: [PATCH 54/55] Update AMDGPUInstPrinter.cpp

---
 llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
index 0d2f48cd4ffdd..4e56cade4808b 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -871,8 +871,8 @@ void AMDGPUInstPrinter::printRegularOperand(const MCInst *MI, unsigned OpNo,
     case AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32:
       printImmediate32(Op.getImm(), STI, O);
       break;
-    case AMDGPU::OPERAND_REG_IMM_INT64:
-    case AMDGPU::OPERAND_REG_IMM_B64:
+    case AMDGPU::OPERAND_REG_IMM_I64:
+    case AMDGPU::OPERAND_REG_IMM_U64:
     case AMDGPU::OPERAND_REG_INLINE_C_INT64:
       printImmediate64(Op.getImm(), STI, O, false);
       break;

>From bf89838c206685ca8d9d0054fc5081da3e6da2ae Mon Sep 17 00:00:00 2001
From: Addmisol <addmisol9 at gmail.com>
Date: Sun, 15 Mar 2026 01:09:10 +0530
Subject: [PATCH 55/55] Update AMDGPUMCCodeEmitter.cpp

---
 .../MCTargetDesc/AMDGPUMCCodeEmitter.cpp      | 11120 +---------------
 1 file changed, 637 insertions(+), 10483 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
index b420ffab41022..ce970802cdb21 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
@@ -1,10630 +1,784 @@
-//===- AMDGPUAsmParser.cpp - Parse SI asm to MCInst instructions ----------===//
+//===-- AMDGPUMCCodeEmitter.cpp - AMDGPU Code Emitter ---------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
+//
+/// \file
+/// The AMDGPU code emitter produces machine code that can be executed
+/// directly on the GPU device.
+//
+//===----------------------------------------------------------------------===//
 
-#include "AMDKernelCodeT.h"
-#include "MCTargetDesc/AMDGPUInstPrinter.h"
-#include "MCTargetDesc/AMDGPUMCAsmInfo.h"
-#include "MCTargetDesc/AMDGPUMCExpr.h"
-#include "MCTargetDesc/AMDGPUMCKernelDescriptor.h"
-#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
-#include "MCTargetDesc/AMDGPUTargetStreamer.h"
-#include "SIDefines.h"
-#include "SIInstrInfo.h"
-#include "TargetInfo/AMDGPUTargetInfo.h"
-#include "Utils/AMDGPUAsmUtils.h"
-#include "Utils/AMDGPUBaseInfo.h"
-#include "Utils/AMDKernelCodeTUtils.h"
-#include "llvm/ADT/APFloat.h"
-#include "llvm/ADT/SmallBitVector.h"
-#include "llvm/ADT/StringSet.h"
-#include "llvm/ADT/Twine.h"
-#include "llvm/BinaryFormat/ELF.h"
-#include "llvm/CodeGenTypes/MachineValueType.h"
-#include "llvm/MC/MCAsmInfo.h"
-#include "llvm/MC/MCContext.h"
-#include "llvm/MC/MCExpr.h"
-#include "llvm/MC/MCInst.h"
-#include "llvm/MC/MCInstrDesc.h"
-#include "llvm/MC/MCParser/AsmLexer.h"
-#include "llvm/MC/MCParser/MCAsmParser.h"
-#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
-#include "llvm/MC/MCParser/MCTargetAsmParser.h"
-#include "llvm/MC/MCRegisterInfo.h"
-#include "llvm/MC/MCSymbol.h"
-#include "llvm/MC/TargetRegistry.h"
-#include "llvm/Support/AMDGPUMetadata.h"
-#include "llvm/Support/AMDHSAKernelDescriptor.h"
-#include "llvm/Support/Casting.h"
-#include "llvm/Support/Compiler.h"
-#include "llvm/Support/MathExtras.h"
-#include "llvm/TargetParser/TargetParser.h"
-#include <optional>
-
-using namespace llvm;
-using namespace llvm::AMDGPU;
-using namespace llvm::amdhsa;
-
-namespace {
-
-class AMDGPUAsmParser;
-
-enum RegisterKind { IS_UNKNOWN, IS_VGPR, IS_SGPR, IS_AGPR, IS_TTMP, IS_SPECIAL };
-
-//===----------------------------------------------------------------------===//
-// Operand
-//===----------------------------------------------------------------------===//
-
-class AMDGPUOperand : public MCParsedAsmOperand {
-  enum KindTy {
-    Token,
-    Immediate,
-    Register,
-    Expression
-  } Kind;
-
-  SMLoc StartLoc, EndLoc;
-  const AMDGPUAsmParser *AsmParser;
-
-public:
-  AMDGPUOperand(KindTy Kind_, const AMDGPUAsmParser *AsmParser_)
-      : Kind(Kind_), AsmParser(AsmParser_) {}
-
-  using Ptr = std::unique_ptr<AMDGPUOperand>;
-
-  struct Modifiers {
-    bool Abs = false;
-    bool Neg = false;
-    bool Sext = false;
-    LitModifier Lit = LitModifier::None;
-
-    bool hasFPModifiers() const { return Abs || Neg; }
-    bool hasIntModifiers() const { return Sext; }
-    bool hasModifiers() const { return hasFPModifiers() || hasIntModifiers(); }
-
-    int64_t getFPModifiersOperand() const {
-      int64_t Operand = 0;
-      Operand |= Abs ? SISrcMods::ABS : 0u;
-      Operand |= Neg ? SISrcMods::NEG : 0u;
-      return Operand;
-    }
-
-    int64_t getIntModifiersOperand() const {
-      int64_t Operand = 0;
-      Operand |= Sext ? SISrcMods::SEXT : 0u;
-      return Operand;
-    }
-
-    int64_t getModifiersOperand() const {
-      assert(!(hasFPModifiers() && hasIntModifiers())
-           && "fp and int modifiers should not be used simultaneously");
-      if (hasFPModifiers())
-        return getFPModifiersOperand();
-      if (hasIntModifiers())
-        return getIntModifiersOperand();
-      return 0;
-    }
-
-    friend raw_ostream &operator <<(raw_ostream &OS, AMDGPUOperand::Modifiers Mods);
-  };
-
-  enum ImmTy {
-    ImmTyNone,
-    ImmTyGDS,
-    ImmTyLDS,
-    ImmTyOffen,
-    ImmTyIdxen,
-    ImmTyAddr64,
-    ImmTyOffset,
-    ImmTyInstOffset,
-    ImmTyOffset0,
-    ImmTyOffset1,
-    ImmTySMEMOffsetMod,
-    ImmTyCPol,
-    ImmTyTFE,
-    ImmTyIsAsync,
-    ImmTyD16,
-    ImmTyClamp,
-    ImmTyOModSI,
-    ImmTySDWADstSel,
-    ImmTySDWASrc0Sel,
-    ImmTySDWASrc1Sel,
-    ImmTySDWADstUnused,
-    ImmTyDMask,
-    ImmTyDim,
-    ImmTyUNorm,
-    ImmTyDA,
-    ImmTyR128A16,
-    ImmTyA16,
-    ImmTyLWE,
-    ImmTyExpTgt,
-    ImmTyExpCompr,
-    ImmTyExpVM,
-    ImmTyDone,
-    ImmTyRowEn,
-    ImmTyFORMAT,
-    ImmTyHwreg,
-    ImmTyOff,
-    ImmTySendMsg,
-    ImmTyWaitEvent,
-    ImmTyInterpSlot,
-    ImmTyInterpAttr,
-    ImmTyInterpAttrChan,
-    ImmTyOpSel,
-    ImmTyOpSelHi,
-    ImmTyNegLo,
-    ImmTyNegHi,
-    ImmTyIndexKey8bit,
-    ImmTyIndexKey16bit,
-    ImmTyIndexKey32bit,
-    ImmTyDPP8,
-    ImmTyDppCtrl,
-    ImmTyDppRowMask,
-    ImmTyDppBankMask,
-    ImmTyDppBoundCtrl,
-    ImmTyDppFI,
-    ImmTySwizzle,
-    ImmTyGprIdxMode,
-    ImmTyHigh,
-    ImmTyBLGP,
-    ImmTyCBSZ,
-    ImmTyABID,
-    ImmTyEndpgm,
-    ImmTyWaitVDST,
-    ImmTyWaitEXP,
-    ImmTyWaitVAVDst,
-    ImmTyWaitVMVSrc,
-    ImmTyBitOp3,
-    ImmTyMatrixAFMT,
-    ImmTyMatrixBFMT,
-    ImmTyMatrixAScale,
-    ImmTyMatrixBScale,
-    ImmTyMatrixAScaleFmt,
-    ImmTyMatrixBScaleFmt,
-    ImmTyMatrixAReuse,
-    ImmTyMatrixBReuse,
-    ImmTyScaleSel,
-    ImmTyByteSel,
-  };
-
-private:
-  struct TokOp {
-    const char *Data;
-    unsigned Length;
-  };
-
-  struct ImmOp {
-    int64_t Val;
-    ImmTy Type;
-    bool IsFPImm;
-    Modifiers Mods;
-  };
-
-  struct RegOp {
-    MCRegister RegNo;
-    Modifiers Mods;
-  };
-
-  union {
-    TokOp Tok;
-    ImmOp Imm;
-    RegOp Reg;
-    const MCExpr *Expr;
-  };
-
-  // The index of the associated MCInst operand.
-  mutable int MCOpIdx = -1;
-
-public:
-  bool isToken() const override { return Kind == Token; }
-
-  bool isSymbolRefExpr() const {
-    return isExpr() && Expr && isa<MCSymbolRefExpr>(Expr);
-  }
-
-  bool isImm() const override {
-    return Kind == Immediate;
-  }
-
-  bool isInlinableImm(MVT type) const;
-  bool isLiteralImm(MVT type) const;
-
-  bool isRegKind() const {
-    return Kind == Register;
-  }
-
-  bool isReg() const override {
-    return isRegKind() && !hasModifiers();
-  }
-
-  bool isRegOrInline(unsigned RCID, MVT type) const {
-    return isRegClass(RCID) || isInlinableImm(type);
-  }
-
-  bool isRegOrImmWithInputMods(unsigned RCID, MVT type) const {
-    return isRegOrInline(RCID, type) || isLiteralImm(type);
-  }
-
-  bool isRegOrImmWithInt16InputMods() const {
-    return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::i16);
-  }
-
-  template <bool IsFake16> bool isRegOrImmWithIntT16InputMods() const {
-    return isRegOrImmWithInputMods(
-        IsFake16 ? AMDGPU::VS_32RegClassID : AMDGPU::VS_16RegClassID, MVT::i16);
-  }
-
-  bool isRegOrImmWithInt32InputMods() const {
-    return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::i32);
-  }
-
-  bool isRegOrInlineImmWithInt16InputMods() const {
-    return isRegOrInline(AMDGPU::VS_32RegClassID, MVT::i16);
-  }
-
-  template <bool IsFake16> bool isRegOrInlineImmWithIntT16InputMods() const {
-    return isRegOrInline(
-        IsFake16 ? AMDGPU::VS_32RegClassID : AMDGPU::VS_16RegClassID, MVT::i16);
-  }
-
-  bool isRegOrInlineImmWithInt32InputMods() const {
-    return isRegOrInline(AMDGPU::VS_32RegClassID, MVT::i32);
-  }
-
-  bool isRegOrImmWithInt64InputMods() const {
-    return isRegOrImmWithInputMods(AMDGPU::VS_64RegClassID, MVT::i64);
-  }
-
-  bool isRegOrImmWithFP16InputMods() const {
-    return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::f16);
-  }
-
-  template <bool IsFake16> bool isRegOrImmWithFPT16InputMods() const {
-    return isRegOrImmWithInputMods(
-        IsFake16 ? AMDGPU::VS_32RegClassID : AMDGPU::VS_16RegClassID, MVT::f16);
-  }
-
-  bool isRegOrImmWithFP32InputMods() const {
-    return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::f32);
-  }
-
-  bool isRegOrImmWithFP64InputMods() const {
-    return isRegOrImmWithInputMods(AMDGPU::VS_64RegClassID, MVT::f64);
-  }
-
-  template <bool IsFake16> bool isRegOrInlineImmWithFP16InputMods() const {
-    return isRegOrInline(
-        IsFake16 ? AMDGPU::VS_32RegClassID : AMDGPU::VS_16RegClassID, MVT::f16);
-  }
-
-  bool isRegOrInlineImmWithFP32InputMods() const {
-    return isRegOrInline(AMDGPU::VS_32RegClassID, MVT::f32);
-  }
-
-  bool isRegOrInlineImmWithFP64InputMods() const {
-    return isRegOrInline(AMDGPU::VS_64RegClassID, MVT::f64);
-  }
-
-  bool isVRegWithInputMods(unsigned RCID) const { return isRegClass(RCID); }
-
-  bool isVRegWithFP32InputMods() const {
-    return isVRegWithInputMods(AMDGPU::VGPR_32RegClassID);
-  }
-
-  bool isVRegWithFP64InputMods() const {
-    return isVRegWithInputMods(AMDGPU::VReg_64RegClassID);
-  }
-
-  bool isPackedFP16InputMods() const {
-    return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::v2f16);
-  }
-
-  bool isPackedVGPRFP32InputMods() const {
-    return isRegOrImmWithInputMods(AMDGPU::VReg_64RegClassID, MVT::v2f32);
-  }
-
-  bool isVReg() const {
-    return isRegClass(AMDGPU::VGPR_32RegClassID) ||
-           isRegClass(AMDGPU::VReg_64RegClassID) ||
-           isRegClass(AMDGPU::VReg_96RegClassID) ||
-           isRegClass(AMDGPU::VReg_128RegClassID) ||
-           isRegClass(AMDGPU::VReg_160RegClassID) ||
-           isRegClass(AMDGPU::VReg_192RegClassID) ||
-           isRegClass(AMDGPU::VReg_256RegClassID) ||
-           isRegClass(AMDGPU::VReg_512RegClassID) ||
-           isRegClass(AMDGPU::VReg_1024RegClassID);
-  }
-
-  bool isVReg32() const {
-    return isRegClass(AMDGPU::VGPR_32RegClassID);
-  }
-
-  bool isVReg32OrOff() const {
-    return isOff() || isVReg32();
-  }
-
-  bool isNull() const {
-    return isRegKind() && getReg() == AMDGPU::SGPR_NULL;
-  }
-
-  bool isAV_LdSt_32_Align2_RegOp() const {
-    return isRegClass(AMDGPU::VGPR_32RegClassID) ||
-           isRegClass(AMDGPU::AGPR_32RegClassID);
-  }
-
-  bool isVRegWithInputMods() const;
-  template <bool IsFake16> bool isT16_Lo128VRegWithInputMods() const;
-  template <bool IsFake16> bool isT16VRegWithInputMods() const;
-
-  bool isSDWAOperand(MVT type) const;
-  bool isSDWAFP16Operand() const;
-  bool isSDWAFP32Operand() const;
-  bool isSDWAInt16Operand() const;
-  bool isSDWAInt32Operand() const;
-
-  bool isImmTy(ImmTy ImmT) const {
-    return isImm() && Imm.Type == ImmT;
-  }
-
-  template <ImmTy Ty> bool isImmTy() const { return isImmTy(Ty); }
-
-  bool isImmLiteral() const { return isImmTy(ImmTyNone); }
-
-  bool isImmModifier() const {
-    return isImm() && Imm.Type != ImmTyNone;
-  }
-
-  bool isOModSI() const { return isImmTy(ImmTyOModSI); }
-  bool isDim() const { return isImmTy(ImmTyDim); }
-  bool isR128A16() const { return isImmTy(ImmTyR128A16); }
-  bool isOff() const { return isImmTy(ImmTyOff); }
-  bool isExpTgt() const { return isImmTy(ImmTyExpTgt); }
-  bool isOffen() const { return isImmTy(ImmTyOffen); }
-  bool isIdxen() const { return isImmTy(ImmTyIdxen); }
-  bool isAddr64() const { return isImmTy(ImmTyAddr64); }
-  bool isSMEMOffsetMod() const { return isImmTy(ImmTySMEMOffsetMod); }
-  bool isFlatOffset() const { return isImmTy(ImmTyOffset) || isImmTy(ImmTyInstOffset); }
-  bool isGDS() const { return isImmTy(ImmTyGDS); }
-  bool isLDS() const { return isImmTy(ImmTyLDS); }
-  bool isCPol() const { return isImmTy(ImmTyCPol); }
-  bool isIndexKey8bit() const { return isImmTy(ImmTyIndexKey8bit); }
-  bool isIndexKey16bit() const { return isImmTy(ImmTyIndexKey16bit); }
-  bool isIndexKey32bit() const { return isImmTy(ImmTyIndexKey32bit); }
-  bool isMatrixAFMT() const { return isImmTy(ImmTyMatrixAFMT); }
-  bool isMatrixBFMT() const { return isImmTy(ImmTyMatrixBFMT); }
-  bool isMatrixAScale() const { return isImmTy(ImmTyMatrixAScale); }
-  bool isMatrixBScale() const { return isImmTy(ImmTyMatrixBScale); }
-  bool isMatrixAScaleFmt() const { return isImmTy(ImmTyMatrixAScaleFmt); }
-  bool isMatrixBScaleFmt() const { return isImmTy(ImmTyMatrixBScaleFmt); }
-  bool isMatrixAReuse() const { return isImmTy(ImmTyMatrixAReuse); }
-  bool isMatrixBReuse() const { return isImmTy(ImmTyMatrixBReuse); }
-  bool isTFE() const { return isImmTy(ImmTyTFE); }
-  bool isFORMAT() const { return isImmTy(ImmTyFORMAT) && isUInt<7>(getImm()); }
-  bool isDppFI() const { return isImmTy(ImmTyDppFI); }
-  bool isSDWADstSel() const { return isImmTy(ImmTySDWADstSel); }
-  bool isSDWASrc0Sel() const { return isImmTy(ImmTySDWASrc0Sel); }
-  bool isSDWASrc1Sel() const { return isImmTy(ImmTySDWASrc1Sel); }
-  bool isSDWADstUnused() const { return isImmTy(ImmTySDWADstUnused); }
-  bool isInterpSlot() const { return isImmTy(ImmTyInterpSlot); }
-  bool isInterpAttr() const { return isImmTy(ImmTyInterpAttr); }
-  bool isInterpAttrChan() const { return isImmTy(ImmTyInterpAttrChan); }
-  bool isOpSel() const { return isImmTy(ImmTyOpSel); }
-  bool isOpSelHi() const { return isImmTy(ImmTyOpSelHi); }
-  bool isNegLo() const { return isImmTy(ImmTyNegLo); }
-  bool isNegHi() const { return isImmTy(ImmTyNegHi); }
-  bool isBitOp3() const { return isImmTy(ImmTyBitOp3) && isUInt<8>(getImm()); }
-  bool isDone() const { return isImmTy(ImmTyDone); }
-  bool isRowEn() const { return isImmTy(ImmTyRowEn); }
-
-  bool isRegOrImm() const {
-    return isReg() || isImm();
-  }
-
-  bool isRegClass(unsigned RCID) const;
-
-  bool isInlineValue() const;
-
-  bool isRegOrInlineNoMods(unsigned RCID, MVT type) const {
-    return isRegOrInline(RCID, type) && !hasModifiers();
-  }
-
-  bool isSCSrcB16() const {
-    return isRegOrInlineNoMods(AMDGPU::SReg_32RegClassID, MVT::i16);
-  }
-
-  bool isSCSrcV2B16() const {
-    return isSCSrcB16();
-  }
-
-  bool isSCSrc_b32() const {
-    return isRegOrInlineNoMods(AMDGPU::SReg_32RegClassID, MVT::i32);
-  }
-
-  bool isSCSrc_b64() const {
-    return isRegOrInlineNoMods(AMDGPU::SReg_64RegClassID, MVT::i64);
-  }
-
-  bool isBoolReg() const;
-
-  bool isSCSrcF16() const {
-    return isRegOrInlineNoMods(AMDGPU::SReg_32RegClassID, MVT::f16);
-  }
-
-  bool isSCSrcV2F16() const {
-    return isSCSrcF16();
-  }
-
-  bool isSCSrcF32() const {
-    return isRegOrInlineNoMods(AMDGPU::SReg_32RegClassID, MVT::f32);
-  }
-
-  bool isSCSrcF64() const {
-    return isRegOrInlineNoMods(AMDGPU::SReg_64RegClassID, MVT::f64);
-  }
-
-  bool isSSrc_b32() const {
-    return isSCSrc_b32() || isLiteralImm(MVT::i32) || isExpr();
-  }
-
-  bool isSSrc_b16() const { return isSCSrcB16() || isLiteralImm(MVT::i16); }
-
-  bool isSSrcV2B16() const {
-    llvm_unreachable("cannot happen");
-    return isSSrc_b16();
-  }
-
-  bool isSSrc_b64() const {
-    // TODO: Find out how SALU supports extension of 32-bit literals to 64 bits.
-    // See isVSrc64().
-    return isSCSrc_b64() || isLiteralImm(MVT::i64) ||
-           (((const MCTargetAsmParser *)AsmParser)
-                ->getAvailableFeatures()[AMDGPU::Feature64BitLiterals] &&
-            isExpr());
-  }
-
-  bool isSSrc_f32() const {
-    return isSCSrc_b32() || isLiteralImm(MVT::f32) || isExpr();
-  }
-
-  bool isSSrcF64() const { return isSCSrc_b64() || isLiteralImm(MVT::f64); }
-
-  bool isSSrc_bf16() const { return isSCSrcB16() || isLiteralImm(MVT::bf16); }
-
-  bool isSSrc_f16() const { return isSCSrcB16() || isLiteralImm(MVT::f16); }
-
-  bool isSSrcV2F16() const {
-    llvm_unreachable("cannot happen");
-    return isSSrc_f16();
-  }
-
-  bool isSSrcV2FP32() const {
-    llvm_unreachable("cannot happen");
-    return isSSrc_f32();
-  }
-
-  bool isSCSrcV2FP32() const {
-    llvm_unreachable("cannot happen");
-    return isSCSrcF32();
-  }
-
-  bool isSSrcV2INT32() const {
-    llvm_unreachable("cannot happen");
-    return isSSrc_b32();
-  }
-
-  bool isSCSrcV2INT32() const {
-    llvm_unreachable("cannot happen");
-    return isSCSrc_b32();
-  }
-
-  bool isSSrcOrLds_b32() const {
-    return isRegOrInlineNoMods(AMDGPU::SRegOrLds_32RegClassID, MVT::i32) ||
-           isLiteralImm(MVT::i32) || isExpr();
-  }
-
-  bool isVCSrc_b32() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_32RegClassID, MVT::i32);
-  }
-
-  bool isVCSrc_b32_Lo256() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_32_Lo256RegClassID, MVT::i32);
-  }
-
-  bool isVCSrc_b64_Lo256() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_64_Lo256RegClassID, MVT::i64);
-  }
-
-  bool isVCSrc_b64() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_64RegClassID, MVT::i64);
-  }
-
-  bool isVCSrcT_b16() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_16RegClassID, MVT::i16);
-  }
-
-  bool isVCSrcTB16_Lo128() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_16_Lo128RegClassID, MVT::i16);
-  }
-
-  bool isVCSrcFake16B16_Lo128() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_32_Lo128RegClassID, MVT::i16);
-  }
-
-  bool isVCSrc_b16() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_32RegClassID, MVT::i16);
-  }
-
-  bool isVCSrc_v2b16() const { return isVCSrc_b16(); }
-
-  bool isVCSrc_f32() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_32RegClassID, MVT::f32);
-  }
-
-  bool isVCSrc_f64() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_64RegClassID, MVT::f64);
-  }
-
-  bool isVCSrcTBF16() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_16RegClassID, MVT::bf16);
-  }
-
-  bool isVCSrcT_f16() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_16RegClassID, MVT::f16);
-  }
-
-  bool isVCSrcT_bf16() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_16RegClassID, MVT::f16);
-  }
-
-  bool isVCSrcTBF16_Lo128() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_16_Lo128RegClassID, MVT::bf16);
-  }
-
-  bool isVCSrcTF16_Lo128() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_16_Lo128RegClassID, MVT::f16);
-  }
-
-  bool isVCSrcFake16BF16_Lo128() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_32_Lo128RegClassID, MVT::bf16);
-  }
-
-  bool isVCSrcFake16F16_Lo128() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_32_Lo128RegClassID, MVT::f16);
-  }
-
-  bool isVCSrc_bf16() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_32RegClassID, MVT::bf16);
-  }
-
-  bool isVCSrc_f16() const {
-    return isRegOrInlineNoMods(AMDGPU::VS_32RegClassID, MVT::f16);
-  }
-
-  bool isVCSrc_v2bf16() const { return isVCSrc_bf16(); }
-
-  bool isVCSrc_v2f16() const { return isVCSrc_f16(); }
-
-  bool isVSrc_b32() const {
-    return isVCSrc_f32() || isLiteralImm(MVT::i32) || isExpr();
-  }
-
-  bool isVSrc_b64() const { return isVCSrc_f64() || isLiteralImm(MVT::i64); }
-
-  bool isVSrcT_b16() const { return isVCSrcT_b16() || isLiteralImm(MVT::i16); }
-
-  bool isVSrcT_b16_Lo128() const {
-    return isVCSrcTB16_Lo128() || isLiteralImm(MVT::i16);
-  }
-
-  bool isVSrcFake16_b16_Lo128() const {
-    return isVCSrcFake16B16_Lo128() || isLiteralImm(MVT::i16);
-  }
-
-  bool isVSrc_b16() const { return isVCSrc_b16() || isLiteralImm(MVT::i16); }
-
-  bool isVSrc_v2b16() const { return isVSrc_b16() || isLiteralImm(MVT::v2i16); }
-
-  bool isVCSrcV2FP32() const { return isVCSrc_f64(); }
-
-  bool isVSrc_v2f32() const { return isVSrc_f64() || isLiteralImm(MVT::v2f32); }
-
-  bool isVCSrc_v2b32() const { return isVCSrc_b64(); }
-
-  bool isVSrc_v2b32() const { return isVSrc_b64() || isLiteralImm(MVT::v2i32); }
-
-  bool isVSrc_f32() const {
-    return isVCSrc_f32() || isLiteralImm(MVT::f32) || isExpr();
-  }
-
-  bool isVSrc_f64() const { return isVCSrc_f64() || isLiteralImm(MVT::f64); }
-
-  bool isVSrcT_bf16() const { return isVCSrcTBF16() || isLiteralImm(MVT::bf16); }
-
-  bool isVSrcT_f16() const { return isVCSrcT_f16() || isLiteralImm(MVT::f16); }
-
-  bool isVSrcT_bf16_Lo128() const {
-    return isVCSrcTBF16_Lo128() || isLiteralImm(MVT::bf16);
-  }
-
-  bool isVSrcT_f16_Lo128() const {
-    return isVCSrcTF16_Lo128() || isLiteralImm(MVT::f16);
-  }
-
-  bool isVSrcFake16_bf16_Lo128() const {
-    return isVCSrcFake16BF16_Lo128() || isLiteralImm(MVT::bf16);
-  }
-
-  bool isVSrcFake16_f16_Lo128() const {
-    return isVCSrcFake16F16_Lo128() || isLiteralImm(MVT::f16);
-  }
-
-  bool isVSrc_bf16() const { return isVCSrc_bf16() || isLiteralImm(MVT::bf16); }
-
-  bool isVSrc_f16() const { return isVCSrc_f16() || isLiteralImm(MVT::f16); }
-
-  bool isVSrc_v2bf16() const {
-    return isVSrc_bf16() || isLiteralImm(MVT::v2bf16);
-  }
-
-  bool isVSrc_v2f16() const { return isVSrc_f16() || isLiteralImm(MVT::v2f16); }
-
-  bool isVSrc_v2f16_splat() const { return isVSrc_v2f16(); }
-
-  bool isVSrc_NoInline_v2f16() const { return isVSrc_v2f16(); }
-
-  bool isVISrcB32() const {
-    return isRegOrInlineNoMods(AMDGPU::VGPR_32RegClassID, MVT::i32);
-  }
-
-  bool isVISrcB16() const {
-    return isRegOrInlineNoMods(AMDGPU::VGPR_32RegClassID, MVT::i16);
-  }
-
-  bool isVISrcV2B16() const {
-    return isVISrcB16();
-  }
-
-  bool isVISrcF32() const {
-    return isRegOrInlineNoMods(AMDGPU::VGPR_32RegClassID, MVT::f32);
-  }
-
-  bool isVISrcF16() const {
-    return isRegOrInlineNoMods(AMDGPU::VGPR_32RegClassID, MVT::f16);
-  }
-
-  bool isVISrcV2F16() const {
-    return isVISrcF16() || isVISrcB32();
-  }
-
-  bool isVISrc_64_bf16() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::bf16);
-  }
-
-  bool isVISrc_64_f16() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::f16);
-  }
-
-  bool isVISrc_64_b32() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::i32);
-  }
-
-  bool isVISrc_64B64() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::i64);
-  }
-
-  bool isVISrc_64_f64() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::f64);
-  }
-
-  bool isVISrc_64V2FP32() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::f32);
-  }
-
-  bool isVISrc_64V2INT32() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_64RegClassID, MVT::i32);
-  }
-
-  bool isVISrc_256_b32() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_256RegClassID, MVT::i32);
-  }
-
-  bool isVISrc_256_f32() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_256RegClassID, MVT::f32);
-  }
-
-  bool isVISrc_256B64() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_256RegClassID, MVT::i64);
-  }
-
-  bool isVISrc_256_f64() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_256RegClassID, MVT::f64);
-  }
-
-  bool isVISrc_512_f64() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_512RegClassID, MVT::f64);
-  }
-
-  bool isVISrc_128B16() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_128RegClassID, MVT::i16);
-  }
-
-  bool isVISrc_128V2B16() const {
-    return isVISrc_128B16();
-  }
-
-  bool isVISrc_128_b32() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_128RegClassID, MVT::i32);
-  }
-
-  bool isVISrc_128_f32() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_128RegClassID, MVT::f32);
-  }
-
-  bool isVISrc_256V2FP32() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_256RegClassID, MVT::f32);
-  }
-
-  bool isVISrc_256V2INT32() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_256RegClassID, MVT::i32);
-  }
-
-  bool isVISrc_512_b32() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_512RegClassID, MVT::i32);
-  }
-
-  bool isVISrc_512B16() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_512RegClassID, MVT::i16);
-  }
-
-  bool isVISrc_512V2B16() const {
-    return isVISrc_512B16();
-  }
-
-  bool isVISrc_512_f32() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_512RegClassID, MVT::f32);
-  }
-
-  bool isVISrc_512F16() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_512RegClassID, MVT::f16);
-  }
-
-  bool isVISrc_512V2F16() const {
-    return isVISrc_512F16() || isVISrc_512_b32();
-  }
-
-  bool isVISrc_1024_b32() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_1024RegClassID, MVT::i32);
-  }
-
-  bool isVISrc_1024B16() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_1024RegClassID, MVT::i16);
-  }
-
-  bool isVISrc_1024V2B16() const {
-    return isVISrc_1024B16();
-  }
-
-  bool isVISrc_1024_f32() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_1024RegClassID, MVT::f32);
-  }
-
-  bool isVISrc_1024F16() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_1024RegClassID, MVT::f16);
-  }
-
-  bool isVISrc_1024V2F16() const {
-    return isVISrc_1024F16() || isVISrc_1024_b32();
-  }
-
-  bool isAISrcB32() const {
-    return isRegOrInlineNoMods(AMDGPU::AGPR_32RegClassID, MVT::i32);
-  }
-
-  bool isAISrcB16() const {
-    return isRegOrInlineNoMods(AMDGPU::AGPR_32RegClassID, MVT::i16);
-  }
-
-  bool isAISrcV2B16() const {
-    return isAISrcB16();
-  }
-
-  bool isAISrcF32() const {
-    return isRegOrInlineNoMods(AMDGPU::AGPR_32RegClassID, MVT::f32);
-  }
-
-  bool isAISrcF16() const {
-    return isRegOrInlineNoMods(AMDGPU::AGPR_32RegClassID, MVT::f16);
-  }
-
-  bool isAISrcV2F16() const {
-    return isAISrcF16() || isAISrcB32();
-  }
-
-  bool isAISrc_64B64() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_64RegClassID, MVT::i64);
-  }
-
-  bool isAISrc_64_f64() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_64RegClassID, MVT::f64);
-  }
-
-  bool isAISrc_128_b32() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_128RegClassID, MVT::i32);
-  }
-
-  bool isAISrc_128B16() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_128RegClassID, MVT::i16);
-  }
-
-  bool isAISrc_128V2B16() const {
-    return isAISrc_128B16();
-  }
-
-  bool isAISrc_128_f32() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_128RegClassID, MVT::f32);
-  }
-
-  bool isAISrc_128F16() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_128RegClassID, MVT::f16);
-  }
-
-  bool isAISrc_128V2F16() const {
-    return isAISrc_128F16() || isAISrc_128_b32();
-  }
-
-  bool isVISrc_128_bf16() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_128RegClassID, MVT::bf16);
-  }
-
-  bool isVISrc_128_f16() const {
-    return isRegOrInlineNoMods(AMDGPU::VReg_128RegClassID, MVT::f16);
-  }
-
-  bool isVISrc_128V2F16() const {
-    return isVISrc_128_f16() || isVISrc_128_b32();
-  }
-
-  bool isAISrc_256B64() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_256RegClassID, MVT::i64);
-  }
-
-  bool isAISrc_256_f64() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_256RegClassID, MVT::f64);
-  }
-
-  bool isAISrc_512_b32() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_512RegClassID, MVT::i32);
-  }
-
-  bool isAISrc_512B16() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_512RegClassID, MVT::i16);
-  }
-
-  bool isAISrc_512V2B16() const {
-    return isAISrc_512B16();
-  }
-
-  bool isAISrc_512_f32() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_512RegClassID, MVT::f32);
-  }
-
-  bool isAISrc_512F16() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_512RegClassID, MVT::f16);
-  }
-
-  bool isAISrc_512V2F16() const {
-    return isAISrc_512F16() || isAISrc_512_b32();
-  }
-
-  bool isAISrc_1024_b32() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_1024RegClassID, MVT::i32);
-  }
-
-  bool isAISrc_1024B16() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_1024RegClassID, MVT::i16);
-  }
-
-  bool isAISrc_1024V2B16() const {
-    return isAISrc_1024B16();
-  }
-
-  bool isAISrc_1024_f32() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_1024RegClassID, MVT::f32);
-  }
-
-  bool isAISrc_1024F16() const {
-    return isRegOrInlineNoMods(AMDGPU::AReg_1024RegClassID, MVT::f16);
-  }
-
-  bool isAISrc_1024V2F16() const {
-    return isAISrc_1024F16() || isAISrc_1024_b32();
-  }
-
-  bool isKImmFP32() const {
-    return isLiteralImm(MVT::f32);
-  }
-
-  bool isKImmFP16() const {
-    return isLiteralImm(MVT::f16);
-  }
-
-  bool isKImmFP64() const { return isLiteralImm(MVT::f64); }
-
-  bool isMem() const override {
-    return false;
-  }
-
-  bool isExpr() const {
-    return Kind == Expression;
-  }
-
-  bool isSOPPBrTarget() const { return isExpr() || isImm(); }
-
-  bool isSWaitCnt() const;
-  bool isDepCtr() const;
-  bool isSDelayALU() const;
-  bool isHwreg() const;
-  bool isSendMsg() const;
-  bool isWaitEvent() const;
-  bool isSplitBarrier() const;
-  bool isSwizzle() const;
-  bool isSMRDOffset8() const;
-  bool isSMEMOffset() const;
-  bool isSMRDLiteralOffset() const;
-  bool isDPP8() const;
-  bool isDPPCtrl() const;
-  bool isBLGP() const;
-  bool isGPRIdxMode() const;
-  bool isS16Imm() const;
-  bool isU16Imm() const;
-  bool isEndpgm() const;
-
-  auto getPredicate(std::function<bool(const AMDGPUOperand &Op)> P) const {
-    return [this, P]() { return P(*this); };
-  }
-
-  StringRef getToken() const {
-    assert(isToken());
-    return StringRef(Tok.Data, Tok.Length);
-  }
-
-  int64_t getImm() const {
-    assert(isImm());
-    return Imm.Val;
-  }
-
-  void setImm(int64_t Val) {
-    assert(isImm());
-    Imm.Val = Val;
-  }
-
-  ImmTy getImmTy() const {
-    assert(isImm());
-    return Imm.Type;
-  }
-
-  MCRegister getReg() const override {
-    assert(isRegKind());
-    return Reg.RegNo;
-  }
-
-  SMLoc getStartLoc() const override {
-    return StartLoc;
-  }
-
-  SMLoc getEndLoc() const override {
-    return EndLoc;
-  }
-
-  SMRange getLocRange() const {
-    return SMRange(StartLoc, EndLoc);
-  }
-
-  int getMCOpIdx() const { return MCOpIdx; }
-
-  Modifiers getModifiers() const {
-    assert(isRegKind() || isImmTy(ImmTyNone));
-    return isRegKind() ? Reg.Mods : Imm.Mods;
-  }
-
-  void setModifiers(Modifiers Mods) {
-    assert(isRegKind() || isImmTy(ImmTyNone));
-    if (isRegKind())
-      Reg.Mods = Mods;
-    else
-      Imm.Mods = Mods;
-  }
-
-  bool hasModifiers() const {
-    return getModifiers().hasModifiers();
-  }
-
-  bool hasFPModifiers() const {
-    return getModifiers().hasFPModifiers();
-  }
-
-  bool hasIntModifiers() const {
-    return getModifiers().hasIntModifiers();
-  }
-
-  uint64_t applyInputFPModifiers(uint64_t Val, unsigned Size) const;
-
-  void addImmOperands(MCInst &Inst, unsigned N, bool ApplyModifiers = true) const;
-
-  void addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyModifiers) const;
-
-  void addRegOperands(MCInst &Inst, unsigned N) const;
-
-  void addRegOrImmOperands(MCInst &Inst, unsigned N) const {
-    if (isRegKind())
-      addRegOperands(Inst, N);
-    else
-      addImmOperands(Inst, N);
-  }
-
-  void addRegOrImmWithInputModsOperands(MCInst &Inst, unsigned N) const {
-    Modifiers Mods = getModifiers();
-    Inst.addOperand(MCOperand::createImm(Mods.getModifiersOperand()));
-    if (isRegKind()) {
-      addRegOperands(Inst, N);
-    } else {
-      addImmOperands(Inst, N, false);
-    }
-  }
-
-  void addRegOrImmWithFPInputModsOperands(MCInst &Inst, unsigned N) const {
-    assert(!hasIntModifiers());
-    addRegOrImmWithInputModsOperands(Inst, N);
-  }
-
-  void addRegOrImmWithIntInputModsOperands(MCInst &Inst, unsigned N) const {
-    assert(!hasFPModifiers());
-    addRegOrImmWithInputModsOperands(Inst, N);
-  }
-
-  void addRegWithInputModsOperands(MCInst &Inst, unsigned N) const {
-    Modifiers Mods = getModifiers();
-    Inst.addOperand(MCOperand::createImm(Mods.getModifiersOperand()));
-    assert(isRegKind());
-    addRegOperands(Inst, N);
-  }
-
-  void addRegWithFPInputModsOperands(MCInst &Inst, unsigned N) const {
-    assert(!hasIntModifiers());
-    addRegWithInputModsOperands(Inst, N);
-  }
-
-  void addRegWithIntInputModsOperands(MCInst &Inst, unsigned N) const {
-    assert(!hasFPModifiers());
-    addRegWithInputModsOperands(Inst, N);
-  }
-
-  static void printImmTy(raw_ostream& OS, ImmTy Type) {
-    // clang-format off
-    switch (Type) {
-    case ImmTyNone: OS << "None"; break;
-    case ImmTyGDS: OS << "GDS"; break;
-    case ImmTyLDS: OS << "LDS"; break;
-    case ImmTyOffen: OS << "Offen"; break;
-    case ImmTyIdxen: OS << "Idxen"; break;
-    case ImmTyAddr64: OS << "Addr64"; break;
-    case ImmTyOffset: OS << "Offset"; break;
-    case ImmTyInstOffset: OS << "InstOffset"; break;
-    case ImmTyOffset0: OS << "Offset0"; break;
-    case ImmTyOffset1: OS << "Offset1"; break;
-    case ImmTySMEMOffsetMod: OS << "SMEMOffsetMod"; break;
-    case ImmTyCPol: OS << "CPol"; break;
-    case ImmTyIndexKey8bit: OS << "index_key"; break;
-    case ImmTyIndexKey16bit: OS << "index_key"; break;
-    case ImmTyIndexKey32bit: OS << "index_key"; break;
-    case ImmTyTFE: OS << "TFE"; break;
-    case ImmTyIsAsync: OS << "IsAsync"; break;
-    case ImmTyD16: OS << "D16"; break;
-    case ImmTyFORMAT: OS << "FORMAT"; break;
-    case ImmTyClamp: OS << "Clamp"; break;
-    case ImmTyOModSI: OS << "OModSI"; break;
-    case ImmTyDPP8: OS << "DPP8"; break;
-    case ImmTyDppCtrl: OS << "DppCtrl"; break;
-    case ImmTyDppRowMask: OS << "DppRowMask"; break;
-    case ImmTyDppBankMask: OS << "DppBankMask"; break;
-    case ImmTyDppBoundCtrl: OS << "DppBoundCtrl"; break;
-    case ImmTyDppFI: OS << "DppFI"; break;
-    case ImmTySDWADstSel: OS << "SDWADstSel"; break;
-    case ImmTySDWASrc0Sel: OS << "SDWASrc0Sel"; break;
-    case ImmTySDWASrc1Sel: OS << "SDWASrc1Sel"; break;
-    case ImmTySDWADstUnused: OS << "SDWADstUnused"; break;
-    case ImmTyDMask: OS << "DMask"; break;
-    case ImmTyDim: OS << "Dim"; break;
-    case ImmTyUNorm: OS << "UNorm"; break;
-    case ImmTyDA: OS << "DA"; break;
-    case ImmTyR128A16: OS << "R128A16"; break;
-    case ImmTyA16: OS << "A16"; break;
-    case ImmTyLWE: OS << "LWE"; break;
-    case ImmTyOff: OS << "Off"; break;
-    case ImmTyExpTgt: OS << "ExpTgt"; break;
-    case ImmTyExpCompr: OS << "ExpCompr"; break;
-    case ImmTyExpVM: OS << "ExpVM"; break;
-    case ImmTyDone: OS << "Done"; break;
-    case ImmTyRowEn: OS << "RowEn"; break;
-    case ImmTyHwreg: OS << "Hwreg"; break;
-    case ImmTySendMsg: OS << "SendMsg"; break;
-    case ImmTyWaitEvent: OS << "WaitEvent"; break;
-    case ImmTyInterpSlot: OS << "InterpSlot"; break;
-    case ImmTyInterpAttr: OS << "InterpAttr"; break;
-    case ImmTyInterpAttrChan: OS << "InterpAttrChan"; break;
-    case ImmTyOpSel: OS << "OpSel"; break;
-    case ImmTyOpSelHi: OS << "OpSelHi"; break;
-    case ImmTyNegLo: OS << "NegLo"; break;
-    case ImmTyNegHi: OS << "NegHi"; break;
-    case ImmTySwizzle: OS << "Swizzle"; break;
-    case ImmTyGprIdxMode: OS << "GprIdxMode"; break;
-    case ImmTyHigh: OS << "High"; break;
-    case ImmTyBLGP: OS << "BLGP"; break;
-    case ImmTyCBSZ: OS << "CBSZ"; break;
-    case ImmTyABID: OS << "ABID"; break;
-    case ImmTyEndpgm: OS << "Endpgm"; break;
-    case ImmTyWaitVDST: OS << "WaitVDST"; break;
-    case ImmTyWaitEXP: OS << "WaitEXP"; break;
-    case ImmTyWaitVAVDst: OS << "WaitVAVDst"; break;
-    case ImmTyWaitVMVSrc: OS << "WaitVMVSrc"; break;
-    case ImmTyBitOp3: OS << "BitOp3"; break;
-    case ImmTyMatrixAFMT: OS << "ImmTyMatrixAFMT"; break;
-    case ImmTyMatrixBFMT: OS << "ImmTyMatrixBFMT"; break;
-    case ImmTyMatrixAScale: OS << "ImmTyMatrixAScale"; break;
-    case ImmTyMatrixBScale: OS << "ImmTyMatrixBScale"; break;
-    case ImmTyMatrixAScaleFmt: OS << "ImmTyMatrixAScaleFmt"; break;
-    case ImmTyMatrixBScaleFmt: OS << "ImmTyMatrixBScaleFmt"; break;
-    case ImmTyMatrixAReuse: OS << "ImmTyMatrixAReuse"; break;
-    case ImmTyMatrixBReuse: OS << "ImmTyMatrixBReuse"; break;
-    case ImmTyScaleSel: OS << "ScaleSel" ; break;
-    case ImmTyByteSel: OS << "ByteSel" ; break;
-    }
-    // clang-format on
-  }
-
-  void print(raw_ostream &OS, const MCAsmInfo &MAI) const override {
-    switch (Kind) {
-    case Register:
-      OS << "<register " << AMDGPUInstPrinter::getRegisterName(getReg())
-         << " mods: " << Reg.Mods << '>';
-      break;
-    case Immediate:
-      OS << '<' << getImm();
-      if (getImmTy() != ImmTyNone) {
-        OS << " type: "; printImmTy(OS, getImmTy());
-      }
-      OS << " mods: " << Imm.Mods << '>';
-      break;
-    case Token:
-      OS << '\'' << getToken() << '\'';
-      break;
-    case Expression:
-      OS << "<expr ";
-      MAI.printExpr(OS, *Expr);
-      OS << '>';
-      break;
-    }
-  }
-
-  static AMDGPUOperand::Ptr CreateImm(const AMDGPUAsmParser *AsmParser,
-                                      int64_t Val, SMLoc Loc,
-                                      ImmTy Type = ImmTyNone,
-                                      bool IsFPImm = false) {
-    auto Op = std::make_unique<AMDGPUOperand>(Immediate, AsmParser);
-    Op->Imm.Val = Val;
-    Op->Imm.IsFPImm = IsFPImm;
-    Op->Imm.Type = Type;
-    Op->Imm.Mods = Modifiers();
-    Op->StartLoc = Loc;
-    Op->EndLoc = Loc;
-    return Op;
-  }
-
-  static AMDGPUOperand::Ptr CreateToken(const AMDGPUAsmParser *AsmParser,
-                                        StringRef Str, SMLoc Loc,
-                                        bool HasExplicitEncodingSize = true) {
-    auto Res = std::make_unique<AMDGPUOperand>(Token, AsmParser);
-    Res->Tok.Data = Str.data();
-    Res->Tok.Length = Str.size();
-    Res->StartLoc = Loc;
-    Res->EndLoc = Loc;
-    return Res;
-  }
-
-  static AMDGPUOperand::Ptr CreateReg(const AMDGPUAsmParser *AsmParser,
-                                      MCRegister Reg, SMLoc S, SMLoc E) {
-    auto Op = std::make_unique<AMDGPUOperand>(Register, AsmParser);
-    Op->Reg.RegNo = Reg;
-    Op->Reg.Mods = Modifiers();
-    Op->StartLoc = S;
-    Op->EndLoc = E;
-    return Op;
-  }
-
-  static AMDGPUOperand::Ptr CreateExpr(const AMDGPUAsmParser *AsmParser,
-                                       const class MCExpr *Expr, SMLoc S) {
-    auto Op = std::make_unique<AMDGPUOperand>(Expression, AsmParser);
-    Op->Expr = Expr;
-    Op->StartLoc = S;
-    Op->EndLoc = S;
-    return Op;
-  }
-};
-
-raw_ostream &operator <<(raw_ostream &OS, AMDGPUOperand::Modifiers Mods) {
-  OS << "abs:" << Mods.Abs << " neg: " << Mods.Neg << " sext:" << Mods.Sext;
-  return OS;
-}
-
-//===----------------------------------------------------------------------===//
-// AsmParser
-//===----------------------------------------------------------------------===//
-
-// TODO: define GET_SUBTARGET_FEATURE_NAME
-#define GET_REGISTER_MATCHER
-#include "AMDGPUGenAsmMatcher.inc"
-#undef GET_REGISTER_MATCHER
-#undef GET_SUBTARGET_FEATURE_NAME
-
-// Holds info related to the current kernel, e.g. count of SGPRs used.
-// Kernel scope begins at .amdgpu_hsa_kernel directive, ends at next
-// .amdgpu_hsa_kernel or at EOF.
-class KernelScopeInfo {
-  int SgprIndexUnusedMin = -1;
-  int VgprIndexUnusedMin = -1;
-  int AgprIndexUnusedMin = -1;
-  MCContext *Ctx = nullptr;
-  MCSubtargetInfo const *MSTI = nullptr;
-
-  void usesSgprAt(int i) {
-    if (i >= SgprIndexUnusedMin) {
-      SgprIndexUnusedMin = ++i;
-      if (Ctx) {
-        MCSymbol* const Sym =
-          Ctx->getOrCreateSymbol(Twine(".kernel.sgpr_count"));
-        Sym->setVariableValue(MCConstantExpr::create(SgprIndexUnusedMin, *Ctx));
-      }
-    }
-  }
-
-  void usesVgprAt(int i) {
-    if (i >= VgprIndexUnusedMin) {
-      VgprIndexUnusedMin = ++i;
-      if (Ctx) {
-        MCSymbol* const Sym =
-          Ctx->getOrCreateSymbol(Twine(".kernel.vgpr_count"));
-        int totalVGPR = getTotalNumVGPRs(isGFX90A(*MSTI), AgprIndexUnusedMin,
-                                         VgprIndexUnusedMin);
-        Sym->setVariableValue(MCConstantExpr::create(totalVGPR, *Ctx));
-      }
-    }
-  }
-
-  void usesAgprAt(int i) {
-    // Instruction will error in AMDGPUAsmParser::matchAndEmitInstruction
-    if (!hasMAIInsts(*MSTI))
-      return;
-
-    if (i >= AgprIndexUnusedMin) {
-      AgprIndexUnusedMin = ++i;
-      if (Ctx) {
-        MCSymbol* const Sym =
-          Ctx->getOrCreateSymbol(Twine(".kernel.agpr_count"));
-        Sym->setVariableValue(MCConstantExpr::create(AgprIndexUnusedMin, *Ctx));
-
-        // Also update vgpr_count (dependent on agpr_count for gfx908/gfx90a)
-        MCSymbol* const vSym =
-          Ctx->getOrCreateSymbol(Twine(".kernel.vgpr_count"));
-        int totalVGPR = getTotalNumVGPRs(isGFX90A(*MSTI), AgprIndexUnusedMin,
-                                         VgprIndexUnusedMin);
-        vSym->setVariableValue(MCConstantExpr::create(totalVGPR, *Ctx));
-      }
-    }
-  }
-
-public:
-  KernelScopeInfo() = default;
-
-  void initialize(MCContext &Context) {
-    Ctx = &Context;
-    MSTI = Ctx->getSubtargetInfo();
-
-    usesSgprAt(SgprIndexUnusedMin = -1);
-    usesVgprAt(VgprIndexUnusedMin = -1);
-    if (hasMAIInsts(*MSTI)) {
-      usesAgprAt(AgprIndexUnusedMin = -1);
-    }
-  }
-
-  void usesRegister(RegisterKind RegKind, unsigned DwordRegIndex,
-                    unsigned RegWidth) {
-    switch (RegKind) {
-    case IS_SGPR:
-      usesSgprAt(DwordRegIndex + divideCeil(RegWidth, 32) - 1);
-      break;
-    case IS_AGPR:
-      usesAgprAt(DwordRegIndex + divideCeil(RegWidth, 32) - 1);
-      break;
-    case IS_VGPR:
-      usesVgprAt(DwordRegIndex + divideCeil(RegWidth, 32) - 1);
-      break;
-    default:
-      break;
-    }
-  }
-};
-
-class AMDGPUAsmParser : public MCTargetAsmParser {
-  MCAsmParser &Parser;
-
-  unsigned ForcedEncodingSize = 0;
-  bool ForcedDPP = false;
-  bool ForcedSDWA = false;
-  KernelScopeInfo KernelScope;
-  const unsigned HwMode;
-
-  /// @name Auto-generated Match Functions
-  /// {
-
-#define GET_ASSEMBLER_HEADER
-#include "AMDGPUGenAsmMatcher.inc"
-
-  /// }
-
-  /// Get size of register operand
-  unsigned getRegOperandSize(const MCInstrDesc &Desc, unsigned OpNo) const {
-    assert(OpNo < Desc.NumOperands);
-    int16_t RCID = MII.getOpRegClassID(Desc.operands()[OpNo], HwMode);
-    return getRegBitWidth(RCID) / 8;
-  }
-
-private:
-  void createConstantSymbol(StringRef Id, int64_t Val);
-
-  bool ParseAsAbsoluteExpression(uint32_t &Ret);
-  bool OutOfRangeError(SMRange Range);
-  /// Calculate VGPR/SGPR blocks required for given target, reserved
-  /// registers, and user-specified NextFreeXGPR values.
-  ///
-  /// \param Features [in] Target features, used for bug corrections.
-  /// \param VCCUsed [in] Whether VCC special SGPR is reserved.
-  /// \param FlatScrUsed [in] Whether FLAT_SCRATCH special SGPR is reserved.
-  /// \param XNACKUsed [in] Whether XNACK_MASK special SGPR is reserved.
-  /// \param EnableWavefrontSize32 [in] Value of ENABLE_WAVEFRONT_SIZE32 kernel
-  /// descriptor field, if valid.
-  /// \param NextFreeVGPR [in] Max VGPR number referenced, plus one.
-  /// \param VGPRRange [in] Token range, used for VGPR diagnostics.
-  /// \param NextFreeSGPR [in] Max SGPR number referenced, plus one.
-  /// \param SGPRRange [in] Token range, used for SGPR diagnostics.
-  /// \param VGPRBlocks [out] Result VGPR block count.
-  /// \param SGPRBlocks [out] Result SGPR block count.
-  bool calculateGPRBlocks(const FeatureBitset &Features, const MCExpr *VCCUsed,
-                          const MCExpr *FlatScrUsed, bool XNACKUsed,
-                          std::optional<bool> EnableWavefrontSize32,
-                          const MCExpr *NextFreeVGPR, SMRange VGPRRange,
-                          const MCExpr *NextFreeSGPR, SMRange SGPRRange,
-                          const MCExpr *&VGPRBlocks, const MCExpr *&SGPRBlocks);
-  bool ParseDirectiveAMDGCNTarget();
-  bool ParseDirectiveAMDHSACodeObjectVersion();
-  bool ParseDirectiveAMDHSAKernel();
-  bool ParseAMDKernelCodeTValue(StringRef ID, AMDGPUMCKernelCodeT &Header);
-  bool ParseDirectiveAMDKernelCodeT();
-  // TODO: Possibly make subtargetHasRegister const.
-  bool subtargetHasRegister(const MCRegisterInfo &MRI, MCRegister Reg);
-  bool ParseDirectiveAMDGPUHsaKernel();
-
-  bool ParseDirectiveISAVersion();
-  bool ParseDirectiveHSAMetadata();
-  bool ParseDirectivePALMetadataBegin();
-  bool ParseDirectivePALMetadata();
-  bool ParseDirectiveAMDGPULDS();
-
-  /// Common code to parse out a block of text (typically YAML) between start and
-  /// end directives.
-  bool ParseToEndDirective(const char *AssemblerDirectiveBegin,
-                           const char *AssemblerDirectiveEnd,
-                           std::string &CollectString);
-
-  bool AddNextRegisterToList(MCRegister &Reg, unsigned &RegWidth,
-                             RegisterKind RegKind, MCRegister Reg1, SMLoc Loc);
-  bool ParseAMDGPURegister(RegisterKind &RegKind, MCRegister &Reg,
-                           unsigned &RegNum, unsigned &RegWidth,
-                           bool RestoreOnFailure = false);
-  bool ParseAMDGPURegister(RegisterKind &RegKind, MCRegister &Reg,
-                           unsigned &RegNum, unsigned &RegWidth,
-                           SmallVectorImpl<AsmToken> &Tokens);
-  MCRegister ParseRegularReg(RegisterKind &RegKind, unsigned &RegNum,
-                             unsigned &RegWidth,
-                             SmallVectorImpl<AsmToken> &Tokens);
-  MCRegister ParseSpecialReg(RegisterKind &RegKind, unsigned &RegNum,
-                             unsigned &RegWidth,
-                             SmallVectorImpl<AsmToken> &Tokens);
-  MCRegister ParseRegList(RegisterKind &RegKind, unsigned &RegNum,
-                          unsigned &RegWidth,
-                          SmallVectorImpl<AsmToken> &Tokens);
-  bool ParseRegRange(unsigned &Num, unsigned &Width, unsigned &SubReg);
-  MCRegister getRegularReg(RegisterKind RegKind, unsigned RegNum,
-                           unsigned SubReg, unsigned RegWidth, SMLoc Loc);
-
-  bool isRegister();
-  bool isRegister(const AsmToken &Token, const AsmToken &NextToken) const;
-  std::optional<StringRef> getGprCountSymbolName(RegisterKind RegKind);
-  void initializeGprCountSymbol(RegisterKind RegKind);
-  bool updateGprCountSymbols(RegisterKind RegKind, unsigned DwordRegIndex,
-                             unsigned RegWidth);
-  void cvtMubufImpl(MCInst &Inst, const OperandVector &Operands,
-                    bool IsAtomic);
-
-public:
-  enum OperandMode {
-    OperandMode_Default,
-    OperandMode_NSA,
-  };
-
-  using OptionalImmIndexMap = std::map<AMDGPUOperand::ImmTy, unsigned>;
-
-  AMDGPUAsmParser(const MCSubtargetInfo &STI, MCAsmParser &_Parser,
-                  const MCInstrInfo &MII, const MCTargetOptions &Options)
-      : MCTargetAsmParser(Options, STI, MII), Parser(_Parser),
-        HwMode(STI.getHwMode(MCSubtargetInfo::HwMode_RegInfo)) {
-    MCAsmParserExtension::Initialize(Parser);
-
-    setAvailableFeatures(ComputeAvailableFeatures(getFeatureBits()));
-
-    AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU());
-    if (ISA.Major >= 6 && isHsaAbi(getSTI())) {
-      createConstantSymbol(".amdgcn.gfx_generation_number", ISA.Major);
-      createConstantSymbol(".amdgcn.gfx_generation_minor", ISA.Minor);
-      createConstantSymbol(".amdgcn.gfx_generation_stepping", ISA.Stepping);
-    } else {
-      createConstantSymbol(".option.machine_version_major", ISA.Major);
-      createConstantSymbol(".option.machine_version_minor", ISA.Minor);
-      createConstantSymbol(".option.machine_version_stepping", ISA.Stepping);
-    }
-    if (ISA.Major >= 6 && isHsaAbi(getSTI())) {
-      initializeGprCountSymbol(IS_VGPR);
-      initializeGprCountSymbol(IS_SGPR);
-    } else
-      KernelScope.initialize(getContext());
-
-    for (auto [Symbol, Code] : AMDGPU::UCVersion::getGFXVersions())
-      createConstantSymbol(Symbol, Code);
-
-    createConstantSymbol("UC_VERSION_W64_BIT", 0x2000);
-    createConstantSymbol("UC_VERSION_W32_BIT", 0x4000);
-    createConstantSymbol("UC_VERSION_MDP_BIT", 0x8000);
-  }
-
-  bool hasMIMG_R128() const {
-    return AMDGPU::hasMIMG_R128(getSTI());
-  }
-
-  bool hasPackedD16() const {
-    return AMDGPU::hasPackedD16(getSTI());
-  }
-
-  bool hasA16() const { return AMDGPU::hasA16(getSTI()); }
-
-  bool hasG16() const { return AMDGPU::hasG16(getSTI()); }
-
-  bool hasGDS() const { return AMDGPU::hasGDS(getSTI()); }
-
-  bool isSI() const {
-    return AMDGPU::isSI(getSTI());
-  }
-
-  bool isCI() const {
-    return AMDGPU::isCI(getSTI());
-  }
-
-  bool isVI() const {
-    return AMDGPU::isVI(getSTI());
-  }
-
-  bool isGFX9() const {
-    return AMDGPU::isGFX9(getSTI());
-  }
-
-  // TODO: isGFX90A is also true for GFX940. We need to clean it.
-  bool isGFX90A() const {
-    return AMDGPU::isGFX90A(getSTI());
-  }
-
-  bool isGFX940() const {
-    return AMDGPU::isGFX940(getSTI());
-  }
-
-  bool isGFX9Plus() const {
-    return AMDGPU::isGFX9Plus(getSTI());
-  }
-
-  bool isGFX10() const {
-    return AMDGPU::isGFX10(getSTI());
-  }
-
-  bool isGFX10Plus() const { return AMDGPU::isGFX10Plus(getSTI()); }
-
-  bool isGFX11() const {
-    return AMDGPU::isGFX11(getSTI());
-  }
-
-  bool isGFX11Plus() const {
-    return AMDGPU::isGFX11Plus(getSTI());
-  }
-
-  bool isGFX12() const { return AMDGPU::isGFX12(getSTI()); }
-
-  bool isGFX12Plus() const { return AMDGPU::isGFX12Plus(getSTI()); }
-
-  bool isGFX1250() const { return AMDGPU::isGFX1250(getSTI()); }
-
-  bool isGFX1250Plus() const { return AMDGPU::isGFX1250Plus(getSTI()); }
-
-  bool isGFX13() const { return AMDGPU::isGFX13(getSTI()); }
-
-  bool isGFX13Plus() const { return AMDGPU::isGFX13Plus(getSTI()); }
-
-  bool isGFX10_AEncoding() const { return AMDGPU::isGFX10_AEncoding(getSTI()); }
-
-  bool isGFX10_BEncoding() const {
-    return AMDGPU::isGFX10_BEncoding(getSTI());
-  }
-
-  bool isWave32() const { return getAvailableFeatures()[Feature_isWave32Bit]; }
-
-  bool isWave64() const { return getAvailableFeatures()[Feature_isWave64Bit]; }
-
-  bool hasInv2PiInlineImm() const {
-    return getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm];
-  }
-
-  bool has64BitLiterals() const {
-    return getFeatureBits()[AMDGPU::Feature64BitLiterals];
-  }
-
-  bool hasFlatOffsets() const {
-    return getFeatureBits()[AMDGPU::FeatureFlatInstOffsets];
-  }
-
-  bool hasTrue16Insts() const {
-    return getFeatureBits()[AMDGPU::FeatureTrue16BitInsts];
-  }
-
-  bool hasArchitectedFlatScratch() const {
-    return getFeatureBits()[AMDGPU::FeatureArchitectedFlatScratch];
-  }
-
-  bool hasSGPR102_SGPR103() const {
-    return !isVI() && !isGFX9();
-  }
-
-  bool hasSGPR104_SGPR105() const { return isGFX10Plus(); }
-
-  bool hasIntClamp() const {
-    return getFeatureBits()[AMDGPU::FeatureIntClamp];
-  }
-
-  bool hasPartialNSAEncoding() const {
-    return getFeatureBits()[AMDGPU::FeaturePartialNSAEncoding];
-  }
-
-  bool hasGloballyAddressableScratch() const {
-    return getFeatureBits()[AMDGPU::FeatureGloballyAddressableScratch];
-  }
-
-  unsigned getNSAMaxSize(bool HasSampler = false) const {
-    return AMDGPU::getNSAMaxSize(getSTI(), HasSampler);
-  }
-
-  unsigned getMaxNumUserSGPRs() const {
-    return AMDGPU::getMaxNumUserSGPRs(getSTI());
-  }
-
-  bool hasKernargPreload() const { return AMDGPU::hasKernargPreload(getSTI()); }
-
-  AMDGPUTargetStreamer &getTargetStreamer() {
-    MCTargetStreamer &TS = *getParser().getStreamer().getTargetStreamer();
-    return static_cast<AMDGPUTargetStreamer &>(TS);
-  }
-
-  MCContext &getContext() const {
-    // We need this const_cast because for some reason getContext() is not const
-    // in MCAsmParser.
-    return const_cast<AMDGPUAsmParser *>(this)->MCTargetAsmParser::getContext();
-  }
-
-  const MCRegisterInfo *getMRI() const {
-    return getContext().getRegisterInfo();
-  }
-
-  const MCInstrInfo *getMII() const {
-    return &MII;
-  }
-
-  // FIXME: This should not be used. Instead, should use queries derived from
-  // getAvailableFeatures().
-  const FeatureBitset &getFeatureBits() const {
-    return getSTI().getFeatureBits();
-  }
-
-  void setForcedEncodingSize(unsigned Size) { ForcedEncodingSize = Size; }
-  void setForcedDPP(bool ForceDPP_) { ForcedDPP = ForceDPP_; }
-  void setForcedSDWA(bool ForceSDWA_) { ForcedSDWA = ForceSDWA_; }
-
-  unsigned getForcedEncodingSize() const { return ForcedEncodingSize; }
-  bool isForcedVOP3() const { return ForcedEncodingSize == 64; }
-  bool isForcedDPP() const { return ForcedDPP; }
-  bool isForcedSDWA() const { return ForcedSDWA; }
-  ArrayRef<unsigned> getMatchedVariants() const;
-  StringRef getMatchedVariantName() const;
-
-  std::unique_ptr<AMDGPUOperand> parseRegister(bool RestoreOnFailure = false);
-  bool ParseRegister(MCRegister &RegNo, SMLoc &StartLoc, SMLoc &EndLoc,
-                     bool RestoreOnFailure);
-  bool parseRegister(MCRegister &Reg, SMLoc &StartLoc, SMLoc &EndLoc) override;
-  ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
-                               SMLoc &EndLoc) override;
-  unsigned checkTargetMatchPredicate(MCInst &Inst) override;
-  unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
-                                      unsigned Kind) override;
-  bool matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
-                               OperandVector &Operands, MCStreamer &Out,
-                               uint64_t &ErrorInfo,
-                               bool MatchingInlineAsm) override;
-  bool ParseDirective(AsmToken DirectiveID) override;
-  ParseStatus parseOperand(OperandVector &Operands, StringRef Mnemonic,
-                           OperandMode Mode = OperandMode_Default);
-  StringRef parseMnemonicSuffix(StringRef Name);
-  bool parseInstruction(ParseInstructionInfo &Info, StringRef Name,
-                        SMLoc NameLoc, OperandVector &Operands) override;
-  //bool ProcessInstruction(MCInst &Inst);
-
-  ParseStatus parseTokenOp(StringRef Name, OperandVector &Operands);
-
-  ParseStatus parseIntWithPrefix(const char *Prefix, int64_t &Int);
-
-  ParseStatus
-  parseIntWithPrefix(const char *Prefix, OperandVector &Operands,
-                     AMDGPUOperand::ImmTy ImmTy = AMDGPUOperand::ImmTyNone,
-                     std::function<bool(int64_t &)> ConvertResult = nullptr);
-
-  ParseStatus parseOperandArrayWithPrefix(
-      const char *Prefix, OperandVector &Operands,
-      AMDGPUOperand::ImmTy ImmTy = AMDGPUOperand::ImmTyNone,
-      bool (*ConvertResult)(int64_t &) = nullptr);
-
-  ParseStatus
-  parseNamedBit(StringRef Name, OperandVector &Operands,
-                AMDGPUOperand::ImmTy ImmTy = AMDGPUOperand::ImmTyNone,
-                bool IgnoreNegative = false);
-  unsigned getCPolKind(StringRef Id, StringRef Mnemo, bool &Disabling) const;
-  ParseStatus parseCPol(OperandVector &Operands);
-  ParseStatus parseScope(OperandVector &Operands, int64_t &Scope);
-  ParseStatus parseTH(OperandVector &Operands, int64_t &TH);
-  ParseStatus parseStringWithPrefix(StringRef Prefix, StringRef &Value,
-                                    SMLoc &StringLoc);
-  ParseStatus parseStringOrIntWithPrefix(OperandVector &Operands,
-                                         StringRef Name,
-                                         ArrayRef<const char *> Ids,
-                                         int64_t &IntVal);
-  ParseStatus parseStringOrIntWithPrefix(OperandVector &Operands,
-                                         StringRef Name,
-                                         ArrayRef<const char *> Ids,
-                                         AMDGPUOperand::ImmTy Type);
-
-  bool isModifier();
-  bool isOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const;
-  bool isRegOrOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const;
-  bool isNamedOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const;
-  bool isOpcodeModifierWithVal(const AsmToken &Token, const AsmToken &NextToken) const;
-  bool parseSP3NegModifier();
-  ParseStatus parseImm(OperandVector &Operands, bool HasSP3AbsModifier = false,
-                       LitModifier Lit = LitModifier::None);
-  ParseStatus parseReg(OperandVector &Operands);
-  ParseStatus parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod = false,
-                            LitModifier Lit = LitModifier::None);
-  ParseStatus parseRegOrImmWithFPInputMods(OperandVector &Operands,
-                                           bool AllowImm = true);
-  ParseStatus parseRegOrImmWithIntInputMods(OperandVector &Operands,
-                                            bool AllowImm = true);
-  ParseStatus parseRegWithFPInputMods(OperandVector &Operands);
-  ParseStatus parseRegWithIntInputMods(OperandVector &Operands);
-  ParseStatus parseVReg32OrOff(OperandVector &Operands);
-  ParseStatus tryParseIndexKey(OperandVector &Operands,
-                               AMDGPUOperand::ImmTy ImmTy);
-  ParseStatus parseIndexKey8bit(OperandVector &Operands);
-  ParseStatus parseIndexKey16bit(OperandVector &Operands);
-  ParseStatus parseIndexKey32bit(OperandVector &Operands);
-  ParseStatus tryParseMatrixFMT(OperandVector &Operands, StringRef Name,
-                                AMDGPUOperand::ImmTy Type);
-  ParseStatus parseMatrixAFMT(OperandVector &Operands);
-  ParseStatus parseMatrixBFMT(OperandVector &Operands);
-  ParseStatus tryParseMatrixScale(OperandVector &Operands, StringRef Name,
-                                  AMDGPUOperand::ImmTy Type);
-  ParseStatus parseMatrixAScale(OperandVector &Operands);
-  ParseStatus parseMatrixBScale(OperandVector &Operands);
-  ParseStatus tryParseMatrixScaleFmt(OperandVector &Operands, StringRef Name,
-                                     AMDGPUOperand::ImmTy Type);
-  ParseStatus parseMatrixAScaleFmt(OperandVector &Operands);
-  ParseStatus parseMatrixBScaleFmt(OperandVector &Operands);
-
-  ParseStatus parseDfmtNfmt(int64_t &Format);
-  ParseStatus parseUfmt(int64_t &Format);
-  ParseStatus parseSymbolicSplitFormat(StringRef FormatStr, SMLoc Loc,
-                                       int64_t &Format);
-  ParseStatus parseSymbolicUnifiedFormat(StringRef FormatStr, SMLoc Loc,
-                                         int64_t &Format);
-  ParseStatus parseFORMAT(OperandVector &Operands);
-  ParseStatus parseSymbolicOrNumericFormat(int64_t &Format);
-  ParseStatus parseNumericFormat(int64_t &Format);
-  ParseStatus parseFlatOffset(OperandVector &Operands);
-  ParseStatus parseR128A16(OperandVector &Operands);
-  ParseStatus parseBLGP(OperandVector &Operands);
-  bool tryParseFmt(const char *Pref, int64_t MaxVal, int64_t &Val);
-  bool matchDfmtNfmt(int64_t &Dfmt, int64_t &Nfmt, StringRef FormatStr, SMLoc Loc);
-
-  void cvtExp(MCInst &Inst, const OperandVector &Operands);
-
-  bool parseCnt(int64_t &IntVal);
-  ParseStatus parseSWaitCnt(OperandVector &Operands);
-
-  bool parseDepCtr(int64_t &IntVal, unsigned &Mask);
-  void depCtrError(SMLoc Loc, int ErrorId, StringRef DepCtrName);
-  ParseStatus parseDepCtr(OperandVector &Operands);
-
-  bool parseDelay(int64_t &Delay);
-  ParseStatus parseSDelayALU(OperandVector &Operands);
-
-  ParseStatus parseHwreg(OperandVector &Operands);
-
-private:
-  struct OperandInfoTy {
-    SMLoc Loc;
-    int64_t Val;
-    bool IsSymbolic = false;
-    bool IsDefined = false;
-
-    constexpr OperandInfoTy(int64_t Val) : Val(Val) {}
-  };
-
-  struct StructuredOpField : OperandInfoTy {
-    StringLiteral Id;
-    StringLiteral Desc;
-    unsigned Width;
-    bool IsDefined = false;
-
-    constexpr StructuredOpField(StringLiteral Id, StringLiteral Desc,
-                                unsigned Width, int64_t Default)
-        : OperandInfoTy(Default), Id(Id), Desc(Desc), Width(Width) {}
-    virtual ~StructuredOpField() = default;
-
-    bool Error(AMDGPUAsmParser &Parser, const Twine &Err) const {
-      Parser.Error(Loc, "invalid " + Desc + ": " + Err);
-      return false;
-    }
-
-    virtual bool validate(AMDGPUAsmParser &Parser) const {
-      if (IsSymbolic && Val == OPR_ID_UNSUPPORTED)
-        return Error(Parser, "not supported on this GPU");
-      if (!isUIntN(Width, Val))
-        return Error(Parser, "only " + Twine(Width) + "-bit values are legal");
-      return true;
-    }
-  };
-
-  ParseStatus parseStructuredOpFields(ArrayRef<StructuredOpField *> Fields);
-  bool validateStructuredOpFields(ArrayRef<const StructuredOpField *> Fields);
-
-  bool parseSendMsgBody(OperandInfoTy &Msg, OperandInfoTy &Op, OperandInfoTy &Stream);
-  bool validateSendMsg(const OperandInfoTy &Msg,
-                       const OperandInfoTy &Op,
-                       const OperandInfoTy &Stream);
-
-  ParseStatus parseHwregFunc(OperandInfoTy &HwReg, OperandInfoTy &Offset,
-                             OperandInfoTy &Width);
-
-  static SMLoc getLaterLoc(SMLoc a, SMLoc b);
-
-  SMLoc getFlatOffsetLoc(const OperandVector &Operands) const;
-  SMLoc getSMEMOffsetLoc(const OperandVector &Operands) const;
-  SMLoc getBLGPLoc(const OperandVector &Operands) const;
-
-  SMLoc getOperandLoc(const OperandVector &Operands, int MCOpIdx) const;
-  SMLoc getOperandLoc(std::function<bool(const AMDGPUOperand&)> Test,
-                      const OperandVector &Operands) const;
-  SMLoc getImmLoc(AMDGPUOperand::ImmTy Type,
-                  const OperandVector &Operands) const;
-  SMLoc getInstLoc(const OperandVector &Operands) const;
-
-  bool validateInstruction(const MCInst &Inst, SMLoc IDLoc,
-                           const OperandVector &Operands);
-  bool validateOffset(const MCInst &Inst, const OperandVector &Operands);
-  bool validateFlatOffset(const MCInst &Inst, const OperandVector &Operands);
-  bool validateSMEMOffset(const MCInst &Inst, const OperandVector &Operands);
-  bool validateSOPLiteral(const MCInst &Inst, const OperandVector &Operands);
-  bool validateConstantBusLimitations(const MCInst &Inst, const OperandVector &Operands);
-  std::optional<unsigned> checkVOPDRegBankConstraints(const MCInst &Inst,
-                                                      bool AsVOPD3);
-  bool validateVOPD(const MCInst &Inst, const OperandVector &Operands);
-  bool tryVOPD(const MCInst &Inst);
-  bool tryVOPD3(const MCInst &Inst);
-  bool tryAnotherVOPDEncoding(const MCInst &Inst);
-
-  bool validateIntClampSupported(const MCInst &Inst);
-  bool validateMIMGAtomicDMask(const MCInst &Inst);
-  bool validateMIMGGatherDMask(const MCInst &Inst);
-  bool validateMovrels(const MCInst &Inst, const OperandVector &Operands);
-  bool validateMIMGDataSize(const MCInst &Inst, SMLoc IDLoc);
-  bool validateMIMGAddrSize(const MCInst &Inst, SMLoc IDLoc);
-  bool validateMIMGD16(const MCInst &Inst);
-  bool validateMIMGDim(const MCInst &Inst, const OperandVector &Operands);
-  bool validateTensorR128(const MCInst &Inst);
-  bool validateMIMGMSAA(const MCInst &Inst);
-  bool validateOpSel(const MCInst &Inst);
-  bool validateTrue16OpSel(const MCInst &Inst);
-  bool validateNeg(const MCInst &Inst, AMDGPU::OpName OpName);
-  bool validateDPP(const MCInst &Inst, const OperandVector &Operands);
-  bool validateVccOperand(MCRegister Reg) const;
-  bool validateVOPLiteral(const MCInst &Inst, const OperandVector &Operands);
-  bool validateMAIAccWrite(const MCInst &Inst, const OperandVector &Operands);
-  bool validateMAISrc2(const MCInst &Inst, const OperandVector &Operands);
-  bool validateMFMA(const MCInst &Inst, const OperandVector &Operands);
-  bool validateAGPRLdSt(const MCInst &Inst) const;
-  bool validateVGPRAlign(const MCInst &Inst) const;
-  bool validateBLGP(const MCInst &Inst, const OperandVector &Operands);
-  bool validateDS(const MCInst &Inst, const OperandVector &Operands);
-  bool validateGWS(const MCInst &Inst, const OperandVector &Operands);
-  bool validateDivScale(const MCInst &Inst);
-  bool validateWaitCnt(const MCInst &Inst, const OperandVector &Operands);
-  bool validateCoherencyBits(const MCInst &Inst, const OperandVector &Operands,
-                             SMLoc IDLoc);
-  bool validateTHAndScopeBits(const MCInst &Inst, const OperandVector &Operands,
-                              const unsigned CPol);
-  bool validateTFE(const MCInst &Inst, const OperandVector &Operands);
-  bool validateLdsDirect(const MCInst &Inst, const OperandVector &Operands);
-  bool validateWMMA(const MCInst &Inst, const OperandVector &Operands);
-  unsigned getConstantBusLimit(unsigned Opcode) const;
-  bool usesConstantBus(const MCInst &Inst, unsigned OpIdx);
-  bool isInlineConstant(const MCInst &Inst, unsigned OpIdx) const;
-  MCRegister findImplicitSGPRReadInVOP(const MCInst &Inst) const;
-
-  bool isSupportedMnemo(StringRef Mnemo,
-                        const FeatureBitset &FBS);
-  bool isSupportedMnemo(StringRef Mnemo,
-                        const FeatureBitset &FBS,
-                        ArrayRef<unsigned> Variants);
-  bool checkUnsupportedInstruction(StringRef Name, SMLoc IDLoc);
-
-  bool isId(const StringRef Id) const;
-  bool isId(const AsmToken &Token, const StringRef Id) const;
-  bool isToken(const AsmToken::TokenKind Kind) const;
-  StringRef getId() const;
-  bool trySkipId(const StringRef Id);
-  bool trySkipId(const StringRef Pref, const StringRef Id);
-  bool trySkipId(const StringRef Id, const AsmToken::TokenKind Kind);
-  bool trySkipToken(const AsmToken::TokenKind Kind);
-  bool skipToken(const AsmToken::TokenKind Kind, const StringRef ErrMsg);
-  bool parseString(StringRef &Val, const StringRef ErrMsg = "expected a string");
-  bool parseId(StringRef &Val, const StringRef ErrMsg = "");
-
-  void peekTokens(MutableArrayRef<AsmToken> Tokens);
-  AsmToken::TokenKind getTokenKind() const;
-  bool parseExpr(int64_t &Imm, StringRef Expected = "");
-  bool parseExpr(OperandVector &Operands);
-  StringRef getTokenStr() const;
-  AsmToken peekToken(bool ShouldSkipSpace = true);
-  AsmToken getToken() const;
-  SMLoc getLoc() const;
-  void lex();
-
-public:
-  void onBeginOfFile() override;
-  bool parsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) override;
-
-  ParseStatus parseCustomOperand(OperandVector &Operands, unsigned MCK);
-
-  ParseStatus parseExpTgt(OperandVector &Operands);
-  ParseStatus parseSendMsg(OperandVector &Operands);
-  ParseStatus parseWaitEvent(OperandVector &Operands);
-  ParseStatus parseInterpSlot(OperandVector &Operands);
-  ParseStatus parseInterpAttr(OperandVector &Operands);
-  ParseStatus parseSOPPBrTarget(OperandVector &Operands);
-  ParseStatus parseBoolReg(OperandVector &Operands);
-
-  bool parseSwizzleOperand(int64_t &Op, const unsigned MinVal,
-                           const unsigned MaxVal, const Twine &ErrMsg,
-                           SMLoc &Loc);
-  bool parseSwizzleOperands(const unsigned OpNum, int64_t* Op,
-                            const unsigned MinVal,
-                            const unsigned MaxVal,
-                            const StringRef ErrMsg);
-  ParseStatus parseSwizzle(OperandVector &Operands);
-  bool parseSwizzleOffset(int64_t &Imm);
-  bool parseSwizzleMacro(int64_t &Imm);
-  bool parseSwizzleQuadPerm(int64_t &Imm);
-  bool parseSwizzleBitmaskPerm(int64_t &Imm);
-  bool parseSwizzleBroadcast(int64_t &Imm);
-  bool parseSwizzleSwap(int64_t &Imm);
-  bool parseSwizzleReverse(int64_t &Imm);
-  bool parseSwizzleFFT(int64_t &Imm);
-  bool parseSwizzleRotate(int64_t &Imm);
-
-  ParseStatus parseGPRIdxMode(OperandVector &Operands);
-  int64_t parseGPRIdxMacro();
-
-  void cvtMubuf(MCInst &Inst, const OperandVector &Operands) { cvtMubufImpl(Inst, Operands, false); }
-  void cvtMubufAtomic(MCInst &Inst, const OperandVector &Operands) { cvtMubufImpl(Inst, Operands, true); }
-
-  ParseStatus parseOModSI(OperandVector &Operands);
-
-  void cvtVOP3(MCInst &Inst, const OperandVector &Operands,
-               OptionalImmIndexMap &OptionalIdx);
-  void cvtScaledMFMA(MCInst &Inst, const OperandVector &Operands);
-  void cvtVOP3OpSel(MCInst &Inst, const OperandVector &Operands);
-  void cvtVOP3(MCInst &Inst, const OperandVector &Operands);
-  void cvtVOP3P(MCInst &Inst, const OperandVector &Operands);
-  void cvtSWMMAC(MCInst &Inst, const OperandVector &Operands);
-
-  void cvtVOPD(MCInst &Inst, const OperandVector &Operands);
-  void cvtVOP3OpSel(MCInst &Inst, const OperandVector &Operands,
-                    OptionalImmIndexMap &OptionalIdx);
-  void cvtVOP3P(MCInst &Inst, const OperandVector &Operands,
-                OptionalImmIndexMap &OptionalIdx);
-
-  void cvtVOP3Interp(MCInst &Inst, const OperandVector &Operands);
-  void cvtVINTERP(MCInst &Inst, const OperandVector &Operands);
-  void cvtOpSelHelper(MCInst &Inst, unsigned OpSel);
-
-  bool parseDimId(unsigned &Encoding);
-  ParseStatus parseDim(OperandVector &Operands);
-  bool convertDppBoundCtrl(int64_t &BoundCtrl);
-  ParseStatus parseDPP8(OperandVector &Operands);
-  ParseStatus parseDPPCtrl(OperandVector &Operands);
-  bool isSupportedDPPCtrl(StringRef Ctrl, const OperandVector &Operands);
-  int64_t parseDPPCtrlSel(StringRef Ctrl);
-  int64_t parseDPPCtrlPerm();
-  void cvtDPP(MCInst &Inst, const OperandVector &Operands, bool IsDPP8 = false);
-  void cvtDPP8(MCInst &Inst, const OperandVector &Operands) {
-    cvtDPP(Inst, Operands, true);
-  }
-  void cvtVOP3DPP(MCInst &Inst, const OperandVector &Operands,
-                  bool IsDPP8 = false);
-  void cvtVOP3DPP8(MCInst &Inst, const OperandVector &Operands) {
-    cvtVOP3DPP(Inst, Operands, true);
-  }
-
-  ParseStatus parseSDWASel(OperandVector &Operands, StringRef Prefix,
-                           AMDGPUOperand::ImmTy Type);
-  ParseStatus parseSDWADstUnused(OperandVector &Operands);
-  void cvtSdwaVOP1(MCInst &Inst, const OperandVector &Operands);
-  void cvtSdwaVOP2(MCInst &Inst, const OperandVector &Operands);
-  void cvtSdwaVOP2b(MCInst &Inst, const OperandVector &Operands);
-  void cvtSdwaVOP2e(MCInst &Inst, const OperandVector &Operands);
-  void cvtSdwaVOPC(MCInst &Inst, const OperandVector &Operands);
-  void cvtSDWA(MCInst &Inst, const OperandVector &Operands,
-               uint64_t BasicInstType,
-               bool SkipDstVcc = false,
-               bool SkipSrcVcc = false);
-
-  ParseStatus parseEndpgm(OperandVector &Operands);
-
-  ParseStatus parseVOPD(OperandVector &Operands);
-};
-
-} // end anonymous namespace
-
-// May be called with integer type with equivalent bitwidth.
-static const fltSemantics *getFltSemantics(unsigned Size) {
-  switch (Size) {
-  case 4:
-    return &APFloat::IEEEsingle();
-  case 8:
-    return &APFloat::IEEEdouble();
-  case 2:
-    return &APFloat::IEEEhalf();
-  default:
-    llvm_unreachable("unsupported fp type");
-  }
-}
-
-static const fltSemantics *getFltSemantics(MVT VT) {
-  return getFltSemantics(VT.getSizeInBits() / 8);
-}
-
-static const fltSemantics *getOpFltSemantics(uint8_t OperandType) {
-  switch (OperandType) {
-  // When floating-point immediate is used as operand of type i16, the 32-bit
-   // representation of the constant truncated to the 16 LSBs should be used.
-  case AMDGPU::OPERAND_REG_IMM_INT16:
-  case AMDGPU::OPERAND_REG_INLINE_C_INT16:
-  case AMDGPU::OPERAND_REG_IMM_INT32:
-  case AMDGPU::OPERAND_REG_IMM_FP32:
-  case AMDGPU::OPERAND_REG_INLINE_C_INT32:
-  case AMDGPU::OPERAND_REG_INLINE_C_FP32:
-  case AMDGPU::OPERAND_REG_INLINE_AC_INT32:
-  case AMDGPU::OPERAND_REG_INLINE_AC_FP32:
-  case AMDGPU::OPERAND_REG_IMM_V2FP32:
-  case AMDGPU::OPERAND_REG_IMM_V2INT32:
-  case AMDGPU::OPERAND_REG_IMM_V2INT16:
-  case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
-  case AMDGPU::OPERAND_KIMM32:
-  case AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32:
-    return &APFloat::IEEEsingle();
-  case AMDGPU::OPERAND_REG_IMM_I64:
-  case AMDGPU::OPERAND_REG_IMM_U64:
-  case AMDGPU::OPERAND_REG_IMM_FP64:
-  case AMDGPU::OPERAND_REG_INLINE_C_INT64:
-  case AMDGPU::OPERAND_REG_INLINE_C_FP64:
-  case AMDGPU::OPERAND_REG_INLINE_AC_FP64:
-  case AMDGPU::OPERAND_KIMM64:
-    return &APFloat::IEEEdouble();
-  case AMDGPU::OPERAND_REG_IMM_FP16:
-  case AMDGPU::OPERAND_REG_INLINE_C_FP16:
-  case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
-  case AMDGPU::OPERAND_REG_IMM_V2FP16:
-  case AMDGPU::OPERAND_REG_IMM_V2FP16_SPLAT:
-  case AMDGPU::OPERAND_REG_IMM_NOINLINE_V2FP16:
-  case AMDGPU::OPERAND_KIMM16:
-    return &APFloat::IEEEhalf();
-  case AMDGPU::OPERAND_REG_IMM_BF16:
-  case AMDGPU::OPERAND_REG_INLINE_C_BF16:
-  case AMDGPU::OPERAND_REG_INLINE_C_V2BF16:
-  case AMDGPU::OPERAND_REG_IMM_V2BF16:
-    return &APFloat::BFloat();
-  default:
-    llvm_unreachable("unsupported fp type");
-  }
-}
-
-//===----------------------------------------------------------------------===//
-// Operand
-//===----------------------------------------------------------------------===//
-
-static bool canLosslesslyConvertToFPType(APFloat &FPLiteral, MVT VT) {
-  bool Lost;
-
-  // Convert literal to single precision
-  APFloat::opStatus Status = FPLiteral.convert(*getFltSemantics(VT),
-                                               APFloat::rmNearestTiesToEven,
-                                               &Lost);
-  // We allow precision lost but not overflow or underflow
-  if (Status != APFloat::opOK &&
-      Lost &&
-      ((Status & APFloat::opOverflow)  != 0 ||
-       (Status & APFloat::opUnderflow) != 0)) {
-    return false;
-  }
-
-  return true;
-}
-
-static bool isSafeTruncation(int64_t Val, unsigned Size) {
-  return isUIntN(Size, Val) || isIntN(Size, Val);
-}
-
-static bool isInlineableLiteralOp16(int64_t Val, MVT VT, bool HasInv2Pi) {
-  if (VT.getScalarType() == MVT::i16)
-    return isInlinableLiteral32(Val, HasInv2Pi);
-
-  if (VT.getScalarType() == MVT::f16)
-    return AMDGPU::isInlinableLiteralFP16(Val, HasInv2Pi);
-
-  assert(VT.getScalarType() == MVT::bf16);
-
-  return AMDGPU::isInlinableLiteralBF16(Val, HasInv2Pi);
-}
-
-bool AMDGPUOperand::isInlinableImm(MVT type) const {
-
-  // This is a hack to enable named inline values like
-  // shared_base with both 32-bit and 64-bit operands.
-  // Note that these values are defined as
-  // 32-bit operands only.
-  if (isInlineValue()) {
-    return true;
-  }
-
-  if (!isImmTy(ImmTyNone)) {
-    // Only plain immediates are inlinable (e.g. "clamp" attribute is not)
-    return false;
-  }
-
-  if (getModifiers().Lit != LitModifier::None)
-    return false;
-
-  // TODO: We should avoid using host float here. It would be better to
-  // check the float bit values which is what a few other places do.
-  // We've had bot failures before due to weird NaN support on mips hosts.
-
-  APInt Literal(64, Imm.Val);
-
-  if (Imm.IsFPImm) { // We got fp literal token
-    if (type == MVT::f64 || type == MVT::i64) { // Expected 64-bit operand
-      return AMDGPU::isInlinableLiteral64(Imm.Val,
-                                          AsmParser->hasInv2PiInlineImm());
-    }
-
-    APFloat FPLiteral(APFloat::IEEEdouble(), APInt(64, Imm.Val));
-    if (!canLosslesslyConvertToFPType(FPLiteral, type))
-      return false;
-
-    if (type.getScalarSizeInBits() == 16) {
-      bool Lost = false;
-      switch (type.getScalarType().SimpleTy) {
-      default:
-        llvm_unreachable("unknown 16-bit type");
-      case MVT::bf16:
-        FPLiteral.convert(APFloatBase::BFloat(), APFloat::rmNearestTiesToEven,
-                          &Lost);
-        break;
-      case MVT::f16:
-        FPLiteral.convert(APFloatBase::IEEEhalf(), APFloat::rmNearestTiesToEven,
-                          &Lost);
-        break;
-      case MVT::i16:
-        FPLiteral.convert(APFloatBase::IEEEsingle(),
-                          APFloat::rmNearestTiesToEven, &Lost);
-        break;
-      }
-      // We need to use 32-bit representation here because when a floating-point
-      // inline constant is used as an i16 operand, its 32-bit representation
-      // representation will be used. We will need the 32-bit value to check if
-      // it is FP inline constant.
-      uint32_t ImmVal = FPLiteral.bitcastToAPInt().getZExtValue();
-      return isInlineableLiteralOp16(ImmVal, type,
-                                     AsmParser->hasInv2PiInlineImm());
-    }
-
-    // Check if single precision literal is inlinable
-    return AMDGPU::isInlinableLiteral32(
-      static_cast<int32_t>(FPLiteral.bitcastToAPInt().getZExtValue()),
-      AsmParser->hasInv2PiInlineImm());
-  }
-
-  // We got int literal token.
-  if (type == MVT::f64 || type == MVT::i64) { // Expected 64-bit operand
-    return AMDGPU::isInlinableLiteral64(Imm.Val,
-                                        AsmParser->hasInv2PiInlineImm());
-  }
-
-  if (!isSafeTruncation(Imm.Val, type.getScalarSizeInBits())) {
-    return false;
-  }
-
-  if (type.getScalarSizeInBits() == 16) {
-    return isInlineableLiteralOp16(
-      static_cast<int16_t>(Literal.getLoBits(16).getSExtValue()),
-      type, AsmParser->hasInv2PiInlineImm());
-  }
-
-  return AMDGPU::isInlinableLiteral32(
-    static_cast<int32_t>(Literal.getLoBits(32).getZExtValue()),
-    AsmParser->hasInv2PiInlineImm());
-}
-
-bool AMDGPUOperand::isLiteralImm(MVT type) const {
-  // Check that this immediate can be added as literal
-  if (!isImmTy(ImmTyNone)) {
-    return false;
-  }
-
-  bool Allow64Bit =
-      (type == MVT::i64 || type == MVT::f64) && AsmParser->has64BitLiterals();
-
-  if (!Imm.IsFPImm) {
-    // We got int literal token.
-
-    if (type == MVT::f64 && hasFPModifiers()) {
-      // Cannot apply fp modifiers to int literals preserving the same semantics
-      // for VOP1/2/C and VOP3 because of integer truncation. To avoid ambiguity,
-      // disable these cases.
-      return false;
-    }
-
-    unsigned Size = type.getSizeInBits();
-    if (Size == 64) {
-      if (Allow64Bit && !AMDGPU::isValid32BitLiteral(Imm.Val, false))
-        return true;
-      Size = 32;
-    }
-
-    // FIXME: 64-bit operands can zero extend, sign extend, or pad zeroes for FP
-    // types.
-    return isSafeTruncation(Imm.Val, Size);
-  }
-
-  // We got fp literal token
-  if (type == MVT::f64) { // Expected 64-bit fp operand
-    // We would set low 64-bits of literal to zeroes but we accept this literals
-    return true;
-  }
-
-  if (type == MVT::i64) { // Expected 64-bit int operand
-    // We don't allow fp literals in 64-bit integer instructions. It is
-    // unclear how we should encode them.
-    return false;
-  }
-
-  // We allow fp literals with f16x2 operands assuming that the specified
-  // literal goes into the lower half and the upper half is zero. We also
-  // require that the literal may be losslessly converted to f16.
-  //
-  // For i16x2 operands, we assume that the specified literal is encoded as a
-  // single-precision float. This is pretty odd, but it matches SP3 and what
-  // happens in hardware.
-  MVT ExpectedType = (type == MVT::v2f16)   ? MVT::f16
-                     : (type == MVT::v2i16) ? MVT::f32
-                     : (type == MVT::v2f32) ? MVT::f32
-                                            : type;
-
-  APFloat FPLiteral(APFloat::IEEEdouble(), APInt(64, Imm.Val));
-  return canLosslesslyConvertToFPType(FPLiteral, ExpectedType);
-}
-
-bool AMDGPUOperand::isRegClass(unsigned RCID) const {
-  return isRegKind() && AsmParser->getMRI()->getRegClass(RCID).contains(getReg());
-}
-
-bool AMDGPUOperand::isVRegWithInputMods() const {
-  return isRegClass(AMDGPU::VGPR_32RegClassID) ||
-         // GFX90A allows DPP on 64-bit operands.
-         (isRegClass(AMDGPU::VReg_64RegClassID) &&
-          AsmParser->getFeatureBits()[AMDGPU::FeatureDPALU_DPP]);
-}
-
-template <bool IsFake16>
-bool AMDGPUOperand::isT16_Lo128VRegWithInputMods() const {
-  return isRegClass(IsFake16 ? AMDGPU::VGPR_32_Lo128RegClassID
-                             : AMDGPU::VGPR_16_Lo128RegClassID);
-}
-
-template <bool IsFake16> bool AMDGPUOperand::isT16VRegWithInputMods() const {
-  return isRegClass(IsFake16 ? AMDGPU::VGPR_32RegClassID
-                             : AMDGPU::VGPR_16RegClassID);
-}
-
-bool AMDGPUOperand::isSDWAOperand(MVT type) const {
-  if (AsmParser->isVI())
-    return isVReg32();
-  if (AsmParser->isGFX9Plus())
-    return isRegClass(AMDGPU::VS_32RegClassID) || isInlinableImm(type);
-  return false;
-}
-
-bool AMDGPUOperand::isSDWAFP16Operand() const {
-  return isSDWAOperand(MVT::f16);
-}
-
-bool AMDGPUOperand::isSDWAFP32Operand() const {
-  return isSDWAOperand(MVT::f32);
-}
-
-bool AMDGPUOperand::isSDWAInt16Operand() const {
-  return isSDWAOperand(MVT::i16);
-}
-
-bool AMDGPUOperand::isSDWAInt32Operand() const {
-  return isSDWAOperand(MVT::i32);
-}
-
-bool AMDGPUOperand::isBoolReg() const {
-  return isReg() && ((AsmParser->isWave64() && isSCSrc_b64()) ||
-                     (AsmParser->isWave32() && isSCSrc_b32()));
-}
-
-uint64_t AMDGPUOperand::applyInputFPModifiers(uint64_t Val, unsigned Size) const
-{
-  assert(isImmTy(ImmTyNone) && Imm.Mods.hasFPModifiers());
-  assert(Size == 2 || Size == 4 || Size == 8);
-
-  const uint64_t FpSignMask = (1ULL << (Size * 8 - 1));
-
-  if (Imm.Mods.Abs) {
-    Val &= ~FpSignMask;
-  }
-  if (Imm.Mods.Neg) {
-    Val ^= FpSignMask;
-  }
-
-  return Val;
-}
-
-void AMDGPUOperand::addImmOperands(MCInst &Inst, unsigned N, bool ApplyModifiers) const {
-  MCOpIdx = Inst.getNumOperands();
-
-  if (isExpr()) {
-    Inst.addOperand(MCOperand::createExpr(Expr));
-    return;
-  }
-
-  if (AMDGPU::isSISrcOperand(AsmParser->getMII()->get(Inst.getOpcode()),
-                             Inst.getNumOperands())) {
-    addLiteralImmOperand(Inst, Imm.Val,
-                         ApplyModifiers &
-                         isImmTy(ImmTyNone) && Imm.Mods.hasFPModifiers());
-  } else {
-    assert(!isImmTy(ImmTyNone) || !hasModifiers());
-    Inst.addOperand(MCOperand::createImm(Imm.Val));
-  }
-}
-
-void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyModifiers) const {
-  const auto& InstDesc = AsmParser->getMII()->get(Inst.getOpcode());
-  auto OpNum = Inst.getNumOperands();
-  // Check that this operand accepts literals
-  assert(AMDGPU::isSISrcOperand(InstDesc, OpNum));
-
-  if (ApplyModifiers) {
-    assert(AMDGPU::isSISrcFPOperand(InstDesc, OpNum));
-    const unsigned Size = Imm.IsFPImm ? sizeof(double) : getOperandSize(InstDesc, OpNum);
-    Val = applyInputFPModifiers(Val, Size);
-  }
-
-  APInt Literal(64, Val);
-  uint8_t OpTy = InstDesc.operands()[OpNum].OperandType;
-
-  bool CanUse64BitLiterals =
-      AsmParser->has64BitLiterals() &&
-      !(InstDesc.TSFlags & (SIInstrFlags::VOP3 | SIInstrFlags::VOP3P));
-  LitModifier Lit = getModifiers().Lit;
-  MCContext &Ctx = AsmParser->getContext();
-
-  if (Imm.IsFPImm) { // We got fp literal token
-    switch (OpTy) {
-    case AMDGPU::OPERAND_REG_IMM_I64:
-    case AMDGPU::OPERAND_REG_IMM_U64:
-    case AMDGPU::OPERAND_REG_IMM_FP64:
-    case AMDGPU::OPERAND_REG_INLINE_C_INT64:
-    case AMDGPU::OPERAND_REG_INLINE_C_FP64:
-    case AMDGPU::OPERAND_REG_INLINE_AC_FP64:
-      if (Lit == LitModifier::None &&
-          AMDGPU::isInlinableLiteral64(Literal.getZExtValue(),
-                                       AsmParser->hasInv2PiInlineImm())) {
-        Inst.addOperand(MCOperand::createImm(Literal.getZExtValue()));
-        return;
-      }
-
-      // Non-inlineable
-      if (AMDGPU::isSISrcFPOperand(InstDesc,
-                                   OpNum)) { // Expected 64-bit fp operand
-        bool HasMandatoryLiteral =
-            AMDGPU::hasNamedOperand(Inst.getOpcode(), AMDGPU::OpName::imm);
-        // For fp operands we check if low 32 bits are zeros
-        if (Literal.getLoBits(32) != 0 &&
-            (InstDesc.getSize() != 4 || !AsmParser->has64BitLiterals()) &&
-            !HasMandatoryLiteral) {
-          const_cast<AMDGPUAsmParser *>(AsmParser)->Warning(
-              Inst.getLoc(),
-              "Can't encode literal as exact 64-bit floating-point operand. "
-              "Low 32-bits will be set to zero");
-          Val &= 0xffffffff00000000u;
-        }
-
-        if ((OpTy == AMDGPU::OPERAND_REG_IMM_FP64 ||
-             OpTy == AMDGPU::OPERAND_REG_INLINE_C_FP64 ||
-             OpTy == AMDGPU::OPERAND_REG_INLINE_AC_FP64)) {
-          if (CanUse64BitLiterals && Lit == LitModifier::None &&
-              (isInt<32>(Val) || isUInt<32>(Val))) {
-            // The floating-point operand will be verbalized as an
-            // integer one. If that integer happens to fit 32 bits, on
-            // re-assembling it will be intepreted as the high half of
-            // the actual value, so we have to wrap it into lit64().
-            Lit = LitModifier::Lit64;
-          } else if (Lit == LitModifier::Lit) {
-            // For FP64 operands lit() specifies the high half of the value.
-            Val = Hi_32(Val);
-          }
-        }
-        break;
-      }
-
-      // We don't allow fp literals in 64-bit integer instructions. It is
-      // unclear how we should encode them. This case should be checked earlier
-      // in predicate methods (isLiteralImm())
-      llvm_unreachable("fp literal in 64-bit integer instruction.");
-
-    case AMDGPU::OPERAND_KIMM64:
-      if (CanUse64BitLiterals && Lit == LitModifier::None &&
-          (isInt<32>(Val) || isUInt<32>(Val)))
-        Lit = LitModifier::Lit64;
-      break;
-
-    case AMDGPU::OPERAND_REG_IMM_BF16:
-    case AMDGPU::OPERAND_REG_INLINE_C_BF16:
-    case AMDGPU::OPERAND_REG_INLINE_C_V2BF16:
-    case AMDGPU::OPERAND_REG_IMM_V2BF16:
-      if (Lit == LitModifier::None && AsmParser->hasInv2PiInlineImm() &&
-          Literal == 0x3fc45f306725feed) {
-        // This is the 1/(2*pi) which is going to be truncated to bf16 with the
-        // loss of precision. The constant represents ideomatic fp32 value of
-        // 1/(2*pi) = 0.15915494 since bf16 is in fact fp32 with cleared low 16
-        // bits. Prevent rounding below.
-        Inst.addOperand(MCOperand::createImm(0x3e22));
-        return;
-      }
-      [[fallthrough]];
-
-    case AMDGPU::OPERAND_REG_IMM_INT32:
-    case AMDGPU::OPERAND_REG_IMM_FP32:
-    case AMDGPU::OPERAND_REG_INLINE_C_INT32:
-    case AMDGPU::OPERAND_REG_INLINE_C_FP32:
-    case AMDGPU::OPERAND_REG_INLINE_AC_INT32:
-    case AMDGPU::OPERAND_REG_INLINE_AC_FP32:
-    case AMDGPU::OPERAND_REG_IMM_INT16:
-    case AMDGPU::OPERAND_REG_IMM_FP16:
-    case AMDGPU::OPERAND_REG_INLINE_C_INT16:
-    case AMDGPU::OPERAND_REG_INLINE_C_FP16:
-    case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
-    case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
-    case AMDGPU::OPERAND_REG_IMM_V2INT16:
-    case AMDGPU::OPERAND_REG_IMM_V2FP16:
-    case AMDGPU::OPERAND_REG_IMM_V2FP16_SPLAT:
-    case AMDGPU::OPERAND_REG_IMM_NOINLINE_V2FP16:
-    case AMDGPU::OPERAND_REG_IMM_V2FP32:
-    case AMDGPU::OPERAND_REG_IMM_V2INT32:
-    case AMDGPU::OPERAND_KIMM32:
-    case AMDGPU::OPERAND_KIMM16:
-    case AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32: {
-      bool lost;
-      APFloat FPLiteral(APFloat::IEEEdouble(), Literal);
-      // Convert literal to single precision
-      FPLiteral.convert(*getOpFltSemantics(OpTy),
-                        APFloat::rmNearestTiesToEven, &lost);
-      // We allow precision lost but not overflow or underflow. This should be
-      // checked earlier in isLiteralImm()
-
-      Val = FPLiteral.bitcastToAPInt().getZExtValue();
-      break;
-    }
-    default:
-      llvm_unreachable("invalid operand size");
-    }
-
-    if (Lit != LitModifier::None) {
-      Inst.addOperand(
-          MCOperand::createExpr(AMDGPUMCExpr::createLit(Lit, Val, Ctx)));
-    } else {
-      Inst.addOperand(MCOperand::createImm(Val));
-    }
-    return;
-  }
-
-  // We got int literal token.
-  // Only sign extend inline immediates.
-  switch (OpTy) {
-  case AMDGPU::OPERAND_REG_IMM_INT32:
-  case AMDGPU::OPERAND_REG_IMM_FP32:
-  case AMDGPU::OPERAND_REG_INLINE_C_INT32:
-  case AMDGPU::OPERAND_REG_INLINE_C_FP32:
-  case AMDGPU::OPERAND_REG_INLINE_AC_INT32:
-  case AMDGPU::OPERAND_REG_INLINE_AC_FP32:
-  case AMDGPU::OPERAND_REG_IMM_V2INT16:
-  case AMDGPU::OPERAND_REG_IMM_V2BF16:
-  case AMDGPU::OPERAND_REG_IMM_V2FP16:
-  case AMDGPU::OPERAND_REG_IMM_V2FP16_SPLAT:
-  case AMDGPU::OPERAND_REG_IMM_V2FP32:
-  case AMDGPU::OPERAND_REG_IMM_V2INT32:
-  case AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32:
-  case AMDGPU::OPERAND_REG_IMM_NOINLINE_V2FP16:
-    break;
-
-  case AMDGPU::OPERAND_REG_IMM_I64:
-  case AMDGPU::OPERAND_REG_IMM_U64:
-  case AMDGPU::OPERAND_REG_INLINE_C_INT64:
-    if (Lit == LitModifier::None &&
-        AMDGPU::isInlinableLiteral64(Val, AsmParser->hasInv2PiInlineImm())) {
-      Inst.addOperand(MCOperand::createImm(Val));
-      return;
-    }
-
-    // When the 32 MSBs are not zero (effectively means it can't be safely
-    // truncated to uint32_t), if the target doesn't support 64-bit literals, or
-    // the lit modifier is explicitly used, we need to truncate it to the 32
-    // LSBs.
-    if (!AsmParser->has64BitLiterals() || Lit == LitModifier::Lit)
-      Val = Lo_32(Val);
-    break;
-
-  case AMDGPU::OPERAND_REG_IMM_FP64:
-  case AMDGPU::OPERAND_REG_INLINE_C_FP64:
-  case AMDGPU::OPERAND_REG_INLINE_AC_FP64:
-    if (Lit == LitModifier::None &&
-        AMDGPU::isInlinableLiteral64(Val, AsmParser->hasInv2PiInlineImm())) {
-      Inst.addOperand(MCOperand::createImm(Val));
-      return;
-    }
-
-    // If the target doesn't support 64-bit literals, we need to use the
-    // constant as the high 32 MSBs of a double-precision floating point value.
-    if (!AsmParser->has64BitLiterals()) {
-      Val = static_cast<uint64_t>(Val) << 32;
-    } else {
-      // Now the target does support 64-bit literals, there are two cases
-      // where we still want to use src_literal encoding:
-      // 1) explicitly forced by using lit modifier;
-      // 2) the value is a valid 32-bit representation (signed or unsigned),
-      // meanwhile not forced by lit64 modifier.
-      if (Lit == LitModifier::Lit ||
-          (Lit != LitModifier::Lit64 && (isInt<32>(Val) || isUInt<32>(Val))))
-        Val = static_cast<uint64_t>(Val) << 32;
-    }
-
-    // For FP64 operands lit() specifies the high half of the value.
-    if (Lit == LitModifier::Lit)
-      Val = Hi_32(Val);
-    break;
-
-  case AMDGPU::OPERAND_REG_IMM_INT16:
-  case AMDGPU::OPERAND_REG_INLINE_C_INT16:
-  case AMDGPU::OPERAND_REG_INLINE_C_FP16:
-  case AMDGPU::OPERAND_REG_IMM_FP16:
-  case AMDGPU::OPERAND_REG_IMM_BF16:
-  case AMDGPU::OPERAND_REG_INLINE_C_BF16:
-  case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
-  case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
-  case AMDGPU::OPERAND_REG_INLINE_C_V2BF16:
-  case AMDGPU::OPERAND_KIMM32:
-  case AMDGPU::OPERAND_KIMM16:
-    break;
-
-  case AMDGPU::OPERAND_KIMM64:
-    if ((isInt<32>(Val) || isUInt<32>(Val)) && Lit != LitModifier::Lit64)
-      Val <<= 32;
-    break;
-
-  default:
-    llvm_unreachable("invalid operand type");
-  }
-
-  if (Lit != LitModifier::None) {
-    Inst.addOperand(
-        MCOperand::createExpr(AMDGPUMCExpr::createLit(Lit, Val, Ctx)));
-  } else {
-    Inst.addOperand(MCOperand::createImm(Val));
-  }
-}
-
-void AMDGPUOperand::addRegOperands(MCInst &Inst, unsigned N) const {
-  MCOpIdx = Inst.getNumOperands();
-  Inst.addOperand(MCOperand::createReg(AMDGPU::getMCReg(getReg(), AsmParser->getSTI())));
-}
-
-bool AMDGPUOperand::isInlineValue() const {
-  return isRegKind() && ::isInlineValue(getReg());
-}
-
-//===----------------------------------------------------------------------===//
-// AsmParser
-//===----------------------------------------------------------------------===//
-
-void AMDGPUAsmParser::createConstantSymbol(StringRef Id, int64_t Val) {
-  // TODO: make those pre-defined variables read-only.
-  // Currently there is none suitable machinery in the core llvm-mc for this.
-  // MCSymbol::isRedefinable is intended for another purpose, and
-  // AsmParser::parseDirectiveSet() cannot be specialized for specific target.
-  MCContext &Ctx = getContext();
-  MCSymbol *Sym = Ctx.getOrCreateSymbol(Id);
-  Sym->setVariableValue(MCConstantExpr::create(Val, Ctx));
-}
-
-static int getRegClass(RegisterKind Is, unsigned RegWidth) {
-  if (Is == IS_VGPR) {
-    switch (RegWidth) {
-      default: return -1;
-      case 32:
-        return AMDGPU::VGPR_32RegClassID;
-      case 64:
-        return AMDGPU::VReg_64RegClassID;
-      case 96:
-        return AMDGPU::VReg_96RegClassID;
-      case 128:
-        return AMDGPU::VReg_128RegClassID;
-      case 160:
-        return AMDGPU::VReg_160RegClassID;
-      case 192:
-        return AMDGPU::VReg_192RegClassID;
-      case 224:
-        return AMDGPU::VReg_224RegClassID;
-      case 256:
-        return AMDGPU::VReg_256RegClassID;
-      case 288:
-        return AMDGPU::VReg_288RegClassID;
-      case 320:
-        return AMDGPU::VReg_320RegClassID;
-      case 352:
-        return AMDGPU::VReg_352RegClassID;
-      case 384:
-        return AMDGPU::VReg_384RegClassID;
-      case 512:
-        return AMDGPU::VReg_512RegClassID;
-      case 1024:
-        return AMDGPU::VReg_1024RegClassID;
-    }
-  } else if (Is == IS_TTMP) {
-    switch (RegWidth) {
-      default: return -1;
-      case 32:
-        return AMDGPU::TTMP_32RegClassID;
-      case 64:
-        return AMDGPU::TTMP_64RegClassID;
-      case 128:
-        return AMDGPU::TTMP_128RegClassID;
-      case 256:
-        return AMDGPU::TTMP_256RegClassID;
-      case 512:
-        return AMDGPU::TTMP_512RegClassID;
-    }
-  } else if (Is == IS_SGPR) {
-    switch (RegWidth) {
-      default: return -1;
-      case 32:
-        return AMDGPU::SGPR_32RegClassID;
-      case 64:
-        return AMDGPU::SGPR_64RegClassID;
-      case 96:
-        return AMDGPU::SGPR_96RegClassID;
-      case 128:
-        return AMDGPU::SGPR_128RegClassID;
-      case 160:
-        return AMDGPU::SGPR_160RegClassID;
-      case 192:
-        return AMDGPU::SGPR_192RegClassID;
-      case 224:
-        return AMDGPU::SGPR_224RegClassID;
-      case 256:
-        return AMDGPU::SGPR_256RegClassID;
-      case 288:
-        return AMDGPU::SGPR_288RegClassID;
-      case 320:
-        return AMDGPU::SGPR_320RegClassID;
-      case 352:
-        return AMDGPU::SGPR_352RegClassID;
-      case 384:
-        return AMDGPU::SGPR_384RegClassID;
-      case 512:
-        return AMDGPU::SGPR_512RegClassID;
-    }
-  } else if (Is == IS_AGPR) {
-    switch (RegWidth) {
-      default: return -1;
-      case 32:
-        return AMDGPU::AGPR_32RegClassID;
-      case 64:
-        return AMDGPU::AReg_64RegClassID;
-      case 96:
-        return AMDGPU::AReg_96RegClassID;
-      case 128:
-        return AMDGPU::AReg_128RegClassID;
-      case 160:
-        return AMDGPU::AReg_160RegClassID;
-      case 192:
-        return AMDGPU::AReg_192RegClassID;
-      case 224:
-        return AMDGPU::AReg_224RegClassID;
-      case 256:
-        return AMDGPU::AReg_256RegClassID;
-      case 288:
-        return AMDGPU::AReg_288RegClassID;
-      case 320:
-        return AMDGPU::AReg_320RegClassID;
-      case 352:
-        return AMDGPU::AReg_352RegClassID;
-      case 384:
-        return AMDGPU::AReg_384RegClassID;
-      case 512:
-        return AMDGPU::AReg_512RegClassID;
-      case 1024:
-        return AMDGPU::AReg_1024RegClassID;
-    }
-  }
-  return -1;
-}
-
-static MCRegister getSpecialRegForName(StringRef RegName) {
-  return StringSwitch<unsigned>(RegName)
-      .Case("exec", AMDGPU::EXEC)
-      .Case("vcc", AMDGPU::VCC)
-      .Case("flat_scratch", AMDGPU::FLAT_SCR)
-      .Case("xnack_mask", AMDGPU::XNACK_MASK)
-      .Case("shared_base", AMDGPU::SRC_SHARED_BASE)
-      .Case("src_shared_base", AMDGPU::SRC_SHARED_BASE)
-      .Case("shared_limit", AMDGPU::SRC_SHARED_LIMIT)
-      .Case("src_shared_limit", AMDGPU::SRC_SHARED_LIMIT)
-      .Case("private_base", AMDGPU::SRC_PRIVATE_BASE)
-      .Case("src_private_base", AMDGPU::SRC_PRIVATE_BASE)
-      .Case("private_limit", AMDGPU::SRC_PRIVATE_LIMIT)
-      .Case("src_private_limit", AMDGPU::SRC_PRIVATE_LIMIT)
-      .Case("src_flat_scratch_base_lo", AMDGPU::SRC_FLAT_SCRATCH_BASE_LO)
-      .Case("src_flat_scratch_base_hi", AMDGPU::SRC_FLAT_SCRATCH_BASE_HI)
-      .Case("pops_exiting_wave_id", AMDGPU::SRC_POPS_EXITING_WAVE_ID)
-      .Case("src_pops_exiting_wave_id", AMDGPU::SRC_POPS_EXITING_WAVE_ID)
-      .Case("lds_direct", AMDGPU::LDS_DIRECT)
-      .Case("src_lds_direct", AMDGPU::LDS_DIRECT)
-      .Case("m0", AMDGPU::M0)
-      .Case("vccz", AMDGPU::SRC_VCCZ)
-      .Case("src_vccz", AMDGPU::SRC_VCCZ)
-      .Case("execz", AMDGPU::SRC_EXECZ)
-      .Case("src_execz", AMDGPU::SRC_EXECZ)
-      .Case("scc", AMDGPU::SRC_SCC)
-      .Case("src_scc", AMDGPU::SRC_SCC)
-      .Case("tba", AMDGPU::TBA)
-      .Case("tma", AMDGPU::TMA)
-      .Case("flat_scratch_lo", AMDGPU::FLAT_SCR_LO)
-      .Case("flat_scratch_hi", AMDGPU::FLAT_SCR_HI)
-      .Case("xnack_mask_lo", AMDGPU::XNACK_MASK_LO)
-      .Case("xnack_mask_hi", AMDGPU::XNACK_MASK_HI)
-      .Case("vcc_lo", AMDGPU::VCC_LO)
-      .Case("vcc_hi", AMDGPU::VCC_HI)
-      .Case("exec_lo", AMDGPU::EXEC_LO)
-      .Case("exec_hi", AMDGPU::EXEC_HI)
-      .Case("tma_lo", AMDGPU::TMA_LO)
-      .Case("tma_hi", AMDGPU::TMA_HI)
-      .Case("tba_lo", AMDGPU::TBA_LO)
-      .Case("tba_hi", AMDGPU::TBA_HI)
-      .Case("pc", AMDGPU::PC_REG)
-      .Case("null", AMDGPU::SGPR_NULL)
-      .Default(AMDGPU::NoRegister);
-}
-
-bool AMDGPUAsmParser::ParseRegister(MCRegister &RegNo, SMLoc &StartLoc,
-                                    SMLoc &EndLoc, bool RestoreOnFailure) {
-  auto R = parseRegister();
-  if (!R) return true;
-  assert(R->isReg());
-  RegNo = R->getReg();
-  StartLoc = R->getStartLoc();
-  EndLoc = R->getEndLoc();
-  return false;
-}
-
-bool AMDGPUAsmParser::parseRegister(MCRegister &Reg, SMLoc &StartLoc,
-                                    SMLoc &EndLoc) {
-  return ParseRegister(Reg, StartLoc, EndLoc, /*RestoreOnFailure=*/false);
-}
-
-ParseStatus AMDGPUAsmParser::tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
-                                              SMLoc &EndLoc) {
-  bool Result = ParseRegister(Reg, StartLoc, EndLoc, /*RestoreOnFailure=*/true);
-  bool PendingErrors = getParser().hasPendingError();
-  getParser().clearPendingErrors();
-  if (PendingErrors)
-    return ParseStatus::Failure;
-  if (Result)
-    return ParseStatus::NoMatch;
-  return ParseStatus::Success;
-}
-
-bool AMDGPUAsmParser::AddNextRegisterToList(MCRegister &Reg, unsigned &RegWidth,
-                                            RegisterKind RegKind,
-                                            MCRegister Reg1, SMLoc Loc) {
-  switch (RegKind) {
-  case IS_SPECIAL:
-    if (Reg == AMDGPU::EXEC_LO && Reg1 == AMDGPU::EXEC_HI) {
-      Reg = AMDGPU::EXEC;
-      RegWidth = 64;
-      return true;
-    }
-    if (Reg == AMDGPU::FLAT_SCR_LO && Reg1 == AMDGPU::FLAT_SCR_HI) {
-      Reg = AMDGPU::FLAT_SCR;
-      RegWidth = 64;
-      return true;
-    }
-    if (Reg == AMDGPU::XNACK_MASK_LO && Reg1 == AMDGPU::XNACK_MASK_HI) {
-      Reg = AMDGPU::XNACK_MASK;
-      RegWidth = 64;
-      return true;
-    }
-    if (Reg == AMDGPU::VCC_LO && Reg1 == AMDGPU::VCC_HI) {
-      Reg = AMDGPU::VCC;
-      RegWidth = 64;
-      return true;
-    }
-    if (Reg == AMDGPU::TBA_LO && Reg1 == AMDGPU::TBA_HI) {
-      Reg = AMDGPU::TBA;
-      RegWidth = 64;
-      return true;
-    }
-    if (Reg == AMDGPU::TMA_LO && Reg1 == AMDGPU::TMA_HI) {
-      Reg = AMDGPU::TMA;
-      RegWidth = 64;
-      return true;
-    }
-    Error(Loc, "register does not fit in the list");
-    return false;
-  case IS_VGPR:
-  case IS_SGPR:
-  case IS_AGPR:
-  case IS_TTMP:
-    if (Reg1 != Reg + RegWidth / 32) {
-      Error(Loc, "registers in a list must have consecutive indices");
-      return false;
-    }
-    RegWidth += 32;
-    return true;
-  default:
-    llvm_unreachable("unexpected register kind");
-  }
-}
-
-struct RegInfo {
-  StringLiteral Name;
-  RegisterKind Kind;
-};
-
-static constexpr RegInfo RegularRegisters[] = {
-  {{"v"},    IS_VGPR},
-  {{"s"},    IS_SGPR},
-  {{"ttmp"}, IS_TTMP},
-  {{"acc"},  IS_AGPR},
-  {{"a"},    IS_AGPR},
-};
-
-static bool isRegularReg(RegisterKind Kind) {
-  return Kind == IS_VGPR ||
-         Kind == IS_SGPR ||
-         Kind == IS_TTMP ||
-         Kind == IS_AGPR;
-}
-
-static const RegInfo* getRegularRegInfo(StringRef Str) {
-  for (const RegInfo &Reg : RegularRegisters)
-    if (Str.starts_with(Reg.Name))
-      return &Reg;
-  return nullptr;
-}
-
-static bool getRegNum(StringRef Str, unsigned& Num) {
-  return !Str.getAsInteger(10, Num);
-}
-
-bool
-AMDGPUAsmParser::isRegister(const AsmToken &Token,
-                            const AsmToken &NextToken) const {
-
-  // A list of consecutive registers: [s0,s1,s2,s3]
-  if (Token.is(AsmToken::LBrac))
-    return true;
-
-  if (!Token.is(AsmToken::Identifier))
-    return false;
-
-  // A single register like s0 or a range of registers like s[0:1]
-
-  StringRef Str = Token.getString();
-  const RegInfo *Reg = getRegularRegInfo(Str);
-  if (Reg) {
-    StringRef RegName = Reg->Name;
-    StringRef RegSuffix = Str.substr(RegName.size());
-    if (!RegSuffix.empty()) {
-      RegSuffix.consume_back(".l");
-      RegSuffix.consume_back(".h");
-      unsigned Num;
-      // A single register with an index: rXX
-      if (getRegNum(RegSuffix, Num))
-        return true;
-    } else {
-      // A range of registers: r[XX:YY].
-      if (NextToken.is(AsmToken::LBrac))
-        return true;
-    }
-  }
-
-  return getSpecialRegForName(Str).isValid();
-}
-
-bool
-AMDGPUAsmParser::isRegister()
-{
-  return isRegister(getToken(), peekToken());
-}
-
-MCRegister AMDGPUAsmParser::getRegularReg(RegisterKind RegKind, unsigned RegNum,
-                                          unsigned SubReg, unsigned RegWidth,
-                                          SMLoc Loc) {
-  assert(isRegularReg(RegKind));
-
-  unsigned AlignSize = 1;
-  if (RegKind == IS_SGPR || RegKind == IS_TTMP) {
-    // SGPR and TTMP registers must be aligned.
-    // Max required alignment is 4 dwords.
-    AlignSize = std::min(llvm::bit_ceil(RegWidth / 32), 4u);
-  }
-
-  if (RegNum % AlignSize != 0) {
-    Error(Loc, "invalid register alignment");
-    return MCRegister();
-  }
-
-  unsigned RegIdx = RegNum / AlignSize;
-  int RCID = getRegClass(RegKind, RegWidth);
-  if (RCID == -1) {
-    Error(Loc, "invalid or unsupported register size");
-    return MCRegister();
-  }
-
-  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
-  const MCRegisterClass RC = TRI->getRegClass(RCID);
-  if (RegIdx >= RC.getNumRegs() || (RegKind == IS_VGPR && RegIdx > 255)) {
-    Error(Loc, "register index is out of range");
-    return AMDGPU::NoRegister;
-  }
-
-  if (RegKind == IS_VGPR && !isGFX1250Plus() && RegIdx + RegWidth / 32 > 256) {
-    Error(Loc, "register index is out of range");
-    return MCRegister();
-  }
-
-  MCRegister Reg = RC.getRegister(RegIdx);
-
-  if (SubReg) {
-    Reg = TRI->getSubReg(Reg, SubReg);
-
-    // Currently all regular registers have their .l and .h subregisters, so
-    // we should never need to generate an error here.
-    assert(Reg && "Invalid subregister!");
-  }
-
-  return Reg;
-}
-
-bool AMDGPUAsmParser::ParseRegRange(unsigned &Num, unsigned &RegWidth,
-                                    unsigned &SubReg) {
-  int64_t RegLo, RegHi;
-  if (!skipToken(AsmToken::LBrac, "missing register index"))
-    return false;
-
-  SMLoc FirstIdxLoc = getLoc();
-  SMLoc SecondIdxLoc;
-
-  if (!parseExpr(RegLo))
-    return false;
-
-  if (trySkipToken(AsmToken::Colon)) {
-    SecondIdxLoc = getLoc();
-    if (!parseExpr(RegHi))
-      return false;
-  } else {
-    RegHi = RegLo;
-  }
-
-  if (!skipToken(AsmToken::RBrac, "expected a closing square bracket"))
-    return false;
-
-  if (!isUInt<32>(RegLo)) {
-    Error(FirstIdxLoc, "invalid register index");
-    return false;
-  }
-
-  if (!isUInt<32>(RegHi)) {
-    Error(SecondIdxLoc, "invalid register index");
-    return false;
-  }
-
-  if (RegLo > RegHi) {
-    Error(FirstIdxLoc, "first register index should not exceed second index");
-    return false;
-  }
-
-  if (RegHi == RegLo) {
-    StringRef RegSuffix = getTokenStr();
-    if (RegSuffix == ".l") {
-      SubReg = AMDGPU::lo16;
-      lex();
-    } else if (RegSuffix == ".h") {
-      SubReg = AMDGPU::hi16;
-      lex();
-    }
-  }
-
-  Num = static_cast<unsigned>(RegLo);
-  RegWidth = 32 * ((RegHi - RegLo) + 1);
-
-  return true;
-}
-
-MCRegister AMDGPUAsmParser::ParseSpecialReg(RegisterKind &RegKind,
-                                            unsigned &RegNum,
-                                            unsigned &RegWidth,
-                                            SmallVectorImpl<AsmToken> &Tokens) {
-  assert(isToken(AsmToken::Identifier));
-  MCRegister Reg = getSpecialRegForName(getTokenStr());
-  if (Reg) {
-    RegNum = 0;
-    RegWidth = 32;
-    RegKind = IS_SPECIAL;
-    Tokens.push_back(getToken());
-    lex(); // skip register name
-  }
-  return Reg;
-}
-
-MCRegister AMDGPUAsmParser::ParseRegularReg(RegisterKind &RegKind,
-                                            unsigned &RegNum,
-                                            unsigned &RegWidth,
-                                            SmallVectorImpl<AsmToken> &Tokens) {
-  assert(isToken(AsmToken::Identifier));
-  StringRef RegName = getTokenStr();
-  auto Loc = getLoc();
-
-  const RegInfo *RI = getRegularRegInfo(RegName);
-  if (!RI) {
-    Error(Loc, "invalid register name");
-    return MCRegister();
-  }
-
-  Tokens.push_back(getToken());
-  lex(); // skip register name
-
-  RegKind = RI->Kind;
-  StringRef RegSuffix = RegName.substr(RI->Name.size());
-  unsigned SubReg = NoSubRegister;
-  if (!RegSuffix.empty()) {
-    if (RegSuffix.consume_back(".l"))
-      SubReg = AMDGPU::lo16;
-    else if (RegSuffix.consume_back(".h"))
-      SubReg = AMDGPU::hi16;
-
-    // Single 32-bit register: vXX.
-    if (!getRegNum(RegSuffix, RegNum)) {
-      Error(Loc, "invalid register index");
-      return MCRegister();
-    }
-    RegWidth = 32;
-  } else {
-    // Range of registers: v[XX:YY]. ":YY" is optional.
-    if (!ParseRegRange(RegNum, RegWidth, SubReg))
-      return MCRegister();
-  }
-
-  return getRegularReg(RegKind, RegNum, SubReg, RegWidth, Loc);
-}
-
-MCRegister AMDGPUAsmParser::ParseRegList(RegisterKind &RegKind,
-                                         unsigned &RegNum, unsigned &RegWidth,
-                                         SmallVectorImpl<AsmToken> &Tokens) {
-  MCRegister Reg;
-  auto ListLoc = getLoc();
-
-  if (!skipToken(AsmToken::LBrac,
-                 "expected a register or a list of registers")) {
-    return MCRegister();
-  }
-
-  // List of consecutive registers, e.g.: [s0,s1,s2,s3]
-
-  auto Loc = getLoc();
-  if (!ParseAMDGPURegister(RegKind, Reg, RegNum, RegWidth))
-    return MCRegister();
-  if (RegWidth != 32) {
-    Error(Loc, "expected a single 32-bit register");
-    return MCRegister();
-  }
-
-  for (; trySkipToken(AsmToken::Comma); ) {
-    RegisterKind NextRegKind;
-    MCRegister NextReg;
-    unsigned NextRegNum, NextRegWidth;
-    Loc = getLoc();
-
-    if (!ParseAMDGPURegister(NextRegKind, NextReg,
-                             NextRegNum, NextRegWidth,
-                             Tokens)) {
-      return MCRegister();
-    }
-    if (NextRegWidth != 32) {
-      Error(Loc, "expected a single 32-bit register");
-      return MCRegister();
-    }
-    if (NextRegKind != RegKind) {
-      Error(Loc, "registers in a list must be of the same kind");
-      return MCRegister();
-    }
-    if (!AddNextRegisterToList(Reg, RegWidth, RegKind, NextReg, Loc))
-      return MCRegister();
-  }
-
-  if (!skipToken(AsmToken::RBrac,
-                 "expected a comma or a closing square bracket")) {
-    return MCRegister();
-  }
-
-  if (isRegularReg(RegKind))
-    Reg = getRegularReg(RegKind, RegNum, NoSubRegister, RegWidth, ListLoc);
-
-  return Reg;
-}
-
-bool AMDGPUAsmParser::ParseAMDGPURegister(RegisterKind &RegKind,
-                                          MCRegister &Reg, unsigned &RegNum,
-                                          unsigned &RegWidth,
-                                          SmallVectorImpl<AsmToken> &Tokens) {
-  auto Loc = getLoc();
-  Reg = MCRegister();
-
-  if (isToken(AsmToken::Identifier)) {
-    Reg = ParseSpecialReg(RegKind, RegNum, RegWidth, Tokens);
-    if (!Reg)
-      Reg = ParseRegularReg(RegKind, RegNum, RegWidth, Tokens);
-  } else {
-    Reg = ParseRegList(RegKind, RegNum, RegWidth, Tokens);
-  }
-
-  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
-  if (!Reg) {
-    assert(Parser.hasPendingError());
-    return false;
-  }
-
-  if (!subtargetHasRegister(*TRI, Reg)) {
-    if (Reg == AMDGPU::SGPR_NULL) {
-      Error(Loc, "'null' operand is not supported on this GPU");
-    } else {
-      Error(Loc, Twine(AMDGPUInstPrinter::getRegisterName(Reg)) +
-                     " register not available on this GPU");
-    }
-    return false;
-  }
-
-  return true;
-}
-
-bool AMDGPUAsmParser::ParseAMDGPURegister(RegisterKind &RegKind,
-                                          MCRegister &Reg, unsigned &RegNum,
-                                          unsigned &RegWidth,
-                                          bool RestoreOnFailure /*=false*/) {
-  Reg = MCRegister();
-
-  SmallVector<AsmToken, 1> Tokens;
-  if (ParseAMDGPURegister(RegKind, Reg, RegNum, RegWidth, Tokens)) {
-    if (RestoreOnFailure) {
-      while (!Tokens.empty()) {
-        getLexer().UnLex(Tokens.pop_back_val());
-      }
-    }
-    return true;
-  }
-  return false;
-}
-
-std::optional<StringRef>
-AMDGPUAsmParser::getGprCountSymbolName(RegisterKind RegKind) {
-  switch (RegKind) {
-  case IS_VGPR:
-    return StringRef(".amdgcn.next_free_vgpr");
-  case IS_SGPR:
-    return StringRef(".amdgcn.next_free_sgpr");
-  default:
-    return std::nullopt;
-  }
-}
-
-void AMDGPUAsmParser::initializeGprCountSymbol(RegisterKind RegKind) {
-  auto SymbolName = getGprCountSymbolName(RegKind);
-  assert(SymbolName && "initializing invalid register kind");
-  MCSymbol *Sym = getContext().getOrCreateSymbol(*SymbolName);
-  Sym->setVariableValue(MCConstantExpr::create(0, getContext()));
-  Sym->setRedefinable(true);
-}
-
-bool AMDGPUAsmParser::updateGprCountSymbols(RegisterKind RegKind,
-                                            unsigned DwordRegIndex,
-                                            unsigned RegWidth) {
-  // Symbols are only defined for GCN targets
-  if (AMDGPU::getIsaVersion(getSTI().getCPU()).Major < 6)
-    return true;
-
-  auto SymbolName = getGprCountSymbolName(RegKind);
-  if (!SymbolName)
-    return true;
-  MCSymbol *Sym = getContext().getOrCreateSymbol(*SymbolName);
-
-  int64_t NewMax = DwordRegIndex + divideCeil(RegWidth, 32) - 1;
-  int64_t OldCount;
-
-  if (!Sym->isVariable())
-    return !Error(getLoc(),
-                  ".amdgcn.next_free_{v,s}gpr symbols must be variable");
-  if (!Sym->getVariableValue()->evaluateAsAbsolute(OldCount))
-    return !Error(
-        getLoc(),
-        ".amdgcn.next_free_{v,s}gpr symbols must be absolute expressions");
-
-  if (OldCount <= NewMax)
-    Sym->setVariableValue(MCConstantExpr::create(NewMax + 1, getContext()));
-
-  return true;
-}
-
-std::unique_ptr<AMDGPUOperand>
-AMDGPUAsmParser::parseRegister(bool RestoreOnFailure) {
-  const auto &Tok = getToken();
-  SMLoc StartLoc = Tok.getLoc();
-  SMLoc EndLoc = Tok.getEndLoc();
-  RegisterKind RegKind;
-  MCRegister Reg;
-  unsigned RegNum, RegWidth;
-
-  if (!ParseAMDGPURegister(RegKind, Reg, RegNum, RegWidth)) {
-    return nullptr;
-  }
-  if (isHsaAbi(getSTI())) {
-    if (!updateGprCountSymbols(RegKind, RegNum, RegWidth))
-      return nullptr;
-  } else
-    KernelScope.usesRegister(RegKind, RegNum, RegWidth);
-  return AMDGPUOperand::CreateReg(this, Reg, StartLoc, EndLoc);
-}
-
-ParseStatus AMDGPUAsmParser::parseImm(OperandVector &Operands,
-                                      bool HasSP3AbsModifier, LitModifier Lit) {
-  // TODO: add syntactic sugar for 1/(2*PI)
-
-  if (isRegister() || isModifier())
-    return ParseStatus::NoMatch;
-
-  if (Lit == LitModifier::None) {
-    if (trySkipId("lit"))
-      Lit = LitModifier::Lit;
-    else if (trySkipId("lit64"))
-      Lit = LitModifier::Lit64;
-
-    if (Lit != LitModifier::None) {
-      if (!skipToken(AsmToken::LParen, "expected left paren after lit"))
-        return ParseStatus::Failure;
-      ParseStatus S = parseImm(Operands, HasSP3AbsModifier, Lit);
-      if (S.isSuccess() &&
-          !skipToken(AsmToken::RParen, "expected closing parentheses"))
-        return ParseStatus::Failure;
-      return S;
-    }
-  }
-
-  const auto& Tok = getToken();
-  const auto& NextTok = peekToken();
-  bool IsReal = Tok.is(AsmToken::Real);
-  SMLoc S = getLoc();
-  bool Negate = false;
-
-  if (!IsReal && Tok.is(AsmToken::Minus) && NextTok.is(AsmToken::Real)) {
-    lex();
-    IsReal = true;
-    Negate = true;
-  }
-
-  AMDGPUOperand::Modifiers Mods;
-  Mods.Lit = Lit;
-
-  if (IsReal) {
-    // Floating-point expressions are not supported.
-    // Can only allow floating-point literals with an
-    // optional sign.
-
-    StringRef Num = getTokenStr();
-    lex();
-
-    APFloat RealVal(APFloat::IEEEdouble());
-    auto roundMode = APFloat::rmNearestTiesToEven;
-    if (errorToBool(RealVal.convertFromString(Num, roundMode).takeError()))
-      return ParseStatus::Failure;
-    if (Negate)
-      RealVal.changeSign();
-
-    Operands.push_back(
-      AMDGPUOperand::CreateImm(this, RealVal.bitcastToAPInt().getZExtValue(), S,
-                               AMDGPUOperand::ImmTyNone, true));
-    AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
-    Op.setModifiers(Mods);
-
-    return ParseStatus::Success;
-
-  } else {
-    int64_t IntVal;
-    const MCExpr *Expr;
-    SMLoc S = getLoc();
-
-    if (HasSP3AbsModifier) {
-      // This is a workaround for handling expressions
-      // as arguments of SP3 'abs' modifier, for example:
-      //     |1.0|
-      //     |-1|
-      //     |1+x|
-      // This syntax is not compatible with syntax of standard
-      // MC expressions (due to the trailing '|').
-      SMLoc EndLoc;
-      if (getParser().parsePrimaryExpr(Expr, EndLoc, nullptr))
-        return ParseStatus::Failure;
-    } else {
-      if (Parser.parseExpression(Expr))
-        return ParseStatus::Failure;
-    }
-
-    if (Expr->evaluateAsAbsolute(IntVal)) {
-      Operands.push_back(AMDGPUOperand::CreateImm(this, IntVal, S));
-      AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
-      Op.setModifiers(Mods);
-    } else {
-      if (Lit != LitModifier::None)
-        return ParseStatus::NoMatch;
-      Operands.push_back(AMDGPUOperand::CreateExpr(this, Expr, S));
-    }
-
-    return ParseStatus::Success;
-  }
-
-  return ParseStatus::NoMatch;
-}
-
-ParseStatus AMDGPUAsmParser::parseReg(OperandVector &Operands) {
-  if (!isRegister())
-    return ParseStatus::NoMatch;
-
-  if (auto R = parseRegister()) {
-    assert(R->isReg());
-    Operands.push_back(std::move(R));
-    return ParseStatus::Success;
-  }
-  return ParseStatus::Failure;
-}
-
-ParseStatus AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands,
-                                           bool HasSP3AbsMod, LitModifier Lit) {
-  ParseStatus Res = parseReg(Operands);
-  if (!Res.isNoMatch())
-    return Res;
-  if (isModifier())
-    return ParseStatus::NoMatch;
-  return parseImm(Operands, HasSP3AbsMod, Lit);
-}
-
-bool
-AMDGPUAsmParser::isNamedOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const {
-  if (Token.is(AsmToken::Identifier) && NextToken.is(AsmToken::LParen)) {
-    const auto &str = Token.getString();
-    return str == "abs" || str == "neg" || str == "sext";
-  }
-  return false;
-}
-
-bool
-AMDGPUAsmParser::isOpcodeModifierWithVal(const AsmToken &Token, const AsmToken &NextToken) const {
-  return Token.is(AsmToken::Identifier) && NextToken.is(AsmToken::Colon);
-}
-
-bool
-AMDGPUAsmParser::isOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const {
-  return isNamedOperandModifier(Token, NextToken) || Token.is(AsmToken::Pipe);
-}
-
-bool
-AMDGPUAsmParser::isRegOrOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const {
-  return isRegister(Token, NextToken) || isOperandModifier(Token, NextToken);
-}
-
-// Check if this is an operand modifier or an opcode modifier
-// which may look like an expression but it is not. We should
-// avoid parsing these modifiers as expressions. Currently
-// recognized sequences are:
-//   |...|
-//   abs(...)
-//   neg(...)
-//   sext(...)
-//   -reg
-//   -|...|
-//   -abs(...)
-//   name:...
-//
-bool
-AMDGPUAsmParser::isModifier() {
-
-  AsmToken Tok = getToken();
-  AsmToken NextToken[2];
-  peekTokens(NextToken);
-
-  return isOperandModifier(Tok, NextToken[0]) ||
-         (Tok.is(AsmToken::Minus) && isRegOrOperandModifier(NextToken[0], NextToken[1])) ||
-         isOpcodeModifierWithVal(Tok, NextToken[0]);
-}
-
-// Check if the current token is an SP3 'neg' modifier.
-// Currently this modifier is allowed in the following context:
-//
-// 1. Before a register, e.g. "-v0", "-v[...]" or "-[v0,v1]".
-// 2. Before an 'abs' modifier: -abs(...)
-// 3. Before an SP3 'abs' modifier: -|...|
-//
-// In all other cases "-" is handled as a part
-// of an expression that follows the sign.
-//
-// Note: When "-" is followed by an integer literal,
-// this is interpreted as integer negation rather
-// than a floating-point NEG modifier applied to N.
-// Beside being contr-intuitive, such use of floating-point
-// NEG modifier would have resulted in different meaning
-// of integer literals used with VOP1/2/C and VOP3,
-// for example:
-//    v_exp_f32_e32 v5, -1 // VOP1: src0 = 0xFFFFFFFF
-//    v_exp_f32_e64 v5, -1 // VOP3: src0 = 0x80000001
-// Negative fp literals with preceding "-" are
-// handled likewise for uniformity
-//
-bool
-AMDGPUAsmParser::parseSP3NegModifier() {
-
-  AsmToken NextToken[2];
-  peekTokens(NextToken);
-
-  if (isToken(AsmToken::Minus) &&
-      (isRegister(NextToken[0], NextToken[1]) ||
-       NextToken[0].is(AsmToken::Pipe) ||
-       isId(NextToken[0], "abs"))) {
-    lex();
-    return true;
-  }
-
-  return false;
-}
-
-ParseStatus
-AMDGPUAsmParser::parseRegOrImmWithFPInputMods(OperandVector &Operands,
-                                              bool AllowImm) {
-  bool Neg, SP3Neg;
-  bool Abs, SP3Abs;
-  SMLoc Loc;
-
-  // Disable ambiguous constructs like '--1' etc. Should use neg(-1) instead.
-  if (isToken(AsmToken::Minus) && peekToken().is(AsmToken::Minus))
-    return Error(getLoc(), "invalid syntax, expected 'neg' modifier");
-
-  SP3Neg = parseSP3NegModifier();
-
-  Loc = getLoc();
-  Neg = trySkipId("neg");
-  if (Neg && SP3Neg)
-    return Error(Loc, "expected register or immediate");
-  if (Neg && !skipToken(AsmToken::LParen, "expected left paren after neg"))
-    return ParseStatus::Failure;
-
-  Abs = trySkipId("abs");
-  if (Abs && !skipToken(AsmToken::LParen, "expected left paren after abs"))
-    return ParseStatus::Failure;
-
-  LitModifier Lit = LitModifier::None;
-  if (trySkipId("lit")) {
-    Lit = LitModifier::Lit;
-    if (!skipToken(AsmToken::LParen, "expected left paren after lit"))
-      return ParseStatus::Failure;
-  } else if (trySkipId("lit64")) {
-    Lit = LitModifier::Lit64;
-    if (!skipToken(AsmToken::LParen, "expected left paren after lit64"))
-      return ParseStatus::Failure;
-    if (!has64BitLiterals())
-      return Error(Loc, "lit64 is not supported on this GPU");
-  }
-
-  Loc = getLoc();
-  SP3Abs = trySkipToken(AsmToken::Pipe);
-  if (Abs && SP3Abs)
-    return Error(Loc, "expected register or immediate");
-
-  ParseStatus Res;
-  if (AllowImm) {
-    Res = parseRegOrImm(Operands, SP3Abs, Lit);
-  } else {
-    Res = parseReg(Operands);
-  }
-  if (!Res.isSuccess())
-    return (SP3Neg || Neg || SP3Abs || Abs || Lit != LitModifier::None)
-               ? ParseStatus::Failure
-               : Res;
-
-  if (Lit != LitModifier::None && !Operands.back()->isImm())
-    Error(Loc, "expected immediate with lit modifier");
-
-  if (SP3Abs && !skipToken(AsmToken::Pipe, "expected vertical bar"))
-    return ParseStatus::Failure;
-  if (Abs && !skipToken(AsmToken::RParen, "expected closing parentheses"))
-    return ParseStatus::Failure;
-  if (Neg && !skipToken(AsmToken::RParen, "expected closing parentheses"))
-    return ParseStatus::Failure;
-  if (Lit != LitModifier::None &&
-      !skipToken(AsmToken::RParen, "expected closing parentheses"))
-    return ParseStatus::Failure;
-
-  AMDGPUOperand::Modifiers Mods;
-  Mods.Abs = Abs || SP3Abs;
-  Mods.Neg = Neg || SP3Neg;
-  Mods.Lit = Lit;
-
-  if (Mods.hasFPModifiers() || Lit != LitModifier::None) {
-    AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
-    if (Op.isExpr())
-      return Error(Op.getStartLoc(), "expected an absolute expression");
-    Op.setModifiers(Mods);
-  }
-  return ParseStatus::Success;
-}
-
-ParseStatus
-AMDGPUAsmParser::parseRegOrImmWithIntInputMods(OperandVector &Operands,
-                                               bool AllowImm) {
-  bool Sext = trySkipId("sext");
-  if (Sext && !skipToken(AsmToken::LParen, "expected left paren after sext"))
-    return ParseStatus::Failure;
-
-  ParseStatus Res;
-  if (AllowImm) {
-    Res = parseRegOrImm(Operands);
-  } else {
-    Res = parseReg(Operands);
-  }
-  if (!Res.isSuccess())
-    return Sext ? ParseStatus::Failure : Res;
-
-  if (Sext && !skipToken(AsmToken::RParen, "expected closing parentheses"))
-    return ParseStatus::Failure;
-
-  AMDGPUOperand::Modifiers Mods;
-  Mods.Sext = Sext;
-
-  if (Mods.hasIntModifiers()) {
-    AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back());
-    if (Op.isExpr())
-      return Error(Op.getStartLoc(), "expected an absolute expression");
-    Op.setModifiers(Mods);
-  }
-
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseRegWithFPInputMods(OperandVector &Operands) {
-  return parseRegOrImmWithFPInputMods(Operands, false);
-}
-
-ParseStatus AMDGPUAsmParser::parseRegWithIntInputMods(OperandVector &Operands) {
-  return parseRegOrImmWithIntInputMods(Operands, false);
-}
-
-ParseStatus AMDGPUAsmParser::parseVReg32OrOff(OperandVector &Operands) {
-  auto Loc = getLoc();
-  if (trySkipId("off")) {
-    Operands.push_back(AMDGPUOperand::CreateImm(this, 0, Loc,
-                                                AMDGPUOperand::ImmTyOff, false));
-    return ParseStatus::Success;
-  }
-
-  if (!isRegister())
-    return ParseStatus::NoMatch;
-
-  std::unique_ptr<AMDGPUOperand> Reg = parseRegister();
-  if (Reg) {
-    Operands.push_back(std::move(Reg));
-    return ParseStatus::Success;
-  }
-
-  return ParseStatus::Failure;
-}
-
-unsigned AMDGPUAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
-  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
-
-  if ((getForcedEncodingSize() == 32 && (TSFlags & SIInstrFlags::VOP3)) ||
-      (getForcedEncodingSize() == 64 && !(TSFlags & SIInstrFlags::VOP3)) ||
-      (isForcedDPP() && !(TSFlags & SIInstrFlags::DPP)) ||
-      (isForcedSDWA() && !(TSFlags & SIInstrFlags::SDWA)) )
-    return Match_InvalidOperand;
-
-  if (Inst.getOpcode() == AMDGPU::V_MAC_F32_sdwa_vi ||
-      Inst.getOpcode() == AMDGPU::V_MAC_F16_sdwa_vi) {
-    // v_mac_f32/16 allow only dst_sel == DWORD;
-    auto OpNum =
-        AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::dst_sel);
-    const auto &Op = Inst.getOperand(OpNum);
-    if (!Op.isImm() || Op.getImm() != AMDGPU::SDWA::SdwaSel::DWORD) {
-      return Match_InvalidOperand;
-    }
-  }
-
-  // Asm can first try to match VOPD or VOPD3. By failing early here with
-  // Match_InvalidOperand, the parser will retry parsing as VOPD3 or VOPD.
-  // Checking later during validateInstruction does not give a chance to retry
-  // parsing as a different encoding.
-  if (tryAnotherVOPDEncoding(Inst))
-    return Match_InvalidOperand;
-
-  return Match_Success;
-}
-
-static ArrayRef<unsigned> getAllVariants() {
-  static const unsigned Variants[] = {
-    AMDGPUAsmVariants::DEFAULT, AMDGPUAsmVariants::VOP3,
-    AMDGPUAsmVariants::SDWA, AMDGPUAsmVariants::SDWA9,
-    AMDGPUAsmVariants::DPP, AMDGPUAsmVariants::VOP3_DPP
-  };
-
-  return ArrayRef(Variants);
-}
-
-// What asm variants we should check
-ArrayRef<unsigned> AMDGPUAsmParser::getMatchedVariants() const {
-  if (isForcedDPP() && isForcedVOP3()) {
-    static const unsigned Variants[] = {AMDGPUAsmVariants::VOP3_DPP};
-    return ArrayRef(Variants);
-  }
-  if (getForcedEncodingSize() == 32) {
-    static const unsigned Variants[] = {AMDGPUAsmVariants::DEFAULT};
-    return ArrayRef(Variants);
-  }
-
-  if (isForcedVOP3()) {
-    static const unsigned Variants[] = {AMDGPUAsmVariants::VOP3};
-    return ArrayRef(Variants);
-  }
-
-  if (isForcedSDWA()) {
-    static const unsigned Variants[] = {AMDGPUAsmVariants::SDWA,
-                                        AMDGPUAsmVariants::SDWA9};
-    return ArrayRef(Variants);
-  }
-
-  if (isForcedDPP()) {
-    static const unsigned Variants[] = {AMDGPUAsmVariants::DPP};
-    return ArrayRef(Variants);
-  }
-
-  return getAllVariants();
-}
-
-StringRef AMDGPUAsmParser::getMatchedVariantName() const {
-  if (isForcedDPP() && isForcedVOP3())
-    return "e64_dpp";
-
-  if (getForcedEncodingSize() == 32)
-    return "e32";
-
-  if (isForcedVOP3())
-    return "e64";
-
-  if (isForcedSDWA())
-    return "sdwa";
-
-  if (isForcedDPP())
-    return "dpp";
-
-  return "";
-}
-
-MCRegister
-AMDGPUAsmParser::findImplicitSGPRReadInVOP(const MCInst &Inst) const {
-  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
-  for (MCPhysReg Reg : Desc.implicit_uses()) {
-    switch (Reg) {
-    case AMDGPU::FLAT_SCR:
-    case AMDGPU::VCC:
-    case AMDGPU::VCC_LO:
-    case AMDGPU::VCC_HI:
-    case AMDGPU::M0:
-      return Reg;
-    default:
-      break;
-    }
-  }
-  return MCRegister();
-}
-
-// NB: This code is correct only when used to check constant
-// bus limitations because GFX7 support no f16 inline constants.
-// Note that there are no cases when a GFX7 opcode violates
-// constant bus limitations due to the use of an f16 constant.
-bool AMDGPUAsmParser::isInlineConstant(const MCInst &Inst,
-                                       unsigned OpIdx) const {
-  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
-
-  if (!AMDGPU::isSISrcOperand(Desc, OpIdx) ||
-      AMDGPU::isKImmOperand(Desc, OpIdx)) {
-    return false;
-  }
-
-  const MCOperand &MO = Inst.getOperand(OpIdx);
-
-  int64_t Val = MO.isImm() ? MO.getImm() : getLitValue(MO.getExpr());
-  auto OpSize = AMDGPU::getOperandSize(Desc, OpIdx);
-
-  switch (OpSize) { // expected operand size
-  case 8:
-    return AMDGPU::isInlinableLiteral64(Val, hasInv2PiInlineImm());
-  case 4:
-    return AMDGPU::isInlinableLiteral32(Val, hasInv2PiInlineImm());
-  case 2: {
-    const unsigned OperandType = Desc.operands()[OpIdx].OperandType;
-    if (OperandType == AMDGPU::OPERAND_REG_IMM_INT16 ||
-        OperandType == AMDGPU::OPERAND_REG_INLINE_C_INT16)
-      return AMDGPU::isInlinableLiteralI16(Val, hasInv2PiInlineImm());
-
-    if (OperandType == AMDGPU::OPERAND_REG_INLINE_C_V2INT16 ||
-        OperandType == AMDGPU::OPERAND_REG_IMM_V2INT16)
-      return AMDGPU::isInlinableLiteralV2I16(Val);
-
-    if (OperandType == AMDGPU::OPERAND_REG_INLINE_C_V2FP16 ||
-        OperandType == AMDGPU::OPERAND_REG_IMM_V2FP16)
-      return AMDGPU::isInlinableLiteralV2F16(Val);
-
-    if (OperandType == AMDGPU::OPERAND_REG_IMM_V2FP16_SPLAT)
-      return AMDGPU::isPKFMACF16InlineConstant(Val, isGFX11Plus());
-
-    if (OperandType == AMDGPU::OPERAND_REG_INLINE_C_V2BF16 ||
-        OperandType == AMDGPU::OPERAND_REG_IMM_V2BF16)
-      return AMDGPU::isInlinableLiteralV2BF16(Val);
-
-    if (OperandType == AMDGPU::OPERAND_REG_IMM_FP16 ||
-        OperandType == AMDGPU::OPERAND_REG_INLINE_C_FP16)
-      return AMDGPU::isInlinableLiteralFP16(Val, hasInv2PiInlineImm());
-
-    if (OperandType == AMDGPU::OPERAND_REG_IMM_BF16 ||
-        OperandType == AMDGPU::OPERAND_REG_INLINE_C_BF16)
-      return AMDGPU::isInlinableLiteralBF16(Val, hasInv2PiInlineImm());
-
-    if (OperandType == AMDGPU::OPERAND_REG_IMM_NOINLINE_V2FP16)
-      return false;
-
-    llvm_unreachable("invalid operand type");
-  }
-  default:
-    llvm_unreachable("invalid operand size");
-  }
-}
-
-unsigned AMDGPUAsmParser::getConstantBusLimit(unsigned Opcode) const {
-  if (!isGFX10Plus())
-    return 1;
-
-  switch (Opcode) {
-  // 64-bit shift instructions can use only one scalar value input
-  case AMDGPU::V_LSHLREV_B64_e64:
-  case AMDGPU::V_LSHLREV_B64_gfx10:
-  case AMDGPU::V_LSHLREV_B64_e64_gfx11:
-  case AMDGPU::V_LSHLREV_B64_e32_gfx12:
-  case AMDGPU::V_LSHLREV_B64_e64_gfx12:
-  case AMDGPU::V_LSHRREV_B64_e64:
-  case AMDGPU::V_LSHRREV_B64_gfx10:
-  case AMDGPU::V_LSHRREV_B64_e64_gfx11:
-  case AMDGPU::V_LSHRREV_B64_e64_gfx12:
-  case AMDGPU::V_ASHRREV_I64_e64:
-  case AMDGPU::V_ASHRREV_I64_gfx10:
-  case AMDGPU::V_ASHRREV_I64_e64_gfx11:
-  case AMDGPU::V_ASHRREV_I64_e64_gfx12:
-  case AMDGPU::V_LSHL_B64_e64:
-  case AMDGPU::V_LSHR_B64_e64:
-  case AMDGPU::V_ASHR_I64_e64:
-    return 1;
-  default:
-    return 2;
-  }
-}
-
-constexpr unsigned MAX_SRC_OPERANDS_NUM = 6;
-using OperandIndices = SmallVector<int16_t, MAX_SRC_OPERANDS_NUM>;
-
-// Get regular operand indices in the same order as specified
-// in the instruction (but append mandatory literals to the end).
-static OperandIndices getSrcOperandIndices(unsigned Opcode,
-                                           bool AddMandatoryLiterals = false) {
-
-  int16_t ImmIdx =
-      AddMandatoryLiterals ? getNamedOperandIdx(Opcode, OpName::imm) : -1;
-
-  if (isVOPD(Opcode)) {
-    int16_t ImmXIdx =
-        AddMandatoryLiterals ? getNamedOperandIdx(Opcode, OpName::immX) : -1;
-
-    return {getNamedOperandIdx(Opcode, OpName::src0X),
-            getNamedOperandIdx(Opcode, OpName::vsrc1X),
-            getNamedOperandIdx(Opcode, OpName::vsrc2X),
-            getNamedOperandIdx(Opcode, OpName::src0Y),
-            getNamedOperandIdx(Opcode, OpName::vsrc1Y),
-            getNamedOperandIdx(Opcode, OpName::vsrc2Y),
-            ImmXIdx,
-            ImmIdx};
-  }
-
-  return {getNamedOperandIdx(Opcode, OpName::src0),
-          getNamedOperandIdx(Opcode, OpName::src1),
-          getNamedOperandIdx(Opcode, OpName::src2), ImmIdx};
-}
-
-bool AMDGPUAsmParser::usesConstantBus(const MCInst &Inst, unsigned OpIdx) {
-  const MCOperand &MO = Inst.getOperand(OpIdx);
-  if (MO.isImm())
-    return !isInlineConstant(Inst, OpIdx);
-  if (MO.isReg()) {
-    auto Reg = MO.getReg();
-    if (!Reg)
-      return false;
-    const MCRegisterInfo *TRI = getContext().getRegisterInfo();
-    auto PReg = mc2PseudoReg(Reg);
-    return isSGPR(PReg, TRI) && PReg != SGPR_NULL;
-  }
-  return true;
-}
-
-// Based on the comment for `AMDGPUInstructionSelector::selectWritelane`:
-// Writelane is special in that it can use SGPR and M0 (which would normally
-// count as using the constant bus twice - but in this case it is allowed since
-// the lane selector doesn't count as a use of the constant bus). However, it is
-// still required to abide by the 1 SGPR rule.
-static bool checkWriteLane(const MCInst &Inst) {
-  const unsigned Opcode = Inst.getOpcode();
-  if (Opcode != V_WRITELANE_B32_gfx6_gfx7 && Opcode != V_WRITELANE_B32_vi)
-    return false;
-  const MCOperand &LaneSelOp = Inst.getOperand(2);
-  if (!LaneSelOp.isReg())
-    return false;
-  auto LaneSelReg = mc2PseudoReg(LaneSelOp.getReg());
-  return LaneSelReg == M0 || LaneSelReg == M0_gfxpre11;
-}
-
-bool AMDGPUAsmParser::validateConstantBusLimitations(
-    const MCInst &Inst, const OperandVector &Operands) {
-  const unsigned Opcode = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opcode);
-  MCRegister LastSGPR;
-  unsigned ConstantBusUseCount = 0;
-  unsigned NumLiterals = 0;
-  unsigned LiteralSize;
-
-  if (!(Desc.TSFlags &
-        (SIInstrFlags::VOPC | SIInstrFlags::VOP1 | SIInstrFlags::VOP2 |
-         SIInstrFlags::VOP3 | SIInstrFlags::VOP3P | SIInstrFlags::SDWA)) &&
-      !isVOPD(Opcode))
-    return true;
-
-  if (checkWriteLane(Inst))
-    return true;
-
-  // Check special imm operands (used by madmk, etc)
-  if (AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::imm)) {
-    ++NumLiterals;
-    LiteralSize = 4;
-  }
-
-  SmallDenseSet<MCRegister> SGPRsUsed;
-  MCRegister SGPRUsed = findImplicitSGPRReadInVOP(Inst);
-  if (SGPRUsed) {
-    SGPRsUsed.insert(SGPRUsed);
-    ++ConstantBusUseCount;
-  }
-
-  OperandIndices OpIndices = getSrcOperandIndices(Opcode);
-
-  unsigned ConstantBusLimit = getConstantBusLimit(Opcode);
-
-  for (int OpIdx : OpIndices) {
-    if (OpIdx == -1)
-      continue;
-
-    const MCOperand &MO = Inst.getOperand(OpIdx);
-    if (usesConstantBus(Inst, OpIdx)) {
-      if (MO.isReg()) {
-        LastSGPR = mc2PseudoReg(MO.getReg());
-        // Pairs of registers with a partial intersections like these
-        //   s0, s[0:1]
-        //   flat_scratch_lo, flat_scratch
-        //   flat_scratch_lo, flat_scratch_hi
-        // are theoretically valid but they are disabled anyway.
-        // Note that this code mimics SIInstrInfo::verifyInstruction
-        if (SGPRsUsed.insert(LastSGPR).second) {
-          ++ConstantBusUseCount;
-        }
-      } else { // Expression or a literal
-
-        if (Desc.operands()[OpIdx].OperandType == MCOI::OPERAND_IMMEDIATE)
-          continue; // special operand like VINTERP attr_chan
-
-        // An instruction may use only one literal.
-        // This has been validated on the previous step.
-        // See validateVOPLiteral.
-        // This literal may be used as more than one operand.
-        // If all these operands are of the same size,
-        // this literal counts as one scalar value.
-        // Otherwise it counts as 2 scalar values.
-        // See "GFX10 Shader Programming", section 3.6.2.3.
-
-        unsigned Size = AMDGPU::getOperandSize(Desc, OpIdx);
-        if (Size < 4)
-          Size = 4;
-
-        if (NumLiterals == 0) {
-          NumLiterals = 1;
-          LiteralSize = Size;
-        } else if (LiteralSize != Size) {
-          NumLiterals = 2;
-        }
-      }
-    }
-
-    if (ConstantBusUseCount + NumLiterals > ConstantBusLimit) {
-      Error(getOperandLoc(Operands, OpIdx),
-            "invalid operand (violates constant bus restrictions)");
-      return false;
-    }
-  }
-  return true;
-}
-
-std::optional<unsigned>
-AMDGPUAsmParser::checkVOPDRegBankConstraints(const MCInst &Inst, bool AsVOPD3) {
-
-  const unsigned Opcode = Inst.getOpcode();
-  if (!isVOPD(Opcode))
-    return {};
-
-  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
-
-  auto getVRegIdx = [&](unsigned, unsigned OperandIdx) {
-    const MCOperand &Opr = Inst.getOperand(OperandIdx);
-    return (Opr.isReg() && !isSGPR(mc2PseudoReg(Opr.getReg()), TRI))
-               ? Opr.getReg()
-               : MCRegister();
-  };
-
-  // On GFX1170+ if both OpX and OpY are V_MOV_B32 then OPY uses SRC2
-  // source-cache.
-  bool SkipSrc =
-      Opcode == AMDGPU::V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx1170 ||
-      Opcode == AMDGPU::V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx12 ||
-      Opcode == AMDGPU::V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx1250 ||
-      Opcode == AMDGPU::V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx13 ||
-      Opcode == AMDGPU::V_DUAL_MOV_B32_e32_X_MOV_B32_e32_e96_gfx1250 ||
-      Opcode == AMDGPU::V_DUAL_MOV_B32_e32_X_MOV_B32_e32_e96_gfx13;
-  bool AllowSameVGPR = isGFX1250Plus();
-
-  if (AsVOPD3) { // Literal constants are not allowed with VOPD3.
-    for (auto OpName : {OpName::src0X, OpName::src0Y}) {
-      int I = getNamedOperandIdx(Opcode, OpName);
-      const MCOperand &Op = Inst.getOperand(I);
-      if (!Op.isImm())
-        continue;
-      int64_t Imm = Op.getImm();
-      if (!AMDGPU::isInlinableLiteral32(Imm, hasInv2PiInlineImm()) &&
-          !AMDGPU::isInlinableLiteral64(Imm, hasInv2PiInlineImm()))
-        return (unsigned)I;
-    }
-
-    for (auto OpName : {OpName::vsrc1X, OpName::vsrc1Y, OpName::vsrc2X,
-                        OpName::vsrc2Y, OpName::imm}) {
-      int I = getNamedOperandIdx(Opcode, OpName);
-      if (I == -1)
-        continue;
-      const MCOperand &Op = Inst.getOperand(I);
-      if (Op.isImm())
-        return (unsigned)I;
-    }
-  }
-
-  const auto &InstInfo = getVOPDInstInfo(Opcode, &MII);
-  auto InvalidCompOprIdx = InstInfo.getInvalidCompOperandIndex(
-      getVRegIdx, *TRI, SkipSrc, AllowSameVGPR, AsVOPD3);
-
-  return InvalidCompOprIdx;
-}
-
-bool AMDGPUAsmParser::validateVOPD(const MCInst &Inst,
-                                   const OperandVector &Operands) {
-
-  unsigned Opcode = Inst.getOpcode();
-  bool AsVOPD3 = MII.get(Opcode).TSFlags & SIInstrFlags::VOPD3;
-
-  if (AsVOPD3) {
-    for (const std::unique_ptr<MCParsedAsmOperand> &Operand : Operands) {
-      AMDGPUOperand &Op = (AMDGPUOperand &)*Operand;
-      if ((Op.isRegKind() || Op.isImmTy(AMDGPUOperand::ImmTyNone)) &&
-          (Op.getModifiers().getFPModifiersOperand() & SISrcMods::ABS))
-        Error(Op.getStartLoc(), "ABS not allowed in VOPD3 instructions");
-    }
-  }
-
-  auto InvalidCompOprIdx = checkVOPDRegBankConstraints(Inst, AsVOPD3);
-  if (!InvalidCompOprIdx.has_value())
-    return true;
-
-  auto CompOprIdx = *InvalidCompOprIdx;
-  const auto &InstInfo = getVOPDInstInfo(Opcode, &MII);
-  auto ParsedIdx =
-      std::max(InstInfo[VOPD::X].getIndexInParsedOperands(CompOprIdx),
-               InstInfo[VOPD::Y].getIndexInParsedOperands(CompOprIdx));
-  assert(ParsedIdx > 0 && ParsedIdx < Operands.size());
-
-  auto Loc = ((AMDGPUOperand &)*Operands[ParsedIdx]).getStartLoc();
-  if (CompOprIdx == VOPD::Component::DST) {
-    if (AsVOPD3)
-      Error(Loc, "dst registers must be distinct");
-    else
-      Error(Loc, "one dst register must be even and the other odd");
-  } else {
-    auto CompSrcIdx = CompOprIdx - VOPD::Component::DST_NUM;
-    Error(Loc, Twine("src") + Twine(CompSrcIdx) +
-                   " operands must use different VGPR banks");
-  }
-
-  return false;
-}
-
-// \returns true if \p Inst does not satisfy VOPD constraints, but can be
-// potentially used as VOPD3 with the same operands.
-bool AMDGPUAsmParser::tryVOPD3(const MCInst &Inst) {
-  // First check if it fits VOPD
-  auto InvalidCompOprIdx = checkVOPDRegBankConstraints(Inst, false);
-  if (!InvalidCompOprIdx.has_value())
-    return false;
-
-  // Then if it fits VOPD3
-  InvalidCompOprIdx = checkVOPDRegBankConstraints(Inst, true);
-  if (InvalidCompOprIdx.has_value()) {
-    // If failed operand is dst it is better to show error about VOPD3
-    // instruction as it has more capabilities and error message will be
-    // more informative. If the dst is not legal for VOPD3, then it is not
-    // legal for VOPD either.
-    if (*InvalidCompOprIdx == VOPD::Component::DST)
-      return true;
-
-    // Otherwise prefer VOPD as we may find ourselves in an awkward situation
-    // with a conflict in tied implicit src2 of fmac and no asm operand to
-    // to point to.
-    return false;
-  }
-  return true;
-}
-
-// \returns true is a VOPD3 instruction can be also represented as a shorter
-// VOPD encoding.
-bool AMDGPUAsmParser::tryVOPD(const MCInst &Inst) {
-  const unsigned Opcode = Inst.getOpcode();
-  const auto &II = getVOPDInstInfo(Opcode, &MII);
-  unsigned EncodingFamily = AMDGPU::getVOPDEncodingFamily(getSTI());
-  if (!getCanBeVOPD(II[VOPD::X].getOpcode(), EncodingFamily, false).X ||
-      !getCanBeVOPD(II[VOPD::Y].getOpcode(), EncodingFamily, false).Y)
-    return false;
-
-  // This is an awkward exception, VOPD3 variant of V_DUAL_CNDMASK_B32 has
-  // explicit src2 even if it is vcc_lo. If it was parsed as VOPD3 it cannot
-  // be parsed as VOPD which does not accept src2.
-  if (II[VOPD::X].getOpcode() == AMDGPU::V_CNDMASK_B32_e32 ||
-      II[VOPD::Y].getOpcode() == AMDGPU::V_CNDMASK_B32_e32)
-    return false;
-
-  // If any modifiers are set this cannot be VOPD.
-  for (auto OpName : {OpName::src0X_modifiers, OpName::src0Y_modifiers,
-                      OpName::vsrc1X_modifiers, OpName::vsrc1Y_modifiers,
-                      OpName::vsrc2X_modifiers, OpName::vsrc2Y_modifiers}) {
-    int I = getNamedOperandIdx(Opcode, OpName);
-    if (I == -1)
-      continue;
-    if (Inst.getOperand(I).getImm())
-      return false;
-  }
-
-  return !tryVOPD3(Inst);
-}
-
-// VOPD3 has more relaxed register constraints than VOPD. We prefer shorter VOPD
-// form but switch to VOPD3 otherwise.
-bool AMDGPUAsmParser::tryAnotherVOPDEncoding(const MCInst &Inst) {
-  const unsigned Opcode = Inst.getOpcode();
-  if (!isGFX1250Plus() || !isVOPD(Opcode))
-    return false;
-
-  if (MII.get(Opcode).TSFlags & SIInstrFlags::VOPD3)
-    return tryVOPD(Inst);
-  return tryVOPD3(Inst);
-}
-
-bool AMDGPUAsmParser::validateIntClampSupported(const MCInst &Inst) {
-
-  const unsigned Opc = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  if ((Desc.TSFlags & SIInstrFlags::IntClamp) != 0 && !hasIntClamp()) {
-    int ClampIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::clamp);
-    assert(ClampIdx != -1);
-    return Inst.getOperand(ClampIdx).getImm() == 0;
-  }
-
-  return true;
-}
-
-constexpr uint64_t MIMGFlags =
-    SIInstrFlags::MIMG | SIInstrFlags::VIMAGE | SIInstrFlags::VSAMPLE;
-
-bool AMDGPUAsmParser::validateMIMGDataSize(const MCInst &Inst, SMLoc IDLoc) {
-
-  const unsigned Opc = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  if ((Desc.TSFlags & MIMGFlags) == 0)
-    return true;
-
-  int VDataIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdata);
-  int DMaskIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dmask);
-  int TFEIdx   = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::tfe);
-
-  if (VDataIdx == -1 && isGFX10Plus()) // no return image_sample
-    return true;
-
-  if ((DMaskIdx == -1 || TFEIdx == -1) && isGFX10_AEncoding()) // intersect_ray
-    return true;
-
-  unsigned VDataSize = getRegOperandSize(Desc, VDataIdx);
-  unsigned TFESize = (TFEIdx != -1 && Inst.getOperand(TFEIdx).getImm()) ? 1 : 0;
-  unsigned DMask = Inst.getOperand(DMaskIdx).getImm() & 0xf;
-  if (DMask == 0)
-    DMask = 1;
-
-  bool IsPackedD16 = false;
-  unsigned DataSize =
-      (Desc.TSFlags & SIInstrFlags::Gather4) ? 4 : llvm::popcount(DMask);
-  if (hasPackedD16()) {
-    int D16Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::d16);
-    IsPackedD16 = D16Idx >= 0;
-    if (IsPackedD16 && Inst.getOperand(D16Idx).getImm())
-      DataSize = (DataSize + 1) / 2;
-  }
-
-  if ((VDataSize / 4) == DataSize + TFESize)
-    return true;
-
-  StringRef Modifiers;
-  if (isGFX90A())
-    Modifiers = IsPackedD16 ? "dmask and d16" : "dmask";
-  else
-    Modifiers = IsPackedD16 ? "dmask, d16 and tfe" : "dmask and tfe";
-
-  Error(IDLoc, Twine("image data size does not match ") + Modifiers);
-  return false;
-}
-
-bool AMDGPUAsmParser::validateMIMGAddrSize(const MCInst &Inst, SMLoc IDLoc) {
-  const unsigned Opc = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  if ((Desc.TSFlags & MIMGFlags) == 0 || !isGFX10Plus())
-    return true;
-
-  const AMDGPU::MIMGInfo *Info = AMDGPU::getMIMGInfo(Opc);
-
-  const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode =
-      AMDGPU::getMIMGBaseOpcodeInfo(Info->BaseOpcode);
-  int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0);
-  AMDGPU::OpName RSrcOpName = (Desc.TSFlags & SIInstrFlags::MIMG)
-                                  ? AMDGPU::OpName::srsrc
-                                  : AMDGPU::OpName::rsrc;
-  int SrsrcIdx = AMDGPU::getNamedOperandIdx(Opc, RSrcOpName);
-  int DimIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dim);
-  int A16Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::a16);
-
-  assert(VAddr0Idx != -1);
-  assert(SrsrcIdx != -1);
-  assert(SrsrcIdx > VAddr0Idx);
-
-  bool IsA16 = (A16Idx != -1 && Inst.getOperand(A16Idx).getImm());
-  if (BaseOpcode->BVH) {
-    if (IsA16 == BaseOpcode->A16)
-      return true;
-    Error(IDLoc, "image address size does not match a16");
-    return false;
-  }
-
-  unsigned Dim = Inst.getOperand(DimIdx).getImm();
-  const AMDGPU::MIMGDimInfo *DimInfo = AMDGPU::getMIMGDimInfoByEncoding(Dim);
-  bool IsNSA = SrsrcIdx - VAddr0Idx > 1;
-  unsigned ActualAddrSize =
-      IsNSA ? SrsrcIdx - VAddr0Idx : getRegOperandSize(Desc, VAddr0Idx) / 4;
-
-  unsigned ExpectedAddrSize =
-      AMDGPU::getAddrSizeMIMGOp(BaseOpcode, DimInfo, IsA16, hasG16());
-
-  if (IsNSA) {
-    if (hasPartialNSAEncoding() &&
-        ExpectedAddrSize >
-            getNSAMaxSize(Desc.TSFlags & SIInstrFlags::VSAMPLE)) {
-      int VAddrLastIdx = SrsrcIdx - 1;
-      unsigned VAddrLastSize = getRegOperandSize(Desc, VAddrLastIdx) / 4;
-
-      ActualAddrSize = VAddrLastIdx - VAddr0Idx + VAddrLastSize;
-    }
-  } else {
-    if (ExpectedAddrSize > 12)
-      ExpectedAddrSize = 16;
-
-    // Allow oversized 8 VGPR vaddr when only 5/6/7 VGPRs are required.
-    // This provides backward compatibility for assembly created
-    // before 160b/192b/224b types were directly supported.
-    if (ActualAddrSize == 8 && (ExpectedAddrSize >= 5 && ExpectedAddrSize <= 7))
-      return true;
-  }
-
-  if (ActualAddrSize == ExpectedAddrSize)
-    return true;
-
-  Error(IDLoc, "image address size does not match dim and a16");
-  return false;
-}
-
-bool AMDGPUAsmParser::validateMIMGAtomicDMask(const MCInst &Inst) {
-
-  const unsigned Opc = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  if ((Desc.TSFlags & MIMGFlags) == 0)
-    return true;
-  if (!Desc.mayLoad() || !Desc.mayStore())
-    return true; // Not atomic
-
-  int DMaskIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dmask);
-  unsigned DMask = Inst.getOperand(DMaskIdx).getImm() & 0xf;
-
-  // This is an incomplete check because image_atomic_cmpswap
-  // may only use 0x3 and 0xf while other atomic operations
-  // may use 0x1 and 0x3. However these limitations are
-  // verified when we check that dmask matches dst size.
-  return DMask == 0x1 || DMask == 0x3 || DMask == 0xf;
-}
-
-bool AMDGPUAsmParser::validateMIMGGatherDMask(const MCInst &Inst) {
-
-  const unsigned Opc = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  if ((Desc.TSFlags & SIInstrFlags::Gather4) == 0)
-    return true;
-
-  int DMaskIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dmask);
-  unsigned DMask = Inst.getOperand(DMaskIdx).getImm() & 0xf;
-
-  // GATHER4 instructions use dmask in a different fashion compared to
-  // other MIMG instructions. The only useful DMASK values are
-  // 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
-  // (red,red,red,red) etc.) The ISA document doesn't mention
-  // this.
-  return DMask == 0x1 || DMask == 0x2 || DMask == 0x4 || DMask == 0x8;
-}
-
-bool AMDGPUAsmParser::validateMIMGDim(const MCInst &Inst,
-                                      const OperandVector &Operands) {
-  if (!isGFX10Plus())
-    return true;
-
-  const unsigned Opc = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  if ((Desc.TSFlags & MIMGFlags) == 0)
-    return true;
-
-  // image_bvh_intersect_ray instructions do not have dim
-  if (AMDGPU::getMIMGBaseOpcode(Opc)->BVH)
-    return true;
-
-  for (unsigned i = 1, e = Operands.size(); i != e; ++i) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
-    if (Op.isDim())
-      return true;
-  }
-  return false;
-}
-
-bool AMDGPUAsmParser::validateMIMGMSAA(const MCInst &Inst) {
-  const unsigned Opc = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  if ((Desc.TSFlags & MIMGFlags) == 0)
-    return true;
-
-  const AMDGPU::MIMGInfo *Info = AMDGPU::getMIMGInfo(Opc);
-  const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode =
-      AMDGPU::getMIMGBaseOpcodeInfo(Info->BaseOpcode);
-
-  if (!BaseOpcode->MSAA)
-    return true;
-
-  int DimIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dim);
-  assert(DimIdx != -1);
-
-  unsigned Dim = Inst.getOperand(DimIdx).getImm();
-  const AMDGPU::MIMGDimInfo *DimInfo = AMDGPU::getMIMGDimInfoByEncoding(Dim);
-
-  return DimInfo->MSAA;
-}
-
-static bool IsMovrelsSDWAOpcode(const unsigned Opcode)
-{
-  switch (Opcode) {
-  case AMDGPU::V_MOVRELS_B32_sdwa_gfx10:
-  case AMDGPU::V_MOVRELSD_B32_sdwa_gfx10:
-  case AMDGPU::V_MOVRELSD_2_B32_sdwa_gfx10:
-    return true;
-  default:
-    return false;
-  }
-}
-
-// movrels* opcodes should only allow VGPRS as src0.
-// This is specified in .td description for vop1/vop3,
-// but sdwa is handled differently. See isSDWAOperand.
-bool AMDGPUAsmParser::validateMovrels(const MCInst &Inst,
-                                      const OperandVector &Operands) {
-
-  const unsigned Opc = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  if ((Desc.TSFlags & SIInstrFlags::SDWA) == 0 || !IsMovrelsSDWAOpcode(Opc))
-    return true;
-
-  const int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
-  assert(Src0Idx != -1);
-
-  const MCOperand &Src0 = Inst.getOperand(Src0Idx);
-  if (Src0.isReg()) {
-    auto Reg = mc2PseudoReg(Src0.getReg());
-    const MCRegisterInfo *TRI = getContext().getRegisterInfo();
-    if (!isSGPR(Reg, TRI))
-      return true;
-  }
-
-  Error(getOperandLoc(Operands, Src0Idx), "source operand must be a VGPR");
-  return false;
-}
-
-bool AMDGPUAsmParser::validateMAIAccWrite(const MCInst &Inst,
-                                          const OperandVector &Operands) {
-
-  const unsigned Opc = Inst.getOpcode();
-
-  if (Opc != AMDGPU::V_ACCVGPR_WRITE_B32_vi)
-    return true;
-
-  const int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
-  assert(Src0Idx != -1);
-
-  const MCOperand &Src0 = Inst.getOperand(Src0Idx);
-  if (!Src0.isReg())
-    return true;
-
-  auto Reg = mc2PseudoReg(Src0.getReg());
-  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
-  if (!isGFX90A() && isSGPR(Reg, TRI)) {
-    Error(getOperandLoc(Operands, Src0Idx),
-          "source operand must be either a VGPR or an inline constant");
-    return false;
-  }
-
-  return true;
-}
-
-bool AMDGPUAsmParser::validateMAISrc2(const MCInst &Inst,
-                                      const OperandVector &Operands) {
-  unsigned Opcode = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opcode);
-
-  if (!(Desc.TSFlags & SIInstrFlags::IsMAI) ||
-      !getFeatureBits()[FeatureMFMAInlineLiteralBug])
-    return true;
-
-  const int Src2Idx = getNamedOperandIdx(Opcode, OpName::src2);
-  if (Src2Idx == -1)
-    return true;
-
-  if (Inst.getOperand(Src2Idx).isImm() && isInlineConstant(Inst, Src2Idx)) {
-    Error(getOperandLoc(Operands, Src2Idx),
-          "inline constants are not allowed for this operand");
-    return false;
-  }
-
-  return true;
-}
-
-bool AMDGPUAsmParser::validateMFMA(const MCInst &Inst,
-                                   const OperandVector &Operands) {
-  const unsigned Opc = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  if ((Desc.TSFlags & SIInstrFlags::IsMAI) == 0)
-    return true;
-
-  int BlgpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::blgp);
-  if (BlgpIdx != -1) {
-    if (const MFMA_F8F6F4_Info *Info = AMDGPU::isMFMA_F8F6F4(Opc)) {
-      int CbszIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::cbsz);
-
-      unsigned CBSZ = Inst.getOperand(CbszIdx).getImm();
-      unsigned BLGP = Inst.getOperand(BlgpIdx).getImm();
-
-      // Validate the correct register size was used for the floating point
-      // format operands
-
-      bool Success = true;
-      if (Info->NumRegsSrcA != mfmaScaleF8F6F4FormatToNumRegs(CBSZ)) {
-        int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
-        Error(getOperandLoc(Operands, Src0Idx),
-              "wrong register tuple size for cbsz value " + Twine(CBSZ));
-        Success = false;
-      }
-
-      if (Info->NumRegsSrcB != mfmaScaleF8F6F4FormatToNumRegs(BLGP)) {
-        int Src1Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1);
-        Error(getOperandLoc(Operands, Src1Idx),
-              "wrong register tuple size for blgp value " + Twine(BLGP));
-        Success = false;
-      }
-
-      return Success;
-    }
-  }
-
-  const int Src2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2);
-  if (Src2Idx == -1)
-    return true;
-
-  const MCOperand &Src2 = Inst.getOperand(Src2Idx);
-  if (!Src2.isReg())
-    return true;
-
-  MCRegister Src2Reg = Src2.getReg();
-  MCRegister DstReg = Inst.getOperand(0).getReg();
-  if (Src2Reg == DstReg)
-    return true;
-
-  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
-  if (TRI->getRegClass(MII.getOpRegClassID(Desc.operands()[0], HwMode))
-          .getSizeInBits() <= 128)
-    return true;
-
-  if (TRI->regsOverlap(Src2Reg, DstReg)) {
-    Error(getOperandLoc(Operands, Src2Idx),
-          "source 2 operand must not partially overlap with dst");
-    return false;
-  }
-
-  return true;
-}
-
-bool AMDGPUAsmParser::validateDivScale(const MCInst &Inst) {
-  switch (Inst.getOpcode()) {
-  default:
-    return true;
-  case V_DIV_SCALE_F32_gfx6_gfx7:
-  case V_DIV_SCALE_F32_vi:
-  case V_DIV_SCALE_F32_gfx10:
-  case V_DIV_SCALE_F64_gfx6_gfx7:
-  case V_DIV_SCALE_F64_vi:
-  case V_DIV_SCALE_F64_gfx10:
-    break;
-  }
-
-  // TODO: Check that src0 = src1 or src2.
-
-  for (auto Name : {AMDGPU::OpName::src0_modifiers,
-                    AMDGPU::OpName::src2_modifiers,
-                    AMDGPU::OpName::src2_modifiers}) {
-    if (Inst.getOperand(AMDGPU::getNamedOperandIdx(Inst.getOpcode(), Name))
-            .getImm() &
-        SISrcMods::ABS) {
-      return false;
-    }
-  }
-
-  return true;
-}
-
-bool AMDGPUAsmParser::validateMIMGD16(const MCInst &Inst) {
-
-  const unsigned Opc = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  if ((Desc.TSFlags & MIMGFlags) == 0)
-    return true;
-
-  int D16Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::d16);
-  if (D16Idx >= 0 && Inst.getOperand(D16Idx).getImm()) {
-    if (isCI() || isSI())
-      return false;
-  }
-
-  return true;
-}
-
-bool AMDGPUAsmParser::validateTensorR128(const MCInst &Inst) {
-  const unsigned Opc = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  if ((Desc.TSFlags & SIInstrFlags::TENSOR_CNT) == 0)
-    return true;
-
-  int R128Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::r128);
-
-  return R128Idx < 0 || !Inst.getOperand(R128Idx).getImm();
-}
-
-static bool IsRevOpcode(const unsigned Opcode)
-{
-  switch (Opcode) {
-  case AMDGPU::V_SUBREV_F32_e32:
-  case AMDGPU::V_SUBREV_F32_e64:
-  case AMDGPU::V_SUBREV_F32_e32_gfx10:
-  case AMDGPU::V_SUBREV_F32_e32_gfx6_gfx7:
-  case AMDGPU::V_SUBREV_F32_e32_vi:
-  case AMDGPU::V_SUBREV_F32_e64_gfx10:
-  case AMDGPU::V_SUBREV_F32_e64_gfx6_gfx7:
-  case AMDGPU::V_SUBREV_F32_e64_vi:
-
-  case AMDGPU::V_SUBREV_CO_U32_e32:
-  case AMDGPU::V_SUBREV_CO_U32_e64:
-  case AMDGPU::V_SUBREV_I32_e32_gfx6_gfx7:
-  case AMDGPU::V_SUBREV_I32_e64_gfx6_gfx7:
-
-  case AMDGPU::V_SUBBREV_U32_e32:
-  case AMDGPU::V_SUBBREV_U32_e64:
-  case AMDGPU::V_SUBBREV_U32_e32_gfx6_gfx7:
-  case AMDGPU::V_SUBBREV_U32_e32_vi:
-  case AMDGPU::V_SUBBREV_U32_e64_gfx6_gfx7:
-  case AMDGPU::V_SUBBREV_U32_e64_vi:
-
-  case AMDGPU::V_SUBREV_U32_e32:
-  case AMDGPU::V_SUBREV_U32_e64:
-  case AMDGPU::V_SUBREV_U32_e32_gfx9:
-  case AMDGPU::V_SUBREV_U32_e32_vi:
-  case AMDGPU::V_SUBREV_U32_e64_gfx9:
-  case AMDGPU::V_SUBREV_U32_e64_vi:
-
-  case AMDGPU::V_SUBREV_F16_e32:
-  case AMDGPU::V_SUBREV_F16_e64:
-  case AMDGPU::V_SUBREV_F16_e32_gfx10:
-  case AMDGPU::V_SUBREV_F16_e32_vi:
-  case AMDGPU::V_SUBREV_F16_e64_gfx10:
-  case AMDGPU::V_SUBREV_F16_e64_vi:
-
-  case AMDGPU::V_SUBREV_U16_e32:
-  case AMDGPU::V_SUBREV_U16_e64:
-  case AMDGPU::V_SUBREV_U16_e32_vi:
-  case AMDGPU::V_SUBREV_U16_e64_vi:
-
-  case AMDGPU::V_SUBREV_CO_U32_e32_gfx9:
-  case AMDGPU::V_SUBREV_CO_U32_e64_gfx10:
-  case AMDGPU::V_SUBREV_CO_U32_e64_gfx9:
-
-  case AMDGPU::V_SUBBREV_CO_U32_e32_gfx9:
-  case AMDGPU::V_SUBBREV_CO_U32_e64_gfx9:
-
-  case AMDGPU::V_SUBREV_NC_U32_e32_gfx10:
-  case AMDGPU::V_SUBREV_NC_U32_e64_gfx10:
-
-  case AMDGPU::V_SUBREV_CO_CI_U32_e32_gfx10:
-  case AMDGPU::V_SUBREV_CO_CI_U32_e64_gfx10:
-
-  case AMDGPU::V_LSHRREV_B32_e32:
-  case AMDGPU::V_LSHRREV_B32_e64:
-  case AMDGPU::V_LSHRREV_B32_e32_gfx6_gfx7:
-  case AMDGPU::V_LSHRREV_B32_e64_gfx6_gfx7:
-  case AMDGPU::V_LSHRREV_B32_e32_vi:
-  case AMDGPU::V_LSHRREV_B32_e64_vi:
-  case AMDGPU::V_LSHRREV_B32_e32_gfx10:
-  case AMDGPU::V_LSHRREV_B32_e64_gfx10:
-
-  case AMDGPU::V_ASHRREV_I32_e32:
-  case AMDGPU::V_ASHRREV_I32_e64:
-  case AMDGPU::V_ASHRREV_I32_e32_gfx10:
-  case AMDGPU::V_ASHRREV_I32_e32_gfx6_gfx7:
-  case AMDGPU::V_ASHRREV_I32_e32_vi:
-  case AMDGPU::V_ASHRREV_I32_e64_gfx10:
-  case AMDGPU::V_ASHRREV_I32_e64_gfx6_gfx7:
-  case AMDGPU::V_ASHRREV_I32_e64_vi:
-
-  case AMDGPU::V_LSHLREV_B32_e32:
-  case AMDGPU::V_LSHLREV_B32_e64:
-  case AMDGPU::V_LSHLREV_B32_e32_gfx10:
-  case AMDGPU::V_LSHLREV_B32_e32_gfx6_gfx7:
-  case AMDGPU::V_LSHLREV_B32_e32_vi:
-  case AMDGPU::V_LSHLREV_B32_e64_gfx10:
-  case AMDGPU::V_LSHLREV_B32_e64_gfx6_gfx7:
-  case AMDGPU::V_LSHLREV_B32_e64_vi:
-
-  case AMDGPU::V_LSHLREV_B16_e32:
-  case AMDGPU::V_LSHLREV_B16_e64:
-  case AMDGPU::V_LSHLREV_B16_e32_vi:
-  case AMDGPU::V_LSHLREV_B16_e64_vi:
-  case AMDGPU::V_LSHLREV_B16_gfx10:
-
-  case AMDGPU::V_LSHRREV_B16_e32:
-  case AMDGPU::V_LSHRREV_B16_e64:
-  case AMDGPU::V_LSHRREV_B16_e32_vi:
-  case AMDGPU::V_LSHRREV_B16_e64_vi:
-  case AMDGPU::V_LSHRREV_B16_gfx10:
-
-  case AMDGPU::V_ASHRREV_I16_e32:
-  case AMDGPU::V_ASHRREV_I16_e64:
-  case AMDGPU::V_ASHRREV_I16_e32_vi:
-  case AMDGPU::V_ASHRREV_I16_e64_vi:
-  case AMDGPU::V_ASHRREV_I16_gfx10:
-
-  case AMDGPU::V_LSHLREV_B64_e64:
-  case AMDGPU::V_LSHLREV_B64_gfx10:
-  case AMDGPU::V_LSHLREV_B64_vi:
-
-  case AMDGPU::V_LSHRREV_B64_e64:
-  case AMDGPU::V_LSHRREV_B64_gfx10:
-  case AMDGPU::V_LSHRREV_B64_vi:
-
-  case AMDGPU::V_ASHRREV_I64_e64:
-  case AMDGPU::V_ASHRREV_I64_gfx10:
-  case AMDGPU::V_ASHRREV_I64_vi:
-
-  case AMDGPU::V_PK_LSHLREV_B16:
-  case AMDGPU::V_PK_LSHLREV_B16_gfx10:
-  case AMDGPU::V_PK_LSHLREV_B16_vi:
-
-  case AMDGPU::V_PK_LSHRREV_B16:
-  case AMDGPU::V_PK_LSHRREV_B16_gfx10:
-  case AMDGPU::V_PK_LSHRREV_B16_vi:
-  case AMDGPU::V_PK_ASHRREV_I16:
-  case AMDGPU::V_PK_ASHRREV_I16_gfx10:
-  case AMDGPU::V_PK_ASHRREV_I16_vi:
-    return true;
-  default:
-    return false;
-  }
-}
-
-bool AMDGPUAsmParser::validateLdsDirect(const MCInst &Inst,
-                                        const OperandVector &Operands) {
-  using namespace SIInstrFlags;
-  const unsigned Opcode = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opcode);
-
-  // lds_direct register is defined so that it can be used
-  // with 9-bit operands only. Ignore encodings which do not accept these.
-  const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA;
-  if ((Desc.TSFlags & Enc) == 0)
-    return true;
-
-  for (auto SrcName : {OpName::src0, OpName::src1, OpName::src2}) {
-    auto SrcIdx = getNamedOperandIdx(Opcode, SrcName);
-    if (SrcIdx == -1)
-      break;
-    const auto &Src = Inst.getOperand(SrcIdx);
-    if (Src.isReg() && Src.getReg() == LDS_DIRECT) {
-
-      if (isGFX90A() || isGFX11Plus()) {
-        Error(getOperandLoc(Operands, SrcIdx),
-              "lds_direct is not supported on this GPU");
-        return false;
-      }
-
-      if (IsRevOpcode(Opcode) || (Desc.TSFlags & SIInstrFlags::SDWA)) {
-        Error(getOperandLoc(Operands, SrcIdx),
-              "lds_direct cannot be used with this instruction");
-        return false;
-      }
-
-      if (SrcName != OpName::src0) {
-        Error(getOperandLoc(Operands, SrcIdx),
-              "lds_direct may be used as src0 only");
-        return false;
-      }
-    }
-  }
-
-  return true;
-}
-
-SMLoc AMDGPUAsmParser::getFlatOffsetLoc(const OperandVector &Operands) const {
-  for (unsigned i = 1, e = Operands.size(); i != e; ++i) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
-    if (Op.isFlatOffset())
-      return Op.getStartLoc();
-  }
-  return getLoc();
-}
-
-bool AMDGPUAsmParser::validateOffset(const MCInst &Inst,
-                                     const OperandVector &Operands) {
-  auto Opcode = Inst.getOpcode();
-  auto OpNum = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::offset);
-  if (OpNum == -1)
-    return true;
-
-  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
-  if ((TSFlags & SIInstrFlags::FLAT))
-    return validateFlatOffset(Inst, Operands);
-
-  if ((TSFlags & SIInstrFlags::SMRD))
-    return validateSMEMOffset(Inst, Operands);
-
-  const auto &Op = Inst.getOperand(OpNum);
-  // GFX12+ buffer ops: InstOffset is signed 24, but must not be a negative.
-  if (isGFX12Plus() &&
-      (TSFlags & (SIInstrFlags::MUBUF | SIInstrFlags::MTBUF))) {
-    const unsigned OffsetSize = 24;
-    if (!isUIntN(OffsetSize - 1, Op.getImm())) {
-      Error(getFlatOffsetLoc(Operands),
-            Twine("expected a ") + Twine(OffsetSize - 1) +
-                "-bit unsigned offset for buffer ops");
-      return false;
-    }
-  } else {
-    const unsigned OffsetSize = 16;
-    if (!isUIntN(OffsetSize, Op.getImm())) {
-      Error(getFlatOffsetLoc(Operands),
-            Twine("expected a ") + Twine(OffsetSize) + "-bit unsigned offset");
-      return false;
-    }
-  }
-  return true;
-}
-
-bool AMDGPUAsmParser::validateFlatOffset(const MCInst &Inst,
-                                         const OperandVector &Operands) {
-  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
-  if ((TSFlags & SIInstrFlags::FLAT) == 0)
-    return true;
-
-  auto Opcode = Inst.getOpcode();
-  auto OpNum = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::offset);
-  assert(OpNum != -1);
-
-  const auto &Op = Inst.getOperand(OpNum);
-  if (!hasFlatOffsets() && Op.getImm() != 0) {
-    Error(getFlatOffsetLoc(Operands),
-          "flat offset modifier is not supported on this GPU");
-    return false;
-  }
-
-  // For pre-GFX12 FLAT instructions the offset must be positive;
-  // MSB is ignored and forced to zero.
-  unsigned OffsetSize = AMDGPU::getNumFlatOffsetBits(getSTI());
-  bool AllowNegative =
-      (TSFlags & (SIInstrFlags::FlatGlobal | SIInstrFlags::FlatScratch)) ||
-      isGFX12Plus();
-  if (!isIntN(OffsetSize, Op.getImm()) || (!AllowNegative && Op.getImm() < 0)) {
-    Error(getFlatOffsetLoc(Operands),
-          Twine("expected a ") +
-              (AllowNegative ? Twine(OffsetSize) + "-bit signed offset"
-                             : Twine(OffsetSize - 1) + "-bit unsigned offset"));
-    return false;
-  }
-
-  return true;
-}
-
-SMLoc AMDGPUAsmParser::getSMEMOffsetLoc(const OperandVector &Operands) const {
-  // Start with second operand because SMEM Offset cannot be dst or src0.
-  for (unsigned i = 2, e = Operands.size(); i != e; ++i) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
-    if (Op.isSMEMOffset() || Op.isSMEMOffsetMod())
-      return Op.getStartLoc();
-  }
-  return getLoc();
-}
-
-bool AMDGPUAsmParser::validateSMEMOffset(const MCInst &Inst,
-                                         const OperandVector &Operands) {
-  if (isCI() || isSI())
-    return true;
-
-  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
-  if ((TSFlags & SIInstrFlags::SMRD) == 0)
-    return true;
-
-  auto Opcode = Inst.getOpcode();
-  auto OpNum = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::offset);
-  if (OpNum == -1)
-    return true;
-
-  const auto &Op = Inst.getOperand(OpNum);
-  if (!Op.isImm())
-    return true;
-
-  uint64_t Offset = Op.getImm();
-  bool IsBuffer = AMDGPU::getSMEMIsBuffer(Opcode);
-  if (AMDGPU::isLegalSMRDEncodedUnsignedOffset(getSTI(), Offset) ||
-      AMDGPU::isLegalSMRDEncodedSignedOffset(getSTI(), Offset, IsBuffer))
-    return true;
-
-  Error(getSMEMOffsetLoc(Operands),
-        isGFX12Plus() && IsBuffer
-            ? "expected a 23-bit unsigned offset for buffer ops"
-        : isGFX12Plus()        ? "expected a 24-bit signed offset"
-        : (isVI() || IsBuffer) ? "expected a 20-bit unsigned offset"
-                               : "expected a 21-bit signed offset");
-
-  return false;
-}
-
-bool AMDGPUAsmParser::validateSOPLiteral(const MCInst &Inst,
-                                         const OperandVector &Operands) {
-  unsigned Opcode = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opcode);
-  if (!(Desc.TSFlags & (SIInstrFlags::SOP2 | SIInstrFlags::SOPC)))
-    return true;
-
-  const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0);
-  const int Src1Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1);
-
-  const int OpIndices[] = { Src0Idx, Src1Idx };
-
-  unsigned NumExprs = 0;
-  unsigned NumLiterals = 0;
-  int64_t LiteralValue;
-
-  for (int OpIdx : OpIndices) {
-    if (OpIdx == -1) break;
-
-    const MCOperand &MO = Inst.getOperand(OpIdx);
-    // Exclude special imm operands (like that used by s_set_gpr_idx_on)
-    if (AMDGPU::isSISrcOperand(Desc, OpIdx)) {
-      bool IsLit = false;
-      std::optional<int64_t> Imm;
-      if (MO.isImm()) {
-        Imm = MO.getImm();
-      } else if (MO.isExpr()) {
-        if (isLitExpr(MO.getExpr())) {
-          IsLit = true;
-          Imm = getLitValue(MO.getExpr());
-        }
-      } else {
-        continue;
-      }
-
-      if (!Imm.has_value()) {
-        ++NumExprs;
-      } else if (!isInlineConstant(Inst, OpIdx)) {
-        auto OpType = static_cast<AMDGPU::OperandType>(
-            Desc.operands()[OpIdx].OperandType);
-        int64_t Value = encode32BitLiteral(*Imm, OpType, IsLit);
-        if (NumLiterals == 0 || LiteralValue != Value) {
-          LiteralValue = Value;
-          ++NumLiterals;
-        }
-      }
-    }
-  }
-
-  if (NumLiterals + NumExprs <= 1)
-    return true;
-
-  Error(getOperandLoc(Operands, Src1Idx),
-        "only one unique literal operand is allowed");
-  return false;
-}
-
-bool AMDGPUAsmParser::validateOpSel(const MCInst &Inst) {
-  const unsigned Opc = Inst.getOpcode();
-  if (isPermlane16(Opc)) {
-    int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
-    unsigned OpSel = Inst.getOperand(OpSelIdx).getImm();
-
-    if (OpSel & ~3)
-      return false;
-  }
-
-  uint64_t TSFlags = MII.get(Opc).TSFlags;
-
-  if (isGFX940() && (TSFlags & SIInstrFlags::IsDOT)) {
-    int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
-    if (OpSelIdx != -1) {
-      if (Inst.getOperand(OpSelIdx).getImm() != 0)
-        return false;
-    }
-    int OpSelHiIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel_hi);
-    if (OpSelHiIdx != -1) {
-      if (Inst.getOperand(OpSelHiIdx).getImm() != -1)
-        return false;
-    }
-  }
-
-  // op_sel[0:1] must be 0 for v_dot2_bf16_bf16 and v_dot2_f16_f16 (VOP3 Dot).
-  if (isGFX11Plus() && (TSFlags & SIInstrFlags::IsDOT) &&
-      (TSFlags & SIInstrFlags::VOP3) && !(TSFlags & SIInstrFlags::VOP3P)) {
-    int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
-    unsigned OpSel = Inst.getOperand(OpSelIdx).getImm();
-    if (OpSel & 3)
-      return false;
-  }
-
-  // Packed math FP32 instructions typically accept SGPRs or VGPRs as source
-  // operands. On gfx12+, if a source operand uses SGPRs, the HW can only read
-  // the first SGPR and use it for both the low and high operations.
-  if (isPackedFP32Inst(Opc) && isGFX12Plus()) {
-    int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
-    int Src1Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1);
-    int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
-    int OpSelHiIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel_hi);
-
-    const MCOperand &Src0 = Inst.getOperand(Src0Idx);
-    const MCOperand &Src1 = Inst.getOperand(Src1Idx);
-    unsigned OpSel = Inst.getOperand(OpSelIdx).getImm();
-    unsigned OpSelHi = Inst.getOperand(OpSelHiIdx).getImm();
-
-    const MCRegisterInfo *TRI = getContext().getRegisterInfo();
-
-    auto VerifyOneSGPR = [OpSel, OpSelHi](unsigned Index) -> bool {
-      unsigned Mask = 1U << Index;
-      return ((OpSel & Mask) == 0) && ((OpSelHi & Mask) == 0);
-    };
-
-    if (Src0.isReg() && isSGPR(Src0.getReg(), TRI) &&
-        !VerifyOneSGPR(/*Index=*/0))
-      return false;
-    if (Src1.isReg() && isSGPR(Src1.getReg(), TRI) &&
-        !VerifyOneSGPR(/*Index=*/1))
-      return false;
-
-    int Src2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2);
-    if (Src2Idx != -1) {
-      const MCOperand &Src2 = Inst.getOperand(Src2Idx);
-      if (Src2.isReg() && isSGPR(Src2.getReg(), TRI) &&
-          !VerifyOneSGPR(/*Index=*/2))
-        return false;
-    }
-  }
-
-  return true;
-}
-
-bool AMDGPUAsmParser::validateTrue16OpSel(const MCInst &Inst) {
-  if (!hasTrue16Insts())
-    return true;
-  const MCRegisterInfo *MRI = getMRI();
-  const unsigned Opc = Inst.getOpcode();
-  int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
-  if (OpSelIdx == -1)
-    return true;
-  unsigned OpSelOpValue = Inst.getOperand(OpSelIdx).getImm();
-  // If the value is 0 we could have a default OpSel Operand, so conservatively
-  // allow it.
-  if (OpSelOpValue == 0)
-    return true;
-  unsigned OpCount = 0;
-  for (AMDGPU::OpName OpName : {AMDGPU::OpName::src0, AMDGPU::OpName::src1,
-                                AMDGPU::OpName::src2, AMDGPU::OpName::vdst}) {
-    int OpIdx = AMDGPU::getNamedOperandIdx(Inst.getOpcode(), OpName);
-    if (OpIdx == -1)
-      continue;
-    const MCOperand &Op = Inst.getOperand(OpIdx);
-    if (Op.isReg() &&
-        MRI->getRegClass(AMDGPU::VGPR_16RegClassID).contains(Op.getReg())) {
-      bool VGPRSuffixIsHi = AMDGPU::isHi16Reg(Op.getReg(), *MRI);
-      bool OpSelOpIsHi = ((OpSelOpValue & (1 << OpCount)) != 0);
-      if (OpSelOpIsHi != VGPRSuffixIsHi)
-        return false;
-    }
-    ++OpCount;
-  }
-
-  return true;
-}
-
-bool AMDGPUAsmParser::validateNeg(const MCInst &Inst, AMDGPU::OpName OpName) {
-  assert(OpName == AMDGPU::OpName::neg_lo || OpName == AMDGPU::OpName::neg_hi);
-
-  const unsigned Opc = Inst.getOpcode();
-  uint64_t TSFlags = MII.get(Opc).TSFlags;
-
-  // v_dot4 fp8/bf8 neg_lo/neg_hi not allowed on src0 and src1 (allowed on src2)
-  // v_wmma iu4/iu8 neg_lo not allowed on src2 (allowed on src0, src1)
-  // v_swmmac f16/bf16 neg_lo/neg_hi not allowed on src2 (allowed on src0, src1)
-  // other wmma/swmmac instructions don't have neg_lo/neg_hi operand.
-  if (!(TSFlags & SIInstrFlags::IsDOT) && !(TSFlags & SIInstrFlags::IsWMMA) &&
-      !(TSFlags & SIInstrFlags::IsSWMMAC))
-    return true;
-
-  int NegIdx = AMDGPU::getNamedOperandIdx(Opc, OpName);
-  if (NegIdx == -1)
-    return true;
-
-  unsigned Neg = Inst.getOperand(NegIdx).getImm();
-
-  // Instructions that have neg_lo or neg_hi operand but neg modifier is allowed
-  // on some src operands but not allowed on other.
-  // It is convenient that such instructions don't have src_modifiers operand
-  // for src operands that don't allow neg because they also don't allow opsel.
-
-  const AMDGPU::OpName SrcMods[3] = {AMDGPU::OpName::src0_modifiers,
-                                     AMDGPU::OpName::src1_modifiers,
-                                     AMDGPU::OpName::src2_modifiers};
-
-  for (unsigned i = 0; i < 3; ++i) {
-    if (!AMDGPU::hasNamedOperand(Opc, SrcMods[i])) {
-      if (Neg & (1 << i))
-        return false;
-    }
-  }
-
-  return true;
-}
-
-bool AMDGPUAsmParser::validateDPP(const MCInst &Inst,
-                                  const OperandVector &Operands) {
-  const unsigned Opc = Inst.getOpcode();
-  int DppCtrlIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dpp_ctrl);
-  if (DppCtrlIdx >= 0) {
-    unsigned DppCtrl = Inst.getOperand(DppCtrlIdx).getImm();
-
-    if (!AMDGPU::isLegalDPALU_DPPControl(getSTI(), DppCtrl) &&
-        AMDGPU::isDPALU_DPP(MII.get(Opc), MII, getSTI())) {
-      // DP ALU DPP is supported for row_newbcast only on GFX9* and row_share
-      // only on GFX12.
-      SMLoc S = getImmLoc(AMDGPUOperand::ImmTyDppCtrl, Operands);
-      Error(S, isGFX12() ? "DP ALU dpp only supports row_share"
-                         : "DP ALU dpp only supports row_newbcast");
-      return false;
-    }
-  }
-
-  int Dpp8Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::dpp8);
-  bool IsDPP = DppCtrlIdx >= 0 || Dpp8Idx >= 0;
-
-  if (IsDPP && !hasDPPSrc1SGPR(getSTI())) {
-    int Src1Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1);
-    if (Src1Idx >= 0) {
-      const MCOperand &Src1 = Inst.getOperand(Src1Idx);
-      const MCRegisterInfo *TRI = getContext().getRegisterInfo();
-      if (Src1.isReg() && isSGPR(mc2PseudoReg(Src1.getReg()), TRI)) {
-        Error(getOperandLoc(Operands, Src1Idx),
-              "invalid operand for instruction");
-        return false;
-      }
-      if (Src1.isImm()) {
-        Error(getInstLoc(Operands),
-              "src1 immediate operand invalid for instruction");
-        return false;
-      }
-    }
-  }
-
-  return true;
-}
-
-// Check if VCC register matches wavefront size
-bool AMDGPUAsmParser::validateVccOperand(MCRegister Reg) const {
-  return (Reg == AMDGPU::VCC && isWave64()) ||
-         (Reg == AMDGPU::VCC_LO && isWave32());
-}
-
-// One unique literal can be used. VOP3 literal is only allowed in GFX10+
-bool AMDGPUAsmParser::validateVOPLiteral(const MCInst &Inst,
-                                         const OperandVector &Operands) {
-  unsigned Opcode = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opcode);
-  bool HasMandatoryLiteral = getNamedOperandIdx(Opcode, OpName::imm) != -1;
-  if (!(Desc.TSFlags & (SIInstrFlags::VOP3 | SIInstrFlags::VOP3P)) &&
-      !HasMandatoryLiteral && !isVOPD(Opcode))
-    return true;
-
-  OperandIndices OpIndices = getSrcOperandIndices(Opcode, HasMandatoryLiteral);
-
-  std::optional<unsigned> LiteralOpIdx;
-  std::optional<uint64_t> LiteralValue;
-
-  for (int OpIdx : OpIndices) {
-    if (OpIdx == -1)
-      continue;
-
-    const MCOperand &MO = Inst.getOperand(OpIdx);
-    if (!MO.isImm() && !MO.isExpr())
-      continue;
-    if (!isSISrcOperand(Desc, OpIdx))
-      continue;
-
-    std::optional<int64_t> Imm;
-    if (MO.isImm())
-      Imm = MO.getImm();
-    else if (MO.isExpr() && isLitExpr(MO.getExpr()))
-      Imm = getLitValue(MO.getExpr());
-
-    bool IsAnotherLiteral = false;
-    if (!Imm.has_value()) {
-      // Literal value not known, so we conservately assume it's different.
-      IsAnotherLiteral = true;
-    } else if (!isInlineConstant(Inst, OpIdx)) {
-      uint64_t Value = *Imm;
-      bool IsForcedFP64 =
-          Desc.operands()[OpIdx].OperandType == AMDGPU::OPERAND_KIMM64 ||
-          (Desc.operands()[OpIdx].OperandType == AMDGPU::OPERAND_REG_IMM_FP64 &&
-           HasMandatoryLiteral);
-      bool IsFP64 = (IsForcedFP64 || AMDGPU::isSISrcFPOperand(Desc, OpIdx)) &&
-                    AMDGPU::getOperandSize(Desc.operands()[OpIdx]) == 8;
-      bool IsValid32Op = AMDGPU::isValid32BitLiteral(Value, IsFP64);
-
-      if (!IsValid32Op && !isInt<32>(Value) && !isUInt<32>(Value) &&
-          !IsForcedFP64 && (!has64BitLiterals() || Desc.getSize() != 4)) {
-        Error(getOperandLoc(Operands, OpIdx),
-              "invalid operand for instruction");
-        return false;
-      }
-
-      if (IsFP64 && IsValid32Op && !IsForcedFP64)
-        Value = Hi_32(Value);
-
-      IsAnotherLiteral = !LiteralValue || *LiteralValue != Value;
-      LiteralValue = Value;
-    }
-
-    if (IsAnotherLiteral && !HasMandatoryLiteral &&
-        !getFeatureBits()[FeatureVOP3Literal]) {
-      Error(getOperandLoc(Operands, OpIdx),
-            "literal operands are not supported");
-      return false;
-    }
-
-    if (LiteralOpIdx && IsAnotherLiteral) {
-      Error(getLaterLoc(getOperandLoc(Operands, OpIdx),
-                        getOperandLoc(Operands, *LiteralOpIdx)),
-            "only one unique literal operand is allowed");
-      return false;
-    }
-
-    if (IsAnotherLiteral)
-      LiteralOpIdx = OpIdx;
-  }
-
-  return true;
-}
-
-// Returns -1 if not a register, 0 if VGPR and 1 if AGPR.
-static int IsAGPROperand(const MCInst &Inst, AMDGPU::OpName Name,
-                         const MCRegisterInfo *MRI) {
-  int OpIdx = AMDGPU::getNamedOperandIdx(Inst.getOpcode(), Name);
-  if (OpIdx < 0)
-    return -1;
-
-  const MCOperand &Op = Inst.getOperand(OpIdx);
-  if (!Op.isReg())
-    return -1;
-
-  MCRegister Sub = MRI->getSubReg(Op.getReg(), AMDGPU::sub0);
-  auto Reg = Sub ? Sub : Op.getReg();
-  const MCRegisterClass &AGPR32 = MRI->getRegClass(AMDGPU::AGPR_32RegClassID);
-  return AGPR32.contains(Reg) ? 1 : 0;
-}
-
-bool AMDGPUAsmParser::validateAGPRLdSt(const MCInst &Inst) const {
-  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
-  if ((TSFlags & (SIInstrFlags::FLAT | SIInstrFlags::MUBUF |
-                  SIInstrFlags::MTBUF | SIInstrFlags::MIMG |
-                  SIInstrFlags::DS)) == 0)
-    return true;
-
-  AMDGPU::OpName DataName = (TSFlags & SIInstrFlags::DS)
-                                ? AMDGPU::OpName::data0
-                                : AMDGPU::OpName::vdata;
-
-  const MCRegisterInfo *MRI = getMRI();
-  int DstAreg = IsAGPROperand(Inst, AMDGPU::OpName::vdst, MRI);
-  int DataAreg = IsAGPROperand(Inst, DataName, MRI);
-
-  if ((TSFlags & SIInstrFlags::DS) && DataAreg >= 0) {
-    int Data2Areg = IsAGPROperand(Inst, AMDGPU::OpName::data1, MRI);
-    if (Data2Areg >= 0 && Data2Areg != DataAreg)
-      return false;
-  }
-
-  auto FB = getFeatureBits();
-  if (FB[AMDGPU::FeatureGFX90AInsts]) {
-    if (DataAreg < 0 || DstAreg < 0)
-      return true;
-    return DstAreg == DataAreg;
-  }
-
-  return DstAreg < 1 && DataAreg < 1;
-}
-
-bool AMDGPUAsmParser::validateVGPRAlign(const MCInst &Inst) const {
-  auto FB = getFeatureBits();
-  if (!FB[AMDGPU::FeatureRequiresAlignedVGPRs])
-    return true;
-
-  unsigned Opc = Inst.getOpcode();
-  const MCRegisterInfo *MRI = getMRI();
-  // DS_READ_B96_TR_B6 is the only DS instruction in GFX950, that allows
-  // unaligned VGPR. All others only allow even aligned VGPRs.
-  if (FB[AMDGPU::FeatureGFX90AInsts] && Opc == AMDGPU::DS_READ_B96_TR_B6_vi)
-    return true;
-
-  if (FB[AMDGPU::FeatureGFX1250Insts]) {
-    switch (Opc) {
-    default:
-      break;
-    case AMDGPU::DS_LOAD_TR6_B96:
-    case AMDGPU::DS_LOAD_TR6_B96_gfx12:
-      // DS_LOAD_TR6_B96 is the only DS instruction in GFX1250, that
-      // allows unaligned VGPR. All others only allow even aligned VGPRs.
-      return true;
-    case AMDGPU::GLOBAL_LOAD_TR6_B96:
-    case AMDGPU::GLOBAL_LOAD_TR6_B96_gfx1250: {
-      // GLOBAL_LOAD_TR6_B96 is the only GLOBAL instruction in GFX1250, that
-      // allows unaligned VGPR for vdst, but other operands still only allow
-      // even aligned VGPRs.
-      int VAddrIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr);
-      if (VAddrIdx != -1) {
-        const MCOperand &Op = Inst.getOperand(VAddrIdx);
-        MCRegister Sub = MRI->getSubReg(Op.getReg(), AMDGPU::sub0);
-        if ((Sub - AMDGPU::VGPR0) & 1)
-          return false;
-      }
-      return true;
-    }
-    case AMDGPU::GLOBAL_LOAD_TR6_B96_SADDR:
-    case AMDGPU::GLOBAL_LOAD_TR6_B96_SADDR_gfx1250:
-      return true;
-    }
-  }
-
-  const MCRegisterClass &VGPR32 = MRI->getRegClass(AMDGPU::VGPR_32RegClassID);
-  const MCRegisterClass &AGPR32 = MRI->getRegClass(AMDGPU::AGPR_32RegClassID);
-  for (unsigned I = 0, E = Inst.getNumOperands(); I != E; ++I) {
-    const MCOperand &Op = Inst.getOperand(I);
-    if (!Op.isReg())
-      continue;
-
-    MCRegister Sub = MRI->getSubReg(Op.getReg(), AMDGPU::sub0);
-    if (!Sub)
-      continue;
-
-    if (VGPR32.contains(Sub) && ((Sub - AMDGPU::VGPR0) & 1))
-      return false;
-    if (AGPR32.contains(Sub) && ((Sub - AMDGPU::AGPR0) & 1))
-      return false;
-  }
-
-  return true;
-}
-
-SMLoc AMDGPUAsmParser::getBLGPLoc(const OperandVector &Operands) const {
-  for (unsigned i = 1, e = Operands.size(); i != e; ++i) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
-    if (Op.isBLGP())
-      return Op.getStartLoc();
-  }
-  return SMLoc();
-}
-
-bool AMDGPUAsmParser::validateBLGP(const MCInst &Inst,
-                                   const OperandVector &Operands) {
-  unsigned Opc = Inst.getOpcode();
-  int BlgpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::blgp);
-  if (BlgpIdx == -1)
-    return true;
-  SMLoc BLGPLoc = getBLGPLoc(Operands);
-  if (!BLGPLoc.isValid())
-    return true;
-  bool IsNeg = StringRef(BLGPLoc.getPointer()).starts_with("neg:");
-  auto FB = getFeatureBits();
-  bool UsesNeg = false;
-  if (FB[AMDGPU::FeatureGFX940Insts]) {
-    switch (Opc) {
-    case AMDGPU::V_MFMA_F64_16X16X4F64_gfx940_acd:
-    case AMDGPU::V_MFMA_F64_16X16X4F64_gfx940_vcd:
-    case AMDGPU::V_MFMA_F64_4X4X4F64_gfx940_acd:
-    case AMDGPU::V_MFMA_F64_4X4X4F64_gfx940_vcd:
-      UsesNeg = true;
-    }
-  }
-
-  if (IsNeg == UsesNeg)
-    return true;
-
-  Error(BLGPLoc,
-        UsesNeg ? "invalid modifier: blgp is not supported"
-                : "invalid modifier: neg is not supported");
-
-  return false;
-}
-
-bool AMDGPUAsmParser::validateWaitCnt(const MCInst &Inst,
-                                      const OperandVector &Operands) {
-  if (!isGFX11Plus())
-    return true;
-
-  unsigned Opc = Inst.getOpcode();
-  if (Opc != AMDGPU::S_WAITCNT_EXPCNT_gfx11 &&
-      Opc != AMDGPU::S_WAITCNT_LGKMCNT_gfx11 &&
-      Opc != AMDGPU::S_WAITCNT_VMCNT_gfx11 &&
-      Opc != AMDGPU::S_WAITCNT_VSCNT_gfx11)
-    return true;
-
-  int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::sdst);
-  assert(Src0Idx >= 0 && Inst.getOperand(Src0Idx).isReg());
-  auto Reg = mc2PseudoReg(Inst.getOperand(Src0Idx).getReg());
-  if (Reg == AMDGPU::SGPR_NULL)
-    return true;
-
-  Error(getOperandLoc(Operands, Src0Idx), "src0 must be null");
-  return false;
-}
-
-bool AMDGPUAsmParser::validateDS(const MCInst &Inst,
-                                 const OperandVector &Operands) {
-  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
-  if ((TSFlags & SIInstrFlags::DS) == 0)
-    return true;
-  if (TSFlags & SIInstrFlags::GWS)
-    return validateGWS(Inst, Operands);
-  // Only validate GDS for non-GWS instructions.
-  if (hasGDS())
-    return true;
-  int GDSIdx =
-      AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::gds);
-  if (GDSIdx < 0)
-    return true;
-  unsigned GDS = Inst.getOperand(GDSIdx).getImm();
-  if (GDS) {
-    SMLoc S = getImmLoc(AMDGPUOperand::ImmTyGDS, Operands);
-    Error(S, "gds modifier is not supported on this GPU");
-    return false;
-  }
-  return true;
-}
-
-// gfx90a has an undocumented limitation:
-// DS_GWS opcodes must use even aligned registers.
-bool AMDGPUAsmParser::validateGWS(const MCInst &Inst,
-                                  const OperandVector &Operands) {
-  if (!getFeatureBits()[AMDGPU::FeatureGFX90AInsts])
-    return true;
-
-  int Opc = Inst.getOpcode();
-  if (Opc != AMDGPU::DS_GWS_INIT_vi && Opc != AMDGPU::DS_GWS_BARRIER_vi &&
-      Opc != AMDGPU::DS_GWS_SEMA_BR_vi)
-    return true;
-
-  const MCRegisterInfo *MRI = getMRI();
-  const MCRegisterClass &VGPR32 = MRI->getRegClass(AMDGPU::VGPR_32RegClassID);
-  int Data0Pos =
-      AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::data0);
-  assert(Data0Pos != -1);
-  auto Reg = Inst.getOperand(Data0Pos).getReg();
-  auto RegIdx = Reg - (VGPR32.contains(Reg) ? AMDGPU::VGPR0 : AMDGPU::AGPR0);
-  if (RegIdx & 1) {
-    Error(getOperandLoc(Operands, Data0Pos), "vgpr must be even aligned");
-    return false;
-  }
-
-  return true;
-}
-
-bool AMDGPUAsmParser::validateCoherencyBits(const MCInst &Inst,
-                                            const OperandVector &Operands,
-                                            SMLoc IDLoc) {
-  int CPolPos = AMDGPU::getNamedOperandIdx(Inst.getOpcode(),
-                                           AMDGPU::OpName::cpol);
-  if (CPolPos == -1)
-    return true;
-
-  unsigned CPol = Inst.getOperand(CPolPos).getImm();
-
-  if (!isGFX1250Plus()) {
-    if (CPol & CPol::SCAL) {
-      SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
-      StringRef CStr(S.getPointer());
-      S = SMLoc::getFromPointer(&CStr.data()[CStr.find("scale_offset")]);
-      Error(S, "scale_offset is not supported on this GPU");
-    }
-    if (CPol & CPol::NV) {
-      SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
-      StringRef CStr(S.getPointer());
-      S = SMLoc::getFromPointer(&CStr.data()[CStr.find("nv")]);
-      Error(S, "nv is not supported on this GPU");
-    }
-  }
-
-  if ((CPol & CPol::SCAL) && !supportsScaleOffset(MII, Inst.getOpcode())) {
-    SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
-    StringRef CStr(S.getPointer());
-    S = SMLoc::getFromPointer(&CStr.data()[CStr.find("scale_offset")]);
-    Error(S, "scale_offset is not supported for this instruction");
-  }
-
-  if (isGFX12Plus())
-    return validateTHAndScopeBits(Inst, Operands, CPol);
-
-  uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
-  if (TSFlags & SIInstrFlags::SMRD) {
-    if (CPol && (isSI() || isCI())) {
-      SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
-      Error(S, "cache policy is not supported for SMRD instructions");
-      return false;
-    }
-    if (CPol & ~(AMDGPU::CPol::GLC | AMDGPU::CPol::DLC)) {
-      Error(IDLoc, "invalid cache policy for SMEM instruction");
-      return false;
-    }
-  }
-
-  if (isGFX90A() && !isGFX940() && (CPol & CPol::SCC)) {
-    const uint64_t AllowSCCModifier = SIInstrFlags::MUBUF |
-                                      SIInstrFlags::MTBUF | SIInstrFlags::MIMG |
-                                      SIInstrFlags::FLAT;
-    if (!(TSFlags & AllowSCCModifier)) {
-      SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
-      StringRef CStr(S.getPointer());
-      S = SMLoc::getFromPointer(&CStr.data()[CStr.find("scc")]);
-      Error(S,
-            "scc modifier is not supported for this instruction on this GPU");
-      return false;
-    }
-  }
-
-  if (!(TSFlags & (SIInstrFlags::IsAtomicNoRet | SIInstrFlags::IsAtomicRet)))
-    return true;
-
-  if (TSFlags & SIInstrFlags::IsAtomicRet) {
-    if (!(TSFlags & SIInstrFlags::MIMG) && !(CPol & CPol::GLC)) {
-      Error(IDLoc, isGFX940() ? "instruction must use sc0"
-                              : "instruction must use glc");
-      return false;
-    }
-  } else {
-    if (CPol & CPol::GLC) {
-      SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
-      StringRef CStr(S.getPointer());
-      S = SMLoc::getFromPointer(
-          &CStr.data()[CStr.find(isGFX940() ? "sc0" : "glc")]);
-      Error(S, isGFX940() ? "instruction must not use sc0"
-                          : "instruction must not use glc");
-      return false;
-    }
-  }
-
-  return true;
-}
-
-bool AMDGPUAsmParser::validateTHAndScopeBits(const MCInst &Inst,
-                                             const OperandVector &Operands,
-                                             const unsigned CPol) {
-  const unsigned TH = CPol & AMDGPU::CPol::TH;
-  const unsigned Scope = CPol & AMDGPU::CPol::SCOPE;
-
-  const unsigned Opcode = Inst.getOpcode();
-  const MCInstrDesc &TID = MII.get(Opcode);
-
-  auto PrintError = [&](StringRef Msg) {
-    SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
-    Error(S, Msg);
-    return false;
-  };
-
-  if ((TH & AMDGPU::CPol::TH_ATOMIC_RETURN) &&
-      (TID.TSFlags & SIInstrFlags::IsAtomicNoRet))
-    return PrintError("th:TH_ATOMIC_RETURN requires a destination operand");
-
-  if ((TID.TSFlags & SIInstrFlags::IsAtomicRet) &&
-      (TID.TSFlags & (SIInstrFlags::FLAT | SIInstrFlags::MUBUF)) &&
-      (!(TH & AMDGPU::CPol::TH_ATOMIC_RETURN)))
-    return PrintError("instruction must use th:TH_ATOMIC_RETURN");
-
-  if (TH == 0)
-    return true;
-
-  if ((TID.TSFlags & SIInstrFlags::SMRD) &&
-      ((TH == AMDGPU::CPol::TH_NT_RT) || (TH == AMDGPU::CPol::TH_RT_NT) ||
-       (TH == AMDGPU::CPol::TH_NT_HT)))
-    return PrintError("invalid th value for SMEM instruction");
-
-  if (TH == AMDGPU::CPol::TH_BYPASS) {
-    if ((Scope != AMDGPU::CPol::SCOPE_SYS &&
-         CPol & AMDGPU::CPol::TH_REAL_BYPASS) ||
-        (Scope == AMDGPU::CPol::SCOPE_SYS &&
-         !(CPol & AMDGPU::CPol::TH_REAL_BYPASS)))
-      return PrintError("scope and th combination is not valid");
-  }
-
-  unsigned THType = AMDGPU::getTemporalHintType(TID);
-  if (THType == AMDGPU::CPol::TH_TYPE_ATOMIC) {
-    if (!(CPol & AMDGPU::CPol::TH_TYPE_ATOMIC))
-      return PrintError("invalid th value for atomic instructions");
-  } else if (THType == AMDGPU::CPol::TH_TYPE_STORE) {
-    if (!(CPol & AMDGPU::CPol::TH_TYPE_STORE))
-      return PrintError("invalid th value for store instructions");
-  } else {
-    if (!(CPol & AMDGPU::CPol::TH_TYPE_LOAD))
-      return PrintError("invalid th value for load instructions");
-  }
-
-  return true;
-}
-
-bool AMDGPUAsmParser::validateTFE(const MCInst &Inst,
-                                  const OperandVector &Operands) {
-  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
-  if (Desc.mayStore() &&
-      (Desc.TSFlags & (SIInstrFlags::MUBUF | SIInstrFlags::MTBUF))) {
-    SMLoc Loc = getImmLoc(AMDGPUOperand::ImmTyTFE, Operands);
-    if (Loc != getInstLoc(Operands)) {
-      Error(Loc, "TFE modifier has no meaning for store instructions");
-      return false;
-    }
-  }
-
-  return true;
-}
-
-bool AMDGPUAsmParser::validateWMMA(const MCInst &Inst,
-                                   const OperandVector &Operands) {
-  unsigned Opc = Inst.getOpcode();
-  const MCRegisterInfo *TRI = getContext().getRegisterInfo();
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  auto validateFmt = [&](AMDGPU::OpName FmtOp, AMDGPU::OpName SrcOp) -> bool {
-    int FmtIdx = AMDGPU::getNamedOperandIdx(Opc, FmtOp);
-    if (FmtIdx == -1)
-      return true;
-    unsigned Fmt = Inst.getOperand(FmtIdx).getImm();
-    int SrcIdx = AMDGPU::getNamedOperandIdx(Opc, SrcOp);
-    unsigned RegSize =
-        TRI->getRegClass(MII.getOpRegClassID(Desc.operands()[SrcIdx], HwMode))
-            .getSizeInBits();
-
-    if (RegSize == AMDGPU::wmmaScaleF8F6F4FormatToNumRegs(Fmt) * 32)
-      return true;
-
-    Error(getOperandLoc(Operands, SrcIdx),
-          "wrong register tuple size for " +
-              Twine(WMMAMods::ModMatrixFmt[Fmt]));
-    return false;
-  };
-
-  return validateFmt(AMDGPU::OpName::matrix_a_fmt, AMDGPU::OpName::src0) &&
-         validateFmt(AMDGPU::OpName::matrix_b_fmt, AMDGPU::OpName::src1);
-}
-
-bool AMDGPUAsmParser::validateInstruction(const MCInst &Inst, SMLoc IDLoc,
-                                          const OperandVector &Operands) {
-  if (!validateLdsDirect(Inst, Operands))
-    return false;
-  if (!validateTrue16OpSel(Inst)) {
-    Error(getImmLoc(AMDGPUOperand::ImmTyOpSel, Operands),
-          "op_sel operand conflicts with 16-bit operand suffix");
-    return false;
-  }
-  if (!validateSOPLiteral(Inst, Operands))
-    return false;
-  if (!validateVOPLiteral(Inst, Operands)) {
-    return false;
-  }
-  if (!validateConstantBusLimitations(Inst, Operands)) {
-    return false;
-  }
-  if (!validateVOPD(Inst, Operands)) {
-    return false;
-  }
-  if (!validateIntClampSupported(Inst)) {
-    Error(getImmLoc(AMDGPUOperand::ImmTyClamp, Operands),
-          "integer clamping is not supported on this GPU");
-    return false;
-  }
-  if (!validateOpSel(Inst)) {
-    Error(getImmLoc(AMDGPUOperand::ImmTyOpSel, Operands),
-      "invalid op_sel operand");
-    return false;
-  }
-  if (!validateNeg(Inst, AMDGPU::OpName::neg_lo)) {
-    Error(getImmLoc(AMDGPUOperand::ImmTyNegLo, Operands),
-          "invalid neg_lo operand");
-    return false;
-  }
-  if (!validateNeg(Inst, AMDGPU::OpName::neg_hi)) {
-    Error(getImmLoc(AMDGPUOperand::ImmTyNegHi, Operands),
-          "invalid neg_hi operand");
-    return false;
-  }
-  if (!validateDPP(Inst, Operands)) {
-    return false;
-  }
-  // For MUBUF/MTBUF d16 is a part of opcode, so there is nothing to validate.
-  if (!validateMIMGD16(Inst)) {
-    Error(getImmLoc(AMDGPUOperand::ImmTyD16, Operands),
-      "d16 modifier is not supported on this GPU");
-    return false;
-  }
-  if (!validateMIMGDim(Inst, Operands)) {
-    Error(IDLoc, "missing dim operand");
-    return false;
-  }
-  if (!validateTensorR128(Inst)) {
-    Error(getImmLoc(AMDGPUOperand::ImmTyD16, Operands),
-          "instruction must set modifier r128=0");
-    return false;
-  }
-  if (!validateMIMGMSAA(Inst)) {
-    Error(getImmLoc(AMDGPUOperand::ImmTyDim, Operands),
-          "invalid dim; must be MSAA type");
-    return false;
-  }
-  if (!validateMIMGDataSize(Inst, IDLoc)) {
-    return false;
-  }
-  if (!validateMIMGAddrSize(Inst, IDLoc))
-    return false;
-  if (!validateMIMGAtomicDMask(Inst)) {
-    Error(getImmLoc(AMDGPUOperand::ImmTyDMask, Operands),
-      "invalid atomic image dmask");
-    return false;
-  }
-  if (!validateMIMGGatherDMask(Inst)) {
-    Error(getImmLoc(AMDGPUOperand::ImmTyDMask, Operands),
-      "invalid image_gather dmask: only one bit must be set");
-    return false;
-  }
-  if (!validateMovrels(Inst, Operands)) {
-    return false;
-  }
-  if (!validateOffset(Inst, Operands)) {
-    return false;
-  }
-  if (!validateMAIAccWrite(Inst, Operands)) {
-    return false;
-  }
-  if (!validateMAISrc2(Inst, Operands)) {
-    return false;
-  }
-  if (!validateMFMA(Inst, Operands)) {
-    return false;
-  }
-  if (!validateCoherencyBits(Inst, Operands, IDLoc)) {
-    return false;
-  }
-
-  if (!validateAGPRLdSt(Inst)) {
-    Error(IDLoc, getFeatureBits()[AMDGPU::FeatureGFX90AInsts]
-    ? "invalid register class: data and dst should be all VGPR or AGPR"
-    : "invalid register class: agpr loads and stores not supported on this GPU"
-    );
-    return false;
-  }
-  if (!validateVGPRAlign(Inst)) {
-    Error(IDLoc,
-      "invalid register class: vgpr tuples must be 64 bit aligned");
-    return false;
-  }
-  if (!validateDS(Inst, Operands)) {
-    return false;
-  }
-
-  if (!validateBLGP(Inst, Operands)) {
-    return false;
-  }
-
-  if (!validateDivScale(Inst)) {
-    Error(IDLoc, "ABS not allowed in VOP3B instructions");
-    return false;
-  }
-  if (!validateWaitCnt(Inst, Operands)) {
-    return false;
-  }
-  if (!validateTFE(Inst, Operands)) {
-    return false;
-  }
-  if (!validateWMMA(Inst, Operands)) {
-    return false;
-  }
-
-  return true;
-}
-
-static std::string AMDGPUMnemonicSpellCheck(StringRef S,
-                                            const FeatureBitset &FBS,
-                                            unsigned VariantID = 0);
-
-static bool AMDGPUCheckMnemonic(StringRef Mnemonic,
-                                const FeatureBitset &AvailableFeatures,
-                                unsigned VariantID);
-
-bool AMDGPUAsmParser::isSupportedMnemo(StringRef Mnemo,
-                                       const FeatureBitset &FBS) {
-  return isSupportedMnemo(Mnemo, FBS, getAllVariants());
-}
-
-bool AMDGPUAsmParser::isSupportedMnemo(StringRef Mnemo,
-                                       const FeatureBitset &FBS,
-                                       ArrayRef<unsigned> Variants) {
-  for (auto Variant : Variants) {
-    if (AMDGPUCheckMnemonic(Mnemo, FBS, Variant))
-      return true;
-  }
-
-  return false;
-}
-
-bool AMDGPUAsmParser::checkUnsupportedInstruction(StringRef Mnemo,
-                                                  SMLoc IDLoc) {
-  FeatureBitset FBS = ComputeAvailableFeatures(getFeatureBits());
-
-  // Check if requested instruction variant is supported.
-  if (isSupportedMnemo(Mnemo, FBS, getMatchedVariants()))
-    return false;
-
-  // This instruction is not supported.
-  // Clear any other pending errors because they are no longer relevant.
-  getParser().clearPendingErrors();
-
-  // Requested instruction variant is not supported.
-  // Check if any other variants are supported.
-  StringRef VariantName = getMatchedVariantName();
-  if (!VariantName.empty() && isSupportedMnemo(Mnemo, FBS)) {
-    return Error(IDLoc,
-                 Twine(VariantName,
-                       " variant of this instruction is not supported"));
-  }
-
-  // Check if this instruction may be used with a different wavesize.
-  if (isGFX10Plus() && getFeatureBits()[AMDGPU::FeatureWavefrontSize64] &&
-      !getFeatureBits()[AMDGPU::FeatureWavefrontSize32]) {
-    // FIXME: Use getAvailableFeatures, and do not manually recompute
-    FeatureBitset FeaturesWS32 = getFeatureBits();
-    FeaturesWS32.flip(AMDGPU::FeatureWavefrontSize64)
-        .flip(AMDGPU::FeatureWavefrontSize32);
-    FeatureBitset AvailableFeaturesWS32 =
-        ComputeAvailableFeatures(FeaturesWS32);
-
-    if (isSupportedMnemo(Mnemo, AvailableFeaturesWS32, getMatchedVariants()))
-      return Error(IDLoc, "instruction requires wavesize=32");
-  }
-
-  // Finally check if this instruction is supported on any other GPU.
-  if (isSupportedMnemo(Mnemo, FeatureBitset().set())) {
-    return Error(IDLoc, "instruction not supported on this GPU");
-  }
-
-  // Instruction not supported on any GPU. Probably a typo.
-  std::string Suggestion = AMDGPUMnemonicSpellCheck(Mnemo, FBS);
-  return Error(IDLoc, "invalid instruction" + Suggestion);
-}
-
-static bool isInvalidVOPDY(const OperandVector &Operands,
-                           uint64_t InvalidOprIdx) {
-  assert(InvalidOprIdx < Operands.size());
-  const auto &Op = ((AMDGPUOperand &)*Operands[InvalidOprIdx]);
-  if (Op.isToken() && InvalidOprIdx > 1) {
-    const auto &PrevOp = ((AMDGPUOperand &)*Operands[InvalidOprIdx - 1]);
-    return PrevOp.isToken() && PrevOp.getToken() == "::";
-  }
-  return false;
-}
-
-bool AMDGPUAsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
-                                              OperandVector &Operands,
-                                              MCStreamer &Out,
-                                              uint64_t &ErrorInfo,
-                                              bool MatchingInlineAsm) {
-  MCInst Inst;
-  Inst.setLoc(IDLoc);
-  unsigned Result = Match_Success;
-  for (auto Variant : getMatchedVariants()) {
-    uint64_t EI;
-    auto R = MatchInstructionImpl(Operands, Inst, EI, MatchingInlineAsm,
-                                  Variant);
-    // We order match statuses from least to most specific. We use most specific
-    // status as resulting
-    // Match_MnemonicFail < Match_InvalidOperand < Match_MissingFeature
-    if (R == Match_Success || R == Match_MissingFeature ||
-        (R == Match_InvalidOperand && Result != Match_MissingFeature) ||
-        (R == Match_MnemonicFail && Result != Match_InvalidOperand &&
-         Result != Match_MissingFeature)) {
-      Result = R;
-      ErrorInfo = EI;
-    }
-    if (R == Match_Success)
-      break;
-  }
-
-  if (Result == Match_Success) {
-    if (!validateInstruction(Inst, IDLoc, Operands)) {
-      return true;
-    }
-    Out.emitInstruction(Inst, getSTI());
-    return false;
-  }
-
-  StringRef Mnemo = ((AMDGPUOperand &)*Operands[0]).getToken();
-  if (checkUnsupportedInstruction(Mnemo, IDLoc)) {
-    return true;
-  }
-
-  switch (Result) {
-  default: break;
-  case Match_MissingFeature:
-    // It has been verified that the specified instruction
-    // mnemonic is valid. A match was found but it requires
-    // features which are not supported on this GPU.
-    return Error(IDLoc, "operands are not valid for this GPU or mode");
-
-  case Match_InvalidOperand: {
-    SMLoc ErrorLoc = IDLoc;
-    if (ErrorInfo != ~0ULL) {
-      if (ErrorInfo >= Operands.size()) {
-        return Error(IDLoc, "too few operands for instruction");
-      }
-      ErrorLoc = ((AMDGPUOperand &)*Operands[ErrorInfo]).getStartLoc();
-      if (ErrorLoc == SMLoc())
-        ErrorLoc = IDLoc;
-
-      if (isInvalidVOPDY(Operands, ErrorInfo))
-        return Error(ErrorLoc, "invalid VOPDY instruction");
-    }
-    return Error(ErrorLoc, "invalid operand for instruction");
-  }
-
-  case Match_MnemonicFail:
-    llvm_unreachable("Invalid instructions should have been handled already");
-  }
-  llvm_unreachable("Implement any new match types added!");
-}
-
-bool AMDGPUAsmParser::ParseAsAbsoluteExpression(uint32_t &Ret) {
-  int64_t Tmp = -1;
-  if (!isToken(AsmToken::Integer) && !isToken(AsmToken::Identifier)) {
-    return true;
-  }
-  if (getParser().parseAbsoluteExpression(Tmp)) {
-    return true;
-  }
-  Ret = static_cast<uint32_t>(Tmp);
-  return false;
-}
-
-bool AMDGPUAsmParser::ParseDirectiveAMDGCNTarget() {
-  if (!getSTI().getTargetTriple().isAMDGCN())
-    return TokError("directive only supported for amdgcn architecture");
-
-  std::string TargetIDDirective;
-  SMLoc TargetStart = getTok().getLoc();
-  if (getParser().parseEscapedString(TargetIDDirective))
-    return true;
-
-  SMRange TargetRange = SMRange(TargetStart, getTok().getLoc());
-  if (getTargetStreamer().getTargetID()->toString() != TargetIDDirective)
-    return getParser().Error(TargetRange.Start,
-        (Twine(".amdgcn_target directive's target id ") +
-         Twine(TargetIDDirective) +
-         Twine(" does not match the specified target id ") +
-         Twine(getTargetStreamer().getTargetID()->toString())).str());
-
-  return false;
-}
-
-bool AMDGPUAsmParser::OutOfRangeError(SMRange Range) {
-  return Error(Range.Start, "value out of range", Range);
-}
-
-bool AMDGPUAsmParser::calculateGPRBlocks(
-    const FeatureBitset &Features, const MCExpr *VCCUsed,
-    const MCExpr *FlatScrUsed, bool XNACKUsed,
-    std::optional<bool> EnableWavefrontSize32, const MCExpr *NextFreeVGPR,
-    SMRange VGPRRange, const MCExpr *NextFreeSGPR, SMRange SGPRRange,
-    const MCExpr *&VGPRBlocks, const MCExpr *&SGPRBlocks) {
-  // TODO(scott.linder): These calculations are duplicated from
-  // AMDGPUAsmPrinter::getSIProgramInfo and could be unified.
-  IsaVersion Version = getIsaVersion(getSTI().getCPU());
-  MCContext &Ctx = getContext();
-
-  const MCExpr *NumSGPRs = NextFreeSGPR;
-  int64_t EvaluatedSGPRs;
-
-  if (Version.Major >= 10)
-    NumSGPRs = MCConstantExpr::create(0, Ctx);
-  else {
-    unsigned MaxAddressableNumSGPRs =
-        IsaInfo::getAddressableNumSGPRs(&getSTI());
-
-    if (NumSGPRs->evaluateAsAbsolute(EvaluatedSGPRs) && Version.Major >= 8 &&
-        !Features.test(FeatureSGPRInitBug) &&
-        static_cast<uint64_t>(EvaluatedSGPRs) > MaxAddressableNumSGPRs)
-      return OutOfRangeError(SGPRRange);
-
-    const MCExpr *ExtraSGPRs =
-        AMDGPUMCExpr::createExtraSGPRs(VCCUsed, FlatScrUsed, XNACKUsed, Ctx);
-    NumSGPRs = MCBinaryExpr::createAdd(NumSGPRs, ExtraSGPRs, Ctx);
-
-    if (NumSGPRs->evaluateAsAbsolute(EvaluatedSGPRs) &&
-        (Version.Major <= 7 || Features.test(FeatureSGPRInitBug)) &&
-        static_cast<uint64_t>(EvaluatedSGPRs) > MaxAddressableNumSGPRs)
-      return OutOfRangeError(SGPRRange);
-
-    if (Features.test(FeatureSGPRInitBug))
-      NumSGPRs =
-          MCConstantExpr::create(IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG, Ctx);
-  }
-
-  // The MCExpr equivalent of getNumSGPRBlocks/getNumVGPRBlocks:
-  // (alignTo(max(1u, NumGPR), GPREncodingGranule) / GPREncodingGranule) - 1
-  auto GetNumGPRBlocks = [&Ctx](const MCExpr *NumGPR,
-                                unsigned Granule) -> const MCExpr * {
-    const MCExpr *OneConst = MCConstantExpr::create(1ul, Ctx);
-    const MCExpr *GranuleConst = MCConstantExpr::create(Granule, Ctx);
-    const MCExpr *MaxNumGPR = AMDGPUMCExpr::createMax({NumGPR, OneConst}, Ctx);
-    const MCExpr *AlignToGPR =
-        AMDGPUMCExpr::createAlignTo(MaxNumGPR, GranuleConst, Ctx);
-    const MCExpr *DivGPR =
-        MCBinaryExpr::createDiv(AlignToGPR, GranuleConst, Ctx);
-    const MCExpr *SubGPR = MCBinaryExpr::createSub(DivGPR, OneConst, Ctx);
-    return SubGPR;
-  };
-
-  VGPRBlocks = GetNumGPRBlocks(
-      NextFreeVGPR,
-      IsaInfo::getVGPREncodingGranule(&getSTI(), EnableWavefrontSize32));
-  SGPRBlocks =
-      GetNumGPRBlocks(NumSGPRs, IsaInfo::getSGPREncodingGranule(&getSTI()));
-
-  return false;
-}
-
-bool AMDGPUAsmParser::ParseDirectiveAMDHSAKernel() {
-  if (!getSTI().getTargetTriple().isAMDGCN())
-    return TokError("directive only supported for amdgcn architecture");
-
-  if (!isHsaAbi(getSTI()))
-    return TokError("directive only supported for amdhsa OS");
-
-  StringRef KernelName;
-  if (getParser().parseIdentifier(KernelName))
-    return true;
-
-  AMDGPU::MCKernelDescriptor KD =
-      AMDGPU::MCKernelDescriptor::getDefaultAmdhsaKernelDescriptor(
-          &getSTI(), getContext());
-
-  StringSet<> Seen;
-
-  IsaVersion IVersion = getIsaVersion(getSTI().getCPU());
-
-  const MCExpr *ZeroExpr = MCConstantExpr::create(0, getContext());
-  const MCExpr *OneExpr = MCConstantExpr::create(1, getContext());
-
-  SMRange VGPRRange;
-  const MCExpr *NextFreeVGPR = ZeroExpr;
-  const MCExpr *AccumOffset = MCConstantExpr::create(0, getContext());
-  const MCExpr *NamedBarCnt = ZeroExpr;
-  uint64_t SharedVGPRCount = 0;
-  uint64_t PreloadLength = 0;
-  uint64_t PreloadOffset = 0;
-  SMRange SGPRRange;
-  const MCExpr *NextFreeSGPR = ZeroExpr;
-
-  // Count the number of user SGPRs implied from the enabled feature bits.
-  unsigned ImpliedUserSGPRCount = 0;
-
-  // Track if the asm explicitly contains the directive for the user SGPR
-  // count.
-  std::optional<unsigned> ExplicitUserSGPRCount;
-  const MCExpr *ReserveVCC = OneExpr;
-  const MCExpr *ReserveFlatScr = OneExpr;
-  std::optional<bool> EnableWavefrontSize32;
-
-  while (true) {
-    while (trySkipToken(AsmToken::EndOfStatement));
-
-    StringRef ID;
-    SMRange IDRange = getTok().getLocRange();
-    if (!parseId(ID, "expected .amdhsa_ directive or .end_amdhsa_kernel"))
-      return true;
-
-    if (ID == ".end_amdhsa_kernel")
-      break;
-
-    if (!Seen.insert(ID).second)
-      return TokError(".amdhsa_ directives cannot be repeated");
-
-    SMLoc ValStart = getLoc();
-    const MCExpr *ExprVal;
-    if (getParser().parseExpression(ExprVal))
-      return true;
-    SMLoc ValEnd = getLoc();
-    SMRange ValRange = SMRange(ValStart, ValEnd);
-
-    int64_t IVal = 0;
-    uint64_t Val = IVal;
-    bool EvaluatableExpr;
-    if ((EvaluatableExpr = ExprVal->evaluateAsAbsolute(IVal))) {
-      if (IVal < 0)
-        return OutOfRangeError(ValRange);
-      Val = IVal;
-    }
-
-#define PARSE_BITS_ENTRY(FIELD, ENTRY, VALUE, RANGE)                           \
-  if (!isUInt<ENTRY##_WIDTH>(Val))                                             \
-    return OutOfRangeError(RANGE);                                             \
-  AMDGPU::MCKernelDescriptor::bits_set(FIELD, VALUE, ENTRY##_SHIFT, ENTRY,     \
-                                       getContext());
-
-// Some fields use the parsed value immediately which requires the expression to
-// be solvable.
-#define EXPR_RESOLVE_OR_ERROR(RESOLVED)                                        \
-  if (!(RESOLVED))                                                             \
-    return Error(IDRange.Start, "directive should have resolvable expression", \
-                 IDRange);
-
-    if (ID == ".amdhsa_group_segment_fixed_size") {
-      if (!isUInt<sizeof(kernel_descriptor_t::group_segment_fixed_size) *
-                  CHAR_BIT>(Val))
-        return OutOfRangeError(ValRange);
-      KD.group_segment_fixed_size = ExprVal;
-    } else if (ID == ".amdhsa_private_segment_fixed_size") {
-      if (!isUInt<sizeof(kernel_descriptor_t::private_segment_fixed_size) *
-                  CHAR_BIT>(Val))
-        return OutOfRangeError(ValRange);
-      KD.private_segment_fixed_size = ExprVal;
-    } else if (ID == ".amdhsa_kernarg_size") {
-      if (!isUInt<sizeof(kernel_descriptor_t::kernarg_size) * CHAR_BIT>(Val))
-        return OutOfRangeError(ValRange);
-      KD.kernarg_size = ExprVal;
-    } else if (ID == ".amdhsa_user_sgpr_count") {
-      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
-      ExplicitUserSGPRCount = Val;
-    } else if (ID == ".amdhsa_user_sgpr_private_segment_buffer") {
-      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
-      if (hasArchitectedFlatScratch())
-        return Error(IDRange.Start,
-                     "directive is not supported with architected flat scratch",
-                     IDRange);
-      PARSE_BITS_ENTRY(KD.kernel_code_properties,
-                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER,
-                       ExprVal, ValRange);
-      if (Val)
-        ImpliedUserSGPRCount += 4;
-    } else if (ID == ".amdhsa_user_sgpr_kernarg_preload_length") {
-      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
-      if (!hasKernargPreload())
-        return Error(IDRange.Start, "directive requires gfx90a+", IDRange);
-
-      if (Val > getMaxNumUserSGPRs())
-        return OutOfRangeError(ValRange);
-      PARSE_BITS_ENTRY(KD.kernarg_preload, KERNARG_PRELOAD_SPEC_LENGTH, ExprVal,
-                       ValRange);
-      if (Val) {
-        ImpliedUserSGPRCount += Val;
-        PreloadLength = Val;
-      }
-    } else if (ID == ".amdhsa_user_sgpr_kernarg_preload_offset") {
-      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
-      if (!hasKernargPreload())
-        return Error(IDRange.Start, "directive requires gfx90a+", IDRange);
-
-      if (Val >= 1024)
-        return OutOfRangeError(ValRange);
-      PARSE_BITS_ENTRY(KD.kernarg_preload, KERNARG_PRELOAD_SPEC_OFFSET, ExprVal,
-                       ValRange);
-      if (Val)
-        PreloadOffset = Val;
-    } else if (ID == ".amdhsa_user_sgpr_dispatch_ptr") {
-      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
-      PARSE_BITS_ENTRY(KD.kernel_code_properties,
-                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR, ExprVal,
-                       ValRange);
-      if (Val)
-        ImpliedUserSGPRCount += 2;
-    } else if (ID == ".amdhsa_user_sgpr_queue_ptr") {
-      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
-      PARSE_BITS_ENTRY(KD.kernel_code_properties,
-                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR, ExprVal,
-                       ValRange);
-      if (Val)
-        ImpliedUserSGPRCount += 2;
-    } else if (ID == ".amdhsa_user_sgpr_kernarg_segment_ptr") {
-      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
-      PARSE_BITS_ENTRY(KD.kernel_code_properties,
-                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR,
-                       ExprVal, ValRange);
-      if (Val)
-        ImpliedUserSGPRCount += 2;
-    } else if (ID == ".amdhsa_user_sgpr_dispatch_id") {
-      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
-      PARSE_BITS_ENTRY(KD.kernel_code_properties,
-                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID, ExprVal,
-                       ValRange);
-      if (Val)
-        ImpliedUserSGPRCount += 2;
-    } else if (ID == ".amdhsa_user_sgpr_flat_scratch_init") {
-      if (hasArchitectedFlatScratch())
-        return Error(IDRange.Start,
-                     "directive is not supported with architected flat scratch",
-                     IDRange);
-      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
-      PARSE_BITS_ENTRY(KD.kernel_code_properties,
-                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT,
-                       ExprVal, ValRange);
-      if (Val)
-        ImpliedUserSGPRCount += 2;
-    } else if (ID == ".amdhsa_user_sgpr_private_segment_size") {
-      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
-      PARSE_BITS_ENTRY(KD.kernel_code_properties,
-                       KERNEL_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE,
-                       ExprVal, ValRange);
-      if (Val)
-        ImpliedUserSGPRCount += 1;
-    } else if (ID == ".amdhsa_wavefront_size32") {
-      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
-      if (IVersion.Major < 10)
-        return Error(IDRange.Start, "directive requires gfx10+", IDRange);
-      EnableWavefrontSize32 = Val;
-      PARSE_BITS_ENTRY(KD.kernel_code_properties,
-                       KERNEL_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_uses_dynamic_stack") {
-      PARSE_BITS_ENTRY(KD.kernel_code_properties,
-                       KERNEL_CODE_PROPERTY_USES_DYNAMIC_STACK, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_system_sgpr_private_segment_wavefront_offset") {
-      if (hasArchitectedFlatScratch())
-        return Error(IDRange.Start,
-                     "directive is not supported with architected flat scratch",
-                     IDRange);
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
-                       COMPUTE_PGM_RSRC2_ENABLE_PRIVATE_SEGMENT, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_enable_private_segment") {
-      if (!hasArchitectedFlatScratch())
-        return Error(
-            IDRange.Start,
-            "directive is not supported without architected flat scratch",
-            IDRange);
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
-                       COMPUTE_PGM_RSRC2_ENABLE_PRIVATE_SEGMENT, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_system_sgpr_workgroup_id_x") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
-                       COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_X, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_system_sgpr_workgroup_id_y") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
-                       COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_Y, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_system_sgpr_workgroup_id_z") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
-                       COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_Z, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_system_sgpr_workgroup_info") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
-                       COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_INFO, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_system_vgpr_workitem_id") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
-                       COMPUTE_PGM_RSRC2_ENABLE_VGPR_WORKITEM_ID, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_next_free_vgpr") {
-      VGPRRange = ValRange;
-      NextFreeVGPR = ExprVal;
-    } else if (ID == ".amdhsa_next_free_sgpr") {
-      SGPRRange = ValRange;
-      NextFreeSGPR = ExprVal;
-    } else if (ID == ".amdhsa_accum_offset") {
-      if (!isGFX90A())
-        return Error(IDRange.Start, "directive requires gfx90a+", IDRange);
-      AccumOffset = ExprVal;
-    } else if (ID == ".amdhsa_named_barrier_count") {
-      if (!isGFX1250Plus())
-        return Error(IDRange.Start, "directive requires gfx1250+", IDRange);
-      NamedBarCnt = ExprVal;
-    } else if (ID == ".amdhsa_reserve_vcc") {
-      if (EvaluatableExpr && !isUInt<1>(Val))
-        return OutOfRangeError(ValRange);
-      ReserveVCC = ExprVal;
-    } else if (ID == ".amdhsa_reserve_flat_scratch") {
-      if (IVersion.Major < 7)
-        return Error(IDRange.Start, "directive requires gfx7+", IDRange);
-      if (hasArchitectedFlatScratch())
-        return Error(IDRange.Start,
-                     "directive is not supported with architected flat scratch",
-                     IDRange);
-      if (EvaluatableExpr && !isUInt<1>(Val))
-        return OutOfRangeError(ValRange);
-      ReserveFlatScr = ExprVal;
-    } else if (ID == ".amdhsa_reserve_xnack_mask") {
-      if (IVersion.Major < 8)
-        return Error(IDRange.Start, "directive requires gfx8+", IDRange);
-      if (!isUInt<1>(Val))
-        return OutOfRangeError(ValRange);
-      if (Val != getTargetStreamer().getTargetID()->isXnackOnOrAny())
-        return getParser().Error(IDRange.Start, ".amdhsa_reserve_xnack_mask does not match target id",
-                                 IDRange);
-    } else if (ID == ".amdhsa_float_round_mode_32") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
-                       COMPUTE_PGM_RSRC1_FLOAT_ROUND_MODE_32, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_float_round_mode_16_64") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
-                       COMPUTE_PGM_RSRC1_FLOAT_ROUND_MODE_16_64, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_float_denorm_mode_32") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
-                       COMPUTE_PGM_RSRC1_FLOAT_DENORM_MODE_32, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_float_denorm_mode_16_64") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
-                       COMPUTE_PGM_RSRC1_FLOAT_DENORM_MODE_16_64, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_dx10_clamp") {
-      if (!getSTI().hasFeature(AMDGPU::FeatureDX10ClampAndIEEEMode))
-        return Error(IDRange.Start, "directive unsupported on gfx1170+",
-                     IDRange);
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
-                       COMPUTE_PGM_RSRC1_GFX6_GFX11_ENABLE_DX10_CLAMP, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_ieee_mode") {
-      if (!getSTI().hasFeature(AMDGPU::FeatureDX10ClampAndIEEEMode))
-        return Error(IDRange.Start, "directive unsupported on gfx1170+",
-                     IDRange);
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
-                       COMPUTE_PGM_RSRC1_GFX6_GFX11_ENABLE_IEEE_MODE, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_fp16_overflow") {
-      if (IVersion.Major < 9)
-        return Error(IDRange.Start, "directive requires gfx9+", IDRange);
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
-                       COMPUTE_PGM_RSRC1_GFX9_PLUS_FP16_OVFL, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_tg_split") {
-      if (!isGFX90A())
-        return Error(IDRange.Start, "directive requires gfx90a+", IDRange);
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc3, COMPUTE_PGM_RSRC3_GFX90A_TG_SPLIT,
-                       ExprVal, ValRange);
-    } else if (ID == ".amdhsa_workgroup_processor_mode") {
-      if (!supportsWGP(getSTI()))
-        return Error(IDRange.Start,
-                     "directive unsupported on " + getSTI().getCPU(), IDRange);
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
-                       COMPUTE_PGM_RSRC1_GFX10_PLUS_WGP_MODE, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_memory_ordered") {
-      if (IVersion.Major < 10)
-        return Error(IDRange.Start, "directive requires gfx10+", IDRange);
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
-                       COMPUTE_PGM_RSRC1_GFX10_PLUS_MEM_ORDERED, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_forward_progress") {
-      if (IVersion.Major < 10)
-        return Error(IDRange.Start, "directive requires gfx10+", IDRange);
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
-                       COMPUTE_PGM_RSRC1_GFX10_PLUS_FWD_PROGRESS, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_shared_vgpr_count") {
-      EXPR_RESOLVE_OR_ERROR(EvaluatableExpr);
-      if (IVersion.Major < 10 || IVersion.Major >= 12)
-        return Error(IDRange.Start, "directive requires gfx10 or gfx11",
-                     IDRange);
-      SharedVGPRCount = Val;
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc3,
-                       COMPUTE_PGM_RSRC3_GFX10_GFX11_SHARED_VGPR_COUNT, ExprVal,
-                       ValRange);
-    } else if (ID == ".amdhsa_inst_pref_size") {
-      if (IVersion.Major < 11)
-        return Error(IDRange.Start, "directive requires gfx11+", IDRange);
-      if (IVersion.Major == 11) {
-        PARSE_BITS_ENTRY(KD.compute_pgm_rsrc3,
-                         COMPUTE_PGM_RSRC3_GFX11_INST_PREF_SIZE, ExprVal,
-                         ValRange);
-      } else {
-        PARSE_BITS_ENTRY(KD.compute_pgm_rsrc3,
-                         COMPUTE_PGM_RSRC3_GFX12_PLUS_INST_PREF_SIZE, ExprVal,
-                         ValRange);
-      }
-    } else if (ID == ".amdhsa_exception_fp_ieee_invalid_op") {
-      PARSE_BITS_ENTRY(
-          KD.compute_pgm_rsrc2,
-          COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_INVALID_OPERATION,
-          ExprVal, ValRange);
-    } else if (ID == ".amdhsa_exception_fp_denorm_src") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
-                       COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_FP_DENORMAL_SOURCE,
-                       ExprVal, ValRange);
-    } else if (ID == ".amdhsa_exception_fp_ieee_div_zero") {
-      PARSE_BITS_ENTRY(
-          KD.compute_pgm_rsrc2,
-          COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_DIVISION_BY_ZERO,
-          ExprVal, ValRange);
-    } else if (ID == ".amdhsa_exception_fp_ieee_overflow") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
-                       COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_OVERFLOW,
-                       ExprVal, ValRange);
-    } else if (ID == ".amdhsa_exception_fp_ieee_underflow") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
-                       COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_UNDERFLOW,
-                       ExprVal, ValRange);
-    } else if (ID == ".amdhsa_exception_fp_ieee_inexact") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
-                       COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_INEXACT,
-                       ExprVal, ValRange);
-    } else if (ID == ".amdhsa_exception_int_div_zero") {
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc2,
-                       COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_INT_DIVIDE_BY_ZERO,
-                       ExprVal, ValRange);
-    } else if (ID == ".amdhsa_round_robin_scheduling") {
-      if (IVersion.Major < 12)
-        return Error(IDRange.Start, "directive requires gfx12+", IDRange);
-      PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
-                       COMPUTE_PGM_RSRC1_GFX12_PLUS_ENABLE_WG_RR_EN, ExprVal,
-                       ValRange);
-    } else {
-      return Error(IDRange.Start, "unknown .amdhsa_kernel directive", IDRange);
-    }
-
-#undef PARSE_BITS_ENTRY
-  }
-
-  if (!Seen.contains(".amdhsa_next_free_vgpr"))
-    return TokError(".amdhsa_next_free_vgpr directive is required");
-
-  if (!Seen.contains(".amdhsa_next_free_sgpr"))
-    return TokError(".amdhsa_next_free_sgpr directive is required");
-
-  unsigned UserSGPRCount = ExplicitUserSGPRCount.value_or(ImpliedUserSGPRCount);
-
-  // Consider the case where the total number of UserSGPRs with trailing
-  // allocated preload SGPRs, is greater than the number of explicitly
-  // referenced SGPRs.
-  if (PreloadLength) {
-    MCContext &Ctx = getContext();
-    NextFreeSGPR = AMDGPUMCExpr::createMax(
-        {NextFreeSGPR, MCConstantExpr::create(UserSGPRCount, Ctx)}, Ctx);
-  }
-
-  const MCExpr *VGPRBlocks;
-  const MCExpr *SGPRBlocks;
-  if (calculateGPRBlocks(getFeatureBits(), ReserveVCC, ReserveFlatScr,
-                         getTargetStreamer().getTargetID()->isXnackOnOrAny(),
-                         EnableWavefrontSize32, NextFreeVGPR,
-                         VGPRRange, NextFreeSGPR, SGPRRange, VGPRBlocks,
-                         SGPRBlocks))
-    return true;
-
-  int64_t EvaluatedVGPRBlocks;
-  bool VGPRBlocksEvaluatable =
-      VGPRBlocks->evaluateAsAbsolute(EvaluatedVGPRBlocks);
-  if (VGPRBlocksEvaluatable &&
-      !isUInt<COMPUTE_PGM_RSRC1_GRANULATED_WORKITEM_VGPR_COUNT_WIDTH>(
-          static_cast<uint64_t>(EvaluatedVGPRBlocks))) {
-    return OutOfRangeError(VGPRRange);
-  }
-  AMDGPU::MCKernelDescriptor::bits_set(
-      KD.compute_pgm_rsrc1, VGPRBlocks,
-      COMPUTE_PGM_RSRC1_GRANULATED_WORKITEM_VGPR_COUNT_SHIFT,
-      COMPUTE_PGM_RSRC1_GRANULATED_WORKITEM_VGPR_COUNT, getContext());
-
-  int64_t EvaluatedSGPRBlocks;
-  if (SGPRBlocks->evaluateAsAbsolute(EvaluatedSGPRBlocks) &&
-      !isUInt<COMPUTE_PGM_RSRC1_GRANULATED_WAVEFRONT_SGPR_COUNT_WIDTH>(
-          static_cast<uint64_t>(EvaluatedSGPRBlocks)))
-    return OutOfRangeError(SGPRRange);
-  AMDGPU::MCKernelDescriptor::bits_set(
-      KD.compute_pgm_rsrc1, SGPRBlocks,
-      COMPUTE_PGM_RSRC1_GRANULATED_WAVEFRONT_SGPR_COUNT_SHIFT,
-      COMPUTE_PGM_RSRC1_GRANULATED_WAVEFRONT_SGPR_COUNT, getContext());
-
-  if (ExplicitUserSGPRCount && ImpliedUserSGPRCount > *ExplicitUserSGPRCount)
-    return TokError("amdgpu_user_sgpr_count smaller than than implied by "
-                    "enabled user SGPRs");
-
-  if (isGFX1250Plus()) {
-    if (!isUInt<COMPUTE_PGM_RSRC2_GFX125_USER_SGPR_COUNT_WIDTH>(UserSGPRCount))
-      return TokError("too many user SGPRs enabled");
-    AMDGPU::MCKernelDescriptor::bits_set(
-        KD.compute_pgm_rsrc2,
-        MCConstantExpr::create(UserSGPRCount, getContext()),
-        COMPUTE_PGM_RSRC2_GFX125_USER_SGPR_COUNT_SHIFT,
-        COMPUTE_PGM_RSRC2_GFX125_USER_SGPR_COUNT, getContext());
-  } else {
-    if (!isUInt<COMPUTE_PGM_RSRC2_GFX6_GFX120_USER_SGPR_COUNT_WIDTH>(
-            UserSGPRCount))
-      return TokError("too many user SGPRs enabled");
-    AMDGPU::MCKernelDescriptor::bits_set(
-        KD.compute_pgm_rsrc2,
-        MCConstantExpr::create(UserSGPRCount, getContext()),
-        COMPUTE_PGM_RSRC2_GFX6_GFX120_USER_SGPR_COUNT_SHIFT,
-        COMPUTE_PGM_RSRC2_GFX6_GFX120_USER_SGPR_COUNT, getContext());
-  }
-
-  int64_t IVal = 0;
-  if (!KD.kernarg_size->evaluateAsAbsolute(IVal))
-    return TokError("Kernarg size should be resolvable");
-  uint64_t kernarg_size = IVal;
-  if (PreloadLength && kernarg_size &&
-      (PreloadLength * 4 + PreloadOffset * 4 > kernarg_size))
-    return TokError("Kernarg preload length + offset is larger than the "
-                    "kernarg segment size");
-
-  if (isGFX90A()) {
-    if (!Seen.contains(".amdhsa_accum_offset"))
-      return TokError(".amdhsa_accum_offset directive is required");
-    int64_t EvaluatedAccum;
-    bool AccumEvaluatable = AccumOffset->evaluateAsAbsolute(EvaluatedAccum);
-    uint64_t UEvaluatedAccum = EvaluatedAccum;
-    if (AccumEvaluatable &&
-        (UEvaluatedAccum < 4 || UEvaluatedAccum > 256 || (UEvaluatedAccum & 3)))
-      return TokError("accum_offset should be in range [4..256] in "
-                      "increments of 4");
-
-    int64_t EvaluatedNumVGPR;
-    if (NextFreeVGPR->evaluateAsAbsolute(EvaluatedNumVGPR) &&
-        AccumEvaluatable &&
-        UEvaluatedAccum >
-            alignTo(std::max((uint64_t)1, (uint64_t)EvaluatedNumVGPR), 4))
-      return TokError("accum_offset exceeds total VGPR allocation");
-    const MCExpr *AdjustedAccum = MCBinaryExpr::createSub(
-        MCBinaryExpr::createDiv(
-            AccumOffset, MCConstantExpr::create(4, getContext()), getContext()),
-        MCConstantExpr::create(1, getContext()), getContext());
-    MCKernelDescriptor::bits_set(KD.compute_pgm_rsrc3, AdjustedAccum,
-                                 COMPUTE_PGM_RSRC3_GFX90A_ACCUM_OFFSET_SHIFT,
-                                 COMPUTE_PGM_RSRC3_GFX90A_ACCUM_OFFSET,
-                                 getContext());
-  }
-
-  if (isGFX1250Plus())
-    MCKernelDescriptor::bits_set(KD.compute_pgm_rsrc3, NamedBarCnt,
-                                 COMPUTE_PGM_RSRC3_GFX125_NAMED_BAR_CNT_SHIFT,
-                                 COMPUTE_PGM_RSRC3_GFX125_NAMED_BAR_CNT,
-                                 getContext());
-
-  if (IVersion.Major >= 10 && IVersion.Major < 12) {
-    // SharedVGPRCount < 16 checked by PARSE_ENTRY_BITS
-    if (SharedVGPRCount && EnableWavefrontSize32 && *EnableWavefrontSize32) {
-      return TokError("shared_vgpr_count directive not valid on "
-                      "wavefront size 32");
-    }
-
-    if (VGPRBlocksEvaluatable &&
-        (SharedVGPRCount * 2 + static_cast<uint64_t>(EvaluatedVGPRBlocks) >
-         63)) {
-      return TokError("shared_vgpr_count*2 + "
-                      "compute_pgm_rsrc1.GRANULATED_WORKITEM_VGPR_COUNT cannot "
-                      "exceed 63\n");
-    }
-  }
-
-  getTargetStreamer().EmitAmdhsaKernelDescriptor(getSTI(), KernelName, KD,
-                                                 NextFreeVGPR, NextFreeSGPR,
-                                                 ReserveVCC, ReserveFlatScr);
-  return false;
-}
-
-bool AMDGPUAsmParser::ParseDirectiveAMDHSACodeObjectVersion() {
-  uint32_t Version;
-  if (ParseAsAbsoluteExpression(Version))
-    return true;
-
-  getTargetStreamer().EmitDirectiveAMDHSACodeObjectVersion(Version);
-  return false;
-}
-
-bool AMDGPUAsmParser::ParseAMDKernelCodeTValue(StringRef ID,
-                                               AMDGPUMCKernelCodeT &C) {
-  // max_scratch_backing_memory_byte_size is deprecated. Ignore it while parsing
-  // assembly for backwards compatibility.
-  if (ID == "max_scratch_backing_memory_byte_size") {
-    Parser.eatToEndOfStatement();
-    return false;
-  }
-
-  SmallString<40> ErrStr;
-  raw_svector_ostream Err(ErrStr);
-  if (!C.ParseKernelCodeT(ID, getParser(), Err)) {
-    return TokError(Err.str());
-  }
-  Lex();
-
-  if (ID == "enable_wavefront_size32") {
-    if (C.code_properties & AMD_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32) {
-      if (!isGFX10Plus())
-        return TokError("enable_wavefront_size32=1 is only allowed on GFX10+");
-      if (!isWave32())
-        return TokError("enable_wavefront_size32=1 requires +WavefrontSize32");
-    } else {
-      if (!isWave64())
-        return TokError("enable_wavefront_size32=0 requires +WavefrontSize64");
-    }
-  }
-
-  if (ID == "wavefront_size") {
-    if (C.wavefront_size == 5) {
-      if (!isGFX10Plus())
-        return TokError("wavefront_size=5 is only allowed on GFX10+");
-      if (!isWave32())
-        return TokError("wavefront_size=5 requires +WavefrontSize32");
-    } else if (C.wavefront_size == 6) {
-      if (!isWave64())
-        return TokError("wavefront_size=6 requires +WavefrontSize64");
-    }
-  }
-
-  return false;
-}
-
-bool AMDGPUAsmParser::ParseDirectiveAMDKernelCodeT() {
-  AMDGPUMCKernelCodeT KernelCode;
-  KernelCode.initDefault(&getSTI(), getContext());
-
-  while (true) {
-    // Lex EndOfStatement.  This is in a while loop, because lexing a comment
-    // will set the current token to EndOfStatement.
-    while(trySkipToken(AsmToken::EndOfStatement));
-
-    StringRef ID;
-    if (!parseId(ID, "expected value identifier or .end_amd_kernel_code_t"))
-      return true;
-
-    if (ID == ".end_amd_kernel_code_t")
-      break;
-
-    if (ParseAMDKernelCodeTValue(ID, KernelCode))
-      return true;
-  }
-
-  KernelCode.validate(&getSTI(), getContext());
-  getTargetStreamer().EmitAMDKernelCodeT(KernelCode);
-
-  return false;
-}
-
-bool AMDGPUAsmParser::ParseDirectiveAMDGPUHsaKernel() {
-  StringRef KernelName;
-  if (!parseId(KernelName, "expected symbol name"))
-    return true;
-
-  getTargetStreamer().EmitAMDGPUSymbolType(KernelName,
-                                           ELF::STT_AMDGPU_HSA_KERNEL);
-
-  KernelScope.initialize(getContext());
-  return false;
-}
-
-bool AMDGPUAsmParser::ParseDirectiveISAVersion() {
-  if (!getSTI().getTargetTriple().isAMDGCN()) {
-    return Error(getLoc(),
-                 ".amd_amdgpu_isa directive is not available on non-amdgcn "
-                 "architectures");
-  }
-
-  auto TargetIDDirective = getLexer().getTok().getStringContents();
-  if (getTargetStreamer().getTargetID()->toString() != TargetIDDirective)
-    return Error(getParser().getTok().getLoc(), "target id must match options");
-
-  getTargetStreamer().EmitISAVersion();
-  Lex();
-
-  return false;
-}
-
-bool AMDGPUAsmParser::ParseDirectiveHSAMetadata() {
-  assert(isHsaAbi(getSTI()));
-
-  std::string HSAMetadataString;
-  if (ParseToEndDirective(HSAMD::V3::AssemblerDirectiveBegin,
-                          HSAMD::V3::AssemblerDirectiveEnd, HSAMetadataString))
-    return true;
-
-  if (!getTargetStreamer().EmitHSAMetadataV3(HSAMetadataString))
-    return Error(getLoc(), "invalid HSA metadata");
-
-  return false;
-}
-
-/// Common code to parse out a block of text (typically YAML) between start and
-/// end directives.
-bool AMDGPUAsmParser::ParseToEndDirective(const char *AssemblerDirectiveBegin,
-                                          const char *AssemblerDirectiveEnd,
-                                          std::string &CollectString) {
-
-  raw_string_ostream CollectStream(CollectString);
-
-  getLexer().setSkipSpace(false);
-
-  bool FoundEnd = false;
-  while (!isToken(AsmToken::Eof)) {
-    while (isToken(AsmToken::Space)) {
-      CollectStream << getTokenStr();
-      Lex();
-    }
-
-    if (trySkipId(AssemblerDirectiveEnd)) {
-      FoundEnd = true;
-      break;
-    }
-
-    CollectStream << Parser.parseStringToEndOfStatement()
-                  << getContext().getAsmInfo()->getSeparatorString();
-
-    Parser.eatToEndOfStatement();
-  }
-
-  getLexer().setSkipSpace(true);
-
-  if (isToken(AsmToken::Eof) && !FoundEnd) {
-    return TokError(Twine("expected directive ") +
-                    Twine(AssemblerDirectiveEnd) + Twine(" not found"));
-  }
-
-  return false;
-}
-
-/// Parse the assembler directive for new MsgPack-format PAL metadata.
-bool AMDGPUAsmParser::ParseDirectivePALMetadataBegin() {
-  std::string String;
-  if (ParseToEndDirective(AMDGPU::PALMD::AssemblerDirectiveBegin,
-                          AMDGPU::PALMD::AssemblerDirectiveEnd, String))
-    return true;
-
-  auto *PALMetadata = getTargetStreamer().getPALMetadata();
-  if (!PALMetadata->setFromString(String))
-    return Error(getLoc(), "invalid PAL metadata");
-  return false;
-}
-
-/// Parse the assembler directive for old linear-format PAL metadata.
-bool AMDGPUAsmParser::ParseDirectivePALMetadata() {
-  if (getSTI().getTargetTriple().getOS() != Triple::AMDPAL) {
-    return Error(getLoc(),
-                 (Twine(PALMD::AssemblerDirective) + Twine(" directive is "
-                 "not available on non-amdpal OSes")).str());
-  }
-
-  auto *PALMetadata = getTargetStreamer().getPALMetadata();
-  PALMetadata->setLegacy();
-  for (;;) {
-    uint32_t Key, Value;
-    if (ParseAsAbsoluteExpression(Key)) {
-      return TokError(Twine("invalid value in ") +
-                      Twine(PALMD::AssemblerDirective));
-    }
-    if (!trySkipToken(AsmToken::Comma)) {
-      return TokError(Twine("expected an even number of values in ") +
-                      Twine(PALMD::AssemblerDirective));
-    }
-    if (ParseAsAbsoluteExpression(Value)) {
-      return TokError(Twine("invalid value in ") +
-                      Twine(PALMD::AssemblerDirective));
-    }
-    PALMetadata->setRegister(Key, Value);
-    if (!trySkipToken(AsmToken::Comma))
-      break;
-  }
-  return false;
-}
-
-/// ParseDirectiveAMDGPULDS
-///  ::= .amdgpu_lds identifier ',' size_expression [',' align_expression]
-bool AMDGPUAsmParser::ParseDirectiveAMDGPULDS() {
-  if (getParser().checkForValidSection())
-    return true;
-
-  StringRef Name;
-  SMLoc NameLoc = getLoc();
-  if (getParser().parseIdentifier(Name))
-    return TokError("expected identifier in directive");
-
-  MCSymbol *Symbol = getContext().getOrCreateSymbol(Name);
-  if (getParser().parseComma())
-    return true;
-
-  unsigned LocalMemorySize = AMDGPU::IsaInfo::getLocalMemorySize(&getSTI());
-
-  int64_t Size;
-  SMLoc SizeLoc = getLoc();
-  if (getParser().parseAbsoluteExpression(Size))
-    return true;
-  if (Size < 0)
-    return Error(SizeLoc, "size must be non-negative");
-  if (Size > LocalMemorySize)
-    return Error(SizeLoc, "size is too large");
-
-  int64_t Alignment = 4;
-  if (trySkipToken(AsmToken::Comma)) {
-    SMLoc AlignLoc = getLoc();
-    if (getParser().parseAbsoluteExpression(Alignment))
-      return true;
-    if (Alignment < 0 || !isPowerOf2_64(Alignment))
-      return Error(AlignLoc, "alignment must be a power of two");
-
-    // Alignment larger than the size of LDS is possible in theory, as long
-    // as the linker manages to place to symbol at address 0, but we do want
-    // to make sure the alignment fits nicely into a 32-bit integer.
-    if (Alignment >= 1u << 31)
-      return Error(AlignLoc, "alignment is too large");
-  }
-
-  if (parseEOL())
-    return true;
-
-  Symbol->redefineIfPossible();
-  if (!Symbol->isUndefined())
-    return Error(NameLoc, "invalid symbol redefinition");
-
-  getTargetStreamer().emitAMDGPULDS(Symbol, Size, Align(Alignment));
-  return false;
-}
-
-bool AMDGPUAsmParser::ParseDirective(AsmToken DirectiveID) {
-  StringRef IDVal = DirectiveID.getString();
-
-  if (isHsaAbi(getSTI())) {
-    if (IDVal == ".amdhsa_kernel")
-     return ParseDirectiveAMDHSAKernel();
-
-    if (IDVal == ".amdhsa_code_object_version")
-      return ParseDirectiveAMDHSACodeObjectVersion();
-
-    // TODO: Restructure/combine with PAL metadata directive.
-    if (IDVal == AMDGPU::HSAMD::V3::AssemblerDirectiveBegin)
-      return ParseDirectiveHSAMetadata();
-  } else {
-    if (IDVal == ".amd_kernel_code_t")
-      return ParseDirectiveAMDKernelCodeT();
-
-    if (IDVal == ".amdgpu_hsa_kernel")
-      return ParseDirectiveAMDGPUHsaKernel();
-
-    if (IDVal == ".amd_amdgpu_isa")
-      return ParseDirectiveISAVersion();
-
-    if (IDVal == AMDGPU::HSAMD::AssemblerDirectiveBegin) {
-      return Error(getLoc(), (Twine(HSAMD::AssemblerDirectiveBegin) +
-                              Twine(" directive is "
-                                    "not available on non-amdhsa OSes"))
-                                 .str());
-    }
-  }
-
-  if (IDVal == ".amdgcn_target")
-    return ParseDirectiveAMDGCNTarget();
-
-  if (IDVal == ".amdgpu_lds")
-    return ParseDirectiveAMDGPULDS();
-
-  if (IDVal == PALMD::AssemblerDirectiveBegin)
-    return ParseDirectivePALMetadataBegin();
-
-  if (IDVal == PALMD::AssemblerDirective)
-    return ParseDirectivePALMetadata();
-
-  return true;
-}
-
-bool AMDGPUAsmParser::subtargetHasRegister(const MCRegisterInfo &MRI,
-                                           MCRegister Reg) {
-  if (MRI.regsOverlap(TTMP12_TTMP13_TTMP14_TTMP15, Reg))
-    return isGFX9Plus();
-
-  // GFX10+ has 2 more SGPRs 104 and 105.
-  if (MRI.regsOverlap(SGPR104_SGPR105, Reg))
-    return hasSGPR104_SGPR105();
-
-  switch (Reg.id()) {
-  case SRC_SHARED_BASE_LO:
-  case SRC_SHARED_BASE:
-  case SRC_SHARED_LIMIT_LO:
-  case SRC_SHARED_LIMIT:
-  case SRC_PRIVATE_BASE_LO:
-  case SRC_PRIVATE_BASE:
-  case SRC_PRIVATE_LIMIT_LO:
-  case SRC_PRIVATE_LIMIT:
-    return isGFX9Plus();
-  case SRC_FLAT_SCRATCH_BASE_LO:
-  case SRC_FLAT_SCRATCH_BASE_HI:
-    return hasGloballyAddressableScratch();
-  case SRC_POPS_EXITING_WAVE_ID:
-    return isGFX9Plus() && !isGFX11Plus();
-  case TBA:
-  case TBA_LO:
-  case TBA_HI:
-  case TMA:
-  case TMA_LO:
-  case TMA_HI:
-    return !isGFX9Plus();
-  case XNACK_MASK:
-  case XNACK_MASK_LO:
-  case XNACK_MASK_HI:
-    return (isVI() || isGFX9()) && getTargetStreamer().getTargetID()->isXnackSupported();
-  case SGPR_NULL:
-    return isGFX10Plus();
-  case SRC_EXECZ:
-  case SRC_VCCZ:
-    return !isGFX11Plus();
-  default:
-    break;
-  }
-
-  if (isCI())
-    return true;
-
-  if (isSI() || isGFX10Plus()) {
-    // No flat_scr on SI.
-    // On GFX10Plus flat scratch is not a valid register operand and can only be
-    // accessed with s_setreg/s_getreg.
-    switch (Reg.id()) {
-    case FLAT_SCR:
-    case FLAT_SCR_LO:
-    case FLAT_SCR_HI:
-      return false;
-    default:
-      return true;
-    }
-  }
-
-  // VI only has 102 SGPRs, so make sure we aren't trying to use the 2 more that
-  // SI/CI have.
-  if (MRI.regsOverlap(SGPR102_SGPR103, Reg))
-    return hasSGPR102_SGPR103();
-
-  return true;
-}
-
-ParseStatus AMDGPUAsmParser::parseOperand(OperandVector &Operands,
-                                          StringRef Mnemonic,
-                                          OperandMode Mode) {
-  ParseStatus Res = parseVOPD(Operands);
-  if (Res.isSuccess() || Res.isFailure() || isToken(AsmToken::EndOfStatement))
-    return Res;
-
-  // Try to parse with a custom parser
-  Res = MatchOperandParserImpl(Operands, Mnemonic);
-
-  // If we successfully parsed the operand or if there as an error parsing,
-  // we are done.
-  //
-  // If we are parsing after we reach EndOfStatement then this means we
-  // are appending default values to the Operands list.  This is only done
-  // by custom parser, so we shouldn't continue on to the generic parsing.
-  if (Res.isSuccess() || Res.isFailure() || isToken(AsmToken::EndOfStatement))
-    return Res;
-
-  SMLoc RBraceLoc;
-  SMLoc LBraceLoc = getLoc();
-  if (Mode == OperandMode_NSA && trySkipToken(AsmToken::LBrac)) {
-    unsigned Prefix = Operands.size();
-
-    for (;;) {
-      auto Loc = getLoc();
-      Res = parseReg(Operands);
-      if (Res.isNoMatch())
-        Error(Loc, "expected a register");
-      if (!Res.isSuccess())
-        return ParseStatus::Failure;
-
-      RBraceLoc = getLoc();
-      if (trySkipToken(AsmToken::RBrac))
-        break;
-
-      if (!skipToken(AsmToken::Comma,
-                     "expected a comma or a closing square bracket"))
-        return ParseStatus::Failure;
-    }
-
-    if (Operands.size() - Prefix > 1) {
-      Operands.insert(Operands.begin() + Prefix,
-                      AMDGPUOperand::CreateToken(this, "[", LBraceLoc));
-      Operands.push_back(AMDGPUOperand::CreateToken(this, "]", RBraceLoc));
-    }
-
-    return ParseStatus::Success;
-  }
-
-  return parseRegOrImm(Operands);
-}
-
-StringRef AMDGPUAsmParser::parseMnemonicSuffix(StringRef Name) {
-  // Clear any forced encodings from the previous instruction.
-  setForcedEncodingSize(0);
-  setForcedDPP(false);
-  setForcedSDWA(false);
-
-  if (Name.consume_back("_e64_dpp")) {
-    setForcedDPP(true);
-    setForcedEncodingSize(64);
-    return Name;
-  }
-  if (Name.consume_back("_e64")) {
-    setForcedEncodingSize(64);
-    return Name;
-  }
-  if (Name.consume_back("_e32")) {
-    setForcedEncodingSize(32);
-    return Name;
-  }
-  if (Name.consume_back("_dpp")) {
-    setForcedDPP(true);
-    return Name;
-  }
-  if (Name.consume_back("_sdwa")) {
-    setForcedSDWA(true);
-    return Name;
-  }
-  return Name;
-}
-
-static void applyMnemonicAliases(StringRef &Mnemonic,
-                                 const FeatureBitset &Features,
-                                 unsigned VariantID);
-
-bool AMDGPUAsmParser::parseInstruction(ParseInstructionInfo &Info,
-                                       StringRef Name, SMLoc NameLoc,
-                                       OperandVector &Operands) {
-  // Add the instruction mnemonic
-  Name = parseMnemonicSuffix(Name);
-
-  // If the target architecture uses MnemonicAlias, call it here to parse
-  // operands correctly.
-  applyMnemonicAliases(Name, getAvailableFeatures(), 0);
-
-  Operands.push_back(AMDGPUOperand::CreateToken(this, Name, NameLoc));
-
-  bool IsMIMG = Name.starts_with("image_");
-
-  while (!trySkipToken(AsmToken::EndOfStatement)) {
-    OperandMode Mode = OperandMode_Default;
-    if (IsMIMG && isGFX10Plus() && Operands.size() == 2)
-      Mode = OperandMode_NSA;
-    ParseStatus Res = parseOperand(Operands, Name, Mode);
-
-    if (!Res.isSuccess()) {
-      checkUnsupportedInstruction(Name, NameLoc);
-      if (!Parser.hasPendingError()) {
-        // FIXME: use real operand location rather than the current location.
-        StringRef Msg = Res.isFailure() ? "failed parsing operand."
-                                        : "not a valid operand.";
-        Error(getLoc(), Msg);
-      }
-      while (!trySkipToken(AsmToken::EndOfStatement)) {
-        lex();
-      }
-      return true;
-    }
-
-    // Eat the comma or space if there is one.
-    trySkipToken(AsmToken::Comma);
-  }
-
-  return false;
-}
-
-//===----------------------------------------------------------------------===//
-// Utility functions
-//===----------------------------------------------------------------------===//
-
-ParseStatus AMDGPUAsmParser::parseTokenOp(StringRef Name,
-                                          OperandVector &Operands) {
-  SMLoc S = getLoc();
-  if (!trySkipId(Name))
-    return ParseStatus::NoMatch;
-
-  Operands.push_back(AMDGPUOperand::CreateToken(this, Name, S));
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseIntWithPrefix(const char *Prefix,
-                                                int64_t &IntVal) {
-
-  if (!trySkipId(Prefix, AsmToken::Colon))
-    return ParseStatus::NoMatch;
-
-  return parseExpr(IntVal) ? ParseStatus::Success : ParseStatus::Failure;
-}
-
-ParseStatus AMDGPUAsmParser::parseIntWithPrefix(
-    const char *Prefix, OperandVector &Operands, AMDGPUOperand::ImmTy ImmTy,
-    std::function<bool(int64_t &)> ConvertResult) {
-  SMLoc S = getLoc();
-  int64_t Value = 0;
-
-  ParseStatus Res = parseIntWithPrefix(Prefix, Value);
-  if (!Res.isSuccess())
-    return Res;
-
-  if (ConvertResult && !ConvertResult(Value)) {
-    Error(S, "invalid " + StringRef(Prefix) + " value.");
-  }
-
-  Operands.push_back(AMDGPUOperand::CreateImm(this, Value, S, ImmTy));
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseOperandArrayWithPrefix(
-    const char *Prefix, OperandVector &Operands, AMDGPUOperand::ImmTy ImmTy,
-    bool (*ConvertResult)(int64_t &)) {
-  SMLoc S = getLoc();
-  if (!trySkipId(Prefix, AsmToken::Colon))
-    return ParseStatus::NoMatch;
-
-  if (!skipToken(AsmToken::LBrac, "expected a left square bracket"))
-    return ParseStatus::Failure;
-
-  unsigned Val = 0;
-  const unsigned MaxSize = 4;
-
-  // FIXME: How to verify the number of elements matches the number of src
-  // operands?
-  for (int I = 0; ; ++I) {
-    int64_t Op;
-    SMLoc Loc = getLoc();
-    if (!parseExpr(Op))
-      return ParseStatus::Failure;
-
-    if (Op != 0 && Op != 1)
-      return Error(Loc, "invalid " + StringRef(Prefix) + " value.");
-
-    Val |= (Op << I);
-
-    if (trySkipToken(AsmToken::RBrac))
-      break;
-
-    if (I + 1 == MaxSize)
-      return Error(getLoc(), "expected a closing square bracket");
-
-    if (!skipToken(AsmToken::Comma, "expected a comma"))
-      return ParseStatus::Failure;
-  }
-
-  Operands.push_back(AMDGPUOperand::CreateImm(this, Val, S, ImmTy));
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseNamedBit(StringRef Name,
-                                           OperandVector &Operands,
-                                           AMDGPUOperand::ImmTy ImmTy,
-                                           bool IgnoreNegative) {
-  int64_t Bit;
-  SMLoc S = getLoc();
-
-  if (trySkipId(Name)) {
-    Bit = 1;
-  } else if (trySkipId("no", Name)) {
-    if (IgnoreNegative)
-      return ParseStatus::Success;
-    Bit = 0;
-  } else {
-    return ParseStatus::NoMatch;
-  }
-
-  if (Name == "r128" && !hasMIMG_R128())
-    return Error(S, "r128 modifier is not supported on this GPU");
-  if (Name == "a16" && !hasA16())
-    return Error(S, "a16 modifier is not supported on this GPU");
-
-  if (Bit == 0 && Name == "gds") {
-    StringRef Mnemo = ((AMDGPUOperand &)*Operands[0]).getToken();
-    if (Mnemo.starts_with("ds_gws"))
-      return Error(S, "nogds is not allowed");
-  }
-
-  if (isGFX9() && ImmTy == AMDGPUOperand::ImmTyA16)
-    ImmTy = AMDGPUOperand::ImmTyR128A16;
-
-  Operands.push_back(AMDGPUOperand::CreateImm(this, Bit, S, ImmTy));
-  return ParseStatus::Success;
-}
-
-unsigned AMDGPUAsmParser::getCPolKind(StringRef Id, StringRef Mnemo,
-                                      bool &Disabling) const {
-  Disabling = Id.consume_front("no");
-
-  if (isGFX940() && !Mnemo.starts_with("s_")) {
-    return StringSwitch<unsigned>(Id)
-        .Case("nt", AMDGPU::CPol::NT)
-        .Case("sc0", AMDGPU::CPol::SC0)
-        .Case("sc1", AMDGPU::CPol::SC1)
-        .Default(0);
-  }
-
-  return StringSwitch<unsigned>(Id)
-      .Case("dlc", AMDGPU::CPol::DLC)
-      .Case("glc", AMDGPU::CPol::GLC)
-      .Case("scc", AMDGPU::CPol::SCC)
-      .Case("slc", AMDGPU::CPol::SLC)
-      .Default(0);
-}
-
-ParseStatus AMDGPUAsmParser::parseCPol(OperandVector &Operands) {
-  if (isGFX12Plus()) {
-    SMLoc StringLoc = getLoc();
-
-    int64_t CPolVal = 0;
-    ParseStatus ResTH = ParseStatus::NoMatch;
-    ParseStatus ResScope = ParseStatus::NoMatch;
-    ParseStatus ResNV = ParseStatus::NoMatch;
-    ParseStatus ResScal = ParseStatus::NoMatch;
-
-    for (;;) {
-      if (ResTH.isNoMatch()) {
-        int64_t TH;
-        ResTH = parseTH(Operands, TH);
-        if (ResTH.isFailure())
-          return ResTH;
-        if (ResTH.isSuccess()) {
-          CPolVal |= TH;
-          continue;
-        }
-      }
-
-      if (ResScope.isNoMatch()) {
-        int64_t Scope;
-        ResScope = parseScope(Operands, Scope);
-        if (ResScope.isFailure())
-          return ResScope;
-        if (ResScope.isSuccess()) {
-          CPolVal |= Scope;
-          continue;
-        }
-      }
-
-      // NV bit exists on GFX12+, but does something starting from GFX1250.
-      // Allow parsing on all GFX12 and fail on validation for better
-      // diagnostics.
-      if (ResNV.isNoMatch()) {
-        if (trySkipId("nv")) {
-          ResNV = ParseStatus::Success;
-          CPolVal |= CPol::NV;
-          continue;
-        } else if (trySkipId("no", "nv")) {
-          ResNV = ParseStatus::Success;
-          continue;
-        }
-      }
-
-      if (ResScal.isNoMatch()) {
-        if (trySkipId("scale_offset")) {
-          ResScal = ParseStatus::Success;
-          CPolVal |= CPol::SCAL;
-          continue;
-        } else if (trySkipId("no", "scale_offset")) {
-          ResScal = ParseStatus::Success;
-          continue;
-        }
-      }
-
-      break;
-    }
-
-    if (ResTH.isNoMatch() && ResScope.isNoMatch() && ResNV.isNoMatch() &&
-        ResScal.isNoMatch())
-      return ParseStatus::NoMatch;
-
-    Operands.push_back(AMDGPUOperand::CreateImm(this, CPolVal, StringLoc,
-                                                AMDGPUOperand::ImmTyCPol));
-    return ParseStatus::Success;
-  }
-
-  StringRef Mnemo = ((AMDGPUOperand &)*Operands[0]).getToken();
-  SMLoc OpLoc = getLoc();
-  unsigned Enabled = 0, Seen = 0;
-  for (;;) {
-    SMLoc S = getLoc();
-    bool Disabling;
-    unsigned CPol = getCPolKind(getId(), Mnemo, Disabling);
-    if (!CPol)
-      break;
-
-    lex();
-
-    if (!isGFX10Plus() && CPol == AMDGPU::CPol::DLC)
-      return Error(S, "dlc modifier is not supported on this GPU");
-
-    if (!isGFX90A() && CPol == AMDGPU::CPol::SCC)
-      return Error(S, "scc modifier is not supported on this GPU");
-
-    if (Seen & CPol)
-      return Error(S, "duplicate cache policy modifier");
-
-    if (!Disabling)
-      Enabled |= CPol;
-
-    Seen |= CPol;
-  }
-
-  if (!Seen)
-    return ParseStatus::NoMatch;
-
-  Operands.push_back(
-      AMDGPUOperand::CreateImm(this, Enabled, OpLoc, AMDGPUOperand::ImmTyCPol));
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseScope(OperandVector &Operands,
-                                        int64_t &Scope) {
-  static const unsigned Scopes[] = {CPol::SCOPE_CU, CPol::SCOPE_SE,
-                                    CPol::SCOPE_DEV, CPol::SCOPE_SYS};
-
-  ParseStatus Res = parseStringOrIntWithPrefix(
-      Operands, "scope", {"SCOPE_CU", "SCOPE_SE", "SCOPE_DEV", "SCOPE_SYS"},
-      Scope);
-
-  if (Res.isSuccess())
-    Scope = Scopes[Scope];
-
-  return Res;
-}
-
-ParseStatus AMDGPUAsmParser::parseTH(OperandVector &Operands, int64_t &TH) {
-  TH = AMDGPU::CPol::TH_RT; // default
-
-  StringRef Value;
-  SMLoc StringLoc;
-  ParseStatus Res = parseStringWithPrefix("th", Value, StringLoc);
-  if (!Res.isSuccess())
-    return Res;
-
-  if (Value == "TH_DEFAULT")
-    TH = AMDGPU::CPol::TH_RT;
-  else if (Value == "TH_STORE_LU" || Value == "TH_LOAD_WB" ||
-           Value == "TH_LOAD_NT_WB") {
-    return Error(StringLoc, "invalid th value");
-  } else if (Value.consume_front("TH_ATOMIC_")) {
-    TH = AMDGPU::CPol::TH_TYPE_ATOMIC;
-  } else if (Value.consume_front("TH_LOAD_")) {
-    TH = AMDGPU::CPol::TH_TYPE_LOAD;
-  } else if (Value.consume_front("TH_STORE_")) {
-    TH = AMDGPU::CPol::TH_TYPE_STORE;
-  } else {
-    return Error(StringLoc, "invalid th value");
-  }
-
-  if (Value == "BYPASS")
-    TH |= AMDGPU::CPol::TH_REAL_BYPASS;
-
-  if (TH != 0) {
-    if (TH & AMDGPU::CPol::TH_TYPE_ATOMIC)
-      TH |= StringSwitch<int64_t>(Value)
-                .Case("RETURN", AMDGPU::CPol::TH_ATOMIC_RETURN)
-                .Case("RT", AMDGPU::CPol::TH_RT)
-                .Case("RT_RETURN", AMDGPU::CPol::TH_ATOMIC_RETURN)
-                .Case("NT", AMDGPU::CPol::TH_ATOMIC_NT)
-                .Case("NT_RETURN", AMDGPU::CPol::TH_ATOMIC_NT |
-                                       AMDGPU::CPol::TH_ATOMIC_RETURN)
-                .Case("CASCADE_RT", AMDGPU::CPol::TH_ATOMIC_CASCADE)
-                .Case("CASCADE_NT", AMDGPU::CPol::TH_ATOMIC_CASCADE |
-                                        AMDGPU::CPol::TH_ATOMIC_NT)
-                .Default(0xffffffff);
-    else
-      TH |= StringSwitch<int64_t>(Value)
-                .Case("RT", AMDGPU::CPol::TH_RT)
-                .Case("NT", AMDGPU::CPol::TH_NT)
-                .Case("HT", AMDGPU::CPol::TH_HT)
-                .Case("LU", AMDGPU::CPol::TH_LU)
-                .Case("WB", AMDGPU::CPol::TH_WB)
-                .Case("NT_RT", AMDGPU::CPol::TH_NT_RT)
-                .Case("RT_NT", AMDGPU::CPol::TH_RT_NT)
-                .Case("NT_HT", AMDGPU::CPol::TH_NT_HT)
-                .Case("NT_WB", AMDGPU::CPol::TH_NT_WB)
-                .Case("BYPASS", AMDGPU::CPol::TH_BYPASS)
-                .Default(0xffffffff);
-  }
-
-  if (TH == 0xffffffff)
-    return Error(StringLoc, "invalid th value");
-
-  return ParseStatus::Success;
-}
-
-static void
-addOptionalImmOperand(MCInst &Inst, const OperandVector &Operands,
-                      AMDGPUAsmParser::OptionalImmIndexMap &OptionalIdx,
-                      AMDGPUOperand::ImmTy ImmT, int64_t Default = 0,
-                      std::optional<unsigned> InsertAt = std::nullopt) {
-  auto i = OptionalIdx.find(ImmT);
-  if (i != OptionalIdx.end()) {
-    unsigned Idx = i->second;
-    const AMDGPUOperand &Op =
-        static_cast<const AMDGPUOperand &>(*Operands[Idx]);
-    if (InsertAt)
-      Inst.insert(Inst.begin() + *InsertAt, MCOperand::createImm(Op.getImm()));
-    else
-      Op.addImmOperands(Inst, 1);
-  } else {
-    if (InsertAt.has_value())
-      Inst.insert(Inst.begin() + *InsertAt, MCOperand::createImm(Default));
-    else
-      Inst.addOperand(MCOperand::createImm(Default));
-  }
-}
-
-ParseStatus AMDGPUAsmParser::parseStringWithPrefix(StringRef Prefix,
-                                                   StringRef &Value,
-                                                   SMLoc &StringLoc) {
-  if (!trySkipId(Prefix, AsmToken::Colon))
-    return ParseStatus::NoMatch;
-
-  StringLoc = getLoc();
-  return parseId(Value, "expected an identifier") ? ParseStatus::Success
-                                                  : ParseStatus::Failure;
-}
-
-ParseStatus AMDGPUAsmParser::parseStringOrIntWithPrefix(
-    OperandVector &Operands, StringRef Name, ArrayRef<const char *> Ids,
-    int64_t &IntVal) {
-  if (!trySkipId(Name, AsmToken::Colon))
-    return ParseStatus::NoMatch;
-
-  SMLoc StringLoc = getLoc();
-
-  StringRef Value;
-  if (isToken(AsmToken::Identifier)) {
-    Value = getTokenStr();
-    lex();
-
-    for (IntVal = 0; IntVal < (int64_t)Ids.size(); ++IntVal)
-      if (Value == Ids[IntVal])
-        break;
-  } else if (!parseExpr(IntVal))
-    return ParseStatus::Failure;
-
-  if (IntVal < 0 || IntVal >= (int64_t)Ids.size())
-    return Error(StringLoc, "invalid " + Twine(Name) + " value");
-
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseStringOrIntWithPrefix(
-    OperandVector &Operands, StringRef Name, ArrayRef<const char *> Ids,
-    AMDGPUOperand::ImmTy Type) {
-  SMLoc S = getLoc();
-  int64_t IntVal;
-
-  ParseStatus Res = parseStringOrIntWithPrefix(Operands, Name, Ids, IntVal);
-  if (Res.isSuccess())
-    Operands.push_back(AMDGPUOperand::CreateImm(this, IntVal, S, Type));
-
-  return Res;
-}
-
-//===----------------------------------------------------------------------===//
-// MTBUF format
-//===----------------------------------------------------------------------===//
-
-bool AMDGPUAsmParser::tryParseFmt(const char *Pref,
-                                  int64_t MaxVal,
-                                  int64_t &Fmt) {
-  int64_t Val;
-  SMLoc Loc = getLoc();
-
-  auto Res = parseIntWithPrefix(Pref, Val);
-  if (Res.isFailure())
-    return false;
-  if (Res.isNoMatch())
-    return true;
-
-  if (Val < 0 || Val > MaxVal) {
-    Error(Loc, Twine("out of range ", StringRef(Pref)));
-    return false;
-  }
-
-  Fmt = Val;
-  return true;
-}
-
-ParseStatus AMDGPUAsmParser::tryParseIndexKey(OperandVector &Operands,
-                                              AMDGPUOperand::ImmTy ImmTy) {
-  const char *Pref = "index_key";
-  int64_t ImmVal = 0;
-  SMLoc Loc = getLoc();
-  auto Res = parseIntWithPrefix(Pref, ImmVal);
-  if (!Res.isSuccess())
-    return Res;
-
-  if ((ImmTy == AMDGPUOperand::ImmTyIndexKey16bit ||
-       ImmTy == AMDGPUOperand::ImmTyIndexKey32bit) &&
-      (ImmVal < 0 || ImmVal > 1))
-    return Error(Loc, Twine("out of range ", StringRef(Pref)));
-
-  if (ImmTy == AMDGPUOperand::ImmTyIndexKey8bit && (ImmVal < 0 || ImmVal > 3))
-    return Error(Loc, Twine("out of range ", StringRef(Pref)));
-
-  Operands.push_back(AMDGPUOperand::CreateImm(this, ImmVal, Loc, ImmTy));
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseIndexKey8bit(OperandVector &Operands) {
-  return tryParseIndexKey(Operands, AMDGPUOperand::ImmTyIndexKey8bit);
-}
-
-ParseStatus AMDGPUAsmParser::parseIndexKey16bit(OperandVector &Operands) {
-  return tryParseIndexKey(Operands, AMDGPUOperand::ImmTyIndexKey16bit);
-}
-
-ParseStatus AMDGPUAsmParser::parseIndexKey32bit(OperandVector &Operands) {
-  return tryParseIndexKey(Operands, AMDGPUOperand::ImmTyIndexKey32bit);
-}
-
-ParseStatus AMDGPUAsmParser::tryParseMatrixFMT(OperandVector &Operands,
-                                               StringRef Name,
-                                               AMDGPUOperand::ImmTy Type) {
-  return parseStringOrIntWithPrefix(Operands, Name, WMMAMods::ModMatrixFmt,
-                                    Type);
-}
-
-ParseStatus AMDGPUAsmParser::parseMatrixAFMT(OperandVector &Operands) {
-  return tryParseMatrixFMT(Operands, "matrix_a_fmt",
-                           AMDGPUOperand::ImmTyMatrixAFMT);
-}
-
-ParseStatus AMDGPUAsmParser::parseMatrixBFMT(OperandVector &Operands) {
-  return tryParseMatrixFMT(Operands, "matrix_b_fmt",
-                           AMDGPUOperand::ImmTyMatrixBFMT);
-}
-
-ParseStatus AMDGPUAsmParser::tryParseMatrixScale(OperandVector &Operands,
-                                                 StringRef Name,
-                                                 AMDGPUOperand::ImmTy Type) {
-  return parseStringOrIntWithPrefix(Operands, Name, WMMAMods::ModMatrixScale,
-                                    Type);
-}
-
-ParseStatus AMDGPUAsmParser::parseMatrixAScale(OperandVector &Operands) {
-  return tryParseMatrixScale(Operands, "matrix_a_scale",
-                             AMDGPUOperand::ImmTyMatrixAScale);
-}
-
-ParseStatus AMDGPUAsmParser::parseMatrixBScale(OperandVector &Operands) {
-  return tryParseMatrixScale(Operands, "matrix_b_scale",
-                             AMDGPUOperand::ImmTyMatrixBScale);
-}
-
-ParseStatus AMDGPUAsmParser::tryParseMatrixScaleFmt(OperandVector &Operands,
-                                                    StringRef Name,
-                                                    AMDGPUOperand::ImmTy Type) {
-  return parseStringOrIntWithPrefix(Operands, Name, WMMAMods::ModMatrixScaleFmt,
-                                    Type);
-}
-
-ParseStatus AMDGPUAsmParser::parseMatrixAScaleFmt(OperandVector &Operands) {
-  return tryParseMatrixScaleFmt(Operands, "matrix_a_scale_fmt",
-                                AMDGPUOperand::ImmTyMatrixAScaleFmt);
-}
-
-ParseStatus AMDGPUAsmParser::parseMatrixBScaleFmt(OperandVector &Operands) {
-  return tryParseMatrixScaleFmt(Operands, "matrix_b_scale_fmt",
-                                AMDGPUOperand::ImmTyMatrixBScaleFmt);
-}
-
-// dfmt and nfmt (in a tbuffer instruction) are parsed as one to allow their
-// values to live in a joint format operand in the MCInst encoding.
-ParseStatus AMDGPUAsmParser::parseDfmtNfmt(int64_t &Format) {
-  using namespace llvm::AMDGPU::MTBUFFormat;
-
-  int64_t Dfmt = DFMT_UNDEF;
-  int64_t Nfmt = NFMT_UNDEF;
-
-  // dfmt and nfmt can appear in either order, and each is optional.
-  for (int I = 0; I < 2; ++I) {
-    if (Dfmt == DFMT_UNDEF && !tryParseFmt("dfmt", DFMT_MAX, Dfmt))
-      return ParseStatus::Failure;
-
-    if (Nfmt == NFMT_UNDEF && !tryParseFmt("nfmt", NFMT_MAX, Nfmt))
-      return ParseStatus::Failure;
-
-    // Skip optional comma between dfmt/nfmt
-    // but guard against 2 commas following each other.
-    if ((Dfmt == DFMT_UNDEF) != (Nfmt == NFMT_UNDEF) &&
-        !peekToken().is(AsmToken::Comma)) {
-      trySkipToken(AsmToken::Comma);
-    }
-  }
-
-  if (Dfmt == DFMT_UNDEF && Nfmt == NFMT_UNDEF)
-    return ParseStatus::NoMatch;
-
-  Dfmt = (Dfmt == DFMT_UNDEF) ? DFMT_DEFAULT : Dfmt;
-  Nfmt = (Nfmt == NFMT_UNDEF) ? NFMT_DEFAULT : Nfmt;
-
-  Format = encodeDfmtNfmt(Dfmt, Nfmt);
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseUfmt(int64_t &Format) {
-  using namespace llvm::AMDGPU::MTBUFFormat;
-
-  int64_t Fmt = UFMT_UNDEF;
-
-  if (!tryParseFmt("format", UFMT_MAX, Fmt))
-    return ParseStatus::Failure;
-
-  if (Fmt == UFMT_UNDEF)
-    return ParseStatus::NoMatch;
-
-  Format = Fmt;
-  return ParseStatus::Success;
-}
-
-bool AMDGPUAsmParser::matchDfmtNfmt(int64_t &Dfmt,
-                                    int64_t &Nfmt,
-                                    StringRef FormatStr,
-                                    SMLoc Loc) {
-  using namespace llvm::AMDGPU::MTBUFFormat;
-  int64_t Format;
-
-  Format = getDfmt(FormatStr);
-  if (Format != DFMT_UNDEF) {
-    Dfmt = Format;
-    return true;
-  }
-
-  Format = getNfmt(FormatStr, getSTI());
-  if (Format != NFMT_UNDEF) {
-    Nfmt = Format;
-    return true;
-  }
-
-  Error(Loc, "unsupported format");
-  return false;
-}
-
-ParseStatus AMDGPUAsmParser::parseSymbolicSplitFormat(StringRef FormatStr,
-                                                      SMLoc FormatLoc,
-                                                      int64_t &Format) {
-  using namespace llvm::AMDGPU::MTBUFFormat;
-
-  int64_t Dfmt = DFMT_UNDEF;
-  int64_t Nfmt = NFMT_UNDEF;
-  if (!matchDfmtNfmt(Dfmt, Nfmt, FormatStr, FormatLoc))
-    return ParseStatus::Failure;
-
-  if (trySkipToken(AsmToken::Comma)) {
-    StringRef Str;
-    SMLoc Loc = getLoc();
-    if (!parseId(Str, "expected a format string") ||
-        !matchDfmtNfmt(Dfmt, Nfmt, Str, Loc))
-      return ParseStatus::Failure;
-    if (Dfmt == DFMT_UNDEF)
-      return Error(Loc, "duplicate numeric format");
-    if (Nfmt == NFMT_UNDEF)
-      return Error(Loc, "duplicate data format");
-  }
-
-  Dfmt = (Dfmt == DFMT_UNDEF) ? DFMT_DEFAULT : Dfmt;
-  Nfmt = (Nfmt == NFMT_UNDEF) ? NFMT_DEFAULT : Nfmt;
-
-  if (isGFX10Plus()) {
-    auto Ufmt = convertDfmtNfmt2Ufmt(Dfmt, Nfmt, getSTI());
-    if (Ufmt == UFMT_UNDEF)
-      return Error(FormatLoc, "unsupported format");
-    Format = Ufmt;
-  } else {
-    Format = encodeDfmtNfmt(Dfmt, Nfmt);
-  }
-
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseSymbolicUnifiedFormat(StringRef FormatStr,
-                                                        SMLoc Loc,
-                                                        int64_t &Format) {
-  using namespace llvm::AMDGPU::MTBUFFormat;
-
-  auto Id = getUnifiedFormat(FormatStr, getSTI());
-  if (Id == UFMT_UNDEF)
-    return ParseStatus::NoMatch;
-
-  if (!isGFX10Plus())
-    return Error(Loc, "unified format is not supported on this GPU");
-
-  Format = Id;
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseNumericFormat(int64_t &Format) {
-  using namespace llvm::AMDGPU::MTBUFFormat;
-  SMLoc Loc = getLoc();
-
-  if (!parseExpr(Format))
-    return ParseStatus::Failure;
-  if (!isValidFormatEncoding(Format, getSTI()))
-    return Error(Loc, "out of range format");
-
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseSymbolicOrNumericFormat(int64_t &Format) {
-  using namespace llvm::AMDGPU::MTBUFFormat;
-
-  if (!trySkipId("format", AsmToken::Colon))
-    return ParseStatus::NoMatch;
-
-  if (trySkipToken(AsmToken::LBrac)) {
-    StringRef FormatStr;
-    SMLoc Loc = getLoc();
-    if (!parseId(FormatStr, "expected a format string"))
-      return ParseStatus::Failure;
-
-    auto Res = parseSymbolicUnifiedFormat(FormatStr, Loc, Format);
-    if (Res.isNoMatch())
-      Res = parseSymbolicSplitFormat(FormatStr, Loc, Format);
-    if (!Res.isSuccess())
-      return Res;
-
-    if (!skipToken(AsmToken::RBrac, "expected a closing square bracket"))
-      return ParseStatus::Failure;
-
-    return ParseStatus::Success;
-  }
-
-  return parseNumericFormat(Format);
-}
-
-ParseStatus AMDGPUAsmParser::parseFORMAT(OperandVector &Operands) {
-  using namespace llvm::AMDGPU::MTBUFFormat;
-
-  int64_t Format = getDefaultFormatEncoding(getSTI());
-  ParseStatus Res;
-  SMLoc Loc = getLoc();
-
-  // Parse legacy format syntax.
-  Res = isGFX10Plus() ? parseUfmt(Format) : parseDfmtNfmt(Format);
-  if (Res.isFailure())
-    return Res;
-
-  bool FormatFound = Res.isSuccess();
-
-  Operands.push_back(
-    AMDGPUOperand::CreateImm(this, Format, Loc, AMDGPUOperand::ImmTyFORMAT));
-
-  if (FormatFound)
-    trySkipToken(AsmToken::Comma);
-
-  if (isToken(AsmToken::EndOfStatement)) {
-    // We are expecting an soffset operand,
-    // but let matcher handle the error.
-    return ParseStatus::Success;
-  }
-
-  // Parse soffset.
-  Res = parseRegOrImm(Operands);
-  if (!Res.isSuccess())
-    return Res;
-
-  trySkipToken(AsmToken::Comma);
-
-  if (!FormatFound) {
-    Res = parseSymbolicOrNumericFormat(Format);
-    if (Res.isFailure())
-      return Res;
-    if (Res.isSuccess()) {
-      auto Size = Operands.size();
-      AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands[Size - 2]);
-      assert(Op.isImm() && Op.getImmTy() == AMDGPUOperand::ImmTyFORMAT);
-      Op.setImm(Format);
-    }
-    return ParseStatus::Success;
-  }
-
-  if (isId("format") && peekToken().is(AsmToken::Colon))
-    return Error(getLoc(), "duplicate format");
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseFlatOffset(OperandVector &Operands) {
-  ParseStatus Res =
-      parseIntWithPrefix("offset", Operands, AMDGPUOperand::ImmTyOffset);
-  if (Res.isNoMatch()) {
-    Res = parseIntWithPrefix("inst_offset", Operands,
-                             AMDGPUOperand::ImmTyInstOffset);
-  }
-  return Res;
-}
-
-ParseStatus AMDGPUAsmParser::parseR128A16(OperandVector &Operands) {
-  ParseStatus Res =
-      parseNamedBit("r128", Operands, AMDGPUOperand::ImmTyR128A16);
-  if (Res.isNoMatch())
-    Res = parseNamedBit("a16", Operands, AMDGPUOperand::ImmTyA16);
-  return Res;
-}
-
-ParseStatus AMDGPUAsmParser::parseBLGP(OperandVector &Operands) {
-  ParseStatus Res =
-      parseIntWithPrefix("blgp", Operands, AMDGPUOperand::ImmTyBLGP);
-  if (Res.isNoMatch()) {
-    Res =
-        parseOperandArrayWithPrefix("neg", Operands, AMDGPUOperand::ImmTyBLGP);
-  }
-  return Res;
-}
-
-//===----------------------------------------------------------------------===//
-// Exp
-//===----------------------------------------------------------------------===//
-
-void AMDGPUAsmParser::cvtExp(MCInst &Inst, const OperandVector &Operands) {
-  OptionalImmIndexMap OptionalIdx;
-
-  unsigned OperandIdx[4];
-  unsigned EnMask = 0;
-  int SrcIdx = 0;
-
-  for (unsigned i = 1, e = Operands.size(); i != e; ++i) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
-
-    // Add the register arguments
-    if (Op.isReg()) {
-      assert(SrcIdx < 4);
-      OperandIdx[SrcIdx] = Inst.size();
-      Op.addRegOperands(Inst, 1);
-      ++SrcIdx;
-      continue;
-    }
-
-    if (Op.isOff()) {
-      assert(SrcIdx < 4);
-      OperandIdx[SrcIdx] = Inst.size();
-      Inst.addOperand(MCOperand::createReg(MCRegister()));
-      ++SrcIdx;
-      continue;
-    }
-
-    if (Op.isImm() && Op.getImmTy() == AMDGPUOperand::ImmTyExpTgt) {
-      Op.addImmOperands(Inst, 1);
-      continue;
-    }
-
-    if (Op.isToken() && (Op.getToken() == "done" || Op.getToken() == "row_en"))
-      continue;
-
-    // Handle optional arguments
-    OptionalIdx[Op.getImmTy()] = i;
-  }
-
-  assert(SrcIdx == 4);
-
-  bool Compr = false;
-  if (OptionalIdx.find(AMDGPUOperand::ImmTyExpCompr) != OptionalIdx.end()) {
-    Compr = true;
-    Inst.getOperand(OperandIdx[1]) = Inst.getOperand(OperandIdx[2]);
-    Inst.getOperand(OperandIdx[2]).setReg(MCRegister());
-    Inst.getOperand(OperandIdx[3]).setReg(MCRegister());
-  }
-
-  for (auto i = 0; i < SrcIdx; ++i) {
-    if (Inst.getOperand(OperandIdx[i]).getReg()) {
-      EnMask |= Compr? (0x3 << i * 2) : (0x1 << i);
-    }
-  }
-
-  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyExpVM);
-  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyExpCompr);
-
-  Inst.addOperand(MCOperand::createImm(EnMask));
-}
-
-//===----------------------------------------------------------------------===//
-// s_waitcnt
-//===----------------------------------------------------------------------===//
-
-static bool
-encodeCnt(
-  const AMDGPU::IsaVersion ISA,
-  int64_t &IntVal,
-  int64_t CntVal,
-  bool Saturate,
-  unsigned (*encode)(const IsaVersion &Version, unsigned, unsigned),
-  unsigned (*decode)(const IsaVersion &Version, unsigned))
-{
-  bool Failed = false;
-
-  IntVal = encode(ISA, IntVal, CntVal);
-  if (CntVal != decode(ISA, IntVal)) {
-    if (Saturate) {
-      IntVal = encode(ISA, IntVal, -1);
-    } else {
-      Failed = true;
-    }
-  }
-  return Failed;
-}
-
-bool AMDGPUAsmParser::parseCnt(int64_t &IntVal) {
-
-  SMLoc CntLoc = getLoc();
-  StringRef CntName = getTokenStr();
-
-  if (!skipToken(AsmToken::Identifier, "expected a counter name") ||
-      !skipToken(AsmToken::LParen, "expected a left parenthesis"))
-    return false;
-
-  int64_t CntVal;
-  SMLoc ValLoc = getLoc();
-  if (!parseExpr(CntVal))
-    return false;
-
-  AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU());
-
-  bool Failed = true;
-  bool Sat = CntName.ends_with("_sat");
-
-  if (CntName == "vmcnt" || CntName == "vmcnt_sat") {
-    Failed = encodeCnt(ISA, IntVal, CntVal, Sat, encodeVmcnt, decodeVmcnt);
-  } else if (CntName == "expcnt" || CntName == "expcnt_sat") {
-    Failed = encodeCnt(ISA, IntVal, CntVal, Sat, encodeExpcnt, decodeExpcnt);
-  } else if (CntName == "lgkmcnt" || CntName == "lgkmcnt_sat") {
-    Failed = encodeCnt(ISA, IntVal, CntVal, Sat, encodeLgkmcnt, decodeLgkmcnt);
-  } else {
-    Error(CntLoc, "invalid counter name " + CntName);
-    return false;
-  }
-
-  if (Failed) {
-    Error(ValLoc, "too large value for " + CntName);
-    return false;
-  }
-
-  if (!skipToken(AsmToken::RParen, "expected a closing parenthesis"))
-    return false;
-
-  if (trySkipToken(AsmToken::Amp) || trySkipToken(AsmToken::Comma)) {
-    if (isToken(AsmToken::EndOfStatement)) {
-      Error(getLoc(), "expected a counter name");
-      return false;
-    }
-  }
-
-  return true;
-}
-
-ParseStatus AMDGPUAsmParser::parseSWaitCnt(OperandVector &Operands) {
-  AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU());
-  int64_t Waitcnt = getWaitcntBitMask(ISA);
-  SMLoc S = getLoc();
-
-  if (isToken(AsmToken::Identifier) && peekToken().is(AsmToken::LParen)) {
-    while (!isToken(AsmToken::EndOfStatement)) {
-      if (!parseCnt(Waitcnt))
-        return ParseStatus::Failure;
-    }
-  } else {
-    if (!parseExpr(Waitcnt))
-      return ParseStatus::Failure;
-  }
-
-  Operands.push_back(AMDGPUOperand::CreateImm(this, Waitcnt, S));
-  return ParseStatus::Success;
-}
-
-bool AMDGPUAsmParser::parseDelay(int64_t &Delay) {
-  SMLoc FieldLoc = getLoc();
-  StringRef FieldName = getTokenStr();
-  if (!skipToken(AsmToken::Identifier, "expected a field name") ||
-      !skipToken(AsmToken::LParen, "expected a left parenthesis"))
-    return false;
-
-  SMLoc ValueLoc = getLoc();
-  StringRef ValueName = getTokenStr();
-  if (!skipToken(AsmToken::Identifier, "expected a value name") ||
-      !skipToken(AsmToken::RParen, "expected a right parenthesis"))
-    return false;
-
-  unsigned Shift;
-  if (FieldName == "instid0") {
-    Shift = 0;
-  } else if (FieldName == "instskip") {
-    Shift = 4;
-  } else if (FieldName == "instid1") {
-    Shift = 7;
-  } else {
-    Error(FieldLoc, "invalid field name " + FieldName);
-    return false;
-  }
-
-  int Value;
-  if (Shift == 4) {
-    // Parse values for instskip.
-    Value = StringSwitch<int>(ValueName)
-                .Case("SAME", 0)
-                .Case("NEXT", 1)
-                .Case("SKIP_1", 2)
-                .Case("SKIP_2", 3)
-                .Case("SKIP_3", 4)
-                .Case("SKIP_4", 5)
-                .Default(-1);
-  } else {
-    // Parse values for instid0 and instid1.
-    Value = StringSwitch<int>(ValueName)
-                .Case("NO_DEP", 0)
-                .Case("VALU_DEP_1", 1)
-                .Case("VALU_DEP_2", 2)
-                .Case("VALU_DEP_3", 3)
-                .Case("VALU_DEP_4", 4)
-                .Case("TRANS32_DEP_1", 5)
-                .Case("TRANS32_DEP_2", 6)
-                .Case("TRANS32_DEP_3", 7)
-                .Case("FMA_ACCUM_CYCLE_1", 8)
-                .Case("SALU_CYCLE_1", 9)
-                .Case("SALU_CYCLE_2", 10)
-                .Case("SALU_CYCLE_3", 11)
-                .Default(-1);
-  }
-  if (Value < 0) {
-    Error(ValueLoc, "invalid value name " + ValueName);
-    return false;
-  }
-
-  Delay |= Value << Shift;
-  return true;
-}
-
-ParseStatus AMDGPUAsmParser::parseSDelayALU(OperandVector &Operands) {
-  int64_t Delay = 0;
-  SMLoc S = getLoc();
-
-  if (isToken(AsmToken::Identifier) && peekToken().is(AsmToken::LParen)) {
-    do {
-      if (!parseDelay(Delay))
-        return ParseStatus::Failure;
-    } while (trySkipToken(AsmToken::Pipe));
-  } else {
-    if (!parseExpr(Delay))
-      return ParseStatus::Failure;
-  }
-
-  Operands.push_back(AMDGPUOperand::CreateImm(this, Delay, S));
-  return ParseStatus::Success;
-}
-
-bool
-AMDGPUOperand::isSWaitCnt() const {
-  return isImm();
-}
-
-bool AMDGPUOperand::isSDelayALU() const { return isImm(); }
-
-//===----------------------------------------------------------------------===//
-// DepCtr
-//===----------------------------------------------------------------------===//
-
-void AMDGPUAsmParser::depCtrError(SMLoc Loc, int ErrorId,
-                                  StringRef DepCtrName) {
-  switch (ErrorId) {
-  case OPR_ID_UNKNOWN:
-    Error(Loc, Twine("invalid counter name ", DepCtrName));
-    return;
-  case OPR_ID_UNSUPPORTED:
-    Error(Loc, Twine(DepCtrName, " is not supported on this GPU"));
-    return;
-  case OPR_ID_DUPLICATE:
-    Error(Loc, Twine("duplicate counter name ", DepCtrName));
-    return;
-  case OPR_VAL_INVALID:
-    Error(Loc, Twine("invalid value for ", DepCtrName));
-    return;
-  default:
-    assert(false);
-  }
-}
-
-bool AMDGPUAsmParser::parseDepCtr(int64_t &DepCtr, unsigned &UsedOprMask) {
-
-  using namespace llvm::AMDGPU::DepCtr;
-
-  SMLoc DepCtrLoc = getLoc();
-  StringRef DepCtrName = getTokenStr();
-
-  if (!skipToken(AsmToken::Identifier, "expected a counter name") ||
-      !skipToken(AsmToken::LParen, "expected a left parenthesis"))
-    return false;
-
-  int64_t ExprVal;
-  if (!parseExpr(ExprVal))
-    return false;
-
-  unsigned PrevOprMask = UsedOprMask;
-  int CntVal = encodeDepCtr(DepCtrName, ExprVal, UsedOprMask, getSTI());
-
-  if (CntVal < 0) {
-    depCtrError(DepCtrLoc, CntVal, DepCtrName);
-    return false;
-  }
-
-  if (!skipToken(AsmToken::RParen, "expected a closing parenthesis"))
-    return false;
-
-  if (trySkipToken(AsmToken::Amp) || trySkipToken(AsmToken::Comma)) {
-    if (isToken(AsmToken::EndOfStatement)) {
-      Error(getLoc(), "expected a counter name");
-      return false;
-    }
-  }
-
-  unsigned CntValMask = PrevOprMask ^ UsedOprMask;
-  DepCtr = (DepCtr & ~CntValMask) | CntVal;
-  return true;
-}
-
-ParseStatus AMDGPUAsmParser::parseDepCtr(OperandVector &Operands) {
-  using namespace llvm::AMDGPU::DepCtr;
-
-  int64_t DepCtr = getDefaultDepCtrEncoding(getSTI());
-  SMLoc Loc = getLoc();
-
-  if (isToken(AsmToken::Identifier) && peekToken().is(AsmToken::LParen)) {
-    unsigned UsedOprMask = 0;
-    while (!isToken(AsmToken::EndOfStatement)) {
-      if (!parseDepCtr(DepCtr, UsedOprMask))
-        return ParseStatus::Failure;
-    }
-  } else {
-    if (!parseExpr(DepCtr))
-      return ParseStatus::Failure;
-  }
-
-  Operands.push_back(AMDGPUOperand::CreateImm(this, DepCtr, Loc));
-  return ParseStatus::Success;
-}
-
-bool AMDGPUOperand::isDepCtr() const { return isS16Imm(); }
-
-//===----------------------------------------------------------------------===//
-// hwreg
-//===----------------------------------------------------------------------===//
-
-ParseStatus AMDGPUAsmParser::parseHwregFunc(OperandInfoTy &HwReg,
-                                            OperandInfoTy &Offset,
-                                            OperandInfoTy &Width) {
-  using namespace llvm::AMDGPU::Hwreg;
-
-  if (!trySkipId("hwreg", AsmToken::LParen))
-    return ParseStatus::NoMatch;
-
-  // The register may be specified by name or using a numeric code
-  HwReg.Loc = getLoc();
-  if (isToken(AsmToken::Identifier) &&
-      (HwReg.Val = getHwregId(getTokenStr(), getSTI())) != OPR_ID_UNKNOWN) {
-    HwReg.IsSymbolic = true;
-    lex(); // skip register name
-  } else if (!parseExpr(HwReg.Val, "a register name")) {
-    return ParseStatus::Failure;
-  }
-
-  if (trySkipToken(AsmToken::RParen))
-    return ParseStatus::Success;
-
-  // parse optional params
-  if (!skipToken(AsmToken::Comma, "expected a comma or a closing parenthesis"))
-    return ParseStatus::Failure;
-
-  Offset.Loc = getLoc();
-  if (!parseExpr(Offset.Val))
-    return ParseStatus::Failure;
-
-  if (!skipToken(AsmToken::Comma, "expected a comma"))
-    return ParseStatus::Failure;
-
-  Width.Loc = getLoc();
-  if (!parseExpr(Width.Val) ||
-      !skipToken(AsmToken::RParen, "expected a closing parenthesis"))
-    return ParseStatus::Failure;
-
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseHwreg(OperandVector &Operands) {
-  using namespace llvm::AMDGPU::Hwreg;
-
-  int64_t ImmVal = 0;
-  SMLoc Loc = getLoc();
-
-  StructuredOpField HwReg("id", "hardware register", HwregId::Width,
-                          HwregId::Default);
-  StructuredOpField Offset("offset", "bit offset", HwregOffset::Width,
-                           HwregOffset::Default);
-  struct : StructuredOpField {
-    using StructuredOpField::StructuredOpField;
-    bool validate(AMDGPUAsmParser &Parser) const override {
-      if (!isUIntN(Width, Val - 1))
-        return Error(Parser, "only values from 1 to 32 are legal");
-      return true;
-    }
-  } Width("size", "bitfield width", HwregSize::Width, HwregSize::Default);
-  ParseStatus Res = parseStructuredOpFields({&HwReg, &Offset, &Width});
-
-  if (Res.isNoMatch())
-    Res = parseHwregFunc(HwReg, Offset, Width);
-
-  if (Res.isSuccess()) {
-    if (!validateStructuredOpFields({&HwReg, &Offset, &Width}))
-      return ParseStatus::Failure;
-    ImmVal = HwregEncoding::encode(HwReg.Val, Offset.Val, Width.Val);
-  }
-
-  if (Res.isNoMatch() &&
-      parseExpr(ImmVal, "a hwreg macro, structured immediate"))
-    Res = ParseStatus::Success;
-
-  if (!Res.isSuccess())
-    return ParseStatus::Failure;
-
-  if (!isUInt<16>(ImmVal))
-    return Error(Loc, "invalid immediate: only 16-bit values are legal");
-  Operands.push_back(
-      AMDGPUOperand::CreateImm(this, ImmVal, Loc, AMDGPUOperand::ImmTyHwreg));
-  return ParseStatus::Success;
-}
-
-bool AMDGPUOperand::isHwreg() const {
-  return isImmTy(ImmTyHwreg);
-}
-
-//===----------------------------------------------------------------------===//
-// sendmsg
-//===----------------------------------------------------------------------===//
-
-bool
-AMDGPUAsmParser::parseSendMsgBody(OperandInfoTy &Msg,
-                                  OperandInfoTy &Op,
-                                  OperandInfoTy &Stream) {
-  using namespace llvm::AMDGPU::SendMsg;
-
-  Msg.Loc = getLoc();
-  if (isToken(AsmToken::Identifier) &&
-      (Msg.Val = getMsgId(getTokenStr(), getSTI())) != OPR_ID_UNKNOWN) {
-    Msg.IsSymbolic = true;
-    lex(); // skip message name
-  } else if (!parseExpr(Msg.Val, "a message name")) {
-    return false;
-  }
-
-  if (trySkipToken(AsmToken::Comma)) {
-    Op.IsDefined = true;
-    Op.Loc = getLoc();
-    if (isToken(AsmToken::Identifier) &&
-        (Op.Val = getMsgOpId(Msg.Val, getTokenStr(), getSTI())) !=
-            OPR_ID_UNKNOWN) {
-      lex(); // skip operation name
-    } else if (!parseExpr(Op.Val, "an operation name")) {
-      return false;
-    }
-
-    if (trySkipToken(AsmToken::Comma)) {
-      Stream.IsDefined = true;
-      Stream.Loc = getLoc();
-      if (!parseExpr(Stream.Val))
-        return false;
-    }
-  }
-
-  return skipToken(AsmToken::RParen, "expected a closing parenthesis");
-}
-
-bool
-AMDGPUAsmParser::validateSendMsg(const OperandInfoTy &Msg,
-                                 const OperandInfoTy &Op,
-                                 const OperandInfoTy &Stream) {
-  using namespace llvm::AMDGPU::SendMsg;
-
-  // Validation strictness depends on whether message is specified
-  // in a symbolic or in a numeric form. In the latter case
-  // only encoding possibility is checked.
-  bool Strict = Msg.IsSymbolic;
-
-  if (Strict) {
-    if (Msg.Val == OPR_ID_UNSUPPORTED) {
-      Error(Msg.Loc, "specified message id is not supported on this GPU");
-      return false;
-    }
-  } else {
-    if (!isValidMsgId(Msg.Val, getSTI())) {
-      Error(Msg.Loc, "invalid message id");
-      return false;
-    }
-  }
-  if (Strict && (msgRequiresOp(Msg.Val, getSTI()) != Op.IsDefined)) {
-    if (Op.IsDefined) {
-      Error(Op.Loc, "message does not support operations");
-    } else {
-      Error(Msg.Loc, "missing message operation");
-    }
-    return false;
-  }
-  if (!isValidMsgOp(Msg.Val, Op.Val, getSTI(), Strict)) {
-    if (Op.Val == OPR_ID_UNSUPPORTED)
-      Error(Op.Loc, "specified operation id is not supported on this GPU");
-    else
-      Error(Op.Loc, "invalid operation id");
-    return false;
-  }
-  if (Strict && !msgSupportsStream(Msg.Val, Op.Val, getSTI()) &&
-      Stream.IsDefined) {
-    Error(Stream.Loc, "message operation does not support streams");
-    return false;
-  }
-  if (!isValidMsgStream(Msg.Val, Op.Val, Stream.Val, getSTI(), Strict)) {
-    Error(Stream.Loc, "invalid message stream id");
-    return false;
-  }
-  return true;
-}
-
-ParseStatus AMDGPUAsmParser::parseSendMsg(OperandVector &Operands) {
-  using namespace llvm::AMDGPU::SendMsg;
-
-  int64_t ImmVal = 0;
-  SMLoc Loc = getLoc();
-
-  if (trySkipId("sendmsg", AsmToken::LParen)) {
-    OperandInfoTy Msg(OPR_ID_UNKNOWN);
-    OperandInfoTy Op(OP_NONE_);
-    OperandInfoTy Stream(STREAM_ID_NONE_);
-    if (parseSendMsgBody(Msg, Op, Stream) &&
-        validateSendMsg(Msg, Op, Stream)) {
-      ImmVal = encodeMsg(Msg.Val, Op.Val, Stream.Val);
-    } else {
-      return ParseStatus::Failure;
-    }
-  } else if (parseExpr(ImmVal, "a sendmsg macro")) {
-    if (ImmVal < 0 || !isUInt<16>(ImmVal))
-      return Error(Loc, "invalid immediate: only 16-bit values are legal");
-  } else {
-    return ParseStatus::Failure;
-  }
-
-  Operands.push_back(AMDGPUOperand::CreateImm(this, ImmVal, Loc, AMDGPUOperand::ImmTySendMsg));
-  return ParseStatus::Success;
-}
-
-bool AMDGPUOperand::isSendMsg() const {
-  return isImmTy(ImmTySendMsg);
-}
-
-ParseStatus AMDGPUAsmParser::parseWaitEvent(OperandVector &Operands) {
-  using namespace llvm::AMDGPU::WaitEvent;
-
-  SMLoc Loc = getLoc();
-  int64_t ImmVal = 0;
-
-  StructuredOpField DontWaitExportReady("dont_wait_export_ready", "bit value",
-                                        1, 0);
-  StructuredOpField ExportReady("export_ready", "bit value", 1, 0);
-
-  StructuredOpField *TargetBitfield =
-      isGFX11() ? &DontWaitExportReady : &ExportReady;
-
-  ParseStatus Res = parseStructuredOpFields({TargetBitfield});
-  if (Res.isNoMatch() && parseExpr(ImmVal, "structured immediate"))
-    Res = ParseStatus::Success;
-  else if (Res.isSuccess()) {
-    if (!validateStructuredOpFields({TargetBitfield}))
-      return ParseStatus::Failure;
-    ImmVal = TargetBitfield->Val;
-  }
-
-  if (!Res.isSuccess())
-    return ParseStatus::Failure;
-
-  if (!isUInt<16>(ImmVal))
-    return Error(Loc, "invalid immediate: only 16-bit values are legal");
-
-  Operands.push_back(AMDGPUOperand::CreateImm(this, ImmVal, Loc,
-                                              AMDGPUOperand::ImmTyWaitEvent));
-  return ParseStatus::Success;
-}
-
-bool AMDGPUOperand::isWaitEvent() const { return isImmTy(ImmTyWaitEvent); }
-
-//===----------------------------------------------------------------------===//
-// v_interp
-//===----------------------------------------------------------------------===//
-
-ParseStatus AMDGPUAsmParser::parseInterpSlot(OperandVector &Operands) {
-  StringRef Str;
-  SMLoc S = getLoc();
-
-  if (!parseId(Str))
-    return ParseStatus::NoMatch;
-
-  int Slot = StringSwitch<int>(Str)
-    .Case("p10", 0)
-    .Case("p20", 1)
-    .Case("p0", 2)
-    .Default(-1);
-
-  if (Slot == -1)
-    return Error(S, "invalid interpolation slot");
-
-  Operands.push_back(AMDGPUOperand::CreateImm(this, Slot, S,
-                                              AMDGPUOperand::ImmTyInterpSlot));
-  return ParseStatus::Success;
-}
-
-ParseStatus AMDGPUAsmParser::parseInterpAttr(OperandVector &Operands) {
-  StringRef Str;
-  SMLoc S = getLoc();
-
-  if (!parseId(Str))
-    return ParseStatus::NoMatch;
-
-  if (!Str.starts_with("attr"))
-    return Error(S, "invalid interpolation attribute");
-
-  StringRef Chan = Str.take_back(2);
-  int AttrChan = StringSwitch<int>(Chan)
-    .Case(".x", 0)
-    .Case(".y", 1)
-    .Case(".z", 2)
-    .Case(".w", 3)
-    .Default(-1);
-  if (AttrChan == -1)
-    return Error(S, "invalid or missing interpolation attribute channel");
-
-  Str = Str.drop_back(2).drop_front(4);
-
-  uint8_t Attr;
-  if (Str.getAsInteger(10, Attr))
-    return Error(S, "invalid or missing interpolation attribute number");
-
-  if (Attr > 32)
-    return Error(S, "out of bounds interpolation attribute number");
-
-  SMLoc SChan = SMLoc::getFromPointer(Chan.data());
-
-  Operands.push_back(AMDGPUOperand::CreateImm(this, Attr, S,
-                                              AMDGPUOperand::ImmTyInterpAttr));
-  Operands.push_back(AMDGPUOperand::CreateImm(
-      this, AttrChan, SChan, AMDGPUOperand::ImmTyInterpAttrChan));
-  return ParseStatus::Success;
-}
-
-//===----------------------------------------------------------------------===//
-// exp
-//===----------------------------------------------------------------------===//
-
-ParseStatus AMDGPUAsmParser::parseExpTgt(OperandVector &Operands) {
-  using namespace llvm::AMDGPU::Exp;
-
-  StringRef Str;
-  SMLoc S = getLoc();
-
-  if (!parseId(Str))
-    return ParseStatus::NoMatch;
-
-  unsigned Id = getTgtId(Str);
-  if (Id == ET_INVALID || !isSupportedTgtId(Id, getSTI()))
-    return Error(S, (Id == ET_INVALID)
-                        ? "invalid exp target"
-                        : "exp target is not supported on this GPU");
-
-  Operands.push_back(AMDGPUOperand::CreateImm(this, Id, S,
-                                              AMDGPUOperand::ImmTyExpTgt));
-  return ParseStatus::Success;
-}
-
-//===----------------------------------------------------------------------===//
-// parser helpers
-//===----------------------------------------------------------------------===//
-
-bool
-AMDGPUAsmParser::isId(const AsmToken &Token, const StringRef Id) const {
-  return Token.is(AsmToken::Identifier) && Token.getString() == Id;
-}
-
-bool
-AMDGPUAsmParser::isId(const StringRef Id) const {
-  return isId(getToken(), Id);
-}
-
-bool
-AMDGPUAsmParser::isToken(const AsmToken::TokenKind Kind) const {
-  return getTokenKind() == Kind;
-}
-
-StringRef AMDGPUAsmParser::getId() const {
-  return isToken(AsmToken::Identifier) ? getTokenStr() : StringRef();
-}
-
-bool
-AMDGPUAsmParser::trySkipId(const StringRef Id) {
-  if (isId(Id)) {
-    lex();
-    return true;
-  }
-  return false;
-}
-
-bool
-AMDGPUAsmParser::trySkipId(const StringRef Pref, const StringRef Id) {
-  if (isToken(AsmToken::Identifier)) {
-    StringRef Tok = getTokenStr();
-    if (Tok.starts_with(Pref) && Tok.drop_front(Pref.size()) == Id) {
-      lex();
-      return true;
-    }
-  }
-  return false;
-}
-
-bool
-AMDGPUAsmParser::trySkipId(const StringRef Id, const AsmToken::TokenKind Kind) {
-  if (isId(Id) && peekToken().is(Kind)) {
-    lex();
-    lex();
-    return true;
-  }
-  return false;
-}
-
-bool
-AMDGPUAsmParser::trySkipToken(const AsmToken::TokenKind Kind) {
-  if (isToken(Kind)) {
-    lex();
-    return true;
-  }
-  return false;
-}
-
-bool
-AMDGPUAsmParser::skipToken(const AsmToken::TokenKind Kind,
-                           const StringRef ErrMsg) {
-  if (!trySkipToken(Kind)) {
-    Error(getLoc(), ErrMsg);
-    return false;
-  }
-  return true;
-}
-
-bool
-AMDGPUAsmParser::parseExpr(int64_t &Imm, StringRef Expected) {
-  SMLoc S = getLoc();
-
-  const MCExpr *Expr;
-  if (Parser.parseExpression(Expr))
-    return false;
-
-  if (Expr->evaluateAsAbsolute(Imm))
-    return true;
-
-  if (Expected.empty()) {
-    Error(S, "expected absolute expression");
-  } else {
-    Error(S, Twine("expected ", Expected) +
-             Twine(" or an absolute expression"));
-  }
-  return false;
-}
-
-bool
-AMDGPUAsmParser::parseExpr(OperandVector &Operands) {
-  SMLoc S = getLoc();
-
-  const MCExpr *Expr;
-  if (Parser.parseExpression(Expr))
-    return false;
-
-  int64_t IntVal;
-  if (Expr->evaluateAsAbsolute(IntVal)) {
-    Operands.push_back(AMDGPUOperand::CreateImm(this, IntVal, S));
-  } else {
-    Operands.push_back(AMDGPUOperand::CreateExpr(this, Expr, S));
-  }
-  return true;
-}
-
-bool
-AMDGPUAsmParser::parseString(StringRef &Val, const StringRef ErrMsg) {
-  if (isToken(AsmToken::String)) {
-    Val = getToken().getStringContents();
-    lex();
-    return true;
-  }
-  Error(getLoc(), ErrMsg);
-  return false;
-}
-
-bool
-AMDGPUAsmParser::parseId(StringRef &Val, const StringRef ErrMsg) {
-  if (isToken(AsmToken::Identifier)) {
-    Val = getTokenStr();
-    lex();
-    return true;
-  }
-  if (!ErrMsg.empty())
-    Error(getLoc(), ErrMsg);
-  return false;
-}
-
-AsmToken
-AMDGPUAsmParser::getToken() const {
-  return Parser.getTok();
-}
-
-AsmToken AMDGPUAsmParser::peekToken(bool ShouldSkipSpace) {
-  return isToken(AsmToken::EndOfStatement)
-             ? getToken()
-             : getLexer().peekTok(ShouldSkipSpace);
-}
-
-void
-AMDGPUAsmParser::peekTokens(MutableArrayRef<AsmToken> Tokens) {
-  auto TokCount = getLexer().peekTokens(Tokens);
-
-  for (auto Idx = TokCount; Idx < Tokens.size(); ++Idx)
-    Tokens[Idx] = AsmToken(AsmToken::Error, "");
-}
-
-AsmToken::TokenKind
-AMDGPUAsmParser::getTokenKind() const {
-  return getLexer().getKind();
-}
-
-SMLoc
-AMDGPUAsmParser::getLoc() const {
-  return getToken().getLoc();
-}
-
-StringRef
-AMDGPUAsmParser::getTokenStr() const {
-  return getToken().getString();
-}
-
-void
-AMDGPUAsmParser::lex() {
-  Parser.Lex();
-}
-
-SMLoc AMDGPUAsmParser::getInstLoc(const OperandVector &Operands) const {
-  return ((AMDGPUOperand &)*Operands[0]).getStartLoc();
-}
-
-// Returns one of the given locations that comes later in the source.
-SMLoc AMDGPUAsmParser::getLaterLoc(SMLoc a, SMLoc b) {
-  return a.getPointer() < b.getPointer() ? b : a;
-}
-
-SMLoc AMDGPUAsmParser::getOperandLoc(const OperandVector &Operands,
-                                     int MCOpIdx) const {
-  for (const auto &Op : Operands) {
-    const auto TargetOp = static_cast<AMDGPUOperand &>(*Op);
-    if (TargetOp.getMCOpIdx() == MCOpIdx)
-      return TargetOp.getStartLoc();
-  }
-  llvm_unreachable("No such MC operand!");
-}
-
-SMLoc
-AMDGPUAsmParser::getOperandLoc(std::function<bool(const AMDGPUOperand&)> Test,
-                               const OperandVector &Operands) const {
-  for (unsigned i = Operands.size() - 1; i > 0; --i) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
-    if (Test(Op))
-      return Op.getStartLoc();
-  }
-  return getInstLoc(Operands);
-}
-
-SMLoc
-AMDGPUAsmParser::getImmLoc(AMDGPUOperand::ImmTy Type,
-                           const OperandVector &Operands) const {
-  auto Test = [=](const AMDGPUOperand& Op) { return Op.isImmTy(Type); };
-  return getOperandLoc(Test, Operands);
-}
-
-ParseStatus
-AMDGPUAsmParser::parseStructuredOpFields(ArrayRef<StructuredOpField *> Fields) {
-  if (!trySkipToken(AsmToken::LCurly))
-    return ParseStatus::NoMatch;
-
-  bool First = true;
-  while (!trySkipToken(AsmToken::RCurly)) {
-    if (!First &&
-        !skipToken(AsmToken::Comma, "comma or closing brace expected"))
-      return ParseStatus::Failure;
-
-    StringRef Id = getTokenStr();
-    SMLoc IdLoc = getLoc();
-    if (!skipToken(AsmToken::Identifier, "field name expected") ||
-        !skipToken(AsmToken::Colon, "colon expected"))
-      return ParseStatus::Failure;
-
-    const auto *I =
-        find_if(Fields, [Id](StructuredOpField *F) { return F->Id == Id; });
-    if (I == Fields.end())
-      return Error(IdLoc, "unknown field");
-    if ((*I)->IsDefined)
-      return Error(IdLoc, "duplicate field");
-
-    // TODO: Support symbolic values.
-    (*I)->Loc = getLoc();
-    if (!parseExpr((*I)->Val))
-      return ParseStatus::Failure;
-    (*I)->IsDefined = true;
-
-    First = false;
-  }
-  return ParseStatus::Success;
-}
-
-bool AMDGPUAsmParser::validateStructuredOpFields(
-    ArrayRef<const StructuredOpField *> Fields) {
-  return all_of(Fields, [this](const StructuredOpField *F) {
-    return F->validate(*this);
-  });
-}
-
-//===----------------------------------------------------------------------===//
-// swizzle
-//===----------------------------------------------------------------------===//
-
-LLVM_READNONE
-static unsigned
-encodeBitmaskPerm(const unsigned AndMask,
-                  const unsigned OrMask,
-                  const unsigned XorMask) {
-  using namespace llvm::AMDGPU::Swizzle;
-
-  return BITMASK_PERM_ENC |
-         (AndMask << BITMASK_AND_SHIFT) |
-         (OrMask  << BITMASK_OR_SHIFT)  |
-         (XorMask << BITMASK_XOR_SHIFT);
-}
-
-bool AMDGPUAsmParser::parseSwizzleOperand(int64_t &Op, const unsigned MinVal,
-                                          const unsigned MaxVal,
-                                          const Twine &ErrMsg, SMLoc &Loc) {
-  if (!skipToken(AsmToken::Comma, "expected a comma")) {
-    return false;
-  }
-  Loc = getLoc();
-  if (!parseExpr(Op)) {
-    return false;
-  }
-  if (Op < MinVal || Op > MaxVal) {
-    Error(Loc, ErrMsg);
-    return false;
-  }
-
-  return true;
-}
-
-bool
-AMDGPUAsmParser::parseSwizzleOperands(const unsigned OpNum, int64_t* Op,
-                                      const unsigned MinVal,
-                                      const unsigned MaxVal,
-                                      const StringRef ErrMsg) {
-  SMLoc Loc;
-  for (unsigned i = 0; i < OpNum; ++i) {
-    if (!parseSwizzleOperand(Op[i], MinVal, MaxVal, ErrMsg, Loc))
-      return false;
-  }
-
-  return true;
-}
-
-bool
-AMDGPUAsmParser::parseSwizzleQuadPerm(int64_t &Imm) {
-  using namespace llvm::AMDGPU::Swizzle;
-
-  int64_t Lane[LANE_NUM];
-  if (parseSwizzleOperands(LANE_NUM, Lane, 0, LANE_MAX,
-                           "expected a 2-bit lane id")) {
-    Imm = QUAD_PERM_ENC;
-    for (unsigned I = 0; I < LANE_NUM; ++I) {
-      Imm |= Lane[I] << (LANE_SHIFT * I);
-    }
-    return true;
-  }
-  return false;
-}
-
-bool
-AMDGPUAsmParser::parseSwizzleBroadcast(int64_t &Imm) {
-  using namespace llvm::AMDGPU::Swizzle;
-
-  SMLoc Loc;
-  int64_t GroupSize;
-  int64_t LaneIdx;
-
-  if (!parseSwizzleOperand(GroupSize,
-                           2, 32,
-                           "group size must be in the interval [2,32]",
-                           Loc)) {
-    return false;
-  }
-  if (!isPowerOf2_64(GroupSize)) {
-    Error(Loc, "group size must be a power of two");
-    return false;
-  }
-  if (parseSwizzleOperand(LaneIdx,
-                          0, GroupSize - 1,
-                          "lane id must be in the interval [0,group size - 1]",
-                          Loc)) {
-    Imm = encodeBitmaskPerm(BITMASK_MAX - GroupSize + 1, LaneIdx, 0);
-    return true;
-  }
-  return false;
-}
-
-bool
-AMDGPUAsmParser::parseSwizzleReverse(int64_t &Imm) {
-  using namespace llvm::AMDGPU::Swizzle;
-
-  SMLoc Loc;
-  int64_t GroupSize;
-
-  if (!parseSwizzleOperand(GroupSize,
-                           2, 32,
-                           "group size must be in the interval [2,32]",
-                           Loc)) {
-    return false;
-  }
-  if (!isPowerOf2_64(GroupSize)) {
-    Error(Loc, "group size must be a power of two");
-    return false;
-  }
-
-  Imm = encodeBitmaskPerm(BITMASK_MAX, 0, GroupSize - 1);
-  return true;
-}
-
-bool
-AMDGPUAsmParser::parseSwizzleSwap(int64_t &Imm) {
-  using namespace llvm::AMDGPU::Swizzle;
-
-  SMLoc Loc;
-  int64_t GroupSize;
-
-  if (!parseSwizzleOperand(GroupSize,
-                           1, 16,
-                           "group size must be in the interval [1,16]",
-                           Loc)) {
-    return false;
-  }
-  if (!isPowerOf2_64(GroupSize)) {
-    Error(Loc, "group size must be a power of two");
-    return false;
-  }
-
-  Imm = encodeBitmaskPerm(BITMASK_MAX, 0, GroupSize);
-  return true;
-}
-
-bool
-AMDGPUAsmParser::parseSwizzleBitmaskPerm(int64_t &Imm) {
-  using namespace llvm::AMDGPU::Swizzle;
-
-  if (!skipToken(AsmToken::Comma, "expected a comma")) {
-    return false;
-  }
-
-  StringRef Ctl;
-  SMLoc StrLoc = getLoc();
-  if (!parseString(Ctl)) {
-    return false;
-  }
-  if (Ctl.size() != BITMASK_WIDTH) {
-    Error(StrLoc, "expected a 5-character mask");
-    return false;
-  }
-
-  unsigned AndMask = 0;
-  unsigned OrMask = 0;
-  unsigned XorMask = 0;
-
-  for (size_t i = 0; i < Ctl.size(); ++i) {
-    unsigned Mask = 1 << (BITMASK_WIDTH - 1 - i);
-    switch(Ctl[i]) {
-    default:
-      Error(StrLoc, "invalid mask");
-      return false;
-    case '0':
-      break;
-    case '1':
-      OrMask |= Mask;
-      break;
-    case 'p':
-      AndMask |= Mask;
-      break;
-    case 'i':
-      AndMask |= Mask;
-      XorMask |= Mask;
-      break;
-    }
-  }
-
-  Imm = encodeBitmaskPerm(AndMask, OrMask, XorMask);
-  return true;
-}
-
-bool AMDGPUAsmParser::parseSwizzleFFT(int64_t &Imm) {
-  using namespace llvm::AMDGPU::Swizzle;
-
-  if (!AMDGPU::isGFX9Plus(getSTI())) {
-    Error(getLoc(), "FFT mode swizzle not supported on this GPU");
-    return false;
-  }
-
-  int64_t Swizzle;
-  SMLoc Loc;
-  if (!parseSwizzleOperand(Swizzle, 0, FFT_SWIZZLE_MAX,
-                           "FFT swizzle must be in the interval [0," +
-                               Twine(FFT_SWIZZLE_MAX) + Twine(']'),
-                           Loc))
-    return false;
-
-  Imm = FFT_MODE_ENC | Swizzle;
-  return true;
-}
-
-bool AMDGPUAsmParser::parseSwizzleRotate(int64_t &Imm) {
-  using namespace llvm::AMDGPU::Swizzle;
-
-  if (!AMDGPU::isGFX9Plus(getSTI())) {
-    Error(getLoc(), "Rotate mode swizzle not supported on this GPU");
-    return false;
-  }
-
-  SMLoc Loc;
-  int64_t Direction;
-
-  if (!parseSwizzleOperand(Direction, 0, 1,
-                           "direction must be 0 (left) or 1 (right)", Loc))
-    return false;
-
-  int64_t RotateSize;
-  if (!parseSwizzleOperand(
-          RotateSize, 0, ROTATE_MAX_SIZE,
-          "number of threads to rotate must be in the interval [0," +
-              Twine(ROTATE_MAX_SIZE) + Twine(']'),
-          Loc))
-    return false;
-
-  Imm = ROTATE_MODE_ENC | (Direction << ROTATE_DIR_SHIFT) |
-        (RotateSize << ROTATE_SIZE_SHIFT);
-  return true;
-}
-
-bool
-AMDGPUAsmParser::parseSwizzleOffset(int64_t &Imm) {
-
-  SMLoc OffsetLoc = getLoc();
-
-  if (!parseExpr(Imm, "a swizzle macro")) {
-    return false;
-  }
-  if (!isUInt<16>(Imm)) {
-    Error(OffsetLoc, "expected a 16-bit offset");
-    return false;
-  }
-  return true;
-}
-
-bool
-AMDGPUAsmParser::parseSwizzleMacro(int64_t &Imm) {
-  using namespace llvm::AMDGPU::Swizzle;
-
-  if (skipToken(AsmToken::LParen, "expected a left parentheses")) {
-
-    SMLoc ModeLoc = getLoc();
-    bool Ok = false;
-
-    if (trySkipId(IdSymbolic[ID_QUAD_PERM])) {
-      Ok = parseSwizzleQuadPerm(Imm);
-    } else if (trySkipId(IdSymbolic[ID_BITMASK_PERM])) {
-      Ok = parseSwizzleBitmaskPerm(Imm);
-    } else if (trySkipId(IdSymbolic[ID_BROADCAST])) {
-      Ok = parseSwizzleBroadcast(Imm);
-    } else if (trySkipId(IdSymbolic[ID_SWAP])) {
-      Ok = parseSwizzleSwap(Imm);
-    } else if (trySkipId(IdSymbolic[ID_REVERSE])) {
-      Ok = parseSwizzleReverse(Imm);
-    } else if (trySkipId(IdSymbolic[ID_FFT])) {
-      Ok = parseSwizzleFFT(Imm);
-    } else if (trySkipId(IdSymbolic[ID_ROTATE])) {
-      Ok = parseSwizzleRotate(Imm);
-    } else {
-      Error(ModeLoc, "expected a swizzle mode");
-    }
-
-    return Ok && skipToken(AsmToken::RParen, "expected a closing parentheses");
-  }
-
-  return false;
-}
-
-ParseStatus AMDGPUAsmParser::parseSwizzle(OperandVector &Operands) {
-  SMLoc S = getLoc();
-  int64_t Imm = 0;
-
-  if (trySkipId("offset")) {
-
-    bool Ok = false;
-    if (skipToken(AsmToken::Colon, "expected a colon")) {
-      if (trySkipId("swizzle")) {
-        Ok = parseSwizzleMacro(Imm);
-      } else {
-        Ok = parseSwizzleOffset(Imm);
-      }
-    }
-
-    Operands.push_back(AMDGPUOperand::CreateImm(this, Imm, S, AMDGPUOperand::ImmTySwizzle));
-
-    return Ok ? ParseStatus::Success : ParseStatus::Failure;
-  }
-  return ParseStatus::NoMatch;
-}
-
-bool
-AMDGPUOperand::isSwizzle() const {
-  return isImmTy(ImmTySwizzle);
-}
-
-//===----------------------------------------------------------------------===//
-// VGPR Index Mode
-//===----------------------------------------------------------------------===//
-
-int64_t AMDGPUAsmParser::parseGPRIdxMacro() {
-
-  using namespace llvm::AMDGPU::VGPRIndexMode;
-
-  if (trySkipToken(AsmToken::RParen)) {
-    return OFF;
-  }
-
-  int64_t Imm = 0;
-
-  while (true) {
-    unsigned Mode = 0;
-    SMLoc S = getLoc();
-
-    for (unsigned ModeId = ID_MIN; ModeId <= ID_MAX; ++ModeId) {
-      if (trySkipId(IdSymbolic[ModeId])) {
-        Mode = 1 << ModeId;
-        break;
-      }
-    }
-
-    if (Mode == 0) {
-      Error(S, (Imm == 0)?
-               "expected a VGPR index mode or a closing parenthesis" :
-               "expected a VGPR index mode");
-      return UNDEF;
-    }
-
-    if (Imm & Mode) {
-      Error(S, "duplicate VGPR index mode");
-      return UNDEF;
-    }
-    Imm |= Mode;
-
-    if (trySkipToken(AsmToken::RParen))
-      break;
-    if (!skipToken(AsmToken::Comma,
-                   "expected a comma or a closing parenthesis"))
-      return UNDEF;
-  }
-
-  return Imm;
-}
-
-ParseStatus AMDGPUAsmParser::parseGPRIdxMode(OperandVector &Operands) {
-
-  using namespace llvm::AMDGPU::VGPRIndexMode;
-
-  int64_t Imm = 0;
-  SMLoc S = getLoc();
-
-  if (trySkipId("gpr_idx", AsmToken::LParen)) {
-    Imm = parseGPRIdxMacro();
-    if (Imm == UNDEF)
-      return ParseStatus::Failure;
-  } else {
-    if (getParser().parseAbsoluteExpression(Imm))
-      return ParseStatus::Failure;
-    if (Imm < 0 || !isUInt<4>(Imm))
-      return Error(S, "invalid immediate: only 4-bit values are legal");
-  }
-
-  Operands.push_back(
-      AMDGPUOperand::CreateImm(this, Imm, S, AMDGPUOperand::ImmTyGprIdxMode));
-  return ParseStatus::Success;
-}
-
-bool AMDGPUOperand::isGPRIdxMode() const {
-  return isImmTy(ImmTyGprIdxMode);
-}
-
-//===----------------------------------------------------------------------===//
-// sopp branch targets
-//===----------------------------------------------------------------------===//
-
-ParseStatus AMDGPUAsmParser::parseSOPPBrTarget(OperandVector &Operands) {
-
-  // Make sure we are not parsing something
-  // that looks like a label or an expression but is not.
-  // This will improve error messages.
-  if (isRegister() || isModifier())
-    return ParseStatus::NoMatch;
-
-  if (!parseExpr(Operands))
-    return ParseStatus::Failure;
-
-  AMDGPUOperand &Opr = ((AMDGPUOperand &)*Operands[Operands.size() - 1]);
-  assert(Opr.isImm() || Opr.isExpr());
-  SMLoc Loc = Opr.getStartLoc();
-
-  // Currently we do not support arbitrary expressions as branch targets.
-  // Only labels and absolute expressions are accepted.
-  if (Opr.isExpr() && !Opr.isSymbolRefExpr()) {
-    Error(Loc, "expected an absolute expression or a label");
-  } else if (Opr.isImm() && !Opr.isS16Imm()) {
-    Error(Loc, "expected a 16-bit signed jump offset");
-  }
-
-  return ParseStatus::Success;
-}
-
-//===----------------------------------------------------------------------===//
-// Boolean holding registers
-//===----------------------------------------------------------------------===//
-
-ParseStatus AMDGPUAsmParser::parseBoolReg(OperandVector &Operands) {
-  return parseReg(Operands);
-}
-
-//===----------------------------------------------------------------------===//
-// mubuf
-//===----------------------------------------------------------------------===//
-
-void AMDGPUAsmParser::cvtMubufImpl(MCInst &Inst,
-                                   const OperandVector &Operands,
-                                   bool IsAtomic) {
-  OptionalImmIndexMap OptionalIdx;
-  unsigned FirstOperandIdx = 1;
-  bool IsAtomicReturn = false;
-
-  if (IsAtomic) {
-    IsAtomicReturn =  MII.get(Inst.getOpcode()).TSFlags &
-                      SIInstrFlags::IsAtomicRet;
-  }
-
-  for (unsigned i = FirstOperandIdx, e = Operands.size(); i != e; ++i) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
-
-    // Add the register arguments
-    if (Op.isReg()) {
-      Op.addRegOperands(Inst, 1);
-      // Insert a tied src for atomic return dst.
-      // This cannot be postponed as subsequent calls to
-      // addImmOperands rely on correct number of MC operands.
-      if (IsAtomicReturn && i == FirstOperandIdx)
-        Op.addRegOperands(Inst, 1);
-      continue;
-    }
-
-    // Handle the case where soffset is an immediate
-    if (Op.isImm() && Op.getImmTy() == AMDGPUOperand::ImmTyNone) {
-      Op.addImmOperands(Inst, 1);
-      continue;
-    }
-
-    // Handle tokens like 'offen' which are sometimes hard-coded into the
-    // asm string.  There are no MCInst operands for these.
-    if (Op.isToken()) {
-      continue;
-    }
-    assert(Op.isImm());
-
-    // Handle optional arguments
-    OptionalIdx[Op.getImmTy()] = i;
-  }
-
-  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOffset);
-  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyCPol, 0);
-  // Parse a dummy operand as a placeholder for the SWZ operand. This enforces
-  // agreement between MCInstrDesc.getNumOperands and MCInst.getNumOperands.
-  Inst.addOperand(MCOperand::createImm(0));
-}
-
-//===----------------------------------------------------------------------===//
-// smrd
-//===----------------------------------------------------------------------===//
-
-bool AMDGPUOperand::isSMRDOffset8() const {
-  return isImmLiteral() && isUInt<8>(getImm());
-}
-
-bool AMDGPUOperand::isSMEMOffset() const {
-  // Offset range is checked later by validator.
-  return isImmLiteral();
-}
-
-bool AMDGPUOperand::isSMRDLiteralOffset() const {
-  // 32-bit literals are only supported on CI and we only want to use them
-  // when the offset is > 8-bits.
-  return isImmLiteral() && !isUInt<8>(getImm()) && isUInt<32>(getImm());
-}
-
-//===----------------------------------------------------------------------===//
-// vop3
-//===----------------------------------------------------------------------===//
-
-static bool ConvertOmodMul(int64_t &Mul) {
-  if (Mul != 1 && Mul != 2 && Mul != 4)
-    return false;
-
-  Mul >>= 1;
-  return true;
-}
-
-static bool ConvertOmodDiv(int64_t &Div) {
-  if (Div == 1) {
-    Div = 0;
-    return true;
-  }
-
-  if (Div == 2) {
-    Div = 3;
-    return true;
-  }
-
-  return false;
-}
-
-// For pre-gfx11 targets, both bound_ctrl:0 and bound_ctrl:1 are encoded as 1.
-// This is intentional and ensures compatibility with sp3.
-// See bug 35397 for details.
-bool AMDGPUAsmParser::convertDppBoundCtrl(int64_t &BoundCtrl) {
-  if (BoundCtrl == 0 || BoundCtrl == 1) {
-    if (!isGFX11Plus())
-      BoundCtrl = 1;
-    return true;
-  }
-  return false;
-}
-
-void AMDGPUAsmParser::onBeginOfFile() {
-  if (!getParser().getStreamer().getTargetStreamer() ||
-      getSTI().getTargetTriple().getArch() == Triple::r600)
-    return;
-
-  if (!getTargetStreamer().getTargetID())
-    getTargetStreamer().initializeTargetID(getSTI(),
-                                           getSTI().getFeatureString());
-
-  if (isHsaAbi(getSTI()))
-    getTargetStreamer().EmitDirectiveAMDGCNTarget();
-}
-
-/// Parse AMDGPU specific expressions.
-///
-///  expr ::= or(expr, ...) |
-///           max(expr, ...)
-///
-bool AMDGPUAsmParser::parsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) {
-  using AGVK = AMDGPUMCExpr::VariantKind;
-
-  if (isToken(AsmToken::Identifier)) {
-    StringRef TokenId = getTokenStr();
-    AGVK VK = StringSwitch<AGVK>(TokenId)
-                  .Case("max", AGVK::AGVK_Max)
-                  .Case("or", AGVK::AGVK_Or)
-                  .Case("extrasgprs", AGVK::AGVK_ExtraSGPRs)
-                  .Case("totalnumvgprs", AGVK::AGVK_TotalNumVGPRs)
-                  .Case("alignto", AGVK::AGVK_AlignTo)
-                  .Case("occupancy", AGVK::AGVK_Occupancy)
-                  .Default(AGVK::AGVK_None);
-
-    if (VK != AGVK::AGVK_None && peekToken().is(AsmToken::LParen)) {
-      SmallVector<const MCExpr *, 4> Exprs;
-      uint64_t CommaCount = 0;
-      lex(); // Eat Arg ('or', 'max', 'occupancy', etc.)
-      lex(); // Eat '('
-      while (true) {
-        if (trySkipToken(AsmToken::RParen)) {
-          if (Exprs.empty()) {
-            Error(getToken().getLoc(),
-                  "empty " + Twine(TokenId) + " expression");
-            return true;
-          }
-          if (CommaCount + 1 != Exprs.size()) {
-            Error(getToken().getLoc(),
-                  "mismatch of commas in " + Twine(TokenId) + " expression");
-            return true;
-          }
-          Res = AMDGPUMCExpr::create(VK, Exprs, getContext());
-          return false;
-        }
-        const MCExpr *Expr;
-        if (getParser().parseExpression(Expr, EndLoc))
-          return true;
-        Exprs.push_back(Expr);
-        bool LastTokenWasComma = trySkipToken(AsmToken::Comma);
-        if (LastTokenWasComma)
-          CommaCount++;
-        if (!LastTokenWasComma && !isToken(AsmToken::RParen)) {
-          Error(getToken().getLoc(),
-                "unexpected token in " + Twine(TokenId) + " expression");
-          return true;
-        }
-      }
-    }
-  }
-  return getParser().parsePrimaryExpr(Res, EndLoc, nullptr);
-}
-
-ParseStatus AMDGPUAsmParser::parseOModSI(OperandVector &Operands) {
-  StringRef Name = getTokenStr();
-  if (Name == "mul") {
-    return parseIntWithPrefix("mul", Operands,
-                              AMDGPUOperand::ImmTyOModSI, ConvertOmodMul);
-  }
-
-  if (Name == "div") {
-    return parseIntWithPrefix("div", Operands,
-                              AMDGPUOperand::ImmTyOModSI, ConvertOmodDiv);
-  }
-
-  return ParseStatus::NoMatch;
-}
-
-// Determines which bit DST_OP_SEL occupies in the op_sel operand according to
-// the number of src operands present, then copies that bit into src0_modifiers.
-static void cvtVOP3DstOpSelOnly(MCInst &Inst, const MCRegisterInfo &MRI) {
-  int Opc = Inst.getOpcode();
-  int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
-  if (OpSelIdx == -1)
-    return;
-
-  int SrcNum;
-  const AMDGPU::OpName Ops[] = {AMDGPU::OpName::src0, AMDGPU::OpName::src1,
-                                AMDGPU::OpName::src2};
-  for (SrcNum = 0; SrcNum < 3 && AMDGPU::hasNamedOperand(Opc, Ops[SrcNum]);
-       ++SrcNum)
-    ;
-  assert(SrcNum > 0);
-
-  unsigned OpSel = Inst.getOperand(OpSelIdx).getImm();
-
-  int DstIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst);
-  if (DstIdx == -1)
-    return;
-
-  const MCOperand &DstOp = Inst.getOperand(DstIdx);
-  int ModIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0_modifiers);
-  uint32_t ModVal = Inst.getOperand(ModIdx).getImm();
-  if (DstOp.isReg() &&
-      MRI.getRegClass(AMDGPU::VGPR_16RegClassID).contains(DstOp.getReg())) {
-    if (AMDGPU::isHi16Reg(DstOp.getReg(), MRI))
-      ModVal |= SISrcMods::DST_OP_SEL;
-  } else {
-    if ((OpSel & (1 << SrcNum)) != 0)
-      ModVal |= SISrcMods::DST_OP_SEL;
-  }
-  Inst.getOperand(ModIdx).setImm(ModVal);
-}
-
-void AMDGPUAsmParser::cvtVOP3OpSel(MCInst &Inst,
-                                   const OperandVector &Operands) {
-  cvtVOP3P(Inst, Operands);
-  cvtVOP3DstOpSelOnly(Inst, *getMRI());
-}
-
-void AMDGPUAsmParser::cvtVOP3OpSel(MCInst &Inst, const OperandVector &Operands,
-                                   OptionalImmIndexMap &OptionalIdx) {
-  cvtVOP3P(Inst, Operands, OptionalIdx);
-  cvtVOP3DstOpSelOnly(Inst, *getMRI());
-}
-
-static bool isRegOrImmWithInputMods(const MCInstrDesc &Desc, unsigned OpNum) {
-  return
-      // 1. This operand is input modifiers
-      Desc.operands()[OpNum].OperandType == AMDGPU::OPERAND_INPUT_MODS
-      // 2. This is not last operand
-      && Desc.NumOperands > (OpNum + 1)
-      // 3. Next operand is register class
-      && Desc.operands()[OpNum + 1].RegClass != -1
-      // 4. Next register is not tied to any other operand
-      && Desc.getOperandConstraint(OpNum + 1,
-                                   MCOI::OperandConstraint::TIED_TO) == -1;
-}
-
-void AMDGPUAsmParser::cvtOpSelHelper(MCInst &Inst, unsigned OpSel) {
-  unsigned Opc = Inst.getOpcode();
-  constexpr AMDGPU::OpName Ops[] = {AMDGPU::OpName::src0, AMDGPU::OpName::src1,
-                                    AMDGPU::OpName::src2};
-  constexpr AMDGPU::OpName ModOps[] = {AMDGPU::OpName::src0_modifiers,
-                                       AMDGPU::OpName::src1_modifiers,
-                                       AMDGPU::OpName::src2_modifiers};
-  for (int J = 0; J < 3; ++J) {
-    int OpIdx = AMDGPU::getNamedOperandIdx(Opc, Ops[J]);
-    if (OpIdx == -1)
-      // Some instructions, e.g. v_interp_p2_f16 in GFX9, have src0, src2, but
-      // no src1. So continue instead of break.
-      continue;
-
-    int ModIdx = AMDGPU::getNamedOperandIdx(Opc, ModOps[J]);
-    uint32_t ModVal = Inst.getOperand(ModIdx).getImm();
-
-    if ((OpSel & (1 << J)) != 0)
-      ModVal |= SISrcMods::OP_SEL_0;
-    // op_sel[3] is encoded in src0_modifiers.
-    if (ModOps[J] == AMDGPU::OpName::src0_modifiers && (OpSel & (1 << 3)) != 0)
-      ModVal |= SISrcMods::DST_OP_SEL;
-
-    Inst.getOperand(ModIdx).setImm(ModVal);
-  }
-}
-
-void AMDGPUAsmParser::cvtVOP3Interp(MCInst &Inst, const OperandVector &Operands)
-{
-  OptionalImmIndexMap OptionalIdx;
-  unsigned Opc = Inst.getOpcode();
-
-  unsigned I = 1;
-  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
-  for (unsigned J = 0; J < Desc.getNumDefs(); ++J) {
-    ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
-  }
-
-  for (unsigned E = Operands.size(); I != E; ++I) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]);
-    if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
-      Op.addRegOrImmWithFPInputModsOperands(Inst, 2);
-    } else if (Op.isInterpSlot() || Op.isInterpAttr() ||
-               Op.isInterpAttrChan()) {
-      Inst.addOperand(MCOperand::createImm(Op.getImm()));
-    } else if (Op.isImmModifier()) {
-      OptionalIdx[Op.getImmTy()] = I;
-    } else {
-      llvm_unreachable("unhandled operand type");
-    }
-  }
-
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::high))
-    addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                          AMDGPUOperand::ImmTyHigh);
-
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::clamp))
-    addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                          AMDGPUOperand::ImmTyClamp);
-
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::omod))
-    addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                          AMDGPUOperand::ImmTyOModSI);
-
-  // Some v_interp instructions use op_sel[3] for dst.
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::op_sel)) {
-    addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                          AMDGPUOperand::ImmTyOpSel);
-    int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
-    unsigned OpSel = Inst.getOperand(OpSelIdx).getImm();
-
-    cvtOpSelHelper(Inst, OpSel);
-  }
-}
-
-void AMDGPUAsmParser::cvtVINTERP(MCInst &Inst, const OperandVector &Operands)
-{
-  OptionalImmIndexMap OptionalIdx;
-  unsigned Opc = Inst.getOpcode();
-
-  unsigned I = 1;
-  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
-  for (unsigned J = 0; J < Desc.getNumDefs(); ++J) {
-    ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
-  }
-
-  for (unsigned E = Operands.size(); I != E; ++I) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]);
-    if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
-      Op.addRegOrImmWithFPInputModsOperands(Inst, 2);
-    } else if (Op.isImmModifier()) {
-      OptionalIdx[Op.getImmTy()] = I;
-    } else {
-      llvm_unreachable("unhandled operand type");
-    }
-  }
-
-  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyClamp);
-
-  int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
-  if (OpSelIdx != -1)
-    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOpSel);
-
-  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyWaitEXP);
-
-  if (OpSelIdx == -1)
-    return;
-
-  unsigned OpSel = Inst.getOperand(OpSelIdx).getImm();
-  cvtOpSelHelper(Inst, OpSel);
-}
-
-void AMDGPUAsmParser::cvtScaledMFMA(MCInst &Inst,
-                                    const OperandVector &Operands) {
-  OptionalImmIndexMap OptionalIdx;
-  unsigned Opc = Inst.getOpcode();
-  unsigned I = 1;
-  int CbszOpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::cbsz);
-
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  for (unsigned J = 0; J < Desc.getNumDefs(); ++J)
-    static_cast<AMDGPUOperand &>(*Operands[I++]).addRegOperands(Inst, 1);
-
-  for (unsigned E = Operands.size(); I != E; ++I) {
-    AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands[I]);
-    int NumOperands = Inst.getNumOperands();
-    // The order of operands in MCInst and parsed operands are different.
-    // Adding dummy cbsz and blgp operands at corresponding MCInst operand
-    // indices for parsing scale values correctly.
-    if (NumOperands == CbszOpIdx) {
-      Inst.addOperand(MCOperand::createImm(0));
-      Inst.addOperand(MCOperand::createImm(0));
-    }
-    if (isRegOrImmWithInputMods(Desc, NumOperands)) {
-      Op.addRegOrImmWithFPInputModsOperands(Inst, 2);
-    } else if (Op.isImmModifier()) {
-      OptionalIdx[Op.getImmTy()] = I;
-    } else {
-      Op.addRegOrImmOperands(Inst, 1);
-    }
-  }
-
-  // Insert CBSZ and BLGP operands for F8F6F4 variants
-  auto CbszIdx = OptionalIdx.find(AMDGPUOperand::ImmTyCBSZ);
-  if (CbszIdx != OptionalIdx.end()) {
-    int CbszVal = ((AMDGPUOperand &)*Operands[CbszIdx->second]).getImm();
-    Inst.getOperand(CbszOpIdx).setImm(CbszVal);
-  }
-
-  int BlgpOpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::blgp);
-  auto BlgpIdx = OptionalIdx.find(AMDGPUOperand::ImmTyBLGP);
-  if (BlgpIdx != OptionalIdx.end()) {
-    int BlgpVal = ((AMDGPUOperand &)*Operands[BlgpIdx->second]).getImm();
-    Inst.getOperand(BlgpOpIdx).setImm(BlgpVal);
-  }
-
-  // Add dummy src_modifiers
-  Inst.addOperand(MCOperand::createImm(0));
-  Inst.addOperand(MCOperand::createImm(0));
-
-  // Handle op_sel fields
-
-  unsigned OpSel = 0;
-  auto OpselIdx = OptionalIdx.find(AMDGPUOperand::ImmTyOpSel);
-  if (OpselIdx != OptionalIdx.end()) {
-    OpSel = static_cast<const AMDGPUOperand &>(*Operands[OpselIdx->second])
-                .getImm();
-  }
-
-  unsigned OpSelHi = 0;
-  auto OpselHiIdx = OptionalIdx.find(AMDGPUOperand::ImmTyOpSelHi);
-  if (OpselHiIdx != OptionalIdx.end()) {
-    OpSelHi = static_cast<const AMDGPUOperand &>(*Operands[OpselHiIdx->second])
-                  .getImm();
-  }
-  const AMDGPU::OpName ModOps[] = {AMDGPU::OpName::src0_modifiers,
-                                   AMDGPU::OpName::src1_modifiers};
-
-  for (unsigned J = 0; J < 2; ++J) {
-    unsigned ModVal = 0;
-    if (OpSel & (1 << J))
-      ModVal |= SISrcMods::OP_SEL_0;
-    if (OpSelHi & (1 << J))
-      ModVal |= SISrcMods::OP_SEL_1;
-
-    const int ModIdx = AMDGPU::getNamedOperandIdx(Opc, ModOps[J]);
-    Inst.getOperand(ModIdx).setImm(ModVal);
-  }
-}
-
-void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands,
-                              OptionalImmIndexMap &OptionalIdx) {
-  unsigned Opc = Inst.getOpcode();
-
-  unsigned I = 1;
-  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
-  for (unsigned J = 0; J < Desc.getNumDefs(); ++J) {
-    ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
-  }
-
-  for (unsigned E = Operands.size(); I != E; ++I) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]);
-    if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
-      Op.addRegOrImmWithFPInputModsOperands(Inst, 2);
-    } else if (Op.isImmModifier()) {
-      OptionalIdx[Op.getImmTy()] = I;
-    } else {
-      Op.addRegOrImmOperands(Inst, 1);
-    }
-  }
-
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::scale_sel))
-    addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                          AMDGPUOperand::ImmTyScaleSel);
-
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::clamp))
-    addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                          AMDGPUOperand::ImmTyClamp);
-
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::byte_sel)) {
-    if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::vdst_in))
-      Inst.addOperand(Inst.getOperand(0));
-    addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                          AMDGPUOperand::ImmTyByteSel);
-  }
-
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::omod))
-    addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                          AMDGPUOperand::ImmTyOModSI);
-
-  // Special case v_mac_{f16, f32} and v_fmac_{f16, f32} (gfx906/gfx10+):
-  // it has src2 register operand that is tied to dst operand
-  // we don't allow modifiers for this operand in assembler so src2_modifiers
-  // should be 0.
-  if (isMAC(Opc)) {
-    auto *it = Inst.begin();
-    std::advance(it, AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2_modifiers));
-    it = Inst.insert(it, MCOperand::createImm(0)); // no modifiers for src2
-    ++it;
-    // Copy the operand to ensure it's not invalidated when Inst grows.
-    Inst.insert(it, MCOperand(Inst.getOperand(0))); // src2 = dst
-  }
-}
-
-void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands) {
-  OptionalImmIndexMap OptionalIdx;
-  cvtVOP3(Inst, Operands, OptionalIdx);
-}
-
-void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst, const OperandVector &Operands,
-                               OptionalImmIndexMap &OptIdx) {
-  const int Opc = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Opc);
-
-  const bool IsPacked = (Desc.TSFlags & SIInstrFlags::IsPacked) != 0;
-
-  if (Opc == AMDGPU::V_CVT_SCALEF32_PK_FP4_F16_vi ||
-      Opc == AMDGPU::V_CVT_SCALEF32_PK_FP4_BF16_vi ||
-      Opc == AMDGPU::V_CVT_SR_BF8_F32_vi ||
-      Opc == AMDGPU::V_CVT_SR_FP8_F32_vi ||
-      Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_gfx11 ||
-      Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_gfx11 ||
-      Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_gfx12 ||
-      Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_gfx12) {
-    Inst.addOperand(MCOperand::createImm(0)); // Placeholder for src2_mods
-    Inst.addOperand(Inst.getOperand(0));
-  }
-
-  // Adding vdst_in operand is already covered for these DPP instructions in
-  // cvtVOP3DPP.
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::vdst_in) &&
-      !(Opc == AMDGPU::V_CVT_PK_BF8_F32_t16_e64_dpp_gfx11 ||
-        Opc == AMDGPU::V_CVT_PK_FP8_F32_t16_e64_dpp_gfx11 ||
-        Opc == AMDGPU::V_CVT_PK_BF8_F32_t16_e64_dpp8_gfx11 ||
-        Opc == AMDGPU::V_CVT_PK_FP8_F32_t16_e64_dpp8_gfx11 ||
-        Opc == AMDGPU::V_CVT_PK_BF8_F32_fake16_e64_dpp_gfx11 ||
-        Opc == AMDGPU::V_CVT_PK_FP8_F32_fake16_e64_dpp_gfx11 ||
-        Opc == AMDGPU::V_CVT_PK_BF8_F32_fake16_e64_dpp8_gfx11 ||
-        Opc == AMDGPU::V_CVT_PK_FP8_F32_fake16_e64_dpp8_gfx11 ||
-        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_dpp_gfx11 ||
-        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_dpp8_gfx11 ||
-        Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_dpp_gfx11 ||
-        Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_dpp8_gfx11 ||
-        Opc == AMDGPU::V_CVT_PK_BF8_F32_t16_e64_dpp_gfx12 ||
-        Opc == AMDGPU::V_CVT_PK_FP8_F32_t16_e64_dpp_gfx12 ||
-        Opc == AMDGPU::V_CVT_PK_BF8_F32_t16_e64_dpp8_gfx12 ||
-        Opc == AMDGPU::V_CVT_PK_FP8_F32_t16_e64_dpp8_gfx12 ||
-        Opc == AMDGPU::V_CVT_PK_BF8_F32_fake16_e64_dpp_gfx12 ||
-        Opc == AMDGPU::V_CVT_PK_FP8_F32_fake16_e64_dpp_gfx12 ||
-        Opc == AMDGPU::V_CVT_PK_BF8_F32_fake16_e64_dpp8_gfx12 ||
-        Opc == AMDGPU::V_CVT_PK_FP8_F32_fake16_e64_dpp8_gfx12 ||
-        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_dpp_gfx12 ||
-        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_dpp8_gfx12 ||
-        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx1250_e64_dpp_gfx1250 ||
-        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx1250_e64_dpp8_gfx1250 ||
-        Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_dpp_gfx12 ||
-        Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_dpp8_gfx12 ||
-        Opc == AMDGPU::V_CVT_SR_FP8_F16_t16_e64_dpp_gfx1250 ||
-        Opc == AMDGPU::V_CVT_SR_FP8_F16_fake16_e64_dpp_gfx1250 ||
-        Opc == AMDGPU::V_CVT_SR_FP8_F16_t16_e64_dpp8_gfx1250 ||
-        Opc == AMDGPU::V_CVT_SR_FP8_F16_fake16_e64_dpp8_gfx1250 ||
-        Opc == AMDGPU::V_CVT_SR_FP8_F16_t16_e64_gfx1250 ||
-        Opc == AMDGPU::V_CVT_SR_FP8_F16_fake16_e64_gfx1250 ||
-        Opc == AMDGPU::V_CVT_SR_BF8_F16_t16_e64_dpp_gfx1250 ||
-        Opc == AMDGPU::V_CVT_SR_BF8_F16_fake16_e64_dpp_gfx1250 ||
-        Opc == AMDGPU::V_CVT_SR_BF8_F16_t16_e64_dpp8_gfx1250 ||
-        Opc == AMDGPU::V_CVT_SR_BF8_F16_fake16_e64_dpp8_gfx1250 ||
-        Opc == AMDGPU::V_CVT_SR_BF8_F16_t16_e64_gfx1250 ||
-        Opc == AMDGPU::V_CVT_SR_BF8_F16_fake16_e64_gfx1250)) {
-    Inst.addOperand(Inst.getOperand(0));
-  }
-
-  int BitOp3Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::bitop3);
-  if (BitOp3Idx != -1) {
-    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyBitOp3);
-  }
-
-  // FIXME: This is messy. Parse the modifiers as if it was a normal VOP3
-  // instruction, and then figure out where to actually put the modifiers
-
-  int OpSelIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel);
-  if (OpSelIdx != -1) {
-    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyOpSel);
-  }
-
-  int OpSelHiIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel_hi);
-  if (OpSelHiIdx != -1) {
-    int DefaultVal = IsPacked ? -1 : 0;
-    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyOpSelHi,
-                          DefaultVal);
-  }
-
-  int MatrixAFMTIdx =
-      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::matrix_a_fmt);
-  if (MatrixAFMTIdx != -1) {
-    addOptionalImmOperand(Inst, Operands, OptIdx,
-                          AMDGPUOperand::ImmTyMatrixAFMT, 0);
-  }
-
-  int MatrixBFMTIdx =
-      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::matrix_b_fmt);
-  if (MatrixBFMTIdx != -1) {
-    addOptionalImmOperand(Inst, Operands, OptIdx,
-                          AMDGPUOperand::ImmTyMatrixBFMT, 0);
-  }
-
-  int MatrixAScaleIdx =
-      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::matrix_a_scale);
-  if (MatrixAScaleIdx != -1) {
-    addOptionalImmOperand(Inst, Operands, OptIdx,
-                          AMDGPUOperand::ImmTyMatrixAScale, 0);
-  }
-
-  int MatrixBScaleIdx =
-      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::matrix_b_scale);
-  if (MatrixBScaleIdx != -1) {
-    addOptionalImmOperand(Inst, Operands, OptIdx,
-                          AMDGPUOperand::ImmTyMatrixBScale, 0);
-  }
-
-  int MatrixAScaleFmtIdx =
-      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::matrix_a_scale_fmt);
-  if (MatrixAScaleFmtIdx != -1) {
-    addOptionalImmOperand(Inst, Operands, OptIdx,
-                          AMDGPUOperand::ImmTyMatrixAScaleFmt, 0);
-  }
-
-  int MatrixBScaleFmtIdx =
-      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::matrix_b_scale_fmt);
-  if (MatrixBScaleFmtIdx != -1) {
-    addOptionalImmOperand(Inst, Operands, OptIdx,
-                          AMDGPUOperand::ImmTyMatrixBScaleFmt, 0);
-  }
-
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::matrix_a_reuse))
-    addOptionalImmOperand(Inst, Operands, OptIdx,
-                          AMDGPUOperand::ImmTyMatrixAReuse, 0);
-
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::matrix_b_reuse))
-    addOptionalImmOperand(Inst, Operands, OptIdx,
-                          AMDGPUOperand::ImmTyMatrixBReuse, 0);
-
-  int NegLoIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::neg_lo);
-  if (NegLoIdx != -1)
-    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyNegLo);
-
-  int NegHiIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::neg_hi);
-  if (NegHiIdx != -1)
-    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyNegHi);
+#include "MCTargetDesc/AMDGPUFixupKinds.h"
+#include "MCTargetDesc/AMDGPUMCExpr.h"
+#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
+#include "SIDefines.h"
+#include "Utils/AMDGPUBaseInfo.h"
+#include "llvm/ADT/APInt.h"
+#include "llvm/MC/MCCodeEmitter.h"
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCInstrInfo.h"
+#include "llvm/MC/MCRegisterInfo.h"
+#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/Support/Casting.h"
+#include "llvm/Support/EndianStream.h"
+#include <optional>
 
-  const AMDGPU::OpName Ops[] = {AMDGPU::OpName::src0, AMDGPU::OpName::src1,
-                                AMDGPU::OpName::src2};
-  const AMDGPU::OpName ModOps[] = {AMDGPU::OpName::src0_modifiers,
-                                   AMDGPU::OpName::src1_modifiers,
-                                   AMDGPU::OpName::src2_modifiers};
+using namespace llvm;
 
-  unsigned OpSel = 0;
-  unsigned OpSelHi = 0;
-  unsigned NegLo = 0;
-  unsigned NegHi = 0;
+namespace {
 
-  if (OpSelIdx != -1)
-    OpSel = Inst.getOperand(OpSelIdx).getImm();
+class AMDGPUMCCodeEmitter : public MCCodeEmitter {
+  const MCRegisterInfo &MRI;
+  const MCInstrInfo &MCII;
 
-  if (OpSelHiIdx != -1)
-    OpSelHi = Inst.getOperand(OpSelHiIdx).getImm();
+public:
+  AMDGPUMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI)
+      : MRI(MRI), MCII(MCII) {}
 
-  if (NegLoIdx != -1)
-    NegLo = Inst.getOperand(NegLoIdx).getImm();
+  /// Encode the instruction and write it to the OS.
+  void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
+                         SmallVectorImpl<MCFixup> &Fixups,
+                         const MCSubtargetInfo &STI) const override;
 
-  if (NegHiIdx != -1)
-    NegHi = Inst.getOperand(NegHiIdx).getImm();
+  void getMachineOpValue(const MCInst &MI, const MCOperand &MO, APInt &Op,
+                         SmallVectorImpl<MCFixup> &Fixups,
+                         const MCSubtargetInfo &STI) const;
 
-  for (int J = 0; J < 3; ++J) {
-    int OpIdx = AMDGPU::getNamedOperandIdx(Opc, Ops[J]);
-    if (OpIdx == -1)
-      break;
+  void getMachineOpValueT16(const MCInst &MI, unsigned OpNo, APInt &Op,
+                            SmallVectorImpl<MCFixup> &Fixups,
+                            const MCSubtargetInfo &STI) const;
 
-    int ModIdx = AMDGPU::getNamedOperandIdx(Opc, ModOps[J]);
+  void getMachineOpValueT16Lo128(const MCInst &MI, unsigned OpNo, APInt &Op,
+                                 SmallVectorImpl<MCFixup> &Fixups,
+                                 const MCSubtargetInfo &STI) const;
 
-    if (ModIdx == -1)
-      continue;
+  /// Use a fixup to encode the simm16 field for SOPP branch
+  ///        instructions.
+  void getSOPPBrEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
+                         SmallVectorImpl<MCFixup> &Fixups,
+                         const MCSubtargetInfo &STI) const;
 
-    uint32_t ModVal = 0;
+  void getSMEMOffsetEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
+                             SmallVectorImpl<MCFixup> &Fixups,
+                             const MCSubtargetInfo &STI) const;
 
-    const MCOperand &SrcOp = Inst.getOperand(OpIdx);
-    if (SrcOp.isReg() && getMRI()
-                             ->getRegClass(AMDGPU::VGPR_16RegClassID)
-                             .contains(SrcOp.getReg())) {
-      bool VGPRSuffixIsHi = AMDGPU::isHi16Reg(SrcOp.getReg(), *getMRI());
-      if (VGPRSuffixIsHi)
-        ModVal |= SISrcMods::OP_SEL_0;
-    } else {
-      if ((OpSel & (1 << J)) != 0)
-        ModVal |= SISrcMods::OP_SEL_0;
-    }
+  void getSDWASrcEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
+                          SmallVectorImpl<MCFixup> &Fixups,
+                          const MCSubtargetInfo &STI) const;
 
-    if ((OpSelHi & (1 << J)) != 0)
-      ModVal |= SISrcMods::OP_SEL_1;
+  void getSDWAVopcDstEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
+                              SmallVectorImpl<MCFixup> &Fixups,
+                              const MCSubtargetInfo &STI) const;
 
-    if ((NegLo & (1 << J)) != 0)
-      ModVal |= SISrcMods::NEG;
+  void getAVOperandEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
+                            SmallVectorImpl<MCFixup> &Fixups,
+                            const MCSubtargetInfo &STI) const;
 
-    if ((NegHi & (1 << J)) != 0)
-      ModVal |= SISrcMods::NEG_HI;
+private:
+  uint64_t getImplicitOpSelHiEncoding(int Opcode) const;
+  void getMachineOpValueCommon(const MCInst &MI, const MCOperand &MO,
+                               unsigned OpNo, APInt &Op,
+                               SmallVectorImpl<MCFixup> &Fixups,
+                               const MCSubtargetInfo &STI) const;
+
+  /// Encode an fp or int literal.
+  std::optional<uint64_t>
+  getLitEncoding(const MCInstrDesc &Desc, const MCOperand &MO, unsigned OpNo,
+                 const MCSubtargetInfo &STI,
+                 bool HasMandatoryLiteral = false) const;
+
+  void getBinaryCodeForInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
+                             APInt &Inst, APInt &Scratch,
+                             const MCSubtargetInfo &STI) const;
+
+  template <bool HasSrc0, bool HasSrc1, bool HasSrc2>
+  APInt postEncodeVOP3(const MCInst &MI, APInt EncodedValue,
+                       const MCSubtargetInfo &STI) const;
+
+  APInt postEncodeVOPCX(const MCInst &MI, APInt EncodedValue,
+                        const MCSubtargetInfo &STI) const;
+};
 
-    Inst.getOperand(ModIdx).setImm(Inst.getOperand(ModIdx).getImm() | ModVal);
-  }
-}
+} // end anonymous namespace
 
-void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst, const OperandVector &Operands) {
-  OptionalImmIndexMap OptIdx;
-  cvtVOP3(Inst, Operands, OptIdx);
-  cvtVOP3P(Inst, Operands, OptIdx);
+MCCodeEmitter *llvm::createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII,
+                                               MCContext &Ctx) {
+  return new AMDGPUMCCodeEmitter(MCII, *Ctx.getRegisterInfo());
 }
 
-static void addSrcModifiersAndSrc(MCInst &Inst, const OperandVector &Operands,
-                                  unsigned i, unsigned Opc,
-                                  AMDGPU::OpName OpName) {
-  if (AMDGPU::getNamedOperandIdx(Opc, OpName) != -1)
-    ((AMDGPUOperand &)*Operands[i]).addRegOrImmWithFPInputModsOperands(Inst, 2);
-  else
-    ((AMDGPUOperand &)*Operands[i]).addRegOperands(Inst, 1);
+static void addFixup(SmallVectorImpl<MCFixup> &Fixups, uint32_t Offset,
+                     const MCExpr *Value, uint16_t Kind, bool PCRel = false) {
+  Fixups.push_back(MCFixup::create(Offset, Value, Kind, PCRel));
 }
 
-void AMDGPUAsmParser::cvtSWMMAC(MCInst &Inst, const OperandVector &Operands) {
-  unsigned Opc = Inst.getOpcode();
-
-  ((AMDGPUOperand &)*Operands[1]).addRegOperands(Inst, 1);
-  addSrcModifiersAndSrc(Inst, Operands, 2, Opc, AMDGPU::OpName::src0_modifiers);
-  addSrcModifiersAndSrc(Inst, Operands, 3, Opc, AMDGPU::OpName::src1_modifiers);
-  ((AMDGPUOperand &)*Operands[1]).addRegOperands(Inst, 1); // srcTiedDef
-  ((AMDGPUOperand &)*Operands[4]).addRegOperands(Inst, 1); // src2
-
-  OptionalImmIndexMap OptIdx;
-  for (unsigned i = 5; i < Operands.size(); ++i) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]);
-    OptIdx[Op.getImmTy()] = i;
-  }
-
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::index_key_8bit))
-    addOptionalImmOperand(Inst, Operands, OptIdx,
-                          AMDGPUOperand::ImmTyIndexKey8bit);
-
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::index_key_16bit))
-    addOptionalImmOperand(Inst, Operands, OptIdx,
-                          AMDGPUOperand::ImmTyIndexKey16bit);
+// Returns the encoding value to use if the given integer is an integer inline
+// immediate value, or 0 if it is not.
+template <typename IntTy>
+static uint32_t getIntInlineImmEncoding(IntTy Imm) {
+  if (Imm >= 0 && Imm <= 64)
+    return 128 + Imm;
 
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::index_key_32bit))
-    addOptionalImmOperand(Inst, Operands, OptIdx,
-                          AMDGPUOperand::ImmTyIndexKey32bit);
+  if (Imm >= -16 && Imm <= -1)
+    return 192 + std::abs(Imm);
 
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::clamp))
-    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyClamp);
-
-  cvtVOP3P(Inst, Operands, OptIdx);
+  return 0;
 }
 
-//===----------------------------------------------------------------------===//
-// VOPD
-//===----------------------------------------------------------------------===//
-
-ParseStatus AMDGPUAsmParser::parseVOPD(OperandVector &Operands) {
-  if (!hasVOPD(getSTI()))
-    return ParseStatus::NoMatch;
-
-  if (isToken(AsmToken::Colon) && peekToken(false).is(AsmToken::Colon)) {
-    SMLoc S = getLoc();
-    lex();
-    lex();
-    Operands.push_back(AMDGPUOperand::CreateToken(this, "::", S));
-    SMLoc OpYLoc = getLoc();
-    StringRef OpYName;
-    if (isToken(AsmToken::Identifier) && !Parser.parseIdentifier(OpYName)) {
-      Operands.push_back(AMDGPUOperand::CreateToken(this, OpYName, OpYLoc));
-      return ParseStatus::Success;
-    }
-    return Error(OpYLoc, "expected a VOPDY instruction after ::");
-  }
-  return ParseStatus::NoMatch;
-}
+static uint32_t getLit16Encoding(uint16_t Val, const MCSubtargetInfo &STI) {
+  uint16_t IntImm = getIntInlineImmEncoding(static_cast<int16_t>(Val));
+  if (IntImm != 0)
+    return IntImm;
 
-// Create VOPD MCInst operands using parsed assembler operands.
-void AMDGPUAsmParser::cvtVOPD(MCInst &Inst, const OperandVector &Operands) {
-  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
+  if (Val == 0x3800) // 0.5
+    return 240;
 
-  auto addOp = [&](uint16_t ParsedOprIdx) { // NOLINT:function pointer
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[ParsedOprIdx]);
-    if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
-      Op.addRegOrImmWithFPInputModsOperands(Inst, 2);
-      return;
-    }
-    if (Op.isReg()) {
-      Op.addRegOperands(Inst, 1);
-      return;
-    }
-    if (Op.isImm()) {
-      Op.addImmOperands(Inst, 1);
-      return;
-    }
-    llvm_unreachable("Unhandled operand type in cvtVOPD");
-  };
+  if (Val == 0xB800) // -0.5
+    return 241;
 
-  const auto &InstInfo = getVOPDInstInfo(Inst.getOpcode(), &MII);
+  if (Val == 0x3C00) // 1.0
+    return 242;
 
-  // MCInst operands are ordered as follows:
-  //   dstX, dstY, src0X [, other OpX operands], src0Y [, other OpY operands]
+  if (Val == 0xBC00) // -1.0
+    return 243;
 
-  for (auto CompIdx : VOPD::COMPONENTS) {
-    addOp(InstInfo[CompIdx].getIndexOfDstInParsedOperands());
-  }
+  if (Val == 0x4000) // 2.0
+    return 244;
 
-  for (auto CompIdx : VOPD::COMPONENTS) {
-    const auto &CInfo = InstInfo[CompIdx];
-    auto CompSrcOperandsNum = InstInfo[CompIdx].getCompParsedSrcOperandsNum();
-    for (unsigned CompSrcIdx = 0; CompSrcIdx < CompSrcOperandsNum; ++CompSrcIdx)
-      addOp(CInfo.getIndexOfSrcInParsedOperands(CompSrcIdx));
-    if (CInfo.hasSrc2Acc())
-      addOp(CInfo.getIndexOfDstInParsedOperands());
-  }
+  if (Val == 0xC000) // -2.0
+    return 245;
 
-  int BitOp3Idx =
-      AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::bitop3);
-  if (BitOp3Idx != -1) {
-    OptionalImmIndexMap OptIdx;
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands.back());
-    if (Op.isImm())
-      OptIdx[Op.getImmTy()] = Operands.size() - 1;
+  if (Val == 0x4400) // 4.0
+    return 246;
 
-    addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyBitOp3);
-  }
-}
+  if (Val == 0xC400) // -4.0
+    return 247;
 
-//===----------------------------------------------------------------------===//
-// dpp
-//===----------------------------------------------------------------------===//
+  if (Val == 0x3118 && // 1.0 / (2.0 * pi)
+      STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm))
+    return 248;
 
-bool AMDGPUOperand::isDPP8() const {
-  return isImmTy(ImmTyDPP8);
+  return 255;
 }
 
-bool AMDGPUOperand::isDPPCtrl() const {
-  using namespace AMDGPU::DPP;
+static uint32_t getLitBF16Encoding(uint16_t Val) {
+  uint16_t IntImm = getIntInlineImmEncoding(static_cast<int16_t>(Val));
+  if (IntImm != 0)
+    return IntImm;
 
-  bool result = isImm() && getImmTy() == ImmTyDppCtrl && isUInt<9>(getImm());
-  if (result) {
-    int64_t Imm = getImm();
-    return (Imm >= DppCtrl::QUAD_PERM_FIRST && Imm <= DppCtrl::QUAD_PERM_LAST) ||
-           (Imm >= DppCtrl::ROW_SHL_FIRST && Imm <= DppCtrl::ROW_SHL_LAST) ||
-           (Imm >= DppCtrl::ROW_SHR_FIRST && Imm <= DppCtrl::ROW_SHR_LAST) ||
-           (Imm >= DppCtrl::ROW_ROR_FIRST && Imm <= DppCtrl::ROW_ROR_LAST) ||
-           (Imm == DppCtrl::WAVE_SHL1) ||
-           (Imm == DppCtrl::WAVE_ROL1) ||
-           (Imm == DppCtrl::WAVE_SHR1) ||
-           (Imm == DppCtrl::WAVE_ROR1) ||
-           (Imm == DppCtrl::ROW_MIRROR) ||
-           (Imm == DppCtrl::ROW_HALF_MIRROR) ||
-           (Imm == DppCtrl::BCAST15) ||
-           (Imm == DppCtrl::BCAST31) ||
-           (Imm >= DppCtrl::ROW_SHARE_FIRST && Imm <= DppCtrl::ROW_SHARE_LAST) ||
-           (Imm >= DppCtrl::ROW_XMASK_FIRST && Imm <= DppCtrl::ROW_XMASK_LAST);
+  // clang-format off
+  switch (Val) {
+  case 0x3F00: return 240; // 0.5
+  case 0xBF00: return 241; // -0.5
+  case 0x3F80: return 242; // 1.0
+  case 0xBF80: return 243; // -1.0
+  case 0x4000: return 244; // 2.0
+  case 0xC000: return 245; // -2.0
+  case 0x4080: return 246; // 4.0
+  case 0xC080: return 247; // -4.0
+  case 0x3E22: return 248; // 1.0 / (2.0 * pi)
+  default:     return 255;
   }
-  return false;
-}
-
-//===----------------------------------------------------------------------===//
-// mAI
-//===----------------------------------------------------------------------===//
-
-bool AMDGPUOperand::isBLGP() const {
-  return isImm() && getImmTy() == ImmTyBLGP && isUInt<3>(getImm());
-}
-
-bool AMDGPUOperand::isS16Imm() const {
-  return isImmLiteral() && (isInt<16>(getImm()) || isUInt<16>(getImm()));
+  // clang-format on
 }
 
-bool AMDGPUOperand::isU16Imm() const {
-  return isImmLiteral() && isUInt<16>(getImm());
-}
-
-//===----------------------------------------------------------------------===//
-// dim
-//===----------------------------------------------------------------------===//
+static uint32_t getLit32Encoding(uint32_t Val, const MCSubtargetInfo &STI) {
+  uint32_t IntImm = getIntInlineImmEncoding(static_cast<int32_t>(Val));
+  if (IntImm != 0)
+    return IntImm;
 
-bool AMDGPUAsmParser::parseDimId(unsigned &Encoding) {
-  // We want to allow "dim:1D" etc.,
-  // but the initial 1 is tokenized as an integer.
-  std::string Token;
-  if (isToken(AsmToken::Integer)) {
-    SMLoc Loc = getToken().getEndLoc();
-    Token = std::string(getTokenStr());
-    lex();
-    if (getLoc() != Loc)
-      return false;
-  }
+  if (Val == llvm::bit_cast<uint32_t>(0.5f))
+    return 240;
 
-  StringRef Suffix;
-  if (!parseId(Suffix))
-    return false;
-  Token += Suffix;
+  if (Val == llvm::bit_cast<uint32_t>(-0.5f))
+    return 241;
 
-  StringRef DimId = Token;
-  DimId.consume_front("SQ_RSRC_IMG_");
+  if (Val == llvm::bit_cast<uint32_t>(1.0f))
+    return 242;
 
-  const AMDGPU::MIMGDimInfo *DimInfo = AMDGPU::getMIMGDimInfoByAsmSuffix(DimId);
-  if (!DimInfo)
-    return false;
+  if (Val == llvm::bit_cast<uint32_t>(-1.0f))
+    return 243;
 
-  Encoding = DimInfo->Encoding;
-  return true;
-}
+  if (Val == llvm::bit_cast<uint32_t>(2.0f))
+    return 244;
 
-ParseStatus AMDGPUAsmParser::parseDim(OperandVector &Operands) {
-  if (!isGFX10Plus())
-    return ParseStatus::NoMatch;
+  if (Val == llvm::bit_cast<uint32_t>(-2.0f))
+    return 245;
 
-  SMLoc S = getLoc();
+  if (Val == llvm::bit_cast<uint32_t>(4.0f))
+    return 246;
 
-  if (!trySkipId("dim", AsmToken::Colon))
-    return ParseStatus::NoMatch;
+  if (Val == llvm::bit_cast<uint32_t>(-4.0f))
+    return 247;
 
-  unsigned Encoding;
-  SMLoc Loc = getLoc();
-  if (!parseDimId(Encoding))
-    return Error(Loc, "invalid dim value");
+  if (Val == 0x3e22f983 && // 1.0 / (2.0 * pi)
+      STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm))
+    return 248;
 
-  Operands.push_back(AMDGPUOperand::CreateImm(this, Encoding, S,
-                                              AMDGPUOperand::ImmTyDim));
-  return ParseStatus::Success;
+  return 255;
 }
 
-//===----------------------------------------------------------------------===//
-// dpp
-//===----------------------------------------------------------------------===//
-
-ParseStatus AMDGPUAsmParser::parseDPP8(OperandVector &Operands) {
-  SMLoc S = getLoc();
+static uint32_t getLit16IntEncoding(uint32_t Val, const MCSubtargetInfo &STI) {
+  return getLit32Encoding(Val, STI);
+}
 
-  if (!isGFX10Plus() || !trySkipId("dpp8", AsmToken::Colon))
-    return ParseStatus::NoMatch;
+/// Get the encoding for a 64-bit literal value.
+/// \param IsFP - True if this is a floating-point operand.
+/// \param IsSigned - True if this is a signed integer operand (uses IsInt<32>
+///                   to determine if 32-bit literal is valid). Only relevant
+///                   when IsFP is false.
+static uint32_t getLit64Encoding(const MCInstrDesc &Desc, uint64_t Val,
+                                 const MCSubtargetInfo &STI, bool IsFP,
+                                 bool IsSigned = false) {
+  uint32_t IntImm = getIntInlineImmEncoding(static_cast<int64_t>(Val));
+  if (IntImm != 0)
+    return IntImm;
 
-  // dpp8:[%d,%d,%d,%d,%d,%d,%d,%d]
+  if (Val == llvm::bit_cast<uint64_t>(0.5))
+    return 240;
 
-  int64_t Sels[8];
+  if (Val == llvm::bit_cast<uint64_t>(-0.5))
+    return 241;
 
-  if (!skipToken(AsmToken::LBrac, "expected an opening square bracket"))
-    return ParseStatus::Failure;
+  if (Val == llvm::bit_cast<uint64_t>(1.0))
+    return 242;
 
-  for (size_t i = 0; i < 8; ++i) {
-    if (i > 0 && !skipToken(AsmToken::Comma, "expected a comma"))
-      return ParseStatus::Failure;
+  if (Val == llvm::bit_cast<uint64_t>(-1.0))
+    return 243;
 
-    SMLoc Loc = getLoc();
-    if (getParser().parseAbsoluteExpression(Sels[i]))
-      return ParseStatus::Failure;
-    if (0 > Sels[i] || 7 < Sels[i])
-      return Error(Loc, "expected a 3-bit value");
-  }
+  if (Val == llvm::bit_cast<uint64_t>(2.0))
+    return 244;
 
-  if (!skipToken(AsmToken::RBrac, "expected a closing square bracket"))
-    return ParseStatus::Failure;
+  if (Val == llvm::bit_cast<uint64_t>(-2.0))
+    return 245;
 
-  unsigned DPP8 = 0;
-  for (size_t i = 0; i < 8; ++i)
-    DPP8 |= (Sels[i] << (i * 3));
+  if (Val == llvm::bit_cast<uint64_t>(4.0))
+    return 246;
 
-  Operands.push_back(AMDGPUOperand::CreateImm(this, DPP8, S, AMDGPUOperand::ImmTyDPP8));
-  return ParseStatus::Success;
-}
+  if (Val == llvm::bit_cast<uint64_t>(-4.0))
+    return 247;
 
-bool
-AMDGPUAsmParser::isSupportedDPPCtrl(StringRef Ctrl,
-                                    const OperandVector &Operands) {
-  if (Ctrl == "row_newbcast")
-    return isGFX90A();
+  if (Val == 0x3fc45f306dc9c882 && // 1.0 / (2.0 * pi)
+      STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm))
+    return 248;
 
-  if (Ctrl == "row_share" ||
-      Ctrl == "row_xmask")
-    return isGFX10Plus();
+  // The rest part needs to align with AMDGPUInstPrinter::printLiteral64.
 
-  if (Ctrl == "wave_shl" ||
-      Ctrl == "wave_shr" ||
-      Ctrl == "wave_rol" ||
-      Ctrl == "wave_ror" ||
-      Ctrl == "row_bcast")
-    return isVI() || isGFX9();
+  bool CanUse64BitLiterals =
+      STI.hasFeature(AMDGPU::Feature64BitLiterals) &&
+      !(Desc.TSFlags & (SIInstrFlags::VOP3 | SIInstrFlags::VOP3P));
+  if (IsFP) {
+    return CanUse64BitLiterals && Lo_32(Val) ? 254 : 255;
+  }
 
-  return Ctrl == "row_mirror" ||
-         Ctrl == "row_half_mirror" ||
-         Ctrl == "quad_perm" ||
-         Ctrl == "row_shl" ||
-         Ctrl == "row_shr" ||
-         Ctrl == "row_ror";
+  // For integer operands, determine if we need 64-bit literal encoding based
+  // on whether the value fits in a sign-extended or zero-extended 32-bit
+  // literal. Signed operands use IsInt<32>, unsigned operands use IsUInt<32>.
+  bool Needs64BitLiteral =
+      IsSigned ? !isInt<32>(static_cast<int64_t>(Val)) : !isUInt<32>(Val);
+  return CanUse64BitLiterals && Needs64BitLiteral ? 254 : 255;
 }
 
-int64_t
-AMDGPUAsmParser::parseDPPCtrlPerm() {
-  // quad_perm:[%d,%d,%d,%d]
-
-  if (!skipToken(AsmToken::LBrac, "expected an opening square bracket"))
-    return -1;
-
-  int64_t Val = 0;
-  for (int i = 0; i < 4; ++i) {
-    if (i > 0 && !skipToken(AsmToken::Comma, "expected a comma"))
-      return -1;
-
-    int64_t Temp;
-    SMLoc Loc = getLoc();
-    if (getParser().parseAbsoluteExpression(Temp))
-      return -1;
-    if (Temp < 0 || Temp > 3) {
-      Error(Loc, "expected a 2-bit value");
-      return -1;
+std::optional<uint64_t> AMDGPUMCCodeEmitter::getLitEncoding(
+    const MCInstrDesc &Desc, const MCOperand &MO, unsigned OpNo,
+    const MCSubtargetInfo &STI, bool HasMandatoryLiteral) const {
+  const MCOperandInfo &OpInfo = Desc.operands()[OpNo];
+  int64_t Imm = 0;
+  if (MO.isExpr()) {
+    if (!MO.getExpr()->evaluateAsAbsolute(Imm) ||
+        AMDGPU::isLitExpr(MO.getExpr())) {
+      if (OpInfo.OperandType == AMDGPU::OPERAND_KIMM16 ||
+          OpInfo.OperandType == AMDGPU::OPERAND_KIMM32 ||
+          OpInfo.OperandType == AMDGPU::OPERAND_KIMM64)
+        return Imm;
+      if (STI.hasFeature(AMDGPU::Feature64BitLiterals) &&
+          AMDGPU::getOperandSize(OpInfo) == 8)
+        return 254;
+      return 255;
     }
+  } else {
+    assert(!MO.isDFPImm());
 
-    Val += (Temp << i * 2);
-  }
-
-  if (!skipToken(AsmToken::RBrac, "expected a closing square bracket"))
-    return -1;
-
-  return Val;
-}
-
-int64_t
-AMDGPUAsmParser::parseDPPCtrlSel(StringRef Ctrl) {
-  using namespace AMDGPU::DPP;
+    if (!MO.isImm())
+      return {};
 
-  // sel:%d
+    Imm = MO.getImm();
+  }
 
-  int64_t Val;
-  SMLoc Loc = getLoc();
+  switch (OpInfo.OperandType) {
+  case AMDGPU::OPERAND_REG_IMM_INT32:
+  case AMDGPU::OPERAND_REG_IMM_FP32:
+  case AMDGPU::OPERAND_REG_INLINE_C_INT32:
+  case AMDGPU::OPERAND_REG_INLINE_C_FP32:
+  case AMDGPU::OPERAND_REG_INLINE_AC_INT32:
+  case AMDGPU::OPERAND_REG_INLINE_AC_FP32:
+  case AMDGPU::OPERAND_REG_IMM_V2INT32:
+  case AMDGPU::OPERAND_REG_IMM_V2FP32:
+  case AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32:
+    return getLit32Encoding(static_cast<uint32_t>(Imm), STI);
 
-  if (getParser().parseAbsoluteExpression(Val))
-    return -1;
+  case AMDGPU::OPERAND_REG_IMM_I64:
+  case AMDGPU::OPERAND_REG_INLINE_C_INT64:
+    // Signed 64-bit integer operand - use IsInt<32> for 32-bit literal check
+    return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, false,
+                            /*IsSigned=*/true);
 
-  struct DppCtrlCheck {
-    int64_t Ctrl;
-    int Lo;
-    int Hi;
-  };
+  case AMDGPU::OPERAND_REG_IMM_U64:
+    // Unsigned 64-bit integer operand - use IsUInt<32> for 32-bit literal check
+    return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, false,
+                            /*IsSigned=*/false);
 
-  DppCtrlCheck Check = StringSwitch<DppCtrlCheck>(Ctrl)
-    .Case("wave_shl",  {DppCtrl::WAVE_SHL1,       1,  1})
-    .Case("wave_rol",  {DppCtrl::WAVE_ROL1,       1,  1})
-    .Case("wave_shr",  {DppCtrl::WAVE_SHR1,       1,  1})
-    .Case("wave_ror",  {DppCtrl::WAVE_ROR1,       1,  1})
-    .Case("row_shl",   {DppCtrl::ROW_SHL0,        1, 15})
-    .Case("row_shr",   {DppCtrl::ROW_SHR0,        1, 15})
-    .Case("row_ror",   {DppCtrl::ROW_ROR0,        1, 15})
-    .Case("row_share", {DppCtrl::ROW_SHARE_FIRST, 0, 15})
-    .Case("row_xmask", {DppCtrl::ROW_XMASK_FIRST, 0, 15})
-    .Case("row_newbcast", {DppCtrl::ROW_NEWBCAST_FIRST, 0, 15})
-    .Default({-1, 0, 0});
+  case AMDGPU::OPERAND_REG_INLINE_C_FP64:
+  case AMDGPU::OPERAND_REG_INLINE_AC_FP64:
+    return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, true);
 
-  bool Valid;
-  if (Check.Ctrl == -1) {
-    Valid = (Ctrl == "row_bcast" && (Val == 15 || Val == 31));
-    Val = (Val == 15)? DppCtrl::BCAST15 : DppCtrl::BCAST31;
-  } else {
-    Valid = Check.Lo <= Val && Val <= Check.Hi;
-    Val = (Check.Lo == Check.Hi) ? Check.Ctrl : (Check.Ctrl | Val);
+  case AMDGPU::OPERAND_REG_IMM_FP64: {
+    auto Enc = getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, true);
+    return (HasMandatoryLiteral && Enc == 255) ? 254 : Enc;
   }
 
-  if (!Valid) {
-    Error(Loc, Twine("invalid ", Ctrl) + Twine(" value"));
-    return -1;
-  }
+  case AMDGPU::OPERAND_REG_IMM_INT16:
+  case AMDGPU::OPERAND_REG_INLINE_C_INT16:
+    return getLit16IntEncoding(static_cast<uint32_t>(Imm), STI);
 
-  return Val;
-}
+  case AMDGPU::OPERAND_REG_IMM_FP16:
+  case AMDGPU::OPERAND_REG_INLINE_C_FP16:
+    // FIXME Is this correct? What do inline immediates do on SI for f16 src
+    // which does not have f16 support?
+    return getLit16Encoding(static_cast<uint16_t>(Imm), STI);
 
-ParseStatus AMDGPUAsmParser::parseDPPCtrl(OperandVector &Operands) {
-  using namespace AMDGPU::DPP;
+  case AMDGPU::OPERAND_REG_IMM_BF16:
+  case AMDGPU::OPERAND_REG_INLINE_C_BF16:
+    // We don't actually need to check Inv2Pi here because BF16 instructions can
+    // only be emitted for targets that already support the feature.
+    return getLitBF16Encoding(static_cast<uint16_t>(Imm));
 
-  if (!isToken(AsmToken::Identifier) ||
-      !isSupportedDPPCtrl(getTokenStr(), Operands))
-    return ParseStatus::NoMatch;
+  case AMDGPU::OPERAND_REG_IMM_V2INT16:
+  case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
+    return AMDGPU::getInlineEncodingV2I16(static_cast<uint32_t>(Imm))
+        .value_or(255);
 
-  SMLoc S = getLoc();
-  int64_t Val = -1;
-  StringRef Ctrl;
+  case AMDGPU::OPERAND_REG_IMM_V2FP16:
+  case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
+    return AMDGPU::getInlineEncodingV2F16(static_cast<uint32_t>(Imm))
+        .value_or(255);
 
-  parseId(Ctrl);
+  case AMDGPU::OPERAND_REG_IMM_V2FP16_SPLAT:
+    // V_PK_FMAC_F16 has different inline constant behavior on pre-GFX11 vs
+    // GFX11+: pre-GFX11 produces (f16, 0), GFX11+ duplicates f16 to both
+    // halves.
+    return AMDGPU::getPKFMACF16InlineEncoding(static_cast<uint32_t>(Imm),
+                                              AMDGPU::isGFX11Plus(STI))
+        .value_or(255);
 
-  if (Ctrl == "row_mirror") {
-    Val = DppCtrl::ROW_MIRROR;
-  } else if (Ctrl == "row_half_mirror") {
-    Val = DppCtrl::ROW_HALF_MIRROR;
-  } else {
-    if (skipToken(AsmToken::Colon, "expected a colon")) {
-      if (Ctrl == "quad_perm") {
-        Val = parseDPPCtrlPerm();
-      } else {
-        Val = parseDPPCtrlSel(Ctrl);
-      }
-    }
-  }
+  case AMDGPU::OPERAND_REG_IMM_V2BF16:
+  case AMDGPU::OPERAND_REG_INLINE_C_V2BF16:
+    return AMDGPU::getInlineEncodingV2BF16(static_cast<uint32_t>(Imm))
+        .value_or(255);
 
-  if (Val == -1)
-    return ParseStatus::Failure;
+  case AMDGPU::OPERAND_REG_IMM_NOINLINE_V2FP16:
+    return 255;
 
-  Operands.push_back(
-    AMDGPUOperand::CreateImm(this, Val, S, AMDGPUOperand::ImmTyDppCtrl));
-  return ParseStatus::Success;
+  case AMDGPU::OPERAND_KIMM32:
+  case AMDGPU::OPERAND_KIMM16:
+  case AMDGPU::OPERAND_KIMM64:
+    return Imm;
+  default:
+    llvm_unreachable("invalid operand size");
+  }
 }
 
-void AMDGPUAsmParser::cvtVOP3DPP(MCInst &Inst, const OperandVector &Operands,
-                                 bool IsDPP8) {
-  OptionalImmIndexMap OptionalIdx;
-  unsigned Opc = Inst.getOpcode();
-  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
+uint64_t AMDGPUMCCodeEmitter::getImplicitOpSelHiEncoding(int Opcode) const {
+  using namespace AMDGPU::VOP3PEncoding;
 
-  // MAC instructions are special because they have 'old'
-  // operand which is not tied to dst (but assumed to be).
-  // They also have dummy unused src2_modifiers.
-  int OldIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::old);
-  int Src2ModIdx =
-      AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2_modifiers);
-  bool IsMAC = OldIdx != -1 && Src2ModIdx != -1 &&
-               Desc.getOperandConstraint(OldIdx, MCOI::TIED_TO) == -1;
-
-  unsigned I = 1;
-  for (unsigned J = 0; J < Desc.getNumDefs(); ++J) {
-    ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
-  }
+  if (AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::op_sel_hi)) {
+    if (AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::src2))
+      return 0;
+    if (AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::src1))
+      return OP_SEL_HI_2;
+    if (AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::src0))
+      return OP_SEL_HI_1 | OP_SEL_HI_2;
+  }
+  return OP_SEL_HI_0 | OP_SEL_HI_1 | OP_SEL_HI_2;
+}
+
+void AMDGPUMCCodeEmitter::encodeInstruction(const MCInst &MI,
+                                            SmallVectorImpl<char> &CB,
+                                            SmallVectorImpl<MCFixup> &Fixups,
+                                            const MCSubtargetInfo &STI) const {
+  int Opcode = MI.getOpcode();
+  APInt Encoding, Scratch;
+  getBinaryCodeForInstr(MI, Fixups, Encoding, Scratch,  STI);
+  const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
+  unsigned bytes = Desc.getSize();
+
+  // Set unused op_sel_hi bits to 1 for VOP3P and MAI instructions.
+  // Note that accvgpr_read/write are MAI, have src0, but do not use op_sel.
+  if (((Desc.TSFlags & SIInstrFlags::VOP3P) ||
+       Opcode == AMDGPU::V_ACCVGPR_READ_B32_vi ||
+       Opcode == AMDGPU::V_ACCVGPR_WRITE_B32_vi) &&
+      // Matrix B format operand reuses op_sel_hi.
+      !AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::matrix_b_fmt) &&
+      // Matrix B scale operand reuses op_sel_hi.
+      !AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::matrix_b_scale) &&
+      // Matrix B reuse operand reuses op_sel_hi.
+      !AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::matrix_b_reuse)) {
+    Encoding |= getImplicitOpSelHiEncoding(Opcode);
+  }
+
+  for (unsigned i = 0; i < bytes; i++) {
+    CB.push_back((uint8_t)Encoding.extractBitsAsZExtValue(8, 8 * i));
+  }
+
+  // NSA encoding.
+  if (AMDGPU::isGFX10Plus(STI) && Desc.TSFlags & SIInstrFlags::MIMG) {
+    int vaddr0 = AMDGPU::getNamedOperandIdx(MI.getOpcode(),
+                                            AMDGPU::OpName::vaddr0);
+    int srsrc = AMDGPU::getNamedOperandIdx(MI.getOpcode(),
+                                           AMDGPU::OpName::srsrc);
+    assert(vaddr0 >= 0 && srsrc > vaddr0);
+    unsigned NumExtraAddrs = srsrc - vaddr0 - 1;
+    unsigned NumPadding = (-NumExtraAddrs) & 3;
+
+    for (unsigned i = 0; i < NumExtraAddrs; ++i) {
+      getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), Encoding, Fixups,
+                        STI);
+      CB.push_back((uint8_t)Encoding.getLimitedValue());
+    }
+    CB.append(NumPadding, 0);
+  }
+
+  if ((bytes > 8 && STI.hasFeature(AMDGPU::FeatureVOP3Literal)) ||
+      (bytes > 4 && !STI.hasFeature(AMDGPU::FeatureVOP3Literal)))
+    return;
 
-  int Fi = 0;
-  int VdstInIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst_in);
-  bool IsVOP3CvtSrDpp = Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_dpp8_gfx12 ||
-                        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_dpp8_gfx12 ||
-                        Opc == AMDGPU::V_CVT_SR_BF8_F32_gfx12_e64_dpp_gfx12 ||
-                        Opc == AMDGPU::V_CVT_SR_FP8_F32_gfx12_e64_dpp_gfx12;
+  // Do not print literals from SISrc Operands for insts with mandatory literals
+  if (AMDGPU::hasNamedOperand(MI.getOpcode(), AMDGPU::OpName::imm))
+    return;
 
-  for (unsigned E = Operands.size(); I != E; ++I) {
+  // Check for additional literals
+  for (unsigned i = 0, e = Desc.getNumOperands(); i < e; ++i) {
 
-    if (IsMAC) {
-      int NumOperands = Inst.getNumOperands();
-      if (OldIdx == NumOperands) {
-        // Handle old operand
-        constexpr int DST_IDX = 0;
-        Inst.addOperand(Inst.getOperand(DST_IDX));
-      } else if (Src2ModIdx == NumOperands) {
-        // Add unused dummy src2_modifiers
-        Inst.addOperand(MCOperand::createImm(0));
-      }
-    }
+    // Check if this operand should be encoded as [SV]Src
+    if (!AMDGPU::isSISrcOperand(Desc, i))
+      continue;
 
-    if (VdstInIdx == static_cast<int>(Inst.getNumOperands())) {
-      Inst.addOperand(Inst.getOperand(0));
-    }
+    // Is this operand a literal immediate?
+    const MCOperand &Op = MI.getOperand(i);
+    auto Enc = getLitEncoding(Desc, Op, i, STI);
+    if (!Enc || (*Enc != 255 && *Enc != 254))
+      continue;
 
-    if (IsVOP3CvtSrDpp) {
-      if (Src2ModIdx == static_cast<int>(Inst.getNumOperands())) {
-        Inst.addOperand(MCOperand::createImm(0));
-        Inst.addOperand(MCOperand::createReg(MCRegister()));
-      }
-    }
+    // Yes! Encode it
+    int64_t Imm = 0;
 
-    auto TiedTo = Desc.getOperandConstraint(Inst.getNumOperands(),
-                                            MCOI::TIED_TO);
-    if (TiedTo != -1) {
-      assert((unsigned)TiedTo < Inst.getNumOperands());
-      // handle tied old or src2 for MAC instructions
-      Inst.addOperand(Inst.getOperand(TiedTo));
-    }
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]);
-    // Add the register arguments
-    if (IsDPP8 && Op.isDppFI()) {
-      Fi = Op.getImm();
-    } else if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
-      Op.addRegOrImmWithFPInputModsOperands(Inst, 2);
-    } else if (Op.isReg()) {
-      Op.addRegOperands(Inst, 1);
-    } else if (Op.isImm() &&
-               Desc.operands()[Inst.getNumOperands()].RegClass != -1) {
-      Op.addImmOperands(Inst, 1);
-    } else if (Op.isImm()) {
-      OptionalIdx[Op.getImmTy()] = I;
+    bool IsLit = false;
+    if (Op.isImm())
+      Imm = Op.getImm();
+    else if (Op.isExpr()) {
+      if (const auto *C = dyn_cast<MCConstantExpr>(Op.getExpr())) {
+        Imm = C->getValue();
+      } else if (AMDGPU::isLitExpr(Op.getExpr())) {
+        IsLit = true;
+        Imm = AMDGPU::getLitValue(Op.getExpr());
+      }
+    } else // Exprs will be replaced with a fixup value.
+      llvm_unreachable("Must be immediate or expr");
+
+    if (*Enc == 254) {
+      assert(STI.hasFeature(AMDGPU::Feature64BitLiterals));
+      support::endian::write<uint64_t>(CB, Imm, llvm::endianness::little);
     } else {
-      llvm_unreachable("unhandled operand type");
+      auto OpType =
+          static_cast<AMDGPU::OperandType>(Desc.operands()[i].OperandType);
+      Imm = AMDGPU::encode32BitLiteral(Imm, OpType, IsLit);
+      support::endian::write<uint32_t>(CB, Imm, llvm::endianness::little);
     }
-  }
-
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::clamp) && !IsVOP3CvtSrDpp)
-    addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                          AMDGPUOperand::ImmTyClamp);
 
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::byte_sel)) {
-    if (VdstInIdx == static_cast<int>(Inst.getNumOperands()))
-      Inst.addOperand(Inst.getOperand(0));
-    addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                          AMDGPUOperand::ImmTyByteSel);
+    // Only one literal value allowed
+    break;
   }
+}
 
-  if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::omod))
-    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOModSI);
-
-  if (Desc.TSFlags & SIInstrFlags::VOP3P)
-    cvtVOP3P(Inst, Operands, OptionalIdx);
-  else if (Desc.TSFlags & SIInstrFlags::VOP3)
-    cvtVOP3OpSel(Inst, Operands, OptionalIdx);
-  else if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::op_sel)) {
-    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOpSel);
-  }
+void AMDGPUMCCodeEmitter::getSOPPBrEncoding(const MCInst &MI, unsigned OpNo,
+                                            APInt &Op,
+                                            SmallVectorImpl<MCFixup> &Fixups,
+                                            const MCSubtargetInfo &STI) const {
+  const MCOperand &MO = MI.getOperand(OpNo);
 
-  if (IsDPP8) {
-    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDPP8);
-    using namespace llvm::AMDGPU::DPP;
-    Inst.addOperand(MCOperand::createImm(Fi? DPP8_FI_1 : DPP8_FI_0));
+  if (MO.isExpr()) {
+    const MCExpr *Expr = MO.getExpr();
+    addFixup(Fixups, 0, Expr, AMDGPU::fixup_si_sopp_br, true);
+    Op = APInt::getZero(96);
   } else {
-    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppCtrl, 0xe4);
-    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppRowMask, 0xf);
-    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppBankMask, 0xf);
-    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppBoundCtrl);
-
-    if (AMDGPU::hasNamedOperand(Inst.getOpcode(), AMDGPU::OpName::fi))
-      addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                            AMDGPUOperand::ImmTyDppFI);
+    getMachineOpValue(MI, MO, Op, Fixups, STI);
   }
 }
 
-void AMDGPUAsmParser::cvtDPP(MCInst &Inst, const OperandVector &Operands, bool IsDPP8) {
-  OptionalImmIndexMap OptionalIdx;
+void AMDGPUMCCodeEmitter::getSMEMOffsetEncoding(
+    const MCInst &MI, unsigned OpNo, APInt &Op,
+    SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
+  auto Offset = MI.getOperand(OpNo).getImm();
+  // VI only supports 20-bit unsigned offsets.
+  assert(!AMDGPU::isVI(STI) || isUInt<20>(Offset));
+  Op = Offset;
+}
 
-  unsigned I = 1;
-  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
-  for (unsigned J = 0; J < Desc.getNumDefs(); ++J) {
-    ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
-  }
+void AMDGPUMCCodeEmitter::getSDWASrcEncoding(const MCInst &MI, unsigned OpNo,
+                                             APInt &Op,
+                                             SmallVectorImpl<MCFixup> &Fixups,
+                                             const MCSubtargetInfo &STI) const {
+  using namespace AMDGPU::SDWA;
 
-  int Fi = 0;
-  for (unsigned E = Operands.size(); I != E; ++I) {
-    auto TiedTo = Desc.getOperandConstraint(Inst.getNumOperands(),
-                                            MCOI::TIED_TO);
-    if (TiedTo != -1) {
-      assert((unsigned)TiedTo < Inst.getNumOperands());
-      // handle tied old or src2 for MAC instructions
-      Inst.addOperand(Inst.getOperand(TiedTo));
-    }
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]);
-    // Add the register arguments
-    if (Op.isReg() && validateVccOperand(Op.getReg())) {
-      // VOP2b (v_add_u32, v_sub_u32 ...) dpp use "vcc" token.
-      // Skip it.
-      continue;
-    }
+  uint64_t RegEnc = 0;
 
-    if (IsDPP8) {
-      if (Op.isDPP8()) {
-        Op.addImmOperands(Inst, 1);
-      } else if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
-        Op.addRegWithFPInputModsOperands(Inst, 2);
-      } else if (Op.isDppFI()) {
-        Fi = Op.getImm();
-      } else if (Op.isReg()) {
-        Op.addRegOperands(Inst, 1);
-      } else {
-        llvm_unreachable("Invalid operand type");
-      }
-    } else {
-      if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
-        Op.addRegWithFPInputModsOperands(Inst, 2);
-      } else if (Op.isReg()) {
-        Op.addRegOperands(Inst, 1);
-      } else if (Op.isDPPCtrl()) {
-        Op.addImmOperands(Inst, 1);
-      } else if (Op.isImm()) {
-        // Handle optional arguments
-        OptionalIdx[Op.getImmTy()] = I;
-      } else {
-        llvm_unreachable("Invalid operand type");
-      }
-    }
-  }
+  const MCOperand &MO = MI.getOperand(OpNo);
 
-  if (IsDPP8) {
-    using namespace llvm::AMDGPU::DPP;
-    Inst.addOperand(MCOperand::createImm(Fi? DPP8_FI_1 : DPP8_FI_0));
+  if (MO.isReg()) {
+    MCRegister Reg = MO.getReg();
+    RegEnc |= MRI.getEncodingValue(Reg);
+    RegEnc &= SDWA9EncValues::SRC_VGPR_MASK;
+    if (AMDGPU::isSGPR(AMDGPU::mc2PseudoReg(Reg), &MRI)) {
+      RegEnc |= SDWA9EncValues::SRC_SGPR_MASK;
+    }
+    Op = RegEnc;
+    return;
   } else {
-    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppRowMask, 0xf);
-    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppBankMask, 0xf);
-    addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDppBoundCtrl);
-    if (AMDGPU::hasNamedOperand(Inst.getOpcode(), AMDGPU::OpName::fi)) {
-      addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                            AMDGPUOperand::ImmTyDppFI);
+    const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
+    auto Enc = getLitEncoding(Desc, MO, OpNo, STI);
+    if (Enc && *Enc != 255) {
+      Op = *Enc | SDWA9EncValues::SRC_SGPR_MASK;
+      return;
     }
   }
-}
-
-//===----------------------------------------------------------------------===//
-// sdwa
-//===----------------------------------------------------------------------===//
-
-ParseStatus AMDGPUAsmParser::parseSDWASel(OperandVector &Operands,
-                                          StringRef Prefix,
-                                          AMDGPUOperand::ImmTy Type) {
-  return parseStringOrIntWithPrefix(
-      Operands, Prefix,
-      {"BYTE_0", "BYTE_1", "BYTE_2", "BYTE_3", "WORD_0", "WORD_1", "DWORD"},
-      Type);
-}
-
-ParseStatus AMDGPUAsmParser::parseSDWADstUnused(OperandVector &Operands) {
-  return parseStringOrIntWithPrefix(
-      Operands, "dst_unused", {"UNUSED_PAD", "UNUSED_SEXT", "UNUSED_PRESERVE"},
-      AMDGPUOperand::ImmTySDWADstUnused);
-}
 
-void AMDGPUAsmParser::cvtSdwaVOP1(MCInst &Inst, const OperandVector &Operands) {
-  cvtSDWA(Inst, Operands, SIInstrFlags::VOP1);
+  llvm_unreachable("Unsupported operand kind");
 }
 
-void AMDGPUAsmParser::cvtSdwaVOP2(MCInst &Inst, const OperandVector &Operands) {
-  cvtSDWA(Inst, Operands, SIInstrFlags::VOP2);
-}
+void AMDGPUMCCodeEmitter::getSDWAVopcDstEncoding(
+    const MCInst &MI, unsigned OpNo, APInt &Op,
+    SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
+  using namespace AMDGPU::SDWA;
 
-void AMDGPUAsmParser::cvtSdwaVOP2b(MCInst &Inst, const OperandVector &Operands) {
-  cvtSDWA(Inst, Operands, SIInstrFlags::VOP2, true, true);
-}
+  uint64_t RegEnc = 0;
 
-void AMDGPUAsmParser::cvtSdwaVOP2e(MCInst &Inst, const OperandVector &Operands) {
-  cvtSDWA(Inst, Operands, SIInstrFlags::VOP2, false, true);
-}
+  const MCOperand &MO = MI.getOperand(OpNo);
 
-void AMDGPUAsmParser::cvtSdwaVOPC(MCInst &Inst, const OperandVector &Operands) {
-  cvtSDWA(Inst, Operands, SIInstrFlags::VOPC, isVI());
+  MCRegister Reg = MO.getReg();
+  if (Reg != AMDGPU::VCC && Reg != AMDGPU::VCC_LO) {
+    RegEnc |= MRI.getEncodingValue(Reg);
+    RegEnc &= SDWA9EncValues::VOPC_DST_SGPR_MASK;
+    RegEnc |= SDWA9EncValues::VOPC_DST_VCC_MASK;
+  }
+  Op = RegEnc;
 }
 
-void AMDGPUAsmParser::cvtSDWA(MCInst &Inst, const OperandVector &Operands,
-                              uint64_t BasicInstType,
-                              bool SkipDstVcc,
-                              bool SkipSrcVcc) {
-  using namespace llvm::AMDGPU::SDWA;
+void AMDGPUMCCodeEmitter::getAVOperandEncoding(
+    const MCInst &MI, unsigned OpNo, APInt &Op,
+    SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
+  MCRegister Reg = MI.getOperand(OpNo).getReg();
+  unsigned Enc = MRI.getEncodingValue(Reg);
+  unsigned Idx = Enc & AMDGPU::HWEncoding::LO256_REG_IDX_MASK;
+  bool IsVGPROrAGPR =
+      Enc & (AMDGPU::HWEncoding::IS_VGPR | AMDGPU::HWEncoding::IS_AGPR);
 
-  OptionalImmIndexMap OptionalIdx;
-  bool SkipVcc = SkipDstVcc || SkipSrcVcc;
-  bool SkippedVcc = false;
+  // VGPR and AGPR have the same encoding, but SrcA and SrcB operands of mfma
+  // instructions use acc[0:1] modifier bits to distinguish. These bits are
+  // encoded as a virtual 9th bit of the register for these operands.
+  bool IsAGPR = Enc & AMDGPU::HWEncoding::IS_AGPR;
 
-  unsigned I = 1;
-  const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
-  for (unsigned J = 0; J < Desc.getNumDefs(); ++J) {
-    ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
-  }
+  Op = Idx | (IsVGPROrAGPR << 8) | (IsAGPR << 9);
+}
 
-  for (unsigned E = Operands.size(); I != E; ++I) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]);
-    if (SkipVcc && !SkippedVcc && Op.isReg() &&
-        (Op.getReg() == AMDGPU::VCC || Op.getReg() == AMDGPU::VCC_LO)) {
-      // VOP2b (v_add_u32, v_sub_u32 ...) sdwa use "vcc" token as dst.
-      // Skip it if it's 2nd (e.g. v_add_i32_sdwa v1, vcc, v2, v3)
-      // or 4th (v_addc_u32_sdwa v1, vcc, v2, v3, vcc) operand.
-      // Skip VCC only if we didn't skip it on previous iteration.
-      // Note that src0 and src1 occupy 2 slots each because of modifiers.
-      if (BasicInstType == SIInstrFlags::VOP2 &&
-          ((SkipDstVcc && Inst.getNumOperands() == 1) ||
-           (SkipSrcVcc && Inst.getNumOperands() == 5))) {
-        SkippedVcc = true;
-        continue;
-      }
-      if (BasicInstType == SIInstrFlags::VOPC && Inst.getNumOperands() == 0) {
-        SkippedVcc = true;
-        continue;
-      }
-    }
-    if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
-      Op.addRegOrImmWithInputModsOperands(Inst, 2);
-    } else if (Op.isImm()) {
-      // Handle optional arguments
-      OptionalIdx[Op.getImmTy()] = I;
-    } else {
-      llvm_unreachable("Invalid operand type");
-    }
-    SkippedVcc = false;
+static bool needsPCRel(const MCExpr *Expr) {
+  switch (Expr->getKind()) {
+  case MCExpr::SymbolRef: {
+    auto *SE = cast<MCSymbolRefExpr>(Expr);
+    auto Spec = AMDGPU::getSpecifier(SE);
+    return Spec != AMDGPUMCExpr::S_ABS32_LO &&
+           Spec != AMDGPUMCExpr::S_ABS32_HI && Spec != AMDGPUMCExpr::S_ABS64;
   }
-
-  const unsigned Opc = Inst.getOpcode();
-  if (Opc != AMDGPU::V_NOP_sdwa_gfx10 && Opc != AMDGPU::V_NOP_sdwa_gfx9 &&
-      Opc != AMDGPU::V_NOP_sdwa_vi) {
-    // v_nop_sdwa_sdwa_vi/gfx9 has no optional sdwa arguments
-    switch (BasicInstType) {
-    case SIInstrFlags::VOP1:
-      if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::clamp))
-        addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                              AMDGPUOperand::ImmTyClamp, 0);
-
-      if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::omod))
-        addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                              AMDGPUOperand::ImmTyOModSI, 0);
-
-      if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::dst_sel))
-        addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                              AMDGPUOperand::ImmTySDWADstSel, SdwaSel::DWORD);
-
-      if (AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::dst_unused))
-        addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                              AMDGPUOperand::ImmTySDWADstUnused,
-                              DstUnused::UNUSED_PRESERVE);
-
-      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWASrc0Sel, SdwaSel::DWORD);
-      break;
-
-    case SIInstrFlags::VOP2:
-      addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                            AMDGPUOperand::ImmTyClamp, 0);
-
-      if (AMDGPU::hasNamedOperand(Inst.getOpcode(), AMDGPU::OpName::omod))
-        addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOModSI, 0);
-
-      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWADstSel, SdwaSel::DWORD);
-      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWADstUnused, DstUnused::UNUSED_PRESERVE);
-      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWASrc0Sel, SdwaSel::DWORD);
-      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWASrc1Sel, SdwaSel::DWORD);
-      break;
-
-    case SIInstrFlags::VOPC:
-      if (AMDGPU::hasNamedOperand(Inst.getOpcode(), AMDGPU::OpName::clamp))
-        addOptionalImmOperand(Inst, Operands, OptionalIdx,
-                              AMDGPUOperand::ImmTyClamp, 0);
-      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWASrc0Sel, SdwaSel::DWORD);
-      addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySDWASrc1Sel, SdwaSel::DWORD);
-      break;
-
-    default:
-      llvm_unreachable("Invalid instruction type. Only VOP1, VOP2 and VOPC allowed");
-    }
+  case MCExpr::Binary: {
+    auto *BE = cast<MCBinaryExpr>(Expr);
+    if (BE->getOpcode() == MCBinaryExpr::Sub)
+      return false;
+    return needsPCRel(BE->getLHS()) || needsPCRel(BE->getRHS());
   }
-
-  // special case v_mac_{f16, f32}:
-  // it has src2 register operand that is tied to dst operand
-  if (Inst.getOpcode() == AMDGPU::V_MAC_F32_sdwa_vi ||
-      Inst.getOpcode() == AMDGPU::V_MAC_F16_sdwa_vi)  {
-    auto *it = Inst.begin();
-    std::advance(
-      it, AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::src2));
-    Inst.insert(it, Inst.getOperand(0)); // src2 = dst
+  case MCExpr::Unary:
+    return needsPCRel(cast<MCUnaryExpr>(Expr)->getSubExpr());
+  case MCExpr::Specifier:
+  case MCExpr::Target:
+  case MCExpr::Constant:
+    return false;
   }
+  llvm_unreachable("invalid kind");
 }
 
-/// Force static initialization.
-extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void
-LLVMInitializeAMDGPUAsmParser() {
-  RegisterMCAsmParser<AMDGPUAsmParser> A(getTheR600Target());
-  RegisterMCAsmParser<AMDGPUAsmParser> B(getTheGCNTarget());
+void AMDGPUMCCodeEmitter::getMachineOpValue(const MCInst &MI,
+                                            const MCOperand &MO, APInt &Op,
+                                            SmallVectorImpl<MCFixup> &Fixups,
+                                            const MCSubtargetInfo &STI) const {
+  if (MO.isReg()){
+    unsigned Enc = MRI.getEncodingValue(MO.getReg());
+    unsigned Idx = Enc & AMDGPU::HWEncoding::LO256_REG_IDX_MASK;
+    bool IsVGPROrAGPR =
+        Enc & (AMDGPU::HWEncoding::IS_VGPR | AMDGPU::HWEncoding::IS_AGPR);
+    Op = Idx | (IsVGPROrAGPR << 8);
+    return;
+  }
+  unsigned OpNo = &MO - MI.begin();
+  getMachineOpValueCommon(MI, MO, OpNo, Op, Fixups, STI);
 }
 
-#define GET_MATCHER_IMPLEMENTATION
-#define GET_MNEMONIC_SPELL_CHECKER
-#define GET_MNEMONIC_CHECKER
-#include "AMDGPUGenAsmMatcher.inc"
-
-ParseStatus AMDGPUAsmParser::parseCustomOperand(OperandVector &Operands,
-                                                unsigned MCK) {
-  switch (MCK) {
-  case MCK_addr64:
-    return parseTokenOp("addr64", Operands);
-  case MCK_done:
-    return parseNamedBit("done", Operands, AMDGPUOperand::ImmTyDone, true);
-  case MCK_idxen:
-    return parseTokenOp("idxen", Operands);
-  case MCK_lds:
-    return parseTokenOp("lds", Operands);
-  case MCK_offen:
-    return parseTokenOp("offen", Operands);
-  case MCK_off:
-    return parseTokenOp("off", Operands);
-  case MCK_row_95_en:
-    return parseNamedBit("row_en", Operands, AMDGPUOperand::ImmTyRowEn, true);
-  case MCK_gds:
-    return parseNamedBit("gds", Operands, AMDGPUOperand::ImmTyGDS);
-  case MCK_tfe:
-    return parseNamedBit("tfe", Operands, AMDGPUOperand::ImmTyTFE);
+void AMDGPUMCCodeEmitter::getMachineOpValueT16(
+    const MCInst &MI, unsigned OpNo, APInt &Op,
+    SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
+  const MCOperand &MO = MI.getOperand(OpNo);
+  if (MO.isReg()) {
+    unsigned Enc = MRI.getEncodingValue(MO.getReg());
+    unsigned Idx = Enc & AMDGPU::HWEncoding::REG_IDX_MASK;
+    bool IsVGPR = Enc & AMDGPU::HWEncoding::IS_VGPR;
+    Op = Idx | (IsVGPR << 8);
+    return;
   }
-  return tryCustomParseOperand(Operands, MCK);
+  getMachineOpValueCommon(MI, MO, OpNo, Op, Fixups, STI);
+  // VGPRs include the suffix/op_sel bit in the register encoding, but
+  // immediates and SGPRs include it in src_modifiers. Therefore, copy the
+  // op_sel bit from the src operands into src_modifier operands if Op is
+  // src_modifiers and the corresponding src is a VGPR
+  int SrcMOIdx = -1;
+  assert(OpNo < INT_MAX);
+  if ((int)OpNo == AMDGPU::getNamedOperandIdx(MI.getOpcode(),
+                                              AMDGPU::OpName::src0_modifiers)) {
+    SrcMOIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0);
+    int VDstMOIdx =
+        AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vdst);
+    if (VDstMOIdx != -1) {
+      auto DstReg = MI.getOperand(VDstMOIdx).getReg();
+      if (AMDGPU::isHi16Reg(DstReg, MRI))
+        Op |= SISrcMods::DST_OP_SEL;
+    }
+  } else if ((int)OpNo == AMDGPU::getNamedOperandIdx(
+                              MI.getOpcode(), AMDGPU::OpName::src1_modifiers))
+    SrcMOIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src1);
+  else if ((int)OpNo == AMDGPU::getNamedOperandIdx(
+                            MI.getOpcode(), AMDGPU::OpName::src2_modifiers))
+    SrcMOIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src2);
+  if (SrcMOIdx == -1)
+    return;
+
+  const MCOperand &SrcMO = MI.getOperand(SrcMOIdx);
+  if (!SrcMO.isReg())
+    return;
+  auto SrcReg = SrcMO.getReg();
+  if (AMDGPU::isSGPR(SrcReg, &MRI))
+    return;
+  if (AMDGPU::isHi16Reg(SrcReg, MRI))
+    Op |= SISrcMods::OP_SEL_0;
 }
 
-// This function should be defined after auto-generated include so that we have
-// MatchClassKind enum defined
-unsigned AMDGPUAsmParser::validateTargetOperandClass(MCParsedAsmOperand &Op,
-                                                     unsigned Kind) {
-  // Tokens like "glc" would be parsed as immediate operands in ParseOperand().
-  // But MatchInstructionImpl() expects to meet token and fails to validate
-  // operand. This method checks if we are given immediate operand but expect to
-  // get corresponding token.
-  AMDGPUOperand &Operand = (AMDGPUOperand&)Op;
-  switch (Kind) {
-  case MCK_addr64:
-    return Operand.isAddr64() ? Match_Success : Match_InvalidOperand;
-  case MCK_gds:
-    return Operand.isGDS() ? Match_Success : Match_InvalidOperand;
-  case MCK_lds:
-    return Operand.isLDS() ? Match_Success : Match_InvalidOperand;
-  case MCK_idxen:
-    return Operand.isIdxen() ? Match_Success : Match_InvalidOperand;
-  case MCK_offen:
-    return Operand.isOffen() ? Match_Success : Match_InvalidOperand;
-  case MCK_tfe:
-    return Operand.isTFE() ? Match_Success : Match_InvalidOperand;
-  case MCK_done:
-    return Operand.isDone() ? Match_Success : Match_InvalidOperand;
-  case MCK_row_95_en:
-    return Operand.isRowEn() ? Match_Success : Match_InvalidOperand;
-  case MCK_SSrc_b32:
-    // When operands have expression values, they will return true for isToken,
-    // because it is not possible to distinguish between a token and an
-    // expression at parse time. MatchInstructionImpl() will always try to
-    // match an operand as a token, when isToken returns true, and when the
-    // name of the expression is not a valid token, the match will fail,
-    // so we need to handle it here.
-    return Operand.isSSrc_b32() ? Match_Success : Match_InvalidOperand;
-  case MCK_SSrc_f32:
-    return Operand.isSSrc_f32() ? Match_Success : Match_InvalidOperand;
-  case MCK_SOPPBrTarget:
-    return Operand.isSOPPBrTarget() ? Match_Success : Match_InvalidOperand;
-  case MCK_VReg32OrOff:
-    return Operand.isVReg32OrOff() ? Match_Success : Match_InvalidOperand;
-  case MCK_InterpSlot:
-    return Operand.isInterpSlot() ? Match_Success : Match_InvalidOperand;
-  case MCK_InterpAttr:
-    return Operand.isInterpAttr() ? Match_Success : Match_InvalidOperand;
-  case MCK_InterpAttrChan:
-    return Operand.isInterpAttrChan() ? Match_Success : Match_InvalidOperand;
-  case MCK_SReg_64:
-  case MCK_SReg_64_XEXEC:
-    // Null is defined as a 32-bit register but
-    // it should also be enabled with 64-bit operands or larger.
-    // The following code enables it for SReg_64 and larger operands
-    // used as source and destination. Remaining source
-    // operands are handled in isInlinableImm.
-  case MCK_SReg_96:
-  case MCK_SReg_128:
-  case MCK_SReg_256:
-  case MCK_SReg_512:
-    return Operand.isNull() ? Match_Success : Match_InvalidOperand;
-  default:
-    return Match_InvalidOperand;
+void AMDGPUMCCodeEmitter::getMachineOpValueT16Lo128(
+    const MCInst &MI, unsigned OpNo, APInt &Op,
+    SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
+  const MCOperand &MO = MI.getOperand(OpNo);
+  if (MO.isReg()) {
+    uint16_t Encoding = MRI.getEncodingValue(MO.getReg());
+    unsigned RegIdx = Encoding & AMDGPU::HWEncoding::LO256_REG_IDX_MASK;
+    bool IsHi = Encoding & AMDGPU::HWEncoding::IS_HI16;
+    bool IsVGPR = Encoding & AMDGPU::HWEncoding::IS_VGPR;
+    assert((!IsVGPR || isUInt<7>(RegIdx)) && "VGPR0-VGPR127 expected!");
+    Op = (IsVGPR ? 0x100 : 0) | (IsHi ? 0x80 : 0) | RegIdx;
+    return;
   }
+  getMachineOpValueCommon(MI, MO, OpNo, Op, Fixups, STI);
 }
 
-//===----------------------------------------------------------------------===//
-// endpgm
-//===----------------------------------------------------------------------===//
+void AMDGPUMCCodeEmitter::getMachineOpValueCommon(
+    const MCInst &MI, const MCOperand &MO, unsigned OpNo, APInt &Op,
+    SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
+  bool isLikeImm = false;
+  int64_t Val;
 
-ParseStatus AMDGPUAsmParser::parseEndpgm(OperandVector &Operands) {
-  SMLoc S = getLoc();
-  int64_t Imm = 0;
+  if (MO.isImm()) {
+    Val = MO.getImm();
+    isLikeImm = true;
+  } else if (MO.isExpr() && MO.getExpr()->evaluateAsAbsolute(Val)) {
+    isLikeImm = true;
+  } else if (MO.isExpr()) {
+    // FIXME: If this is expression is PCRel or not should not depend on what
+    // the expression looks like. Given that this is just a general expression,
+    // it should probably be FK_Data_4 and whatever is producing
+    //
+    //    s_add_u32 s2, s2, (extern_const_addrspace+16
+    //
+    // And expecting a PCRel should instead produce
+    //
+    // .Ltmp1:
+    //   s_add_u32 s2, s2, (extern_const_addrspace+16)-.Ltmp1
+    bool PCRel = needsPCRel(MO.getExpr());
+    const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
+    uint32_t Offset = Desc.getSize();
+    assert(Offset == 4 || Offset == 8);
+    unsigned Size = AMDGPU::getOperandSize(Desc, OpNo);
+    MCFixupKind Kind = MCFixup::getDataKindForSize(Size);
+    addFixup(Fixups, Offset, MO.getExpr(), Kind, PCRel);
+  }
+
+  const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
+  if (AMDGPU::isSISrcOperand(Desc, OpNo)) {
+    bool HasMandatoryLiteral =
+        AMDGPU::hasNamedOperand(MI.getOpcode(), AMDGPU::OpName::imm);
+    if (auto Enc = getLitEncoding(Desc, MO, OpNo, STI, HasMandatoryLiteral)) {
+      Op = *Enc;
+      return;
+    }
 
-  if (!parseExpr(Imm)) {
-    // The operand is optional, if not present default to 0
-    Imm = 0;
+    llvm_unreachable("Operand not supported for SISrc");
   }
 
-  if (!isUInt<16>(Imm))
-    return Error(S, "expected a 16-bit value");
-
-  Operands.push_back(
-      AMDGPUOperand::CreateImm(this, Imm, S, AMDGPUOperand::ImmTyEndpgm));
-  return ParseStatus::Success;
-}
-
-bool AMDGPUOperand::isEndpgm() const { return isImmTy(ImmTyEndpgm); }
-
-//===----------------------------------------------------------------------===//
-// Split Barrier
-//===----------------------------------------------------------------------===//
+  if (isLikeImm) {
+    Op = Val;
+    return;
+  }
 
-bool AMDGPUOperand::isSplitBarrier() const { return isInlinableImm(MVT::i32); }
+  llvm_unreachable("Encoding of this operand type is not supported yet.");
+}
+
+template <bool HasSrc0, bool HasSrc1, bool HasSrc2>
+APInt AMDGPUMCCodeEmitter::postEncodeVOP3(const MCInst &MI, APInt EncodedValue,
+                                          const MCSubtargetInfo &STI) const {
+  if (!AMDGPU::isGFX10Plus(STI))
+    return EncodedValue;
+  // Set unused source fields in VOP3 encodings to inline immediate 0 to avoid
+  // hardware conservatively assuming the instruction reads SGPRs.
+  constexpr uint64_t InlineImmediate0 = 0x80;
+  if (!HasSrc0)
+    EncodedValue |= InlineImmediate0 << 32;
+  if (!HasSrc1)
+    EncodedValue |= InlineImmediate0 << 41;
+  if (!HasSrc2)
+    EncodedValue |= InlineImmediate0 << 50;
+  return EncodedValue;
+}
+
+APInt AMDGPUMCCodeEmitter::postEncodeVOPCX(const MCInst &MI, APInt EncodedValue,
+                                           const MCSubtargetInfo &STI) const {
+  // GFX10+ v_cmpx opcodes promoted to VOP3 have implied dst=EXEC.
+  // Documentation requires dst to be encoded as EXEC (0x7E),
+  // but it looks like the actual value encoded for dst operand
+  // is ignored by HW. It was decided to define dst as "do not care"
+  // in td files to allow disassembler accept any dst value.
+  // However, dst is encoded as EXEC for compatibility with SP3.
+  [[maybe_unused]] const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
+  assert((Desc.TSFlags & SIInstrFlags::VOP3) &&
+         Desc.hasImplicitDefOfPhysReg(AMDGPU::EXEC));
+  EncodedValue |= MRI.getEncodingValue(AMDGPU::EXEC_LO) &
+                  AMDGPU::HWEncoding::LO256_REG_IDX_MASK;
+  return postEncodeVOP3<true, true, false>(MI, EncodedValue, STI);
+}
+
+#include "AMDGPUGenMCCodeEmitter.inc"



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