[clang] [clang][DirectX] Specify element-aligned vectors in TargetInfo (PR #185954)

[Justin Bogner via cfe-commits]

================
@@ -64,106 +64,106 @@ int16_t3 test_mad_int16_t3(int16_t3 p0, int16_t3 p1, int16_t3 p2) { return mad(p
 int16_t4 test_mad_int16_t4(int16_t4 p0, int16_t4 p1, int16_t4 p2) { return mad(p0, p1, p2); }
 #endif // __HLSL_ENABLE_16_BIT
 
-// NATIVE_HALF: %[[p0:.*]] = load half, ptr %p0.addr, align 2
-// NATIVE_HALF: %[[p1:.*]] = load half, ptr %p1.addr, align 2
-// NATIVE_HALF: %[[p2:.*]] = load half, ptr %p2.addr, align 2
+// NATIVE_HALF: %[[p0:.*]] = load half, ptr %p0.addr
+// NATIVE_HALF: %[[p1:.*]] = load half, ptr %p1.addr
+// NATIVE_HALF: %[[p2:.*]] = load half, ptr %p2.addr
 // NATIVE_HALF: %hlsl.fmad = call reassoc nnan ninf nsz arcp afn half @llvm.fmuladd.f16(half %[[p0]], half %[[p1]], half %[[p2]])
 // NATIVE_HALF: ret half %hlsl.fmad
-// NO_HALF: %[[p0:.*]] = load float, ptr %p0.addr, align 4
-// NO_HALF: %[[p1:.*]] = load float, ptr %p1.addr, align 4
-// NO_HALF: %[[p2:.*]] = load float, ptr %p2.addr, align 4
+// NO_HALF: %[[p0:.*]] = load float, ptr %p0.addr
+// NO_HALF: %[[p1:.*]] = load float, ptr %p1.addr
+// NO_HALF: %[[p2:.*]] = load float, ptr %p2.addr
 // NO_HALF: %hlsl.fmad = call reassoc nnan ninf nsz arcp afn float @llvm.fmuladd.f32(float %[[p0]], float %[[p1]], float %[[p2]])
 // NO_HALF: ret float %hlsl.fmad
 half test_mad_half(half p0, half p1, half p2) { return mad(p0, p1, p2); }
 
-// NATIVE_HALF: %[[p0:.*]] = load <2 x half>, ptr %p0.addr, align 4
----------------
bogner wrote:

Partially because it isn't relevant to the test, and partially because it can differ between targets. Omitting the alignment here should reduce test churn.

https://github.com/llvm/llvm-project/pull/185954