[clang] [CIR][AArch64] Lower BF16 vduph lane builtins (PR #185852)

[Andrzej Warzyński via cfe-commits]

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@@ -0,0 +1,25 @@
+// REQUIRES: aarch64-registered-target || arm-registered-target
+
+// RUN:                   %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -target-feature +bf16 -disable-O0-optnone -flax-vector-conversions=none           -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=LLVM
+// RUN: %if cir-enabled %{%clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -target-feature +bf16 -disable-O0-optnone -flax-vector-conversions=none -fclangir -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=LLVM %}
+// RUN: %if cir-enabled %{%clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -target-feature +bf16 -disable-O0-optnone -flax-vector-conversions=none -fclangir -emit-cir  -o - %s |                               FileCheck %s --check-prefixes=CIR %}
+
+#include <arm_neon.h>
+
----------------
banach-space wrote:

Could you add a block comment like this: https://github.com/llvm/llvm-project/blob/3b3f3730351cd59a849663700b07d7643a7f74a1/clang/test/CodeGen/AArch64/neon/intrinsics.c?plain=1#L38-L40

? Please include a TOOD, e.g.:
```
// TOOD: Add the remaining intrinsics from this group.
```

https://github.com/llvm/llvm-project/pull/185852