[clang] [llvm] [RISCV] Add `sifive-x160` and `sifive-x180` processor definitions (PR #186264)

[Pengcheng Wang via cfe-commits]

https://github.com/wangpc-pp commented:

Please add a release note.

And, there is a problem that made me confused at first. The PR description and the core specs both say these two cores are `RV32I/RV64I`+RVV, but actually they are not only `rv32i` or `rv64i` (they are almost RVA22+V I think). I don't know if this is a misuse of terminology.

https://github.com/llvm/llvm-project/pull/186264