[clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)

[Alexander Johnston via cfe-commits]

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@@ -0,0 +1,98 @@
+// RUN: %clang_cc1 -finclude-default-header  -x hlsl  -triple dxil-pc-shadermodel6.0-library %s \
+// RUN:  -emit-llvm -disable-llvm-passes -o - -DINTERLOCKED32 | \
+// RUN:  FileCheck %s --check-prefixes=CHECK-32
+// RUN: %clang_cc1 -finclude-default-header  -x hlsl  -triple dxil-pc-shadermodel6.6-library %s \
+// RUN:  -emit-llvm -disable-llvm-passes -o - -DINTERLOCKED64 | \
+// RUN:  FileCheck %s --check-prefixes=CHECK-64
+
+RWByteAddressBuffer buf: register(u0);
+
+// CHECK: %"class.hlsl::RWByteAddressBuffer" = type { target("dx.RawBuffer", i8, 1, 0) }
+
+#ifdef INTERLOCKED32
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Alexander-Johnston wrote:

I'd left these in by accident from my own bug fixing. Removed.

https://github.com/llvm/llvm-project/pull/180804