[clang] [RISCV] Add riscv_packed.h for P extension intrinsics (PR #181115)

[via cfe-commits]

================
@@ -0,0 +1,98 @@
+/*===---- riscv_packed.h - RISC-V P intrinsics -----------------------------===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===-----------------------------------------------------------------------===
+ */
+
+#ifndef __RISCV_PACKED_H
+#define __RISCV_PACKED_H
+
+#include <stdint.h>
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/* Packed SIMD Types */
+
+typedef int8_t int8x4_t __attribute__((__vector_size__(4), __aligned__(4)));
+typedef uint8_t uint8x4_t __attribute__((__vector_size__(4), __aligned__(4)));
+typedef int16_t int16x2_t __attribute__((__vector_size__(4), __aligned__(4)));
+typedef uint16_t uint16x2_t __attribute__((__vector_size__(4), __aligned__(4)));
+
+typedef int8_t int8x8_t __attribute__((__vector_size__(8), __aligned__(8)));
+typedef uint8_t uint8x8_t __attribute__((__vector_size__(8), __aligned__(8)));
+typedef int16_t int16x4_t __attribute__((__vector_size__(8), __aligned__(8)));
+typedef uint16_t uint16x4_t __attribute__((__vector_size__(8), __aligned__(8)));
+typedef int32_t int32x2_t __attribute__((__vector_size__(8), __aligned__(8)));
+typedef uint32_t uint32x2_t __attribute__((__vector_size__(8), __aligned__(8)));
+
+#define __packed_binop(name, retty, ty1, ty2, op)                              \
+  static __inline__ retty __attribute__((__always_inline__, __nodebug__))      \
+  __riscv_##name(ty1 __rs1, ty2 __rs2) {                                       \
+    return __rs1 op __rs2;                                                     \
+  }
+
+#define __packed_addsub(name, ty, op) __packed_binop(name, ty, ty, ty, op)
+#define __packed_shift(name, ty, op) __packed_binop(name, ty, ty, unsigned, op)
----------------
sihuan wrote:

I've refactored the macros and added explicit masks (0x7, 0xf, 0x1f) for the shift amounts to prevent  UB.

https://github.com/llvm/llvm-project/pull/181115