[clang] [CIR][AArch64] Lower BF16 vduph lane builtins (PR #185852)

[Jiahao Guo via cfe-commits]

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@@ -2824,6 +2822,16 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr,
     return mlir::Value{};
   }
 
+  switch (builtinID) {
+  default:
+    break;
+  case NEON::BI__builtin_neon_vduph_lane_bf16:
+  case NEON::BI__builtin_neon_vduph_laneq_bf16: {
+    uint64_t index = getZExtIntValueFromConstOp(ops[1]);
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E00N777 wrote:

Thanks for the suggestions. I've updated the lowering to use the earlier switch for the lane-extract family.

https://github.com/llvm/llvm-project/pull/185852