[clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)

[Derek Schuff via cfe-commits]

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@@ -548,6 +578,65 @@ bool WebAssemblyDAGToDAGISel::SelectAddrOperands64(SDValue Op, SDValue &Offset,
   return SelectAddrOperands(MVT::i64, WebAssembly::CONST_I64, Op, Offset, Addr);
 }
 
+static MemSDNode *findMemSDNode(SDNode *N) {
+  while (N) {
+    if (auto *MemNode = dyn_cast<MemSDNode>(N))
+      return MemNode;
+    switch (N->getOpcode()) {
+    case ISD::ZERO_EXTEND:
+    case ISD::SIGN_EXTEND:
+    case ISD::ANY_EXTEND:
+    case ISD::SIGN_EXTEND_INREG:
+    case ISD::AssertZext:
+    case ISD::AssertSext:
+    case ISD::TRUNCATE:
+    case ISD::BITCAST:
+    case ISD::AND:
+      N = N->getOperand(0).getNode();
+      break;
+    default:
+      return nullptr;
+    }
----------------
dschuff wrote:

The root can be anything that the pattern matches (in this case AtomicAddrOps32). And it matches the whole set of complex patterns (e.g. the AtomicAddrOps fragment is included in the AtomicLoadPat pattern which is included in the zext_aload_8_64 pattern, which matches a zext of an atomic load. So in that case we'd get ISD::ZERO_EXTEND here. So I don't know of a way to enumerate all the possibilities. I looked through the patterns and didn't see anything there that's not listed here, but I don't see e.g. bitcast in there (but it still seems worth having here). And even worse, the possibilities can change if we add or change the patterns :/


https://github.com/llvm/llvm-project/pull/184900