[clang] [CIR] Add cir.signbit to tablegen (PR #184091)

[Yeongu Choe via cfe-commits]

https://github.com/YeonguChoe updated https://github.com/llvm/llvm-project/pull/184091

>From 0ff65c212b42b0b54df1822317412019ab0903d6 Mon Sep 17 00:00:00 2001
From: YeonguChoe <yeongu.choe at icloud.com>
Date: Fri, 6 Mar 2026 02:17:35 -0500
Subject: [PATCH] [CIR][CodeGen] Implement __builtin__signbit(x)

The signbit CIR generation was implemented, but C/C++ API was not implemented, so I implemented.
---
 clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp       |  9 +++-
 .../CIR/CodeGenBuiltins/builtin-signbit.cpp   | 51 +++++++++++++++++++
 2 files changed, 59 insertions(+), 1 deletion(-)
 create mode 100644 clang/test/CIR/CodeGenBuiltins/builtin-signbit.cpp

diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
index 17056c0edbe0b..8b795ed454d2c 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
@@ -1822,7 +1822,14 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
   case Builtin::BI__scoped_atomic_thread_fence:
   case Builtin::BI__builtin_signbit:
   case Builtin::BI__builtin_signbitf:
-  case Builtin::BI__builtin_signbitl:
+  case Builtin::BI__builtin_signbitl: {
+    CIRGenFunction::CIRGenFPOptionsRAII FPOptsRAII(*this, e);
+    mlir::Location loc = getLoc(e->getBeginLoc());
+    mlir::Value v = emitScalarExpr(e->getArg(0));
+    mlir::Value signbit = emitSignBit(loc, *this, v);
+    return RValue::get(
+        builder.createBoolToInt(signbit, convertType(e->getType())));
+  }
   case Builtin::BI__warn_memset_zero_len:
   case Builtin::BI__annotation:
   case Builtin::BI__builtin_annotation:
diff --git a/clang/test/CIR/CodeGenBuiltins/builtin-signbit.cpp b/clang/test/CIR/CodeGenBuiltins/builtin-signbit.cpp
new file mode 100644
index 0000000000000..a74914df262d3
--- /dev/null
+++ b/clang/test/CIR/CodeGenBuiltins/builtin-signbit.cpp
@@ -0,0 +1,51 @@
+// RUN: %clang_cc1 -fclangir -emit-cir %s -o %t.cir
+// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR
+// RUN: %clang_cc1 -fclangir -emit-llvm %s -o %t.cir.ll
+// RUN: FileCheck --input-file=%t.cir.ll %s -check-prefix=LLVM
+// RUN: %clang_cc1 -emit-llvm %s -o %t.ll
+// RUN: FileCheck --input-file=%t.ll %s -check-prefix=LLVM
+
+int test_signbit_float(float x) {
+  return __builtin_signbit(x);
+}
+// CIR: cir.signbit %{{.*}} : !cir.float -> !cir.bool
+// LLVM: bitcast float {{.*}} to i32
+// LLVM: icmp slt i32 {{.*}}, 0
+// LLVM: zext i1 {{.*}} to i32
+// LLVM: ret i32
+
+int test_signbit_double(double x) {
+  return __builtin_signbit(x);
+}
+// CIR: cir.signbit %{{.*}} : !cir.double -> !cir.bool
+// LLVM: bitcast double {{.*}} to i64
+// LLVM: icmp slt i64 {{.*}}, 0
+// LLVM: zext i1 {{.*}} to i32
+// LLVM: ret i32
+
+int test_signbit_long_double(long double x) {
+  return __builtin_signbit(x);
+}
+// CIR: cir.signbit %{{.*}} : !cir.long_double<!cir.f80> -> !cir.bool
+// LLVM: bitcast x86_fp80 {{.*}} to i80
+// LLVM: icmp slt i80 {{.*}}, 0
+// LLVM: zext i1 {{.*}} to i32
+// LLVM: ret i32
+
+int test_signbitf(float x) {
+  return __builtin_signbitf(x);
+}
+// CIR: cir.signbit %{{.*}} : !cir.float -> !cir.bool
+// LLVM: bitcast float {{.*}} to i32
+// LLVM: icmp slt i32 {{.*}}, 0
+// LLVM: zext i1 {{.*}} to i32
+// LLVM: ret i32
+
+int test_signbitl(long double x) {
+  return __builtin_signbitl(x);
+}
+// CIR: cir.signbit %{{.*}} : !cir.long_double<!cir.f80> -> !cir.bool
+// LLVM: bitcast x86_fp80 {{.*}} to i80
+// LLVM: icmp slt i80 {{.*}}, 0
+// LLVM: zext i1 {{.*}} to i32
+// LLVM: ret i32
\ No newline at end of file