[clang] [RISCV] Disable rounding of aggregate return/arguments to iXLen. (PR #184736)
Craig Topper via cfe-commits
cfe-commits at lists.llvm.org
Thu Mar 5 08:47:58 PST 2026
https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/184736
>From bca34933767d44f721e345a96d3146387a51032c Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 4 Mar 2026 20:42:24 -0800
Subject: [PATCH 1/3] [RISCV] Disable rounding of aggregate return/arguments to
iXLen.
If the type is rounded to iXLen, an additional zext instruction
is generated. For example, https://godbolt.org/z/bG7vG4dvM
I'm not 100% sure there's not some reason we need to do this widening.
---
clang/lib/CodeGen/Targets/RISCV.cpp | 20 +++--
clang/test/CodeGen/RISCV/abi-empty-structs.c | 56 ++++++------
clang/test/CodeGen/RISCV/bfloat-abi.c | 32 +++----
clang/test/CodeGen/RISCV/riscv32-abi.c | 16 ++--
clang/test/CodeGen/RISCV/riscv64-abi.c | 90 ++++++++++----------
5 files changed, 103 insertions(+), 111 deletions(-)
diff --git a/clang/lib/CodeGen/Targets/RISCV.cpp b/clang/lib/CodeGen/Targets/RISCV.cpp
index d1345891e9fb6..a8f0a7941cd0b 100644
--- a/clang/lib/CodeGen/Targets/RISCV.cpp
+++ b/clang/lib/CodeGen/Targets/RISCV.cpp
@@ -721,18 +721,22 @@ ABIArgInfo RISCVABIInfo::classifyArgumentType(QualType Ty, bool IsFixed,
if (Size <= 2 * XLen) {
unsigned Alignment = getContext().getTypeAlign(Ty);
- // Use a single XLen int if possible, 2*XLen if 2*XLen alignment is
- // required, and a 2-element XLen array if only XLen alignment is required.
if (Size <= XLen) {
+ // For big endian, we need to extend the type to XLen.
+ if (getDataLayout().isBigEndian())
+ return ABIArgInfo::getDirect(
+ llvm::IntegerType::get(getVMContext(), XLen));
+ // Otherwise use the smallest integer type we can.
return ABIArgInfo::getDirect(
- llvm::IntegerType::get(getVMContext(), XLen));
- } else if (Alignment == 2 * XLen) {
+ llvm::IntegerType::get(getVMContext(), Size));
+ }
+ // Use 2*XLen if 2*XLen alignment is required.
+ if (Alignment == 2 * XLen)
return ABIArgInfo::getDirect(
llvm::IntegerType::get(getVMContext(), 2 * XLen));
- } else {
- return ABIArgInfo::getDirect(llvm::ArrayType::get(
- llvm::IntegerType::get(getVMContext(), XLen), 2));
- }
+ // Use 2-element XLen array if only XLen alignment is required.
+ return ABIArgInfo::getDirect(llvm::ArrayType::get(
+ llvm::IntegerType::get(getVMContext(), XLen), 2));
}
return getNaturalAlignIndirect(
Ty, /*AddrSpace=*/getDataLayout().getAllocaAddrSpace(),
diff --git a/clang/test/CodeGen/RISCV/abi-empty-structs.c b/clang/test/CodeGen/RISCV/abi-empty-structs.c
index 5157165787fcb..7d3dfd8cb4ddb 100644
--- a/clang/test/CodeGen/RISCV/abi-empty-structs.c
+++ b/clang/test/CodeGen/RISCV/abi-empty-structs.c
@@ -1,20 +1,20 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --filter "^define |^entry:" --version 2
// RUN: %clang_cc1 -triple riscv32 -target-feature +f -target-abi ilp32f -emit-llvm %s -o - \
-// RUN: | FileCheck -check-prefixes=CHECK-C,CHECK32-C %s
+// RUN: | FileCheck -check-prefixes=CHECK-C,CHECK32-C,CHECK32-C-F %s
// RUN: %clang_cc1 -triple riscv32 -target-feature +f -target-feature +d -target-abi ilp32d -emit-llvm %s -o - \
-// RUN: | FileCheck -check-prefixes=CHECK-C,CHECK32-C %s
+// RUN: | FileCheck -check-prefixes=CHECK-C,CHECK32-C,CHECK32-C-D %s
// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-abi lp64f -emit-llvm %s -o - \
-// RUN: | FileCheck -check-prefixes=CHECK-C,CHECK64-C %s
+// RUN: | FileCheck -check-prefixes=CHECK-C,CHECK64-C,CHECK64-C-F %s
// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d -target-abi lp64d -emit-llvm %s -o - \
-// RUN: | FileCheck -check-prefixes=CHECK-C,CHECK64-C %s
+// RUN: | FileCheck -check-prefixes=CHECK-C,CHECK64-C,CHECK64-C-D %s
// RUN: %clang_cc1 -x c++ -triple riscv32 -target-feature +f -target-abi ilp32f -emit-llvm %s -o - \
-// RUN: | FileCheck -check-prefixes=CHECK-CXX,CHECK32-CXX %s
+// RUN: | FileCheck -check-prefixes=CHECK-CXX,CHECK32-CXX,CHECK32-CXX-F %s
// RUN: %clang_cc1 -x c++ -triple riscv32 -target-feature +f -target-feature +d -target-abi ilp32d -emit-llvm %s -o - \
-// RUN: | FileCheck -check-prefixes=CHECK-CXX,CHECK32-CXX %s
+// RUN: | FileCheck -check-prefixes=CHECK-CXX,CHECK32-CXX,CHECK32-CXX-D %s
// RUN: %clang_cc1 -x c++ -triple riscv64 -target-feature +f -target-abi lp64f -emit-llvm %s -o - \
-// RUN: | FileCheck -check-prefixes=CHECK-CXX,CHECK64-CXX %s
+// RUN: | FileCheck -check-prefixes=CHECK-CXX,CHECK64-CXX,CHECK64-CXX-F %s
// RUN: %clang_cc1 -x c++ -triple riscv64 -target-feature +f -target-feature +d -target-abi lp64d -emit-llvm %s -o - \
-// RUN: | FileCheck -check-prefixes=CHECK-CXX,CHECK64-CXX %s
+// RUN: | FileCheck -check-prefixes=CHECK-CXX,CHECK64-CXX,CHECK64-CXX-D %s
#include <stdint.h>
@@ -157,13 +157,9 @@ struct s9 {
// CHECK-C-SAME: () #[[ATTR0]] {
// CHECK-C: entry:
//
-// CHECK32-CXX-LABEL: define dso_local void @_Z7test_s92s9
-// CHECK32-CXX-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK32-CXX: entry:
-//
-// CHECK64-CXX-LABEL: define dso_local void @_Z7test_s92s9
-// CHECK64-CXX-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK64-CXX: entry:
+// CHECK-CXX-LABEL: define dso_local void @_Z7test_s92s9
+// CHECK-CXX-SAME: (i8 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-CXX: entry:
//
void test_s9(struct s9 a) {}
@@ -172,13 +168,9 @@ struct s10 { };
// CHECK-C-SAME: () #[[ATTR0]] {
// CHECK-C: entry:
//
-// CHECK32-CXX-LABEL: define dso_local i32 @_Z8test_s103s10
-// CHECK32-CXX-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK32-CXX: entry:
-//
-// CHECK64-CXX-LABEL: define dso_local i64 @_Z8test_s103s10
-// CHECK64-CXX-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK64-CXX: entry:
+// CHECK-CXX-LABEL: define dso_local i8 @_Z8test_s103s10
+// CHECK-CXX-SAME: (i8 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-CXX: entry:
//
struct s10 test_s10(struct s10 a) {
return a;
@@ -189,13 +181,9 @@ struct s11 { int : 0; };
// CHECK-C-SAME: () #[[ATTR0]] {
// CHECK-C: entry:
//
-// CHECK32-CXX-LABEL: define dso_local i32 @_Z8test_s113s11
-// CHECK32-CXX-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK32-CXX: entry:
-//
-// CHECK64-CXX-LABEL: define dso_local i64 @_Z8test_s113s11
-// CHECK64-CXX-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
-// CHECK64-CXX: entry:
+// CHECK-CXX-LABEL: define dso_local i8 @_Z8test_s113s11
+// CHECK-CXX-SAME: (i8 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// CHECK-CXX: entry:
//
struct s11 test_s11(struct s11 a) {
return a;
@@ -223,5 +211,11 @@ int test_s12(int32_t i1, struct s12 a, int32_t i2) {
}
//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-// CHECK32-C: {{.*}}
-// CHECK64-C: {{.*}}
+// CHECK32-C-D: {{.*}}
+// CHECK32-C-F: {{.*}}
+// CHECK32-CXX-D: {{.*}}
+// CHECK32-CXX-F: {{.*}}
+// CHECK64-C-D: {{.*}}
+// CHECK64-C-F: {{.*}}
+// CHECK64-CXX-D: {{.*}}
+// CHECK64-CXX-F: {{.*}}
diff --git a/clang/test/CodeGen/RISCV/bfloat-abi.c b/clang/test/CodeGen/RISCV/bfloat-abi.c
index f7c82adaa6d89..cbf5ca445779d 100644
--- a/clang/test/CodeGen/RISCV/bfloat-abi.c
+++ b/clang/test/CodeGen/RISCV/bfloat-abi.c
@@ -6,35 +6,31 @@ struct bfloat1 {
__bf16 a;
};
-// CHECK-RV64-LABEL: define dso_local i64 @h1
+// CHECK-RV64-LABEL: define dso_local i16 @h1
// CHECK-RV64-SAME: (bfloat noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-RV64-NEXT: entry:
// CHECK-RV64-NEXT: [[RETVAL:%.*]] = alloca [[STRUCT_BFLOAT1:%.*]], align 2
// CHECK-RV64-NEXT: [[A_ADDR:%.*]] = alloca bfloat, align 2
-// CHECK-RV64-NEXT: [[COERCE_DIVE_COERCE:%.*]] = alloca i64, align 8
// CHECK-RV64-NEXT: store bfloat [[A]], ptr [[A_ADDR]], align 2
// CHECK-RV64-NEXT: [[TMP0:%.*]] = load bfloat, ptr [[A_ADDR]], align 2
// CHECK-RV64-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_BFLOAT1]], ptr [[RETVAL]], i32 0, i32 0
// CHECK-RV64-NEXT: store bfloat [[TMP0]], ptr [[A1]], align 2
// CHECK-RV64-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_BFLOAT1]], ptr [[RETVAL]], i32 0, i32 0
-// CHECK-RV64-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[COERCE_DIVE_COERCE]], ptr align 2 [[COERCE_DIVE]], i64 2, i1 false)
-// CHECK-RV64-NEXT: [[TMP1:%.*]] = load i64, ptr [[COERCE_DIVE_COERCE]], align 8
-// CHECK-RV64-NEXT: ret i64 [[TMP1]]
+// CHECK-RV64-NEXT: [[TMP1:%.*]] = load i16, ptr [[COERCE_DIVE]], align 2
+// CHECK-RV64-NEXT: ret i16 [[TMP1]]
//
-// CHECK-RV32-LABEL: define dso_local i32 @h1
+// CHECK-RV32-LABEL: define dso_local i16 @h1
// CHECK-RV32-SAME: (bfloat noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-RV32-NEXT: entry:
// CHECK-RV32-NEXT: [[RETVAL:%.*]] = alloca [[STRUCT_BFLOAT1:%.*]], align 2
// CHECK-RV32-NEXT: [[A_ADDR:%.*]] = alloca bfloat, align 2
-// CHECK-RV32-NEXT: [[COERCE_DIVE_COERCE:%.*]] = alloca i32, align 4
// CHECK-RV32-NEXT: store bfloat [[A]], ptr [[A_ADDR]], align 2
// CHECK-RV32-NEXT: [[TMP0:%.*]] = load bfloat, ptr [[A_ADDR]], align 2
// CHECK-RV32-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_BFLOAT1]], ptr [[RETVAL]], i32 0, i32 0
// CHECK-RV32-NEXT: store bfloat [[TMP0]], ptr [[A1]], align 2
// CHECK-RV32-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_BFLOAT1]], ptr [[RETVAL]], i32 0, i32 0
-// CHECK-RV32-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[COERCE_DIVE_COERCE]], ptr align 2 [[COERCE_DIVE]], i32 2, i1 false)
-// CHECK-RV32-NEXT: [[TMP1:%.*]] = load i32, ptr [[COERCE_DIVE_COERCE]], align 4
-// CHECK-RV32-NEXT: ret i32 [[TMP1]]
+// CHECK-RV32-NEXT: [[TMP1:%.*]] = load i16, ptr [[COERCE_DIVE]], align 2
+// CHECK-RV32-NEXT: ret i16 [[TMP1]]
//
struct bfloat1 h1(__bf16 a) {
struct bfloat1 x;
@@ -47,13 +43,12 @@ struct bfloat2 {
__bf16 b;
};
-// CHECK-RV64-LABEL: define dso_local i64 @h2
+// CHECK-RV64-LABEL: define dso_local i32 @h2
// CHECK-RV64-SAME: (bfloat noundef [[A:%.*]], bfloat noundef [[B:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
// CHECK-RV64-NEXT: [[RETVAL:%.*]] = alloca [[STRUCT_BFLOAT2:%.*]], align 2
// CHECK-RV64-NEXT: [[A_ADDR:%.*]] = alloca bfloat, align 2
// CHECK-RV64-NEXT: [[B_ADDR:%.*]] = alloca bfloat, align 2
-// CHECK-RV64-NEXT: [[RETVAL_COERCE:%.*]] = alloca i64, align 8
// CHECK-RV64-NEXT: store bfloat [[A]], ptr [[A_ADDR]], align 2
// CHECK-RV64-NEXT: store bfloat [[B]], ptr [[B_ADDR]], align 2
// CHECK-RV64-NEXT: [[TMP0:%.*]] = load bfloat, ptr [[A_ADDR]], align 2
@@ -62,9 +57,8 @@ struct bfloat2 {
// CHECK-RV64-NEXT: [[TMP1:%.*]] = load bfloat, ptr [[B_ADDR]], align 2
// CHECK-RV64-NEXT: [[B2:%.*]] = getelementptr inbounds nuw [[STRUCT_BFLOAT2]], ptr [[RETVAL]], i32 0, i32 1
// CHECK-RV64-NEXT: store bfloat [[TMP1]], ptr [[B2]], align 2
-// CHECK-RV64-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL_COERCE]], ptr align 2 [[RETVAL]], i64 4, i1 false)
-// CHECK-RV64-NEXT: [[TMP2:%.*]] = load i64, ptr [[RETVAL_COERCE]], align 8
-// CHECK-RV64-NEXT: ret i64 [[TMP2]]
+// CHECK-RV64-NEXT: [[TMP2:%.*]] = load i32, ptr [[RETVAL]], align 2
+// CHECK-RV64-NEXT: ret i32 [[TMP2]]
//
// CHECK-RV32-LABEL: define dso_local i32 @h2
// CHECK-RV32-SAME: (bfloat noundef [[A:%.*]], bfloat noundef [[B:%.*]]) #[[ATTR0]] {
@@ -96,14 +90,14 @@ struct bfloat3 {
__bf16 c;
};
-// CHECK-RV64-LABEL: define dso_local i64 @h3
+// CHECK-RV64-LABEL: define dso_local i48 @h3
// CHECK-RV64-SAME: (bfloat noundef [[A:%.*]], bfloat noundef [[B:%.*]], bfloat noundef [[C:%.*]]) #[[ATTR0]] {
// CHECK-RV64-NEXT: entry:
// CHECK-RV64-NEXT: [[RETVAL:%.*]] = alloca [[STRUCT_BFLOAT3:%.*]], align 2
// CHECK-RV64-NEXT: [[A_ADDR:%.*]] = alloca bfloat, align 2
// CHECK-RV64-NEXT: [[B_ADDR:%.*]] = alloca bfloat, align 2
// CHECK-RV64-NEXT: [[C_ADDR:%.*]] = alloca bfloat, align 2
-// CHECK-RV64-NEXT: [[RETVAL_COERCE:%.*]] = alloca i64, align 8
+// CHECK-RV64-NEXT: [[RETVAL_COERCE:%.*]] = alloca i48, align 8
// CHECK-RV64-NEXT: store bfloat [[A]], ptr [[A_ADDR]], align 2
// CHECK-RV64-NEXT: store bfloat [[B]], ptr [[B_ADDR]], align 2
// CHECK-RV64-NEXT: store bfloat [[C]], ptr [[C_ADDR]], align 2
@@ -117,8 +111,8 @@ struct bfloat3 {
// CHECK-RV64-NEXT: [[C3:%.*]] = getelementptr inbounds nuw [[STRUCT_BFLOAT3]], ptr [[RETVAL]], i32 0, i32 2
// CHECK-RV64-NEXT: store bfloat [[TMP2]], ptr [[C3]], align 2
// CHECK-RV64-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL_COERCE]], ptr align 2 [[RETVAL]], i64 6, i1 false)
-// CHECK-RV64-NEXT: [[TMP3:%.*]] = load i64, ptr [[RETVAL_COERCE]], align 8
-// CHECK-RV64-NEXT: ret i64 [[TMP3]]
+// CHECK-RV64-NEXT: [[TMP3:%.*]] = load i48, ptr [[RETVAL_COERCE]], align 8
+// CHECK-RV64-NEXT: ret i48 [[TMP3]]
//
// CHECK-RV32-LABEL: define dso_local [2 x i32] @h3
// CHECK-RV32-SAME: (bfloat noundef [[A:%.*]], bfloat noundef [[B:%.*]], bfloat noundef [[C:%.*]]) #[[ATTR0]] {
diff --git a/clang/test/CodeGen/RISCV/riscv32-abi.c b/clang/test/CodeGen/RISCV/riscv32-abi.c
index 1d7b31642f12a..18e0b13a50b0c 100644
--- a/clang/test/CodeGen/RISCV/riscv32-abi.c
+++ b/clang/test/CodeGen/RISCV/riscv32-abi.c
@@ -1542,7 +1542,7 @@ struct float16_s { _Float16 f; };
// were a standalone floating-point real.
// ILP32-LABEL: define dso_local void @f_float16_s_arg
-// ILP32-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// ILP32-SAME: (i16 [[A_COERCE:%.*]]) #[[ATTR0]] {
// ILP32: entry:
//
// ILP32F-ILP32D-LABEL: define dso_local void @f_float16_s_arg
@@ -1551,7 +1551,7 @@ struct float16_s { _Float16 f; };
//
void f_float16_s_arg(struct float16_s a) {}
-// ILP32-LABEL: define dso_local i32 @f_ret_float16_s
+// ILP32-LABEL: define dso_local i16 @f_ret_float16_s
// ILP32-SAME: () #[[ATTR0]] {
// ILP32: entry:
//
@@ -1570,7 +1570,7 @@ struct zbf_float16_s { int : 0; _Float16 f; };
struct zbf_float16_zbf_s { int : 0; _Float16 f; int : 0; };
// ILP32-LABEL: define dso_local void @f_zbf_float16_s_arg
-// ILP32-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// ILP32-SAME: (i16 [[A_COERCE:%.*]]) #[[ATTR0]] {
// ILP32: entry:
//
// ILP32F-ILP32D-LABEL: define dso_local void @f_zbf_float16_s_arg
@@ -1579,7 +1579,7 @@ struct zbf_float16_zbf_s { int : 0; _Float16 f; int : 0; };
//
void f_zbf_float16_s_arg(struct zbf_float16_s a) {}
-// ILP32-LABEL: define dso_local i32 @f_ret_zbf_float16_s
+// ILP32-LABEL: define dso_local i16 @f_ret_zbf_float16_s
// ILP32-SAME: () #[[ATTR0]] {
// ILP32: entry:
//
@@ -1854,7 +1854,7 @@ struct float16complex_s f_ret_float16complex_s(void) {
struct float16arr1_s { _Float16 a[1]; };
// ILP32-LABEL: define dso_local void @f_float16arr1_s_arg
-// ILP32-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// ILP32-SAME: (i16 [[A_COERCE:%.*]]) #[[ATTR0]] {
// ILP32: entry:
//
// ILP32F-ILP32D-LABEL: define dso_local void @f_float16arr1_s_arg
@@ -1863,7 +1863,7 @@ struct float16arr1_s { _Float16 a[1]; };
//
void f_float16arr1_s_arg(struct float16arr1_s a) {}
-// ILP32-LABEL: define dso_local i32 @f_ret_float16arr1_s
+// ILP32-LABEL: define dso_local i16 @f_ret_float16arr1_s
// ILP32-SAME: () #[[ATTR0]] {
// ILP32: entry:
//
@@ -2052,12 +2052,12 @@ struct char_char_float16_s f_ret_char_char_float16_s(void) {
union float16_u { _Float16 a; };
// ILP32-ILP32F-ILP32D-LABEL: define dso_local void @f_float16_u_arg
-// ILP32-ILP32F-ILP32D-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// ILP32-ILP32F-ILP32D-SAME: (i16 [[A_COERCE:%.*]]) #[[ATTR0]] {
// ILP32-ILP32F-ILP32D: entry:
//
void f_float16_u_arg(union float16_u a) {}
-// ILP32-ILP32F-ILP32D-LABEL: define dso_local i32 @f_ret_float16_u
+// ILP32-ILP32F-ILP32D-LABEL: define dso_local i16 @f_ret_float16_u
// ILP32-ILP32F-ILP32D-SAME: () #[[ATTR0]] {
// ILP32-ILP32F-ILP32D: entry:
//
diff --git a/clang/test/CodeGen/RISCV/riscv64-abi.c b/clang/test/CodeGen/RISCV/riscv64-abi.c
index 2dc982516b360..fb151372942d0 100644
--- a/clang/test/CodeGen/RISCV/riscv64-abi.c
+++ b/clang/test/CodeGen/RISCV/riscv64-abi.c
@@ -358,7 +358,7 @@ void f_fpr_tracking(float a, float b, float c, float d, float e, float f,
struct float_s { float f; };
// LP64-LABEL: define dso_local void @f_float_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_float_s_arg
@@ -367,7 +367,7 @@ struct float_s { float f; };
//
void f_float_s_arg(struct float_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_float_s
+// LP64-LABEL: define dso_local i32 @f_ret_float_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -386,7 +386,7 @@ struct zbf_float_s { int : 0; float f; };
struct zbf_float_zbf_s { int : 0; float f; int : 0; };
// LP64-LABEL: define dso_local void @f_zbf_float_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_zbf_float_s_arg
@@ -395,7 +395,7 @@ struct zbf_float_zbf_s { int : 0; float f; int : 0; };
//
void f_zbf_float_s_arg(struct zbf_float_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_zbf_float_s
+// LP64-LABEL: define dso_local i32 @f_ret_zbf_float_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -408,7 +408,7 @@ struct zbf_float_s f_ret_zbf_float_s(void) {
}
// LP64-LABEL: define dso_local void @f_zbf_float_zbf_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_zbf_float_zbf_s_arg
@@ -417,7 +417,7 @@ struct zbf_float_s f_ret_zbf_float_s(void) {
//
void f_zbf_float_zbf_s_arg(struct zbf_float_zbf_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_zbf_float_zbf_s
+// LP64-LABEL: define dso_local i32 @f_ret_zbf_float_zbf_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -735,7 +735,7 @@ void f_floatcomplex_s_arg_insufficient_fprs2(float a,
struct floatarr1_s { float a[1]; };
// LP64-LABEL: define dso_local void @f_floatarr1_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_floatarr1_s_arg
@@ -744,7 +744,7 @@ struct floatarr1_s { float a[1]; };
//
void f_floatarr1_s_arg(struct floatarr1_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_floatarr1_s
+// LP64-LABEL: define dso_local i32 @f_ret_floatarr1_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -917,12 +917,12 @@ struct char_char_float_s f_ret_char_char_float_s(void) {
union float_u { float a; };
// LP64-LP64F-LP64D-LABEL: define dso_local void @f_float_u_arg
-// LP64-LP64F-LP64D-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-LP64F-LP64D-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64-LP64F-LP64D: entry:
//
void f_float_u_arg(union float_u a) {}
-// LP64-LP64F-LP64D-LABEL: define dso_local i64 @f_ret_float_u
+// LP64-LP64F-LP64D-LABEL: define dso_local i32 @f_ret_float_u
// LP64-LP64F-LP64D-SAME: () #[[ATTR0]] {
// LP64-LP64F-LP64D: entry:
//
@@ -1501,7 +1501,7 @@ struct float16_s { _Float16 f; };
// were a standalone floating-point real.
// LP64-LABEL: define dso_local void @f_float16_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i16 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_float16_s_arg
@@ -1510,7 +1510,7 @@ struct float16_s { _Float16 f; };
//
void f_float16_s_arg(struct float16_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_float16_s
+// LP64-LABEL: define dso_local i16 @f_ret_float16_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -1529,7 +1529,7 @@ struct zbf_float16_s { int : 0; _Float16 f; };
struct zbf_float16_zbf_s { int : 0; _Float16 f; int : 0; };
// LP64-LABEL: define dso_local void @f_zbf_float16_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i16 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_zbf_float16_s_arg
@@ -1538,7 +1538,7 @@ struct zbf_float16_zbf_s { int : 0; _Float16 f; int : 0; };
//
void f_zbf_float16_s_arg(struct zbf_float16_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_zbf_float16_s
+// LP64-LABEL: define dso_local i16 @f_ret_zbf_float16_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -1551,7 +1551,7 @@ struct zbf_float16_s f_ret_zbf_float16_s(void) {
}
// LP64-LABEL: define dso_local void @f_zbf_float16_zbf_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_zbf_float16_zbf_s_arg
@@ -1560,7 +1560,7 @@ struct zbf_float16_s f_ret_zbf_float16_s(void) {
//
void f_zbf_float16_zbf_s_arg(struct zbf_float16_zbf_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_zbf_float16_zbf_s
+// LP64-LABEL: define dso_local i32 @f_ret_zbf_float16_zbf_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -1618,7 +1618,7 @@ struct float16_int64bf_s { _Float16 f; int64_t i : 32; };
struct float16_int8_zbf_s { _Float16 f; int8_t i; int : 0; };
// LP64-LABEL: define dso_local void @f_float16_int8_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_float16_int8_s_arg
@@ -1627,7 +1627,7 @@ struct float16_int8_zbf_s { _Float16 f; int8_t i; int : 0; };
//
void f_float16_int8_s_arg(struct float16_int8_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_float16_int8_s
+// LP64-LABEL: define dso_local i32 @f_ret_float16_int8_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -1640,7 +1640,7 @@ struct float16_int8_s f_ret_float16_int8_s(void) {
}
// LP64-LABEL: define dso_local void @f_float16_uint8_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_float16_uint8_s_arg
@@ -1649,7 +1649,7 @@ struct float16_int8_s f_ret_float16_int8_s(void) {
//
void f_float16_uint8_s_arg(struct float16_uint8_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_float16_uint8_s
+// LP64-LABEL: define dso_local i32 @f_ret_float16_uint8_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -1731,7 +1731,7 @@ struct float16_int64bf_s f_ret_float16_int64bf_s(void) {
// floating point calling convention.
// LP64-LABEL: define dso_local void @f_float16_int8_zbf_s
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_float16_int8_zbf_s
@@ -1740,7 +1740,7 @@ struct float16_int64bf_s f_ret_float16_int64bf_s(void) {
//
void f_float16_int8_zbf_s(struct float16_int8_zbf_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_float16_int8_zbf_s
+// LP64-LABEL: define dso_local i32 @f_ret_float16_int8_zbf_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -1753,14 +1753,14 @@ struct float16_int8_zbf_s f_ret_float16_int8_zbf_s(void) {
}
// LP64-LP64F-LP64D-LABEL: define dso_local void @f_float16_int8_s_arg_insufficient_gprs
-// LP64-LP64F-LP64D-SAME: (i32 noundef signext [[A:%.*]], i32 noundef signext [[B:%.*]], i32 noundef signext [[C:%.*]], i32 noundef signext [[D:%.*]], i32 noundef signext [[E:%.*]], i32 noundef signext [[F:%.*]], i32 noundef signext [[G:%.*]], i32 noundef signext [[H:%.*]], i64 [[I_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-LP64F-LP64D-SAME: (i32 noundef signext [[A:%.*]], i32 noundef signext [[B:%.*]], i32 noundef signext [[C:%.*]], i32 noundef signext [[D:%.*]], i32 noundef signext [[E:%.*]], i32 noundef signext [[F:%.*]], i32 noundef signext [[G:%.*]], i32 noundef signext [[H:%.*]], i32 [[I_COERCE:%.*]]) #[[ATTR0]] {
// LP64-LP64F-LP64D: entry:
//
void f_float16_int8_s_arg_insufficient_gprs(int a, int b, int c, int d, int e,
int f, int g, int h, struct float16_int8_s i) {}
// LP64-LABEL: define dso_local void @f_struct_float16_int8_insufficient_fprs
-// LP64-SAME: (float noundef [[A:%.*]], double noundef [[B:%.*]], double noundef [[C:%.*]], double noundef [[D:%.*]], double noundef [[E:%.*]], double noundef [[F:%.*]], double noundef [[G:%.*]], double noundef [[H:%.*]], i64 [[I_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (float noundef [[A:%.*]], double noundef [[B:%.*]], double noundef [[C:%.*]], double noundef [[D:%.*]], double noundef [[E:%.*]], double noundef [[F:%.*]], double noundef [[G:%.*]], double noundef [[H:%.*]], i32 [[I_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LABEL: define dso_local void @f_struct_float16_int8_insufficient_fprs
@@ -1768,7 +1768,7 @@ void f_float16_int8_s_arg_insufficient_gprs(int a, int b, int c, int d, int e,
// LP64F: entry:
//
// LP64D-LABEL: define dso_local void @f_struct_float16_int8_insufficient_fprs
-// LP64D-SAME: (float noundef [[A:%.*]], double noundef [[B:%.*]], double noundef [[C:%.*]], double noundef [[D:%.*]], double noundef [[E:%.*]], double noundef [[F:%.*]], double noundef [[G:%.*]], double noundef [[H:%.*]], i64 [[I_COERCE:%.*]]) #[[ATTR0]] {
+// LP64D-SAME: (float noundef [[A:%.*]], double noundef [[B:%.*]], double noundef [[C:%.*]], double noundef [[D:%.*]], double noundef [[E:%.*]], double noundef [[F:%.*]], double noundef [[G:%.*]], double noundef [[H:%.*]], i32 [[I_COERCE:%.*]]) #[[ATTR0]] {
// LP64D: entry:
//
void f_struct_float16_int8_insufficient_fprs(float a, double b, double c, double d,
@@ -1778,7 +1778,7 @@ void f_struct_float16_int8_insufficient_fprs(float a, double b, double c, double
// floating-point value should be passed as if it were an fp+fp struct.
// LP64-LABEL: define dso_local void @f_float16complex
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 noundef [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_float16complex
@@ -1787,7 +1787,7 @@ void f_struct_float16_int8_insufficient_fprs(float a, double b, double c, double
//
void f_float16complex(_Float16 __complex__ a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_float16complex
+// LP64-LABEL: define dso_local i32 @f_ret_float16complex
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -1802,7 +1802,7 @@ _Float16 __complex__ f_ret_float16complex(void) {
struct float16complex_s { _Float16 __complex__ c; };
// LP64-LABEL: define dso_local void @f_float16complex_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_float16complex_s_arg
@@ -1811,7 +1811,7 @@ struct float16complex_s { _Float16 __complex__ c; };
//
void f_float16complex_s_arg(struct float16complex_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_float16complex_s
+// LP64-LABEL: define dso_local i32 @f_ret_float16complex_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -1829,7 +1829,7 @@ struct float16complex_s f_ret_float16complex_s(void) {
struct float16arr1_s { _Float16 a[1]; };
// LP64-LABEL: define dso_local void @f_float16arr1_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i16 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_float16arr1_s_arg
@@ -1838,7 +1838,7 @@ struct float16arr1_s { _Float16 a[1]; };
//
void f_float16arr1_s_arg(struct float16arr1_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_float16arr1_s
+// LP64-LABEL: define dso_local i16 @f_ret_float16arr1_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -1853,7 +1853,7 @@ struct float16arr1_s f_ret_float16arr1_s(void) {
struct float16arr2_s { _Float16 a[2]; };
// LP64-LABEL: define dso_local void @f_float16arr2_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_float16arr2_s_arg
@@ -1862,7 +1862,7 @@ struct float16arr2_s { _Float16 a[2]; };
//
void f_float16arr2_s_arg(struct float16arr2_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_float16arr2_s
+// LP64-LABEL: define dso_local i32 @f_ret_float16arr2_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -1877,7 +1877,7 @@ struct float16arr2_s f_ret_float16arr2_s(void) {
struct float16arr2_tricky1_s { struct { _Float16 f[1]; } g[2]; };
// LP64-LABEL: define dso_local void @f_float16arr2_tricky1_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_float16arr2_tricky1_s_arg
@@ -1886,7 +1886,7 @@ struct float16arr2_tricky1_s { struct { _Float16 f[1]; } g[2]; };
//
void f_float16arr2_tricky1_s_arg(struct float16arr2_tricky1_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_float16arr2_tricky1_s
+// LP64-LABEL: define dso_local i32 @f_ret_float16arr2_tricky1_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -1901,7 +1901,7 @@ struct float16arr2_tricky1_s f_ret_float16arr2_tricky1_s(void) {
struct float16arr2_tricky2_s { struct {}; struct { _Float16 f[1]; } g[2]; };
// LP64-LABEL: define dso_local void @f_float16arr2_tricky2_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_float16arr2_tricky2_s_arg
@@ -1910,7 +1910,7 @@ struct float16arr2_tricky2_s { struct {}; struct { _Float16 f[1]; } g[2]; };
//
void f_float16arr2_tricky2_s_arg(struct float16arr2_tricky2_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_float16arr2_tricky2_s
+// LP64-LABEL: define dso_local i32 @f_ret_float16arr2_tricky2_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -1925,7 +1925,7 @@ struct float16arr2_tricky2_s f_ret_float16arr2_tricky2_s(void) {
struct float16arr2_tricky3_s { union {}; struct { _Float16 f[1]; } g[2]; };
// LP64-LABEL: define dso_local void @f_float16arr2_tricky3_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_float16arr2_tricky3_s_arg
@@ -1934,7 +1934,7 @@ struct float16arr2_tricky3_s { union {}; struct { _Float16 f[1]; } g[2]; };
//
void f_float16arr2_tricky3_s_arg(struct float16arr2_tricky3_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_float16arr2_tricky3_s
+// LP64-LABEL: define dso_local i32 @f_ret_float16arr2_tricky3_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -1949,7 +1949,7 @@ struct float16arr2_tricky3_s f_ret_float16arr2_tricky3_s(void) {
struct float16arr2_tricky4_s { union {}; struct { struct {}; _Float16 f[1]; } g[2]; };
// LP64-LABEL: define dso_local void @f_float16arr2_tricky4_s_arg
-// LP64-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64: entry:
//
// LP64F-LP64D-LABEL: define dso_local void @f_float16arr2_tricky4_s_arg
@@ -1958,7 +1958,7 @@ struct float16arr2_tricky4_s { union {}; struct { struct {}; _Float16 f[1]; } g[
//
void f_float16arr2_tricky4_s_arg(struct float16arr2_tricky4_s a) {}
-// LP64-LABEL: define dso_local i64 @f_ret_float16arr2_tricky4_s
+// LP64-LABEL: define dso_local i32 @f_ret_float16arr2_tricky4_s
// LP64-SAME: () #[[ATTR0]] {
// LP64: entry:
//
@@ -2016,12 +2016,12 @@ struct int64_float16_s f_ret_int64_float16_s(void) {
struct char_char_float16_s { char a; char b; _Float16 c; };
// LP64-LP64F-LP64D-LABEL: define dso_local void @f_char_char_float16_s_arg
-// LP64-LP64F-LP64D-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-LP64F-LP64D-SAME: (i32 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64-LP64F-LP64D: entry:
//
void f_char_char_float16_s_arg(struct char_char_float16_s a) {}
-// LP64-LP64F-LP64D-LABEL: define dso_local i64 @f_ret_char_char_float16_s
+// LP64-LP64F-LP64D-LABEL: define dso_local i32 @f_ret_char_char_float16_s
// LP64-LP64F-LP64D-SAME: () #[[ATTR0]] {
// LP64-LP64F-LP64D: entry:
//
@@ -2035,12 +2035,12 @@ struct char_char_float16_s f_ret_char_char_float16_s(void) {
union float16_u { _Float16 a; };
// LP64-LP64F-LP64D-LABEL: define dso_local void @f_float16_u_arg
-// LP64-LP64F-LP64D-SAME: (i64 [[A_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-LP64F-LP64D-SAME: (i16 [[A_COERCE:%.*]]) #[[ATTR0]] {
// LP64-LP64F-LP64D: entry:
//
void f_float16_u_arg(union float16_u a) {}
-// LP64-LP64F-LP64D-LABEL: define dso_local i64 @f_ret_float16_u
+// LP64-LP64F-LP64D-LABEL: define dso_local i16 @f_ret_float16_u
// LP64-LP64F-LP64D-SAME: () #[[ATTR0]] {
// LP64-LP64F-LP64D: entry:
//
>From 4af532d3be5af98cf2ed4321637eb60d0be4cbf4 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 4 Mar 2026 20:52:51 -0800
Subject: [PATCH 2/3] fixup! clang-format
---
clang/lib/CodeGen/Targets/RISCV.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/clang/lib/CodeGen/Targets/RISCV.cpp b/clang/lib/CodeGen/Targets/RISCV.cpp
index a8f0a7941cd0b..ea8000879c524 100644
--- a/clang/lib/CodeGen/Targets/RISCV.cpp
+++ b/clang/lib/CodeGen/Targets/RISCV.cpp
@@ -735,8 +735,8 @@ ABIArgInfo RISCVABIInfo::classifyArgumentType(QualType Ty, bool IsFixed,
return ABIArgInfo::getDirect(
llvm::IntegerType::get(getVMContext(), 2 * XLen));
// Use 2-element XLen array if only XLen alignment is required.
- return ABIArgInfo::getDirect(llvm::ArrayType::get(
- llvm::IntegerType::get(getVMContext(), XLen), 2));
+ return ABIArgInfo::getDirect(
+ llvm::ArrayType::get(llvm::IntegerType::get(getVMContext(), XLen), 2));
}
return getNaturalAlignIndirect(
Ty, /*AddrSpace=*/getDataLayout().getAllocaAddrSpace(),
>From 379ac403f62e3fc525c74a6ebb4098882e128f6e Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 5 Mar 2026 08:47:42 -0800
Subject: [PATCH 3/3] Add additional tests.
---
clang/test/CodeGen/RISCV/riscv32-abi.c | 40 ++++++++++++++++++++++++++
clang/test/CodeGen/RISCV/riscv64-abi.c | 37 ++++++++++++++++++++++++
2 files changed, 77 insertions(+)
diff --git a/clang/test/CodeGen/RISCV/riscv32-abi.c b/clang/test/CodeGen/RISCV/riscv32-abi.c
index 18e0b13a50b0c..3a92389776dee 100644
--- a/clang/test/CodeGen/RISCV/riscv32-abi.c
+++ b/clang/test/CodeGen/RISCV/riscv32-abi.c
@@ -124,8 +124,32 @@ struct tiny f_agg_tiny_ret(void) {
return (struct tiny){1, 2, 3, 4};
}
+// Aggregates <= 2*xlen may be passed in registers, so will be coerced to
+// integer arguments. The rules for return are the same.
+
+struct tinier {
+ uint8_t a, b;
+};
+
+// ILP32-ILP32F-ILP32D-LABEL: define dso_local void @f_agg_tinier
+// ILP32-ILP32F-ILP32D-SAME: (i16 [[X_COERCE:%.*]]) #[[ATTR0]] {
+// ILP32-ILP32F-ILP32D: entry:
+//
+void f_agg_tinier(struct tinier x) {
+ x.a += x.b;
+}
+
+// ILP32-ILP32F-ILP32D-LABEL: define dso_local i16 @f_agg_tinier_ret
+// ILP32-ILP32F-ILP32D-SAME: () #[[ATTR0]] {
+// ILP32-ILP32F-ILP32D: entry:
+//
+struct tinier f_agg_tinier_ret(void) {
+ return (struct tinier){1, 2};
+}
+
typedef uint8_t v4i8 __attribute__((vector_size(4)));
typedef int32_t v1i32 __attribute__((vector_size(4)));
+typedef uint8_t v2i8 __attribute__((vector_size(2)));
// ILP32-ILP32F-ILP32D-LABEL: define dso_local void @f_vec_tiny_v4i8
// ILP32-ILP32F-ILP32D-SAME: (i32 noundef [[X_COERCE:%.*]]) #[[ATTR0]] {
@@ -160,6 +184,22 @@ v1i32 f_vec_tiny_v1i32_ret(void) {
return (v1i32){1};
}
+// ILP32-ILP32F-ILP32D-LABEL: define dso_local void @f_vec_tiny_v2i8
+// ILP32-ILP32F-ILP32D-SAME: (i32 noundef [[X_COERCE:%.*]]) #[[ATTR0]] {
+// ILP32-ILP32F-ILP32D: entry:
+//
+void f_vec_tiny_v2i8(v4i8 x) {
+ x[0] = x[1];
+}
+
+// ILP32-ILP32F-ILP32D-LABEL: define dso_local i16 @f_vec_tiny_v2i8_ret
+// ILP32-ILP32F-ILP32D-SAME: () #[[ATTR0]] {
+// ILP32-ILP32F-ILP32D: entry:
+//
+v2i8 f_vec_tiny_v2i8_ret(void) {
+ return (v2i8){1, 2};
+}
+
struct small {
int32_t a, *b;
};
diff --git a/clang/test/CodeGen/RISCV/riscv64-abi.c b/clang/test/CodeGen/RISCV/riscv64-abi.c
index fb151372942d0..ce573046b703b 100644
--- a/clang/test/CodeGen/RISCV/riscv64-abi.c
+++ b/clang/test/CodeGen/RISCV/riscv64-abi.c
@@ -120,8 +120,29 @@ struct tiny f_agg_tiny_ret(void) {
return (struct tiny){1, 2, 3, 4};
}
+struct tinier {
+ uint16_t a, b;
+};
+
+// LP64-LP64F-LP64D-LABEL: define dso_local void @f_agg_tinier
+// LP64-LP64F-LP64D-SAME: (i32 [[X_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-LP64F-LP64D: entry:
+//
+void f_agg_tinier(struct tinier x) {
+ x.a += x.b;
+}
+
+// LP64-LP64F-LP64D-LABEL: define dso_local i32 @f_agg_tinier_ret
+// LP64-LP64F-LP64D-SAME: () #[[ATTR0]] {
+// LP64-LP64F-LP64D: entry:
+//
+struct tinier f_agg_tinier_ret(void) {
+ return (struct tinier){1, 2};
+}
+
typedef uint16_t v4i16 __attribute__((vector_size(8)));
typedef int64_t v1i64 __attribute__((vector_size(8)));
+typedef uint16_t v2i16 __attribute__((vector_size(4)));
// LP64-LP64F-LP64D-LABEL: define dso_local void @f_vec_tiny_v4i16
// LP64-LP64F-LP64D-SAME: (i64 noundef [[X_COERCE:%.*]]) #[[ATTR0]] {
@@ -156,6 +177,22 @@ v1i64 f_vec_tiny_v1i64_ret(void) {
return (v1i64){1};
}
+// LP64-LP64F-LP64D-LABEL: define dso_local void @f_vec_tiny_v2i16
+// LP64-LP64F-LP64D-SAME: (i32 noundef [[X_COERCE:%.*]]) #[[ATTR0]] {
+// LP64-LP64F-LP64D: entry:
+//
+void f_vec_tiny_v2i16(v2i16 x) {
+ x[0] = x[1];
+}
+
+// LP64-LP64F-LP64D-LABEL: define dso_local i32 @f_vec_tiny_v2i16_ret
+// LP64-LP64F-LP64D-SAME: () #[[ATTR0]] {
+// LP64-LP64F-LP64D: entry:
+//
+v2i16 f_vec_tiny_v2i16_ret(void) {
+ return (v2i16){1, 2};
+}
+
struct small {
int64_t a, *b;
};
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