[clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)

[Alexis Engelke via cfe-commits]

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@@ -67,7 +67,7 @@ class X86Subtarget final : public X86GenSubtargetInfo {
   bool ATTRIBUTE = DEFAULT;
 #include "X86GenSubtargetInfo.inc"
   /// ReservedRReg R#i is not available as a general purpose register.
-  BitVector ReservedRReg;
+  std::bitset<X86::NUM_TARGET_REGS> ReservedRReg;
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aengelke wrote:

Still, I think it's not a good idea to follow the lead from RISCV and M68k here, I think AArch64 is a better lead to implement this feature. I'd prefer a less wasteful implementation here.

https://github.com/llvm/llvm-project/pull/184606