[clang] [CIR] Fix Codegen for Vector logical op with FP (PR #182761)

[Amr Hesham via cfe-commits]

AmrDeveloper wrote:

Note:

I am thinking of creating a `VecLogicalOp` to abstract this part and also to control when we want to generate an extra cast from i1 to i32 🤔 

https://github.com/llvm/llvm-project/pull/182761