[clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)

[via cfe-commits]

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@@ -975,6 +999,14 @@ class WaitcntBrackets {
   // Store representative LDS DMA operations. The only useful info here is
   // alias info. One store is kept per unique AAInfo.
   SmallVector<const MachineInstr *> LDSDMAStores;
+
+  // State of all counters at each async mark encountered so far.
+  SmallVector<CounterValueArray> AsyncMarks;
+  static constexpr unsigned MaxAsyncMarks = 16;
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vporpo wrote:

Using a vector that gets managed like a FIFO in an add-hoc way is not a good design because it adds technical debt and makes the code cryptic. I don't think time complexity is the concern here, and even if it is there are ways around it by handling this internally in the data structure itself.

https://github.com/llvm/llvm-project/pull/180467