[clang] [CIR] Support x86 builtin rdtsc (PR #180714)
Aditya Trivedi via cfe-commits
cfe-commits at lists.llvm.org
Fri Feb 13 02:20:38 PST 2026
https://github.com/adit4443ya updated https://github.com/llvm/llvm-project/pull/180714
>From 91171772e9efe310a9f1d4edff1b4dce03c0442b Mon Sep 17 00:00:00 2001
From: Aditya Trivedi <adit4443ya at gmail.com>
Date: Tue, 10 Feb 2026 10:08:19 +0000
Subject: [PATCH] [Clang][CIR] Support X86 builtins: __rdtsc and
__builtin_ia32_rdtscp
Ported __rdtsc and __builtin_ia32_rdtscp from traditional CodeGen to CIR.
These builtins are lowered to the x86.rdtsc and x86.rdtscp LLVM intrinsics.
For __builtin_ia32_rdtscp, the processor ID is extracted from the intrinsic's
returned struct and stored to the user-provided pointer.
Test file rd-builtins.c verifies CIR generation and that both the CIR path
and classic codegen produce identical LLVM IR output.
---
clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp | 21 ++++++++---
.../CIR/CodeGenBuiltins/X86/rd-builtins.c | 36 +++++++++++++++++++
2 files changed, 53 insertions(+), 4 deletions(-)
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
index 8e6d5d0a07a96..a0d80900a3475 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
@@ -860,11 +860,24 @@ CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, const CallExpr *expr) {
case X86::BI_m_prefetchw:
return emitPrefetch(*this, builtinID, expr, ops);
case X86::BI__rdtsc:
+ return builder.emitIntrinsicCallOp(getLoc(expr->getExprLoc()), "x86.rdtsc",
+ builder.getUInt64Ty());
case X86::BI__builtin_ia32_rdtscp: {
- cgm.errorNYI(expr->getSourceRange(),
- std::string("unimplemented X86 builtin call: ") +
- getContext().BuiltinInfo.getName(builtinID));
- return mlir::Value{};
+ mlir::Location loc = getLoc(expr->getExprLoc());
+ mlir::Type i64Ty = builder.getUInt64Ty();
+ mlir::Type i32Ty = builder.getUInt32Ty();
+ mlir::Type structTy = builder.getAnonRecordTy({i64Ty, i32Ty});
+ mlir::Value result =
+ builder.emitIntrinsicCallOp(loc, "x86.rdtscp", structTy);
+
+ // Extract and store processor_id (element 1 of the returned struct)
+ mlir::Value processorId =
+ cir::ExtractMemberOp::create(builder, loc, i32Ty, result, 1);
+ // ops[0] is the address to store the processor ID
+ builder.createStore(loc, processorId, Address{ops[0], CharUnits::One()});
+
+ // Return timestamp (element 0 of the returned struct)
+ return cir::ExtractMemberOp::create(builder, loc, i64Ty, result, 0);
}
case X86::BI__builtin_ia32_lzcnt_u16:
case X86::BI__builtin_ia32_lzcnt_u32:
diff --git a/clang/test/CIR/CodeGenBuiltins/X86/rd-builtins.c b/clang/test/CIR/CodeGenBuiltins/X86/rd-builtins.c
index 28d4d6f06ddd1..08bec4e474034 100644
--- a/clang/test/CIR/CodeGenBuiltins/X86/rd-builtins.c
+++ b/clang/test/CIR/CodeGenBuiltins/X86/rd-builtins.c
@@ -26,3 +26,39 @@ unsigned long long test_rdpmc(int a) {
// OGCG: ret i64 %{{.*}}
return _rdpmc(a);
}
+
+unsigned long long test_rdtsc(void) {
+ // CIR-LABEL: @test_rdtsc
+ // CIR: %{{.*}} = cir.call_llvm_intrinsic "x86.rdtsc" : () -> !u64i
+
+ // LLVM-LABEL: @test_rdtsc
+ // LLVM: call i64 @llvm.x86.rdtsc()
+
+ // OGCG-LABEL: @test_rdtsc
+ // OGCG: call i64 @llvm.x86.rdtsc()
+
+ return __rdtsc();
+}
+
+unsigned long long test_rdtscp(unsigned int *a) {
+ // CIR-LABEL: @test_rdtscp
+ // CIR: %[[RDTSCP:.*]] = cir.call_llvm_intrinsic "x86.rdtscp" : () -> !rec_anon_struct
+ // CIR: %[[TSC_AUX:.*]] = cir.extract_member %[[RDTSCP]][1] : !rec_anon_struct -> !u32i
+ // CIR: cir.store {{.*}}%[[TSC_AUX]], {{%.*}} : !u32i
+ // CIR: %[[TSC:.*]] = cir.extract_member %[[RDTSCP]][0] : !rec_anon_struct -> !u64i
+
+ // LLVM-LABEL: @test_rdtscp
+ // LLVM: %[[RDTSCP:.*]] = call { i64, i32 } @llvm.x86.rdtscp()
+ // LLVM: %[[TSC_AUX:.*]] = extractvalue { i64, i32 } %[[RDTSCP]], 1
+ // LLVM: store i32 %[[TSC_AUX]], ptr %{{.*}}
+ // LLVM: %[[TSC:.*]] = extractvalue { i64, i32 } %[[RDTSCP]], 0
+
+ // OGCG-LABEL: @test_rdtscp
+ // OGCG: %[[RDTSCP:.*]] = call { i64, i32 } @llvm.x86.rdtscp
+ // OGCG: %[[TSC_AUX:.*]] = extractvalue { i64, i32 } %[[RDTSCP]], 1
+ // OGCG: store i32 %[[TSC_AUX]], ptr %{{.*}}
+ // OGCG: %[[TSC:.*]] = extractvalue { i64, i32 } %[[RDTSCP]], 0
+
+ return __builtin_ia32_rdtscp(a);
+}
+
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