[clang] 82447b9 - [CIR] Add cir.atomic.xchg to target lowering (#180744)

[via cfe-commits]

Author: Sirui Mu
Date: 2026-02-12T20:04:26+08:00
New Revision: 82447b92c37842b33e708146ba4ec794bb9fae98

URL: https://github.com/llvm/llvm-project/commit/82447b92c37842b33e708146ba4ec794bb9fae98
DIFF: https://github.com/llvm/llvm-project/commit/82447b92c37842b33e708146ba4ec794bb9fae98.diff

LOG: [CIR] Add cir.atomic.xchg to target lowering (#180744)

This patch adds the `cir.atomic.xchg` operation to the TargetLowering
pass. The synchronization scope attached to the operation will be
canonicalized there.

Added: 
    

Modified: 
    clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
    clang/test/CIR/CodeGen/atomic-scoped.c

Removed: 
    


################################################################################
diff  --git a/clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp b/clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
index 656f29dab4e92..b542753072697 100644
--- a/clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
+++ b/clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
@@ -58,7 +58,7 @@ void TargetLoweringPass::runOnOperation() {
   }
 
   mod->walk([&](mlir::Operation *op) {
-    if (mlir::isa<cir::LoadOp, cir::StoreOp>(op))
+    if (mlir::isa<cir::LoadOp, cir::StoreOp, cir::AtomicXchgOp>(op))
       convertSyncScopeIfPresent(op, *lowerModule);
   });
 }

diff  --git a/clang/test/CIR/CodeGen/atomic-scoped.c b/clang/test/CIR/CodeGen/atomic-scoped.c
index d34b95b9a305a..74fef480c0b27 100644
--- a/clang/test/CIR/CodeGen/atomic-scoped.c
+++ b/clang/test/CIR/CodeGen/atomic-scoped.c
@@ -82,32 +82,38 @@ void scoped_atomic_store_n(int *ptr, int value) {
 }
 
 void scoped_atomic_exchange(int *ptr, int *value, int *old) {
+  // CIR-BEFORE-TL-LABEL: @scoped_atomic_exchange
   // CIR-LABEL: @scoped_atomic_exchange
   // LLVM-LABEL: @scoped_atomic_exchange
   // OGCG-LABEL: @scoped_atomic_exchange
 
   __scoped_atomic_exchange(ptr, value, old, __ATOMIC_RELAXED, __MEMORY_SCOPE_SINGLE);
-  // CIR: %{{.+}} = cir.atomic.xchg relaxed syncscope(single_thread) %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
+  // CIR-BEFORE-TL: cir.atomic.xchg relaxed syncscope(single_thread) %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
+  // CIR: %{{.+}} = cir.atomic.xchg relaxed syncscope(system) %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
   // LLVM: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4
   // OGCG: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4
 
   __scoped_atomic_exchange(ptr, value, old, __ATOMIC_RELAXED, __MEMORY_SCOPE_SYSTEM);
+  // CIR-BEFORE-TL: cir.atomic.xchg relaxed syncscope(system) %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
   // CIR: %{{.+}} = cir.atomic.xchg relaxed syncscope(system) %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
   // LLVM: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4
   // OGCG: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4
 }
 
 void scoped_atomic_exchange_n(int *ptr, int value) {
+  // CIR-BEFORE-TL-LABEL: @scoped_atomic_exchange_n
   // CIR-LABEL: @scoped_atomic_exchange_n
   // LLVM-LABEL: @scoped_atomic_exchange_n
   // OGCG-LABEL: @scoped_atomic_exchange_n
 
   __scoped_atomic_exchange_n(ptr, value, __ATOMIC_RELAXED, __MEMORY_SCOPE_SINGLE);
-  // CIR: %{{.+}} = cir.atomic.xchg relaxed syncscope(single_thread) %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
+  // CIR-BEFORE-TL: cir.atomic.xchg relaxed syncscope(single_thread) %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
+  // CIR: %{{.+}} = cir.atomic.xchg relaxed syncscope(system) %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
   // LLVM: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4
   // OGCG: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4
 
   __scoped_atomic_exchange_n(ptr, value, __ATOMIC_RELAXED, __MEMORY_SCOPE_SYSTEM);
+  // CIR-BEFORE-TL: cir.atomic.xchg relaxed syncscope(system) %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
   // CIR: %{{.+}} = cir.atomic.xchg relaxed syncscope(system) %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
   // LLVM: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4
   // OGCG: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4