[clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)
Sameer Sahasrabuddhe via cfe-commits
cfe-commits at lists.llvm.org
Wed Feb 11 23:06:12 PST 2026
================
@@ -975,6 +999,14 @@ class WaitcntBrackets {
// Store representative LDS DMA operations. The only useful info here is
// alias info. One store is kept per unique AAInfo.
SmallVector<const MachineInstr *> LDSDMAStores;
+
+ // State of all counters at each async mark encountered so far.
+ SmallVector<CounterValueArray> AsyncMarks;
+ static constexpr unsigned MaxAsyncMarks = 16;
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ssahasra wrote:
AsyncMarks is a FIFO. Constantly enforcing MaxAsyncMarks as a data-structure limit would require removing elements from the front. Instead we treat MaxAsyncMarks as a soft algorithmic limit, which we enforce only when it matters.
The choice of value was explained in a different place. In #181095 I have now moved that explanation to this place.
https://github.com/llvm/llvm-project/pull/180467
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