[clang] [CIR] X86 vector masked load builtins (PR #169464)

[via cfe-commits]

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@@ -1804,6 +1796,26 @@ mlir::LogicalResult CIRToLLVMLoadOpLowering::matchAndRewrite(
   return mlir::LogicalResult::success();
 }
 
+mlir::LogicalResult cir::direct::CIRToLLVMMaskedLoadOpLowering::matchAndRewrite(
+    cir::MaskedLoadOp op, OpAdaptor adaptor,
+    mlir::ConversionPatternRewriter &rewriter) const {
+  const mlir::Type llvmResTy =
+      convertTypeForMemory(*getTypeConverter(), dataLayout, op.getType());
+
+  std::optional<size_t> opAlign = op.getAlignment();
+  unsigned alignment =
+      (unsigned)opAlign.value_or(dataLayout.getTypeABIAlignment(llvmResTy));
+
+  auto alignAttr = rewriter.getI32IntegerAttr(alignment);
+
+  mlir::LLVM::MaskedLoadOp newLoad = mlir::LLVM::MaskedLoadOp::create(
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woruyu wrote:

Done!

https://github.com/llvm/llvm-project/pull/169464