[clang] [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) CPU support (PR #176666)

[Rick Gaiser via cfe-commits]

rickgaiser wrote:

I'm testing with different assembly short loop forms to see where a possible warning could be added. The results are interesting. With assembly the MipsAsmParser will fill all delay slots with a NOP if `IsReorder` is true:
https://github.com/llvm/llvm-project/blob/689f9788d3e482791d45e1e631a1bacf78f318ba/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp#L2279-L2280
So `noreorder` is needed if the user wants to fill the delay slot with something else. The following inline assembly for instance I expected would work as a "short loop":
```C
int test_reorder(int n) {
    asm volatile (
        "1:\n"
        "   bnez   %0, 1b\n"
        "   addiu  %0, %0, -1\n"
        : "+r"(n)
    );
    return n;
}
```
Is compiled into this _infinite loop_ without warning:
```
.Ltmp0:
	.set	noreorder
	bnez	$4, .Ltmp0
	nop
	.set	reorder
	addiu	$4, $4, -1
```
Adding `noreorder` to the assembly will produce the expected result, but at the same time trigger the short loop bug on the r5900. So like you said:

> they who wield the noreorder directive “know what they are doing”

For now I'll consider adding the warning a separate feature out of scope for this PR.

https://github.com/llvm/llvm-project/pull/176666